]> www.pilppa.org Git - linux-2.6-omap-h63xx.git/commitdiff
USB: fix up EHCI startup synchronization
authorDavid Brownell <david-b@pacbell.net>
Wed, 14 Nov 2007 00:22:30 +0000 (16:22 -0800)
committerGreg Kroah-Hartman <gregkh@suse.de>
Wed, 28 Nov 2007 21:58:36 +0000 (13:58 -0800)
A recent patch added software synchronization during EHCI startup,
so ports aren't switched away from the companion controllers after
resets have started.  This patch adds a short delay letting hardware
finish that port switching before any new resets begin ... so both
ends of that hardware race window are closed.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Cc: Dave Miller <davem@davemloft.net>
Cc: Dely Sy <dely.l.sy@intel.com>
Cc: stable <stable@kernel.org>
Cc: Alan Stern <stern@rowland.harvard.edu>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
drivers/usb/host/ehci-hcd.c

index c1514442883e4a4fecd2ff3d3fae3a18c80e8785..5f2d74ed5ad73a299480022938645551d5179b09 100644 (file)
@@ -575,12 +575,15 @@ static int ehci_run (struct usb_hcd *hcd)
         * from the companions to the EHCI controller.  If any of the
         * companions are in the middle of a port reset at the time, it
         * could cause trouble.  Write-locking ehci_cf_port_reset_rwsem
-        * guarantees that no resets are in progress.
+        * guarantees that no resets are in progress.  After we set CF,
+        * a short delay lets the hardware catch up; new resets shouldn't
+        * be started before the port switching actions could complete.
         */
        down_write(&ehci_cf_port_reset_rwsem);
        hcd->state = HC_STATE_RUNNING;
        ehci_writel(ehci, FLAG_CF, &ehci->regs->configured_flag);
        ehci_readl(ehci, &ehci->regs->command); /* unblock posted writes */
+       msleep(5);
        up_write(&ehci_cf_port_reset_rwsem);
 
        temp = HC_VERSION(ehci_readl(ehci, &ehci->caps->hc_capbase));