hwif->dma_base = base;
 
-       if (hwif->mate)
-               hwif->dma_master = hwif->channel ? hwif->mate->dma_base : base;
-       else
-               hwif->dma_master = base;
-
        if (!(hwif->dma_command))
                hwif->dma_command       = hwif->dma_base;
        if (!(hwif->dma_vendor1))
                       hwif->drives[1].name, (dma_stat & 0x40) ? "DMA" : "pio");
        }
        printk("\n");
-
-       BUG_ON(!hwif->dma_master);
 }
 
 EXPORT_SYMBOL_GPL(ide_setup_dma);
 
 #endif
 
        hwif->dma_base                  = tmp_hwif->dma_base;
-       hwif->dma_master                = tmp_hwif->dma_master;
        hwif->dma_command               = tmp_hwif->dma_command;
        hwif->dma_vendor1               = tmp_hwif->dma_vendor1;
        hwif->dma_status                = tmp_hwif->dma_status;
                (void) ide_release_dma(hwif);
 
                hwif->dma_base = 0;
-               hwif->dma_master = 0;
                hwif->dma_command = 0;
                hwif->dma_vendor1 = 0;
                hwif->dma_status = 0;
 
 static int cmd648_ide_dma_end (ide_drive_t *drive)
 {
        ide_hwif_t *hwif        = HWIF(drive);
+       unsigned long base      = hwif->dma_base - (hwif->channel * 8);
        int err                 = __ide_dma_end(drive);
        u8  irq_mask            = hwif->channel ? MRDMODE_INTR_CH1 :
                                                  MRDMODE_INTR_CH0;
-       u8  mrdmode             = inb(hwif->dma_master + 0x01);
+       u8  mrdmode             = inb(base + 1);
 
        /* clear the interrupt bit */
        outb((mrdmode & ~(MRDMODE_INTR_CH0 | MRDMODE_INTR_CH1)) | irq_mask,
-            hwif->dma_master + 0x01);
+            base + 1);
 
        return err;
 }
 static int cmd648_ide_dma_test_irq (ide_drive_t *drive)
 {
        ide_hwif_t *hwif        = HWIF(drive);
+       unsigned long base      = hwif->dma_base - (hwif->channel * 8);
        u8 irq_mask             = hwif->channel ? MRDMODE_INTR_CH1 :
                                                  MRDMODE_INTR_CH0;
        u8 dma_stat             = inb(hwif->dma_status);
-       u8 mrdmode              = inb(hwif->dma_master + 0x01);
+       u8 mrdmode              = inb(base + 1);
 
 #ifdef DEBUG
        printk("%s: dma_stat: 0x%02x mrdmode: 0x%02x irq_mask: 0x%02x\n",
 
 
 static void hpt3xxn_set_clock(ide_hwif_t *hwif, u8 mode)
 {
-       u8 scr2 = inb(hwif->dma_master + 0x7b);
+       unsigned long base = hwif->extra_base;
+       u8 scr2 = inb(base + 0x6b);
 
        if ((scr2 & 0x7f) == mode)
                return;
 
        /* Tristate the bus */
-       outb(0x80, hwif->dma_master + 0x73);
-       outb(0x80, hwif->dma_master + 0x77);
+       outb(0x80, base + 0x63);
+       outb(0x80, base + 0x67);
 
        /* Switch clock and reset channels */
-       outb(mode, hwif->dma_master + 0x7b);
-       outb(0xc0, hwif->dma_master + 0x79);
+       outb(mode, base + 0x6b);
+       outb(0xc0, base + 0x69);
 
        /*
         * Reset the state machines.
         * NOTE: avoid accidentally enabling the disabled channels.
         */
-       outb(inb(hwif->dma_master + 0x70) | 0x32, hwif->dma_master + 0x70);
-       outb(inb(hwif->dma_master + 0x74) | 0x32, hwif->dma_master + 0x74);
+       outb(inb(base + 0x60) | 0x32, base + 0x60);
+       outb(inb(base + 0x64) | 0x32, base + 0x64);
 
        /* Complete reset */
-       outb(0x00, hwif->dma_master + 0x79);
+       outb(0x00, base + 0x69);
 
        /* Reconnect channels to bus */
-       outb(0x00, hwif->dma_master + 0x73);
-       outb(0x00, hwif->dma_master + 0x77);
+       outb(0x00, base + 0x63);
+       outb(0x00, base + 0x67);
 }
 
 /**
 
  */
 static void pdc_old_enable_66MHz_clock(ide_hwif_t *hwif)
 {
-       unsigned long clock_reg = hwif->dma_master + 0x11;
+       unsigned long clock_reg = hwif->extra_base + 0x01;
        u8 clock = inb(clock_reg);
 
        outb(clock | (hwif->channel ? 0x08 : 0x02), clock_reg);
 
 static void pdc_old_disable_66MHz_clock(ide_hwif_t *hwif)
 {
-       unsigned long clock_reg = hwif->dma_master + 0x11;
+       unsigned long clock_reg = hwif->extra_base + 0x01;
        u8 clock = inb(clock_reg);
 
        outb(clock & ~(hwif->channel ? 0x08 : 0x02), clock_reg);
        if (drive->media != ide_disk || drive->addressing == 1) {
                struct request *rq      = HWGROUP(drive)->rq;
                ide_hwif_t *hwif        = HWIF(drive);
-               unsigned long high_16   = hwif->dma_master;
+               unsigned long high_16   = hwif->extra_base - 16;
                unsigned long atapi_reg = high_16 + (hwif->channel ? 0x24 : 0x20);
                u32 word_count  = 0;
                u8 clock = inb(high_16 + 0x11);
 {
        if (drive->media != ide_disk || drive->addressing == 1) {
                ide_hwif_t *hwif        = HWIF(drive);
-               unsigned long high_16   = hwif->dma_master;
+               unsigned long high_16   = hwif->extra_base - 16;
                unsigned long atapi_reg = high_16 + (hwif->channel ? 0x24 : 0x20);
                u8 clock                = 0;
 
 static int pdc202xx_old_ide_dma_test_irq(ide_drive_t *drive)
 {
        ide_hwif_t *hwif        = HWIF(drive);
-       unsigned long high_16   = hwif->dma_master;
+       unsigned long high_16   = hwif->extra_base - 16;
        u8 dma_stat             = inb(hwif->dma_status);
        u8 sc1d                 = inb(high_16 + 0x001d);
 
 
 static void pdc202xx_reset_host (ide_hwif_t *hwif)
 {
-       unsigned long high_16   = hwif->dma_master;
+       unsigned long high_16   = hwif->extra_base - 16;
        u8 udma_speed_flag      = inb(high_16 | 0x001f);
 
        outb(udma_speed_flag | 0x10, high_16 | 0x001f);
 
        int             rqsize;         /* max sectors per request */
        int             irq;            /* our irq number */
 
-       unsigned long   dma_master;     /* reference base addr dmabase */
        unsigned long   dma_base;       /* base addr for dma ports */
        unsigned long   dma_command;    /* dma command register */
        unsigned long   dma_vendor1;    /* dma vendor 1 register */