P: Nick Kossifidis
M: mickflemm@gmail.com
P: Luis R. Rodriguez
-M: mcgrof@gmail.com
+M: lrodriguez@atheros.com
P: Bob Copeland
M: me@bobcopeland.com
L: linux-wireless@vger.kernel.org
W: http://sourceforge.net/projects/acpi4asus
S: Maintained
-EEPRO100 NETWORK DRIVER
-P: Andrey V. Savochkin
-M: saw@saw.sw.com.sg
-S: Maintained
-
EFS FILESYSTEM
W: http://aeschi.ch.eu.org/efs/
S: Orphan
L: linux-i2c@vger.kernel.org
S: Maintained
+ FREESCALE IMX / MXC FRAMEBUFFER DRIVER
+ P: Sascha Hauer
+ M: kernel@pengutronix.de
+ L: linux-fbdev-devel@lists.sourceforge.net (moderated for non-subscribers)
+ L: linux-arm-kernel@lists.arm.linux.org.uk (subscribers-only)
+ S: Maintained
+
FREESCALE SOC FS_ENET DRIVER
P: Pantelis Antoniou
M: pantelis.antoniou@gmail.com
M: hskinnemoen@atmel.com
S: Supported
-GENERIC HDLC DRIVER, N2, C101, PCI200SYN and WANXL DRIVERS
+GENERIC HDLC (WAN) DRIVERS
P: Krzysztof Halasa
M: khc@pm.waw.pl
W: http://www.kernel.org/pub/linux/utils/net/hdlc/
INOTIFY
P: John McCutchan
-M: ttb@tentacle.dhs.org
+M: john@johnmccutchan.com
P: Robert Love
-M: rml@novell.com
+M: rlove@rlove.org
L: linux-kernel@vger.kernel.org
S: Maintained
L: linux-kernel@vger.kernel.org
S: Supported
+INTEL IXP4XX QMGR, NPE, ETHERNET and HSS SUPPORT
+P: Krzysztof Halasa
+M: khc@pm.waw.pl
+S: Maintained
+
INTEL IXP4XX RANDOM NUMBER GENERATOR SUPPORT
P: Deepak Saxena
M: dsaxena@plexity.net
W: http://www.linux-ax25.org/
S: Maintained
-RTL818X WIRELESS DRIVER
-P: Michael Wu
-M: flamingice@sourmilk.net
-P: Andrea Merello
-M: andreamrl@tiscali.it
+RTL8180 WIRELESS DRIVER
+P: John W. Linville
+M: linville@tuxdriver.com
L: linux-wireless@vger.kernel.org
W: http://linuxwireless.org/
-T: git kernel.org:/pub/scm/linux/kernel/git/mwu/mac80211-drivers.git
+T: git kernel.org:/pub/scm/linux/kernel/git/linville/wireless-testing.git
S: Maintained
+RTL8187 WIRELESS DRIVER
+P: Herton Ronaldo Krzesinski
+M: herton@mandriva.com.br
+P: Hin-Tak Leung
+M htl10@users.sourceforge.net
+P: Larry Finger
+M: Larry.Finger@lwfinger.net
+L: linux-wireless@vger.kernel.org
+W: http://linuxwireless.org/
+T: git kernel.org:/pub/scm/linux/kernel/git/linville/wireless-testing.git
+S: Maintained
+
S3 SAVAGE FRAMEBUFFER DRIVER
P: Antonino Daplas
M: adaplas@gmail.com
L: lm-sensors@lm-sensors.org
S: Maintained
+SMSC911x ETHERNET DRIVER
+P: Steve Glendinning
+M: steve.glendinning@smsc.com
+L: netdev@vger.kernel.org
+S: Supported
+
+SMSC9420 PCI ETHERNET DRIVER
+P: Steve Glendinning
+M: steve.glendinning@smsc.com
+L: netdev@vger.kernel.org
+S: Supported
+
SMX UIO Interface
P: Ben Nizette
M: bn@niasdigital.com
L: alsa-devel@alsa-project.org (subscribers-only)
S: Maintained
-SOUND - SOC LAYER / DYNAMIC AUDIO POWER MANAGEMENT
+SOUND - SOC LAYER / DYNAMIC AUDIO POWER MANAGEMENT (ASoC)
P: Liam Girdwood
M: lrg@slimlogic.co.uk
P: Mark Brown
USB VIDEO CLASS
P: Laurent Pinchart
M: laurent.pinchart@skynet.be
-L: linux-uvc-devel@lists.berlios.de
+L: linux-uvc-devel@lists.berlios.de (subscribers-only)
L: video4linux-list@redhat.com
W: http://linux-uvc.berlios.de
S: Maintained
#include <asm/io.h>
#include <mach/regs-gpio.h>
- #include <asm/plat-s3c/regs-iic.h>
- #include <asm/plat-s3c/iic.h>
+ #include <plat/regs-iic.h>
+ #include <plat/iic.h>
/* i2c controller state */
struct s3c24xx_i2c {
spinlock_t lock;
wait_queue_head_t wait;
+ unsigned int suspended:1;
struct i2c_msg *msg;
unsigned int msg_num;
unsigned long timeout;
int ret;
- if (!(readl(i2c->regs + S3C2410_IICCON) & S3C2410_IICCON_IRQEN))
+ if (i2c->suspended)
return -EIO;
ret = s3c24xx_i2c_set_master(i2c);
}
#ifdef CONFIG_PM
+static int s3c24xx_i2c_suspend_late(struct platform_device *dev,
+ pm_message_t msg)
+{
+ struct s3c24xx_i2c *i2c = platform_get_drvdata(dev);
+ i2c->suspended = 1;
+ return 0;
+}
+
static int s3c24xx_i2c_resume(struct platform_device *dev)
{
struct s3c24xx_i2c *i2c = platform_get_drvdata(dev);
- if (i2c != NULL)
- s3c24xx_i2c_init(i2c);
+ i2c->suspended = 0;
+ s3c24xx_i2c_init(i2c);
return 0;
}
#else
+#define s3c24xx_i2c_suspend_late NULL
#define s3c24xx_i2c_resume NULL
#endif
static struct platform_driver s3c2410_i2c_driver = {
.probe = s3c24xx_i2c_probe,
.remove = s3c24xx_i2c_remove,
+ .suspend_late = s3c24xx_i2c_suspend_late,
.resume = s3c24xx_i2c_resume,
.driver = {
.owner = THIS_MODULE,
static struct platform_driver s3c2440_i2c_driver = {
.probe = s3c24xx_i2c_probe,
.remove = s3c24xx_i2c_remove,
+ .suspend_late = s3c24xx_i2c_suspend_late,
.resume = s3c24xx_i2c_resume,
.driver = {
.owner = THIS_MODULE,
config IDE_ATAPI
bool
+config IDE_LEGACY
+ bool
+
config BLK_DEV_IDE_SATA
bool "Support for SATA (deprecated; conflicts with libata SATA driver)"
default n
config IDE_ARM
tristate "ARM IDE support"
- depends on ARM && (ARCH_CLPS7500 || ARCH_RPC || ARCH_SHARK)
+ depends on ARM && (ARCH_RPC || ARCH_SHARK)
default y
config BLK_DEV_IDE_ICSIDE
config BLK_DEV_ALI14XX
tristate "ALI M14xx support"
select IDE_TIMINGS
+ select IDE_LEGACY
help
This driver is enabled at runtime using the "ali14xx.probe" kernel
boot parameter. It enables support for the secondary IDE interface
config BLK_DEV_DTC2278
tristate "DTC-2278 support"
+ select IDE_LEGACY
help
This driver is enabled at runtime using the "dtc2278.probe" kernel
boot parameter. It enables support for the secondary IDE interface
config BLK_DEV_HT6560B
tristate "Holtek HT6560B support"
select IDE_TIMINGS
+ select IDE_LEGACY
help
This driver is enabled at runtime using the "ht6560b.probe" kernel
boot parameter. It enables support for the secondary IDE interface
config BLK_DEV_QD65XX
tristate "QDI QD65xx support"
select IDE_TIMINGS
+ select IDE_LEGACY
help
This driver is enabled at runtime using the "qd65xx.probe" kernel
boot parameter. It permits faster I/O speeds to be set. See the
config BLK_DEV_UMC8672
tristate "UMC-8672 support"
+ select IDE_LEGACY
help
This driver is enabled at runtime using the "umc8672.probe" kernel
boot parameter. It enables support for the secondary IDE interface
/* The cs8900 has 4 IRQ pins, software selectable. cs8900_irq_map maps
them to system IRQ numbers. This mapping is card specific and is set to
the configuration of the Cirrus Eval board for this chip. */
- #ifdef CONFIG_ARCH_CLPS7500
- static unsigned int netcard_portlist[] __used __initdata =
- { 0x80090303, 0x300, 0x320, 0x340, 0x360, 0x200, 0x220, 0x240, 0x260, 0x280, 0x2a0, 0x2c0, 0x2e0, 0};
- static unsigned int cs8900_irq_map[] = {12,0,0,0};
- #elif defined(CONFIG_SH_HICOSH4)
+ #if defined(CONFIG_SH_HICOSH4)
static unsigned int netcard_portlist[] __used __initdata =
{ 0x0300, 0};
static unsigned int cs8900_irq_map[] = {1,0,0,0};
unsigned rev_type = 0;
int eeprom_buff[CHKSUM_LEN];
int retval;
- DECLARE_MAC_BUF(mac);
/* Initialize the device structure. */
if (!modular) {
}
/* print the ethernet address. */
- printk(", MAC %s", print_mac(mac, dev->dev_addr));
+ printk(", MAC %pM", dev->dev_addr);
dev->open = net_open;
dev->stop = net_close;
}
skb->protocol=eth_type_trans(skb,dev);
netif_rx(skb);
- dev->last_rx = jiffies;
lp->stats.rx_packets++;
lp->stats.rx_bytes += length;
}
#endif /* ALLOW_DMA */
-void __init reset_chip(struct net_device *dev)
+static void __init reset_chip(struct net_device *dev)
{
#if !defined(CONFIG_MACH_MX31ADS)
#if !defined(CONFIG_MACH_IXDP2351) && !defined(CONFIG_ARCH_IXDP2X01)
skb->protocol=eth_type_trans(skb,dev);
netif_rx(skb);
- dev->last_rx = jiffies;
lp->stats.rx_packets++;
lp->stats.rx_bytes += length;
}
memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
- if (net_debug) {
- DECLARE_MAC_BUF(mac);
- printk("%s: Setting MAC address to %s.\n",
- dev->name, print_mac(mac, dev->dev_addr));
- }
+ if (net_debug)
+ printk("%s: Setting MAC address to %pM.\n",
+ dev->name, dev->dev_addr);
+
/* set the Ethernet address */
for (i=0; i < ETH_ALEN/2; i++)
writereg(dev, PP_IA+i*2, dev->dev_addr[i*2] | (dev->dev_addr[i*2+1] << 8));
#include <net/irda/wrapper.h>
#include <net/irda/irda_device.h>
- #include <asm/dma.h>
+ #include <mach/dma.h>
#include <mach/irda.h>
+ #include <mach/hardware.h>
#include <mach/pxa-regs.h>
+ #include <mach/regs-uart.h>
+
+ #define FICP __REG(0x40800000) /* Start of FICP area */
+ #define ICCR0 __REG(0x40800000) /* ICP Control Register 0 */
+ #define ICCR1 __REG(0x40800004) /* ICP Control Register 1 */
+ #define ICCR2 __REG(0x40800008) /* ICP Control Register 2 */
+ #define ICDR __REG(0x4080000c) /* ICP Data Register */
+ #define ICSR0 __REG(0x40800014) /* ICP Status Register 0 */
+ #define ICSR1 __REG(0x40800018) /* ICP Status Register 1 */
+
+ #define ICCR0_AME (1 << 7) /* Address match enable */
+ #define ICCR0_TIE (1 << 6) /* Transmit FIFO interrupt enable */
+ #define ICCR0_RIE (1 << 5) /* Recieve FIFO interrupt enable */
+ #define ICCR0_RXE (1 << 4) /* Receive enable */
+ #define ICCR0_TXE (1 << 3) /* Transmit enable */
+ #define ICCR0_TUS (1 << 2) /* Transmit FIFO underrun select */
+ #define ICCR0_LBM (1 << 1) /* Loopback mode */
+ #define ICCR0_ITR (1 << 0) /* IrDA transmission */
+
+ #define ICCR2_RXP (1 << 3) /* Receive Pin Polarity select */
+ #define ICCR2_TXP (1 << 2) /* Transmit Pin Polarity select */
+ #define ICCR2_TRIG (3 << 0) /* Receive FIFO Trigger threshold */
+ #define ICCR2_TRIG_8 (0 << 0) /* >= 8 bytes */
+ #define ICCR2_TRIG_16 (1 << 0) /* >= 16 bytes */
+ #define ICCR2_TRIG_32 (2 << 0) /* >= 32 bytes */
+
+ #ifdef CONFIG_PXA27x
+ #define ICSR0_EOC (1 << 6) /* DMA End of Descriptor Chain */
+ #endif
+ #define ICSR0_FRE (1 << 5) /* Framing error */
+ #define ICSR0_RFS (1 << 4) /* Receive FIFO service request */
+ #define ICSR0_TFS (1 << 3) /* Transnit FIFO service request */
+ #define ICSR0_RAB (1 << 2) /* Receiver abort */
+ #define ICSR0_TUR (1 << 1) /* Trunsmit FIFO underun */
+ #define ICSR0_EIF (1 << 0) /* End/Error in FIFO */
+
+ #define ICSR1_ROR (1 << 6) /* Receiver FIFO underrun */
+ #define ICSR1_CRE (1 << 5) /* CRC error */
+ #define ICSR1_EOF (1 << 4) /* End of frame */
+ #define ICSR1_TNF (1 << 3) /* Transmit FIFO not full */
+ #define ICSR1_RNE (1 << 2) /* Receive FIFO not empty */
+ #define ICSR1_TBY (1 << 1) /* Tramsmiter busy flag */
+ #define ICSR1_RSY (1 << 0) /* Recevier synchronized flag */
#define IrSR_RXPL_NEG_IS_ZERO (1<<4)
#define IrSR_RXPL_POS_IS_ZERO 0x0
}
lsr = STLSR;
}
- dev->last_rx = jiffies;
si->last_oscr = OSCR;
break;
si->stats.rx_bytes++;
async_unwrap_char(dev, &si->stats, &si->rx_buff, STRBR);
} while (STLSR & LSR_DR);
- dev->last_rx = jiffies;
si->last_oscr = OSCR;
break;
si->stats.rx_packets++;
si->stats.rx_bytes += len;
-
- dev->last_rx = jiffies;
}
}
#include <net/irda/irda_device.h>
#include <asm/irq.h>
- #include <asm/dma.h>
+ #include <mach/dma.h>
#include <mach/hardware.h>
#include <asm/mach/irda.h>
if (!dev)
return 0;
- si = dev->priv;
+ si = netdev_priv(dev);
if (si->open) {
/*
* Stop the transmit queue
if (!dev)
return 0;
- si = dev->priv;
+ si = netdev_priv(dev);
if (si->open) {
/*
* If we missed a speed change, initialise at the new speed
*/
static void sa1100_irda_hpsir_irq(struct net_device *dev)
{
- struct sa1100_irda *si = dev->priv;
+ struct sa1100_irda *si = netdev_priv(dev);
int status;
status = Ser2UTSR0;
Ser2UTDR);
} while (Ser2UTSR1 & UTSR1_RNE);
- dev->last_rx = jiffies;
}
if (status & UTSR0_TFS && si->tx_buff.len) {
sa1100_irda_rx_alloc(si);
netif_rx(skb);
- dev->last_rx = jiffies;
} else {
/*
* Remap the buffer.
*/
static void sa1100_irda_fir_irq(struct net_device *dev)
{
- struct sa1100_irda *si = dev->priv;
+ struct sa1100_irda *si = netdev_priv(dev);
/*
* Stop RX DMA
static irqreturn_t sa1100_irda_irq(int irq, void *dev_id)
{
struct net_device *dev = dev_id;
- if (IS_FIR(((struct sa1100_irda *)dev->priv)))
+ if (IS_FIR(((struct sa1100_irda *)netdev_priv(dev))))
sa1100_irda_fir_irq(dev);
else
sa1100_irda_hpsir_irq(dev);
static void sa1100_irda_txdma_irq(void *id)
{
struct net_device *dev = id;
- struct sa1100_irda *si = dev->priv;
+ struct sa1100_irda *si = netdev_priv(dev);
struct sk_buff *skb = si->txskb;
si->txskb = NULL;
static int sa1100_irda_hard_xmit(struct sk_buff *skb, struct net_device *dev)
{
- struct sa1100_irda *si = dev->priv;
+ struct sa1100_irda *si = netdev_priv(dev);
int speed = irda_get_next_speed(skb);
/*
sa1100_irda_ioctl(struct net_device *dev, struct ifreq *ifreq, int cmd)
{
struct if_irda_req *rq = (struct if_irda_req *)ifreq;
- struct sa1100_irda *si = dev->priv;
+ struct sa1100_irda *si = netdev_priv(dev);
int ret = -EOPNOTSUPP;
switch (cmd) {
static struct net_device_stats *sa1100_irda_stats(struct net_device *dev)
{
- struct sa1100_irda *si = dev->priv;
+ struct sa1100_irda *si = netdev_priv(dev);
return &si->stats;
}
static int sa1100_irda_start(struct net_device *dev)
{
- struct sa1100_irda *si = dev->priv;
+ struct sa1100_irda *si = netdev_priv(dev);
int err;
si->speed = 9600;
static int sa1100_irda_stop(struct net_device *dev)
{
- struct sa1100_irda *si = dev->priv;
+ struct sa1100_irda *si = netdev_priv(dev);
disable_irq(dev->irq);
sa1100_irda_shutdown(si);
if (!dev)
goto err_mem_4;
- si = dev->priv;
+ si = netdev_priv(dev);
si->dev = &pdev->dev;
si->pdata = pdev->dev.platform_data;
struct net_device *dev = platform_get_drvdata(pdev);
if (dev) {
- struct sa1100_irda *si = dev->priv;
+ struct sa1100_irda *si = netdev_priv(dev);
unregister_netdev(dev);
kfree(si->tx_buff.head);
kfree(si->rx_buff.head);
#define RPC_LSA_DEFAULT RPC_LED_100_10
#define RPC_LSB_DEFAULT RPC_LED_TX_RX
-# if defined (CONFIG_BFIN561_EZKIT)
#define SMC_CAN_USE_8BIT 0
#define SMC_CAN_USE_16BIT 1
+# if defined(CONFIG_BF561)
#define SMC_CAN_USE_32BIT 1
-#define SMC_IO_SHIFT 0
-#define SMC_NOWAIT 1
-#define SMC_USE_BFIN_DMA 0
-
-
-#define SMC_inw(a, r) readw((a) + (r))
-#define SMC_outw(v, a, r) writew(v, (a) + (r))
-#define SMC_inl(a, r) readl((a) + (r))
-#define SMC_outl(v, a, r) writel(v, (a) + (r))
-#define SMC_outsl(a, r, p, l) outsl((unsigned long *)((a) + (r)), p, l)
-#define SMC_insl(a, r, p, l) insl ((unsigned long *)((a) + (r)), p, l)
# else
-#define SMC_CAN_USE_8BIT 0
-#define SMC_CAN_USE_16BIT 1
#define SMC_CAN_USE_32BIT 0
+# endif
#define SMC_IO_SHIFT 0
#define SMC_NOWAIT 1
#define SMC_USE_BFIN_DMA 0
-
-#define SMC_inw(a, r) readw((a) + (r))
-#define SMC_outw(v, a, r) writew(v, (a) + (r))
-#define SMC_outsw(a, r, p, l) outsw((unsigned long *)((a) + (r)), p, l)
-#define SMC_insw(a, r, p, l) insw ((unsigned long *)((a) + (r)), p, l)
+#define SMC_inw(a, r) readw((a) + (r))
+#define SMC_outw(v, a, r) writew(v, (a) + (r))
+#define SMC_insw(a, r, p, l) readsw((a) + (r), p, l)
+#define SMC_outsw(a, r, p, l) writesw((a) + (r), p, l)
+# if SMC_CAN_USE_32BIT
+#define SMC_inl(a, r) readl((a) + (r))
+#define SMC_outl(v, a, r) writel(v, (a) + (r))
+#define SMC_insl(a, r, p, l) readsl((a) + (r), p, l)
+#define SMC_outsl(a, r, p, l) writesl((a) + (r), p, l)
# endif
-/* check if the mac in reg is valid */
-#define SMC_GET_MAC_ADDR(lp, addr) \
- do { \
- unsigned int __v; \
- __v = SMC_inw(ioaddr, ADDR0_REG(lp)); \
- addr[0] = __v; addr[1] = __v >> 8; \
- __v = SMC_inw(ioaddr, ADDR1_REG(lp)); \
- addr[2] = __v; addr[3] = __v >> 8; \
- __v = SMC_inw(ioaddr, ADDR2_REG(lp)); \
- addr[4] = __v; addr[5] = __v >> 8; \
- if (*(u32 *)(&addr[0]) == 0xFFFFFFFF) { \
- random_ether_addr(addr); \
- } \
- } while (0)
+
#elif defined(CONFIG_REDWOOD_5) || defined(CONFIG_REDWOOD_6)
/* We can only do 16-bit reads and writes in the static memory space. */
#define SMC_IRQ_FLAGS (0)
-#elif defined(CONFIG_ISA)
-
-#define SMC_CAN_USE_8BIT 1
-#define SMC_CAN_USE_16BIT 1
-#define SMC_CAN_USE_32BIT 0
-
-#define SMC_inb(a, r) inb((a) + (r))
-#define SMC_inw(a, r) inw((a) + (r))
-#define SMC_outb(v, a, r) outb(v, (a) + (r))
-#define SMC_outw(v, a, r) outw(v, (a) + (r))
-#define SMC_insw(a, r, p, l) insw((a) + (r), p, l)
-#define SMC_outsw(a, r, p, l) outsw((a) + (r), p, l)
-
#elif defined(CONFIG_M32R)
#define SMC_CAN_USE_8BIT 0
* as RX which can overrun memory and lose packets.
*/
#include <linux/dma-mapping.h>
- #include <asm/dma.h>
+ #include <mach/dma.h>
+ #include <mach/hardware.h>
#include <mach/pxa-regs.h>
#ifdef SMC_insl
config FB_ACORN
bool "Acorn VIDC support"
- depends on (FB = y) && ARM && (ARCH_ACORN || ARCH_CLPS7500)
+ depends on (FB = y) && ARM && ARCH_ACORN
select FB_CFB_FILLRECT
select FB_CFB_COPYAREA
select FB_CFB_IMAGEBLIT
If unsure, say N.
+ config FB_PXA_OVERLAY
+ bool "Support PXA27x/PXA3xx Overlay(s) as framebuffer"
+ default n
+ depends on FB_PXA && (PXA27x || PXA3xx)
+
config FB_PXA_SMARTPANEL
bool "PXA Smartpanel LCD support"
default n
config FB_SH_MOBILE_LCDC
tristate "SuperH Mobile LCDC framebuffer support"
depends on FB && SUPERH
- select FB_CFB_FILLRECT
- select FB_CFB_COPYAREA
- select FB_CFB_IMAGEBLIT
- default m
+ select FB_SYS_FILLRECT
+ select FB_SYS_COPYAREA
+ select FB_SYS_IMAGEBLIT
+ select FB_SYS_FOPS
+ select FB_DEFERRED_IO
---help---
Frame buffer driver for the on-chip SH-Mobile LCD controller.
depends on FB && MIPS_COBALT
config FB_SH7760
- bool "SH7760/SH7763 LCDC support"
- depends on FB && (CPU_SUBTYPE_SH7760 || CPU_SUBTYPE_SH7763)
- select FB_CFB_FILLRECT
- select FB_CFB_COPYAREA
- select FB_CFB_IMAGEBLIT
- help
- Support for the SH7760/SH7763 integrated (D)STN/TFT LCD Controller.
- Supports display resolutions up to 1024x1024 pixel, grayscale and
- color operation, with depths ranging from 1 bpp to 8 bpp monochrome
- and 8, 15 or 16 bpp color; 90 degrees clockwise display rotation for
- panels <= 320 pixel horizontal resolution.
+ bool "SH7760/SH7763/SH7720/SH7721 LCDC support"
+ depends on FB && (CPU_SUBTYPE_SH7760 || CPU_SUBTYPE_SH7763 \
+ || CPU_SUBTYPE_SH7720 || CPU_SUBTYPE_SH7721)
+ select FB_CFB_FILLRECT
+ select FB_CFB_COPYAREA
+ select FB_CFB_IMAGEBLIT
+ ---help---
+ Support for the SH7760/SH7763/SH7720/SH7721 integrated
+ (D)STN/TFT LCD Controller.
+ Supports display resolutions up to 1024x1024 pixel, grayscale and
+ color operation, with depths ranging from 1 bpp to 8 bpp monochrome
+ and 8, 15 or 16 bpp color; 90 degrees clockwise display rotation for
+ panels <= 320 pixel horizontal resolution.
config FB_VIRTUAL
tristate "Virtual Frame Buffer support (ONLY FOR TESTING!)"
#include <mach/hardware.h>
#include <mach/pxa-regs.h>
+ #include <mach/regs-ac97.h>
#include "pxa2xx-pcm.h"
#include "pxa2xx-ac97.h"
};
#ifdef CONFIG_PM
-static int pxa2xx_ac97_suspend(struct platform_device *pdev,
- struct snd_soc_dai *dai)
+static int pxa2xx_ac97_suspend(struct snd_soc_dai *dai)
{
return pxa2xx_ac97_hw_suspend();
}
-static int pxa2xx_ac97_resume(struct platform_device *pdev,
- struct snd_soc_dai *dai)
+static int pxa2xx_ac97_resume(struct snd_soc_dai *dai)
{
return pxa2xx_ac97_hw_resume();
}
}
static int pxa2xx_ac97_hw_params(struct snd_pcm_substream *substream,
- struct snd_pcm_hw_params *params)
+ struct snd_pcm_hw_params *params,
+ struct snd_soc_dai *dai)
{
struct snd_soc_pcm_runtime *rtd = substream->private_data;
struct snd_soc_dai *cpu_dai = rtd->dai->cpu_dai;
}
static int pxa2xx_ac97_hw_aux_params(struct snd_pcm_substream *substream,
- struct snd_pcm_hw_params *params)
+ struct snd_pcm_hw_params *params,
+ struct snd_soc_dai *dai)
{
struct snd_soc_pcm_runtime *rtd = substream->private_data;
struct snd_soc_dai *cpu_dai = rtd->dai->cpu_dai;
}
static int pxa2xx_ac97_hw_mic_params(struct snd_pcm_substream *substream,
- struct snd_pcm_hw_params *params)
+ struct snd_pcm_hw_params *params,
+ struct snd_soc_dai *dai)
{
struct snd_soc_pcm_runtime *rtd = substream->private_data;
struct snd_soc_dai *cpu_dai = rtd->dai->cpu_dai;
{
.name = "pxa2xx-ac97",
.id = 0,
- .type = SND_SOC_DAI_AC97,
+ .ac97_control = 1,
.probe = pxa2xx_ac97_probe,
.remove = pxa2xx_ac97_remove,
.suspend = pxa2xx_ac97_suspend,
{
.name = "pxa2xx-ac97-aux",
.id = 1,
- .type = SND_SOC_DAI_AC97,
+ .ac97_control = 1,
.playback = {
.stream_name = "AC97 Aux Playback",
.channels_min = 1,
{
.name = "pxa2xx-ac97-mic",
.id = 2,
- .type = SND_SOC_DAI_AC97,
+ .ac97_control = 1,
.capture = {
.stream_name = "AC97 Mic Capture",
.channels_min = 1,
EXPORT_SYMBOL_GPL(pxa_ac97_dai);
EXPORT_SYMBOL_GPL(soc_ac97_ops);
+static int __init pxa_ac97_init(void)
+{
+ return snd_soc_register_dais(pxa_ac97_dai, ARRAY_SIZE(pxa_ac97_dai));
+}
+module_init(pxa_ac97_init);
+
+static void __exit pxa_ac97_exit(void)
+{
+ snd_soc_unregister_dais(pxa_ac97_dai, ARRAY_SIZE(pxa_ac97_dai));
+}
+module_exit(pxa_ac97_exit);
+
MODULE_AUTHOR("Nicolas Pitre");
MODULE_DESCRIPTION("AC97 driver for the Intel PXA2xx chip");
MODULE_LICENSE("GPL");
#include <sound/soc.h>
#include <mach/hardware.h>
- #include <asm/plat-s3c/regs-ac97.h>
+ #include <plat/regs-ac97.h>
#include <mach/regs-gpio.h>
#include <mach/regs-clock.h>
#include <mach/audio.h>
}
static int s3c2443_ac97_hw_params(struct snd_pcm_substream *substream,
- struct snd_pcm_hw_params *params)
+ struct snd_pcm_hw_params *params,
+ struct snd_soc_dai *dai)
{
struct snd_soc_pcm_runtime *rtd = substream->private_data;
struct snd_soc_dai *cpu_dai = rtd->dai->cpu_dai;
return 0;
}
-static int s3c2443_ac97_trigger(struct snd_pcm_substream *substream, int cmd)
+static int s3c2443_ac97_trigger(struct snd_pcm_substream *substream, int cmd,
+ struct snd_soc_dai *dai)
{
u32 ac_glbctrl;
}
static int s3c2443_ac97_hw_mic_params(struct snd_pcm_substream *substream,
- struct snd_pcm_hw_params *params)
+ struct snd_pcm_hw_params *params,
+ struct snd_soc_dai *dai)
{
struct snd_soc_pcm_runtime *rtd = substream->private_data;
struct snd_soc_dai *cpu_dai = rtd->dai->cpu_dai;
}
static int s3c2443_ac97_mic_trigger(struct snd_pcm_substream *substream,
- int cmd)
+ int cmd, struct snd_soc_dai *dai)
{
u32 ac_glbctrl;
{
.name = "s3c2443-ac97",
.id = 0,
- .type = SND_SOC_DAI_AC97,
+ .ac97_control = 1,
.probe = s3c2443_ac97_probe,
.remove = s3c2443_ac97_remove,
.playback = {
{
.name = "pxa2xx-ac97-mic",
.id = 1,
- .type = SND_SOC_DAI_AC97,
+ .ac97_control = 1,
.capture = {
.stream_name = "AC97 Mic Capture",
.channels_min = 1,
EXPORT_SYMBOL_GPL(s3c2443_ac97_dai);
EXPORT_SYMBOL_GPL(soc_ac97_ops);
+static int __init s3c2443_ac97_init(void)
+{
+ return snd_soc_register_dais(s3c2443_ac97_dai,
+ ARRAY_SIZE(s3c2443_ac97_dai));
+}
+module_init(s3c2443_ac97_init);
+
+static void __exit s3c2443_ac97_exit(void)
+{
+ snd_soc_unregister_dais(s3c2443_ac97_dai,
+ ARRAY_SIZE(s3c2443_ac97_dai));
+}
+module_exit(s3c2443_ac97_exit);
+
+
MODULE_AUTHOR("Graeme Gregory");
MODULE_DESCRIPTION("AC97 driver for the Samsung s3c2443 chip");
MODULE_LICENSE("GPL");