Merge branch 'for-rmk-fixes' of git://aeryn.fluff.org.uk/bjdooks/linux

diff --combined arch/arm/mach-s3c2443/clock.c
index 2f60bf6b8d4395e49bc49fcc3dfc072386c17656,803e24cd29c4758269220552be21fb56f6b1ac5f..f854e7385e3c75c44ea10f4917c42a92da338f2c
--- 1/arch/arm/mach-s3c2443/clock.c
--- 2/arch/arm/mach-s3c2443/clock.c
+++ b/arch/arm/mach-s3c2443/clock.c
@@@ -39,9 -39,9 +39,9 @@@
  
  #include <mach/regs-s3c2443-clock.h>
  
 -#include <asm/plat-s3c24xx/s3c2443.h>
 -#include <asm/plat-s3c24xx/clock.h>
 -#include <asm/plat-s3c24xx/cpu.h>
 +#include <plat/s3c2443.h>
 +#include <plat/clock.h>
 +#include <plat/cpu.h>
  
  /* We currently have to assume that the system is running
   * from the XTPll input, and that all ***REFCLKs are being
@@@ -1033,8 -1033,7 +1033,7 @@@ void __init s3c2443_init_clocks(int xta
  
        fclk = pll / s3c2443_fclk_div(clkdiv0);
        hclk = s3c2443_prediv_getrate(&clk_prediv);
-       hclk = hclk / s3c2443_get_hdiv(clkdiv0);
-       hclk = hclk / ((clkdiv0 & S3C2443_CLKDIV0_HALF_HCLK) ? 2 : 1);
+       hclk /= s3c2443_get_hdiv(clkdiv0);
        pclk = hclk / ((clkdiv0 & S3C2443_CLKDIV0_HALF_PCLK) ? 2 : 1);
  
        s3c24xx_setup_clocks(xtal, fclk, hclk, pclk);

diff --combined arch/arm/plat-s3c24xx/pwm-clock.c
index b8e854f1b1d50dbc4f7524b2b9843ed614f51a4b,d41cccd6a25f9a8b07a0e4e9f6e4095ec9295973..3fad68a1e6bc2613308e71121a3ca88c48e52562
--- 1/arch/arm/plat-s3c24xx/pwm-clock.c
--- 2/arch/arm/plat-s3c24xx/pwm-clock.c
+++ b/arch/arm/plat-s3c24xx/pwm-clock.c
@@@ -24,10 -24,10 +24,10 @@@
  #include <mach/regs-clock.h>
  #include <mach/regs-gpio.h>
  
 -#include <asm/plat-s3c24xx/clock.h>
 -#include <asm/plat-s3c24xx/cpu.h>
 +#include <plat/clock.h>
 +#include <plat/cpu.h>
  
 -#include <asm/plat-s3c/regs-timer.h>
 +#include <plat/regs-timer.h>
  
  /* Each of the timers 0 through 5 go through the following
   * clock tree, with the inputs depending on the timers.
@@@ -315,7 -315,7 +315,7 @@@ static int clk_pwm_tin_set_parent(struc
        if (parent == s3c24xx_pwmclk_tclk(id))
                bits = S3C2410_TCFG1_MUX_TCLK << shift;
        else if (parent == s3c24xx_pwmclk_tdiv(id))
-               bits = clk_pwm_tdiv_bits(to_tdiv(clk)) << shift;
+               bits = clk_pwm_tdiv_bits(to_tdiv(parent)) << shift;
        else
                return -EINVAL;
  

diff --combined arch/arm/plat-s3c24xx/pwm.c
index feb770f2e84e1a470bcd3cc1b4e57686e10f0171,cbc06067d9ce7b5af896ef923135fc50a1cd90da..ec56b88866c43d597b885290c7e3507c3cff9982
--- 1/arch/arm/plat-s3c24xx/pwm.c
--- 2/arch/arm/plat-s3c24xx/pwm.c
+++ b/arch/arm/plat-s3c24xx/pwm.c
@@@ -19,8 -19,8 +19,8 @@@
  #include <linux/io.h>
  #include <linux/pwm.h>
  
 -#include <asm/plat-s3c24xx/devs.h>
 -#include <asm/plat-s3c/regs-timer.h>
 +#include <plat/devs.h>
 +#include <plat/regs-timer.h>
  
  struct pwm_device {
        struct list_head         list;
@@@ -56,7 -56,7 +56,7 @@@ static struct clk *clk_scaler[2]
                }                                       \
        }
  
- #define DEFINE_TIMER(_tmr_no, _irq)                   \
+ #define DEFINE_S3C_TIMER(_tmr_no, _irq)                       \
        .name           = "s3c24xx-pwm",                \
        .id             = _tmr_no,                      \
        .num_resources  = TIMER_RESOURCE_SIZE,          \
@@@ -67,11 -67,11 +67,11 @@@
   */
  
  struct platform_device s3c_device_timer[] = {
-       [0] = { DEFINE_TIMER(0, IRQ_TIMER0) },
-       [1] = { DEFINE_TIMER(1, IRQ_TIMER1) },
-       [2] = { DEFINE_TIMER(2, IRQ_TIMER2) },
-       [3] = { DEFINE_TIMER(3, IRQ_TIMER3) },
-       [4] = { DEFINE_TIMER(4, IRQ_TIMER4) },
+       [0] = { DEFINE_S3C_TIMER(0, IRQ_TIMER0) },
+       [1] = { DEFINE_S3C_TIMER(1, IRQ_TIMER1) },
+       [2] = { DEFINE_S3C_TIMER(2, IRQ_TIMER2) },
+       [3] = { DEFINE_S3C_TIMER(3, IRQ_TIMER3) },
+       [4] = { DEFINE_S3C_TIMER(4, IRQ_TIMER4) },
  };
  
  static inline int pwm_is_tdiv(struct pwm_device *pwm)