--- /dev/null
+I/O Barriers
+============
+Tejun Heo <htejun@gmail.com>, July 22 2005
+
+I/O barrier requests are used to guarantee ordering around the barrier
+requests. Unless you're crazy enough to use disk drives for
+implementing synchronization constructs (wow, sounds interesting...),
+the ordering is meaningful only for write requests for things like
+journal checkpoints. All requests queued before a barrier request
+must be finished (made it to the physical medium) before the barrier
+request is started, and all requests queued after the barrier request
+must be started only after the barrier request is finished (again,
+made it to the physical medium).
+
+In other words, I/O barrier requests have the following two properties.
+
+1. Request ordering
+
+Requests cannot pass the barrier request. Preceding requests are
+processed before the barrier and following requests after.
+
+Depending on what features a drive supports, this can be done in one
+of the following three ways.
+
+i. For devices which have queue depth greater than 1 (TCQ devices) and
+support ordered tags, block layer can just issue the barrier as an
+ordered request and the lower level driver, controller and drive
+itself are responsible for making sure that the ordering contraint is
+met. Most modern SCSI controllers/drives should support this.
+
+NOTE: SCSI ordered tag isn't currently used due to limitation in the
+ SCSI midlayer, see the following random notes section.
+
+ii. For devices which have queue depth greater than 1 but don't
+support ordered tags, block layer ensures that the requests preceding
+a barrier request finishes before issuing the barrier request. Also,
+it defers requests following the barrier until the barrier request is
+finished. Older SCSI controllers/drives and SATA drives fall in this
+category.
+
+iii. Devices which have queue depth of 1. This is a degenerate case
+of ii. Just keeping issue order suffices. Ancient SCSI
+controllers/drives and IDE drives are in this category.
+
+2. Forced flushing to physcial medium
+
+Again, if you're not gonna do synchronization with disk drives (dang,
+it sounds even more appealing now!), the reason you use I/O barriers
+is mainly to protect filesystem integrity when power failure or some
+other events abruptly stop the drive from operating and possibly make
+the drive lose data in its cache. So, I/O barriers need to guarantee
+that requests actually get written to non-volatile medium in order.
+
+There are four cases,
+
+i. No write-back cache. Keeping requests ordered is enough.
+
+ii. Write-back cache but no flush operation. There's no way to
+gurantee physical-medium commit order. This kind of devices can't to
+I/O barriers.
+
+iii. Write-back cache and flush operation but no FUA (forced unit
+access). We need two cache flushes - before and after the barrier
+request.
+
+iv. Write-back cache, flush operation and FUA. We still need one
+flush to make sure requests preceding a barrier are written to medium,
+but post-barrier flush can be avoided by using FUA write on the
+barrier itself.
+
+
+How to support barrier requests in drivers
+------------------------------------------
+
+All barrier handling is done inside block layer proper. All low level
+drivers have to are implementing its prepare_flush_fn and using one
+the following two functions to indicate what barrier type it supports
+and how to prepare flush requests. Note that the term 'ordered' is
+used to indicate the whole sequence of performing barrier requests
+including draining and flushing.
+
+typedef void (prepare_flush_fn)(request_queue_t *q, struct request *rq);
+
+int blk_queue_ordered(request_queue_t *q, unsigned ordered,
+ prepare_flush_fn *prepare_flush_fn,
+ unsigned gfp_mask);
+
+int blk_queue_ordered_locked(request_queue_t *q, unsigned ordered,
+ prepare_flush_fn *prepare_flush_fn,
+ unsigned gfp_mask);
+
+The only difference between the two functions is whether or not the
+caller is holding q->queue_lock on entry. The latter expects the
+caller is holding the lock.
+
+@q : the queue in question
+@ordered : the ordered mode the driver/device supports
+@prepare_flush_fn : this function should prepare @rq such that it
+ flushes cache to physical medium when executed
+@gfp_mask : gfp_mask used when allocating data structures
+ for ordered processing
+
+For example, SCSI disk driver's prepare_flush_fn looks like the
+following.
+
+static void sd_prepare_flush(request_queue_t *q, struct request *rq)
+{
+ memset(rq->cmd, 0, sizeof(rq->cmd));
+ rq->flags |= REQ_BLOCK_PC;
+ rq->timeout = SD_TIMEOUT;
+ rq->cmd[0] = SYNCHRONIZE_CACHE;
+}
+
+The following seven ordered modes are supported. The following table
+shows which mode should be used depending on what features a
+device/driver supports. In the leftmost column of table,
+QUEUE_ORDERED_ prefix is omitted from the mode names to save space.
+
+The table is followed by description of each mode. Note that in the
+descriptions of QUEUE_ORDERED_DRAIN*, '=>' is used whereas '->' is
+used for QUEUE_ORDERED_TAG* descriptions. '=>' indicates that the
+preceding step must be complete before proceeding to the next step.
+'->' indicates that the next step can start as soon as the previous
+step is issued.
+
+ write-back cache ordered tag flush FUA
+-----------------------------------------------------------------------
+NONE yes/no N/A no N/A
+DRAIN no no N/A N/A
+DRAIN_FLUSH yes no yes no
+DRAIN_FUA yes no yes yes
+TAG no yes N/A N/A
+TAG_FLUSH yes yes yes no
+TAG_FUA yes yes yes yes
+
+
+QUEUE_ORDERED_NONE
+ I/O barriers are not needed and/or supported.
+
+ Sequence: N/A
+
+QUEUE_ORDERED_DRAIN
+ Requests are ordered by draining the request queue and cache
+ flushing isn't needed.
+
+ Sequence: drain => barrier
+
+QUEUE_ORDERED_DRAIN_FLUSH
+ Requests are ordered by draining the request queue and both
+ pre-barrier and post-barrier cache flushings are needed.
+
+ Sequence: drain => preflush => barrier => postflush
+
+QUEUE_ORDERED_DRAIN_FUA
+ Requests are ordered by draining the request queue and
+ pre-barrier cache flushing is needed. By using FUA on barrier
+ request, post-barrier flushing can be skipped.
+
+ Sequence: drain => preflush => barrier
+
+QUEUE_ORDERED_TAG
+ Requests are ordered by ordered tag and cache flushing isn't
+ needed.
+
+ Sequence: barrier
+
+QUEUE_ORDERED_TAG_FLUSH
+ Requests are ordered by ordered tag and both pre-barrier and
+ post-barrier cache flushings are needed.
+
+ Sequence: preflush -> barrier -> postflush
+
+QUEUE_ORDERED_TAG_FUA
+ Requests are ordered by ordered tag and pre-barrier cache
+ flushing is needed. By using FUA on barrier request,
+ post-barrier flushing can be skipped.
+
+ Sequence: preflush -> barrier
+
+
+Random notes/caveats
+--------------------
+
+* SCSI layer currently can't use TAG ordering even if the drive,
+controller and driver support it. The problem is that SCSI midlayer
+request dispatch function is not atomic. It releases queue lock and
+switch to SCSI host lock during issue and it's possible and likely to
+happen in time that requests change their relative positions. Once
+this problem is solved, TAG ordering can be enabled.
+
+* Currently, no matter which ordered mode is used, there can be only
+one barrier request in progress. All I/O barriers are held off by
+block layer until the previous I/O barrier is complete. This doesn't
+make any difference for DRAIN ordered devices, but, for TAG ordered
+devices with very high command latency, passing multiple I/O barriers
+to low level *might* be helpful if they are very frequent. Well, this
+certainly is a non-issue. I'm writing this just to make clear that no
+two I/O barrier is ever passed to low-level driver.
+
+* Completion order. Requests in ordered sequence are issued in order
+but not required to finish in order. Barrier implementation can
+handle out-of-order completion of ordered sequence. IOW, the requests
+MUST be processed in order but the hardware/software completion paths
+are allowed to reorder completion notifications - eg. current SCSI
+midlayer doesn't preserve completion order during error handling.
+
+* Requeueing order. Low-level drivers are free to requeue any request
+after they removed it from the request queue with
+blkdev_dequeue_request(). As barrier sequence should be kept in order
+when requeued, generic elevator code takes care of putting requests in
+order around barrier. See blk_ordered_req_seq() and
+ELEVATOR_INSERT_REQUEUE handling in __elv_add_request() for details.
+
+Note that block drivers must not requeue preceding requests while
+completing latter requests in an ordered sequence. Currently, no
+error checking is done against this.
+
+* Error handling. Currently, block layer will report error to upper
+layer if any of requests in an ordered sequence fails. Unfortunately,
+this doesn't seem to be enough. Look at the following request flow.
+QUEUE_ORDERED_TAG_FLUSH is in use.
+
+ [0] [1] [2] [3] [pre] [barrier] [post] < [4] [5] [6] ... >
+ still in elevator
+
+Let's say request [2], [3] are write requests to update file system
+metadata (journal or whatever) and [barrier] is used to mark that
+those updates are valid. Consider the following sequence.
+
+ i. Requests [0] ~ [post] leaves the request queue and enters
+ low-level driver.
+ ii. After a while, unfortunately, something goes wrong and the
+ drive fails [2]. Note that any of [0], [1] and [3] could have
+ completed by this time, but [pre] couldn't have been finished
+ as the drive must process it in order and it failed before
+ processing that command.
+ iii. Error handling kicks in and determines that the error is
+ unrecoverable and fails [2], and resumes operation.
+ iv. [pre] [barrier] [post] gets processed.
+ v. *BOOM* power fails
+
+The problem here is that the barrier request is *supposed* to indicate
+that filesystem update requests [2] and [3] made it safely to the
+physical medium and, if the machine crashes after the barrier is
+written, filesystem recovery code can depend on that. Sadly, that
+isn't true in this case anymore. IOW, the success of a I/O barrier
+should also be dependent on success of some of the preceding requests,
+where only upper layer (filesystem) knows what 'some' is.
+
+This can be solved by implementing a way to tell the block layer which
+requests affect the success of the following barrier request and
+making lower lever drivers to resume operation on error only after
+block layer tells it to do so.
+
+As the probability of this happening is very low and the drive should
+be faulty, implementing the fix is probably an overkill. But, still,
+it's there.
+
+* In previous drafts of barrier implementation, there was fallback
+mechanism such that, if FUA or ordered TAG fails, less fancy ordered
+mode can be selected and the failed barrier request is retried
+automatically. The rationale for this feature was that as FUA is
+pretty new in ATA world and ordered tag was never used widely, there
+could be devices which report to support those features but choke when
+actually given such requests.
+
+ This was removed for two reasons 1. it's an overkill 2. it's
+impossible to implement properly when TAG ordering is used as low
+level drivers resume after an error automatically. If it's ever
+needed adding it back and modifying low level drivers accordingly
+shouldn't be difficult.
--- /dev/null
+
+
+EDAC - Error Detection And Correction
+
+Written by Doug Thompson <norsk5@xmission.com>
+7 Dec 2005
+
+
+EDAC was written by:
+ Thayne Harbaugh,
+ modified by Dave Peterson, Doug Thompson, et al,
+ from the bluesmoke.sourceforge.net project.
+
+
+============================================================================
+EDAC PURPOSE
+
+The 'edac' kernel module goal is to detect and report errors that occur
+within the computer system. In the initial release, memory Correctable Errors
+(CE) and Uncorrectable Errors (UE) are the primary errors being harvested.
+
+Detecting CE events, then harvesting those events and reporting them,
+CAN be a predictor of future UE events. With CE events, the system can
+continue to operate, but with less safety. Preventive maintainence and
+proactive part replacement of memory DIMMs exhibiting CEs can reduce
+the likelihood of the dreaded UE events and system 'panics'.
+
+
+In addition, PCI Bus Parity and SERR Errors are scanned for on PCI devices
+in order to determine if errors are occurring on data transfers.
+The presence of PCI Parity errors must be examined with a grain of salt.
+There are several addin adapters that do NOT follow the PCI specification
+with regards to Parity generation and reporting. The specification says
+the vendor should tie the parity status bits to 0 if they do not intend
+to generate parity. Some vendors do not do this, and thus the parity bit
+can "float" giving false positives.
+
+The PCI Parity EDAC device has the ability to "skip" known flakey
+cards during the parity scan. These are set by the parity "blacklist"
+interface in the sysfs for PCI Parity. (See the PCI section in the sysfs
+section below.) There is also a parity "whitelist" which is used as
+an explicit list of devices to scan, while the blacklist is a list
+of devices to skip.
+
+EDAC will have future error detectors that will be added or integrated
+into EDAC in the following list:
+
+ MCE Machine Check Exception
+ MCA Machine Check Architecture
+ NMI NMI notification of ECC errors
+ MSRs Machine Specific Register error cases
+ and other mechanisms.
+
+These errors are usually bus errors, ECC errors, thermal throttling
+and the like.
+
+
+============================================================================
+EDAC VERSIONING
+
+EDAC is composed of a "core" module (edac_mc.ko) and several Memory
+Controller (MC) driver modules. On a given system, the CORE
+is loaded and one MC driver will be loaded. Both the CORE and
+the MC driver have individual versions that reflect current release
+level of their respective modules. Thus, to "report" on what version
+a system is running, one must report both the CORE's and the
+MC driver's versions.
+
+
+LOADING
+
+If 'edac' was statically linked with the kernel then no loading is
+necessary. If 'edac' was built as modules then simply modprobe the
+'edac' pieces that you need. You should be able to modprobe
+hardware-specific modules and have the dependencies load the necessary core
+modules.
+
+Example:
+
+$> modprobe amd76x_edac
+
+loads both the amd76x_edac.ko memory controller module and the edac_mc.ko
+core module.
+
+
+============================================================================
+EDAC sysfs INTERFACE
+
+EDAC presents a 'sysfs' interface for control, reporting and attribute
+reporting purposes.
+
+EDAC lives in the /sys/devices/system/edac directory. Within this directory
+there currently reside 2 'edac' components:
+
+ mc memory controller(s) system
+ pci PCI status system
+
+
+============================================================================
+Memory Controller (mc) Model
+
+First a background on the memory controller's model abstracted in EDAC.
+Each mc device controls a set of DIMM memory modules. These modules are
+layed out in a Chip-Select Row (csrowX) and Channel table (chX). There can
+be multiple csrows and two channels.
+
+Memory controllers allow for several csrows, with 8 csrows being a typical value.
+Yet, the actual number of csrows depends on the electrical "loading"
+of a given motherboard, memory controller and DIMM characteristics.
+
+Dual channels allows for 128 bit data transfers to the CPU from memory.
+
+
+ Channel 0 Channel 1
+ ===================================
+ csrow0 | DIMM_A0 | DIMM_B0 |
+ csrow1 | DIMM_A0 | DIMM_B0 |
+ ===================================
+
+ ===================================
+ csrow2 | DIMM_A1 | DIMM_B1 |
+ csrow3 | DIMM_A1 | DIMM_B1 |
+ ===================================
+
+In the above example table there are 4 physical slots on the motherboard
+for memory DIMMs:
+
+ DIMM_A0
+ DIMM_B0
+ DIMM_A1
+ DIMM_B1
+
+Labels for these slots are usually silk screened on the motherboard. Slots
+labeled 'A' are channel 0 in this example. Slots labled 'B'
+are channel 1. Notice that there are two csrows possible on a
+physical DIMM. These csrows are allocated their csrow assignment
+based on the slot into which the memory DIMM is placed. Thus, when 1 DIMM
+is placed in each Channel, the csrows cross both DIMMs.
+
+Memory DIMMs come single or dual "ranked". A rank is a populated csrow.
+Thus, 2 single ranked DIMMs, placed in slots DIMM_A0 and DIMM_B0 above
+will have 1 csrow, csrow0. csrow1 will be empty. On the other hand,
+when 2 dual ranked DIMMs are similiaryly placed, then both csrow0 and
+csrow1 will be populated. The pattern repeats itself for csrow2 and
+csrow3.
+
+The representation of the above is reflected in the directory tree
+in EDAC's sysfs interface. Starting in directory
+/sys/devices/system/edac/mc each memory controller will be represented
+by its own 'mcX' directory, where 'X" is the index of the MC.
+
+
+ ..../edac/mc/
+ |
+ |->mc0
+ |->mc1
+ |->mc2
+ ....
+
+Under each 'mcX' directory each 'csrowX' is again represented by a
+'csrowX', where 'X" is the csrow index:
+
+
+ .../mc/mc0/
+ |
+ |->csrow0
+ |->csrow2
+ |->csrow3
+ ....
+
+Notice that there is no csrow1, which indicates that csrow0 is
+composed of a single ranked DIMMs. This should also apply in both
+Channels, in order to have dual-channel mode be operational. Since
+both csrow2 and csrow3 are populated, this indicates a dual ranked
+set of DIMMs for channels 0 and 1.
+
+
+Within each of the 'mc','mcX' and 'csrowX' directories are several
+EDAC control and attribute files.
+
+
+============================================================================
+DIRECTORY 'mc'
+
+In directory 'mc' are EDAC system overall control and attribute files:
+
+
+Panic on UE control file:
+
+ 'panic_on_ue'
+
+ An uncorrectable error will cause a machine panic. This is usually
+ desirable. It is a bad idea to continue when an uncorrectable error
+ occurs - it is indeterminate what was uncorrected and the operating
+ system context might be so mangled that continuing will lead to further
+ corruption. If the kernel has MCE configured, then EDAC will never
+ notice the UE.
+
+ LOAD TIME: module/kernel parameter: panic_on_ue=[0|1]
+
+ RUN TIME: echo "1" >/sys/devices/system/edac/mc/panic_on_ue
+
+
+Log UE control file:
+
+ 'log_ue'
+
+ Generate kernel messages describing uncorrectable errors. These errors
+ are reported through the system message log system. UE statistics
+ will be accumulated even when UE logging is disabled.
+
+ LOAD TIME: module/kernel parameter: log_ue=[0|1]
+
+ RUN TIME: echo "1" >/sys/devices/system/edac/mc/log_ue
+
+
+Log CE control file:
+
+ 'log_ce'
+
+ Generate kernel messages describing correctable errors. These
+ errors are reported through the system message log system.
+ CE statistics will be accumulated even when CE logging is disabled.
+
+ LOAD TIME: module/kernel parameter: log_ce=[0|1]
+
+ RUN TIME: echo "1" >/sys/devices/system/edac/mc/log_ce
+
+
+Polling period control file:
+
+ 'poll_msec'
+
+ The time period, in milliseconds, for polling for error information.
+ Too small a value wastes resources. Too large a value might delay
+ necessary handling of errors and might loose valuable information for
+ locating the error. 1000 milliseconds (once each second) is about
+ right for most uses.
+
+ LOAD TIME: module/kernel parameter: poll_msec=[0|1]
+
+ RUN TIME: echo "1000" >/sys/devices/system/edac/mc/poll_msec
+
+
+Module Version read-only attribute file:
+
+ 'mc_version'
+
+ The EDAC CORE modules's version and compile date are shown here to
+ indicate what EDAC is running.
+
+
+
+============================================================================
+'mcX' DIRECTORIES
+
+
+In 'mcX' directories are EDAC control and attribute files for
+this 'X" instance of the memory controllers:
+
+
+Counter reset control file:
+
+ 'reset_counters'
+
+ This write-only control file will zero all the statistical counters
+ for UE and CE errors. Zeroing the counters will also reset the timer
+ indicating how long since the last counter zero. This is useful
+ for computing errors/time. Since the counters are always reset at
+ driver initialization time, no module/kernel parameter is available.
+
+ RUN TIME: echo "anything" >/sys/devices/system/edac/mc/mc0/counter_reset
+
+ This resets the counters on memory controller 0
+
+
+Seconds since last counter reset control file:
+
+ 'seconds_since_reset'
+
+ This attribute file displays how many seconds have elapsed since the
+ last counter reset. This can be used with the error counters to
+ measure error rates.
+
+
+
+DIMM capability attribute file:
+
+ 'edac_capability'
+
+ The EDAC (Error Detection and Correction) capabilities/modes of
+ the memory controller hardware.
+
+
+DIMM Current Capability attribute file:
+
+ 'edac_current_capability'
+
+ The EDAC capabilities available with the hardware
+ configuration. This may not be the same as "EDAC capability"
+ if the correct memory is not used. If a memory controller is
+ capable of EDAC, but DIMMs without check bits are in use, then
+ Parity, SECDED, S4ECD4ED capabilities will not be available
+ even though the memory controller might be capable of those
+ modes with the proper memory loaded.
+
+
+Memory Type supported on this controller attribute file:
+
+ 'supported_mem_type'
+
+ This attribute file displays the memory type, usually
+ buffered and unbuffered DIMMs.
+
+
+Memory Controller name attribute file:
+
+ 'mc_name'
+
+ This attribute file displays the type of memory controller
+ that is being utilized.
+
+
+Memory Controller Module name attribute file:
+
+ 'module_name'
+
+ This attribute file displays the memory controller module name,
+ version and date built. The name of the memory controller
+ hardware - some drivers work with multiple controllers and
+ this field shows which hardware is present.
+
+
+Total memory managed by this memory controller attribute file:
+
+ 'size_mb'
+
+ This attribute file displays, in count of megabytes, of memory
+ that this instance of memory controller manages.
+
+
+Total Uncorrectable Errors count attribute file:
+
+ 'ue_count'
+
+ This attribute file displays the total count of uncorrectable
+ errors that have occurred on this memory controller. If panic_on_ue
+ is set this counter will not have a chance to increment,
+ since EDAC will panic the system.
+
+
+Total UE count that had no information attribute fileY:
+
+ 'ue_noinfo_count'
+
+ This attribute file displays the number of UEs that
+ have occurred have occurred with no informations as to which DIMM
+ slot is having errors.
+
+
+Total Correctable Errors count attribute file:
+
+ 'ce_count'
+
+ This attribute file displays the total count of correctable
+ errors that have occurred on this memory controller. This
+ count is very important to examine. CEs provide early
+ indications that a DIMM is beginning to fail. This count
+ field should be monitored for non-zero values and report
+ such information to the system administrator.
+
+
+Total Correctable Errors count attribute file:
+
+ 'ce_noinfo_count'
+
+ This attribute file displays the number of CEs that
+ have occurred wherewith no informations as to which DIMM slot
+ is having errors. Memory is handicapped, but operational,
+ yet no information is available to indicate which slot
+ the failing memory is in. This count field should be also
+ be monitored for non-zero values.
+
+Device Symlink:
+
+ 'device'
+
+ Symlink to the memory controller device
+
+
+
+============================================================================
+'csrowX' DIRECTORIES
+
+In the 'csrowX' directories are EDAC control and attribute files for
+this 'X" instance of csrow:
+
+
+Total Uncorrectable Errors count attribute file:
+
+ 'ue_count'
+
+ This attribute file displays the total count of uncorrectable
+ errors that have occurred on this csrow. If panic_on_ue is set
+ this counter will not have a chance to increment, since EDAC
+ will panic the system.
+
+
+Total Correctable Errors count attribute file:
+
+ 'ce_count'
+
+ This attribute file displays the total count of correctable
+ errors that have occurred on this csrow. This
+ count is very important to examine. CEs provide early
+ indications that a DIMM is beginning to fail. This count
+ field should be monitored for non-zero values and report
+ such information to the system administrator.
+
+
+Total memory managed by this csrow attribute file:
+
+ 'size_mb'
+
+ This attribute file displays, in count of megabytes, of memory
+ that this csrow contatins.
+
+
+Memory Type attribute file:
+
+ 'mem_type'
+
+ This attribute file will display what type of memory is currently
+ on this csrow. Normally, either buffered or unbuffered memory.
+
+
+EDAC Mode of operation attribute file:
+
+ 'edac_mode'
+
+ This attribute file will display what type of Error detection
+ and correction is being utilized.
+
+
+Device type attribute file:
+
+ 'dev_type'
+
+ This attribute file will display what type of DIMM device is
+ being utilized. Example: x4
+
+
+Channel 0 CE Count attribute file:
+
+ 'ch0_ce_count'
+
+ This attribute file will display the count of CEs on this
+ DIMM located in channel 0.
+
+
+Channel 0 UE Count attribute file:
+
+ 'ch0_ue_count'
+
+ This attribute file will display the count of UEs on this
+ DIMM located in channel 0.
+
+
+Channel 0 DIMM Label control file:
+
+ 'ch0_dimm_label'
+
+ This control file allows this DIMM to have a label assigned
+ to it. With this label in the module, when errors occur
+ the output can provide the DIMM label in the system log.
+ This becomes vital for panic events to isolate the
+ cause of the UE event.
+
+ DIMM Labels must be assigned after booting, with information
+ that correctly identifies the physical slot with its
+ silk screen label. This information is currently very
+ motherboard specific and determination of this information
+ must occur in userland at this time.
+
+
+Channel 1 CE Count attribute file:
+
+ 'ch1_ce_count'
+
+ This attribute file will display the count of CEs on this
+ DIMM located in channel 1.
+
+
+Channel 1 UE Count attribute file:
+
+ 'ch1_ue_count'
+
+ This attribute file will display the count of UEs on this
+ DIMM located in channel 0.
+
+
+Channel 1 DIMM Label control file:
+
+ 'ch1_dimm_label'
+
+ This control file allows this DIMM to have a label assigned
+ to it. With this label in the module, when errors occur
+ the output can provide the DIMM label in the system log.
+ This becomes vital for panic events to isolate the
+ cause of the UE event.
+
+ DIMM Labels must be assigned after booting, with information
+ that correctly identifies the physical slot with its
+ silk screen label. This information is currently very
+ motherboard specific and determination of this information
+ must occur in userland at this time.
+
+
+============================================================================
+SYSTEM LOGGING
+
+If logging for UEs and CEs are enabled then system logs will have
+error notices indicating errors that have been detected:
+
+MC0: CE page 0x283, offset 0xce0, grain 8, syndrome 0x6ec3, row 0,
+channel 1 "DIMM_B1": amd76x_edac
+
+MC0: CE page 0x1e5, offset 0xfb0, grain 8, syndrome 0xb741, row 0,
+channel 1 "DIMM_B1": amd76x_edac
+
+
+The structure of the message is:
+ the memory controller (MC0)
+ Error type (CE)
+ memory page (0x283)
+ offset in the page (0xce0)
+ the byte granularity (grain 8)
+ or resolution of the error
+ the error syndrome (0xb741)
+ memory row (row 0)
+ memory channel (channel 1)
+ DIMM label, if set prior (DIMM B1
+ and then an optional, driver-specific message that may
+ have additional information.
+
+Both UEs and CEs with no info will lack all but memory controller,
+error type, a notice of "no info" and then an optional,
+driver-specific error message.
+
+
+
+============================================================================
+PCI Bus Parity Detection
+
+
+On Header Type 00 devices the primary status is looked at
+for any parity error regardless of whether Parity is enabled on the
+device. (The spec indicates parity is generated in some cases).
+On Header Type 01 bridges, the secondary status register is also
+looked at to see if parity ocurred on the bus on the other side of
+the bridge.
+
+
+SYSFS CONFIGURATION
+
+Under /sys/devices/system/edac/pci are control and attribute files as follows:
+
+
+Enable/Disable PCI Parity checking control file:
+
+ 'check_pci_parity'
+
+
+ This control file enables or disables the PCI Bus Parity scanning
+ operation. Writing a 1 to this file enables the scanning. Writing
+ a 0 to this file disables the scanning.
+
+ Enable:
+ echo "1" >/sys/devices/system/edac/pci/check_pci_parity
+
+ Disable:
+ echo "0" >/sys/devices/system/edac/pci/check_pci_parity
+
+
+
+Panic on PCI PARITY Error:
+
+ 'panic_on_pci_parity'
+
+
+ This control files enables or disables panic'ing when a parity
+ error has been detected.
+
+
+ module/kernel parameter: panic_on_pci_parity=[0|1]
+
+ Enable:
+ echo "1" >/sys/devices/system/edac/pci/panic_on_pci_parity
+
+ Disable:
+ echo "0" >/sys/devices/system/edac/pci/panic_on_pci_parity
+
+
+Parity Count:
+
+ 'pci_parity_count'
+
+ This attribute file will display the number of parity errors that
+ have been detected.
+
+
+
+PCI Device Whitelist:
+
+ 'pci_parity_whitelist'
+
+ This control file allows for an explicit list of PCI devices to be
+ scanned for parity errors. Only devices found on this list will
+ be examined. The list is a line of hexadecimel VENDOR and DEVICE
+ ID tuples:
+
+ 1022:7450,1434:16a6
+
+ One or more can be inserted, seperated by a comma.
+
+ To write the above list doing the following as one command line:
+
+ echo "1022:7450,1434:16a6"
+ > /sys/devices/system/edac/pci/pci_parity_whitelist
+
+
+
+ To display what the whitelist is, simply 'cat' the same file.
+
+
+PCI Device Blacklist:
+
+ 'pci_parity_blacklist'
+
+ This control file allows for a list of PCI devices to be
+ skipped for scanning.
+ The list is a line of hexadecimel VENDOR and DEVICE ID tuples:
+
+ 1022:7450,1434:16a6
+
+ One or more can be inserted, seperated by a comma.
+
+ To write the above list doing the following as one command line:
+
+ echo "1022:7450,1434:16a6"
+ > /sys/devices/system/edac/pci/pci_parity_blacklist
+
+
+ To display what the whitelist current contatins,
+ simply 'cat' the same file.
+
+=======================================================================
+
+PCI Vendor and Devices IDs can be obtained with the lspci command. Using
+the -n option lspci will display the vendor and device IDs. The system
+adminstrator will have to determine which devices should be scanned or
+skipped.
+
+
+
+The two lists (white and black) are prioritized. blacklist is the lower
+priority and will NOT be utilized when a whitelist has been set.
+Turn OFF a whitelist by an empty echo command:
+
+ echo > /sys/devices/system/edac/pci/pci_parity_whitelist
+
+and any previous blacklist will be utililzed.
+
The default is infinite. Note that the size of read requests is
limited anyway to 32 pages (which is 128kbyte on i386).
+Sysfs
+~~~~~
+
+FUSE sets up the following hierarchy in sysfs:
+
+ /sys/fs/fuse/connections/N/
+
+where N is an increasing number allocated to each new connection.
+
+For each connection the following attributes are defined:
+
+ 'waiting'
+
+ The number of requests which are waiting to be transfered to
+ userspace or being processed by the filesystem daemon. If there is
+ no filesystem activity and 'waiting' is non-zero, then the
+ filesystem is hung or deadlocked.
+
+ 'abort'
+
+ Writing anything into this file will abort the filesystem
+ connection. This means that all waiting requests will be aborted an
+ error returned for all aborted and new requests.
+
+Only a privileged user may read or write these attributes.
+
+Aborting a filesystem connection
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+It is possible to get into certain situations where the filesystem is
+not responding. Reasons for this may be:
+
+ a) Broken userspace filesystem implementation
+
+ b) Network connection down
+
+ c) Accidental deadlock
+
+ d) Malicious deadlock
+
+(For more on c) and d) see later sections)
+
+In either of these cases it may be useful to abort the connection to
+the filesystem. There are several ways to do this:
+
+ - Kill the filesystem daemon. Works in case of a) and b)
+
+ - Kill the filesystem daemon and all users of the filesystem. Works
+ in all cases except some malicious deadlocks
+
+ - Use forced umount (umount -f). Works in all cases but only if
+ filesystem is still attached (it hasn't been lazy unmounted)
+
+ - Abort filesystem through the sysfs interface. Most powerful
+ method, always works.
+
How do non-privileged mounts work?
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
when the copy is taking place, and interruption is delayed until
this flag is unset.
+Scenario 3 - Tricky deadlock with asynchronous read
+---------------------------------------------------
+
+The same situation as above, except thread-1 will wait on page lock
+and hence it will be uninterruptible as well. The solution is to
+abort the connection with forced umount (if mount is attached) or
+through the abort attribute in sysfs.
--- /dev/null
+1 Release Date : Mon Jan 23 14:09:01 PST 2006 - Sumant Patro <Sumant.Patro@lsil.com>
+2 Current Version : 00.00.02.02
+3 Older Version : 00.00.02.01
+
+i. New template defined to represent each family of controllers (identified by processor used).
+ The template will have defintions that will be initialised to appropritae values for a specific family of controllers. The template definition has four function pointers. During driver initialisation the function pointers will be set based on the controller family type. This change is done to support new controllers that has different processors and thus different register set.
+
+ -Sumant Patro <Sumant.Patro@lsil.com>
+
+1 Release Date : Mon Dec 19 14:36:26 PST 2005 - Sumant Patro <Sumant.Patro@lsil.com>
+2 Current Version : 00.00.02.00-rc4
+3 Older Version : 00.00.02.01
+
+i. Code reorganized to remove code duplication in megasas_build_cmd.
+
+ "There's a lot of duplicate code megasas_build_cmd. Move that out of the different codepathes and merge the reminder of megasas_build_cmd into megasas_queue_command"
+
+ - Christoph Hellwig <hch@lst.de>
+
+ii. Defined MEGASAS_IOC_FIRMWARE32 for code paths that handles 32 bit applications in 64 bit systems.
+
+ "MEGASAS_IOC_FIRMWARE can't be redefined if CONFIG_COMPAT is set, we need to define a MEGASAS_IOC_FIRMWARE32 define so native binaries continue to work"
+
+ - Christoph Hellwig <hch@lst.de>
====================================================================
-= Adaptec Ultra320 Family Manager Set v1.3.11 =
+= Adaptec Ultra320 Family Manager Set =
= =
= README for =
= The Linux Operating System =
68-pin)
2. Version History
+ 3.0 (December 1st, 2005)
+ - Updated driver to use SCSI transport class infrastructure
+ - Upported sequencer and core fixes from adaptec released
+ version 2.0.15 of the driver.
+
1.3.11 (July 11, 2003)
- Fix several deadlock issues.
- Add 29320ALP and 39320B Id's.
supported)
- Support for the PCI-X standard up to 133MHz
- Support for the PCI v2.2 standard
- - Domain Validation
+ - Domain Validation
2.2. Operating System Support:
- Redhat Linux 7.2, 7.3, 8.0, Advanced Server 2.1
http://www.adaptec.com.
-5. Contacting Adaptec
+5. Adaptec Customer Support
A Technical Support Identification (TSID) Number is required for
Adaptec technical support.
- The 12-digit TSID can be found on the white barcode-type label
- included inside the box with your product. The TSID helps us
+ included inside the box with your product. The TSID helps us
provide more efficient service by accurately identifying your
product and support status.
+
Support Options
- Search the Adaptec Support Knowledgebase (ASK) at
http://ask.adaptec.com for articles, troubleshooting tips, and
- frequently asked questions for your product.
+ frequently asked questions about your product.
- For support via Email, submit your question to Adaptec's
- Technical Support Specialists at http://ask.adaptec.com.
+ Technical Support Specialists at http://ask.adaptec.com/.
North America
- - Visit our Web site at http://www.adaptec.com.
- - To speak with a Fibre Channel/RAID/External Storage Technical
- Support Specialist, call 1-321-207-2000,
- Hours: Monday-Friday, 3:00 A.M. to 5:00 P.M., PST.
- (Not open on holidays)
- - For Technical Support in all other technologies including
- SCSI, call 1-408-934-7274,
- Hours: Monday-Friday, 6:00 A.M. to 5:00 P.M., PST.
- (Not open on holidays)
- - For after hours support, call 1-800-416-8066 ($99/call,
- $149/call on holidays)
- - To order Adaptec products including software and cables, call
- 1-800-442-7274 or 1-408-957-7274. You can also visit our
- online store at http://www.adaptecstore.com
+ - Visit our Web site at http://www.adaptec.com/.
+ - For information about Adaptec's support options, call
+ 408-957-2550, 24 hours a day, 7 days a week.
+ - To speak with a Technical Support Specialist,
+ * For hardware products, call 408-934-7274,
+ Monday to Friday, 3:00 am to 5:00 pm, PDT.
+ * For RAID and Fibre Channel products, call 321-207-2000,
+ Monday to Friday, 3:00 am to 5:00 pm, PDT.
+ To expedite your service, have your computer with you.
+ - To order Adaptec products, including accessories and cables,
+ call 408-957-7274. To order cables online go to
+ http://www.adaptec.com/buy-cables/.
Europe
- - Visit our Web site at http://www.adaptec-europe.com.
- - English and French: To speak with a Technical Support
- Specialist, call one of the following numbers:
- - English: +32-2-352-3470
- - French: +32-2-352-3460
- Hours: Monday-Thursday, 10:00 to 12:30, 13:30 to 17:30 CET
- Friday, 10:00 to 12:30, 13:30 to 16:30 CET
- - German: To speak with a Technical Support Specialist,
- call +49-89-456-40660
- Hours: Monday-Thursday, 09:30 to 12:30, 13:30 to 16:30 CET
- Friday, 09:30 to 12:30, 13:30 to 15:00 CET
- - To order Adaptec products, including accessories and cables:
- - UK: +0800-96-65-26 or fax +0800-731-02-95
- - Other European countries: +32-11-300-379
-
- Australia and New Zealand
- - Visit our Web site at http://www.adaptec.com.au.
- - To speak with a Technical Support Specialist, call
- +612-9416-0698
- Hours: Monday-Friday, 10:00 A.M. to 4:30 P.M., EAT
- (Not open on holidays)
+ - Visit our Web site at http://www.adaptec-europe.com/.
+ - To speak with a Technical Support Specialist, call, or email,
+ * German: +49 89 4366 5522, Monday-Friday, 9:00-17:00 CET,
+ http://ask-de.adaptec.com/.
+ * French: +49 89 4366 5533, Monday-Friday, 9:00-17:00 CET,
+ http://ask-fr.adaptec.com/.
+ * English: +49 89 4366 5544, Monday-Friday, 9:00-17:00 GMT,
+ http://ask.adaptec.com/.
+ - You can order Adaptec cables online at
+ http://www.adaptec.com/buy-cables/.
Japan
+ - Visit our web site at http://www.adaptec.co.jp/.
- To speak with a Technical Support Specialist, call
- +81-3-5308-6120
- Hours: Monday-Friday, 9:00 a.m. to 12:00 p.m., 1:00 p.m. to
- 6:00 p.m. TSC
-
- Hong Kong and China
- - To speak with a Technical Support Specialist, call
- +852-2869-7200
- Hours: Monday-Friday, 10:00 to 17:00.
- - Fax Technical Support at +852-2869-7100.
-
- Singapore
- - To speak with a Technical Support Specialist, call
- +65-245-7470
- Hours: Monday-Friday, 10:00 to 17:00.
- - Fax Technical Support at +852-2869-7100
+ +81 3 5308 6120, Monday-Friday, 9:00 a.m. to 12:00 p.m.,
+ 1:00 p.m. to 6:00 p.m.
-------------------------------------------------------------------
/*
-----------------------------------------------------------------
Example:
- 'options aic7xxx aic7xxx=verbose,no_probe,tag_info:{{},{,,10}},seltime:1"
+ 'options aic7xxx aic7xxx=verbose,no_probe,tag_info:{{},{,,10}},seltime:1'
enables verbose logging, Disable EISA/VLB probing,
and set tag depth on Controller 1/Target 2 to 10 tags.
-3. Contacting Adaptec
+4. Adaptec Customer Support
A Technical Support Identification (TSID) Number is required for
Adaptec technical support.
- The 12-digit TSID can be found on the white barcode-type label
- included inside the box with your product. The TSID helps us
+ included inside the box with your product. The TSID helps us
provide more efficient service by accurately identifying your
product and support status.
+
Support Options
- Search the Adaptec Support Knowledgebase (ASK) at
http://ask.adaptec.com for articles, troubleshooting tips, and
- frequently asked questions for your product.
+ frequently asked questions about your product.
- For support via Email, submit your question to Adaptec's
- Technical Support Specialists at http://ask.adaptec.com.
+ Technical Support Specialists at http://ask.adaptec.com/.
North America
- - Visit our Web site at http://www.adaptec.com.
- - To speak with a Fibre Channel/RAID/External Storage Technical
- Support Specialist, call 1-321-207-2000,
- Hours: Monday-Friday, 3:00 A.M. to 5:00 P.M., PST.
- (Not open on holidays)
- - For Technical Support in all other technologies including
- SCSI, call 1-408-934-7274,
- Hours: Monday-Friday, 6:00 A.M. to 5:00 P.M., PST.
- (Not open on holidays)
- - For after hours support, call 1-800-416-8066 ($99/call,
- $149/call on holidays)
- - To order Adaptec products including software and cables, call
- 1-800-442-7274 or 1-408-957-7274. You can also visit our
- online store at http://www.adaptecstore.com
+ - Visit our Web site at http://www.adaptec.com/.
+ - For information about Adaptec's support options, call
+ 408-957-2550, 24 hours a day, 7 days a week.
+ - To speak with a Technical Support Specialist,
+ * For hardware products, call 408-934-7274,
+ Monday to Friday, 3:00 am to 5:00 pm, PDT.
+ * For RAID and Fibre Channel products, call 321-207-2000,
+ Monday to Friday, 3:00 am to 5:00 pm, PDT.
+ To expedite your service, have your computer with you.
+ - To order Adaptec products, including accessories and cables,
+ call 408-957-7274. To order cables online go to
+ http://www.adaptec.com/buy-cables/.
Europe
- - Visit our Web site at http://www.adaptec-europe.com.
- - English and French: To speak with a Technical Support
- Specialist, call one of the following numbers:
- - English: +32-2-352-3470
- - French: +32-2-352-3460
- Hours: Monday-Thursday, 10:00 to 12:30, 13:30 to 17:30 CET
- Friday, 10:00 to 12:30, 13:30 to 16:30 CET
- - German: To speak with a Technical Support Specialist,
- call +49-89-456-40660
- Hours: Monday-Thursday, 09:30 to 12:30, 13:30 to 16:30 CET
- Friday, 09:30 to 12:30, 13:30 to 15:00 CET
- - To order Adaptec products, including accessories and cables:
- - UK: +0800-96-65-26 or fax +0800-731-02-95
- - Other European countries: +32-11-300-379
-
- Australia and New Zealand
- - Visit our Web site at http://www.adaptec.com.au.
- - To speak with a Technical Support Specialist, call
- +612-9416-0698
- Hours: Monday-Friday, 10:00 A.M. to 4:30 P.M., EAT
- (Not open on holidays)
+ - Visit our Web site at http://www.adaptec-europe.com/.
+ - To speak with a Technical Support Specialist, call, or email,
+ * German: +49 89 4366 5522, Monday-Friday, 9:00-17:00 CET,
+ http://ask-de.adaptec.com/.
+ * French: +49 89 4366 5533, Monday-Friday, 9:00-17:00 CET,
+ http://ask-fr.adaptec.com/.
+ * English: +49 89 4366 5544, Monday-Friday, 9:00-17:00 GMT,
+ http://ask.adaptec.com/.
+ - You can order Adaptec cables online at
+ http://www.adaptec.com/buy-cables/.
Japan
+ - Visit our web site at http://www.adaptec.co.jp/.
- To speak with a Technical Support Specialist, call
- +81-3-5308-6120
- Hours: Monday-Friday, 9:00 a.m. to 12:00 p.m., 1:00 p.m. to
- 6:00 p.m. TSC
-
- Hong Kong and China
- - To speak with a Technical Support Specialist, call
- +852-2869-7200
- Hours: Monday-Friday, 10:00 to 17:00.
- - Fax Technical Support at +852-2869-7100.
-
- Singapore
- - To speak with a Technical Support Specialist, call
- +65-245-7470
- Hours: Monday-Friday, 10:00 to 17:00.
- - Fax Technical Support at +852-2869-7100
+ +81 3 5308 6120, Monday-Friday, 9:00 a.m. to 12:00 p.m.,
+ 1:00 p.m. to 6:00 p.m.
-------------------------------------------------------------------
/*
- laptop_mode
- block_dump
- drop-caches
+- zone_reclaim_mode
==============================================================
The initial value is zero. Kernel does not use this value at boot time to set
the high water marks for each per cpu page list.
+
+===============================================================
+
+zone_reclaim_mode:
+
+This is set during bootup to 1 if it is determined that pages from
+remote zones will cause a significant performance reduction. The
+page allocator will then reclaim easily reusable pages (those page
+cache pages that are currently not used) before going off node.
+
+The user can override this setting. It may be beneficial to switch
+off zone reclaim if the system is used for a file server and all
+of memory should be used for caching files from disk.
+
+It may be beneficial to switch this on if one wants to do zone
+reclaim regardless of the numa distances in the system.
+
tuner=67 - Philips TD1316 Hybrid Tuner
tuner=68 - Philips TUV1236D ATSC/NTSC dual in
tuner=69 - Tena TNF 5335 MF
+tuner=70 - Samsung TCPN 2121P30A
W: http://ebtables.sourceforge.net/
S: Maintained
+EDAC-CORE
+P: Doug Thompson
+M: norsk5@xmission.com, dthompson@linuxnetworx.com
+P: Dave Peterson
+M: dsp@llnl.gov, dave_peterson@pobox.com
+L: bluesmoke-devel@lists.sourceforge.net
+W: bluesmoke.sourceforge.net
+S: Maintained
+
EEPRO100 NETWORK DRIVER
P: Andrey V. Savochkin
M: saw@saw.sw.com.sg
S: Maintained
SN-IA64 (Itanium) SUB-PLATFORM
-P: Greg Edwards
-M: edwardsg@sgi.com
+P: Jes Sorensen
+M: jes@sgi.com
L: linux-altix@sgi.com
L: linux-ia64@vger.kernel.org
W: http://www.sgi.com/altix
P: Jean Tourrilhes
L: irda-users@lists.sourceforge.net (subscribers-only)
W: http://irda.sourceforge.net/
-S: Maintained
+S: Odd Fixes
ISAPNP
P: Jaroslav Kysela
W: ftp://ftp.kernel.org/pub/linux/docs/manpages
S: Maintained
-MARVELL MV64340 ETHERNET DRIVER
+MARVELL MV643XX ETHERNET DRIVER
+P: Dale Farnsworth
+M: dale@farnsworth.org
P: Manish Lachwani
-L: linux-mips@linux-mips.org
+M: mlachwani@mvista.com
L: netdev@vger.kernel.org
-S: Supported
+S: Odd Fixes for 2.4; Maintained for 2.6.
MATROX FRAMEBUFFER DRIVER
P: Petr Vandrovec
P: Patrick McHardy
M: kaber@coreworks.de
L: netdev@vger.kernel.org
-T: git kernel.org:/pub/scm/linux/kernel/davem/net-2.6.git
+T: git kernel.org:/pub/scm/linux/kernel/git/davem/net-2.6.git
+S: Maintained
+
+NETWORKING [WIRELESS]
+P: John W. Linville
+M: linville@tuxdriver.com
+L: netdev@vger.kernel.org
+T: git kernel.org:/pub/scm/linux/kernel/git/linville/wireless-2.6.git
S: Maintained
IPVS
TIPC NETWORK LAYER
P: Per Liden
-M: per.liden@nospam.ericsson.com
+M: per.liden@ericsson.com
P: Jon Maloy
-M: jon.maloy@nospam.ericsson.com
+M: jon.maloy@ericsson.com
P: Allan Stephens
-M: allan.stephens@nospam.windriver.com
+M: allan.stephens@windriver.com
L: tipc-discussion@lists.sourceforge.net
W: http://tipc.sourceforge.net/
W: http://tipc.cslab.ericsson.net/
VERSION = 2
PATCHLEVEL = 6
-SUBLEVEL = 15
-EXTRAVERSION =
+SUBLEVEL = 16
+EXTRAVERSION =-rc1
NAME=Sliding Snow Leopard
# *DOCUMENTATION*
# cc support functions to be used (only) in arch/$(ARCH)/Makefile
# See documentation in Documentation/kbuild/makefiles.txt
+# as-option
+# Usage: cflags-y += $(call as-option, -Wa$(comma)-isa=foo,)
+
+as-option = $(shell if $(CC) $(CFLAGS) $(1) -Wa,-Z -c -o /dev/null \
+ -xassembler /dev/null > /dev/null 2>&1; then echo "$(1)"; \
+ else echo "$(2)"; fi ;)
+
# cc-option
# Usage: cflags-y += $(call cc-option, -march=winchip-c6, -march=i586)
- Linux kernel release 2.6.xx
+ Linux kernel release 2.6.xx <http://kernel.org>
These are the release notes for Linux version 2.6. Read them carefully,
as they tell you what this is all about, explain how to install the
WHAT IS LINUX?
- Linux is a Unix clone written from scratch by Linus Torvalds with
- assistance from a loosely-knit team of hackers across the Net.
- It aims towards POSIX compliance.
+ Linux is a clone of the operating system Unix, written from scratch by
+ Linus Torvalds with assistance from a loosely-knit team of hackers across
+ the Net. It aims towards POSIX and Single UNIX Specification compliance.
- It has all the features you would expect in a modern fully-fledged
- Unix, including true multitasking, virtual memory, shared libraries,
- demand loading, shared copy-on-write executables, proper memory
- management and TCP/IP networking.
+ It has all the features you would expect in a modern fully-fledged Unix,
+ including true multitasking, virtual memory, shared libraries, demand
+ loading, shared copy-on-write executables, proper memory management,
+ and multistack networking including IPv4 and IPv6.
It is distributed under the GNU General Public License - see the
accompanying COPYING file for more details.
ON WHAT HARDWARE DOES IT RUN?
- Linux was first developed for 386/486-based PCs. These days it also
- runs on ARMs, DEC Alphas, SUN Sparcs, M68000 machines (like Atari and
- Amiga), MIPS and PowerPC, and others.
+ Although originally developed first for 32-bit x86-based PCs (386 or higher),
+ today Linux also runs on (at least) the Compaq Alpha AXP, Sun SPARC and
+ UltraSPARC, Motorola 68000, PowerPC, PowerPC64, ARM, Hitachi SuperH,
+ IBM S/390, MIPS, HP PA-RISC, Intel IA-64, DEC VAX, AMD x86-64, AXIS CRIS,
+ and Renesas M32R architectures.
+
+ Linux is easily portable to most general-purpose 32- or 64-bit architectures
+ as long as they have a paged memory management unit (PMMU) and a port of the
+ GNU C compiler (gcc) (part of The GNU Compiler Collection, GCC). Linux has
+ also been ported to a number of architectures without a PMMU, although
+ functionality is then obviously somewhat limited.
DOCUMENTATION:
return -EFAULT;
}
- return do_utimes(filename, tvs ? ktvs : NULL);
+ return do_utimes(AT_FDCWD, filename, tvs ? ktvs : NULL);
}
#define MAX_SELECT_SECONDS \
mov r1, #0x12
orr r1, r1, #3 << 10
add r2, r3, #16384
-1: cmp r1, r8 @ if virt > start of RAM
+1: cmp r1, r9 @ if virt > start of RAM
orrhs r1, r1, #0x0c @ set cacheable, bufferable
cmp r1, r10 @ if virt > end of RAM
bichs r1, r1, #0x0c @ clear cacheable, bufferable
# Code maturity level options
#
CONFIG_EXPERIMENTAL=y
-# CONFIG_CLEAN_COMPILE is not set
-CONFIG_BROKEN=y
+CONFIG_CLEAN_COMPILE=y
CONFIG_BROKEN_ON_SMP=y
#
#
# IEEE 1394 (FireWire) support
#
-# CONFIG_IEEE1394 is not set
#
# I2O device support
# CONFIG_DEVFS_FS is not set
# CONFIG_DEVPTS_FS_XATTR is not set
# CONFIG_TMPFS is not set
-# CONFIG_HUGETLBFS is not set
# CONFIG_HUGETLB_PAGE is not set
CONFIG_RAMFS=y
# Code maturity level options
#
CONFIG_EXPERIMENTAL=y
-# CONFIG_CLEAN_COMPILE is not set
-CONFIG_BROKEN=y
+CONFIG_CLEAN_COMPILE=y
CONFIG_BROKEN_ON_SMP=y
CONFIG_LOCK_KERNEL=y
CONFIG_INIT_ENV_ARG_LIMIT=32
# CONFIG_MTD_ROM is not set
# CONFIG_MTD_ABSENT is not set
CONFIG_MTD_OBSOLETE_CHIPS=y
-# CONFIG_MTD_AMDSTD is not set
CONFIG_MTD_SHARP=y
-# CONFIG_MTD_JEDEC is not set
#
# Mapping drivers for chip access
#
# IEEE 1394 (FireWire) support
#
-# CONFIG_IEEE1394 is not set
#
# I2O device support
CONFIG_PROC_FS=y
CONFIG_SYSFS=y
CONFIG_TMPFS=y
-# CONFIG_HUGETLBFS is not set
# CONFIG_HUGETLB_PAGE is not set
CONFIG_RAMFS=y
# CONFIG_RELAYFS_FS is not set
# CONFIG_DL2K is not set
CONFIG_E1000=y
CONFIG_E1000_NAPI=y
+# CONFIG_E1000_DISABLE_PACKET_SPLIT is not set
# CONFIG_NS83820 is not set
# CONFIG_HAMACHI is not set
# CONFIG_YELLOWFIN is not set
# CONFIG_DL2K is not set
CONFIG_E1000=y
CONFIG_E1000_NAPI=y
+# CONFIG_E1000_DISABLE_PACKET_SPLIT is not set
# CONFIG_NS83820 is not set
# CONFIG_HAMACHI is not set
# CONFIG_YELLOWFIN is not set
# CONFIG_DL2K is not set
CONFIG_E1000=y
CONFIG_E1000_NAPI=y
+# CONFIG_E1000_DISABLE_PACKET_SPLIT is not set
# CONFIG_NS83820 is not set
# CONFIG_HAMACHI is not set
# CONFIG_YELLOWFIN is not set
# CONFIG_DL2K is not set
CONFIG_E1000=y
CONFIG_E1000_NAPI=y
+# CONFIG_E1000_DISABLE_PACKET_SPLIT is not set
# CONFIG_NS83820 is not set
# CONFIG_HAMACHI is not set
# CONFIG_YELLOWFIN is not set
# CONFIG_DL2K is not set
CONFIG_E1000=y
CONFIG_E1000_NAPI=y
+# CONFIG_E1000_DISABLE_PACKET_SPLIT is not set
# CONFIG_NS83820 is not set
# CONFIG_HAMACHI is not set
# CONFIG_YELLOWFIN is not set
# Code maturity level options
#
CONFIG_EXPERIMENTAL=y
-# CONFIG_CLEAN_COMPILE is not set
-CONFIG_BROKEN=y
+CONFIG_CLEAN_COMPILE=y
CONFIG_BROKEN_ON_SMP=y
CONFIG_INIT_ENV_ARG_LIMIT=32
#
# IEEE 1394 (FireWire) support
#
-# CONFIG_IEEE1394 is not set
#
# I2O device support
CONFIG_PROC_FS=y
CONFIG_SYSFS=y
# CONFIG_TMPFS is not set
-# CONFIG_HUGETLBFS is not set
# CONFIG_HUGETLB_PAGE is not set
CONFIG_RAMFS=y
# CONFIG_RELAYFS_FS is not set
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
- * This file is included twice in entry-common.S
+ * This file is included thrice in entry-common.S
*/
-#ifndef NR_syscalls
-#define NR_syscalls 328
-#else
-
-100:
-/* 0 */ .long sys_restart_syscall
- .long sys_exit
- .long sys_fork_wrapper
- .long sys_read
- .long sys_write
-/* 5 */ .long sys_open
- .long sys_close
- .long sys_ni_syscall /* was sys_waitpid */
- .long sys_creat
- .long sys_link
-/* 10 */ .long sys_unlink
- .long sys_execve_wrapper
- .long sys_chdir
- .long OBSOLETE(sys_time) /* used by libc4 */
- .long sys_mknod
-/* 15 */ .long sys_chmod
- .long sys_lchown16
- .long sys_ni_syscall /* was sys_break */
- .long sys_ni_syscall /* was sys_stat */
- .long sys_lseek
-/* 20 */ .long sys_getpid
- .long sys_mount
- .long OBSOLETE(sys_oldumount) /* used by libc4 */
- .long sys_setuid16
- .long sys_getuid16
-/* 25 */ .long OBSOLETE(sys_stime)
- .long sys_ptrace
- .long OBSOLETE(sys_alarm) /* used by libc4 */
- .long sys_ni_syscall /* was sys_fstat */
- .long sys_pause
-/* 30 */ .long OBSOLETE(sys_utime) /* used by libc4 */
- .long sys_ni_syscall /* was sys_stty */
- .long sys_ni_syscall /* was sys_getty */
- .long sys_access
- .long sys_nice
-/* 35 */ .long sys_ni_syscall /* was sys_ftime */
- .long sys_sync
- .long sys_kill
- .long sys_rename
- .long sys_mkdir
-/* 40 */ .long sys_rmdir
- .long sys_dup
- .long sys_pipe
- .long sys_times
- .long sys_ni_syscall /* was sys_prof */
-/* 45 */ .long sys_brk
- .long sys_setgid16
- .long sys_getgid16
- .long sys_ni_syscall /* was sys_signal */
- .long sys_geteuid16
-/* 50 */ .long sys_getegid16
- .long sys_acct
- .long sys_umount
- .long sys_ni_syscall /* was sys_lock */
- .long sys_ioctl
-/* 55 */ .long sys_fcntl
- .long sys_ni_syscall /* was sys_mpx */
- .long sys_setpgid
- .long sys_ni_syscall /* was sys_ulimit */
- .long sys_ni_syscall /* was sys_olduname */
-/* 60 */ .long sys_umask
- .long sys_chroot
- .long sys_ustat
- .long sys_dup2
- .long sys_getppid
-/* 65 */ .long sys_getpgrp
- .long sys_setsid
- .long sys_sigaction
- .long sys_ni_syscall /* was sys_sgetmask */
- .long sys_ni_syscall /* was sys_ssetmask */
-/* 70 */ .long sys_setreuid16
- .long sys_setregid16
- .long sys_sigsuspend_wrapper
- .long sys_sigpending
- .long sys_sethostname
-/* 75 */ .long sys_setrlimit
- .long OBSOLETE(sys_old_getrlimit) /* used by libc4 */
- .long sys_getrusage
- .long sys_gettimeofday
- .long sys_settimeofday
-/* 80 */ .long sys_getgroups16
- .long sys_setgroups16
- .long OBSOLETE(old_select) /* used by libc4 */
- .long sys_symlink
- .long sys_ni_syscall /* was sys_lstat */
-/* 85 */ .long sys_readlink
- .long sys_uselib
- .long sys_swapon
- .long sys_reboot
- .long OBSOLETE(old_readdir) /* used by libc4 */
-/* 90 */ .long OBSOLETE(old_mmap) /* used by libc4 */
- .long sys_munmap
- .long sys_truncate
- .long sys_ftruncate
- .long sys_fchmod
-/* 95 */ .long sys_fchown16
- .long sys_getpriority
- .long sys_setpriority
- .long sys_ni_syscall /* was sys_profil */
- .long sys_statfs
-/* 100 */ .long sys_fstatfs
- .long sys_ni_syscall
- .long OBSOLETE(sys_socketcall)
- .long sys_syslog
- .long sys_setitimer
-/* 105 */ .long sys_getitimer
- .long sys_newstat
- .long sys_newlstat
- .long sys_newfstat
- .long sys_ni_syscall /* was sys_uname */
-/* 110 */ .long sys_ni_syscall /* was sys_iopl */
- .long sys_vhangup
- .long sys_ni_syscall
- .long OBSOLETE(sys_syscall) /* call a syscall */
- .long sys_wait4
-/* 115 */ .long sys_swapoff
- .long sys_sysinfo
- .long OBSOLETE(ABI(sys_ipc, sys_oabi_ipc))
- .long sys_fsync
- .long sys_sigreturn_wrapper
-/* 120 */ .long sys_clone_wrapper
- .long sys_setdomainname
- .long sys_newuname
- .long sys_ni_syscall
- .long sys_adjtimex
-/* 125 */ .long sys_mprotect
- .long sys_sigprocmask
- .long sys_ni_syscall /* was sys_create_module */
- .long sys_init_module
- .long sys_delete_module
-/* 130 */ .long sys_ni_syscall /* was sys_get_kernel_syms */
- .long sys_quotactl
- .long sys_getpgid
- .long sys_fchdir
- .long sys_bdflush
-/* 135 */ .long sys_sysfs
- .long sys_personality
- .long sys_ni_syscall /* .long _sys_afs_syscall */
- .long sys_setfsuid16
- .long sys_setfsgid16
-/* 140 */ .long sys_llseek
- .long sys_getdents
- .long sys_select
- .long sys_flock
- .long sys_msync
-/* 145 */ .long sys_readv
- .long sys_writev
- .long sys_getsid
- .long sys_fdatasync
- .long sys_sysctl
-/* 150 */ .long sys_mlock
- .long sys_munlock
- .long sys_mlockall
- .long sys_munlockall
- .long sys_sched_setparam
-/* 155 */ .long sys_sched_getparam
- .long sys_sched_setscheduler
- .long sys_sched_getscheduler
- .long sys_sched_yield
- .long sys_sched_get_priority_max
-/* 160 */ .long sys_sched_get_priority_min
- .long sys_sched_rr_get_interval
- .long sys_nanosleep
- .long sys_arm_mremap
- .long sys_setresuid16
-/* 165 */ .long sys_getresuid16
- .long sys_ni_syscall
- .long sys_ni_syscall /* was sys_query_module */
- .long sys_poll
- .long sys_nfsservctl
-/* 170 */ .long sys_setresgid16
- .long sys_getresgid16
- .long sys_prctl
- .long sys_rt_sigreturn_wrapper
- .long sys_rt_sigaction
-/* 175 */ .long sys_rt_sigprocmask
- .long sys_rt_sigpending
- .long sys_rt_sigtimedwait
- .long sys_rt_sigqueueinfo
- .long sys_rt_sigsuspend_wrapper
-/* 180 */ .long ABI(sys_pread64, sys_oabi_pread64)
- .long ABI(sys_pwrite64, sys_oabi_pwrite64)
- .long sys_chown16
- .long sys_getcwd
- .long sys_capget
-/* 185 */ .long sys_capset
- .long sys_sigaltstack_wrapper
- .long sys_sendfile
- .long sys_ni_syscall
- .long sys_ni_syscall
-/* 190 */ .long sys_vfork_wrapper
- .long sys_getrlimit
- .long sys_mmap2
- .long ABI(sys_truncate64, sys_oabi_truncate64)
- .long ABI(sys_ftruncate64, sys_oabi_ftruncate64)
-/* 195 */ .long ABI(sys_stat64, sys_oabi_stat64)
- .long ABI(sys_lstat64, sys_oabi_lstat64)
- .long ABI(sys_fstat64, sys_oabi_fstat64)
- .long sys_lchown
- .long sys_getuid
-/* 200 */ .long sys_getgid
- .long sys_geteuid
- .long sys_getegid
- .long sys_setreuid
- .long sys_setregid
-/* 205 */ .long sys_getgroups
- .long sys_setgroups
- .long sys_fchown
- .long sys_setresuid
- .long sys_getresuid
-/* 210 */ .long sys_setresgid
- .long sys_getresgid
- .long sys_chown
- .long sys_setuid
- .long sys_setgid
-/* 215 */ .long sys_setfsuid
- .long sys_setfsgid
- .long sys_getdents64
- .long sys_pivot_root
- .long sys_mincore
-/* 220 */ .long sys_madvise
- .long ABI(sys_fcntl64, sys_oabi_fcntl64)
- .long sys_ni_syscall /* TUX */
- .long sys_ni_syscall
- .long sys_gettid
-/* 225 */ .long ABI(sys_readahead, sys_oabi_readahead)
- .long sys_setxattr
- .long sys_lsetxattr
- .long sys_fsetxattr
- .long sys_getxattr
-/* 230 */ .long sys_lgetxattr
- .long sys_fgetxattr
- .long sys_listxattr
- .long sys_llistxattr
- .long sys_flistxattr
-/* 235 */ .long sys_removexattr
- .long sys_lremovexattr
- .long sys_fremovexattr
- .long sys_tkill
- .long sys_sendfile64
-/* 240 */ .long sys_futex
- .long sys_sched_setaffinity
- .long sys_sched_getaffinity
- .long sys_io_setup
- .long sys_io_destroy
-/* 245 */ .long sys_io_getevents
- .long sys_io_submit
- .long sys_io_cancel
- .long sys_exit_group
- .long sys_lookup_dcookie
-/* 250 */ .long sys_epoll_create
- .long ABI(sys_epoll_ctl, sys_oabi_epoll_ctl)
- .long ABI(sys_epoll_wait, sys_oabi_epoll_wait)
- .long sys_remap_file_pages
- .long sys_ni_syscall /* sys_set_thread_area */
-/* 255 */ .long sys_ni_syscall /* sys_get_thread_area */
- .long sys_set_tid_address
- .long sys_timer_create
- .long sys_timer_settime
- .long sys_timer_gettime
-/* 260 */ .long sys_timer_getoverrun
- .long sys_timer_delete
- .long sys_clock_settime
- .long sys_clock_gettime
- .long sys_clock_getres
-/* 265 */ .long sys_clock_nanosleep
- .long sys_statfs64_wrapper
- .long sys_fstatfs64_wrapper
- .long sys_tgkill
- .long sys_utimes
-/* 270 */ .long sys_arm_fadvise64_64
- .long sys_pciconfig_iobase
- .long sys_pciconfig_read
- .long sys_pciconfig_write
- .long sys_mq_open
-/* 275 */ .long sys_mq_unlink
- .long sys_mq_timedsend
- .long sys_mq_timedreceive
- .long sys_mq_notify
- .long sys_mq_getsetattr
-/* 280 */ .long sys_waitid
- .long sys_socket
- .long sys_bind
- .long sys_connect
- .long sys_listen
-/* 285 */ .long sys_accept
- .long sys_getsockname
- .long sys_getpeername
- .long sys_socketpair
- .long sys_send
-/* 290 */ .long sys_sendto
- .long sys_recv
- .long sys_recvfrom
- .long sys_shutdown
- .long sys_setsockopt
-/* 295 */ .long sys_getsockopt
- .long sys_sendmsg
- .long sys_recvmsg
- .long ABI(sys_semop, sys_oabi_semop)
- .long sys_semget
-/* 300 */ .long sys_semctl
- .long sys_msgsnd
- .long sys_msgrcv
- .long sys_msgget
- .long sys_msgctl
-/* 305 */ .long sys_shmat
- .long sys_shmdt
- .long sys_shmget
- .long sys_shmctl
- .long sys_add_key
-/* 310 */ .long sys_request_key
- .long sys_keyctl
- .long ABI(sys_semtimedop, sys_oabi_semtimedop)
-/* vserver */ .long sys_ni_syscall
- .long sys_ioprio_set
-/* 315 */ .long sys_ioprio_get
- .long sys_inotify_init
- .long sys_inotify_add_watch
- .long sys_inotify_rm_watch
- .long sys_mbind
-/* 320 */ .long sys_get_mempolicy
- .long sys_set_mempolicy
-
- .rept NR_syscalls - (. - 100b) / 4
- .long sys_ni_syscall
- .endr
+/* 0 */ CALL(sys_restart_syscall)
+ CALL(sys_exit)
+ CALL(sys_fork_wrapper)
+ CALL(sys_read)
+ CALL(sys_write)
+/* 5 */ CALL(sys_open)
+ CALL(sys_close)
+ CALL(sys_ni_syscall) /* was sys_waitpid */
+ CALL(sys_creat)
+ CALL(sys_link)
+/* 10 */ CALL(sys_unlink)
+ CALL(sys_execve_wrapper)
+ CALL(sys_chdir)
+ CALL(OBSOLETE(sys_time)) /* used by libc4 */
+ CALL(sys_mknod)
+/* 15 */ CALL(sys_chmod)
+ CALL(sys_lchown16)
+ CALL(sys_ni_syscall) /* was sys_break */
+ CALL(sys_ni_syscall) /* was sys_stat */
+ CALL(sys_lseek)
+/* 20 */ CALL(sys_getpid)
+ CALL(sys_mount)
+ CALL(OBSOLETE(sys_oldumount)) /* used by libc4 */
+ CALL(sys_setuid16)
+ CALL(sys_getuid16)
+/* 25 */ CALL(OBSOLETE(sys_stime))
+ CALL(sys_ptrace)
+ CALL(OBSOLETE(sys_alarm)) /* used by libc4 */
+ CALL(sys_ni_syscall) /* was sys_fstat */
+ CALL(sys_pause)
+/* 30 */ CALL(OBSOLETE(sys_utime)) /* used by libc4 */
+ CALL(sys_ni_syscall) /* was sys_stty */
+ CALL(sys_ni_syscall) /* was sys_getty */
+ CALL(sys_access)
+ CALL(sys_nice)
+/* 35 */ CALL(sys_ni_syscall) /* was sys_ftime */
+ CALL(sys_sync)
+ CALL(sys_kill)
+ CALL(sys_rename)
+ CALL(sys_mkdir)
+/* 40 */ CALL(sys_rmdir)
+ CALL(sys_dup)
+ CALL(sys_pipe)
+ CALL(sys_times)
+ CALL(sys_ni_syscall) /* was sys_prof */
+/* 45 */ CALL(sys_brk)
+ CALL(sys_setgid16)
+ CALL(sys_getgid16)
+ CALL(sys_ni_syscall) /* was sys_signal */
+ CALL(sys_geteuid16)
+/* 50 */ CALL(sys_getegid16)
+ CALL(sys_acct)
+ CALL(sys_umount)
+ CALL(sys_ni_syscall) /* was sys_lock */
+ CALL(sys_ioctl)
+/* 55 */ CALL(sys_fcntl)
+ CALL(sys_ni_syscall) /* was sys_mpx */
+ CALL(sys_setpgid)
+ CALL(sys_ni_syscall) /* was sys_ulimit */
+ CALL(sys_ni_syscall) /* was sys_olduname */
+/* 60 */ CALL(sys_umask)
+ CALL(sys_chroot)
+ CALL(sys_ustat)
+ CALL(sys_dup2)
+ CALL(sys_getppid)
+/* 65 */ CALL(sys_getpgrp)
+ CALL(sys_setsid)
+ CALL(sys_sigaction)
+ CALL(sys_ni_syscall) /* was sys_sgetmask */
+ CALL(sys_ni_syscall) /* was sys_ssetmask */
+/* 70 */ CALL(sys_setreuid16)
+ CALL(sys_setregid16)
+ CALL(sys_sigsuspend_wrapper)
+ CALL(sys_sigpending)
+ CALL(sys_sethostname)
+/* 75 */ CALL(sys_setrlimit)
+ CALL(OBSOLETE(sys_old_getrlimit)) /* used by libc4 */
+ CALL(sys_getrusage)
+ CALL(sys_gettimeofday)
+ CALL(sys_settimeofday)
+/* 80 */ CALL(sys_getgroups16)
+ CALL(sys_setgroups16)
+ CALL(OBSOLETE(old_select)) /* used by libc4 */
+ CALL(sys_symlink)
+ CALL(sys_ni_syscall) /* was sys_lstat */
+/* 85 */ CALL(sys_readlink)
+ CALL(sys_uselib)
+ CALL(sys_swapon)
+ CALL(sys_reboot)
+ CALL(OBSOLETE(old_readdir)) /* used by libc4 */
+/* 90 */ CALL(OBSOLETE(old_mmap)) /* used by libc4 */
+ CALL(sys_munmap)
+ CALL(sys_truncate)
+ CALL(sys_ftruncate)
+ CALL(sys_fchmod)
+/* 95 */ CALL(sys_fchown16)
+ CALL(sys_getpriority)
+ CALL(sys_setpriority)
+ CALL(sys_ni_syscall) /* was sys_profil */
+ CALL(sys_statfs)
+/* 100 */ CALL(sys_fstatfs)
+ CALL(sys_ni_syscall)
+ CALL(OBSOLETE(sys_socketcall))
+ CALL(sys_syslog)
+ CALL(sys_setitimer)
+/* 105 */ CALL(sys_getitimer)
+ CALL(sys_newstat)
+ CALL(sys_newlstat)
+ CALL(sys_newfstat)
+ CALL(sys_ni_syscall) /* was sys_uname */
+/* 110 */ CALL(sys_ni_syscall) /* was sys_iopl */
+ CALL(sys_vhangup)
+ CALL(sys_ni_syscall)
+ CALL(OBSOLETE(sys_syscall)) /* call a syscall */
+ CALL(sys_wait4)
+/* 115 */ CALL(sys_swapoff)
+ CALL(sys_sysinfo)
+ CALL(OBSOLETE(ABI(sys_ipc, sys_oabi_ipc)))
+ CALL(sys_fsync)
+ CALL(sys_sigreturn_wrapper)
+/* 120 */ CALL(sys_clone_wrapper)
+ CALL(sys_setdomainname)
+ CALL(sys_newuname)
+ CALL(sys_ni_syscall)
+ CALL(sys_adjtimex)
+/* 125 */ CALL(sys_mprotect)
+ CALL(sys_sigprocmask)
+ CALL(sys_ni_syscall) /* was sys_create_module */
+ CALL(sys_init_module)
+ CALL(sys_delete_module)
+/* 130 */ CALL(sys_ni_syscall) /* was sys_get_kernel_syms */
+ CALL(sys_quotactl)
+ CALL(sys_getpgid)
+ CALL(sys_fchdir)
+ CALL(sys_bdflush)
+/* 135 */ CALL(sys_sysfs)
+ CALL(sys_personality)
+ CALL(sys_ni_syscall) /* CALL(_sys_afs_syscall) */
+ CALL(sys_setfsuid16)
+ CALL(sys_setfsgid16)
+/* 140 */ CALL(sys_llseek)
+ CALL(sys_getdents)
+ CALL(sys_select)
+ CALL(sys_flock)
+ CALL(sys_msync)
+/* 145 */ CALL(sys_readv)
+ CALL(sys_writev)
+ CALL(sys_getsid)
+ CALL(sys_fdatasync)
+ CALL(sys_sysctl)
+/* 150 */ CALL(sys_mlock)
+ CALL(sys_munlock)
+ CALL(sys_mlockall)
+ CALL(sys_munlockall)
+ CALL(sys_sched_setparam)
+/* 155 */ CALL(sys_sched_getparam)
+ CALL(sys_sched_setscheduler)
+ CALL(sys_sched_getscheduler)
+ CALL(sys_sched_yield)
+ CALL(sys_sched_get_priority_max)
+/* 160 */ CALL(sys_sched_get_priority_min)
+ CALL(sys_sched_rr_get_interval)
+ CALL(sys_nanosleep)
+ CALL(sys_arm_mremap)
+ CALL(sys_setresuid16)
+/* 165 */ CALL(sys_getresuid16)
+ CALL(sys_ni_syscall)
+ CALL(sys_ni_syscall) /* was sys_query_module */
+ CALL(sys_poll)
+ CALL(sys_nfsservctl)
+/* 170 */ CALL(sys_setresgid16)
+ CALL(sys_getresgid16)
+ CALL(sys_prctl)
+ CALL(sys_rt_sigreturn_wrapper)
+ CALL(sys_rt_sigaction)
+/* 175 */ CALL(sys_rt_sigprocmask)
+ CALL(sys_rt_sigpending)
+ CALL(sys_rt_sigtimedwait)
+ CALL(sys_rt_sigqueueinfo)
+ CALL(sys_rt_sigsuspend_wrapper)
+/* 180 */ CALL(ABI(sys_pread64, sys_oabi_pread64))
+ CALL(ABI(sys_pwrite64, sys_oabi_pwrite64))
+ CALL(sys_chown16)
+ CALL(sys_getcwd)
+ CALL(sys_capget)
+/* 185 */ CALL(sys_capset)
+ CALL(sys_sigaltstack_wrapper)
+ CALL(sys_sendfile)
+ CALL(sys_ni_syscall)
+ CALL(sys_ni_syscall)
+/* 190 */ CALL(sys_vfork_wrapper)
+ CALL(sys_getrlimit)
+ CALL(sys_mmap2)
+ CALL(ABI(sys_truncate64, sys_oabi_truncate64))
+ CALL(ABI(sys_ftruncate64, sys_oabi_ftruncate64))
+/* 195 */ CALL(ABI(sys_stat64, sys_oabi_stat64))
+ CALL(ABI(sys_lstat64, sys_oabi_lstat64))
+ CALL(ABI(sys_fstat64, sys_oabi_fstat64))
+ CALL(sys_lchown)
+ CALL(sys_getuid)
+/* 200 */ CALL(sys_getgid)
+ CALL(sys_geteuid)
+ CALL(sys_getegid)
+ CALL(sys_setreuid)
+ CALL(sys_setregid)
+/* 205 */ CALL(sys_getgroups)
+ CALL(sys_setgroups)
+ CALL(sys_fchown)
+ CALL(sys_setresuid)
+ CALL(sys_getresuid)
+/* 210 */ CALL(sys_setresgid)
+ CALL(sys_getresgid)
+ CALL(sys_chown)
+ CALL(sys_setuid)
+ CALL(sys_setgid)
+/* 215 */ CALL(sys_setfsuid)
+ CALL(sys_setfsgid)
+ CALL(sys_getdents64)
+ CALL(sys_pivot_root)
+ CALL(sys_mincore)
+/* 220 */ CALL(sys_madvise)
+ CALL(ABI(sys_fcntl64, sys_oabi_fcntl64))
+ CALL(sys_ni_syscall) /* TUX */
+ CALL(sys_ni_syscall)
+ CALL(sys_gettid)
+/* 225 */ CALL(ABI(sys_readahead, sys_oabi_readahead))
+ CALL(sys_setxattr)
+ CALL(sys_lsetxattr)
+ CALL(sys_fsetxattr)
+ CALL(sys_getxattr)
+/* 230 */ CALL(sys_lgetxattr)
+ CALL(sys_fgetxattr)
+ CALL(sys_listxattr)
+ CALL(sys_llistxattr)
+ CALL(sys_flistxattr)
+/* 235 */ CALL(sys_removexattr)
+ CALL(sys_lremovexattr)
+ CALL(sys_fremovexattr)
+ CALL(sys_tkill)
+ CALL(sys_sendfile64)
+/* 240 */ CALL(sys_futex)
+ CALL(sys_sched_setaffinity)
+ CALL(sys_sched_getaffinity)
+ CALL(sys_io_setup)
+ CALL(sys_io_destroy)
+/* 245 */ CALL(sys_io_getevents)
+ CALL(sys_io_submit)
+ CALL(sys_io_cancel)
+ CALL(sys_exit_group)
+ CALL(sys_lookup_dcookie)
+/* 250 */ CALL(sys_epoll_create)
+ CALL(ABI(sys_epoll_ctl, sys_oabi_epoll_ctl))
+ CALL(ABI(sys_epoll_wait, sys_oabi_epoll_wait))
+ CALL(sys_remap_file_pages)
+ CALL(sys_ni_syscall) /* sys_set_thread_area */
+/* 255 */ CALL(sys_ni_syscall) /* sys_get_thread_area */
+ CALL(sys_set_tid_address)
+ CALL(sys_timer_create)
+ CALL(sys_timer_settime)
+ CALL(sys_timer_gettime)
+/* 260 */ CALL(sys_timer_getoverrun)
+ CALL(sys_timer_delete)
+ CALL(sys_clock_settime)
+ CALL(sys_clock_gettime)
+ CALL(sys_clock_getres)
+/* 265 */ CALL(sys_clock_nanosleep)
+ CALL(sys_statfs64_wrapper)
+ CALL(sys_fstatfs64_wrapper)
+ CALL(sys_tgkill)
+ CALL(sys_utimes)
+/* 270 */ CALL(sys_arm_fadvise64_64)
+ CALL(sys_pciconfig_iobase)
+ CALL(sys_pciconfig_read)
+ CALL(sys_pciconfig_write)
+ CALL(sys_mq_open)
+/* 275 */ CALL(sys_mq_unlink)
+ CALL(sys_mq_timedsend)
+ CALL(sys_mq_timedreceive)
+ CALL(sys_mq_notify)
+ CALL(sys_mq_getsetattr)
+/* 280 */ CALL(sys_waitid)
+ CALL(sys_socket)
+ CALL(sys_bind)
+ CALL(sys_connect)
+ CALL(sys_listen)
+/* 285 */ CALL(sys_accept)
+ CALL(sys_getsockname)
+ CALL(sys_getpeername)
+ CALL(sys_socketpair)
+ CALL(sys_send)
+/* 290 */ CALL(sys_sendto)
+ CALL(sys_recv)
+ CALL(sys_recvfrom)
+ CALL(sys_shutdown)
+ CALL(sys_setsockopt)
+/* 295 */ CALL(sys_getsockopt)
+ CALL(sys_sendmsg)
+ CALL(sys_recvmsg)
+ CALL(ABI(sys_semop, sys_oabi_semop))
+ CALL(sys_semget)
+/* 300 */ CALL(sys_semctl)
+ CALL(sys_msgsnd)
+ CALL(sys_msgrcv)
+ CALL(sys_msgget)
+ CALL(sys_msgctl)
+/* 305 */ CALL(sys_shmat)
+ CALL(sys_shmdt)
+ CALL(sys_shmget)
+ CALL(sys_shmctl)
+ CALL(sys_add_key)
+/* 310 */ CALL(sys_request_key)
+ CALL(sys_keyctl)
+ CALL(ABI(sys_semtimedop, sys_oabi_semtimedop))
+/* vserver */ CALL(sys_ni_syscall)
+ CALL(sys_ioprio_set)
+/* 315 */ CALL(sys_ioprio_get)
+ CALL(sys_inotify_init)
+ CALL(sys_inotify_add_watch)
+ CALL(sys_inotify_rm_watch)
+ CALL(sys_mbind)
+/* 320 */ CALL(sys_get_mempolicy)
+ CALL(sys_set_mempolicy)
+#ifndef syscalls_counted
+.equ syscalls_padding, ((NR_syscalls + 3) & ~3) - NR_syscalls
+#define syscalls_counted
#endif
+.rept syscalls_padding
+ CALL(sys_ni_syscall)
+.endr
* The kernel itself must perform the operation.
* A special ghost syscall is used for that (see traps.c).
*/
+ stmfd sp!, {r7, lr}
+ mov r7, #0xff00 @ 0xfff0 into r7 for EABI
+ orr r7, r7, #0xf0
swi #0x9ffff0
- mov pc, lr
+ ldmfd sp!, {r7, pc}
#elif __LINUX_ARM_ARCH__ < 6
b ret_slow_syscall
+ .equ NR_syscalls,0
+#define CALL(x) .equ NR_syscalls,NR_syscalls+1
#include "calls.S"
+#undef CALL
+#define CALL(x) .long x
/*=============================================================================
* SWI handler
#define SWI_SYS_SIGRETURN (0xef000000|(__NR_sigreturn))
#define SWI_SYS_RT_SIGRETURN (0xef000000|(__NR_rt_sigreturn))
+/*
+ * With EABI, the syscall number has to be loaded into r7.
+ */
+#define MOV_R7_NR_SIGRETURN (0xe3a07000 | (__NR_sigreturn - __NR_SYSCALL_BASE))
+#define MOV_R7_NR_RT_SIGRETURN (0xe3a07000 | (__NR_rt_sigreturn - __NR_SYSCALL_BASE))
+
/*
* For Thumb syscalls, we pass the syscall number via r7. We therefore
* need two 16-bit instructions.
#define SWI_THUMB_SIGRETURN (0xdf00 << 16 | 0x2700 | (__NR_sigreturn - __NR_SYSCALL_BASE))
#define SWI_THUMB_RT_SIGRETURN (0xdf00 << 16 | 0x2700 | (__NR_rt_sigreturn - __NR_SYSCALL_BASE))
-const unsigned long sigreturn_codes[4] = {
- SWI_SYS_SIGRETURN, SWI_THUMB_SIGRETURN,
- SWI_SYS_RT_SIGRETURN, SWI_THUMB_RT_SIGRETURN
+const unsigned long sigreturn_codes[7] = {
+ MOV_R7_NR_SIGRETURN, SWI_SYS_SIGRETURN, SWI_THUMB_SIGRETURN,
+ MOV_R7_NR_RT_SIGRETURN, SWI_SYS_RT_SIGRETURN, SWI_THUMB_RT_SIGRETURN,
};
static int do_signal(sigset_t *oldset, struct pt_regs * regs, int syscall);
struct sigframe {
struct sigcontext sc;
unsigned long extramask[_NSIG_WORDS-1];
- unsigned long retcode;
+ unsigned long retcode[2];
struct aux_sigframe aux __attribute__((aligned(8)));
};
void __user *puc;
struct siginfo info;
struct ucontext uc;
- unsigned long retcode;
+ unsigned long retcode[2];
struct aux_sigframe aux __attribute__((aligned(8)));
};
if (ka->sa.sa_flags & SA_RESTORER) {
retcode = (unsigned long)ka->sa.sa_restorer;
} else {
- unsigned int idx = thumb;
+ unsigned int idx = thumb << 1;
if (ka->sa.sa_flags & SA_SIGINFO)
- idx += 2;
+ idx += 3;
- if (__put_user(sigreturn_codes[idx], rc))
+ if (__put_user(sigreturn_codes[idx], rc) ||
+ __put_user(sigreturn_codes[idx+1], rc+1))
return 1;
if (cpsr & MODE32_BIT) {
* the return code written onto the stack.
*/
flush_icache_range((unsigned long)rc,
- (unsigned long)(rc + 1));
+ (unsigned long)(rc + 2));
retcode = ((unsigned long)rc) + thumb;
}
}
if (err == 0)
- err = setup_return(regs, ka, &frame->retcode, frame, usig);
+ err = setup_return(regs, ka, frame->retcode, frame, usig);
return err;
}
err |= __copy_to_user(&frame->uc.uc_sigmask, set, sizeof(*set));
if (err == 0)
- err = setup_return(regs, ka, &frame->retcode, frame, usig);
+ err = setup_return(regs, ka, frame->retcode, frame, usig);
if (err == 0) {
/*
*/
#define KERN_SIGRETURN_CODE 0xffff0500
-extern const unsigned long sigreturn_codes[4];
+extern const unsigned long sigreturn_codes[7];
if (fb->fb.var.bits_per_pixel <= 8)
val = CM_CTRL_LCDMUXSEL_VGA_8421BPP;
else if (fb->fb.var.bits_per_pixel <= 16)
- val = CM_CTRL_LCDMUXSEL_VGA_16BPP;
+ val = CM_CTRL_LCDMUXSEL_VGA_16BPP
+ | CM_CTRL_LCDEN0 | CM_CTRL_LCDEN1
+ | CM_CTRL_STATIC1 | CM_CTRL_STATIC2;
else
val = 0; /* no idea for this, don't trust the docs */
};
unsigned long ixp4xx_exp_bus_size;
+EXPORT_SYMBOL(ixp4xx_exp_bus_size);
void __init ixp4xx_sys_init(void)
{
}
}
- printk("IXP4xx: Using %uMiB expansion bus window size\n",
+ printk("IXP4xx: Using %luMiB expansion bus window size\n",
ixp4xx_exp_bus_size >> 20);
}
{
int retval;
- retval = omap1_clk_use(&api_ck.clk);
+ retval = omap1_clk_enable(&api_ck.clk);
if (!retval) {
- retval = omap1_clk_enable(clk);
- omap1_clk_unuse(&api_ck.clk);
+ retval = omap1_clk_enable_generic(clk);
+ omap1_clk_disable(&api_ck.clk);
}
return retval;
static void omap1_clk_disable_dsp_domain(struct clk *clk)
{
- if (omap1_clk_use(&api_ck.clk) == 0) {
- omap1_clk_disable(clk);
- omap1_clk_unuse(&api_ck.clk);
+ if (omap1_clk_enable(&api_ck.clk) == 0) {
+ omap1_clk_disable_generic(clk);
+ omap1_clk_disable(&api_ck.clk);
}
}
int ret;
struct uart_clk *uclk;
- ret = omap1_clk_enable(clk);
+ ret = omap1_clk_enable_generic(clk);
if (ret == 0) {
/* Set smart idle acknowledgement mode */
uclk = (struct uart_clk *)clk;
uclk = (struct uart_clk *)clk;
omap_writeb((omap_readb(uclk->sysc_addr) & ~0x18), uclk->sysc_addr);
- omap1_clk_disable(clk);
+ omap1_clk_disable_generic(clk);
}
static void omap1_clk_allow_idle(struct clk *clk)
* Note that DSP_CKCTL virt addr = phys addr, so
* we must use __raw_readw() instead of omap_readw().
*/
- omap1_clk_use(&api_ck.clk);
+ omap1_clk_enable(&api_ck.clk);
dsor = 1 << (3 & (__raw_readw(DSP_CKCTL) >> clk->rate_offset));
- omap1_clk_unuse(&api_ck.clk);
+ omap1_clk_disable(&api_ck.clk);
if (unlikely(clk->rate == clk->parent->rate / dsor))
return; /* No change, quick exit */
clk-> rate = 96000000 / dsor;
}
-static int omap1_clk_use(struct clk *clk)
+static int omap1_clk_enable(struct clk *clk)
{
int ret = 0;
if (clk->usecount++ == 0) {
if (likely(clk->parent)) {
- ret = omap1_clk_use(clk->parent);
+ ret = omap1_clk_enable(clk->parent);
if (unlikely(ret != 0)) {
clk->usecount--;
ret = clk->enable(clk);
if (unlikely(ret != 0) && clk->parent) {
- omap1_clk_unuse(clk->parent);
+ omap1_clk_disable(clk->parent);
clk->usecount--;
}
}
return ret;
}
-static void omap1_clk_unuse(struct clk *clk)
+static void omap1_clk_disable(struct clk *clk)
{
if (clk->usecount > 0 && !(--clk->usecount)) {
clk->disable(clk);
if (likely(clk->parent)) {
- omap1_clk_unuse(clk->parent);
+ omap1_clk_disable(clk->parent);
if (clk->flags & CLOCK_NO_IDLE_PARENT)
if (!cpu_is_omap24xx())
omap1_clk_allow_idle(clk->parent);
}
}
-static int omap1_clk_enable(struct clk *clk)
+static int omap1_clk_enable_generic(struct clk *clk)
{
__u16 regval16;
__u32 regval32;
return 0;
}
-static void omap1_clk_disable(struct clk *clk)
+static void omap1_clk_disable_generic(struct clk *clk)
{
__u16 regval16;
__u32 regval32;
#endif
static struct clk_functions omap1_clk_functions = {
- .clk_use = omap1_clk_use,
- .clk_unuse = omap1_clk_unuse,
+ .clk_enable = omap1_clk_enable,
+ .clk_disable = omap1_clk_disable,
.clk_round_rate = omap1_clk_round_rate,
.clk_set_rate = omap1_clk_set_rate,
};
* Only enable those clocks we will need, let the drivers
* enable other clocks as necessary
*/
- clk_use(&armper_ck.clk);
- clk_use(&armxor_ck.clk);
- clk_use(&armtim_ck.clk); /* This should be done by timer code */
+ clk_enable(&armper_ck.clk);
+ clk_enable(&armxor_ck.clk);
+ clk_enable(&armtim_ck.clk); /* This should be done by timer code */
if (cpu_is_omap1510())
clk_enable(&arm_gpio_ck);
#ifndef __ARCH_ARM_MACH_OMAP1_CLOCK_H
#define __ARCH_ARM_MACH_OMAP1_CLOCK_H
-static int omap1_clk_enable(struct clk * clk);
-static void omap1_clk_disable(struct clk * clk);
+static int omap1_clk_enable_generic(struct clk * clk);
+static void omap1_clk_disable_generic(struct clk * clk);
static void omap1_ckctl_recalc(struct clk * clk);
static void omap1_watchdog_recalc(struct clk * clk);
static void omap1_ckctl_recalc_dsp_domain(struct clk * clk);
static void omap1_init_ext_clk(struct clk * clk);
static int omap1_select_table_rate(struct clk * clk, unsigned long rate);
static long omap1_round_to_table_rate(struct clk * clk, unsigned long rate);
-static int omap1_clk_use(struct clk *clk);
-static void omap1_clk_unuse(struct clk *clk);
+static int omap1_clk_enable(struct clk *clk);
+static void omap1_clk_disable(struct clk *clk);
struct mpu_rate {
unsigned long rate;
.rate = 12000000,
.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
ALWAYS_ENABLED,
- .enable = &omap1_clk_enable,
- .disable = &omap1_clk_disable,
+ .enable = &omap1_clk_enable_generic,
+ .disable = &omap1_clk_disable_generic,
};
static struct clk ck_dpll1 = {
.parent = &ck_ref,
.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
RATE_PROPAGATES | ALWAYS_ENABLED,
- .enable = &omap1_clk_enable,
- .disable = &omap1_clk_disable,
+ .enable = &omap1_clk_enable_generic,
+ .disable = &omap1_clk_disable_generic,
};
static struct arm_idlect1_clk ck_dpll1out = {
.enable_reg = (void __iomem *)ARM_IDLECT2,
.enable_bit = EN_CKOUT_ARM,
.recalc = &followparent_recalc,
- .enable = &omap1_clk_enable,
- .disable = &omap1_clk_disable,
+ .enable = &omap1_clk_enable_generic,
+ .disable = &omap1_clk_disable_generic,
},
.idlect_shift = 12,
};
RATE_CKCTL | RATE_PROPAGATES | ALWAYS_ENABLED,
.rate_offset = CKCTL_ARMDIV_OFFSET,
.recalc = &omap1_ckctl_recalc,
- .enable = &omap1_clk_enable,
- .disable = &omap1_clk_disable,
+ .enable = &omap1_clk_enable_generic,
+ .disable = &omap1_clk_disable_generic,
};
static struct arm_idlect1_clk armper_ck = {
.enable_bit = EN_PERCK,
.rate_offset = CKCTL_PERDIV_OFFSET,
.recalc = &omap1_ckctl_recalc,
- .enable = &omap1_clk_enable,
- .disable = &omap1_clk_disable,
+ .enable = &omap1_clk_enable_generic,
+ .disable = &omap1_clk_disable_generic,
},
.idlect_shift = 2,
};
.enable_reg = (void __iomem *)ARM_IDLECT2,
.enable_bit = EN_GPIOCK,
.recalc = &followparent_recalc,
- .enable = &omap1_clk_enable,
- .disable = &omap1_clk_disable,
+ .enable = &omap1_clk_enable_generic,
+ .disable = &omap1_clk_disable_generic,
};
static struct arm_idlect1_clk armxor_ck = {
.enable_reg = (void __iomem *)ARM_IDLECT2,
.enable_bit = EN_XORPCK,
.recalc = &followparent_recalc,
- .enable = &omap1_clk_enable,
- .disable = &omap1_clk_disable,
+ .enable = &omap1_clk_enable_generic,
+ .disable = &omap1_clk_disable_generic,
},
.idlect_shift = 1,
};
.enable_reg = (void __iomem *)ARM_IDLECT2,
.enable_bit = EN_TIMCK,
.recalc = &followparent_recalc,
- .enable = &omap1_clk_enable,
- .disable = &omap1_clk_disable,
+ .enable = &omap1_clk_enable_generic,
+ .disable = &omap1_clk_disable_generic,
},
.idlect_shift = 9,
};
.enable_reg = (void __iomem *)ARM_IDLECT2,
.enable_bit = EN_WDTCK,
.recalc = &omap1_watchdog_recalc,
- .enable = &omap1_clk_enable,
- .disable = &omap1_clk_disable,
+ .enable = &omap1_clk_enable_generic,
+ .disable = &omap1_clk_disable_generic,
},
.idlect_shift = 0,
};
*
* 1510 version is in TC clocks.
*/
- .enable = &omap1_clk_enable,
- .disable = &omap1_clk_disable,
+ .enable = &omap1_clk_enable_generic,
+ .disable = &omap1_clk_disable_generic,
};
static struct clk dsp_ck = {
.enable_bit = EN_DSPCK,
.rate_offset = CKCTL_DSPDIV_OFFSET,
.recalc = &omap1_ckctl_recalc,
- .enable = &omap1_clk_enable,
- .disable = &omap1_clk_disable,
+ .enable = &omap1_clk_enable_generic,
+ .disable = &omap1_clk_disable_generic,
};
static struct clk dspmmu_ck = {
RATE_CKCTL | ALWAYS_ENABLED,
.rate_offset = CKCTL_DSPMMUDIV_OFFSET,
.recalc = &omap1_ckctl_recalc,
- .enable = &omap1_clk_enable,
- .disable = &omap1_clk_disable,
+ .enable = &omap1_clk_enable_generic,
+ .disable = &omap1_clk_disable_generic,
};
static struct clk dspper_ck = {
CLOCK_IDLE_CONTROL,
.rate_offset = CKCTL_TCDIV_OFFSET,
.recalc = &omap1_ckctl_recalc,
- .enable = &omap1_clk_enable,
- .disable = &omap1_clk_disable,
+ .enable = &omap1_clk_enable_generic,
+ .disable = &omap1_clk_disable_generic,
},
.idlect_shift = 6,
};
*
* 16xx version is in MPU clocks.
*/
- .enable = &omap1_clk_enable,
- .disable = &omap1_clk_disable,
+ .enable = &omap1_clk_enable_generic,
+ .disable = &omap1_clk_disable_generic,
};
static struct clk tipb_ck = {
.parent = &tc_ck.clk,
.flags = CLOCK_IN_OMAP1510 | ALWAYS_ENABLED,
.recalc = &followparent_recalc,
- .enable = &omap1_clk_enable,
- .disable = &omap1_clk_disable,
+ .enable = &omap1_clk_enable_generic,
+ .disable = &omap1_clk_disable_generic,
};
static struct clk l3_ocpi_ck = {
.enable_reg = (void __iomem *)ARM_IDLECT3,
.enable_bit = EN_OCPI_CK,
.recalc = &followparent_recalc,
- .enable = &omap1_clk_enable,
- .disable = &omap1_clk_disable,
+ .enable = &omap1_clk_enable_generic,
+ .disable = &omap1_clk_disable_generic,
};
static struct clk tc1_ck = {
.enable_reg = (void __iomem *)ARM_IDLECT3,
.enable_bit = EN_TC1_CK,
.recalc = &followparent_recalc,
- .enable = &omap1_clk_enable,
- .disable = &omap1_clk_disable,
+ .enable = &omap1_clk_enable_generic,
+ .disable = &omap1_clk_disable_generic,
};
static struct clk tc2_ck = {
.enable_reg = (void __iomem *)ARM_IDLECT3,
.enable_bit = EN_TC2_CK,
.recalc = &followparent_recalc,
- .enable = &omap1_clk_enable,
- .disable = &omap1_clk_disable,
+ .enable = &omap1_clk_enable_generic,
+ .disable = &omap1_clk_disable_generic,
};
static struct clk dma_ck = {
.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
ALWAYS_ENABLED,
.recalc = &followparent_recalc,
- .enable = &omap1_clk_enable,
- .disable = &omap1_clk_disable,
+ .enable = &omap1_clk_enable_generic,
+ .disable = &omap1_clk_disable_generic,
};
static struct clk dma_lcdfree_ck = {
.parent = &tc_ck.clk,
.flags = CLOCK_IN_OMAP16XX | ALWAYS_ENABLED,
.recalc = &followparent_recalc,
- .enable = &omap1_clk_enable,
- .disable = &omap1_clk_disable,
+ .enable = &omap1_clk_enable_generic,
+ .disable = &omap1_clk_disable_generic,
};
static struct arm_idlect1_clk api_ck = {
.enable_reg = (void __iomem *)ARM_IDLECT2,
.enable_bit = EN_APICK,
.recalc = &followparent_recalc,
- .enable = &omap1_clk_enable,
- .disable = &omap1_clk_disable,
+ .enable = &omap1_clk_enable_generic,
+ .disable = &omap1_clk_disable_generic,
},
.idlect_shift = 8,
};
.enable_reg = (void __iomem *)ARM_IDLECT2,
.enable_bit = EN_LBCK,
.recalc = &followparent_recalc,
- .enable = &omap1_clk_enable,
- .disable = &omap1_clk_disable,
+ .enable = &omap1_clk_enable_generic,
+ .disable = &omap1_clk_disable_generic,
},
.idlect_shift = 4,
};
.parent = &tc_ck.clk,
.flags = CLOCK_IN_OMAP16XX | ALWAYS_ENABLED,
.recalc = &followparent_recalc,
- .enable = &omap1_clk_enable,
- .disable = &omap1_clk_disable,
+ .enable = &omap1_clk_enable_generic,
+ .disable = &omap1_clk_disable_generic,
};
static struct clk rhea2_ck = {
.parent = &tc_ck.clk,
.flags = CLOCK_IN_OMAP16XX | ALWAYS_ENABLED,
.recalc = &followparent_recalc,
- .enable = &omap1_clk_enable,
- .disable = &omap1_clk_disable,
+ .enable = &omap1_clk_enable_generic,
+ .disable = &omap1_clk_disable_generic,
};
static struct clk lcd_ck_16xx = {
.enable_bit = EN_LCDCK,
.rate_offset = CKCTL_LCDDIV_OFFSET,
.recalc = &omap1_ckctl_recalc,
- .enable = &omap1_clk_enable,
- .disable = &omap1_clk_disable,
+ .enable = &omap1_clk_enable_generic,
+ .disable = &omap1_clk_disable_generic,
};
static struct arm_idlect1_clk lcd_ck_1510 = {
.enable_bit = EN_LCDCK,
.rate_offset = CKCTL_LCDDIV_OFFSET,
.recalc = &omap1_ckctl_recalc,
- .enable = &omap1_clk_enable,
- .disable = &omap1_clk_disable,
+ .enable = &omap1_clk_enable_generic,
+ .disable = &omap1_clk_disable_generic,
},
.idlect_shift = 3,
};
.enable_bit = 29, /* Chooses between 12MHz and 48MHz */
.set_rate = &omap1_set_uart_rate,
.recalc = &omap1_uart_recalc,
- .enable = &omap1_clk_enable,
- .disable = &omap1_clk_disable,
+ .enable = &omap1_clk_enable_generic,
+ .disable = &omap1_clk_disable_generic,
};
static struct uart_clk uart1_16xx = {
.enable_bit = 30, /* Chooses between 12MHz and 48MHz */
.set_rate = &omap1_set_uart_rate,
.recalc = &omap1_uart_recalc,
- .enable = &omap1_clk_enable,
- .disable = &omap1_clk_disable,
+ .enable = &omap1_clk_enable_generic,
+ .disable = &omap1_clk_disable_generic,
};
static struct clk uart3_1510 = {
.enable_bit = 31, /* Chooses between 12MHz and 48MHz */
.set_rate = &omap1_set_uart_rate,
.recalc = &omap1_uart_recalc,
- .enable = &omap1_clk_enable,
- .disable = &omap1_clk_disable,
+ .enable = &omap1_clk_enable_generic,
+ .disable = &omap1_clk_disable_generic,
};
static struct uart_clk uart3_16xx = {
RATE_FIXED | ENABLE_REG_32BIT,
.enable_reg = (void __iomem *)ULPD_CLOCK_CTRL,
.enable_bit = USB_MCLK_EN_BIT,
- .enable = &omap1_clk_enable,
- .disable = &omap1_clk_disable,
+ .enable = &omap1_clk_enable_generic,
+ .disable = &omap1_clk_disable_generic,
};
static struct clk usb_hhc_ck1510 = {
RATE_FIXED | ENABLE_REG_32BIT,
.enable_reg = (void __iomem *)MOD_CONF_CTRL_0,
.enable_bit = USB_HOST_HHC_UHOST_EN,
- .enable = &omap1_clk_enable,
- .disable = &omap1_clk_disable,
+ .enable = &omap1_clk_enable_generic,
+ .disable = &omap1_clk_disable_generic,
};
static struct clk usb_hhc_ck16xx = {
RATE_FIXED | ENABLE_REG_32BIT,
.enable_reg = (void __iomem *)OTG_BASE + 0x08 /* OTG_SYSCON_2 */,
.enable_bit = 8 /* UHOST_EN */,
- .enable = &omap1_clk_enable,
- .disable = &omap1_clk_disable,
+ .enable = &omap1_clk_enable_generic,
+ .disable = &omap1_clk_disable_generic,
};
static struct clk usb_dc_ck = {
.flags = CLOCK_IN_OMAP16XX | RATE_FIXED,
.enable_reg = (void __iomem *)SOFT_REQ_REG,
.enable_bit = 4,
- .enable = &omap1_clk_enable,
- .disable = &omap1_clk_disable,
+ .enable = &omap1_clk_enable_generic,
+ .disable = &omap1_clk_disable_generic,
};
static struct clk mclk_1510 = {
/* Direct from ULPD, no parent. May be enabled by ext hardware. */
.rate = 12000000,
.flags = CLOCK_IN_OMAP1510 | RATE_FIXED,
- .enable = &omap1_clk_enable,
- .disable = &omap1_clk_disable,
+ .enable = &omap1_clk_enable_generic,
+ .disable = &omap1_clk_disable_generic,
};
static struct clk mclk_16xx = {
.set_rate = &omap1_set_ext_clk_rate,
.round_rate = &omap1_round_ext_clk_rate,
.init = &omap1_init_ext_clk,
- .enable = &omap1_clk_enable,
- .disable = &omap1_clk_disable,
+ .enable = &omap1_clk_enable_generic,
+ .disable = &omap1_clk_disable_generic,
};
static struct clk bclk_1510 = {
/* Direct from ULPD, no parent. May be enabled by ext hardware. */
.rate = 12000000,
.flags = CLOCK_IN_OMAP1510 | RATE_FIXED,
- .enable = &omap1_clk_enable,
- .disable = &omap1_clk_disable,
+ .enable = &omap1_clk_enable_generic,
+ .disable = &omap1_clk_disable_generic,
};
static struct clk bclk_16xx = {
.set_rate = &omap1_set_ext_clk_rate,
.round_rate = &omap1_round_ext_clk_rate,
.init = &omap1_init_ext_clk,
- .enable = &omap1_clk_enable,
- .disable = &omap1_clk_disable,
+ .enable = &omap1_clk_enable_generic,
+ .disable = &omap1_clk_disable_generic,
};
static struct clk mmc1_ck = {
RATE_FIXED | ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT,
.enable_reg = (void __iomem *)MOD_CONF_CTRL_0,
.enable_bit = 23,
- .enable = &omap1_clk_enable,
- .disable = &omap1_clk_disable,
+ .enable = &omap1_clk_enable_generic,
+ .disable = &omap1_clk_disable_generic,
};
static struct clk mmc2_ck = {
RATE_FIXED | ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT,
.enable_reg = (void __iomem *)MOD_CONF_CTRL_0,
.enable_bit = 20,
- .enable = &omap1_clk_enable,
- .disable = &omap1_clk_disable,
+ .enable = &omap1_clk_enable_generic,
+ .disable = &omap1_clk_disable_generic,
};
static struct clk virtual_ck_mpu = {
.recalc = &followparent_recalc,
.set_rate = &omap1_select_table_rate,
.round_rate = &omap1_round_to_table_rate,
- .enable = &omap1_clk_enable,
- .disable = &omap1_clk_disable,
+ .enable = &omap1_clk_enable_generic,
+ .disable = &omap1_clk_disable_generic,
};
static struct clk * onchip_clks[] = {
if (IS_ERR(uart1_ck))
printk("Could not get uart1_ck\n");
else {
- clk_use(uart1_ck);
+ clk_enable(uart1_ck);
if (cpu_is_omap1510())
clk_set_rate(uart1_ck, 12000000);
}
if (IS_ERR(uart2_ck))
printk("Could not get uart2_ck\n");
else {
- clk_use(uart2_ck);
+ clk_enable(uart2_ck);
if (cpu_is_omap1510())
clk_set_rate(uart2_ck, 12000000);
else
if (IS_ERR(uart3_ck))
printk("Could not get uart3_ck\n");
else {
- clk_use(uart3_ck);
+ clk_enable(uart3_ck);
if (cpu_is_omap1510())
clk_set_rate(uart3_ck, 12000000);
}
/* Enables clock without considering parent dependencies or use count
* REVISIT: Maybe change this to use clk->enable like on omap1?
*/
-static int omap2_clk_enable(struct clk * clk)
+static int _omap2_clk_enable(struct clk * clk)
{
u32 regval32;
}
/* Disables clock without considering parent dependencies or use count */
-static void omap2_clk_disable(struct clk *clk)
+static void _omap2_clk_disable(struct clk *clk)
{
u32 regval32;
__raw_writel(regval32, clk->enable_reg);
}
-static int omap2_clk_use(struct clk *clk)
+static int omap2_clk_enable(struct clk *clk)
{
int ret = 0;
if (clk->usecount++ == 0) {
if (likely((u32)clk->parent))
- ret = omap2_clk_use(clk->parent);
+ ret = omap2_clk_enable(clk->parent);
if (unlikely(ret != 0)) {
clk->usecount--;
return ret;
}
- ret = omap2_clk_enable(clk);
+ ret = _omap2_clk_enable(clk);
if (unlikely(ret != 0) && clk->parent) {
- omap2_clk_unuse(clk->parent);
+ omap2_clk_disable(clk->parent);
clk->usecount--;
}
}
return ret;
}
-static void omap2_clk_unuse(struct clk *clk)
+static void omap2_clk_disable(struct clk *clk)
{
if (clk->usecount > 0 && !(--clk->usecount)) {
- omap2_clk_disable(clk);
+ _omap2_clk_disable(clk);
if (likely((u32)clk->parent))
- omap2_clk_unuse(clk->parent);
+ omap2_clk_disable(clk->parent);
}
}
reg = (void __iomem *)src_sel;
if (clk->usecount > 0)
- omap2_clk_disable(clk);
+ _omap2_clk_disable(clk);
/* Set new source value (previous dividers if any in effect) */
reg_val = __raw_readl(reg) & ~(field_mask << src_off);
__raw_writel(0x1, (void __iomem *)&PRCM_CLKCFG_CTRL);
if (clk->usecount > 0)
- omap2_clk_enable(clk);
+ _omap2_clk_enable(clk);
clk->parent = new_parent;
static struct clk_functions omap2_clk_functions = {
.clk_enable = omap2_clk_enable,
.clk_disable = omap2_clk_disable,
- .clk_use = omap2_clk_use,
- .clk_unuse = omap2_clk_unuse,
.clk_round_rate = omap2_clk_round_rate,
.clk_set_rate = omap2_clk_set_rate,
.clk_set_parent = omap2_clk_set_parent,
continue;
printk(KERN_INFO "Disabling unused clock \"%s\"\n", ck->name);
- omap2_clk_disable(ck);
+ _omap2_clk_disable(ck);
}
}
late_initcall(omap2_disable_unused_clocks);
* Only enable those clocks we will need, let the drivers
* enable other clocks as necessary
*/
- clk_use(&sync_32k_ick);
- clk_use(&omapctrl_ick);
+ clk_enable(&sync_32k_ick);
+ clk_enable(&omapctrl_ick);
if (cpu_is_omap2430())
- clk_use(&sdrc_ick);
+ clk_enable(&sdrc_ick);
return 0;
}
static void omap2_mpu_recalc(struct clk * clk);
static int omap2_select_table_rate(struct clk * clk, unsigned long rate);
static long omap2_round_to_table_rate(struct clk * clk, unsigned long rate);
-static void omap2_clk_unuse(struct clk *clk);
+static void omap2_clk_disable(struct clk *clk);
static void omap2_sys_clk_recalc(struct clk * clk);
static u32 omap2_clksel_to_divisor(u32 div_sel, u32 field_val);
static u32 omap2_clksel_get_divisor(struct clk *clk);
static struct clk usb_l4_ick = { /* FS-USB interface clock */
.name = "usb_l4_ick",
- .parent = &core_ck,
+ .parent = &core_l3_ck,
.flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
RATE_CKCTL | CM_CORE_SEL1 | DELAYED_APP |
CONFIG_PARTICIPANT,
.name = "gpt1_ick",
.parent = &l4_ck,
.flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
- .enable_reg = (void __iomem *)&CM_ICLKEN_WKUP, /* Bit4 */
+ .enable_reg = (void __iomem *)&CM_ICLKEN_WKUP, /* Bit0 */
.enable_bit = 0,
.recalc = &omap2_followparent_recalc,
};
.parent = &func_32k_ck,
.flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
CM_WKUP_SEL1,
- .enable_reg = (void __iomem *)&CM_FCLKEN_WKUP,
+ .enable_reg = (void __iomem *)&CM_FCLKEN_WKUP, /* Bit0 */
.enable_bit = 0,
.src_offset = 0,
.recalc = &omap2_followparent_recalc,
.name = "gpt2_ick",
.parent = &l4_ck,
.flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
- .enable_reg = (void __iomem *)&CM_ICLKEN1_CORE, /* bit4 */
+ .enable_reg = (void __iomem *)&CM_ICLKEN1_CORE, /* Bit4 */
.enable_bit = 0,
.recalc = &omap2_followparent_recalc,
};
static struct clk usbhs_ick = {
.name = "usbhs_ick",
- .parent = &l4_ck,
+ .parent = &core_l3_ck,
.flags = CLOCK_IN_OMAP243X,
.enable_reg = (void __iomem *)&CM_ICLKEN2_CORE,
.enable_bit = 6,
if (IS_ERR(uart1_ick))
printk("Could not get uart1_ick\n");
else {
- clk_use(uart1_ick);
+ clk_enable(uart1_ick);
}
uart1_fck = clk_get(NULL, "uart1_fck");
if (IS_ERR(uart1_fck))
printk("Could not get uart1_fck\n");
else {
- clk_use(uart1_fck);
+ clk_enable(uart1_fck);
}
break;
case 1:
if (IS_ERR(uart2_ick))
printk("Could not get uart2_ick\n");
else {
- clk_use(uart2_ick);
+ clk_enable(uart2_ick);
}
uart2_fck = clk_get(NULL, "uart2_fck");
if (IS_ERR(uart2_fck))
printk("Could not get uart2_fck\n");
else {
- clk_use(uart2_fck);
+ clk_enable(uart2_fck);
}
break;
case 2:
if (IS_ERR(uart3_ick))
printk("Could not get uart3_ick\n");
else {
- clk_use(uart3_ick);
+ clk_enable(uart3_ick);
}
uart3_fck = clk_get(NULL, "uart3_fck");
if (IS_ERR(uart3_fck))
printk("Could not get uart3_fck\n");
else {
- clk_use(uart3_fck);
+ clk_enable(uart3_fck);
}
break;
}
if (IS_ERR(sys_ck))
printk(KERN_ERR "Could not get sys_ck\n");
else {
- clk_use(sys_ck);
+ clk_enable(sys_ck);
tick_period = clk_get_rate(sys_ck) / 100;
clk_put(sys_ck);
}
* 14-Jan-2005 BJD Added s3c24xx_init_clocks() call
* 10-Mar-2005 LCVR Changed S3C2410_{VA,SZ} to S3C24XX_{VA,SZ} & IODESC_ENT
* 14-Mar-2005 BJD Updated for __iomem
+ * 15-Jan-2006 LCVR Updated S3C2410_PA_##x to new S3C24XX_PA_##x macro
*/
/* todo - fix when rmk changes iodescs to use `void __iomem *` */
-#define IODESC_ENT(x) { (unsigned long)S3C24XX_VA_##x, __phys_to_pfn(S3C2410_PA_##x), S3C24XX_SZ_##x, MT_DEVICE }
+#define IODESC_ENT(x) { (unsigned long)S3C24XX_VA_##x, __phys_to_pfn(S3C24XX_PA_##x), S3C24XX_SZ_##x, MT_DEVICE }
#ifndef MHZ
#define MHZ (1000*1000)
* published by the Free Software Foundation.
*
* Modifications:
+ * 15-Jan-2006 LCVR Using S3C24XX_PA_##x macro for common S3C24XX devices
* 10-Mar-2005 LCVR Changed S3C2410_{VA,SZ} to S3C24XX_{VA,SZ}
* 10-Feb-2005 BJD Added camera from guillaume.gourat@nexvision.tv
* 29-Aug-2004 BJD Added timers 0 through 3
static struct resource s3c_usb_resource[] = {
[0] = {
- .start = S3C2410_PA_USBHOST,
- .end = S3C2410_PA_USBHOST + S3C24XX_SZ_USBHOST - 1,
+ .start = S3C24XX_PA_USBHOST,
+ .end = S3C24XX_PA_USBHOST + S3C24XX_SZ_USBHOST - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
static struct resource s3c_lcd_resource[] = {
[0] = {
- .start = S3C2410_PA_LCD,
- .end = S3C2410_PA_LCD + S3C24XX_SZ_LCD - 1,
+ .start = S3C24XX_PA_LCD,
+ .end = S3C24XX_PA_LCD + S3C24XX_SZ_LCD - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
static struct resource s3c_usbgadget_resource[] = {
[0] = {
- .start = S3C2410_PA_USBDEV,
- .end = S3C2410_PA_USBDEV + S3C24XX_SZ_USBDEV - 1,
+ .start = S3C24XX_PA_USBDEV,
+ .end = S3C24XX_PA_USBDEV + S3C24XX_SZ_USBDEV - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
static struct resource s3c_wdt_resource[] = {
[0] = {
- .start = S3C2410_PA_WATCHDOG,
- .end = S3C2410_PA_WATCHDOG + S3C24XX_SZ_WATCHDOG - 1,
+ .start = S3C24XX_PA_WATCHDOG,
+ .end = S3C24XX_PA_WATCHDOG + S3C24XX_SZ_WATCHDOG - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
static struct resource s3c_i2c_resource[] = {
[0] = {
- .start = S3C2410_PA_IIC,
- .end = S3C2410_PA_IIC + S3C24XX_SZ_IIC - 1,
+ .start = S3C24XX_PA_IIC,
+ .end = S3C24XX_PA_IIC + S3C24XX_SZ_IIC - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
static struct resource s3c_iis_resource[] = {
[0] = {
- .start = S3C2410_PA_IIS,
- .end = S3C2410_PA_IIS + S3C24XX_SZ_IIS -1,
+ .start = S3C24XX_PA_IIS,
+ .end = S3C24XX_PA_IIS + S3C24XX_SZ_IIS -1,
.flags = IORESOURCE_MEM,
}
};
static struct resource s3c_rtc_resource[] = {
[0] = {
- .start = S3C2410_PA_RTC,
- .end = S3C2410_PA_RTC + 0xff,
+ .start = S3C24XX_PA_RTC,
+ .end = S3C24XX_PA_RTC + 0xff,
.flags = IORESOURCE_MEM,
},
[1] = {
static struct resource s3c_adc_resource[] = {
[0] = {
- .start = S3C2410_PA_ADC,
- .end = S3C2410_PA_ADC + S3C24XX_SZ_ADC - 1,
+ .start = S3C24XX_PA_ADC,
+ .end = S3C24XX_PA_ADC + S3C24XX_SZ_ADC - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
static struct resource s3c_spi0_resource[] = {
[0] = {
- .start = S3C2410_PA_SPI,
- .end = S3C2410_PA_SPI + 0x1f,
+ .start = S3C24XX_PA_SPI,
+ .end = S3C24XX_PA_SPI + 0x1f,
.flags = IORESOURCE_MEM,
},
[1] = {
static struct resource s3c_spi1_resource[] = {
[0] = {
- .start = S3C2410_PA_SPI + 0x20,
- .end = S3C2410_PA_SPI + 0x20 + 0x1f,
+ .start = S3C24XX_PA_SPI + 0x20,
+ .end = S3C24XX_PA_SPI + 0x20 + 0x1f,
.flags = IORESOURCE_MEM,
},
[1] = {
static struct resource s3c_timer0_resource[] = {
[0] = {
- .start = S3C2410_PA_TIMER + 0x0C,
- .end = S3C2410_PA_TIMER + 0x0C + 0xB,
+ .start = S3C24XX_PA_TIMER + 0x0C,
+ .end = S3C24XX_PA_TIMER + 0x0C + 0xB,
.flags = IORESOURCE_MEM,
},
[1] = {
static struct resource s3c_timer1_resource[] = {
[0] = {
- .start = S3C2410_PA_TIMER + 0x18,
- .end = S3C2410_PA_TIMER + 0x23,
+ .start = S3C24XX_PA_TIMER + 0x18,
+ .end = S3C24XX_PA_TIMER + 0x23,
.flags = IORESOURCE_MEM,
},
[1] = {
static struct resource s3c_timer2_resource[] = {
[0] = {
- .start = S3C2410_PA_TIMER + 0x24,
- .end = S3C2410_PA_TIMER + 0x2F,
+ .start = S3C24XX_PA_TIMER + 0x24,
+ .end = S3C24XX_PA_TIMER + 0x2F,
.flags = IORESOURCE_MEM,
},
[1] = {
static struct resource s3c_timer3_resource[] = {
[0] = {
- .start = S3C2410_PA_TIMER + 0x30,
- .end = S3C2410_PA_TIMER + 0x3B,
+ .start = S3C24XX_PA_TIMER + 0x30,
+ .end = S3C24XX_PA_TIMER + 0x3B,
.flags = IORESOURCE_MEM,
},
[1] = {
printk("S3C2410 DMA Driver, (c) 2003-2004 Simtec Electronics\n");
- dma_base = ioremap(S3C2410_PA_DMA, 0x200);
+ dma_base = ioremap(S3C24XX_PA_DMA, 0x200);
if (dma_base == NULL) {
printk(KERN_ERR "dma failed to remap register block\n");
return -ENOMEM;
@@ load UART to allow us to print the two characters for
@@ resume debug
- mov r2, #S3C2410_PA_UART & 0xff000000
- orr r2, r2, #S3C2410_PA_UART & 0xff000
+ mov r2, #S3C24XX_PA_UART & 0xff000000
+ orr r2, r2, #S3C24XX_PA_UART & 0xff000
#if 0
/* SMDK2440 LED set */
- mov r14, #S3C2410_PA_GPIO
+ mov r14, #S3C24XX_PA_GPIO
ldr r12, [ r14, #0x54 ]
bic r12, r12, #3<<4
orr r12, r12, #1<<7
return NULL;
addr = (unsigned long)area->addr;
if (remap_area_pages(addr, pfn, size, flags)) {
- vfree(addr);
+ vfree((void *)addr);
return NULL;
}
return (void __iomem *) (offset + (char *)addr);
PMD_SECT_AP_WRITE | PMD_SECT_BUFFERABLE |
PMD_SECT_TEX(1),
.domain = DOMAIN_IO,
+ },
+ [MT_NONSHARED_DEVICE] = {
+ .prot_l1 = PMD_TYPE_TABLE,
+ .prot_sect = PMD_TYPE_SECT | PMD_SECT_NONSHARED_DEV |
+ PMD_SECT_AP_WRITE,
+ .domain = DOMAIN_IO,
}
};
static struct clk_functions *arch_clock;
/*-------------------------------------------------------------------------
- * Standard clock functions defined in asm/hardware/clock.h
+ * Standard clock functions defined in include/linux/clk.h
*-------------------------------------------------------------------------*/
struct clk * clk_get(struct device *dev, const char *id)
int ret = 0;
spin_lock_irqsave(&clockfw_lock, flags);
- if (clk->enable)
- ret = clk->enable(clk);
- else if (arch_clock->clk_enable)
+ if (arch_clock->clk_enable)
ret = arch_clock->clk_enable(clk);
- else
- printk(KERN_ERR "Could not enable clock %s\n", clk->name);
spin_unlock_irqrestore(&clockfw_lock, flags);
return ret;
unsigned long flags;
spin_lock_irqsave(&clockfw_lock, flags);
- if (clk->disable)
- clk->disable(clk);
- else if (arch_clock->clk_disable)
+ if (arch_clock->clk_disable)
arch_clock->clk_disable(clk);
- else
- printk(KERN_ERR "Could not disable clock %s\n", clk->name);
spin_unlock_irqrestore(&clockfw_lock, flags);
}
EXPORT_SYMBOL(clk_disable);
-int clk_use(struct clk *clk)
-{
- unsigned long flags;
- int ret = 0;
-
- spin_lock_irqsave(&clockfw_lock, flags);
- if (arch_clock->clk_use)
- ret = arch_clock->clk_use(clk);
- spin_unlock_irqrestore(&clockfw_lock, flags);
-
- return ret;
-}
-EXPORT_SYMBOL(clk_use);
-
-void clk_unuse(struct clk *clk)
-{
- unsigned long flags;
-
- spin_lock_irqsave(&clockfw_lock, flags);
- if (arch_clock->clk_unuse)
- arch_clock->clk_unuse(clk);
- spin_unlock_irqrestore(&clockfw_lock, flags);
-}
-EXPORT_SYMBOL(clk_unuse);
-
int clk_get_usecount(struct clk *clk)
{
unsigned long flags;
EXPORT_SYMBOL(clk_put);
/*-------------------------------------------------------------------------
- * Optional clock functions defined in asm/hardware/clock.h
+ * Optional clock functions defined in include/linux/clk.h
*-------------------------------------------------------------------------*/
long clk_round_rate(struct clk *clk, unsigned long rate)
if (IS_ERR(gpio_ick))
printk("Could not get arm_gpio_ck\n");
else
- clk_use(gpio_ick);
+ clk_enable(gpio_ick);
}
if (cpu_is_omap24xx()) {
gpio_ick = clk_get(NULL, "gpios_ick");
if (IS_ERR(gpio_ick))
printk("Could not get gpios_ick\n");
else
- clk_use(gpio_ick);
+ clk_enable(gpio_ick);
gpio_fck = clk_get(NULL, "gpios_fck");
if (IS_ERR(gpio_ick))
printk("Could not get gpios_fck\n");
else
- clk_use(gpio_fck);
+ clk_enable(gpio_fck);
}
#ifdef CONFIG_ARCH_OMAP15XX
static void omap_mcbsp_dsp_request(void)
{
if (cpu_is_omap1510() || cpu_is_omap16xx()) {
- clk_use(mcbsp_dsp_ck);
- clk_use(mcbsp_api_ck);
+ clk_enable(mcbsp_dsp_ck);
+ clk_enable(mcbsp_api_ck);
/* enable 12MHz clock to mcbsp 1 & 3 */
- clk_use(mcbsp_dspxor_ck);
+ clk_enable(mcbsp_dspxor_ck);
/*
* DSP external peripheral reset
static void omap_mcbsp_dsp_free(void)
{
if (cpu_is_omap1510() || cpu_is_omap16xx()) {
- clk_unuse(mcbsp_dspxor_ck);
- clk_unuse(mcbsp_dsp_ck);
- clk_unuse(mcbsp_api_ck);
+ clk_disable(mcbsp_dspxor_ck);
+ clk_disable(mcbsp_dsp_ck);
+ clk_disable(mcbsp_api_ck);
}
}
if (IS_ERR(ocpi_ck))
return PTR_ERR(ocpi_ck);
- clk_use(ocpi_ck);
+ clk_enable(ocpi_ck);
ocpi_enable();
printk("OMAP OCPI interconnect driver loaded\n");
if (!cpu_is_omap16xx())
return;
- clk_unuse(ocpi_ck);
+ clk_disable(ocpi_ck);
clk_put(ocpi_ck);
}
if (i < NR_IRQS) {
action = irq_desc[i].action;
if (!action)
- continue;
+ goto out;
seq_printf(p, "%3d: %10u ", i, kstat_irqs(i));
seq_printf(p, " %s", action->name);
for (action = action->next; action; action = action->next) {
show_fiq_list(p, v);
seq_printf(p, "Err: %10lu\n", irq_err_count);
}
+out:
return 0;
}
static int ptrace_setfpregs(struct task_struct *tsk, void *ufp)
{
set_stopped_child_used_math(tsk);
- return copy_from_user(&task_threas_info(tsk)->fpstate, ufp,
+ return copy_from_user(&task_thread_info(tsk)->fpstate, ufp,
sizeof(struct user_fp)) ? -EFAULT : 0;
}
unsigned long GOT;
};
-static int do_signal(sigset_t *oldset);
-
/*
* Atomically swap in the new signal mask, and wait for a signal.
*/
asmlinkage int sys_sigsuspend(int history0, int history1, old_sigset_t mask)
{
- sigset_t saveset;
-
mask &= _BLOCKABLE;
spin_lock_irq(¤t->sighand->siglock);
- saveset = current->blocked;
+ current->saved_sigmask = current->blocked;
siginitset(¤t->blocked, mask);
recalc_sigpending();
spin_unlock_irq(¤t->sighand->siglock);
- __frame->gr8 = -EINTR;
- while (1) {
- current->state = TASK_INTERRUPTIBLE;
- schedule();
- if (do_signal(&saveset))
- /* return the signal number as the return value of this function
- * - this is an utterly evil hack. syscalls should not invoke do_signal()
- * as entry.S sets regs->gr8 to the return value of the system call
- * - we can't just use sigpending() as we'd have to discard SIG_IGN signals
- * and call waitpid() if SIGCHLD needed discarding
- * - this only works on the i386 because it passes arguments to the signal
- * handler on the stack, and the return value in EAX is effectively
- * discarded
- */
- return __frame->gr8;
- }
-}
-
-asmlinkage int sys_rt_sigsuspend(sigset_t __user *unewset, size_t sigsetsize)
-{
- sigset_t saveset, newset;
-
- /* XXX: Don't preclude handling different sized sigset_t's. */
- if (sigsetsize != sizeof(sigset_t))
- return -EINVAL;
-
- if (copy_from_user(&newset, unewset, sizeof(newset)))
- return -EFAULT;
- sigdelsetmask(&newset, ~_BLOCKABLE);
-
- spin_lock_irq(¤t->sighand->siglock);
- saveset = current->blocked;
- current->blocked = newset;
- recalc_sigpending();
- spin_unlock_irq(¤t->sighand->siglock);
-
- __frame->gr8 = -EINTR;
- while (1) {
- current->state = TASK_INTERRUPTIBLE;
- schedule();
- if (do_signal(&saveset))
- /* return the signal number as the return value of this function
- * - this is an utterly evil hack. syscalls should not invoke do_signal()
- * as entry.S sets regs->gr8 to the return value of the system call
- * - we can't just use sigpending() as we'd have to discard SIG_IGN signals
- * and call waitpid() if SIGCHLD needed discarding
- * - this only works on the i386 because it passes arguments to the signal
- * handler on the stack, and the return value in EAX is effectively
- * discarded
- */
- return __frame->gr8;
- }
+ current->state = TASK_INTERRUPTIBLE;
+ schedule();
+ set_thread_flag(TIF_RESTORE_SIGMASK);
+ return -ERESTARTNOHAND;
}
asmlinkage int sys_sigaction(int sig,
frame->pretcode);
#endif
- return 1;
+ return 0;
give_sigsegv:
force_sig(SIGSEGV, current);
- return 0;
+ return -EFAULT;
} /* end setup_frame() */
frame->pretcode);
#endif
- return 1;
+ return 0;
give_sigsegv:
force_sig(SIGSEGV, current);
- return 0;
+ return -EFAULT;
} /* end setup_rt_frame() */
else
ret = setup_frame(sig, ka, oldset);
- if (ret) {
+ if (ret == 0) {
spin_lock_irq(¤t->sighand->siglock);
sigorsets(¤t->blocked, ¤t->blocked,
&ka->sa.sa_mask);
* want to handle. Thus you cannot kill init even with a SIGKILL even by
* mistake.
*/
-static int do_signal(sigset_t *oldset)
+static void do_signal(void)
{
struct k_sigaction ka;
siginfo_t info;
+ sigset_t *oldset;
int signr;
/*
* if so.
*/
if (!user_mode(__frame))
- return 1;
+ return;
if (try_to_freeze())
goto no_signal;
- if (!oldset)
+ if (test_thread_flag(TIF_RESTORE_SIGMASK))
+ oldset = ¤t->saved_sigmask;
+ else
oldset = ¤t->blocked;
signr = get_signal_to_deliver(&info, &ka, __frame, NULL);
- if (signr > 0)
- return handle_signal(signr, &info, &ka, oldset);
+ if (signr > 0) {
+ if (handle_signal(signr, &info, &ka, oldset) == 0) {
+ /* a signal was successfully delivered; the saved
+ * sigmask will have been stored in the signal frame,
+ * and will be restored by sigreturn, so we can simply
+ * clear the TIF_RESTORE_SIGMASK flag */
+ if (test_thread_flag(TIF_RESTORE_SIGMASK))
+ clear_thread_flag(TIF_RESTORE_SIGMASK);
+ }
+
+ return;
+ }
no_signal:
/* Did we come from a system call? */
if (__frame->syscallno >= 0) {
/* Restart the system call - no handlers present */
- if (__frame->gr8 == -ERESTARTNOHAND ||
- __frame->gr8 == -ERESTARTSYS ||
- __frame->gr8 == -ERESTARTNOINTR) {
+ switch (__frame->gr8) {
+ case -ERESTARTNOHAND:
+ case -ERESTARTSYS:
+ case -ERESTARTNOINTR:
__frame->gr8 = __frame->orig_gr8;
__frame->pc -= 4;
- }
+ break;
- if (__frame->gr8 == -ERESTART_RESTARTBLOCK){
+ case -ERESTART_RESTARTBLOCK:
__frame->gr8 = __NR_restart_syscall;
__frame->pc -= 4;
+ break;
}
}
- return 0;
+ /* if there's no signal to deliver, we just put the saved sigmask
+ * back */
+ if (test_thread_flag(TIF_RESTORE_SIGMASK)) {
+ clear_thread_flag(TIF_RESTORE_SIGMASK);
+ sigprocmask(SIG_SETMASK, ¤t->saved_sigmask, NULL);
+ }
} /* end do_signal() */
/*****************************************************************************/
/*
* notification of userspace execution resumption
- * - triggered by current->work.notify_resume
+ * - triggered by the TIF_WORK_MASK flags
*/
asmlinkage void do_notify_resume(__u32 thread_info_flags)
{
clear_thread_flag(TIF_SINGLESTEP);
/* deal with pending signal delivery */
- if (thread_info_flags & _TIF_SIGPENDING)
- do_signal(NULL);
+ if (thread_info_flags & (_TIF_SIGPENDING | _TIF_RESTORE_SIGMASK))
+ do_signal();
} /* end do_notify_resume() */
# CPU-specific tuning. Anything which can be shared with UML should go here.
include $(srctree)/arch/i386/Makefile.cpu
-# -mregparm=3 works ok on gcc-3.0 and later
-#
-cflags-$(CONFIG_REGPARM) += $(shell if [ $(call cc-version) -ge 0300 ] ; then \
- echo "-mregparm=3"; fi ;)
+cflags-$(CONFIG_REGPARM) += -mregparm=3
# Disable unit-at-a-time mode on pre-gcc-4.0 compilers, it makes gcc use
# a lot more stack due to the lack of sharing of stacklots:
# CONFIG_ACENIC is not set
# CONFIG_DL2K is not set
# CONFIG_E1000 is not set
+# CONFIG_E1000_NAPI is not set
+# CONFIG_E1000_DISABLE_PACKET_SPLIT is not set
# CONFIG_NS83820 is not set
# CONFIG_HAMACHI is not set
# CONFIG_YELLOWFIN is not set
config X86_GX_SUSPMOD
tristate "Cyrix MediaGX/NatSemi Geode Suspend Modulation"
+ depends on PCI
help
This add the CPUFreq driver for NatSemi Geode processors which
support suspend modulation.
static int has_N44_O17_errata[NR_CPUS];
+static int has_N60_errata[NR_CPUS];
static unsigned int stock_freq;
static struct cpufreq_driver p4clockmod_driver;
static unsigned int cpufreq_p4_get(unsigned int cpu);
case 0x0f12:
has_N44_O17_errata[policy->cpu] = 1;
dprintk("has errata -- disabling low frequencies\n");
+ break;
+
+ case 0x0f29:
+ has_N60_errata[policy->cpu] = 1;
+ dprintk("has errata -- disabling frequencies lower than 2ghz\n");
+ break;
}
/* get max frequency */
for (i=1; (p4clockmod_table[i].frequency != CPUFREQ_TABLE_END); i++) {
if ((i<2) && (has_N44_O17_errata[policy->cpu]))
p4clockmod_table[i].frequency = CPUFREQ_ENTRY_INVALID;
+ else if (has_N60_errata[policy->cpu] && p4clockmod_table[i].frequency < 2000000)
+ p4clockmod_table[i].frequency = CPUFREQ_ENTRY_INVALID;
else
p4clockmod_table[i].frequency = (stock_freq * i)/8;
}
/* enable access to config space*/
pci_read_config_byte(dev, 0xf4, &config);
- config |= 0x2;
- pci_write_config_byte(dev, 0xf4, config);
+ pci_write_config_byte(dev, 0xf4, config|0x2);
/* read xTPR register */
raw_pci_ops->read(0, 0, 0x40, 0x4c, 2, &word);
#endif
}
- config &= ~0x2;
- /* disable access to config space*/
- pci_write_config_byte(dev, 0xf4, config);
+ /* put back the original value for config space*/
+ if (!(config & 0x2))
+ pci_write_config_byte(dev, 0xf4, config);
}
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_E7320_MCH, quirk_intel_irqbalance);
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_E7525_MCH, quirk_intel_irqbalance);
asmlinkage int
sys_sigsuspend(int history0, int history1, old_sigset_t mask)
{
- struct pt_regs * regs = (struct pt_regs *) &history0;
- sigset_t saveset;
-
mask &= _BLOCKABLE;
spin_lock_irq(¤t->sighand->siglock);
- saveset = current->blocked;
+ current->saved_sigmask = current->blocked;
siginitset(¤t->blocked, mask);
recalc_sigpending();
spin_unlock_irq(¤t->sighand->siglock);
- regs->eax = -EINTR;
- while (1) {
- current->state = TASK_INTERRUPTIBLE;
- schedule();
- if (do_signal(regs, &saveset))
- return -EINTR;
- }
-}
-
-asmlinkage int
-sys_rt_sigsuspend(struct pt_regs regs)
-{
- sigset_t saveset, newset;
-
- /* XXX: Don't preclude handling different sized sigset_t's. */
- if (regs.ecx != sizeof(sigset_t))
- return -EINVAL;
-
- if (copy_from_user(&newset, (sigset_t __user *)regs.ebx, sizeof(newset)))
- return -EFAULT;
- sigdelsetmask(&newset, ~_BLOCKABLE);
-
- spin_lock_irq(¤t->sighand->siglock);
- saveset = current->blocked;
- current->blocked = newset;
- recalc_sigpending();
- spin_unlock_irq(¤t->sighand->siglock);
-
- regs.eax = -EINTR;
- while (1) {
- current->state = TASK_INTERRUPTIBLE;
- schedule();
- if (do_signal(®s, &saveset))
- return -EINTR;
- }
+ current->state = TASK_INTERRUPTIBLE;
+ schedule();
+ set_thread_flag(TIF_RESTORE_SIGMASK);
+ return -ERESTARTNOHAND;
}
asmlinkage int
current->comm, current->pid, frame, regs->eip, frame->pretcode);
#endif
- return 1;
+ return 0;
give_sigsegv:
force_sigsegv(sig, current);
- return 0;
+ return -EFAULT;
}
static int setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info,
current->comm, current->pid, frame, regs->eip, frame->pretcode);
#endif
- return 1;
+ return 0;
give_sigsegv:
force_sigsegv(sig, current);
- return 0;
+ return -EFAULT;
}
/*
else
ret = setup_frame(sig, ka, oldset, regs);
- if (ret) {
+ if (ret == 0) {
spin_lock_irq(¤t->sighand->siglock);
sigorsets(¤t->blocked,¤t->blocked,&ka->sa.sa_mask);
if (!(ka->sa.sa_flags & SA_NODEFER))
* want to handle. Thus you cannot kill init even with a SIGKILL even by
* mistake.
*/
-int fastcall do_signal(struct pt_regs *regs, sigset_t *oldset)
+static void fastcall do_signal(struct pt_regs *regs)
{
siginfo_t info;
int signr;
struct k_sigaction ka;
+ sigset_t *oldset;
/*
* We want the common case to go fast, which
* CS suffices.
*/
if (!user_mode(regs))
- return 1;
+ return;
if (try_to_freeze())
goto no_signal;
- if (!oldset)
+ if (test_thread_flag(TIF_RESTORE_SIGMASK))
+ oldset = ¤t->saved_sigmask;
+ else
oldset = ¤t->blocked;
signr = get_signal_to_deliver(&info, &ka, regs, NULL);
* have been cleared if the watchpoint triggered
* inside the kernel.
*/
- if (unlikely(current->thread.debugreg[7])) {
+ if (unlikely(current->thread.debugreg[7]))
set_debugreg(current->thread.debugreg[7], 7);
- }
/* Whee! Actually deliver the signal. */
- return handle_signal(signr, &info, &ka, oldset, regs);
+ if (handle_signal(signr, &info, &ka, oldset, regs) == 0) {
+ /* a signal was successfully delivered; the saved
+ * sigmask will have been stored in the signal frame,
+ * and will be restored by sigreturn, so we can simply
+ * clear the TIF_RESTORE_SIGMASK flag */
+ if (test_thread_flag(TIF_RESTORE_SIGMASK))
+ clear_thread_flag(TIF_RESTORE_SIGMASK);
+ }
+
+ return;
}
- no_signal:
+no_signal:
/* Did we come from a system call? */
if (regs->orig_eax >= 0) {
/* Restart the system call - no handlers present */
- if (regs->eax == -ERESTARTNOHAND ||
- regs->eax == -ERESTARTSYS ||
- regs->eax == -ERESTARTNOINTR) {
+ switch (regs->eax) {
+ case -ERESTARTNOHAND:
+ case -ERESTARTSYS:
+ case -ERESTARTNOINTR:
regs->eax = regs->orig_eax;
regs->eip -= 2;
- }
- if (regs->eax == -ERESTART_RESTARTBLOCK){
+ break;
+
+ case -ERESTART_RESTARTBLOCK:
regs->eax = __NR_restart_syscall;
regs->eip -= 2;
+ break;
}
}
- return 0;
+
+ /* if there's no signal to deliver, we just put the saved sigmask
+ * back */
+ if (test_thread_flag(TIF_RESTORE_SIGMASK)) {
+ clear_thread_flag(TIF_RESTORE_SIGMASK);
+ sigprocmask(SIG_SETMASK, ¤t->saved_sigmask, NULL);
+ }
}
/*
* notification of userspace execution resumption
- * - triggered by current->work.notify_resume
+ * - triggered by the TIF_WORK_MASK flags
*/
__attribute__((regparm(3)))
-void do_notify_resume(struct pt_regs *regs, sigset_t *oldset,
+void do_notify_resume(struct pt_regs *regs, void *_unused,
__u32 thread_info_flags)
{
/* Pending single-step? */
regs->eflags |= TF_MASK;
clear_thread_flag(TIF_SINGLESTEP);
}
+
/* deal with pending signal delivery */
- if (thread_info_flags & _TIF_SIGPENDING)
- do_signal(regs,oldset);
+ if (thread_info_flags & (_TIF_SIGPENDING | _TIF_RESTORE_SIGMASK))
+ do_signal(regs);
clear_thread_flag(TIF_IRET);
}
.long sys_inotify_add_watch
.long sys_inotify_rm_watch
.long sys_migrate_pages
+ .long sys_openat /* 295 */
+ .long sys_mkdirat
+ .long sys_mknodat
+ .long sys_fchownat
+ .long sys_futimesat
+ .long sys_newfstatat /* 300 */
+ .long sys_unlinkat
+ .long sys_renameat
+ .long sys_linkat
+ .long sys_symlinkat
+ .long sys_readlinkat /* 305 */
+ .long sys_fchmodat
+ .long sys_faccessat
+ .long sys_pselect6
+ .long sys_ppoll
pkmap_page_table = pte;
}
-static void __devinit free_new_highpage(struct page *page)
+static void __meminit free_new_highpage(struct page *page)
{
set_page_count(page, 1);
__free_page(page);
# CONFIG_DL2K is not set
CONFIG_E1000=y
# CONFIG_E1000_NAPI is not set
+# CONFIG_E1000_DISABLE_PACKET_SPLIT is not set
# CONFIG_NS83820 is not set
# CONFIG_HAMACHI is not set
# CONFIG_YELLOWFIN is not set
# CONFIG_DL2K is not set
CONFIG_E1000=y
# CONFIG_E1000_NAPI is not set
+# CONFIG_E1000_DISABLE_PACKET_SPLIT is not set
# CONFIG_NS83820 is not set
# CONFIG_HAMACHI is not set
# CONFIG_YELLOWFIN is not set
# CONFIG_DL2K is not set
CONFIG_E1000=y
# CONFIG_E1000_NAPI is not set
+# CONFIG_E1000_DISABLE_PACKET_SPLIT is not set
# CONFIG_NS83820 is not set
# CONFIG_HAMACHI is not set
# CONFIG_YELLOWFIN is not set
# CONFIG_DL2K is not set
CONFIG_E1000=y
# CONFIG_E1000_NAPI is not set
+# CONFIG_E1000_DISABLE_PACKET_SPLIT is not set
# CONFIG_NS83820 is not set
# CONFIG_HAMACHI is not set
# CONFIG_YELLOWFIN is not set
#include <linux/compat.h>
#include <linux/vfs.h>
#include <linux/mman.h>
+#include <linux/mutex.h>
#include <asm/intrinsics.h>
-#include <asm/semaphore.h>
#include <asm/types.h>
#include <asm/uaccess.h>
#include <asm/unistd.h>
* while doing so.
*/
/* XXX make per-mm: */
-static DECLARE_MUTEX(ia32_mmap_sem);
+static DEFINE_MUTEX(ia32_mmap_mutex);
asmlinkage long
sys32_execve (char __user *name, compat_uptr_t __user *argv, compat_uptr_t __user *envp,
prot = get_prot32(prot);
#if PAGE_SHIFT > IA32_PAGE_SHIFT
- down(&ia32_mmap_sem);
+ mutex_lock(&ia32_mmap_mutex);
{
addr = emulate_mmap(file, addr, len, prot, flags, offset);
}
- up(&ia32_mmap_sem);
+ mutex_unlock(&ia32_mmap_mutex);
#else
down_write(¤t->mm->mmap_sem);
{
if (start >= end)
return 0;
- down(&ia32_mmap_sem);
- {
- ret = sys_munmap(start, end - start);
- }
- up(&ia32_mmap_sem);
+ mutex_lock(&ia32_mmap_mutex);
+ ret = sys_munmap(start, end - start);
+ mutex_unlock(&ia32_mmap_mutex);
#endif
return ret;
}
if (retval < 0)
return retval;
- down(&ia32_mmap_sem);
+ mutex_lock(&ia32_mmap_mutex);
{
if (offset_in_page(start)) {
/* start address is 4KB aligned but not page aligned. */
retval = sys_mprotect(start, end - start, prot);
}
out:
- up(&ia32_mmap_sem);
+ mutex_unlock(&ia32_mmap_mutex);
return retval;
#endif
}
old_len = PAGE_ALIGN(old_end) - addr;
new_len = PAGE_ALIGN(new_end) - addr;
- down(&ia32_mmap_sem);
- {
- ret = sys_mremap(addr, old_len, new_len, flags, new_addr);
- }
- up(&ia32_mmap_sem);
+ mutex_lock(&ia32_mmap_mutex);
+ ret = sys_mremap(addr, old_len, new_len, flags, new_addr);
+ mutex_unlock(&ia32_mmap_mutex);
if ((ret >= 0) && (old_len < new_len)) {
/* mremap expanded successfully */
st8 [temp1]=r12 // os_status, default is cold boot
mov r6=IA64_MCA_SAME_CONTEXT
;;
- st8 [temp1]=r6 // context, default is same context
+ st8 [temp2]=r6 // context, default is same context
// Save the pt_regs data that is not in minstate. The previous code
// left regs at sos.
#include <linux/bitops.h>
#include <linux/capability.h>
#include <linux/rcupdate.h>
+#include <linux/completion.h>
#include <asm/errno.h>
#include <asm/intrinsics.h>
unsigned long ctx_ovfl_regs[4]; /* which registers overflowed (notification) */
- struct semaphore ctx_restart_sem; /* use for blocking notification mode */
+ struct completion ctx_restart_done; /* use for blocking notification mode */
unsigned long ctx_used_pmds[4]; /* bitmask of PMD used */
unsigned long ctx_all_pmds[4]; /* bitmask of all accessible PMDs */
#include "perfmon_itanium.h"
#include "perfmon_mckinley.h"
+#include "perfmon_montecito.h"
#include "perfmon_generic.h"
static pmu_config_t *pmu_confs[]={
+ &pmu_conf_mont,
&pmu_conf_mck,
&pmu_conf_ita,
&pmu_conf_gen, /* must be last */
/*
* force task to wake up from MASKED state
*/
- up(&ctx->ctx_restart_sem);
+ complete(&ctx->ctx_restart_done);
DPRINT(("waking up ctx_state=%d\n", state));
/*
* init restart semaphore to locked
*/
- sema_init(&ctx->ctx_restart_sem, 0);
+ init_completion(&ctx->ctx_restart_done);
/*
* activation is used in SMP only
*/
if (CTX_OVFL_NOBLOCK(ctx) == 0 && state == PFM_CTX_MASKED) {
DPRINT(("unblocking [%d] \n", task->pid));
- up(&ctx->ctx_restart_sem);
+ complete(&ctx->ctx_restart_done);
} else {
DPRINT(("[%d] armed exit trap\n", task->pid));
* may go through without blocking on SMP systems
* if restart has been received already by the time we call down()
*/
- ret = down_interruptible(&ctx->ctx_restart_sem);
+ ret = wait_for_completion_interruptible(&ctx->ctx_restart_done);
DPRINT(("after block sleeping ret=%d\n", ret));
--- /dev/null
+/*
+ * This file contains the Montecito PMU register description tables
+ * and pmc checker used by perfmon.c.
+ *
+ * Copyright (c) 2005-2006 Hewlett-Packard Development Company, L.P.
+ * Contributed by Stephane Eranian <eranian@hpl.hp.com>
+ */
+static int pfm_mont_pmc_check(struct task_struct *task, pfm_context_t *ctx, unsigned int cnum, unsigned long *val, struct pt_regs *regs);
+
+#define RDEP_MONT_ETB (RDEP(38)|RDEP(39)|RDEP(48)|RDEP(49)|RDEP(50)|RDEP(51)|RDEP(52)|RDEP(53)|RDEP(54)|\
+ RDEP(55)|RDEP(56)|RDEP(57)|RDEP(58)|RDEP(59)|RDEP(60)|RDEP(61)|RDEP(62)|RDEP(63))
+#define RDEP_MONT_DEAR (RDEP(32)|RDEP(33)|RDEP(36))
+#define RDEP_MONT_IEAR (RDEP(34)|RDEP(35))
+
+static pfm_reg_desc_t pfm_mont_pmc_desc[PMU_MAX_PMCS]={
+/* pmc0 */ { PFM_REG_CONTROL , 0, 0x0, -1, NULL, NULL, {0,0, 0, 0}, {0,0, 0, 0}},
+/* pmc1 */ { PFM_REG_CONTROL , 0, 0x0, -1, NULL, NULL, {0,0, 0, 0}, {0,0, 0, 0}},
+/* pmc2 */ { PFM_REG_CONTROL , 0, 0x0, -1, NULL, NULL, {0,0, 0, 0}, {0,0, 0, 0}},
+/* pmc3 */ { PFM_REG_CONTROL , 0, 0x0, -1, NULL, NULL, {0,0, 0, 0}, {0,0, 0, 0}},
+/* pmc4 */ { PFM_REG_COUNTING, 6, 0x2000000, 0x7c7fff7f, NULL, pfm_mont_pmc_check, {RDEP(4),0, 0, 0}, {0,0, 0, 0}},
+/* pmc5 */ { PFM_REG_COUNTING, 6, 0x2000000, 0x7c7fff7f, NULL, pfm_mont_pmc_check, {RDEP(5),0, 0, 0}, {0,0, 0, 0}},
+/* pmc6 */ { PFM_REG_COUNTING, 6, 0x2000000, 0x7c7fff7f, NULL, pfm_mont_pmc_check, {RDEP(6),0, 0, 0}, {0,0, 0, 0}},
+/* pmc7 */ { PFM_REG_COUNTING, 6, 0x2000000, 0x7c7fff7f, NULL, pfm_mont_pmc_check, {RDEP(7),0, 0, 0}, {0,0, 0, 0}},
+/* pmc8 */ { PFM_REG_COUNTING, 6, 0x2000000, 0x7c7fff7f, NULL, pfm_mont_pmc_check, {RDEP(8),0, 0, 0}, {0,0, 0, 0}},
+/* pmc9 */ { PFM_REG_COUNTING, 6, 0x2000000, 0x7c7fff7f, NULL, pfm_mont_pmc_check, {RDEP(9),0, 0, 0}, {0,0, 0, 0}},
+/* pmc10 */ { PFM_REG_COUNTING, 6, 0x2000000, 0x7c7fff7f, NULL, pfm_mont_pmc_check, {RDEP(10),0, 0, 0}, {0,0, 0, 0}},
+/* pmc11 */ { PFM_REG_COUNTING, 6, 0x2000000, 0x7c7fff7f, NULL, pfm_mont_pmc_check, {RDEP(11),0, 0, 0}, {0,0, 0, 0}},
+/* pmc12 */ { PFM_REG_COUNTING, 6, 0x2000000, 0x7c7fff7f, NULL, pfm_mont_pmc_check, {RDEP(12),0, 0, 0}, {0,0, 0, 0}},
+/* pmc13 */ { PFM_REG_COUNTING, 6, 0x2000000, 0x7c7fff7f, NULL, pfm_mont_pmc_check, {RDEP(13),0, 0, 0}, {0,0, 0, 0}},
+/* pmc14 */ { PFM_REG_COUNTING, 6, 0x2000000, 0x7c7fff7f, NULL, pfm_mont_pmc_check, {RDEP(14),0, 0, 0}, {0,0, 0, 0}},
+/* pmc15 */ { PFM_REG_COUNTING, 6, 0x2000000, 0x7c7fff7f, NULL, pfm_mont_pmc_check, {RDEP(15),0, 0, 0}, {0,0, 0, 0}},
+/* pmc16 */ { PFM_REG_NOTIMPL, },
+/* pmc17 */ { PFM_REG_NOTIMPL, },
+/* pmc18 */ { PFM_REG_NOTIMPL, },
+/* pmc19 */ { PFM_REG_NOTIMPL, },
+/* pmc20 */ { PFM_REG_NOTIMPL, },
+/* pmc21 */ { PFM_REG_NOTIMPL, },
+/* pmc22 */ { PFM_REG_NOTIMPL, },
+/* pmc23 */ { PFM_REG_NOTIMPL, },
+/* pmc24 */ { PFM_REG_NOTIMPL, },
+/* pmc25 */ { PFM_REG_NOTIMPL, },
+/* pmc26 */ { PFM_REG_NOTIMPL, },
+/* pmc27 */ { PFM_REG_NOTIMPL, },
+/* pmc28 */ { PFM_REG_NOTIMPL, },
+/* pmc29 */ { PFM_REG_NOTIMPL, },
+/* pmc30 */ { PFM_REG_NOTIMPL, },
+/* pmc31 */ { PFM_REG_NOTIMPL, },
+/* pmc32 */ { PFM_REG_CONFIG, 0, 0x30f01ffffffffff, 0x30f01ffffffffff, NULL, pfm_mont_pmc_check, {0,0, 0, 0}, {0,0, 0, 0}},
+/* pmc33 */ { PFM_REG_CONFIG, 0, 0x0, 0x1ffffffffff, NULL, pfm_mont_pmc_check, {0,0, 0, 0}, {0,0, 0, 0}},
+/* pmc34 */ { PFM_REG_CONFIG, 0, 0xf01ffffffffff, 0xf01ffffffffff, NULL, pfm_mont_pmc_check, {0,0, 0, 0}, {0,0, 0, 0}},
+/* pmc35 */ { PFM_REG_CONFIG, 0, 0x0, 0x1ffffffffff, NULL, pfm_mont_pmc_check, {0,0, 0, 0}, {0,0, 0, 0}},
+/* pmc36 */ { PFM_REG_CONFIG, 0, 0xfffffff0, 0xf, NULL, pfm_mont_pmc_check, {0,0, 0, 0}, {0,0, 0, 0}},
+/* pmc37 */ { PFM_REG_MONITOR, 4, 0x0, 0x3fff, NULL, pfm_mont_pmc_check, {RDEP_MONT_IEAR, 0, 0, 0}, {0, 0, 0, 0}},
+/* pmc38 */ { PFM_REG_CONFIG, 0, 0xdb6, 0x2492, NULL, pfm_mont_pmc_check, {0,0, 0, 0}, {0,0, 0, 0}},
+/* pmc39 */ { PFM_REG_MONITOR, 6, 0x0, 0xffcf, NULL, pfm_mont_pmc_check, {RDEP_MONT_ETB,0, 0, 0}, {0,0, 0, 0}},
+/* pmc40 */ { PFM_REG_MONITOR, 6, 0x2000000, 0xf01cf, NULL, pfm_mont_pmc_check, {RDEP_MONT_DEAR,0, 0, 0}, {0,0, 0, 0}},
+/* pmc41 */ { PFM_REG_CONFIG, 0, 0x00002078fefefefe, 0x1e00018181818, NULL, pfm_mont_pmc_check, {0,0, 0, 0}, {0,0, 0, 0}},
+/* pmc42 */ { PFM_REG_MONITOR, 6, 0x0, 0x7ff4f, NULL, pfm_mont_pmc_check, {RDEP_MONT_ETB,0, 0, 0}, {0,0, 0, 0}},
+ { PFM_REG_END , 0, 0x0, -1, NULL, NULL, {0,}, {0,}}, /* end marker */
+};
+
+static pfm_reg_desc_t pfm_mont_pmd_desc[PMU_MAX_PMDS]={
+/* pmd0 */ { PFM_REG_NOTIMPL, },
+/* pmd1 */ { PFM_REG_NOTIMPL, },
+/* pmd2 */ { PFM_REG_NOTIMPL, },
+/* pmd3 */ { PFM_REG_NOTIMPL, },
+/* pmd4 */ { PFM_REG_COUNTING, 0, 0x0, -1, NULL, NULL, {0,0, 0, 0}, {RDEP(4),0, 0, 0}},
+/* pmd5 */ { PFM_REG_COUNTING, 0, 0x0, -1, NULL, NULL, {0,0, 0, 0}, {RDEP(5),0, 0, 0}},
+/* pmd6 */ { PFM_REG_COUNTING, 0, 0x0, -1, NULL, NULL, {0,0, 0, 0}, {RDEP(6),0, 0, 0}},
+/* pmd7 */ { PFM_REG_COUNTING, 0, 0x0, -1, NULL, NULL, {0,0, 0, 0}, {RDEP(7),0, 0, 0}},
+/* pmd8 */ { PFM_REG_COUNTING, 0, 0x0, -1, NULL, NULL, {0,0, 0, 0}, {RDEP(8),0, 0, 0}},
+/* pmd9 */ { PFM_REG_COUNTING, 0, 0x0, -1, NULL, NULL, {0,0, 0, 0}, {RDEP(9),0, 0, 0}},
+/* pmd10 */ { PFM_REG_COUNTING, 0, 0x0, -1, NULL, NULL, {0,0, 0, 0}, {RDEP(10),0, 0, 0}},
+/* pmd11 */ { PFM_REG_COUNTING, 0, 0x0, -1, NULL, NULL, {0,0, 0, 0}, {RDEP(11),0, 0, 0}},
+/* pmd12 */ { PFM_REG_COUNTING, 0, 0x0, -1, NULL, NULL, {0,0, 0, 0}, {RDEP(12),0, 0, 0}},
+/* pmd13 */ { PFM_REG_COUNTING, 0, 0x0, -1, NULL, NULL, {0,0, 0, 0}, {RDEP(13),0, 0, 0}},
+/* pmd14 */ { PFM_REG_COUNTING, 0, 0x0, -1, NULL, NULL, {0,0, 0, 0}, {RDEP(14),0, 0, 0}},
+/* pmd15 */ { PFM_REG_COUNTING, 0, 0x0, -1, NULL, NULL, {0,0, 0, 0}, {RDEP(15),0, 0, 0}},
+/* pmd16 */ { PFM_REG_NOTIMPL, },
+/* pmd17 */ { PFM_REG_NOTIMPL, },
+/* pmd18 */ { PFM_REG_NOTIMPL, },
+/* pmd19 */ { PFM_REG_NOTIMPL, },
+/* pmd20 */ { PFM_REG_NOTIMPL, },
+/* pmd21 */ { PFM_REG_NOTIMPL, },
+/* pmd22 */ { PFM_REG_NOTIMPL, },
+/* pmd23 */ { PFM_REG_NOTIMPL, },
+/* pmd24 */ { PFM_REG_NOTIMPL, },
+/* pmd25 */ { PFM_REG_NOTIMPL, },
+/* pmd26 */ { PFM_REG_NOTIMPL, },
+/* pmd27 */ { PFM_REG_NOTIMPL, },
+/* pmd28 */ { PFM_REG_NOTIMPL, },
+/* pmd29 */ { PFM_REG_NOTIMPL, },
+/* pmd30 */ { PFM_REG_NOTIMPL, },
+/* pmd31 */ { PFM_REG_NOTIMPL, },
+/* pmd32 */ { PFM_REG_BUFFER, 0, 0x0, -1, NULL, NULL, {RDEP(33)|RDEP(36),0, 0, 0}, {RDEP(40),0, 0, 0}},
+/* pmd33 */ { PFM_REG_BUFFER, 0, 0x0, -1, NULL, NULL, {RDEP(32)|RDEP(36),0, 0, 0}, {RDEP(40),0, 0, 0}},
+/* pmd34 */ { PFM_REG_BUFFER, 0, 0x0, -1, NULL, NULL, {RDEP(35),0, 0, 0}, {RDEP(37),0, 0, 0}},
+/* pmd35 */ { PFM_REG_BUFFER, 0, 0x0, -1, NULL, NULL, {RDEP(34),0, 0, 0}, {RDEP(37),0, 0, 0}},
+/* pmd36 */ { PFM_REG_BUFFER, 0, 0x0, -1, NULL, NULL, {RDEP(32)|RDEP(33),0, 0, 0}, {RDEP(40),0, 0, 0}},
+/* pmd37 */ { PFM_REG_NOTIMPL, },
+/* pmd38 */ { PFM_REG_BUFFER, 0, 0x0, -1, NULL, NULL, {RDEP_MONT_ETB,0, 0, 0}, {RDEP(39),0, 0, 0}},
+/* pmd39 */ { PFM_REG_BUFFER, 0, 0x0, -1, NULL, NULL, {RDEP_MONT_ETB,0, 0, 0}, {RDEP(39),0, 0, 0}},
+/* pmd40 */ { PFM_REG_NOTIMPL, },
+/* pmd41 */ { PFM_REG_NOTIMPL, },
+/* pmd42 */ { PFM_REG_NOTIMPL, },
+/* pmd43 */ { PFM_REG_NOTIMPL, },
+/* pmd44 */ { PFM_REG_NOTIMPL, },
+/* pmd45 */ { PFM_REG_NOTIMPL, },
+/* pmd46 */ { PFM_REG_NOTIMPL, },
+/* pmd47 */ { PFM_REG_NOTIMPL, },
+/* pmd48 */ { PFM_REG_BUFFER, 0, 0x0, -1, NULL, NULL, {RDEP_MONT_ETB,0, 0, 0}, {RDEP(39),0, 0, 0}},
+/* pmd49 */ { PFM_REG_BUFFER, 0, 0x0, -1, NULL, NULL, {RDEP_MONT_ETB,0, 0, 0}, {RDEP(39),0, 0, 0}},
+/* pmd50 */ { PFM_REG_BUFFER, 0, 0x0, -1, NULL, NULL, {RDEP_MONT_ETB,0, 0, 0}, {RDEP(39),0, 0, 0}},
+/* pmd51 */ { PFM_REG_BUFFER, 0, 0x0, -1, NULL, NULL, {RDEP_MONT_ETB,0, 0, 0}, {RDEP(39),0, 0, 0}},
+/* pmd52 */ { PFM_REG_BUFFER, 0, 0x0, -1, NULL, NULL, {RDEP_MONT_ETB,0, 0, 0}, {RDEP(39),0, 0, 0}},
+/* pmd53 */ { PFM_REG_BUFFER, 0, 0x0, -1, NULL, NULL, {RDEP_MONT_ETB,0, 0, 0}, {RDEP(39),0, 0, 0}},
+/* pmd54 */ { PFM_REG_BUFFER, 0, 0x0, -1, NULL, NULL, {RDEP_MONT_ETB,0, 0, 0}, {RDEP(39),0, 0, 0}},
+/* pmd55 */ { PFM_REG_BUFFER, 0, 0x0, -1, NULL, NULL, {RDEP_MONT_ETB,0, 0, 0}, {RDEP(39),0, 0, 0}},
+/* pmd56 */ { PFM_REG_BUFFER, 0, 0x0, -1, NULL, NULL, {RDEP_MONT_ETB,0, 0, 0}, {RDEP(39),0, 0, 0}},
+/* pmd57 */ { PFM_REG_BUFFER, 0, 0x0, -1, NULL, NULL, {RDEP_MONT_ETB,0, 0, 0}, {RDEP(39),0, 0, 0}},
+/* pmd58 */ { PFM_REG_BUFFER, 0, 0x0, -1, NULL, NULL, {RDEP_MONT_ETB,0, 0, 0}, {RDEP(39),0, 0, 0}},
+/* pmd59 */ { PFM_REG_BUFFER, 0, 0x0, -1, NULL, NULL, {RDEP_MONT_ETB,0, 0, 0}, {RDEP(39),0, 0, 0}},
+/* pmd60 */ { PFM_REG_BUFFER, 0, 0x0, -1, NULL, NULL, {RDEP_MONT_ETB,0, 0, 0}, {RDEP(39),0, 0, 0}},
+/* pmd61 */ { PFM_REG_BUFFER, 0, 0x0, -1, NULL, NULL, {RDEP_MONT_ETB,0, 0, 0}, {RDEP(39),0, 0, 0}},
+/* pmd62 */ { PFM_REG_BUFFER, 0, 0x0, -1, NULL, NULL, {RDEP_MONT_ETB,0, 0, 0}, {RDEP(39),0, 0, 0}},
+/* pmd63 */ { PFM_REG_BUFFER, 0, 0x0, -1, NULL, NULL, {RDEP_MONT_ETB,0, 0, 0}, {RDEP(39),0, 0, 0}},
+ { PFM_REG_END , 0, 0x0, -1, NULL, NULL, {0,}, {0,}}, /* end marker */
+};
+
+/*
+ * PMC reserved fields must have their power-up values preserved
+ */
+static int
+pfm_mont_reserved(unsigned int cnum, unsigned long *val, struct pt_regs *regs)
+{
+ unsigned long tmp1, tmp2, ival = *val;
+
+ /* remove reserved areas from user value */
+ tmp1 = ival & PMC_RSVD_MASK(cnum);
+
+ /* get reserved fields values */
+ tmp2 = PMC_DFL_VAL(cnum) & ~PMC_RSVD_MASK(cnum);
+
+ *val = tmp1 | tmp2;
+
+ DPRINT(("pmc[%d]=0x%lx, mask=0x%lx, reset=0x%lx, val=0x%lx\n",
+ cnum, ival, PMC_RSVD_MASK(cnum), PMC_DFL_VAL(cnum), *val));
+ return 0;
+}
+
+/*
+ * task can be NULL if the context is unloaded
+ */
+static int
+pfm_mont_pmc_check(struct task_struct *task, pfm_context_t *ctx, unsigned int cnum, unsigned long *val, struct pt_regs *regs)
+{
+ int ret = 0;
+ unsigned long val32 = 0, val38 = 0, val41 = 0;
+ unsigned long tmpval;
+ int check_case1 = 0;
+ int is_loaded;
+
+ /* first preserve the reserved fields */
+ pfm_mont_reserved(cnum, val, regs);
+
+ tmpval = *val;
+
+ /* sanity check */
+ if (ctx == NULL) return -EINVAL;
+
+ is_loaded = ctx->ctx_state == PFM_CTX_LOADED || ctx->ctx_state == PFM_CTX_MASKED;
+
+ /*
+ * we must clear the debug registers if pmc41 has a value which enable
+ * memory pipeline event constraints. In this case we need to clear the
+ * the debug registers if they have not yet been accessed. This is required
+ * to avoid picking stale state.
+ * PMC41 is "active" if:
+ * one of the pmc41.cfg_dtagXX field is different from 0x3
+ * AND
+ * at the corresponding pmc41.en_dbrpXX is set.
+ * AND
+ * ctx_fl_using_dbreg == 0 (i.e., dbr not yet used)
+ */
+ DPRINT(("cnum=%u val=0x%lx, using_dbreg=%d loaded=%d\n", cnum, tmpval, ctx->ctx_fl_using_dbreg, is_loaded));
+
+ if (cnum == 41 && is_loaded
+ && (tmpval & 0x1e00000000000) && (tmpval & 0x18181818UL) != 0x18181818UL && ctx->ctx_fl_using_dbreg == 0) {
+
+ DPRINT(("pmc[%d]=0x%lx has active pmc41 settings, clearing dbr\n", cnum, tmpval));
+
+ /* don't mix debug with perfmon */
+ if (task && (task->thread.flags & IA64_THREAD_DBG_VALID) != 0) return -EINVAL;
+
+ /*
+ * a count of 0 will mark the debug registers if:
+ * AND
+ */
+ ret = pfm_write_ibr_dbr(PFM_DATA_RR, ctx, NULL, 0, regs);
+ if (ret) return ret;
+ }
+ /*
+ * we must clear the (instruction) debug registers if:
+ * pmc38.ig_ibrpX is 0 (enabled)
+ * AND
+ * ctx_fl_using_dbreg == 0 (i.e., dbr not yet used)
+ */
+ if (cnum == 38 && is_loaded && ((tmpval & 0x492UL) != 0x492UL) && ctx->ctx_fl_using_dbreg == 0) {
+
+ DPRINT(("pmc38=0x%lx has active pmc38 settings, clearing ibr\n", tmpval));
+
+ /* don't mix debug with perfmon */
+ if (task && (task->thread.flags & IA64_THREAD_DBG_VALID) != 0) return -EINVAL;
+
+ /*
+ * a count of 0 will mark the debug registers as in use and also
+ * ensure that they are properly cleared.
+ */
+ ret = pfm_write_ibr_dbr(PFM_CODE_RR, ctx, NULL, 0, regs);
+ if (ret) return ret;
+
+ }
+ switch(cnum) {
+ case 32: val32 = *val;
+ val38 = ctx->ctx_pmcs[38];
+ val41 = ctx->ctx_pmcs[41];
+ check_case1 = 1;
+ break;
+ case 38: val38 = *val;
+ val32 = ctx->ctx_pmcs[32];
+ val41 = ctx->ctx_pmcs[41];
+ check_case1 = 1;
+ break;
+ case 41: val41 = *val;
+ val32 = ctx->ctx_pmcs[32];
+ val38 = ctx->ctx_pmcs[38];
+ check_case1 = 1;
+ break;
+ }
+ /* check illegal configuration which can produce inconsistencies in tagging
+ * i-side events in L1D and L2 caches
+ */
+ if (check_case1) {
+ ret = (((val41 >> 45) & 0xf) == 0 && ((val32>>57) & 0x1) == 0)
+ && ((((val38>>1) & 0x3) == 0x2 || ((val38>>1) & 0x3) == 0)
+ || (((val38>>4) & 0x3) == 0x2 || ((val38>>4) & 0x3) == 0));
+ if (ret) {
+ DPRINT(("invalid config pmc38=0x%lx pmc41=0x%lx pmc32=0x%lx\n", val38, val41, val32));
+ return -EINVAL;
+ }
+ }
+ *val = tmpval;
+ return 0;
+}
+
+/*
+ * impl_pmcs, impl_pmds are computed at runtime to minimize errors!
+ */
+static pmu_config_t pmu_conf_mont={
+ .pmu_name = "Montecito",
+ .pmu_family = 0x20,
+ .flags = PFM_PMU_IRQ_RESEND,
+ .ovfl_val = (1UL << 47) - 1,
+ .pmd_desc = pfm_mont_pmd_desc,
+ .pmc_desc = pfm_mont_pmc_desc,
+ .num_ibrs = 8,
+ .num_dbrs = 8,
+ .use_rr_dbregs = 1 /* debug register are use for range retrictions */
+};
if (jiffies - last_time > 5*HZ)
count = 0;
- if (++count < 5) {
+ if (count < 5) {
last_time = jiffies;
+ count++;
return 1;
}
return 0;
dprintk(KERN_ERR "uncached_build_memmap(%lx %lx)\n", start, end);
+ touch_softlockup_watchdog();
memset((char *)start, 0, length);
node = paddr_to_nid(start - __IA64_UNCACHED_OFFSET);
ia32_mem_init();
#endif
}
+
+#ifdef CONFIG_MEMORY_HOTPLUG
+void online_page(struct page *page)
+{
+ ClearPageReserved(page);
+ set_page_count(page, 1);
+ __free_page(page);
+ totalram_pages++;
+ num_physpages++;
+}
+
+int add_memory(u64 start, u64 size)
+{
+ pg_data_t *pgdat;
+ struct zone *zone;
+ unsigned long start_pfn = start >> PAGE_SHIFT;
+ unsigned long nr_pages = size >> PAGE_SHIFT;
+ int ret;
+
+ pgdat = NODE_DATA(0);
+
+ zone = pgdat->node_zones + ZONE_NORMAL;
+ ret = __add_pages(zone, start_pfn, nr_pages);
+
+ if (ret)
+ printk("%s: Problem encountered in __add_pages() as ret=%d\n",
+ __FUNCTION__, ret);
+
+ return ret;
+}
+
+int remove_memory(u64 start, u64 size)
+{
+ return -EINVAL;
+}
+#endif
return 0;
}
-static void __devinit pcibios_fixup_device_resources(struct pci_dev *dev)
+static void __devinit
+pcibios_fixup_resources(struct pci_dev *dev, int start, int limit)
{
struct pci_bus_region region;
int i;
- int limit = (dev->hdr_type == PCI_HEADER_TYPE_NORMAL) ? \
- PCI_BRIDGE_RESOURCES : PCI_NUM_RESOURCES;
- for (i = 0; i < limit; i++) {
+ for (i = start; i < limit; i++) {
if (!dev->resource[i].flags)
continue;
region.start = dev->resource[i].start;
}
}
+static void __devinit pcibios_fixup_device_resources(struct pci_dev *dev)
+{
+ pcibios_fixup_resources(dev, 0, PCI_BRIDGE_RESOURCES);
+}
+
+static void __devinit pcibios_fixup_bridge_resources(struct pci_dev *dev)
+{
+ pcibios_fixup_resources(dev, PCI_BRIDGE_RESOURCES, PCI_NUM_RESOURCES);
+}
+
/*
* Called after each bus is probed, but before its children are examined.
*/
if (b->self) {
pci_read_bridge_bases(b);
- pcibios_fixup_device_resources(b->self);
+ pcibios_fixup_bridge_resources(b->self);
}
list_for_each_entry(dev, &b->devices, bus_list)
pcibios_fixup_device_resources(dev);
unsigned long sfdl_force_int_addr;
unsigned long sfdl_flush_value;
volatile unsigned long *sfdl_flush_addr;
- uint32_t sfdl_persistent_busnum;
- uint32_t sfdl_persistent_segment;
+ u32 sfdl_persistent_busnum;
+ u32 sfdl_persistent_segment;
struct pcibus_info *sfdl_pcibus_info;
};
struct sn_flush_device_common *common;
};
+/* 01/16/06 This struct is the old PROM/kernel struct and needs to be included
+ * for older official PROMs to function on the new kernel base. This struct
+ * will be removed when the next official PROM release occurs. */
+
+struct sn_flush_device_war {
+ struct sn_flush_device_common common;
+ u32 filler; /* older PROMs expect the default size of a spinlock_t */
+};
+
/*
* **widget_p - Used as an array[wid_num][device] of sn_flush_device_kernel.
*/
struct sn_flush_nasid_entry {
struct sn_flush_device_kernel **widget_p; // Used as an array of wid_num
- uint64_t iio_itte[8];
+ u64 iio_itte[8];
};
struct hubdev_info {
void *hdi_nodepda;
void *hdi_node_vertex;
- uint32_t max_segment_number;
- uint32_t max_pcibus_number;
+ u32 max_segment_number;
+ u32 max_pcibus_number;
};
extern void hubdev_init_node(nodepda_t *, cnodeid_t);
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
- * Copyright (C) 1992-1997,2000-2004 Silicon Graphics, Inc. All Rights Reserved.
+ * Copyright (C) 1992-1997,2000-2006 Silicon Graphics, Inc. All Rights
+ * Reserved.
*/
#ifndef _ASM_IA64_SN_XTALK_XBOW_H
#define _ASM_IA64_SN_XTALK_XBOW_H
/* Register set for each xbow link */
typedef volatile struct xb_linkregs_s {
-/*
+/*
* we access these through synergy unswizzled space, so the address
* gets twiddled (i.e. references to 0x4 actually go to 0x0 and vv.)
* That's why we put the register first and filler second.
*/
- uint32_t link_ibf;
- uint32_t filler0; /* filler for proper alignment */
- uint32_t link_control;
- uint32_t filler1;
- uint32_t link_status;
- uint32_t filler2;
- uint32_t link_arb_upper;
- uint32_t filler3;
- uint32_t link_arb_lower;
- uint32_t filler4;
- uint32_t link_status_clr;
- uint32_t filler5;
- uint32_t link_reset;
- uint32_t filler6;
- uint32_t link_aux_status;
- uint32_t filler7;
+ u32 link_ibf;
+ u32 filler0; /* filler for proper alignment */
+ u32 link_control;
+ u32 filler1;
+ u32 link_status;
+ u32 filler2;
+ u32 link_arb_upper;
+ u32 filler3;
+ u32 link_arb_lower;
+ u32 filler4;
+ u32 link_status_clr;
+ u32 filler5;
+ u32 link_reset;
+ u32 filler6;
+ u32 link_aux_status;
+ u32 filler7;
} xb_linkregs_t;
typedef volatile struct xbow_s {
- /* standard widget configuration 0x000000-0x000057 */
- struct widget_cfg xb_widget; /* 0x000000 */
-
- /* helper fieldnames for accessing bridge widget */
-
-#define xb_wid_id xb_widget.w_id
-#define xb_wid_stat xb_widget.w_status
-#define xb_wid_err_upper xb_widget.w_err_upper_addr
-#define xb_wid_err_lower xb_widget.w_err_lower_addr
-#define xb_wid_control xb_widget.w_control
-#define xb_wid_req_timeout xb_widget.w_req_timeout
-#define xb_wid_int_upper xb_widget.w_intdest_upper_addr
-#define xb_wid_int_lower xb_widget.w_intdest_lower_addr
-#define xb_wid_err_cmdword xb_widget.w_err_cmd_word
-#define xb_wid_llp xb_widget.w_llp_cfg
-#define xb_wid_stat_clr xb_widget.w_tflush
-
-/*
+ /* standard widget configuration 0x000000-0x000057 */
+ struct widget_cfg xb_widget; /* 0x000000 */
+
+ /* helper fieldnames for accessing bridge widget */
+
+#define xb_wid_id xb_widget.w_id
+#define xb_wid_stat xb_widget.w_status
+#define xb_wid_err_upper xb_widget.w_err_upper_addr
+#define xb_wid_err_lower xb_widget.w_err_lower_addr
+#define xb_wid_control xb_widget.w_control
+#define xb_wid_req_timeout xb_widget.w_req_timeout
+#define xb_wid_int_upper xb_widget.w_intdest_upper_addr
+#define xb_wid_int_lower xb_widget.w_intdest_lower_addr
+#define xb_wid_err_cmdword xb_widget.w_err_cmd_word
+#define xb_wid_llp xb_widget.w_llp_cfg
+#define xb_wid_stat_clr xb_widget.w_tflush
+
+/*
* we access these through synergy unswizzled space, so the address
* gets twiddled (i.e. references to 0x4 actually go to 0x0 and vv.)
* That's why we put the register first and filler second.
*/
- /* xbow-specific widget configuration 0x000058-0x0000FF */
- uint32_t xb_wid_arb_reload; /* 0x00005C */
- uint32_t _pad_000058;
- uint32_t xb_perf_ctr_a; /* 0x000064 */
- uint32_t _pad_000060;
- uint32_t xb_perf_ctr_b; /* 0x00006c */
- uint32_t _pad_000068;
- uint32_t xb_nic; /* 0x000074 */
- uint32_t _pad_000070;
-
- /* Xbridge only */
- uint32_t xb_w0_rst_fnc; /* 0x00007C */
- uint32_t _pad_000078;
- uint32_t xb_l8_rst_fnc; /* 0x000084 */
- uint32_t _pad_000080;
- uint32_t xb_l9_rst_fnc; /* 0x00008c */
- uint32_t _pad_000088;
- uint32_t xb_la_rst_fnc; /* 0x000094 */
- uint32_t _pad_000090;
- uint32_t xb_lb_rst_fnc; /* 0x00009c */
- uint32_t _pad_000098;
- uint32_t xb_lc_rst_fnc; /* 0x0000a4 */
- uint32_t _pad_0000a0;
- uint32_t xb_ld_rst_fnc; /* 0x0000ac */
- uint32_t _pad_0000a8;
- uint32_t xb_le_rst_fnc; /* 0x0000b4 */
- uint32_t _pad_0000b0;
- uint32_t xb_lf_rst_fnc; /* 0x0000bc */
- uint32_t _pad_0000b8;
- uint32_t xb_lock; /* 0x0000c4 */
- uint32_t _pad_0000c0;
- uint32_t xb_lock_clr; /* 0x0000cc */
- uint32_t _pad_0000c8;
- /* end of Xbridge only */
- uint32_t _pad_0000d0[12];
-
- /* Link Specific Registers, port 8..15 0x000100-0x000300 */
- xb_linkregs_t xb_link_raw[MAX_XBOW_PORTS];
-#define xb_link(p) xb_link_raw[(p) & (MAX_XBOW_PORTS - 1)]
-
+ /* xbow-specific widget configuration 0x000058-0x0000FF */
+ u32 xb_wid_arb_reload; /* 0x00005C */
+ u32 _pad_000058;
+ u32 xb_perf_ctr_a; /* 0x000064 */
+ u32 _pad_000060;
+ u32 xb_perf_ctr_b; /* 0x00006c */
+ u32 _pad_000068;
+ u32 xb_nic; /* 0x000074 */
+ u32 _pad_000070;
+
+ /* Xbridge only */
+ u32 xb_w0_rst_fnc; /* 0x00007C */
+ u32 _pad_000078;
+ u32 xb_l8_rst_fnc; /* 0x000084 */
+ u32 _pad_000080;
+ u32 xb_l9_rst_fnc; /* 0x00008c */
+ u32 _pad_000088;
+ u32 xb_la_rst_fnc; /* 0x000094 */
+ u32 _pad_000090;
+ u32 xb_lb_rst_fnc; /* 0x00009c */
+ u32 _pad_000098;
+ u32 xb_lc_rst_fnc; /* 0x0000a4 */
+ u32 _pad_0000a0;
+ u32 xb_ld_rst_fnc; /* 0x0000ac */
+ u32 _pad_0000a8;
+ u32 xb_le_rst_fnc; /* 0x0000b4 */
+ u32 _pad_0000b0;
+ u32 xb_lf_rst_fnc; /* 0x0000bc */
+ u32 _pad_0000b8;
+ u32 xb_lock; /* 0x0000c4 */
+ u32 _pad_0000c0;
+ u32 xb_lock_clr; /* 0x0000cc */
+ u32 _pad_0000c8;
+ /* end of Xbridge only */
+ u32 _pad_0000d0[12];
+
+ /* Link Specific Registers, port 8..15 0x000100-0x000300 */
+ xb_linkregs_t xb_link_raw[MAX_XBOW_PORTS];
} xbow_t;
+#define xb_link(p) xb_link_raw[(p) & (MAX_XBOW_PORTS - 1)]
+
#define XB_FLAGS_EXISTS 0x1 /* device exists */
#define XB_FLAGS_MASTER 0x2
#define XB_FLAGS_SLAVE 0x0
/* End of Xbridge only */
/* used only in ide, but defined here within the reserved portion */
-/* of the widget0 address space (before 0xf4) */
+/* of the widget0 address space (before 0xf4) */
#define XBOW_WID_UNDEF 0xe4
/* xbow link register set base, legal value for x is 0x8..0xf */
/* link_control(x) */
#define XB_CTRL_LINKALIVE_IE 0x80000000 /* link comes alive */
- /* reserved: 0x40000000 */
+/* reserved: 0x40000000 */
#define XB_CTRL_PERF_CTR_MODE_MSK 0x30000000 /* perf counter mode */
-#define XB_CTRL_IBUF_LEVEL_MSK 0x0e000000 /* input packet buffer level */
-#define XB_CTRL_8BIT_MODE 0x01000000 /* force link into 8 bit mode */
-#define XB_CTRL_BAD_LLP_PKT 0x00800000 /* force bad LLP packet */
-#define XB_CTRL_WIDGET_CR_MSK 0x007c0000 /* LLP widget credit mask */
-#define XB_CTRL_WIDGET_CR_SHFT 18 /* LLP widget credit shift */
-#define XB_CTRL_ILLEGAL_DST_IE 0x00020000 /* illegal destination */
-#define XB_CTRL_OALLOC_IBUF_IE 0x00010000 /* overallocated input buffer */
- /* reserved: 0x0000fe00 */
+#define XB_CTRL_IBUF_LEVEL_MSK 0x0e000000 /* input packet buffer
+ level */
+#define XB_CTRL_8BIT_MODE 0x01000000 /* force link into 8
+ bit mode */
+#define XB_CTRL_BAD_LLP_PKT 0x00800000 /* force bad LLP
+ packet */
+#define XB_CTRL_WIDGET_CR_MSK 0x007c0000 /* LLP widget credit
+ mask */
+#define XB_CTRL_WIDGET_CR_SHFT 18 /* LLP widget credit
+ shift */
+#define XB_CTRL_ILLEGAL_DST_IE 0x00020000 /* illegal destination
+ */
+#define XB_CTRL_OALLOC_IBUF_IE 0x00010000 /* overallocated input
+ buffer */
+/* reserved: 0x0000fe00 */
#define XB_CTRL_BNDWDTH_ALLOC_IE 0x00000100 /* bandwidth alloc */
#define XB_CTRL_RCV_CNT_OFLOW_IE 0x00000080 /* rcv retry overflow */
#define XB_CTRL_XMT_CNT_OFLOW_IE 0x00000040 /* xmt retry overflow */
#define XB_CTRL_XMT_MAX_RTRY_IE 0x00000020 /* max transmit retry */
#define XB_CTRL_RCV_IE 0x00000010 /* receive */
#define XB_CTRL_XMT_RTRY_IE 0x00000008 /* transmit retry */
- /* reserved: 0x00000004 */
-#define XB_CTRL_MAXREQ_TOUT_IE 0x00000002 /* maximum request timeout */
+/* reserved: 0x00000004 */
+#define XB_CTRL_MAXREQ_TOUT_IE 0x00000002 /* maximum request
+ timeout */
#define XB_CTRL_SRC_TOUT_IE 0x00000001 /* source timeout */
/* link_status(x) */
#define XB_STAT_LINKALIVE XB_CTRL_LINKALIVE_IE
- /* reserved: 0x7ff80000 */
+/* reserved: 0x7ff80000 */
#define XB_STAT_MULTI_ERR 0x00040000 /* multi error */
#define XB_STAT_ILLEGAL_DST_ERR XB_CTRL_ILLEGAL_DST_IE
#define XB_STAT_OALLOC_IBUF_ERR XB_CTRL_OALLOC_IBUF_IE
#define XB_STAT_XMT_MAX_RTRY_ERR XB_CTRL_XMT_MAX_RTRY_IE
#define XB_STAT_RCV_ERR XB_CTRL_RCV_IE
#define XB_STAT_XMT_RTRY_ERR XB_CTRL_XMT_RTRY_IE
- /* reserved: 0x00000004 */
+/* reserved: 0x00000004 */
#define XB_STAT_MAXREQ_TOUT_ERR XB_CTRL_MAXREQ_TOUT_IE
#define XB_STAT_SRC_TOUT_ERR XB_CTRL_SRC_TOUT_IE
#define XB_AUX_LINKFAIL_RST_BAD 0x00000040
#define XB_AUX_STAT_PRESENT 0x00000020
#define XB_AUX_STAT_PORT_WIDTH 0x00000010
- /* reserved: 0x0000000f */
+/* reserved: 0x0000000f */
/*
* link_arb_upper/link_arb_lower(x), (reg) should be the link_arb_upper
/* XBOW_WID_STAT */
#define XB_WID_STAT_LINK_INTR_SHFT (24)
#define XB_WID_STAT_LINK_INTR_MASK (0xFF << XB_WID_STAT_LINK_INTR_SHFT)
-#define XB_WID_STAT_LINK_INTR(x) (0x1 << (((x)&7) + XB_WID_STAT_LINK_INTR_SHFT))
+#define XB_WID_STAT_LINK_INTR(x) \
+ (0x1 << (((x)&7) + XB_WID_STAT_LINK_INTR_SHFT))
#define XB_WID_STAT_WIDGET0_INTR 0x00800000
#define XB_WID_STAT_SRCID_MASK 0x000003c0 /* Xbridge only */
#define XB_WID_STAT_REG_ACC_ERR 0x00000020
#define XXBOW_WIDGET_PART_NUM 0xd000 /* Xbridge */
#define XBOW_WIDGET_MFGR_NUM 0x0
#define XXBOW_WIDGET_MFGR_NUM 0x0
-#define PXBOW_WIDGET_PART_NUM 0xd100 /* PIC */
+#define PXBOW_WIDGET_PART_NUM 0xd100 /* PIC */
#define XBOW_REV_1_0 0x1 /* xbow rev 1.0 is "1" */
#define XBOW_REV_1_1 0x2 /* xbow rev 1.1 is "2" */
#define XBOW_WID_ARB_RELOAD_INT 0x3f /* GBR reload interval */
#define IS_XBRIDGE_XBOW(wid) \
- (XWIDGET_PART_NUM(wid) == XXBOW_WIDGET_PART_NUM && \
- XWIDGET_MFG_NUM(wid) == XXBOW_WIDGET_MFGR_NUM)
+ (XWIDGET_PART_NUM(wid) == XXBOW_WIDGET_PART_NUM && \
+ XWIDGET_MFG_NUM(wid) == XXBOW_WIDGET_MFGR_NUM)
#define IS_PIC_XBOW(wid) \
- (XWIDGET_PART_NUM(wid) == PXBOW_WIDGET_PART_NUM && \
- XWIDGET_MFG_NUM(wid) == XXBOW_WIDGET_MFGR_NUM)
+ (XWIDGET_PART_NUM(wid) == PXBOW_WIDGET_PART_NUM && \
+ XWIDGET_MFG_NUM(wid) == XXBOW_WIDGET_MFGR_NUM)
#define XBOW_WAR_ENABLED(pv, widid) ((1 << XWIDGET_REV_NUM(widid)) & pv)
-#endif /* _ASM_IA64_SN_XTALK_XBOW_H */
+#endif /* _ASM_IA64_SN_XTALK_XBOW_H */
/* widget configuration registers */
struct widget_cfg{
- uint32_t w_id; /* 0x04 */
- uint32_t w_pad_0; /* 0x00 */
- uint32_t w_status; /* 0x0c */
- uint32_t w_pad_1; /* 0x08 */
- uint32_t w_err_upper_addr; /* 0x14 */
- uint32_t w_pad_2; /* 0x10 */
- uint32_t w_err_lower_addr; /* 0x1c */
- uint32_t w_pad_3; /* 0x18 */
- uint32_t w_control; /* 0x24 */
- uint32_t w_pad_4; /* 0x20 */
- uint32_t w_req_timeout; /* 0x2c */
- uint32_t w_pad_5; /* 0x28 */
- uint32_t w_intdest_upper_addr; /* 0x34 */
- uint32_t w_pad_6; /* 0x30 */
- uint32_t w_intdest_lower_addr; /* 0x3c */
- uint32_t w_pad_7; /* 0x38 */
- uint32_t w_err_cmd_word; /* 0x44 */
- uint32_t w_pad_8; /* 0x40 */
- uint32_t w_llp_cfg; /* 0x4c */
- uint32_t w_pad_9; /* 0x48 */
- uint32_t w_tflush; /* 0x54 */
- uint32_t w_pad_10; /* 0x50 */
+ u32 w_id; /* 0x04 */
+ u32 w_pad_0; /* 0x00 */
+ u32 w_status; /* 0x0c */
+ u32 w_pad_1; /* 0x08 */
+ u32 w_err_upper_addr; /* 0x14 */
+ u32 w_pad_2; /* 0x10 */
+ u32 w_err_lower_addr; /* 0x1c */
+ u32 w_pad_3; /* 0x18 */
+ u32 w_control; /* 0x24 */
+ u32 w_pad_4; /* 0x20 */
+ u32 w_req_timeout; /* 0x2c */
+ u32 w_pad_5; /* 0x28 */
+ u32 w_intdest_upper_addr; /* 0x34 */
+ u32 w_pad_6; /* 0x30 */
+ u32 w_intdest_lower_addr; /* 0x3c */
+ u32 w_pad_7; /* 0x38 */
+ u32 w_err_cmd_word; /* 0x44 */
+ u32 w_pad_8; /* 0x40 */
+ u32 w_llp_cfg; /* 0x4c */
+ u32 w_pad_9; /* 0x48 */
+ u32 w_tflush; /* 0x54 */
+ u32 w_pad_10; /* 0x50 */
};
/*
struct xwidget_hwid xwi_hwid; /* Widget Identification */
char xwi_masterxid; /* Hub's Widget Port Number */
void *xwi_hubinfo; /* Hub's provider private info */
- uint64_t *xwi_hub_provider; /* prom provider functions */
+ u64 *xwi_hub_provider; /* prom provider functions */
void *xwi_vertex;
};
#include <linux/nodemask.h>
#include <asm/sn/types.h>
#include <asm/sn/addrs.h>
+#include <asm/sn/sn_feature_sets.h>
#include <asm/sn/geo.h>
#include <asm/sn/io.h>
#include <asm/sn/pcibr_provider.h>
* Retrieve the pci device information given the bus and device|function number.
*/
static inline u64
-sal_get_pcidev_info(u64 segment, u64 bus_number, u64 devfn, u64 pci_dev,
- u64 sn_irq_info)
+sal_get_pcidev_info(u64 segment, u64 bus_number, u64 devfn, u64 pci_dev,
+ u64 sn_irq_info)
{
struct ia64_sal_retval ret_stuff;
ret_stuff.status = 0;
SAL_CALL_NOLOCK(ret_stuff,
(u64) SN_SAL_IOIF_GET_PCIDEV_INFO,
- (u64) segment, (u64) bus_number, (u64) devfn,
+ (u64) segment, (u64) bus_number, (u64) devfn,
(u64) pci_dev,
sn_irq_info, 0, 0);
return ret_stuff.v0;
return NULL;
}
+/* Older PROM flush WAR
+ *
+ * 01/16/06 -- This war will be in place until a new official PROM is released.
+ * Additionally note that the struct sn_flush_device_war also has to be
+ * removed from arch/ia64/sn/include/xtalk/hubdev.h
+ */
+static u8 war_implemented = 0;
+
+static s64 sn_device_fixup_war(u64 nasid, u64 widget, int device,
+ struct sn_flush_device_common *common)
+{
+ struct sn_flush_device_war *war_list;
+ struct sn_flush_device_war *dev_entry;
+ struct ia64_sal_retval isrv = {0,0,0,0};
+
+ if (!war_implemented) {
+ printk(KERN_WARNING "PROM version < 4.50 -- implementing old "
+ "PROM flush WAR\n");
+ war_implemented = 1;
+ }
+
+ war_list = kzalloc(DEV_PER_WIDGET * sizeof(*war_list), GFP_KERNEL);
+ if (!war_list)
+ BUG();
+
+ SAL_CALL_NOLOCK(isrv, SN_SAL_IOIF_GET_WIDGET_DMAFLUSH_LIST,
+ nasid, widget, __pa(war_list), 0, 0, 0 ,0);
+ if (isrv.status)
+ panic("sn_device_fixup_war failed: %s\n",
+ ia64_sal_strerror(isrv.status));
+
+ dev_entry = war_list + device;
+ memcpy(common,dev_entry, sizeof(*common));
+ kfree(war_list);
+
+ return isrv.status;
+}
+
/*
- * sn_fixup_ionodes() - This routine initializes the HUB data strcuture for
+ * sn_fixup_ionodes() - This routine initializes the HUB data strcuture for
* each node in the system.
*/
static void sn_fixup_ionodes(void)
memset(dev_entry->common, 0x0, sizeof(struct
sn_flush_device_common));
- status = sal_get_device_dmaflush_list(nasid,
- widget,
- device,
+ if (sn_prom_feature_available(
+ PRF_DEVICE_FLUSH_LIST))
+ status = sal_get_device_dmaflush_list(
+ nasid,
+ widget,
+ device,
(u64)(dev_entry->common));
- if (status)
- BUG();
+ else
+ status = sn_device_fixup_war(nasid,
+ widget,
+ device,
+ dev_entry->common);
+ if (status != SALRET_OK)
+ panic("SAL call failed: %s\n",
+ ia64_sal_strerror(status));
spin_lock_init(&dev_entry->sfdl_flush_lock);
}
*/
static void
sn_pci_window_fixup(struct pci_dev *dev, unsigned int count,
- int64_t * pci_addrs)
+ s64 * pci_addrs)
{
struct pci_controller *controller = PCI_CONTROLLER(dev->bus);
unsigned int i;
struct pci_bus *host_pci_bus;
struct pci_dev *host_pci_dev;
struct pcidev_info *pcidev_info;
- int64_t pci_addrs[PCI_ROM_RESOURCE + 1];
+ s64 pci_addrs[PCI_ROM_RESOURCE + 1];
struct sn_irq_info *sn_irq_info;
unsigned long size;
unsigned int bus_no, devfn;
static struct list_head **sn_irq_lh;
static spinlock_t sn_irq_info_lock = SPIN_LOCK_UNLOCKED; /* non-IRQ lock */
-static inline uint64_t sn_intr_alloc(nasid_t local_nasid, int local_widget,
+static inline u64 sn_intr_alloc(nasid_t local_nasid, int local_widget,
u64 sn_irq_info,
int req_irq, nasid_t req_nasid,
int req_slice)
list_for_each_entry_safe(sn_irq_info, sn_irq_info_safe,
sn_irq_lh[irq], list) {
- uint64_t bridge;
+ u64 bridge;
int local_widget, status;
nasid_t local_nasid;
struct sn_irq_info *new_irq_info;
break;
memcpy(new_irq_info, sn_irq_info, sizeof(struct sn_irq_info));
- bridge = (uint64_t) new_irq_info->irq_bridge;
+ bridge = (u64) new_irq_info->irq_bridge;
if (!bridge) {
kfree(new_irq_info);
break; /* irq is not a device interrupt */
*/
static void sn_check_intr(int irq, struct sn_irq_info *sn_irq_info)
{
- uint64_t regval;
+ u64 regval;
int irr_reg_num;
int irr_bit;
- uint64_t irr_reg;
+ u64 irr_reg;
struct pcidev_info *pcidev_info;
struct pcibus_info *pcibus_info;
#include <linux/kernel.h>
#include <linux/timer.h>
#include <linux/vmalloc.h>
+#include <linux/mutex.h>
#include <asm/mca.h>
#include <asm/sal.h>
#include <asm/sn/sn_sal.h>
/* Printing oemdata from mca uses data that is not passed through SAL, it is
* global. Only one user at a time.
*/
-static DECLARE_MUTEX(sn_oemdata_mutex);
+static DEFINE_MUTEX(sn_oemdata_mutex);
static u8 **sn_oemdata;
static u64 *sn_oemdata_size, sn_oemdata_bufsize;
sn_platform_plat_specific_err_print(const u8 * sect_header, u8 ** oemdata,
u64 * oemdata_size)
{
- down(&sn_oemdata_mutex);
+ mutex_lock(&sn_oemdata_mutex);
sn_oemdata = oemdata;
sn_oemdata_size = oemdata_size;
sn_oemdata_bufsize = 0;
*sn_oemdata_size = 0;
ia64_sn_plat_specific_err_print(print_hook, (char *)sect_header);
}
- up(&sn_oemdata_mutex);
+ mutex_unlock(&sn_oemdata_mutex);
return 0;
}
cx_dev->bt);
}
-static inline uint64_t tiocx_intr_alloc(nasid_t nasid, int widget,
+static inline u64 tiocx_intr_alloc(nasid_t nasid, int widget,
u64 sn_irq_info,
int req_irq, nasid_t req_nasid,
int req_slice)
void tiocx_irq_free(struct sn_irq_info *sn_irq_info)
{
- uint64_t bridge = (uint64_t) sn_irq_info->irq_bridge;
+ u64 bridge = (u64) sn_irq_info->irq_bridge;
nasid_t nasid = NASID_GET(bridge);
int widget;
}
}
-uint64_t tiocx_dma_addr(uint64_t addr)
+u64 tiocx_dma_addr(u64 addr)
{
return PHYS_TO_TIODMA(addr);
}
-uint64_t tiocx_swin_base(int nasid)
+u64 tiocx_swin_base(int nasid)
{
return TIO_SWIN_BASE(nasid, TIOCX_CORELET);
}
static void tio_conveyor_set(nasid_t nasid, int enable_flag)
{
- uint64_t ice_frz;
- uint64_t disable_cb = (1ull << 61);
+ u64 ice_frz;
+ u64 disable_cb = (1ull << 61);
if (!(nasid & 1))
return;
static int bitstream_loaded(nasid_t nasid)
{
- uint64_t cx_credits;
+ u64 cx_credits;
cx_credits = REMOTE_HUB_L(nasid, TIO_ICE_PMI_TX_DYN_CREDIT_STAT_CB3);
cx_credits &= TIO_ICE_PMI_TX_DYN_CREDIT_STAT_CB3_CREDIT_CNT_MASK;
nasid_t nasid = cx_dev->cx_id.nasid;
if (bitstream_loaded(nasid)) {
- uint64_t cx_id;
+ u64 cx_id;
int rv;
rv = ia64_sn_sysctl_tio_clock_reset(nasid);
if (rv) {
printk(KERN_ALERT "CX port JTAG reset failed.\n");
} else {
- cx_id = *(volatile uint64_t *)
+ cx_id = *(volatile u64 *)
(TIO_SWIN_BASE(nasid, TIOCX_CORELET) +
WIDGET_ID);
part_num = XWIDGET_PART_NUM(cx_id);
#include <linux/kernel.h>
#include <linux/interrupt.h>
#include <linux/module.h>
+#include <linux/mutex.h>
#include <asm/sn/intr.h>
#include <asm/sn/sn_sal.h>
#include <asm/sn/xp.h>
registration = &xpc_registrations[ch_number];
- if (down_interruptible(®istration->sema) != 0) {
+ if (mutex_lock_interruptible(®istration->mutex) != 0) {
return xpcInterrupted;
}
/* if XPC_CHANNEL_REGISTERED(ch_number) */
if (registration->func != NULL) {
- up(®istration->sema);
+ mutex_unlock(®istration->mutex);
return xpcAlreadyRegistered;
}
registration->key = key;
registration->func = func;
- up(®istration->sema);
+ mutex_unlock(®istration->mutex);
xpc_interface.connect(ch_number);
* figured XPC's users will just turn around and call xpc_disconnect()
* again anyways, so we might as well wait, if need be.
*/
- down(®istration->sema);
+ mutex_lock(®istration->mutex);
/* if !XPC_CHANNEL_REGISTERED(ch_number) */
if (registration->func == NULL) {
- up(®istration->sema);
+ mutex_unlock(®istration->mutex);
return;
}
xpc_interface.disconnect(ch_number);
- up(®istration->sema);
+ mutex_unlock(®istration->mutex);
return;
}
xp_nofault_PIOR_target = SH1_IPI_ACCESS;
}
- /* initialize the connection registration semaphores */
+ /* initialize the connection registration mutex */
for (ch_number = 0; ch_number < XPC_NCHANNELS; ch_number++) {
- sema_init(&xpc_registrations[ch_number].sema, 1); /* mutex */
+ mutex_init(&xpc_registrations[ch_number].mutex);
}
return 0;
#include <linux/cache.h>
#include <linux/interrupt.h>
#include <linux/slab.h>
+#include <linux/mutex.h>
+#include <linux/completion.h>
#include <asm/sn/bte.h>
#include <asm/sn/sn_sal.h>
#include <asm/sn/xpc.h>
atomic_set(&ch->n_to_notify, 0);
spin_lock_init(&ch->lock);
- sema_init(&ch->msg_to_pull_sema, 1); /* mutex */
- sema_init(&ch->wdisconnect_sema, 0); /* event wait */
+ mutex_init(&ch->msg_to_pull_mutex);
+ init_completion(&ch->wdisconnect_wait);
atomic_set(&ch->n_on_msg_allocate_wq, 0);
init_waitqueue_head(&ch->msg_allocate_wq);
nbytes = nentries * ch->msg_size;
ch->local_msgqueue = xpc_kmalloc_cacheline_aligned(nbytes,
- (GFP_KERNEL | GFP_DMA),
+ GFP_KERNEL,
&ch->local_msgqueue_base);
if (ch->local_msgqueue == NULL) {
continue;
memset(ch->local_msgqueue, 0, nbytes);
nbytes = nentries * sizeof(struct xpc_notify);
- ch->notify_queue = kmalloc(nbytes, (GFP_KERNEL | GFP_DMA));
+ ch->notify_queue = kmalloc(nbytes, GFP_KERNEL);
if (ch->notify_queue == NULL) {
kfree(ch->local_msgqueue_base);
ch->local_msgqueue = NULL;
nbytes = nentries * ch->msg_size;
ch->remote_msgqueue = xpc_kmalloc_cacheline_aligned(nbytes,
- (GFP_KERNEL | GFP_DMA),
+ GFP_KERNEL,
&ch->remote_msgqueue_base);
if (ch->remote_msgqueue == NULL) {
continue;
xpc_allocate_msgqueues(struct xpc_channel *ch)
{
unsigned long irq_flags;
- int i;
enum xpc_retval ret;
return ret;
}
- for (i = 0; i < ch->local_nentries; i++) {
- /* use a semaphore as an event wait queue */
- sema_init(&ch->notify_queue[i].sema, 0);
- }
-
spin_lock_irqsave(&ch->lock, irq_flags);
ch->flags |= XPC_C_SETUP;
spin_unlock_irqrestore(&ch->lock, irq_flags);
}
if (ch->flags & XPC_C_WDISCONNECT) {
- spin_unlock_irqrestore(&ch->lock, *irq_flags);
- up(&ch->wdisconnect_sema);
- spin_lock_irqsave(&ch->lock, *irq_flags);
-
+ /* we won't lose the CPU since we're holding ch->lock */
+ complete(&ch->wdisconnect_wait);
} else if (ch->delayed_IPI_flags) {
if (part->act_state != XPC_P_DEACTIVATING) {
/* time to take action on any delayed IPI flags */
struct xpc_registration *registration = &xpc_registrations[ch->number];
- if (down_trylock(®istration->sema) != 0) {
+ if (mutex_trylock(®istration->mutex) == 0) {
return xpcRetry;
}
if (!XPC_CHANNEL_REGISTERED(ch->number)) {
- up(®istration->sema);
+ mutex_unlock(®istration->mutex);
return xpcUnregistered;
}
if (ch->flags & XPC_C_DISCONNECTING) {
spin_unlock_irqrestore(&ch->lock, irq_flags);
- up(®istration->sema);
+ mutex_unlock(®istration->mutex);
return ch->reason;
}
* channel lock be locked and will unlock and relock
* the channel lock as needed.
*/
- up(®istration->sema);
+ mutex_unlock(®istration->mutex);
XPC_DISCONNECT_CHANNEL(ch, xpcUnequalMsgSizes,
&irq_flags);
spin_unlock_irqrestore(&ch->lock, irq_flags);
atomic_inc(&xpc_partitions[ch->partid].nchannels_active);
}
- up(®istration->sema);
+ mutex_unlock(®istration->mutex);
/* initiate the connection */
enum xpc_retval ret;
- if (down_interruptible(&ch->msg_to_pull_sema) != 0) {
+ if (mutex_lock_interruptible(&ch->msg_to_pull_mutex) != 0) {
/* we were interrupted by a signal */
return NULL;
}
XPC_DEACTIVATE_PARTITION(part, ret);
- up(&ch->msg_to_pull_sema);
+ mutex_unlock(&ch->msg_to_pull_mutex);
return NULL;
}
ch->next_msg_to_pull += nmsgs;
}
- up(&ch->msg_to_pull_sema);
+ mutex_unlock(&ch->msg_to_pull_mutex);
/* return the message we were looking for */
msg_offset = (get % ch->remote_nentries) * ch->msg_size;
#include <linux/slab.h>
#include <linux/delay.h>
#include <linux/reboot.h>
+#include <linux/completion.h>
#include <asm/sn/intr.h>
#include <asm/sn/sn_sal.h>
#include <asm/kdebug.h>
static unsigned long xpc_hb_check_timeout;
/* notification that the xpc_hb_checker thread has exited */
-static DECLARE_MUTEX_LOCKED(xpc_hb_checker_exited);
+static DECLARE_COMPLETION(xpc_hb_checker_exited);
/* notification that the xpc_discovery thread has exited */
-static DECLARE_MUTEX_LOCKED(xpc_discovery_exited);
+static DECLARE_COMPLETION(xpc_discovery_exited);
static struct timer_list xpc_hb_timer;
/* mark this thread as having exited */
- up(&xpc_hb_checker_exited);
+ complete(&xpc_hb_checker_exited);
return 0;
}
dev_dbg(xpc_part, "discovery thread is exiting\n");
/* mark this thread as having exited */
- up(&xpc_discovery_exited);
+ complete(&xpc_discovery_exited);
return 0;
}
continue;
}
- (void) down(&ch->wdisconnect_sema);
+ wait_for_completion(&ch->wdisconnect_wait);
spin_lock_irqsave(&ch->lock, irq_flags);
DBUG_ON(!(ch->flags & XPC_C_DISCONNECTED));
free_irq(SGI_XPC_ACTIVATE, NULL);
/* wait for the discovery thread to exit */
- down(&xpc_discovery_exited);
+ wait_for_completion(&xpc_discovery_exited);
/* wait for the heartbeat checker thread to exit */
- down(&xpc_hb_checker_exited);
+ wait_for_completion(&xpc_hb_checker_exited);
/* sleep for a 1/3 of a second or so */
dev_err(xpc_part, "failed while forking discovery thread\n");
/* mark this new thread as a non-starter */
- up(&xpc_discovery_exited);
+ complete(&xpc_discovery_exited);
xpc_do_exit(xpcUnloading);
return -EBUSY;
*/
node = pcibus_to_node(pdev->bus);
if (likely(node >=0)) {
- struct page *p = alloc_pages_node(node, GFP_ATOMIC, get_order(size));
+ struct page *p = alloc_pages_node(node, flags, get_order(size));
if (likely(p))
cpuaddr = page_address(p);
else
return NULL;
} else
- cpuaddr = (void *)__get_free_pages(GFP_ATOMIC, get_order(size));
+ cpuaddr = (void *)__get_free_pages(flags, get_order(size));
if (unlikely(!cpuaddr))
return NULL;
* mark_ate: Mark the ate as either free or inuse.
*/
static void mark_ate(struct ate_resource *ate_resource, int start, int number,
- uint64_t value)
+ u64 value)
{
- uint64_t *ate = ate_resource->ate;
+ u64 *ate = ate_resource->ate;
int index;
int length = 0;
int count)
{
- uint64_t *ate = ate_resource->ate;
+ u64 *ate = ate_resource->ate;
int index;
int start_free;
int pcibr_ate_alloc(struct pcibus_info *pcibus_info, int count)
{
int status = 0;
- uint64_t flag;
+ u64 flag;
flag = pcibr_lock(pcibus_info);
status = alloc_ate_resource(&pcibus_info->pbi_int_ate_resource, count);
* Setup an Address Translation Entry as specified. Use either the Bridge
* internal maps or the external map RAM, as appropriate.
*/
-static inline uint64_t *pcibr_ate_addr(struct pcibus_info *pcibus_info,
+static inline u64 *pcibr_ate_addr(struct pcibus_info *pcibus_info,
int ate_index)
{
if (ate_index < pcibus_info->pbi_int_ate_size) {
*/
void inline
ate_write(struct pcibus_info *pcibus_info, int ate_index, int count,
- volatile uint64_t ate)
+ volatile u64 ate)
{
while (count-- > 0) {
if (ate_index < pcibus_info->pbi_int_ate_size) {
void pcibr_ate_free(struct pcibus_info *pcibus_info, int index)
{
- volatile uint64_t ate;
+ volatile u64 ate;
int count;
- uint64_t flags;
+ u64 flags;
if (pcibr_invalidate_ate) {
/* For debugging purposes, clear the valid bit in the ATE */
static dma_addr_t
pcibr_dmamap_ate32(struct pcidev_info *info,
- uint64_t paddr, size_t req_size, uint64_t flags)
+ u64 paddr, size_t req_size, u64 flags)
{
struct pcidev_info *pcidev_info = info->pdi_host_pcidev_info;
struct pcibus_info *pcibus_info = (struct pcibus_info *)pcidev_info->
pdi_pcibus_info;
- uint8_t internal_device = (PCI_SLOT(pcidev_info->pdi_host_pcidev_info->
+ u8 internal_device = (PCI_SLOT(pcidev_info->pdi_host_pcidev_info->
pdi_linux_pcidev->devfn)) - 1;
int ate_count;
int ate_index;
- uint64_t ate_flags = flags | PCI32_ATE_V;
- uint64_t ate;
- uint64_t pci_addr;
- uint64_t xio_addr;
- uint64_t offset;
+ u64 ate_flags = flags | PCI32_ATE_V;
+ u64 ate;
+ u64 pci_addr;
+ u64 xio_addr;
+ u64 offset;
/* PIC in PCI-X mode does not supports 32bit PageMap mode */
if (IS_PIC_SOFT(pcibus_info) && IS_PCIX(pcibus_info)) {
}
static dma_addr_t
-pcibr_dmatrans_direct64(struct pcidev_info * info, uint64_t paddr,
- uint64_t dma_attributes)
+pcibr_dmatrans_direct64(struct pcidev_info * info, u64 paddr,
+ u64 dma_attributes)
{
struct pcibus_info *pcibus_info = (struct pcibus_info *)
((info->pdi_host_pcidev_info)->pdi_pcibus_info);
- uint64_t pci_addr;
+ u64 pci_addr;
/* Translate to Crosstalk View of Physical Address */
pci_addr = (IS_PIC_SOFT(pcibus_info) ? PHYS_TO_DMA(paddr) :
/* Handle Bridge Chipset differences */
if (IS_PIC_SOFT(pcibus_info)) {
pci_addr |=
- ((uint64_t) pcibus_info->
+ ((u64) pcibus_info->
pbi_hub_xid << PIC_PCI64_ATTR_TARG_SHFT);
} else
pci_addr |= TIOCP_PCI64_CMDTYPE_MEM;
static dma_addr_t
pcibr_dmatrans_direct32(struct pcidev_info * info,
- uint64_t paddr, size_t req_size, uint64_t flags)
+ u64 paddr, size_t req_size, u64 flags)
{
struct pcidev_info *pcidev_info = info->pdi_host_pcidev_info;
struct pcibus_info *pcibus_info = (struct pcibus_info *)pcidev_info->
pdi_pcibus_info;
- uint64_t xio_addr;
+ u64 xio_addr;
- uint64_t xio_base;
- uint64_t offset;
- uint64_t endoff;
+ u64 xio_base;
+ u64 offset;
+ u64 endoff;
if (IS_PCIX(pcibus_info)) {
return 0;
* unlike the PIC Device(x) Write Request Buffer Flush register.
*/
-void sn_dma_flush(uint64_t addr)
+void sn_dma_flush(u64 addr)
{
nasid_t nasid;
int is_tio;
int wid_num;
int i, j;
- uint64_t flags;
- uint64_t itte;
+ u64 flags;
+ u64 itte;
struct hubdev_info *hubinfo;
volatile struct sn_flush_device_kernel *p;
volatile struct sn_flush_device_common *common;
* If CE ever needs the sn_dma_flush mechanism, we will have
* to account for that here and in tioce_bus_fixup().
*/
- uint32_t tio_id = HUB_L(TIO_IOSPACE_ADDR(nasid, TIO_NODE_ID));
- uint32_t revnum = XWIDGET_PART_REV_NUM(tio_id);
+ u32 tio_id = HUB_L(TIO_IOSPACE_ADDR(nasid, TIO_NODE_ID));
+ u32 revnum = XWIDGET_PART_REV_NUM(tio_id);
/* TIOCP BRINGUP WAR (PV907516): Don't write buffer flush reg */
if ((1 << XWIDGET_PART_REV_NUM_REV(revnum)) & PV907516) {
*common->sfdl_flush_addr = 0;
/* force an interrupt. */
- *(volatile uint32_t *)(common->sfdl_force_int_addr) = 1;
+ *(volatile u32 *)(common->sfdl_force_int_addr) = 1;
/* wait for the interrupt to come back. */
while (*(common->sfdl_flush_addr) != 0x10f)
sal_pcibr_slot_enable(struct pcibus_info *soft, int device, void *resp)
{
struct ia64_sal_retval ret_stuff;
- uint64_t busnum;
+ u64 busnum;
+ u64 segment;
ret_stuff.status = 0;
ret_stuff.v0 = 0;
+ segment = soft->pbi_buscommon.bs_persist_segment;
busnum = soft->pbi_buscommon.bs_persist_busnum;
- SAL_CALL_NOLOCK(ret_stuff, (u64) SN_SAL_IOIF_SLOT_ENABLE, (u64) busnum,
- (u64) device, (u64) resp, 0, 0, 0, 0);
+ SAL_CALL_NOLOCK(ret_stuff, (u64) SN_SAL_IOIF_SLOT_ENABLE, segment,
+ busnum, (u64) device, (u64) resp, 0, 0, 0);
return (int)ret_stuff.v0;
}
void *resp)
{
struct ia64_sal_retval ret_stuff;
- uint64_t busnum;
+ u64 busnum;
+ u64 segment;
ret_stuff.status = 0;
ret_stuff.v0 = 0;
+ segment = soft->pbi_buscommon.bs_persist_segment;
busnum = soft->pbi_buscommon.bs_persist_busnum;
SAL_CALL_NOLOCK(ret_stuff, (u64) SN_SAL_IOIF_SLOT_DISABLE,
- (u64) busnum, (u64) device, (u64) action,
- (u64) resp, 0, 0, 0);
+ segment, busnum, (u64) device, (u64) action,
+ (u64) resp, 0, 0);
return (int)ret_stuff.v0;
}
static int sal_pcibr_error_interrupt(struct pcibus_info *soft)
{
struct ia64_sal_retval ret_stuff;
- uint64_t busnum;
+ u64 busnum;
int segment;
ret_stuff.status = 0;
ret_stuff.v0 = 0;
/* Setup the PMU ATE map */
soft->pbi_int_ate_resource.lowest_free_index = 0;
soft->pbi_int_ate_resource.ate =
- kmalloc(soft->pbi_int_ate_size * sizeof(uint64_t), GFP_KERNEL);
+ kmalloc(soft->pbi_int_ate_size * sizeof(u64), GFP_KERNEL);
memset(soft->pbi_int_ate_resource.ate, 0,
- (soft->pbi_int_ate_size * sizeof(uint64_t)));
+ (soft->pbi_int_ate_size * sizeof(u64)));
if (prom_bussoft->bs_asic_type == PCIIO_ASIC_TYPE_TIOCP) {
/* TIO PCI Bridge: find nearest node with CPUs */
struct pcidev_info *pcidev_info;
struct pcibus_info *pcibus_info;
int bit = sn_irq_info->irq_int_bit;
- uint64_t xtalk_addr = sn_irq_info->irq_xtalkaddr;
+ u64 xtalk_addr = sn_irq_info->irq_xtalkaddr;
pcidev_info = (struct pcidev_info *)sn_irq_info->irq_pciioinfo;
if (pcidev_info) {
/*
* Control Register Access -- Read/Write 0000_0020
*/
-void pcireg_control_bit_clr(struct pcibus_info *pcibus_info, uint64_t bits)
+void pcireg_control_bit_clr(struct pcibus_info *pcibus_info, u64 bits)
{
union br_ptr __iomem *ptr = (union br_ptr __iomem *)pcibus_info->pbi_buscommon.bs_base;
}
}
-void pcireg_control_bit_set(struct pcibus_info *pcibus_info, uint64_t bits)
+void pcireg_control_bit_set(struct pcibus_info *pcibus_info, u64 bits)
{
union br_ptr __iomem *ptr = (union br_ptr __iomem *)pcibus_info->pbi_buscommon.bs_base;
/*
* PCI/PCIX Target Flush Register Access -- Read Only 0000_0050
*/
-uint64_t pcireg_tflush_get(struct pcibus_info *pcibus_info)
+u64 pcireg_tflush_get(struct pcibus_info *pcibus_info)
{
union br_ptr __iomem *ptr = (union br_ptr __iomem *)pcibus_info->pbi_buscommon.bs_base;
- uint64_t ret = 0;
+ u64 ret = 0;
if (pcibus_info) {
switch (pcibus_info->pbi_bridge_type) {
/*
* Interrupt Status Register Access -- Read Only 0000_0100
*/
-uint64_t pcireg_intr_status_get(struct pcibus_info * pcibus_info)
+u64 pcireg_intr_status_get(struct pcibus_info * pcibus_info)
{
union br_ptr __iomem *ptr = (union br_ptr __iomem *)pcibus_info->pbi_buscommon.bs_base;
- uint64_t ret = 0;
+ u64 ret = 0;
if (pcibus_info) {
switch (pcibus_info->pbi_bridge_type) {
/*
* Interrupt Enable Register Access -- Read/Write 0000_0108
*/
-void pcireg_intr_enable_bit_clr(struct pcibus_info *pcibus_info, uint64_t bits)
+void pcireg_intr_enable_bit_clr(struct pcibus_info *pcibus_info, u64 bits)
{
union br_ptr __iomem *ptr = (union br_ptr __iomem *)pcibus_info->pbi_buscommon.bs_base;
}
}
-void pcireg_intr_enable_bit_set(struct pcibus_info *pcibus_info, uint64_t bits)
+void pcireg_intr_enable_bit_set(struct pcibus_info *pcibus_info, u64 bits)
{
union br_ptr __iomem *ptr = (union br_ptr __iomem *)pcibus_info->pbi_buscommon.bs_base;
* Intr Host Address Register (int_addr) -- Read/Write 0000_0130 - 0000_0168
*/
void pcireg_intr_addr_addr_set(struct pcibus_info *pcibus_info, int int_n,
- uint64_t addr)
+ u64 addr)
{
union br_ptr __iomem *ptr = (union br_ptr __iomem *)pcibus_info->pbi_buscommon.bs_base;
/*
* Device(x) Write Buffer Flush Reg Access -- Read Only 0000_0240 - 0000_0258
*/
-uint64_t pcireg_wrb_flush_get(struct pcibus_info *pcibus_info, int device)
+u64 pcireg_wrb_flush_get(struct pcibus_info *pcibus_info, int device)
{
union br_ptr __iomem *ptr = (union br_ptr __iomem *)pcibus_info->pbi_buscommon.bs_base;
- uint64_t ret = 0;
+ u64 ret = 0;
if (pcibus_info) {
switch (pcibus_info->pbi_bridge_type) {
}
void pcireg_int_ate_set(struct pcibus_info *pcibus_info, int ate_index,
- uint64_t val)
+ u64 val)
{
union br_ptr __iomem *ptr = (union br_ptr __iomem *)pcibus_info->pbi_buscommon.bs_base;
}
}
-uint64_t __iomem *pcireg_int_ate_addr(struct pcibus_info *pcibus_info, int ate_index)
+u64 __iomem *pcireg_int_ate_addr(struct pcibus_info *pcibus_info, int ate_index)
{
union br_ptr __iomem *ptr = (union br_ptr __iomem *)pcibus_info->pbi_buscommon.bs_base;
- uint64_t __iomem *ret = NULL;
+ u64 __iomem *ret = NULL;
if (pcibus_info) {
switch (pcibus_info->pbi_bridge_type) {
#include <asm/sn/pcibus_provider_defs.h>
#include <asm/sn/tioca_provider.h>
-uint32_t tioca_gart_found;
+u32 tioca_gart_found;
EXPORT_SYMBOL(tioca_gart_found); /* used by agp-sgi */
LIST_HEAD(tioca_list);
static int
tioca_gart_init(struct tioca_kernel *tioca_kern)
{
- uint64_t ap_reg;
- uint64_t offset;
+ u64 ap_reg;
+ u64 offset;
struct page *tmp;
struct tioca_common *tioca_common;
struct tioca __iomem *ca_base;
tioca_fastwrite_enable(struct tioca_kernel *tioca_kern)
{
int cap_ptr;
- uint32_t reg;
+ u32 reg;
struct tioca __iomem *tioca_base;
struct pci_dev *pdev;
struct tioca_common *common;
* We will always use 0x1
* 55:55 - Swap bytes Currently unused
*/
-static uint64_t
+static u64
tioca_dma_d64(unsigned long paddr)
{
dma_addr_t bus_addr;
* and so a given CA can only directly target nodes in the range
* xxx - xxx+255.
*/
-static uint64_t
-tioca_dma_d48(struct pci_dev *pdev, uint64_t paddr)
+static u64
+tioca_dma_d48(struct pci_dev *pdev, u64 paddr)
{
struct tioca_common *tioca_common;
struct tioca __iomem *ca_base;
- uint64_t ct_addr;
+ u64 ct_addr;
dma_addr_t bus_addr;
- uint32_t node_upper;
- uint64_t agp_dma_extn;
+ u32 node_upper;
+ u64 agp_dma_extn;
struct pcidev_info *pcidev_info = SN_PCIDEV_INFO(pdev);
tioca_common = (struct tioca_common *)pcidev_info->pdi_pcibus_info;
* dma_addr_t is guarenteed to be contiguous in CA bus space.
*/
static dma_addr_t
-tioca_dma_mapped(struct pci_dev *pdev, uint64_t paddr, size_t req_size)
+tioca_dma_mapped(struct pci_dev *pdev, u64 paddr, size_t req_size)
{
int i, ps, ps_shift, entry, entries, mapsize, last_entry;
- uint64_t xio_addr, end_xio_addr;
+ u64 xio_addr, end_xio_addr;
struct tioca_common *tioca_common;
struct tioca_kernel *tioca_kern;
dma_addr_t bus_addr = 0;
* The mapping mode used is based on the devices dma_mask. As a last resort
* use the GART mapped mode.
*/
-static uint64_t
-tioca_dma_map(struct pci_dev *pdev, uint64_t paddr, size_t byte_count)
+static u64
+tioca_dma_map(struct pci_dev *pdev, u64 paddr, size_t byte_count)
{
- uint64_t mapaddr;
+ u64 mapaddr;
/*
* If card is 64 or 48 bit addresable, use a direct mapping. 32
{
struct tioca_common *soft = arg;
struct ia64_sal_retval ret_stuff;
- uint64_t segment;
- uint64_t busnum;
+ u64 segment;
+ u64 busnum;
ret_stuff.status = 0;
ret_stuff.v0 = 0;
INIT_LIST_HEAD(&tioca_kern->ca_dmamaps);
tioca_kern->ca_closest_node =
nasid_to_cnodeid(tioca_common->ca_closest_nasid);
- tioca_common->ca_kernel_private = (uint64_t) tioca_kern;
+ tioca_common->ca_kernel_private = (u64) tioca_kern;
bus = pci_find_bus(tioca_common->ca_common.bs_persist_segment,
tioca_common->ca_common.bs_persist_busnum);
* 61 - 0 since this is not an MSI transaction
* 60:54 - reserved, MBZ
*/
-static uint64_t
+static u64
tioce_dma_d64(unsigned long ct_addr)
{
- uint64_t bus_addr;
+ u64 bus_addr;
bus_addr = ct_addr | (1UL << 63);
* length, and if enough resources exist, fill in the ATE's and construct a
* tioce_dmamap struct to track the mapping.
*/
-static uint64_t
+static u64
tioce_alloc_map(struct tioce_kernel *ce_kern, int type, int port,
- uint64_t ct_addr, int len)
+ u64 ct_addr, int len)
{
int i;
int j;
int entries;
int nates;
int pagesize;
- uint64_t *ate_shadow;
- uint64_t *ate_reg;
- uint64_t addr;
+ u64 *ate_shadow;
+ u64 *ate_reg;
+ u64 addr;
struct tioce *ce_mmr;
- uint64_t bus_base;
+ u64 bus_base;
struct tioce_dmamap *map;
ce_mmr = (struct tioce *)ce_kern->ce_common->ce_pcibus.bs_base;
addr = ct_addr;
for (j = 0; j < nates; j++) {
- uint64_t ate;
+ u64 ate;
ate = ATE_MAKE(addr, pagesize);
ate_shadow[i + j] = ate;
*
* Map @paddr into 32-bit bus space of the CE associated with @pcidev_info.
*/
-static uint64_t
-tioce_dma_d32(struct pci_dev *pdev, uint64_t ct_addr)
+static u64
+tioce_dma_d32(struct pci_dev *pdev, u64 ct_addr)
{
int dma_ok;
int port;
struct tioce *ce_mmr;
struct tioce_kernel *ce_kern;
- uint64_t ct_upper;
- uint64_t ct_lower;
+ u64 ct_upper;
+ u64 ct_lower;
dma_addr_t bus_addr;
ct_upper = ct_addr & ~0x3fffffffUL;
pcidev_to_tioce(pdev, &ce_mmr, &ce_kern, &port);
if (ce_kern->ce_port[port].dirmap_refcnt == 0) {
- uint64_t tmp;
+ u64 tmp;
ce_kern->ce_port[port].dirmap_shadow = ct_upper;
writeq(ct_upper, &ce_mmr->ce_ure_dir_map[port]);
* Given a TIOCE bus address, set the appropriate bit to indicate barrier
* attributes.
*/
-static uint64_t
-tioce_dma_barrier(uint64_t bus_addr, int on)
+static u64
+tioce_dma_barrier(u64 bus_addr, int on)
{
- uint64_t barrier_bit;
+ u64 barrier_bit;
/* barrier not supported in M40/M40S mode */
if (TIOCE_M40_ADDR(bus_addr) || TIOCE_M40S_ADDR(bus_addr))
list_for_each_entry(map, &ce_kern->ce_dmamap_list,
ce_dmamap_list) {
- uint64_t last;
+ u64 last;
last = map->pci_start + map->nbytes - 1;
if (bus_addr >= map->pci_start && bus_addr <= last)
* This is the main wrapper for mapping host physical pages to CE PCI space.
* The mapping mode used is based on the device's dma_mask.
*/
-static uint64_t
-tioce_do_dma_map(struct pci_dev *pdev, uint64_t paddr, size_t byte_count,
+static u64
+tioce_do_dma_map(struct pci_dev *pdev, u64 paddr, size_t byte_count,
int barrier)
{
unsigned long flags;
- uint64_t ct_addr;
- uint64_t mapaddr = 0;
+ u64 ct_addr;
+ u64 mapaddr = 0;
struct tioce_kernel *ce_kern;
struct tioce_dmamap *map;
int port;
- uint64_t dma_mask;
+ u64 dma_mask;
dma_mask = (barrier) ? pdev->dev.coherent_dma_mask : pdev->dma_mask;
* address bits than this device can support.
*/
list_for_each_entry(map, &ce_kern->ce_dmamap_list, ce_dmamap_list) {
- uint64_t last;
+ u64 last;
last = map->ct_start + map->nbytes - 1;
if (ct_addr >= map->ct_start &&
* Simply call tioce_do_dma_map() to create a map with the barrier bit clear
* in the address.
*/
-static uint64_t
-tioce_dma(struct pci_dev *pdev, uint64_t paddr, size_t byte_count)
+static u64
+tioce_dma(struct pci_dev *pdev, u64 paddr, size_t byte_count)
{
return tioce_do_dma_map(pdev, paddr, byte_count, 0);
}
*
* Simply call tioce_do_dma_map() to create a map with the barrier bit set
* in the address.
- */ static uint64_t
-tioce_dma_consistent(struct pci_dev *pdev, uint64_t paddr, size_t byte_count)
+ */ static u64
+tioce_dma_consistent(struct pci_dev *pdev, u64 paddr, size_t byte_count)
{
return tioce_do_dma_map(pdev, paddr, byte_count, 1);
}
tioce_kern_init(struct tioce_common *tioce_common)
{
int i;
- uint32_t tmp;
+ u32 tmp;
struct tioce *tioce_mmr;
struct tioce_kernel *tioce_kern;
tioce_kern->ce_common = tioce_common;
spin_lock_init(&tioce_kern->ce_lock);
INIT_LIST_HEAD(&tioce_kern->ce_dmamap_list);
- tioce_common->ce_kernel_private = (uint64_t) tioce_kern;
+ tioce_common->ce_kernel_private = (u64) tioce_kern;
/*
* Determine the secondary bus number of the port2 logical PPB.
raw_pci_ops->read(tioce_common->ce_pcibus.bs_persist_segment,
tioce_common->ce_pcibus.bs_persist_busnum,
PCI_DEVFN(2, 0), PCI_SECONDARY_BUS, 1, &tmp);
- tioce_kern->ce_port1_secondary = (uint8_t) tmp;
+ tioce_kern->ce_port1_secondary = (u8) tmp;
/*
* Set PMU pagesize to the largest size available, and zero out
struct pcidev_info *pcidev_info;
struct tioce_common *ce_common;
struct tioce *ce_mmr;
- uint64_t force_int_val;
+ u64 force_int_val;
if (!sn_irq_info->irq_bridge)
return;
struct tioce_common *ce_common;
struct tioce *ce_mmr;
int bit;
- uint64_t vector;
+ u64 vector;
pcidev_info = (struct pcidev_info *)sn_irq_info->irq_pciioinfo;
if (!pcidev_info)
bit = sn_irq_info->irq_int_bit;
__sn_setq_relaxed(&ce_mmr->ce_adm_int_mask, (1UL << bit));
- vector = (uint64_t)sn_irq_info->irq_irq << INTR_VECTOR_SHFT;
+ vector = (u64)sn_irq_info->irq_irq << INTR_VECTOR_SHFT;
vector |= sn_irq_info->irq_xtalkaddr;
writeq(vector, &ce_mmr->ce_adm_int_dest[bit]);
__sn_clrq_relaxed(&ce_mmr->ce_adm_int_mask, (1UL << bit));
#include <linux/reboot.h>
#include <asm/reboot.h>
+void (*pm_power_off)(void);
+EXPORT_SYMBOL(pm_power_off);
+
/*
* Urgs ... Too many MIPS machines to handle this in a generic way.
* So handle all using function pointers to machine specific
void machine_power_off(void)
{
+ if (pm_power_off)
+ pm_power_off();
+
_machine_power_off();
}
# CONFIG_DL2K is not set
CONFIG_E1000=m
CONFIG_E1000_NAPI=y
+# CONFIG_E1000_DISABLE_PACKET_SPLIT is not set
# CONFIG_NS83820 is not set
# CONFIG_HAMACHI is not set
# CONFIG_YELLOWFIN is not set
# CONFIG_DL2K is not set
CONFIG_E1000=m
# CONFIG_E1000_NAPI is not set
+# CONFIG_E1000_DISABLE_PACKET_SPLIT is not set
# CONFIG_NS83820 is not set
# CONFIG_HAMACHI is not set
# CONFIG_YELLOWFIN is not set
# CONFIG_DL2K is not set
CONFIG_E1000=m
# CONFIG_E1000_NAPI is not set
+# CONFIG_E1000_DISABLE_PACKET_SPLIT is not set
# CONFIG_NS83820 is not set
# CONFIG_HAMACHI is not set
# CONFIG_YELLOWFIN is not set
# CONFIG_DL2K is not set
CONFIG_E1000=y
# CONFIG_E1000_NAPI is not set
+# CONFIG_E1000_DISABLE_PACKET_SPLIT is not set
# CONFIG_NS83820 is not set
# CONFIG_HAMACHI is not set
# CONFIG_YELLOWFIN is not set
# CONFIG_DL2K is not set
CONFIG_E1000=m
# CONFIG_E1000_NAPI is not set
+# CONFIG_E1000_DISABLE_PACKET_SPLIT is not set
# CONFIG_NS83820 is not set
# CONFIG_HAMACHI is not set
# CONFIG_YELLOWFIN is not set
# CONFIG_DL2K is not set
CONFIG_E1000=y
# CONFIG_E1000_NAPI is not set
+# CONFIG_E1000_DISABLE_PACKET_SPLIT is not set
# CONFIG_NS83820 is not set
# CONFIG_HAMACHI is not set
# CONFIG_YELLOWFIN is not set
# CONFIG_DL2K is not set
CONFIG_E1000=y
# CONFIG_E1000_NAPI is not set
+# CONFIG_E1000_DISABLE_PACKET_SPLIT is not set
# CONFIG_NS83820 is not set
# CONFIG_HAMACHI is not set
# CONFIG_YELLOWFIN is not set
# CONFIG_DL2K is not set
CONFIG_E1000=y
# CONFIG_E1000_NAPI is not set
+# CONFIG_E1000_DISABLE_PACKET_SPLIT is not set
# CONFIG_NS83820 is not set
# CONFIG_HAMACHI is not set
# CONFIG_YELLOWFIN is not set
MTMSRD(r10)
lwz r9,TI_FLAGS(r12)
li r8,-_LAST_ERRNO
- andi. r0,r9,(_TIF_SYSCALL_T_OR_A|_TIF_SIGPENDING|_TIF_NEED_RESCHED|_TIF_RESTOREALL)
+ andi. r0,r9,(_TIF_SYSCALL_T_OR_A|_TIF_SIGPENDING|_TIF_NEED_RESCHED|_TIF_RESTOREALL|_TIF_RESTORE_SIGMASK)
bne- syscall_exit_work
cmplw 0,r3,r8
blt+ syscall_exit_cont
lwz r5,_MSR(r1)
andi. r5,r5,MSR_PR
beq ret_from_except
- andi. r0,r9,_TIF_SIGPENDING
+ andi. r0,r9,_TIF_SIGPENDING|_TIF_RESTORE_SIGMASK
beq ret_from_except
b do_user_signal
8:
/* Check current_thread_info()->flags */
rlwinm r9,r1,0,0,(31-THREAD_SHIFT)
lwz r9,TI_FLAGS(r9)
- andi. r0,r9,(_TIF_SIGPENDING|_TIF_NEED_RESCHED|_TIF_RESTOREALL)
+ andi. r0,r9,(_TIF_SIGPENDING|_TIF_NEED_RESCHED|_TIF_RESTOREALL|_TIF_RESTORE_SIGMASK)
bne do_work
restore_user:
lwz r9,TI_FLAGS(r9)
andi. r0,r9,_TIF_NEED_RESCHED
bne- do_resched
- andi. r0,r9,_TIF_SIGPENDING
+ andi. r0,r9,_TIF_SIGPENDING|_TIF_RESTORE_SIGMASK
beq restore_user
do_user_signal: /* r10 contains MSR_KERNEL here */
ori r10,r10,MSR_EE
mtmsrd r10,1
ld r9,TI_FLAGS(r12)
li r11,-_LAST_ERRNO
- andi. r0,r9,(_TIF_SYSCALL_T_OR_A|_TIF_SINGLESTEP|_TIF_SIGPENDING|_TIF_NEED_RESCHED|_TIF_RESTOREALL|_TIF_SAVE_NVGPRS|_TIF_NOERROR)
+ andi. r0,r9,(_TIF_SYSCALL_T_OR_A|_TIF_SINGLESTEP|_TIF_SIGPENDING|_TIF_NEED_RESCHED|_TIF_RESTOREALL|_TIF_SAVE_NVGPRS|_TIF_NOERROR|_TIF_RESTORE_SIGMASK)
bne- syscall_exit_work
cmpld r3,r11
ld r5,_CCR(r1)
/*
* Atomically swap in the new signal mask, and wait for a signal.
*/
-long sys_sigsuspend(old_sigset_t mask, int p2, int p3, int p4, int p6, int p7,
- struct pt_regs *regs)
+long sys_sigsuspend(old_sigset_t mask)
{
sigset_t saveset;
recalc_sigpending();
spin_unlock_irq(¤t->sighand->siglock);
- regs->result = -EINTR;
- regs->gpr[3] = EINTR;
- regs->ccr |= 0x10000000;
- while (1) {
- current->state = TASK_INTERRUPTIBLE;
- schedule();
- if (do_signal(&saveset, regs)) {
- set_thread_flag(TIF_RESTOREALL);
- return 0;
- }
- }
-}
-
-long sys_rt_sigsuspend(
-#ifdef CONFIG_PPC64
- compat_sigset_t __user *unewset,
-#else
- sigset_t __user *unewset,
-#endif
- size_t sigsetsize, int p3, int p4,
- int p6, int p7, struct pt_regs *regs)
-{
- sigset_t saveset, newset;
-
- /* XXX: Don't preclude handling different sized sigset_t's. */
- if (sigsetsize != sizeof(sigset_t))
- return -EINVAL;
-
- if (get_sigset_t(&newset, unewset))
- return -EFAULT;
- sigdelsetmask(&newset, ~_BLOCKABLE);
-
- spin_lock_irq(¤t->sighand->siglock);
- saveset = current->blocked;
- current->blocked = newset;
- recalc_sigpending();
- spin_unlock_irq(¤t->sighand->siglock);
-
- regs->result = -EINTR;
- regs->gpr[3] = EINTR;
- regs->ccr |= 0x10000000;
- while (1) {
- current->state = TASK_INTERRUPTIBLE;
- schedule();
- if (do_signal(&saveset, regs)) {
- set_thread_flag(TIF_RESTOREALL);
- return 0;
- }
- }
+ current->state = TASK_INTERRUPTIBLE;
+ schedule();
+ set_thread_flag(TIF_RESTORE_SIGMASK);
+ return -ERESTARTNOHAND;
}
#ifdef CONFIG_PPC32
{
siginfo_t info;
struct k_sigaction ka;
- unsigned int frame, newsp;
+ unsigned int newsp;
int signr, ret;
#ifdef CONFIG_PPC32
}
#endif
- if (!oldset)
+ if (test_thread_flag(TIF_RESTORE_SIGMASK))
+ oldset = ¤t->saved_sigmask;
+ else if (!oldset)
oldset = ¤t->blocked;
- newsp = frame = 0;
-
signr = get_signal_to_deliver(&info, &ka, regs, NULL);
#ifdef CONFIG_PPC32
no_signal:
}
}
- if (signr == 0)
+ if (signr == 0) {
+ /* No signal to deliver -- put the saved sigmask back */
+ if (test_thread_flag(TIF_RESTORE_SIGMASK)) {
+ clear_thread_flag(TIF_RESTORE_SIGMASK);
+ sigprocmask(SIG_SETMASK, ¤t->saved_sigmask, NULL);
+ }
return 0; /* no signals delivered */
+ }
if ((ka.sa.sa_flags & SA_ONSTACK) && current->sas_ss_size
&& !on_sig_stack(regs->gpr[1]))
sigaddset(¤t->blocked, signr);
recalc_sigpending();
spin_unlock_irq(¤t->sighand->siglock);
+ /* A signal was successfully delivered; the saved sigmask is in
+ its frame, and we can clear the TIF_RESTORE_SIGMASK flag */
+ if (test_thread_flag(TIF_RESTORE_SIGMASK))
+ clear_thread_flag(TIF_RESTORE_SIGMASK);
}
return ret;
char abigap[288];
} __attribute__ ((aligned (16)));
-
-/*
- * Atomically swap in the new signal mask, and wait for a signal.
- */
-long sys_rt_sigsuspend(sigset_t __user *unewset, size_t sigsetsize, int p3, int p4,
- int p6, int p7, struct pt_regs *regs)
-{
- sigset_t saveset, newset;
-
- /* XXX: Don't preclude handling different sized sigset_t's. */
- if (sigsetsize != sizeof(sigset_t))
- return -EINVAL;
-
- if (copy_from_user(&newset, unewset, sizeof(newset)))
- return -EFAULT;
- sigdelsetmask(&newset, ~_BLOCKABLE);
-
- spin_lock_irq(¤t->sighand->siglock);
- saveset = current->blocked;
- current->blocked = newset;
- recalc_sigpending();
- spin_unlock_irq(¤t->sighand->siglock);
-
- regs->result = -EINTR;
- regs->gpr[3] = EINTR;
- regs->ccr |= 0x10000000;
- while (1) {
- current->state = TASK_INTERRUPTIBLE;
- schedule();
- if (do_signal(&saveset, regs)) {
- set_thread_flag(TIF_RESTOREALL);
- return 0;
- }
- }
-}
-
long sys_sigaltstack(const stack_t __user *uss, stack_t __user *uoss, unsigned long r5,
unsigned long r6, unsigned long r7, unsigned long r8,
struct pt_regs *regs)
if (test_thread_flag(TIF_32BIT))
return do_signal32(oldset, regs);
- if (!oldset)
+ if (test_thread_flag(TIF_RESTORE_SIGMASK))
+ oldset = ¤t->saved_sigmask;
+ else if (!oldset)
oldset = ¤t->blocked;
signr = get_signal_to_deliver(&info, &ka, regs, NULL);
if (signr > 0) {
+ int ret;
+
/* Whee! Actually deliver the signal. */
if (TRAP(regs) == 0x0C00)
syscall_restart(regs, &ka);
if (current->thread.dabr)
set_dabr(current->thread.dabr);
- return handle_signal(signr, &ka, &info, oldset, regs);
+ ret = handle_signal(signr, &ka, &info, oldset, regs);
+
+ /* If a signal was successfully delivered, the saved sigmask is in
+ its frame, and we can clear the TIF_RESTORE_SIGMASK flag */
+ if (ret && test_thread_flag(TIF_RESTORE_SIGMASK))
+ clear_thread_flag(TIF_RESTORE_SIGMASK);
+
+ return ret;
}
if (TRAP(regs) == 0x0C00) { /* System Call! */
regs->result = 0;
}
}
+ /* No signal to deliver -- put the saved sigmask back */
+ if (test_thread_flag(TIF_RESTORE_SIGMASK)) {
+ clear_thread_flag(TIF_RESTORE_SIGMASK);
+ sigprocmask(SIG_SETMASK, ¤t->saved_sigmask, NULL);
+ }
return 0;
}
SYSCALL(inotify_rm_watch)
SYSCALL(spu_run)
SYSCALL(spu_create)
+COMPAT_SYS(pselect6)
+COMPAT_SYS(ppoll)
macio->type != macio_intrepid)
return -ENODEV;
+ printk(KERN_DEBUG "Hard reset of PHY chip ...\n");
+
LOCK(flags);
MACIO_OUT8(KL_GPIO_ETH_PHY_RESET, KEYLARGO_GPIO_OUTPUT_ENABLE);
(void)MACIO_IN8(KL_GPIO_ETH_PHY_RESET);
UNLOCK(flags);
- mdelay(10);
+ msleep(10);
LOCK(flags);
MACIO_OUT8(KL_GPIO_ETH_PHY_RESET, /*KEYLARGO_GPIO_OUTPUT_ENABLE | */
KEYLARGO_GPIO_OUTOUT_DATA);
UNLOCK(flags);
- mdelay(10);
+ msleep(10);
return 0;
}
# CONFIG_DL2K is not set
CONFIG_E1000=y
# CONFIG_E1000_NAPI is not set
+# CONFIG_E1000_DISABLE_PACKET_SPLIT is not set
# CONFIG_NS83820 is not set
# CONFIG_HAMACHI is not set
# CONFIG_YELLOWFIN is not set
# CONFIG_DL2K is not set
CONFIG_E1000=y
# CONFIG_E1000_NAPI is not set
+# CONFIG_E1000_DISABLE_PACKET_SPLIT is not set
# CONFIG_NS83820 is not set
# CONFIG_HAMACHI is not set
# CONFIG_YELLOWFIN is not set
# CONFIG_DL2K is not set
CONFIG_E1000=y
# CONFIG_E1000_NAPI is not set
+# CONFIG_E1000_DISABLE_PACKET_SPLIT is not set
# CONFIG_NS83820 is not set
# CONFIG_HAMACHI is not set
# CONFIG_YELLOWFIN is not set
# CONFIG_DL2K is not set
CONFIG_E1000=y
# CONFIG_E1000_NAPI is not set
+# CONFIG_E1000_DISABLE_PACKET_SPLIT is not set
# CONFIG_NS83820 is not set
# CONFIG_HAMACHI is not set
# CONFIG_YELLOWFIN is not set
};
#endif
-#ifdef CONFIG_MV643XX_ETH
+#if defined(CONFIG_MV643XX_ETH) || defined(CONFIG_MV643XX_ETH_MODULE)
static struct resource mv64x60_eth_shared_resources[] = {
[0] = {
.name = "ethernet shared base",
&mpsc0_device,
&mpsc1_device,
#endif
-#ifdef CONFIG_MV643XX_ETH
+#if defined(CONFIG_MV643XX_ETH) || defined(CONFIG_MV643XX_ETH_MODULE)
&mv64x60_eth_shared_device,
#endif
#ifdef CONFIG_MV643XX_ETH_0
bool
default y
+config GENERIC_IOMAP
+ bool
+
config ARCH_MAY_HAVE_PC_FDC
bool
- default y
source "init/Kconfig"
config SH_7751_SOLUTION_ENGINE
bool "SolutionEngine7751"
+ select CPU_SUBTYPE_SH7751
help
Select 7751 SolutionEngine if configuring for a Hitachi SH7751
evaluation board.
config SH_7300_SOLUTION_ENGINE
bool "SolutionEngine7300"
+ select CPU_SUBTYPE_SH7300
help
Select 7300 SolutionEngine if configuring for a Hitachi SH7300(SH-Mobile V)
evaluation board.
config SH_73180_SOLUTION_ENGINE
bool "SolutionEngine73180"
+ select CPU_SUBTYPE_SH73180
help
Select 73180 SolutionEngine if configuring for a Hitachi SH73180(SH-Mobile 3)
evaluation board.
config SH_7751_SYSTEMH
bool "SystemH7751R"
+ select CPU_SUBTYPE_SH7751R
help
Select SystemH if you are configuring for a Renesas SystemH
7751R evaluation board.
config SH_STB1_OVERDRIVE
bool "STB1_Overdrive"
-config SH_HP620
- bool "HP620"
+config SH_HP6XX
+ bool "HP6XX"
help
- Select HP620 if configuring for a HP jornada HP620.
+ Select HP6XX if configuring for a HP jornada HP6xx.
More information (hardware only) at
<http://www.hp.com/jornada/>.
-config SH_HP680
- bool "HP680"
- help
- Select HP680 if configuring for a HP Jornada HP680.
- More information (hardware only) at
- <http://www.hp.com/jornada/products/680/>.
-
-config SH_HP690
- bool "HP690"
- help
- Select HP690 if configuring for a HP Jornada HP690.
- More information (hardware only)
- at <http://www.hp.com/jornada/products/680/>.
-
config SH_CQREEK
bool "CqREEK"
help
config SH_SATURN
bool "Saturn"
+ select CPU_SUBTYPE_SH7604
help
Select Saturn if configuring for a SEGA Saturn.
config SH_DREAMCAST
bool "Dreamcast"
+ select CPU_SUBTYPE_SH7091
help
Select Dreamcast if configuring for a SEGA Dreamcast.
More information at
config SH_SH2000
bool "SH2000"
+ select CPU_SUBTYPE_SH7709
help
SH-2000 is a single-board computer based around SH7709A chip
intended for embedded applications.
bool "ADX"
config SH_MPC1211
- bool "MPC1211"
+ bool "Interface MPC1211"
+ help
+ CTP/PCI-SH02 is a CPU module computer that is produced
+ by Interface Corporation.
+ More information at <http://www.interface.co.jp>
config SH_SH03
- bool "SH03"
+ bool "Interface CTP/PCI-SH03"
help
- CTP/PCI-SH03 is a CPU module computer that produced
+ CTP/PCI-SH03 is a CPU module computer that is produced
by Interface Corporation.
- It is compact and excellent in durability.
- It will play an active part in your factory or laboratory
- as a FA computer.
More information at <http://www.interface.co.jp>
config SH_SECUREEDGE5410
bool "SecureEdge5410"
+ select CPU_SUBTYPE_SH7751R
help
Select SecureEdge5410 if configuring for a SnapGear SH board.
This includes both the OEM SecureEdge products as well as the
config SH_HS7751RVOIP
bool "HS7751RVOIP"
+ select CPU_SUBTYPE_SH7751R
help
Select HS7751RVOIP if configuring for a Renesas Technology
Sales VoIP board.
config SH_RTS7751R2D
bool "RTS7751R2D"
+ select CPU_SUBTYPE_SH7751R
help
Select RTS7751R2D if configuring for a Renesas Technology
Sales SH-Graphics board.
+config SH_R7780RP
+ bool "R7780RP-1"
+ select CPU_SUBTYPE_SH7780
+ help
+ Select R7780RP-1 if configuring for a Renesas Solutions
+ HIGHLANDER board.
+
config SH_EDOSK7705
bool "EDOSK7705"
+ select CPU_SUBTYPE_SH7705
config SH_SH4202_MICRODEV
bool "SH4-202 MicroDev"
+ select CPU_SUBTYPE_SH4_202
help
Select SH4-202 MicroDev if configuring for a SuperH MicroDev board
with an SH4-202 CPU.
+config SH_LANDISK
+ bool "LANDISK"
+ select CPU_SUBTYPE_SH7751R
+ help
+ I-O DATA DEVICE, INC. "LANDISK Series" support.
+
+config SH_TITAN
+ bool "TITAN"
+ select CPU_SUBTYPE_SH7751R
+ help
+ Select Titan if you are configuring for a Nimble Microsystems
+ NetEngine NP51R.
+
config SH_UNKNOWN
bool "BareCPU"
help
endchoice
-choice
- prompt "Processor family"
- default CPU_SH4
- help
- This option determines the CPU family to compile for. Supported
- targets are SH-2, SH-3, and SH-4. These options are independent of
- CPU functionality. As such, SH-DSP users will still want to select
- their respective processor family in addition to the DSP support
- option.
-
-config CPU_SH2
- bool "SH-2"
- select SH_WRITETHROUGH
-
-config CPU_SH3
- bool "SH-3"
-
-config CPU_SH4
- bool "SH-4"
-
-endchoice
-
-choice
- prompt "Processor subtype"
-
-config CPU_SUBTYPE_SH7604
- bool "SH7604"
- depends on CPU_SH2
- help
- Select SH7604 if you have SH7604
-
-config CPU_SUBTYPE_SH7300
- bool "SH7300"
- depends on CPU_SH3
-
-config CPU_SUBTYPE_SH7705
- bool "SH7705"
- depends on CPU_SH3
-
-config CPU_SUBTYPE_SH7707
- bool "SH7707"
- depends on CPU_SH3
- help
- Select SH7707 if you have a 60 Mhz SH-3 HD6417707 CPU.
-
-config CPU_SUBTYPE_SH7708
- bool "SH7708"
- depends on CPU_SH3
- help
- Select SH7708 if you have a 60 Mhz SH-3 HD6417708S or
- if you have a 100 Mhz SH-3 HD6417708R CPU.
-
-config CPU_SUBTYPE_SH7709
- bool "SH7709"
- depends on CPU_SH3
- help
- Select SH7709 if you have a 80 Mhz SH-3 HD6417709 CPU.
-
-config CPU_SUBTYPE_SH7750
- bool "SH7750"
- depends on CPU_SH4
- help
- Select SH7750 if you have a 200 Mhz SH-4 HD6417750 CPU.
-
-config CPU_SUBTYPE_SH7751
- bool "SH7751/SH7751R"
- depends on CPU_SH4
- help
- Select SH7751 if you have a 166 Mhz SH-4 HD6417751 CPU,
- or if you have a HD6417751R CPU.
-
-config CPU_SUBTYPE_SH7760
- bool "SH7760"
- depends on CPU_SH4
-
-config CPU_SUBTYPE_SH73180
- bool "SH73180"
- depends on CPU_SH4
-
-config CPU_SUBTYPE_ST40STB1
- bool "ST40STB1 / ST40RA"
- depends on CPU_SH4
- help
- Select ST40STB1 if you have a ST40RA CPU.
- This was previously called the ST40STB1, hence the option name.
-
-config CPU_SUBTYPE_ST40GX1
- bool "ST40GX1"
- depends on CPU_SH4
- help
- Select ST40GX1 if you have a ST40GX1 CPU.
-
-config CPU_SUBTYPE_SH4_202
- bool "SH4-202"
- depends on CPU_SH4
-
-endchoice
-
-config SH7705_CACHE_32KB
- bool "Enable 32KB cache size for SH7705"
- depends on CPU_SUBTYPE_SH7705
- default y
-
-config MMU
- bool "Support for memory management hardware"
- depends on !CPU_SH2
- default y
- help
- Early SH processors (such as the SH7604) lack an MMU. In order to
- boot on these systems, this option must not be set.
-
- On other systems (such as the SH-3 and 4) where an MMU exists,
- turning this off will boot the kernel on these machines with the
- MMU implicitly switched off.
-
-choice
- prompt "HugeTLB page size"
- depends on HUGETLB_PAGE && CPU_SH4 && MMU
- default HUGETLB_PAGE_SIZE_64K
-
-config HUGETLB_PAGE_SIZE_64K
- bool "64K"
-
-config HUGETLB_PAGE_SIZE_1MB
- bool "1MB"
-
-endchoice
-
-config CMDLINE_BOOL
- bool "Default bootloader kernel arguments"
-
-config CMDLINE
- string "Initial kernel command string"
- depends on CMDLINE_BOOL
- default "console=ttySC1,115200"
+source "arch/sh/mm/Kconfig"
-# Platform-specific memory start and size definitions
config MEMORY_START
- hex "Physical memory start address" if !MEMORY_SET || MEMORY_OVERRIDE
- default "0x08000000" if !MEMORY_SET || MEMORY_OVERRIDE || !MEMORY_OVERRIDE && SH_ADX || SH_MPC1211 || SH_SH03 || SH_SECUREEDGE5410 || SH_SH4202_MICRODEV
- default "0x0c000000" if !MEMORY_OVERRIDE && (SH_DREAMCAST || SH_HP600 || SH_BIGSUR || SH_SH2000 || SH_73180_SOLUTION_ENGINE || SH_7300_SOLUTION_ENGINE || SH_7751_SOLUTION_ENGINE || SH_SOLUTION_ENGINE || SH_HS7751RVOIP || SH_RTS7751R2D || SH_EDOSK7705)
+ hex "Physical memory start address"
+ default "0x08000000"
---help---
Computers built with Hitachi SuperH processors always
map the ROM starting at address zero. But the processor
does not specify the range that RAM takes.
The physical memory (RAM) start address will be automatically
- set to 08000000, unless you selected one of the following
- processor types: SolutionEngine, Overdrive, HP620, HP680, HP690,
- in which case the start address will be set to 0c000000.
+ set to 08000000. Other platforms, such as the Solution Engine
+ boards typically map RAM at 0C000000.
- Tweak this only when porting to a new machine which is not already
- known by the config system. Changing it from the known correct
+ Tweak this only when porting to a new machine which does not
+ already have a defconfig. Changing it from the known correct
value on any of the known systems will only lead to disaster.
config MEMORY_SIZE
- hex "Physical memory size" if !MEMORY_SET || MEMORY_OVERRIDE
- default "0x00400000" if !MEMORY_SET || MEMORY_OVERRIDE || !MEMORY_OVERRIDE && SH_ADX || !MEMORY_OVERRIDE && (SH_HP600 || SH_BIGSUR || SH_SH2000)
- default "0x01000000" if !MEMORY_OVERRIDE && SH_DREAMCAST || SH_SECUREEDGE5410 || SH_EDOSK7705
- default "0x02000000" if !MEMORY_OVERRIDE && (SH_73180_SOLUTION_ENGINE || SH_SOLUTION_ENGINE)
- default "0x04000000" if !MEMORY_OVERRIDE && (SH_7300_SOLUTION_ENGINE || SH_7751_SOLUTION_ENGINE || SH_HS7751RVOIP || SH_RTS7751R2D || SH_SH4202_MICRODEV)
- default "0x08000000" if SH_MPC1211 || SH_SH03
+ hex "Physical memory size"
+ default "0x00400000"
help
This sets the default memory size assumed by your SH kernel. It can
be overridden as normal by the 'mem=' argument on the kernel command
as 0x00400000 which was the default value before this became
configurable.
-config MEMORY_SET
- bool
- depends on !MEMORY_OVERRIDE && (SH_MPC1211 || SH_SH03 || SH_ADX || SH_DREAMCAST || SH_HP600 || SH_BIGSUR || SH_SH2000 || SH_7751_SOLUTION_ENGINE || SH_SOLUTION_ENGINE || SH_SECUREEDGE5410 || SH_HS7751RVOIP || SH_RTS7751R2D || SH_SH4202_MICRODEV || SH_EDOSK7705)
- default y
- help
- This is an option about which you will never be asked a question.
- Therefore, I conclude that you do not exist - go away.
-
- There is a grue here.
-
-# If none of the above have set memory start/size, ask the user.
-config MEMORY_OVERRIDE
- bool "Override default load address and memory size"
-
-# XXX: break these out into the board-specific configs below
config CF_ENABLER
bool "Compact Flash Enabler support"
depends on SH_ADX || SH_SOLUTION_ENGINE || SH_UNKNOWN || SH_CAT68701 || SH_SH03
default "0xb8000000" if CF_AREA6
default "0xb4000000" if CF_AREA5
+menu "Processor features"
+
+config CPU_LITTLE_ENDIAN
+ bool "Little Endian"
+ help
+ Some SuperH machines can be configured for either little or big
+ endian byte order. These modes require different kernels. Say Y if
+ your machine is little endian, N if it's a big endian machine.
+
# The SH7750 RTC module is disabled in the Dreamcast
config SH_RTC
bool
- depends on !SH_DREAMCAST && !SH_SATURN && !SH_7300_SOLUTION_ENGINE && !SH_73180_SOLUTION_ENGINE
+ depends on !SH_DREAMCAST && !SH_SATURN && !SH_7300_SOLUTION_ENGINE && \
+ !SH_73180_SOLUTION_ENGINE && !SH_LANDISK && \
+ !SH_R7780RP
default y
help
Selecting this option will allow the Linux kernel to emulate
If unsure, say N.
-config SH_HP600
+config SH_STORE_QUEUES
+ bool "Support for Store Queues"
+ depends on CPU_SH4
+ help
+ Selecting this option will enable an in-kernel API for manipulating
+ the store queues integrated in the SH-4 processors.
+
+config CPU_HAS_INTEVT
bool
- depends on SH_HP620 || SH_HP680 || SH_HP690
- default y
-config CPU_SUBTYPE_ST40
- bool
- depends on CPU_SUBTYPE_ST40STB1 || CPU_SUBTYPE_ST40GX1
- default y
+config CPU_HAS_PINT_IRQ
+ bool
-source "mm/Kconfig"
+config CPU_HAS_INTC2_IRQ
+ bool
-config ZERO_PAGE_OFFSET
- hex "Zero page offset"
- default "0x00001000" if !(SH_MPC1211 || SH_SH03)
- default "0x00004000" if SH_MPC1211 || SH_SH03
+config CPU_HAS_SR_RB
+ bool "CPU has SR.RB"
+ depends on CPU_SH3 || CPU_SH4
+ default y
help
- This sets the default offset of zero page.
+ This will enable the use of SR.RB register bank usage. Processors
+ that are lacking this bit must have another method in place for
+ accomplishing what is taken care of by the banked registers.
-# XXX: needs to lose subtype for system type
-config ST40_LMI_MEMORY
- bool "Memory on LMI"
- depends on CPU_SUBTYPE_ST40STB1
+ See <file:Documentation/sh/register-banks.txt> for further
+ information on SR.RB and register banking in the kernel in general.
-config MEMORY_START
- hex
- depends on CPU_SUBTYPE_ST40STB1 && ST40_LMI_MEMORY
- default "0x08000000"
+endmenu
-config MEMORY_SIZE
- hex
- depends on CPU_SUBTYPE_ST40STB1 && ST40_LMI_MEMORY
- default "0x00400000"
+menu "Timer support"
-config MEMORY_SET
- bool
- depends on CPU_SUBTYPE_ST40STB1 && ST40_LMI_MEMORY
+config SH_TMU
+ bool "TMU timer support"
default y
-
-config BOOT_LINK_OFFSET
- hex "Link address offset for booting"
- default "0x00800000"
help
- This option allows you to set the link address offset of the zImage.
- This can be useful if you are on a board which has a small amount of
- memory.
+ This enables the use of the TMU as the system timer.
-config CPU_LITTLE_ENDIAN
- bool "Little Endian"
- help
- Some SuperH machines can be configured for either little or big
- endian byte order. These modes require different kernels. Say Y if
- your machine is little endian, N if it's a big endian machine.
+endmenu
-config PREEMPT
- bool "Preemptible Kernel (EXPERIMENTAL)"
- depends on EXPERIMENTAL
+source "arch/sh/boards/renesas/hs7751rvoip/Kconfig"
-config UBC_WAKEUP
- bool "Wakeup UBC on startup"
+source "arch/sh/boards/renesas/rts7751r2d/Kconfig"
+
+config SH_PCLK_FREQ_BOOL
+ bool "Set default pclk frequency"
+ default y if !SH_RTC
+ default n
+
+config SH_PCLK_FREQ
+ int "Peripheral clock frequency (in Hz)"
+ depends on SH_PCLK_FREQ_BOOL
+ default "50000000" if CPU_SUBTYPE_SH7750 || CPU_SUBTYPE_SH7780
+ default "60000000" if CPU_SUBTYPE_SH7751
+ default "33333333" if CPU_SUBTYPE_SH7300 || CPU_SUBTYPE_SH7770 || CPU_SUBTYPE_SH7760
+ default "27000000" if CPU_SUBTYPE_SH73180
+ default "66000000" if CPU_SUBTYPE_SH4_202
help
- Selecting this option will wakeup the User Break Controller (UBC) on
- startup. Although the UBC is left in an awake state when the processor
- comes up, some boot loaders misbehave by putting the UBC to sleep in a
- power saving state, which causes issues with things like ptrace().
+ This option is used to specify the peripheral clock frequency.
+ This is necessary for determining the reference clock value on
+ platforms lacking an RTC.
- If unsure, say N.
+menu "CPU Frequency scaling"
+
+source "drivers/cpufreq/Kconfig"
-config SH_WRITETHROUGH
- bool "Use write-through caching"
- default y if CPU_SH2
+config SH_CPU_FREQ
+ tristate "SuperH CPU Frequency driver"
+ depends on CPU_FREQ
+ select CPU_FREQ_TABLE
help
- Selecting this option will configure the caches in write-through
- mode, as opposed to the default write-back configuration.
+ This adds the cpufreq driver for SuperH. At present, only
+ the SH-4 is supported.
- Since there's sill some aliasing issues on SH-4, this option will
- unfortunately still require the majority of flushing functions to
- be implemented to deal with aliasing.
+ For details, take a look at <file:Documentation/cpu-freq>.
If unsure, say N.
-config SH_OCRAM
- bool "Operand Cache RAM (OCRAM) support"
+endmenu
+
+source "arch/sh/drivers/dma/Kconfig"
+
+source "arch/sh/cchips/Kconfig"
+
+config HEARTBEAT
+ bool "Heartbeat LED"
+ depends on SH_MPC1211 || SH_SH03 || SH_CAT68701 || \
+ SH_STB1_HARP || SH_STB1_OVERDRIVE || SH_BIGSUR || \
+ SH_7751_SOLUTION_ENGINE || SH_7300_SOLUTION_ENGINE || \
+ SH_73180_SOLUTION_ENGINE || SH_SOLUTION_ENGINE || \
+ SH_RTS7751R2D || SH_SH4202_MICRODEV || SH_LANDISK
help
- Selecting this option will automatically tear down the number of
- sets in the dcache by half, which in turn exposes a memory range.
+ Use the power-on LED on your machine as a load meter. The exact
+ behavior is platform-dependent, but normally the flash frequency is
+ a hyperbolic function of the 5-minute load average.
- The addresses for the OC RAM base will vary according to the
- processor version. Consult vendor documentation for specifics.
+endmenu
- If unsure, say N.
+config ISA_DMA_API
+ bool
+ depends on MPC1211
+ default y
-config SH_STORE_QUEUES
- bool "Support for Store Queues"
- depends on CPU_SH4
+menu "Kernel features"
+
+config KEXEC
+ bool "kexec system call (EXPERIMENTAL)"
+ depends on EXPERIMENTAL
help
- Selecting this option will enable an in-kernel API for manipulating
- the store queues integrated in the SH-4 processors.
+ kexec is a system call that implements the ability to shutdown your
+ current kernel, and to start another kernel. It is like a reboot
+ but it is indepedent of the system firmware. And like a reboot
+ you can start any kernel with it, not just Linux.
+
+ The name comes from the similiarity to the exec system call.
+
+ It is an ongoing process to be certain the hardware in a machine
+ is properly shutdown, so do not be surprised if this code does not
+ initially work for you. It may help to enable device hotplugging
+ support. As of this writing the exact hardware interface is
+ strongly in flux, so no good recommendation can be made.
+
+config PREEMPT
+ bool "Preemptible Kernel (EXPERIMENTAL)"
+ depends on EXPERIMENTAL
config SMP
bool "Symmetric multi-processing support"
This is purely to save memory - each supported CPU adds
approximately eight kilobytes to the kernel image.
-config HS7751RVOIP_CODEC
- bool "Support VoIP Codec section"
- depends on SH_HS7751RVOIP
- help
- Selecting this option will support CODEC section.
-
-config RTS7751R2D_REV11
- bool "RTS7751R2D Rev. 1.1 board support"
- depends on SH_RTS7751R2D
- help
- Selecting this option will support version rev. 1.1.
-
-config SH_PCLK_CALC
- bool
- default n if CPU_SUBTYPE_SH7300 || CPU_SUBTYPE_SH73180
+config CPU_HAS_SR_RB
+ bool "CPU has SR.RB"
+ depends on CPU_SH3 || CPU_SH4
default y
help
- This option will cause the PCLK value to be probed at run-time. It
- will display a notification if the probed value has greater than a
- 1% variance of the hardcoded CONFIG_SH_PCLK_FREQ.
+ This will enable the use of SR.RB register bank usage. Processors
+ that are lacking this bit must have another method in place for
+ accomplishing what is taken care of by the banked registers.
-config SH_PCLK_FREQ
- int "Peripheral clock frequency (in Hz)"
- default "50000000" if CPU_SUBTYPE_SH7750
- default "60000000" if CPU_SUBTYPE_SH7751
- default "33333333" if CPU_SUBTYPE_SH7300
- default "27000000" if CPU_SUBTYPE_SH73180
- default "66000000" if CPU_SUBTYPE_SH4_202
- default "1193182"
- help
- This option is used to specify the peripheral clock frequency. This
- option must be set for each processor in order for the kernel to
- function reliably. If no sane default exists, we use a default from
- the legacy i8254. Any discrepancies will be reported on boot time
- with an auto-probed frequency which should be considered the proper
- value for your hardware.
+ See <file:Documentation/sh/register-banks.txt> for further
+ information on SR.RB and register banking in the kernel in general.
-menu "CPU Frequency scaling"
+endmenu
-source "drivers/cpufreq/Kconfig"
+menu "Boot options"
-config SH_CPU_FREQ
- tristate "SuperH CPU Frequency driver"
- depends on CPU_FREQ
- select CPU_FREQ_TABLE
+config ZERO_PAGE_OFFSET
+ hex "Zero page offset"
+ default "0x00004000" if SH_MPC1211 || SH_SH03
+ default "0x00001000"
help
- This adds the cpufreq driver for SuperH. At present, only
- the SH-4 is supported.
-
- For details, take a look at <file:Documentation/cpu-freq>.
-
- If unsure, say N.
+ This sets the default offset of zero page.
-endmenu
+config BOOT_LINK_OFFSET
+ hex "Link address offset for booting"
+ default "0x00800000"
+ help
+ This option allows you to set the link address offset of the zImage.
+ This can be useful if you are on a board which has a small amount of
+ memory.
-source "arch/sh/drivers/dma/Kconfig"
+config UBC_WAKEUP
+ bool "Wakeup UBC on startup"
+ help
+ Selecting this option will wakeup the User Break Controller (UBC) on
+ startup. Although the UBC is left in an awake state when the processor
+ comes up, some boot loaders misbehave by putting the UBC to sleep in a
+ power saving state, which causes issues with things like ptrace().
-source "arch/sh/cchips/Kconfig"
+ If unsure, say N.
-config HEARTBEAT
- bool "Heartbeat LED"
- depends on SH_MPC1211 || SH_SH03 || SH_CAT68701 || SH_STB1_HARP || SH_STB1_OVERDRIVE || SH_BIGSUR || SH_7751_SOLUTION_ENGINE || SH_7300_SOLUTION_ENGINE || SH_73180_SOLUTION_ENGINE || SH_SOLUTION_ENGINE || SH_RTS7751R2D || SH_SH4202_MICRODEV
- help
- Use the power-on LED on your machine as a load meter. The exact
- behavior is platform-dependent, but normally the flash frequency is
- a hyperbolic function of the 5-minute load average.
+config CMDLINE_BOOL
+ bool "Default bootloader kernel arguments"
-config RTC_9701JE
- tristate "EPSON RTC-9701JE support"
- depends on SH_RTS7751R2D
- help
- Selecting this option will support EPSON RTC-9701JE.
+config CMDLINE
+ string "Initial kernel command string"
+ depends on CMDLINE_BOOL
+ default "console=ttySC1,115200"
endmenu
-config ISA_DMA_API
- bool
- depends on MPC1211
- default y
-
-menu "Bus options (PCI, PCMCIA, EISA, MCA, ISA)"
+menu "Bus options"
# Even on SuperH devices which don't have an ISA bus,
# this variable helps the PCMCIA modules handle
# PCMCIA outright. -- PFM.
config ISA
bool
- default y if PCMCIA || SMC91X
+ default y if PCMCIA
help
Find out whether you have ISA slots on your motherboard. ISA is the
name of a bus system, i.e. the way the CPU talks to the other stuff
config SBUS
bool
-config MAPLE
- tristate "Maple Bus support"
- depends on SH_DREAMCAST
- default y
+config SUPERHYWAY
+ tristate "SuperHyway Bus support"
+ depends on CPU_SUBTYPE_SH4_202
source "arch/sh/drivers/pci/Kconfig"
config EARLY_SCIF_CONSOLE
bool "Use early SCIF console"
- depends on CPU_SH4
+ depends on CPU_SH4 || CPU_SH2A && !SH_STANDARD_BIOS
config EARLY_PRINTK
bool "Early printk support"
cflags-y := -mb
cflags-$(CONFIG_CPU_LITTLE_ENDIAN) := -ml
+isa-y := any
+isa-$(CONFIG_CPU_SH2) := sh2
+isa-$(CONFIG_CPU_SH3) := sh3
+isa-$(CONFIG_CPU_SH4) := sh4
+isa-$(CONFIG_CPU_SH4A) := sh4a
+isa-$(CONFIG_CPU_SH2A) := sh2a
+
+isa-$(CONFIG_SH_DSP) := $(isa-y)-dsp
+
+ifndef CONFIG_MMU
+isa-y := $(isa-y)-nommu
+endif
+
+ifndef CONFIG_SH_FPU
+isa-y := $(isa-y)-nofpu
+endif
+
+cflags-y += $(call as-option,-Wa$(comma)-isa=$(isa-y),)
+
cflags-$(CONFIG_CPU_SH2) += -m2
cflags-$(CONFIG_CPU_SH3) += -m3
cflags-$(CONFIG_CPU_SH4) += -m4 \
$(call cc-option,-mno-implicit-fp,-m4-nofpu)
+cflags-$(CONFIG_CPU_SH4A) += $(call cc-option,-m4a-nofpu,)
cflags-$(CONFIG_SH_DSP) += -Wa,-dsp
cflags-$(CONFIG_SH_KGDB) += -g
machdir-$(CONFIG_SH_73180_SOLUTION_ENGINE) := se/73180
machdir-$(CONFIG_SH_STB1_HARP) := harp
machdir-$(CONFIG_SH_STB1_OVERDRIVE) := overdrive
-machdir-$(CONFIG_SH_HP620) := hp6xx/hp620
-machdir-$(CONFIG_SH_HP680) := hp6xx/hp680
-machdir-$(CONFIG_SH_HP690) := hp6xx/hp690
+machdir-$(CONFIG_SH_HP6XX) := hp6xx
machdir-$(CONFIG_SH_CQREEK) := cqreek
machdir-$(CONFIG_SH_DMIDA) := dmida
machdir-$(CONFIG_SH_EC3104) := ec3104
CPPFLAGS_vmlinux.lds := -traditional
+ifneq ($(KBUILD_SRC),)
+incdir-prefix := $(srctree)/include/asm-sh/
+else
+incdir-prefix :=
+endif
+
# Update machine arch and proc symlinks if something which affects
# them changed. We use .arch and .mach to indicate when they were
# updated last, otherwise make uses the target directory mtime.
include/asm-sh/.cpu: $(wildcard include/config/cpu/*.h) include/config/MARKER
@echo ' SYMLINK include/asm-sh/cpu -> include/asm-sh/$(cpuincdir-y)'
-ifneq ($(KBUILD_SRC),)
- $(Q)mkdir -p include/asm-sh
- $(Q)ln -fsn $(srctree)/include/asm-sh/$(cpuincdir-y) include/asm-sh/cpu
-else
- $(Q)ln -fsn $(cpuincdir-y) include/asm-sh/cpu
-endif
+ $(Q)if [ ! -d include/asm-sh ]; then mkdir -p include/asm-sh; fi
+ $(Q)ln -fsn $(incdir-prefix)$(cpuincdir-y) include/asm-sh/cpu
@touch $@
+# Most boards have their own mach directories. For the ones that
+# don't, just reference the parent directory so the semantics are
+# kept roughly the same.
+
include/asm-sh/.mach: $(wildcard include/config/sh/*.h) include/config/MARKER
- @echo ' SYMLINK include/asm-sh/mach -> include/asm-sh/$(incdir-y)'
-ifneq ($(KBUILD_SRC),)
- $(Q)mkdir -p include/asm-sh
- $(Q)ln -fsn $(srctree)/include/asm-sh/$(incdir-y) include/asm-sh/mach
-else
- $(Q)ln -fsn $(incdir-y) include/asm-sh/mach
-endif
+ @echo -n ' SYMLINK include/asm-sh/mach -> '
+ $(Q)if [ ! -d include/asm-sh ]; then mkdir -p include/asm-sh; fi
+ $(Q)if [ -d $(incdir-prefix)$(incdir-y) ]; then \
+ echo -e 'include/asm-sh/$(incdir-y)'; \
+ ln -fsn $(incdir-prefix)$(incdir-y) \
+ include/asm-sh/mach; \
+ else \
+ echo -e 'include/asm-sh'; \
+ ln -fsn $(incdir-prefix) include/asm-sh/mach; \
+ fi
@touch $@
-
archprepare: maketools include/asm-sh/.cpu include/asm-sh/.mach
.PHONY: maketools FORCE
--- /dev/null
+#
+# Makefile for the HP6xx specific parts of the kernel
+#
+
+obj-y := mach.o setup.o
+
+++ /dev/null
-#
-# Makefile for the HP620 specific parts of the kernel
-#
-
-obj-y := mach.o setup.o
-
+++ /dev/null
-/*
- * linux/arch/sh/boards/hp6xx/hp620/mach.c
- *
- * Copyright (C) 2000 Stuart Menefy (stuart.menefy@st.com)
- *
- * May be copied or modified under the terms of the GNU General Public
- * License. See linux/COPYING for more information.
- *
- * Machine vector for the HP620
- */
-
-#include <linux/init.h>
-
-#include <asm/machvec.h>
-#include <asm/rtc.h>
-#include <asm/machvec_init.h>
-
-#include <asm/io.h>
-#include <asm/hd64461/hd64461.h>
-#include <asm/irq.h>
-
-/*
- * The Machine Vector
- */
-
-struct sh_machine_vector mv_hp620 __initmv = {
- .mv_nr_irqs = HD64461_IRQBASE+HD64461_IRQ_NUM,
-
- .mv_inb = hd64461_inb,
- .mv_inw = hd64461_inw,
- .mv_inl = hd64461_inl,
- .mv_outb = hd64461_outb,
- .mv_outw = hd64461_outw,
- .mv_outl = hd64461_outl,
-
- .mv_inb_p = hd64461_inb_p,
- .mv_inw_p = hd64461_inw,
- .mv_inl_p = hd64461_inl,
- .mv_outb_p = hd64461_outb_p,
- .mv_outw_p = hd64461_outw,
- .mv_outl_p = hd64461_outl,
-
- .mv_insb = hd64461_insb,
- .mv_insw = hd64461_insw,
- .mv_insl = hd64461_insl,
- .mv_outsb = hd64461_outsb,
- .mv_outsw = hd64461_outsw,
- .mv_outsl = hd64461_outsl,
-
- .mv_irq_demux = hd64461_irq_demux,
-};
-ALIAS_MV(hp620)
+++ /dev/null
-/*
- * linux/arch/sh/boards/hp6xx/hp620/setup.c
- *
- * Copyright (C) 2002 Andriy Skulysh, 2005 Kristoffer Ericson
- *
- * May be copied or modified under the terms of the GNU General Public
- * License. See Linux/COPYING for more information.
- *
- * Setup code for an HP620.
- * Due to similiarity with hp680/hp690 same inits are done (for now)
- */
-
-#include <linux/config.h>
-#include <linux/init.h>
-#include <asm/hd64461/hd64461.h>
-#include <asm/io.h>
-#include <asm/hp6xx/hp6xx.h>
-#include <asm/cpu/dac.h>
-
-const char *get_system_type(void)
-{
- return "HP620";
-}
-
-int __init platform_setup(void)
-{
- u16 v;
-
- v = inw(HD64461_STBCR);
- v |= HD64461_STBCR_SURTST | HD64461_STBCR_SIRST |
- HD64461_STBCR_STM1ST | HD64461_STBCR_STM0ST |
- HD64461_STBCR_SAFEST | HD64461_STBCR_SPC0ST |
- HD64461_STBCR_SMIAST | HD64461_STBCR_SAFECKE_OST |
- HD64461_STBCR_SAFECKE_IST;
- outw(v, HD64461_STBCR);
-
- v = inw(HD64461_GPADR);
- v |= HD64461_GPADR_SPEAKER | HD64461_GPADR_PCMCIA0;
- outw(v, HD64461_GPADR);
-
- sh_dac_disable(DAC_SPEAKER_VOLUME);
-
- return 0;
-}
-
+++ /dev/null
-#
-# Makefile for the HP680 specific parts of the kernel
-#
-
-obj-y := mach.o setup.o
-
+++ /dev/null
-#
-# Makefile for the HP690 specific parts of the kernel
-#
-
-obj-y := mach.o
-
+++ /dev/null
-/*
- * linux/arch/sh/boards/hp6xx/hp690/mach.c
- *
- * Copyright (C) 2000 Stuart Menefy (stuart.menefy@st.com)
- *
- * May be copied or modified under the terms of the GNU General Public
- * License. See linux/COPYING for more information.
- *
- * Machine vector for the HP690
- */
-
-#include <linux/init.h>
-
-#include <asm/machvec.h>
-#include <asm/rtc.h>
-#include <asm/machvec_init.h>
-
-#include <asm/io.h>
-#include <asm/hd64461/hd64461.h>
-#include <asm/irq.h>
-
-struct sh_machine_vector mv_hp690 __initmv = {
- .mv_nr_irqs = HD64461_IRQBASE+HD64461_IRQ_NUM,
-
- .mv_inb = hd64461_inb,
- .mv_inw = hd64461_inw,
- .mv_inl = hd64461_inl,
- .mv_outb = hd64461_outb,
- .mv_outw = hd64461_outw,
- .mv_outl = hd64461_outl,
-
- .mv_inb_p = hd64461_inb_p,
- .mv_inw_p = hd64461_inw,
- .mv_inl_p = hd64461_inl,
- .mv_outb_p = hd64461_outb_p,
- .mv_outw_p = hd64461_outw,
- .mv_outl_p = hd64461_outl,
-
- .mv_insb = hd64461_insb,
- .mv_insw = hd64461_insw,
- .mv_insl = hd64461_insl,
- .mv_outsb = hd64461_outsb,
- .mv_outsw = hd64461_outsw,
- .mv_outsl = hd64461_outsl,
-
- .mv_irq_demux = hd64461_irq_demux,
-};
-ALIAS_MV(hp690)
/*
- * linux/arch/sh/boards/hp6xx/hp680/mach.c
+ * linux/arch/sh/boards/hp6xx/mach.c
*
* Copyright (C) 2000 Stuart Menefy (stuart.menefy@st.com)
*
*
* Machine vector for the HP680
*/
-
-#include <linux/init.h>
-
#include <asm/machvec.h>
-#include <asm/rtc.h>
-#include <asm/machvec_init.h>
-
+#include <asm/hd64461.h>
#include <asm/io.h>
-#include <asm/hd64461/hd64461.h>
-#include <asm/hp6xx/io.h>
#include <asm/irq.h>
-struct sh_machine_vector mv_hp680 __initmv = {
+struct sh_machine_vector mv_hp6xx __initmv = {
.mv_nr_irqs = HD64461_IRQBASE + HD64461_IRQ_NUM,
.mv_inb = hd64461_inb,
.mv_irq_demux = hd64461_irq_demux,
};
-ALIAS_MV(hp680)
+ALIAS_MV(hp6xx)
#include <linux/config.h>
#include <linux/init.h>
-#include <asm/hd64461/hd64461.h>
#include <asm/io.h>
+#include <asm/hd64461.h>
#include <asm/hp6xx/hp6xx.h>
#include <asm/cpu/dac.h>
const char *get_system_type(void)
{
- return "HP680";
+ return "HP6xx";
}
int __init platform_setup(void)
{
+ u8 v8;
u16 v;
v = inw(HD64461_STBCR);
v |= HD64461_STBCR_SURTST | HD64461_STBCR_SIRST |
HD64461_STBCR_SAFEST | HD64461_STBCR_SPC0ST |
HD64461_STBCR_SMIAST | HD64461_STBCR_SAFECKE_OST |
HD64461_STBCR_SAFECKE_IST;
+#ifndef CONFIG_HD64461_ENABLER
+ v |= HD64461_STBCR_SPC1ST;
+#endif
outw(v, HD64461_STBCR);
v = inw(HD64461_GPADR);
v |= HD64461_GPADR_SPEAKER | HD64461_GPADR_PCMCIA0;
outw(v, HD64461_GPADR);
+ outw(HD64461_PCCGCR_VCC0 | HD64461_PCCSCR_VCC1, HD64461_PCC0GCR);
+
+#ifndef CONFIG_HD64461_ENABLER
+ outw(HD64461_PCCGCR_VCC0 | HD64461_PCCSCR_VCC1, HD64461_PCC1GCR);
+#endif
+
+ sh_dac_output(0, DAC_SPEAKER_VOLUME);
sh_dac_disable(DAC_SPEAKER_VOLUME);
+ v8 = ctrl_inb(DACR);
+ v8 &= ~DACR_DAE;
+ ctrl_outb(v8,DACR);
return 0;
}
# Makefile for the STMicroelectronics Overdrive specific parts of the kernel
#
-obj-y := mach.o setup.o io.o irq.o led.o time.o
+obj-y := mach.o setup.o io.o irq.o led.o
obj-$(CONFIG_PCI) += fpga.o galileo.o pcidma.o
#include <asm/overdrive/overdrive.h>
#include <asm/overdrive/fpga.h>
-extern void od_time_init(void);
-
const char *get_system_type(void)
{
return "SH7750 Overdrive";
{
#ifdef CONFIG_PCI
init_overdrive_fpga();
- galileo_init();
+ galileo_init();
#endif
- board_time_init = od_time_init;
-
/* Enable RS232 receive buffers */
writel(0x1e, OVERDRIVE_CTRL);
}
+++ /dev/null
-/*
- * arch/sh/boards/overdrive/time.c
- *
- * Copyright (C) 2000 Stuart Menefy (stuart.menefy@st.com)
- * Copyright (C) 2002 Paul Mundt (lethal@chaoticdreams.org)
- *
- * May be copied or modified under the terms of the GNU General Public
- * License. See linux/COPYING for more information.
- *
- * STMicroelectronics Overdrive Support.
- */
-
-void od_time_init(void)
-{
- struct frqcr_data {
- unsigned short frqcr;
- struct {
- unsigned char multiplier;
- unsigned char divisor;
- } factor[3];
- };
-
- static struct frqcr_data st40_frqcr_table[] = {
- { 0x000, {{1,1}, {1,1}, {1,2}}},
- { 0x002, {{1,1}, {1,1}, {1,4}}},
- { 0x004, {{1,1}, {1,1}, {1,8}}},
- { 0x008, {{1,1}, {1,2}, {1,2}}},
- { 0x00A, {{1,1}, {1,2}, {1,4}}},
- { 0x00C, {{1,1}, {1,2}, {1,8}}},
- { 0x011, {{1,1}, {2,3}, {1,6}}},
- { 0x013, {{1,1}, {2,3}, {1,3}}},
- { 0x01A, {{1,1}, {1,2}, {1,4}}},
- { 0x01C, {{1,1}, {1,2}, {1,8}}},
- { 0x023, {{1,1}, {2,3}, {1,3}}},
- { 0x02C, {{1,1}, {1,2}, {1,8}}},
- { 0x048, {{1,2}, {1,2}, {1,4}}},
- { 0x04A, {{1,2}, {1,2}, {1,6}}},
- { 0x04C, {{1,2}, {1,2}, {1,8}}},
- { 0x05A, {{1,2}, {1,3}, {1,6}}},
- { 0x05C, {{1,2}, {1,3}, {1,6}}},
- { 0x063, {{1,2}, {1,4}, {1,4}}},
- { 0x06C, {{1,2}, {1,4}, {1,8}}},
- { 0x091, {{1,3}, {1,3}, {1,6}}},
- { 0x093, {{1,3}, {1,3}, {1,6}}},
- { 0x0A3, {{1,3}, {1,6}, {1,6}}},
- { 0x0DA, {{1,4}, {1,4}, {1,8}}},
- { 0x0DC, {{1,4}, {1,4}, {1,8}}},
- { 0x0EC, {{1,4}, {1,8}, {1,8}}},
- { 0x123, {{1,4}, {1,4}, {1,8}}},
- { 0x16C, {{1,4}, {1,8}, {1,8}}},
- };
-
- struct memclk_data {
- unsigned char multiplier;
- unsigned char divisor;
- };
- static struct memclk_data st40_memclk_table[8] = {
- {1,1}, // 000
- {1,2}, // 001
- {1,3}, // 010
- {2,3}, // 011
- {1,4}, // 100
- {1,6}, // 101
- {1,8}, // 110
- {1,8} // 111
- };
-
- unsigned long pvr;
-
- /*
- * This should probably be moved into the SH3 probing code, and then
- * use the processor structure to determine which CPU we are running
- * on.
- */
- pvr = ctrl_inl(CCN_PVR);
- printk("PVR %08x\n", pvr);
-
- if (((pvr >> CCN_PVR_CHIP_SHIFT) & CCN_PVR_CHIP_MASK) == CCN_PVR_CHIP_ST40STB1) {
- /*
- * Unfortunatly the STB1 FRQCR values are different from the
- * 7750 ones.
- */
- struct frqcr_data *d;
- int a;
- unsigned long memclkcr;
- struct memclk_data *e;
-
- for (a=0; a<ARRAY_SIZE(st40_frqcr_table); a++) {
- d = &st40_frqcr_table[a];
- if (d->frqcr == (frqcr & 0x1ff))
- break;
- }
- if (a == ARRAY_SIZE(st40_frqcr_table)) {
- d = st40_frqcr_table;
- printk("ERROR: Unrecognised FRQCR value, using default multipliers\n");
- }
-
- memclkcr = ctrl_inl(CLOCKGEN_MEMCLKCR);
- e = &st40_memclk_table[memclkcr & MEMCLKCR_RATIO_MASK];
-
- printk("Clock multipliers: CPU: %d/%d Bus: %d/%d Mem: %d/%d Periph: %d/%d\n",
- d->factor[0].multiplier, d->factor[0].divisor,
- d->factor[1].multiplier, d->factor[1].divisor,
- e->multiplier, e->divisor,
- d->factor[2].multiplier, d->factor[2].divisor);
-
- current_cpu_data.master_clock = current_cpu_data.module_clock *
- d->factor[2].divisor /
- d->factor[2].multiplier;
- current_cpu_data.bus_clock = current_cpu_data.master_clock *
- d->factor[1].multiplier /
- d->factor[1].divisor;
- current_cpu_data.memory_clock = current_cpu_data.master_clock *
- e->multiplier / e->divisor;
- current_cpu_data.cpu_clock = current_cpu_data.master_clock *
- d->factor[0].multiplier /
- d->factor[0].divisor;
-}
-
#
# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.11-sh
-# Wed Mar 2 15:09:41 2005
+# Linux kernel version: 2.6.15-sh
+# Wed Jan 4 15:32:56 2006
#
CONFIG_SUPERH=y
CONFIG_UID16=y
# CONFIG_CLEAN_COMPILE is not set
CONFIG_BROKEN=y
CONFIG_BROKEN_ON_SMP=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
#
# General setup
#
CONFIG_LOCALVERSION=""
+CONFIG_LOCALVERSION_AUTO=y
CONFIG_SWAP=y
# CONFIG_SYSVIPC is not set
# CONFIG_BSD_PROCESS_ACCT is not set
# CONFIG_SYSCTL is not set
-# CONFIG_AUDIT is not set
-CONFIG_LOG_BUF_SHIFT=14
-# CONFIG_HOTPLUG is not set
+CONFIG_HOTPLUG=y
# CONFIG_IKCONFIG is not set
+CONFIG_INITRAMFS_SOURCE=""
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
# CONFIG_EMBEDDED is not set
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_EXTRA_PASS is not set
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_BASE_FULL=y
CONFIG_FUTEX=y
CONFIG_EPOLL=y
-# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
CONFIG_SHMEM=y
CONFIG_CC_ALIGN_FUNCTIONS=0
CONFIG_CC_ALIGN_LABELS=0
CONFIG_CC_ALIGN_LOOPS=0
CONFIG_CC_ALIGN_JUMPS=0
# CONFIG_TINY_SHMEM is not set
+CONFIG_BASE_SMALL=0
#
# Loadable module support
#
# CONFIG_MODULES is not set
+#
+# Block layer
+#
+# CONFIG_LBD is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
+CONFIG_DEFAULT_AS=y
+# CONFIG_DEFAULT_DEADLINE is not set
+# CONFIG_DEFAULT_CFQ is not set
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="anticipatory"
+
#
# System type
#
# CONFIG_SH_7751_SYSTEMH is not set
# CONFIG_SH_STB1_HARP is not set
# CONFIG_SH_STB1_OVERDRIVE is not set
-# CONFIG_SH_HP620 is not set
-CONFIG_SH_HP680=y
-# CONFIG_SH_HP690 is not set
+CONFIG_SH_HP6XX=y
# CONFIG_SH_CQREEK is not set
# CONFIG_SH_DMIDA is not set
# CONFIG_SH_EC3104 is not set
# CONFIG_SH_RTS7751R2D is not set
# CONFIG_SH_EDOSK7705 is not set
# CONFIG_SH_SH4202_MICRODEV is not set
+# CONFIG_SH_LANDISK is not set
+# CONFIG_SH_TITAN is not set
# CONFIG_SH_UNKNOWN is not set
-# CONFIG_CPU_SH2 is not set
+
+#
+# Processor selection
+#
CONFIG_CPU_SH3=y
-# CONFIG_CPU_SH4 is not set
+
+#
+# SH-2 Processor Support
+#
# CONFIG_CPU_SUBTYPE_SH7604 is not set
+
+#
+# SH-3 Processor Support
+#
# CONFIG_CPU_SUBTYPE_SH7300 is not set
# CONFIG_CPU_SUBTYPE_SH7705 is not set
# CONFIG_CPU_SUBTYPE_SH7707 is not set
# CONFIG_CPU_SUBTYPE_SH7708 is not set
CONFIG_CPU_SUBTYPE_SH7709=y
+
+#
+# SH-4 Processor Support
+#
# CONFIG_CPU_SUBTYPE_SH7750 is not set
+# CONFIG_CPU_SUBTYPE_SH7091 is not set
+# CONFIG_CPU_SUBTYPE_SH7750R is not set
+# CONFIG_CPU_SUBTYPE_SH7750S is not set
# CONFIG_CPU_SUBTYPE_SH7751 is not set
+# CONFIG_CPU_SUBTYPE_SH7751R is not set
# CONFIG_CPU_SUBTYPE_SH7760 is not set
-# CONFIG_CPU_SUBTYPE_SH73180 is not set
+# CONFIG_CPU_SUBTYPE_SH4_202 is not set
+
+#
+# ST40 Processor Support
+#
# CONFIG_CPU_SUBTYPE_ST40STB1 is not set
# CONFIG_CPU_SUBTYPE_ST40GX1 is not set
-# CONFIG_CPU_SUBTYPE_SH4_202 is not set
+
+#
+# SH-4A Processor Support
+#
+# CONFIG_CPU_SUBTYPE_SH73180 is not set
+# CONFIG_CPU_SUBTYPE_SH7770 is not set
+# CONFIG_CPU_SUBTYPE_SH7780 is not set
+
+#
+# Memory management options
+#
CONFIG_MMU=y
-# CONFIG_CMDLINE_BOOL is not set
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+# CONFIG_SPARSEMEM_MANUAL is not set
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+# CONFIG_SPARSEMEM_STATIC is not set
+CONFIG_SPLIT_PTLOCK_CPUS=4
+
+#
+# Cache configuration
+#
+# CONFIG_SH_DIRECT_MAPPED is not set
+# CONFIG_SH_WRITETHROUGH is not set
+# CONFIG_SH_OCRAM is not set
CONFIG_MEMORY_START=0x0c000000
CONFIG_MEMORY_SIZE=0x00400000
-CONFIG_MEMORY_SET=y
-# CONFIG_MEMORY_OVERRIDE is not set
+
+#
+# Processor features
+#
+CONFIG_CPU_LITTLE_ENDIAN=y
CONFIG_SH_RTC=y
# CONFIG_SH_DSP is not set
CONFIG_SH_ADC=y
-CONFIG_SH_HP600=y
-CONFIG_ZERO_PAGE_OFFSET=0x00001000
-CONFIG_BOOT_LINK_OFFSET=0x00800000
-CONFIG_CPU_LITTLE_ENDIAN=y
-# CONFIG_PREEMPT is not set
-# CONFIG_UBC_WAKEUP is not set
-# CONFIG_SH_WRITETHROUGH is not set
-# CONFIG_SH_OCRAM is not set
-# CONFIG_SMP is not set
-CONFIG_SH_PCLK_CALC=y
-CONFIG_SH_PCLK_FREQ=1193182
+
+#
+# Timer support
+#
+CONFIG_SH_TMU=y
+CONFIG_SH_PCLK_FREQ_BOOL=y
+CONFIG_SH_PCLK_FREQ=22110000
#
# CPU Frequency scaling
#
# DMA support
#
-# CONFIG_SH_DMA is not set
+CONFIG_SH_DMA=y
+CONFIG_NR_ONCHIP_DMA_CHANNELS=4
+# CONFIG_NR_DMA_CHANNELS_BOOL is not set
+# CONFIG_DMA_PAGE_OPS is not set
#
# Companion Chips
CONFIG_HD64461=y
# CONFIG_HD64465 is not set
CONFIG_HD64461_IRQ=36
-# CONFIG_HD64461_ENABLER is not set
+CONFIG_HD64461_IOBASE=0xb0000000
+CONFIG_HD64461_ENABLER=y
+
+#
+# Kernel features
+#
+# CONFIG_KEXEC is not set
+# CONFIG_PREEMPT is not set
+# CONFIG_SMP is not set
#
-# Bus options (PCI, PCMCIA, EISA, MCA, ISA)
+# Boot options
#
+CONFIG_ZERO_PAGE_OFFSET=0x00001000
+CONFIG_BOOT_LINK_OFFSET=0x00800000
+# CONFIG_UBC_WAKEUP is not set
+# CONFIG_CMDLINE_BOOL is not set
+
+#
+# Bus options
+#
+CONFIG_ISA=y
# CONFIG_PCI is not set
#
# PCCARD (PCMCIA/CardBus) support
#
-# CONFIG_PCCARD is not set
+CONFIG_PCCARD=y
+# CONFIG_PCMCIA_DEBUG is not set
+CONFIG_PCMCIA=y
+CONFIG_PCMCIA_LOAD_CIS=y
+CONFIG_PCMCIA_IOCTL=y
#
# PC-card bridges
#
+# CONFIG_I82365 is not set
+# CONFIG_TCIC is not set
+CONFIG_HD64461_PCMCIA=y
+CONFIG_HD64461_PCMCIA_SOCKETS=1
+CONFIG_PCMCIA_PROBE=y
#
# PCI Hotplug Support
# CONFIG_BINFMT_MISC is not set
#
-# SH initrd options
+# Networking
#
-# CONFIG_EMBEDDED_RAMDISK is not set
+# CONFIG_NET is not set
#
# Device Drivers
#
# CONFIG_STANDALONE is not set
CONFIG_PREVENT_FIRMWARE_BUILD=y
-# CONFIG_FW_LOADER is not set
+CONFIG_FW_LOADER=y
+
+#
+# Connector - unified userspace <-> kernelspace linker
+#
#
# Memory Technology Devices (MTD)
#
# Plug and Play support
#
+# CONFIG_PNP is not set
#
# Block devices
#
-# CONFIG_BLK_DEV_FD is not set
# CONFIG_BLK_DEV_COW_COMMON is not set
# CONFIG_BLK_DEV_LOOP is not set
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_COUNT=16
CONFIG_BLK_DEV_RAM_SIZE=4096
CONFIG_BLK_DEV_INITRD=y
-CONFIG_INITRAMFS_SOURCE=""
-# CONFIG_LBD is not set
# CONFIG_CDROM_PKTCDVD is not set
-#
-# IO Schedulers
-#
-CONFIG_IOSCHED_NOOP=y
-CONFIG_IOSCHED_AS=y
-CONFIG_IOSCHED_DEADLINE=y
-CONFIG_IOSCHED_CFQ=y
-
#
# ATA/ATAPI/MFM/RLL support
#
# CONFIG_BLK_DEV_IDE_SATA is not set
CONFIG_BLK_DEV_IDEDISK=y
# CONFIG_IDEDISK_MULTI_MODE is not set
+# CONFIG_BLK_DEV_IDECS is not set
# CONFIG_BLK_DEV_IDECD is not set
# CONFIG_BLK_DEV_IDETAPE is not set
# CONFIG_BLK_DEV_IDEFLOPPY is not set
CONFIG_IDE_GENERIC=y
CONFIG_IDE_SH=y
# CONFIG_IDE_ARM is not set
+# CONFIG_IDE_CHIPSETS is not set
# CONFIG_BLK_DEV_IDEDMA is not set
# CONFIG_IDEDMA_AUTO is not set
# CONFIG_BLK_DEV_HD is not set
#
# SCSI device support
#
+# CONFIG_RAID_ATTRS is not set
# CONFIG_SCSI is not set
+#
+# Old CD-ROM drivers (not SCSI, not IDE)
+#
+# CONFIG_CD_NO_IDESCSI is not set
+
#
# Multi-device support (RAID and LVM)
#
#
# Fusion MPT device support
#
+# CONFIG_FUSION is not set
#
# IEEE 1394 (FireWire) support
#
#
-# Networking support
+# Network device support
#
-# CONFIG_NET is not set
# CONFIG_NETPOLL is not set
# CONFIG_NET_POLL_CONTROLLER is not set
# CONFIG_INPUT_EVDEV is not set
# CONFIG_INPUT_EVBUG is not set
-#
-# Input I/O drivers
-#
-# CONFIG_GAMEPORT is not set
-CONFIG_SOUND_GAMEPORT=y
-CONFIG_SERIO=y
-# CONFIG_SERIO_I8042 is not set
-# CONFIG_SERIO_SERPORT is not set
-# CONFIG_SERIO_CT82C710 is not set
-# CONFIG_SERIO_RAW is not set
-
#
# Input Device Drivers
#
# CONFIG_INPUT_TOUCHSCREEN is not set
# CONFIG_INPUT_MISC is not set
+#
+# Hardware I/O ports
+#
+CONFIG_SERIO=y
+# CONFIG_SERIO_I8042 is not set
+# CONFIG_SERIO_SERPORT is not set
+# CONFIG_SERIO_RAW is not set
+# CONFIG_GAMEPORT is not set
+
#
# Character devices
#
#
# Ftape, the floppy tape device driver
#
-# CONFIG_DRM is not set
+
+#
+# PCMCIA character devices
+#
+# CONFIG_SYNCLINK_CS is not set
+# CONFIG_CARDMAN_4000 is not set
+# CONFIG_CARDMAN_4040 is not set
# CONFIG_RAW_DRIVER is not set
+#
+# TPM devices
+#
+# CONFIG_TCG_TPM is not set
+# CONFIG_TELCLOCK is not set
+
#
# I2C support
#
#
# CONFIG_W1 is not set
+#
+# Hardware Monitoring support
+#
+CONFIG_HWMON=y
+# CONFIG_HWMON_VID is not set
+# CONFIG_HWMON_DEBUG_CHIP is not set
+
#
# Misc devices
#
+#
+# Multimedia Capabilities Port drivers
+#
+
#
# Multimedia devices
#
# Graphics support
#
CONFIG_FB=y
+CONFIG_FB_CFB_FILLRECT=y
+CONFIG_FB_CFB_COPYAREA=y
+CONFIG_FB_CFB_IMAGEBLIT=y
+# CONFIG_FB_MACMODES is not set
# CONFIG_FB_MODE_HELPERS is not set
# CONFIG_FB_TILEBLITTING is not set
# CONFIG_FB_EPSON1355 is not set
+# CONFIG_FB_S1D13XXX is not set
CONFIG_FB_HIT=y
# CONFIG_FB_VIRTUAL is not set
#
# Console display driver support
#
-# CONFIG_VGA_CONSOLE is not set
+# CONFIG_MDA_CONSOLE is not set
CONFIG_DUMMY_CONSOLE=y
CONFIG_FRAMEBUFFER_CONSOLE=y
+# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
CONFIG_FONTS=y
# CONFIG_FONT_8x8 is not set
# CONFIG_FONT_8x16 is not set
# CONFIG_FONT_6x11 is not set
+# CONFIG_FONT_7x14 is not set
CONFIG_FONT_PEARL_8x8=y
# CONFIG_FONT_ACORN_8x8 is not set
# CONFIG_FONT_MINI_4x6 is not set
# CONFIG_FONT_SUN8x16 is not set
# CONFIG_FONT_SUN12x22 is not set
+# CONFIG_FONT_10x18 is not set
#
# Logo configuration
#
# Sound
#
-# CONFIG_SOUND is not set
+CONFIG_SOUND=y
+
+#
+# Advanced Linux Sound Architecture
+#
+# CONFIG_SND is not set
+
+#
+# Open Sound System
+#
+CONFIG_SOUND_PRIME=y
+# CONFIG_OBSOLETE_OSS_DRIVER is not set
+# CONFIG_SOUND_MSNDCLAS is not set
+# CONFIG_SOUND_MSNDPIN is not set
+CONFIG_SOUND_SH_DAC_AUDIO=y
+CONFIG_SOUND_SH_DAC_AUDIO_CHANNEL=1
#
# USB support
# CONFIG_USB_ARCH_HAS_OHCI is not set
#
-# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' may also be needed; see USB_STORAGE Help for more information
+# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
#
#
#
# CONFIG_INFINIBAND is not set
+#
+# SN Devices
+#
+
#
# File systems
#
CONFIG_EXT2_FS=y
# CONFIG_EXT2_FS_XATTR is not set
+# CONFIG_EXT2_FS_XIP is not set
# CONFIG_EXT3_FS is not set
# CONFIG_JBD is not set
# CONFIG_REISERFS_FS is not set
# CONFIG_JFS_FS is not set
-
-#
-# XFS support
-#
+# CONFIG_FS_POSIX_ACL is not set
# CONFIG_XFS_FS is not set
# CONFIG_MINIX_FS is not set
# CONFIG_ROMFS_FS is not set
+CONFIG_INOTIFY=y
# CONFIG_QUOTA is not set
CONFIG_DNOTIFY=y
# CONFIG_AUTOFS_FS is not set
# CONFIG_AUTOFS4_FS is not set
+# CONFIG_FUSE_FS is not set
#
# CD-ROM/DVD Filesystems
#
# DOS/FAT/NT Filesystems
#
+CONFIG_FAT_FS=y
# CONFIG_MSDOS_FS is not set
-# CONFIG_VFAT_FS is not set
+CONFIG_VFAT_FS=y
+CONFIG_FAT_DEFAULT_CODEPAGE=437
+CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
# CONFIG_NTFS_FS is not set
#
CONFIG_PROC_FS=y
CONFIG_PROC_KCORE=y
CONFIG_SYSFS=y
-CONFIG_DEVFS_FS=y
-CONFIG_DEVFS_MOUNT=y
-# CONFIG_DEVFS_DEBUG is not set
-# CONFIG_DEVPTS_FS_XATTR is not set
# CONFIG_TMPFS is not set
# CONFIG_HUGETLBFS is not set
# CONFIG_HUGETLB_PAGE is not set
CONFIG_RAMFS=y
+# CONFIG_RELAYFS_FS is not set
#
# Miscellaneous filesystems
#
# Native Language Support
#
-# CONFIG_NLS is not set
+CONFIG_NLS=y
+CONFIG_NLS_DEFAULT="iso8859-1"
+# CONFIG_NLS_CODEPAGE_437 is not set
+# CONFIG_NLS_CODEPAGE_737 is not set
+# CONFIG_NLS_CODEPAGE_775 is not set
+# CONFIG_NLS_CODEPAGE_850 is not set
+# CONFIG_NLS_CODEPAGE_852 is not set
+# CONFIG_NLS_CODEPAGE_855 is not set
+# CONFIG_NLS_CODEPAGE_857 is not set
+# CONFIG_NLS_CODEPAGE_860 is not set
+# CONFIG_NLS_CODEPAGE_861 is not set
+# CONFIG_NLS_CODEPAGE_862 is not set
+# CONFIG_NLS_CODEPAGE_863 is not set
+# CONFIG_NLS_CODEPAGE_864 is not set
+# CONFIG_NLS_CODEPAGE_865 is not set
+# CONFIG_NLS_CODEPAGE_866 is not set
+# CONFIG_NLS_CODEPAGE_869 is not set
+# CONFIG_NLS_CODEPAGE_936 is not set
+# CONFIG_NLS_CODEPAGE_950 is not set
+# CONFIG_NLS_CODEPAGE_932 is not set
+# CONFIG_NLS_CODEPAGE_949 is not set
+# CONFIG_NLS_CODEPAGE_874 is not set
+# CONFIG_NLS_ISO8859_8 is not set
+# CONFIG_NLS_CODEPAGE_1250 is not set
+# CONFIG_NLS_CODEPAGE_1251 is not set
+# CONFIG_NLS_ASCII is not set
+# CONFIG_NLS_ISO8859_1 is not set
+# CONFIG_NLS_ISO8859_2 is not set
+# CONFIG_NLS_ISO8859_3 is not set
+# CONFIG_NLS_ISO8859_4 is not set
+# CONFIG_NLS_ISO8859_5 is not set
+# CONFIG_NLS_ISO8859_6 is not set
+# CONFIG_NLS_ISO8859_7 is not set
+# CONFIG_NLS_ISO8859_9 is not set
+# CONFIG_NLS_ISO8859_13 is not set
+# CONFIG_NLS_ISO8859_14 is not set
+# CONFIG_NLS_ISO8859_15 is not set
+# CONFIG_NLS_KOI8_R is not set
+# CONFIG_NLS_KOI8_U is not set
+# CONFIG_NLS_UTF8 is not set
#
# Profiling support
#
# Kernel hacking
#
+# CONFIG_PRINTK_TIME is not set
# CONFIG_DEBUG_KERNEL is not set
+CONFIG_LOG_BUF_SHIFT=14
# CONFIG_FRAME_POINTER is not set
# CONFIG_SH_STANDARD_BIOS is not set
# CONFIG_KGDB is not set
# Library routines
#
# CONFIG_CRC_CCITT is not set
+# CONFIG_CRC16 is not set
CONFIG_CRC32=y
# CONFIG_LIBCRC32C is not set
*
* SuperH-specific DMA management API
*
- * Copyright (C) 2003, 2004 Paul Mundt
+ * Copyright (C) 2003, 2004, 2005 Paul Mundt
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
#include <linux/spinlock.h>
#include <linux/proc_fs.h>
#include <linux/list.h>
+#include <linux/platform_device.h>
#include <asm/dma.h>
DEFINE_SPINLOCK(dma_spin_lock);
struct dma_info *get_dma_info(unsigned int chan)
{
- struct list_head *pos, *tmp;
+ struct dma_info *info;
unsigned int total = 0;
/*
* Look for each DMAC's range to determine who the owner of
* the channel is.
*/
- list_for_each_safe(pos, tmp, ®istered_dmac_list) {
- struct dma_info *info = list_entry(pos, struct dma_info, list);
-
+ list_for_each_entry(info, ®istered_dmac_list, list) {
total += info->nr_channels;
if (chan > total)
continue;
return NULL;
}
+static unsigned int get_nr_channels(void)
+{
+ struct dma_info *info;
+ unsigned int nr = 0;
+
+ if (unlikely(list_empty(®istered_dmac_list)))
+ return nr;
+
+ list_for_each_entry(info, ®istered_dmac_list, list)
+ nr += info->nr_channels;
+
+ return nr;
+}
+
struct dma_channel *get_dma_channel(unsigned int chan)
{
struct dma_info *info = get_dma_info(chan);
static int dma_read_proc(char *buf, char **start, off_t off,
int len, int *eof, void *data)
{
- struct list_head *pos, *tmp;
+ struct dma_info *info;
char *p = buf;
if (list_empty(®istered_dmac_list))
/*
* Iterate over each registered DMAC
*/
- list_for_each_safe(pos, tmp, ®istered_dmac_list) {
- struct dma_info *info = list_entry(pos, struct dma_info, list);
+ list_for_each_entry(info, ®istered_dmac_list, list) {
int i;
/*
#endif
-int __init register_dmac(struct dma_info *info)
+int register_dmac(struct dma_info *info)
{
- int i;
+ unsigned int total_channels, i;
INIT_LIST_HEAD(&info->list);
BUG_ON((info->flags & DMAC_CHANNELS_CONFIGURED) && !info->channels);
+ info->pdev = platform_device_register_simple((char *)info->name, -1,
+ NULL, 0);
+ if (IS_ERR(info->pdev))
+ return PTR_ERR(info->pdev);
+
/*
* Don't touch pre-configured channels
*/
memset(info->channels, 0, size);
}
+ total_channels = get_nr_channels();
for (i = 0; i < info->nr_channels; i++) {
struct dma_channel *chan = info->channels + i;
chan->chan = i;
+ chan->vchan = i + total_channels;
memcpy(chan->dev_id, "Unused", 7);
init_MUTEX(&chan->sem);
init_waitqueue_head(&chan->wait_queue);
-#ifdef CONFIG_SYSFS
- dma_create_sysfs_files(chan);
-#endif
+ dma_create_sysfs_files(chan, info);
}
list_add(&info->list, ®istered_dmac_list);
return 0;
}
-void __exit unregister_dmac(struct dma_info *info)
+void unregister_dmac(struct dma_info *info)
{
+ unsigned int i;
+
+ for (i = 0; i < info->nr_channels; i++)
+ dma_remove_sysfs_files(info->channels + i, info);
+
if (!(info->flags & DMAC_CHANNELS_CONFIGURED))
kfree(info->channels);
list_del(&info->list);
+ platform_device_unregister(info->pdev);
}
static int __init dma_api_init(void)
};
static struct dma_info g2_dma_info = {
- .name = "G2 DMA",
+ .name = "g2_dmac",
.nr_channels = 4,
.ops = &g2_dma_ops,
.flags = DMAC_CHANNELS_TEI_CAPABLE,
static void __exit g2_dma_exit(void)
{
free_irq(HW_EVENT_G2_DMA, 0);
+ unregister_dmac(&g2_dma_info);
}
subsys_initcall(g2_dma_init);
* such, this code is meant for only the simplest of tasks (and shouldn't be
* used in any new drivers at all).
*
- * It should also be noted that various functions here are labelled as
- * being deprecated. This is due to the fact that the ops->xfer() method is
- * the preferred way of doing things (as well as just grabbing the spinlock
- * directly). As such, any users of this interface will be warned rather
- * loudly.
+ * NOTE: ops->xfer() is the preferred way of doing things. However, there
+ * are some users of the ISA DMA API that exist in common code that we
+ * don't necessarily want to go out of our way to break, so we still
+ * allow for some compatability at that level. Any new code is strongly
+ * advised to run far away from the ISA DMA API and use the SH DMA API
+ * directly.
*/
-
-unsigned long __deprecated claim_dma_lock(void)
+unsigned long claim_dma_lock(void)
{
unsigned long flags;
}
EXPORT_SYMBOL(claim_dma_lock);
-void __deprecated release_dma_lock(unsigned long flags)
+void release_dma_lock(unsigned long flags)
{
spin_unlock_irqrestore(&dma_spin_lock, flags);
}
EXPORT_SYMBOL(release_dma_lock);
-void __deprecated disable_dma(unsigned int chan)
+void disable_dma(unsigned int chan)
{
/* Nothing */
}
EXPORT_SYMBOL(disable_dma);
-void __deprecated enable_dma(unsigned int chan)
+void enable_dma(unsigned int chan)
{
struct dma_info *info = get_dma_info(chan);
struct dma_channel *channel = &info->channels[chan];
};
static struct dma_info pvr2_dma_info = {
- .name = "PowerVR 2 DMA",
+ .name = "pvr2_dmac",
.nr_channels = 1,
.ops = &pvr2_dma_ops,
.flags = DMAC_CHANNELS_TEI_CAPABLE,
{
free_dma(PVR2_CASCADE_CHAN);
free_irq(HW_EVENT_PVR2_DMA, 0);
+ unregister_dmac(&pvr2_dma_info);
}
subsys_initcall(pvr2_dma_init);
*
* Copyright (C) 2000 Takashi YOSHII
* Copyright (C) 2003, 2004 Paul Mundt
+ * Copyright (C) 2005 Andriy Skulysh
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
#include <linux/irq.h>
#include <linux/interrupt.h>
#include <linux/module.h>
+#include <asm/dreamcast/dma.h>
#include <asm/signal.h>
#include <asm/irq.h>
#include <asm/dma.h>
#include <asm/io.h>
#include "dma-sh.h"
-/*
- * The SuperH DMAC supports a number of transmit sizes, we list them here,
- * with their respective values as they appear in the CHCR registers.
- *
- * Defaults to a 64-bit transfer size.
- */
-enum {
- XMIT_SZ_64BIT,
- XMIT_SZ_8BIT,
- XMIT_SZ_16BIT,
- XMIT_SZ_32BIT,
- XMIT_SZ_256BIT,
-};
-
-/*
- * The DMA count is defined as the number of bytes to transfer.
- */
-static unsigned int ts_shift[] = {
- [XMIT_SZ_64BIT] = 3,
- [XMIT_SZ_8BIT] = 0,
- [XMIT_SZ_16BIT] = 1,
- [XMIT_SZ_32BIT] = 2,
- [XMIT_SZ_256BIT] = 5,
-};
-
static inline unsigned int get_dmte_irq(unsigned int chan)
{
- unsigned int irq;
+ unsigned int irq = 0;
/*
* Normally we could just do DMTE0_IRQ + chan outright, though in the
* case of the 7751R, the DMTE IRQs for channels > 4 start right above
* the SCIF
*/
-
if (chan < 4) {
irq = DMTE0_IRQ + chan;
} else {
+#ifdef DMTE4_IRQ
irq = DMTE4_IRQ + chan - 4;
+#endif
}
return irq;
{
u32 chcr = ctrl_inl(CHCR[chan->chan]);
- chcr >>= 4;
-
- return ts_shift[chcr & 0x0007];
+ return ts_shift[(chcr & CHCR_TS_MASK)>>CHCR_TS_SHIFT];
}
/*
static int sh_dmac_request_dma(struct dma_channel *chan)
{
+ char name[32];
+
+ snprintf(name, sizeof(name), "DMAC Transfer End (Channel %d)",
+ chan->chan);
+
return request_irq(get_dmte_irq(chan->chan), dma_tei,
- SA_INTERRUPT, "DMAC Transfer End", chan);
+ SA_INTERRUPT, name, chan);
}
static void sh_dmac_free_dma(struct dma_channel *chan)
free_irq(get_dmte_irq(chan->chan), chan);
}
-static void sh_dmac_configure_channel(struct dma_channel *chan, unsigned long chcr)
+static void
+sh_dmac_configure_channel(struct dma_channel *chan, unsigned long chcr)
{
if (!chcr)
- chcr = RS_DUAL;
+ chcr = RS_DUAL | CHCR_IE;
+
+ if (chcr & CHCR_IE) {
+ chcr &= ~CHCR_IE;
+ chan->flags |= DMA_TEI_CAPABLE;
+ } else {
+ chan->flags &= ~DMA_TEI_CAPABLE;
+ }
ctrl_outl(chcr, CHCR[chan->chan]);
static void sh_dmac_enable_dma(struct dma_channel *chan)
{
- int irq = get_dmte_irq(chan->chan);
+ int irq;
u32 chcr;
chcr = ctrl_inl(CHCR[chan->chan]);
- chcr |= CHCR_DE | CHCR_IE;
+ chcr |= CHCR_DE;
+
+ if (chan->flags & DMA_TEI_CAPABLE)
+ chcr |= CHCR_IE;
+
ctrl_outl(chcr, CHCR[chan->chan]);
- enable_irq(irq);
+ if (chan->flags & DMA_TEI_CAPABLE) {
+ irq = get_dmte_irq(chan->chan);
+ enable_irq(irq);
+ }
}
static void sh_dmac_disable_dma(struct dma_channel *chan)
{
- int irq = get_dmte_irq(chan->chan);
+ int irq;
u32 chcr;
- disable_irq(irq);
+ if (chan->flags & DMA_TEI_CAPABLE) {
+ irq = get_dmte_irq(chan->chan);
+ disable_irq(irq);
+ }
chcr = ctrl_inl(CHCR[chan->chan]);
chcr &= ~(CHCR_DE | CHCR_TE | CHCR_IE);
* If we haven't pre-configured the channel with special flags, use
* the defaults.
*/
- if (!(chan->flags & DMA_CONFIGURED))
+ if (unlikely(!(chan->flags & DMA_CONFIGURED)))
sh_dmac_configure_channel(chan, 0);
sh_dmac_disable_dma(chan);
* cascading to the PVR2 DMAC. In this case, we still need to write
* SAR and DAR, regardless of value, in order for cascading to work.
*/
- if (chan->sar || (mach_is_dreamcast() && chan->chan == 2))
+ if (chan->sar || (mach_is_dreamcast() &&
+ chan->chan == PVR2_CASCADE_CHAN))
ctrl_outl(chan->sar, SAR[chan->chan]);
- if (chan->dar || (mach_is_dreamcast() && chan->chan == 2))
+ if (chan->dar || (mach_is_dreamcast() &&
+ chan->chan == PVR2_CASCADE_CHAN))
ctrl_outl(chan->dar, DAR[chan->chan]);
ctrl_outl(chan->count >> calc_xmit_shift(chan), DMATCR[chan->chan]);
return ctrl_inl(DMATCR[chan->chan]) << calc_xmit_shift(chan);
}
-#if defined(CONFIG_CPU_SH4)
-static irqreturn_t dma_err(int irq, void *dev_id, struct pt_regs *regs)
+#ifdef CONFIG_CPU_SUBTYPE_SH7780
+#define dmaor_read_reg() ctrl_inw(DMAOR)
+#define dmaor_write_reg(data) ctrl_outw(data, DMAOR)
+#else
+#define dmaor_read_reg() ctrl_inl(DMAOR)
+#define dmaor_write_reg(data) ctrl_outl(data, DMAOR)
+#endif
+
+static inline int dmaor_reset(void)
{
- unsigned long dmaor = ctrl_inl(DMAOR);
+ unsigned long dmaor = dmaor_read_reg();
+
+ /* Try to clear the error flags first, incase they are set */
+ dmaor &= ~(DMAOR_NMIF | DMAOR_AE);
+ dmaor_write_reg(dmaor);
- printk("DMAE: DMAOR=%lx\n", dmaor);
+ dmaor |= DMAOR_INIT;
+ dmaor_write_reg(dmaor);
- ctrl_outl(ctrl_inl(DMAOR)&~DMAOR_NMIF, DMAOR);
- ctrl_outl(ctrl_inl(DMAOR)&~DMAOR_AE, DMAOR);
- ctrl_outl(ctrl_inl(DMAOR)|DMAOR_DME, DMAOR);
+ /* See if we got an error again */
+ if ((dmaor_read_reg() & (DMAOR_AE | DMAOR_NMIF))) {
+ printk(KERN_ERR "dma-sh: Can't initialize DMAOR.\n");
+ return -EINVAL;
+ }
+ return 0;
+}
+
+#if defined(CONFIG_CPU_SH4)
+static irqreturn_t dma_err(int irq, void *dev_id, struct pt_regs *regs)
+{
+ dmaor_reset();
disable_irq(irq);
return IRQ_HANDLED;
};
static struct dma_info sh_dmac_info = {
- .name = "SuperH DMAC",
- .nr_channels = 4,
+ .name = "sh_dmac",
+ .nr_channels = CONFIG_NR_ONCHIP_DMA_CHANNELS,
.ops = &sh_dmac_ops,
.flags = DMAC_CHANNELS_TEI_CAPABLE,
};
make_ipr_irq(irq, DMA_IPR_ADDR, DMA_IPR_POS, DMA_PRIORITY);
}
- ctrl_outl(0x8000 | DMAOR_DME, DMAOR);
+ /*
+ * Initialize DMAOR, and clean up any error flags that may have
+ * been set.
+ */
+ i = dmaor_reset();
+ if (i < 0)
+ return i;
return register_dmac(info);
}
#ifdef CONFIG_CPU_SH4
free_irq(DMAE_IRQ, 0);
#endif
+ unregister_dmac(&sh_dmac_info);
}
subsys_initcall(sh_dmac_init);
module_exit(sh_dmac_exit);
+MODULE_AUTHOR("Takashi YOSHII, Paul Mundt, Andriy Skulysh");
+MODULE_DESCRIPTION("SuperH On-Chip DMAC Support");
MODULE_LICENSE("GPL");
-
#ifndef __DMA_SH_H
#define __DMA_SH_H
+#include <asm/cpu/dma.h>
+
/* Definitions for the SuperH DMAC */
#define REQ_L 0x00000000
#define REQ_E 0x00080000
#define SM_DEC 0x00002000
#define RS_IN 0x00000200
#define RS_OUT 0x00000300
-#define TM_BURST 0x0000080
-#define TS_8 0x00000010
-#define TS_16 0x00000020
-#define TS_32 0x00000030
-#define TS_64 0x00000000
#define TS_BLK 0x00000040
#define CHCR_DE 0x00000001
#define CHCR_TE 0x00000002
#define CHCR_IE 0x00000004
-/* Define the default configuration for dual address memory-memory transfer.
- * The 0x400 value represents auto-request, external->external.
- */
-#define RS_DUAL (DM_INC | SM_INC | 0x400 | TS_32)
-
-#define DMAOR_COD 0x00000008
+/* DMAOR definitions */
#define DMAOR_AE 0x00000004
#define DMAOR_NMIF 0x00000002
#define DMAOR_DME 0x00000001
+/*
+ * Define the default configuration for dual address memory-memory transfer.
+ * The 0x400 value represents auto-request, external->external.
+ */
+#define RS_DUAL (DM_INC | SM_INC | 0x400 | TS_32)
+
#define MAX_DMAC_CHANNELS (CONFIG_NR_ONCHIP_DMA_CHANNELS)
+/*
+ * Subtypes that have fewer channels than this simply need to change
+ * CONFIG_NR_ONCHIP_DMA_CHANNELS. Likewise, subtypes with a larger number
+ * of channels should expand on this.
+ *
+ * For most subtypes we can easily figure these values out with some
+ * basic calculation, unfortunately on other subtypes these are more
+ * scattered, so we just leave it unrolled for simplicity.
+ */
+#define SAR ((unsigned long[]){SH_DMAC_BASE + 0x00, SH_DMAC_BASE + 0x10, \
+ SH_DMAC_BASE + 0x20, SH_DMAC_BASE + 0x30, \
+ SH_DMAC_BASE + 0x50, SH_DMAC_BASE + 0x60})
+#define DAR ((unsigned long[]){SH_DMAC_BASE + 0x04, SH_DMAC_BASE + 0x14, \
+ SH_DMAC_BASE + 0x24, SH_DMAC_BASE + 0x34, \
+ SH_DMAC_BASE + 0x54, SH_DMAC_BASE + 0x64})
+#define DMATCR ((unsigned long[]){SH_DMAC_BASE + 0x08, SH_DMAC_BASE + 0x18, \
+ SH_DMAC_BASE + 0x28, SH_DMAC_BASE + 0x38, \
+ SH_DMAC_BASE + 0x58, SH_DMAC_BASE + 0x68})
+#define CHCR ((unsigned long[]){SH_DMAC_BASE + 0x0c, SH_DMAC_BASE + 0x1c, \
+ SH_DMAC_BASE + 0x2c, SH_DMAC_BASE + 0x3c, \
+ SH_DMAC_BASE + 0x5c, SH_DMAC_BASE + 0x6c})
+
+#define DMAOR (SH_DMAC_BASE + 0x40)
+
#endif /* __DMA_SH_H */
*
* sysfs interface for SH DMA API
*
- * Copyright (C) 2004 Paul Mundt
+ * Copyright (C) 2004, 2005 Paul Mundt
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/sysdev.h>
+#include <linux/platform_device.h>
#include <linux/module.h>
+#include <linux/err.h>
#include <linux/string.h>
#include <asm/dma.h>
unsigned long config;
config = simple_strtoul(buf, NULL, 0);
- dma_configure_channel(channel->chan, config);
+ dma_configure_channel(channel->vchan, config);
return count;
}
dma_ro_attr(count, "0x%08x\n");
dma_ro_attr(flags, "0x%08lx\n");
-int __init dma_create_sysfs_files(struct dma_channel *chan)
+int dma_create_sysfs_files(struct dma_channel *chan, struct dma_info *info)
{
struct sys_device *dev = &chan->dev;
+ char name[16];
int ret;
- dev->id = chan->chan;
+ dev->id = chan->vchan;
dev->cls = &dma_sysclass;
ret = sysdev_register(dev);
sysdev_create_file(dev, &attr_flags);
sysdev_create_file(dev, &attr_config);
- return 0;
+ snprintf(name, sizeof(name), "dma%d", chan->chan);
+ return sysfs_create_link(&info->pdev->dev.kobj, &dev->kobj, name);
+}
+
+void dma_remove_sysfs_files(struct dma_channel *chan, struct dma_info *info)
+{
+ struct sys_device *dev = &chan->dev;
+ char name[16];
+
+ sysdev_remove_file(dev, &attr_dev_id);
+ sysdev_remove_file(dev, &attr_count);
+ sysdev_remove_file(dev, &attr_mode);
+ sysdev_remove_file(dev, &attr_flags);
+ sysdev_remove_file(dev, &attr_config);
+
+ snprintf(name, sizeof(name), "dma%d", chan->chan);
+ sysfs_remove_link(&info->pdev->dev.kobj, name);
+
+ sysdev_unregister(dev);
}
obj-$(CONFIG_SH_CPU_FREQ) += cpufreq.o
obj-$(CONFIG_MODULES) += module.o
obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
-
-USE_STANDARD_AS_RULE := true
-
+obj-$(CONFIG_KEXEC) += machine_kexec.o relocate_kernel.o
# Makefile for the Linux/SuperH CPU-specifc backends.
#
-obj-y := irq_ipr.o irq_imask.o init.o bus.o
+obj-y += irq/ init.o bus.o clock.o
obj-$(CONFIG_CPU_SH2) += sh2/
obj-$(CONFIG_CPU_SH3) += sh3/
obj-$(CONFIG_CPU_SH4) += sh4/
-obj-$(CONFIG_SH_RTC) += rtc.o
+obj-$(CONFIG_SH_RTC) += rtc.o
obj-$(CONFIG_UBC_WAKEUP) += ubc.o
-obj-$(CONFIG_SH_ADC) += adc.o
-
-USE_STANDARD_AS_RULE := true
-
+obj-$(CONFIG_SH_ADC) += adc.o
/* This is needed for USB OHCI to work */
if (dev->dma_mask)
dev->dev.dma_mask = dev->dma_mask;
+ if (dev->coherent_dma_mask)
+ dev->dev.coherent_dma_mask = dev->coherent_dma_mask;
snprintf(dev->dev.bus_id, BUS_ID_SIZE, "%s%u",
dev->name, dev->dev_id);
--- /dev/null
+/*
+ * arch/sh/kernel/cpu/clock.c - SuperH clock framework
+ *
+ * Copyright (C) 2005 Paul Mundt
+ *
+ * This clock framework is derived from the OMAP version by:
+ *
+ * Copyright (C) 2004 Nokia Corporation
+ * Written by Tuukka Tikkanen <tuukka.tikkanen@elektrobit.com>
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/list.h>
+#include <linux/kref.h>
+#include <linux/seq_file.h>
+#include <linux/err.h>
+#include <asm/clock.h>
+#include <asm/timer.h>
+
+static LIST_HEAD(clock_list);
+static DEFINE_SPINLOCK(clock_lock);
+static DECLARE_MUTEX(clock_list_sem);
+
+/*
+ * Each subtype is expected to define the init routines for these clocks,
+ * as each subtype (or processor family) will have these clocks at the
+ * very least. These are all provided through the CPG, which even some of
+ * the more quirky parts (such as ST40, SH4-202, etc.) still have.
+ *
+ * The processor-specific code is expected to register any additional
+ * clock sources that are of interest.
+ */
+static struct clk master_clk = {
+ .name = "master_clk",
+ .flags = CLK_ALWAYS_ENABLED | CLK_RATE_PROPAGATES,
+#ifdef CONFIG_SH_PCLK_FREQ_BOOL
+ .rate = CONFIG_SH_PCLK_FREQ,
+#endif
+};
+
+static struct clk module_clk = {
+ .name = "module_clk",
+ .parent = &master_clk,
+ .flags = CLK_ALWAYS_ENABLED | CLK_RATE_PROPAGATES,
+};
+
+static struct clk bus_clk = {
+ .name = "bus_clk",
+ .parent = &master_clk,
+ .flags = CLK_ALWAYS_ENABLED | CLK_RATE_PROPAGATES,
+};
+
+static struct clk cpu_clk = {
+ .name = "cpu_clk",
+ .parent = &master_clk,
+ .flags = CLK_ALWAYS_ENABLED,
+};
+
+/*
+ * The ordering of these clocks matters, do not change it.
+ */
+static struct clk *onchip_clocks[] = {
+ &master_clk,
+ &module_clk,
+ &bus_clk,
+ &cpu_clk,
+};
+
+static void propagate_rate(struct clk *clk)
+{
+ struct clk *clkp;
+
+ list_for_each_entry(clkp, &clock_list, node) {
+ if (likely(clkp->parent != clk))
+ continue;
+ if (likely(clkp->ops && clkp->ops->recalc))
+ clkp->ops->recalc(clkp);
+ }
+}
+
+int __clk_enable(struct clk *clk)
+{
+ /*
+ * See if this is the first time we're enabling the clock, some
+ * clocks that are always enabled still require "special"
+ * initialization. This is especially true if the clock mode
+ * changes and the clock needs to hunt for the proper set of
+ * divisors to use before it can effectively recalc.
+ */
+ if (unlikely(atomic_read(&clk->kref.refcount) == 1))
+ if (clk->ops && clk->ops->init)
+ clk->ops->init(clk);
+
+ if (clk->flags & CLK_ALWAYS_ENABLED)
+ return 0;
+
+ if (likely(clk->ops && clk->ops->enable))
+ clk->ops->enable(clk);
+
+ kref_get(&clk->kref);
+ return 0;
+}
+
+int clk_enable(struct clk *clk)
+{
+ unsigned long flags;
+ int ret;
+
+ spin_lock_irqsave(&clock_lock, flags);
+ ret = __clk_enable(clk);
+ spin_unlock_irqrestore(&clock_lock, flags);
+
+ return ret;
+}
+
+static void clk_kref_release(struct kref *kref)
+{
+ /* Nothing to do */
+}
+
+void __clk_disable(struct clk *clk)
+{
+ if (clk->flags & CLK_ALWAYS_ENABLED)
+ return;
+
+ kref_put(&clk->kref, clk_kref_release);
+}
+
+void clk_disable(struct clk *clk)
+{
+ unsigned long flags;
+
+ spin_lock_irqsave(&clock_lock, flags);
+ __clk_disable(clk);
+ spin_unlock_irqrestore(&clock_lock, flags);
+}
+
+int clk_register(struct clk *clk)
+{
+ down(&clock_list_sem);
+
+ list_add(&clk->node, &clock_list);
+ kref_init(&clk->kref);
+
+ up(&clock_list_sem);
+
+ return 0;
+}
+
+void clk_unregister(struct clk *clk)
+{
+ down(&clock_list_sem);
+ list_del(&clk->node);
+ up(&clock_list_sem);
+}
+
+inline unsigned long clk_get_rate(struct clk *clk)
+{
+ return clk->rate;
+}
+
+int clk_set_rate(struct clk *clk, unsigned long rate)
+{
+ int ret = -EOPNOTSUPP;
+
+ if (likely(clk->ops && clk->ops->set_rate)) {
+ unsigned long flags;
+
+ spin_lock_irqsave(&clock_lock, flags);
+ ret = clk->ops->set_rate(clk, rate);
+ spin_unlock_irqrestore(&clock_lock, flags);
+ }
+
+ if (unlikely(clk->flags & CLK_RATE_PROPAGATES))
+ propagate_rate(clk);
+
+ return ret;
+}
+
+void clk_recalc_rate(struct clk *clk)
+{
+ if (likely(clk->ops && clk->ops->recalc)) {
+ unsigned long flags;
+
+ spin_lock_irqsave(&clock_lock, flags);
+ clk->ops->recalc(clk);
+ spin_unlock_irqrestore(&clock_lock, flags);
+ }
+
+ if (unlikely(clk->flags & CLK_RATE_PROPAGATES))
+ propagate_rate(clk);
+}
+
+struct clk *clk_get(const char *id)
+{
+ struct clk *p, *clk = ERR_PTR(-ENOENT);
+
+ down(&clock_list_sem);
+ list_for_each_entry(p, &clock_list, node) {
+ if (strcmp(id, p->name) == 0 && try_module_get(p->owner)) {
+ clk = p;
+ break;
+ }
+ }
+ up(&clock_list_sem);
+
+ return clk;
+}
+
+void clk_put(struct clk *clk)
+{
+ if (clk && !IS_ERR(clk))
+ module_put(clk->owner);
+}
+
+void __init __attribute__ ((weak))
+arch_init_clk_ops(struct clk_ops **ops, int type)
+{
+}
+
+int __init clk_init(void)
+{
+ int i, ret = 0;
+
+ if (unlikely(!master_clk.rate))
+ /*
+ * NOTE: This will break if the default divisor has been
+ * changed.
+ *
+ * No one should be changing the default on us however,
+ * expect that a sane value for CONFIG_SH_PCLK_FREQ will
+ * be defined in the event of a different divisor.
+ */
+ master_clk.rate = get_timer_frequency() * 4;
+
+ for (i = 0; i < ARRAY_SIZE(onchip_clocks); i++) {
+ struct clk *clk = onchip_clocks[i];
+
+ arch_init_clk_ops(&clk->ops, i);
+ ret |= clk_register(clk);
+ clk_enable(clk);
+ }
+
+ /* Kick the child clocks.. */
+ propagate_rate(&master_clk);
+ propagate_rate(&bus_clk);
+
+ return ret;
+}
+
+int show_clocks(struct seq_file *m)
+{
+ struct clk *clk;
+
+ list_for_each_entry_reverse(clk, &clock_list, node) {
+ unsigned long rate = clk_get_rate(clk);
+
+ /*
+ * Don't bother listing dummy clocks with no ancestry
+ * that only support enable and disable ops.
+ */
+ if (unlikely(!rate && !clk->parent))
+ continue;
+
+ seq_printf(m, "%-12s\t: %ld.%02ldMHz\n", clk->name,
+ rate / 1000000, (rate % 1000000) / 10000);
+ }
+
+ return 0;
+}
+
+EXPORT_SYMBOL_GPL(clk_register);
+EXPORT_SYMBOL_GPL(clk_unregister);
+EXPORT_SYMBOL_GPL(clk_get);
+EXPORT_SYMBOL_GPL(clk_put);
+EXPORT_SYMBOL_GPL(clk_enable);
+EXPORT_SYMBOL_GPL(clk_disable);
+EXPORT_SYMBOL_GPL(__clk_enable);
+EXPORT_SYMBOL_GPL(__clk_disable);
+EXPORT_SYMBOL_GPL(clk_get_rate);
+EXPORT_SYMBOL_GPL(clk_set_rate);
+EXPORT_SYMBOL_GPL(clk_recalc_rate);
--- /dev/null
+#
+# Makefile for the Linux/SuperH CPU-specifc IRQ handlers.
+#
+obj-y += ipr.o imask.o
+
+obj-$(CONFIG_CPU_HAS_PINT_IRQ) += pint.o
+obj-$(CONFIG_CPU_HAS_INTC2_IRQ) += intc2.o
-/* $Id: irq_imask.c,v 1.1.2.1 2002/11/17 10:53:43 mrbrown Exp $
- *
- * linux/arch/sh/kernel/irq_imask.c
+/*
+ * arch/sh/kernel/cpu/irq/imask.c
*
* Copyright (C) 1999, 2000 Niibe Yutaka
*
* Simple interrupt handling using IMASK of SR register.
*
*/
-
/* NOTE: Will not work on level 15 */
-
-
#include <linux/ptrace.h>
#include <linux/errno.h>
#include <linux/kernel_stat.h>
#include <linux/interrupt.h>
#include <linux/init.h>
#include <linux/bitops.h>
-
-#include <asm/system.h>
-#include <asm/irq.h>
-
#include <linux/spinlock.h>
#include <linux/cache.h>
#include <linux/irq.h>
+#include <asm/system.h>
+#include <asm/irq.h>
/* Bitmap of IRQ masked */
static unsigned long imask_mask = 0x7fff;
#define IMASK_PRIORITY 15
static unsigned int startup_imask_irq(unsigned int irq)
-{
+{
/* Nothing to do */
return 0; /* never anything pending */
}
--- /dev/null
+/*
+ * Interrupt handling for INTC2-based IRQ.
+ *
+ * Copyright (C) 2001 David J. Mckay (david.mckay@st.com)
+ * Copyright (C) 2005, 2006 Paul Mundt (lethal@linux-sh.org)
+ *
+ * May be copied or modified under the terms of the GNU General Public
+ * License. See linux/COPYING for more information.
+ *
+ * These are the "new Hitachi style" interrupts, as present on the
+ * Hitachi 7751, the STM ST40 STB1, SH7760, and SH7780.
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/irq.h>
+#include <asm/system.h>
+#include <asm/io.h>
+#include <asm/machvec.h>
+
+struct intc2_data {
+ unsigned char msk_offset;
+ unsigned char msk_shift;
+
+ int (*clear_irq) (int);
+};
+
+static struct intc2_data intc2_data[NR_INTC2_IRQS];
+
+static void enable_intc2_irq(unsigned int irq);
+static void disable_intc2_irq(unsigned int irq);
+
+/* shutdown is same as "disable" */
+#define shutdown_intc2_irq disable_intc2_irq
+
+static void mask_and_ack_intc2(unsigned int);
+static void end_intc2_irq(unsigned int irq);
+
+static unsigned int startup_intc2_irq(unsigned int irq)
+{
+ enable_intc2_irq(irq);
+ return 0; /* never anything pending */
+}
+
+static struct hw_interrupt_type intc2_irq_type = {
+ .typename = "INTC2-IRQ",
+ .startup = startup_intc2_irq,
+ .shutdown = shutdown_intc2_irq,
+ .enable = enable_intc2_irq,
+ .disable = disable_intc2_irq,
+ .ack = mask_and_ack_intc2,
+ .end = end_intc2_irq
+};
+
+static void disable_intc2_irq(unsigned int irq)
+{
+ int irq_offset = irq - INTC2_FIRST_IRQ;
+ int msk_shift, msk_offset;
+
+ /* Sanity check */
+ if (unlikely(irq_offset < 0 || irq_offset >= NR_INTC2_IRQS))
+ return;
+
+ msk_shift = intc2_data[irq_offset].msk_shift;
+ msk_offset = intc2_data[irq_offset].msk_offset;
+
+ ctrl_outl(1 << msk_shift,
+ INTC2_BASE + INTC2_INTMSK_OFFSET + msk_offset);
+}
+
+static void enable_intc2_irq(unsigned int irq)
+{
+ int irq_offset = irq - INTC2_FIRST_IRQ;
+ int msk_shift, msk_offset;
+
+ /* Sanity check */
+ if (unlikely(irq_offset < 0 || irq_offset >= NR_INTC2_IRQS))
+ return;
+
+ msk_shift = intc2_data[irq_offset].msk_shift;
+ msk_offset = intc2_data[irq_offset].msk_offset;
+
+ ctrl_outl(1 << msk_shift,
+ INTC2_BASE + INTC2_INTMSKCLR_OFFSET + msk_offset);
+}
+
+static void mask_and_ack_intc2(unsigned int irq)
+{
+ disable_intc2_irq(irq);
+}
+
+static void end_intc2_irq(unsigned int irq)
+{
+ if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
+ enable_intc2_irq(irq);
+
+ if (unlikely(intc2_data[irq - INTC2_FIRST_IRQ].clear_irq))
+ intc2_data[irq - INTC2_FIRST_IRQ].clear_irq(irq);
+}
+
+/*
+ * Setup an INTC2 style interrupt.
+ * NOTE: Unlike IPR interrupts, parameters are not shifted by this code,
+ * allowing the use of the numbers straight out of the datasheet.
+ * For example:
+ * PIO1 which is INTPRI00[19,16] and INTMSK00[13]
+ * would be: ^ ^ ^ ^
+ * | | | |
+ * make_intc2_irq(84, 0, 16, 0, 13);
+ */
+void make_intc2_irq(unsigned int irq,
+ unsigned int ipr_offset, unsigned int ipr_shift,
+ unsigned int msk_offset, unsigned int msk_shift,
+ unsigned int priority)
+{
+ int irq_offset = irq - INTC2_FIRST_IRQ;
+ unsigned int flags;
+ unsigned long ipr;
+
+ if (unlikely(irq_offset < 0 || irq_offset >= NR_INTC2_IRQS))
+ return;
+
+ disable_irq_nosync(irq);
+
+ /* Fill the data we need */
+ intc2_data[irq_offset].msk_offset = msk_offset;
+ intc2_data[irq_offset].msk_shift = msk_shift;
+ intc2_data[irq_offset].clear_irq = NULL;
+
+ /* Set the priority level */
+ local_irq_save(flags);
+
+ ipr = ctrl_inl(INTC2_BASE + INTC2_INTPRI_OFFSET + ipr_offset);
+ ipr &= ~(0xf << ipr_shift);
+ ipr |= priority << ipr_shift;
+ ctrl_outl(ipr, INTC2_BASE + INTC2_INTPRI_OFFSET + ipr_offset);
+
+ local_irq_restore(flags);
+
+ irq_desc[irq].handler = &intc2_irq_type;
+
+ disable_intc2_irq(irq);
+}
+
+static struct intc2_init {
+ unsigned short irq;
+ unsigned char ipr_offset, ipr_shift;
+ unsigned char msk_offset, msk_shift;
+ unsigned char priority;
+} intc2_init_data[] __initdata = {
+#if defined(CONFIG_CPU_SUBTYPE_ST40)
+ {64, 0, 0, 0, 0, 13}, /* PCI serr */
+ {65, 0, 4, 0, 1, 13}, /* PCI err */
+ {66, 0, 4, 0, 2, 13}, /* PCI ad */
+ {67, 0, 4, 0, 3, 13}, /* PCI pwd down */
+ {72, 0, 8, 0, 5, 13}, /* DMAC INT0 */
+ {73, 0, 8, 0, 6, 13}, /* DMAC INT1 */
+ {74, 0, 8, 0, 7, 13}, /* DMAC INT2 */
+ {75, 0, 8, 0, 8, 13}, /* DMAC INT3 */
+ {76, 0, 8, 0, 9, 13}, /* DMAC INT4 */
+ {78, 0, 8, 0, 11, 13}, /* DMAC ERR */
+ {80, 0, 12, 0, 12, 13}, /* PIO0 */
+ {84, 0, 16, 0, 13, 13}, /* PIO1 */
+ {88, 0, 20, 0, 14, 13}, /* PIO2 */
+ {112, 4, 0, 4, 0, 13}, /* Mailbox */
+ #ifdef CONFIG_CPU_SUBTYPE_ST40GX1
+ {116, 4, 4, 4, 4, 13}, /* SSC0 */
+ {120, 4, 8, 4, 8, 13}, /* IR Blaster */
+ {124, 4, 12, 4, 12, 13}, /* USB host */
+ {128, 4, 16, 4, 16, 13}, /* Video processor BLITTER */
+ {132, 4, 20, 4, 20, 13}, /* UART0 */
+ {134, 4, 20, 4, 22, 13}, /* UART2 */
+ {136, 4, 24, 4, 24, 13}, /* IO_PIO0 */
+ {140, 4, 28, 4, 28, 13}, /* EMPI */
+ {144, 8, 0, 8, 0, 13}, /* MAFE */
+ {148, 8, 4, 8, 4, 13}, /* PWM */
+ {152, 8, 8, 8, 8, 13}, /* SSC1 */
+ {156, 8, 12, 8, 12, 13}, /* IO_PIO1 */
+ {160, 8, 16, 8, 16, 13}, /* USB target */
+ {164, 8, 20, 8, 20, 13}, /* UART1 */
+ {168, 8, 24, 8, 24, 13}, /* Teletext */
+ {172, 8, 28, 8, 28, 13}, /* VideoSync VTG */
+ {173, 8, 28, 8, 29, 13}, /* VideoSync DVP0 */
+ {174, 8, 28, 8, 30, 13}, /* VideoSync DVP1 */
+#endif
+#elif defined(CONFIG_CPU_SUBTYPE_SH7760)
+/*
+ * SH7760 INTC2-Style interrupts, vectors IRQ48-111 INTEVT 0x800-0xFE0
+ */
+ /* INTPRIO0 | INTMSK0 */
+ {48, 0, 28, 0, 31, 3}, /* IRQ 4 */
+ {49, 0, 24, 0, 30, 3}, /* IRQ 3 */
+ {50, 0, 20, 0, 29, 3}, /* IRQ 2 */
+ {51, 0, 16, 0, 28, 3}, /* IRQ 1 */
+ /* 52-55 (INTEVT 0x880-0x8E0) unused/reserved */
+ /* INTPRIO4 | INTMSK0 */
+ {56, 4, 28, 0, 25, 3}, /* HCAN2_CHAN0 */
+ {57, 4, 24, 0, 24, 3}, /* HCAN2_CHAN1 */
+ {58, 4, 20, 0, 23, 3}, /* I2S_CHAN0 */
+ {59, 4, 16, 0, 22, 3}, /* I2S_CHAN1 */
+ {60, 4, 12, 0, 21, 3}, /* AC97_CHAN0 */
+ {61, 4, 8, 0, 20, 3}, /* AC97_CHAN1 */
+ {62, 4, 4, 0, 19, 3}, /* I2C_CHAN0 */
+ {63, 4, 0, 0, 18, 3}, /* I2C_CHAN1 */
+ /* INTPRIO8 | INTMSK0 */
+ {52, 8, 16, 0, 11, 3}, /* SCIF0_ERI_IRQ */
+ {53, 8, 16, 0, 10, 3}, /* SCIF0_RXI_IRQ */
+ {54, 8, 16, 0, 9, 3}, /* SCIF0_BRI_IRQ */
+ {55, 8, 16, 0, 8, 3}, /* SCIF0_TXI_IRQ */
+ {64, 8, 28, 0, 17, 3}, /* USBHI_IRQ */
+ {65, 8, 24, 0, 16, 3}, /* LCDC */
+ /* 66, 67 unused */
+ {68, 8, 20, 0, 14, 13}, /* DMABRGI0_IRQ */
+ {69, 8, 20, 0, 13, 13}, /* DMABRGI1_IRQ */
+ {70, 8, 20, 0, 12, 13}, /* DMABRGI2_IRQ */
+ /* 71 unused */
+ {72, 8, 12, 0, 7, 3}, /* SCIF1_ERI_IRQ */
+ {73, 8, 12, 0, 6, 3}, /* SCIF1_RXI_IRQ */
+ {74, 8, 12, 0, 5, 3}, /* SCIF1_BRI_IRQ */
+ {75, 8, 12, 0, 4, 3}, /* SCIF1_TXI_IRQ */
+ {76, 8, 8, 0, 3, 3}, /* SCIF2_ERI_IRQ */
+ {77, 8, 8, 0, 2, 3}, /* SCIF2_RXI_IRQ */
+ {78, 8, 8, 0, 1, 3}, /* SCIF2_BRI_IRQ */
+ {79, 8, 8, 0, 0, 3}, /* SCIF2_TXI_IRQ */
+ /* | INTMSK4 */
+ {80, 8, 4, 4, 23, 3}, /* SIM_ERI */
+ {81, 8, 4, 4, 22, 3}, /* SIM_RXI */
+ {82, 8, 4, 4, 21, 3}, /* SIM_TXI */
+ {83, 8, 4, 4, 20, 3}, /* SIM_TEI */
+ {84, 8, 0, 4, 19, 3}, /* HSPII */
+ /* INTPRIOC | INTMSK4 */
+ /* 85-87 unused/reserved */
+ {88, 12, 20, 4, 18, 3}, /* MMCI0 */
+ {89, 12, 20, 4, 17, 3}, /* MMCI1 */
+ {90, 12, 20, 4, 16, 3}, /* MMCI2 */
+ {91, 12, 20, 4, 15, 3}, /* MMCI3 */
+ {92, 12, 12, 4, 6, 3}, /* MFI (unsure, bug? in my 7760 manual*/
+ /* 93-107 reserved/undocumented */
+ {108,12, 4, 4, 1, 3}, /* ADC */
+ {109,12, 0, 4, 0, 3}, /* CMTI */
+ /* 110-111 reserved/unused */
+#elif defined(CONFIG_CPU_SUBTYPE_SH7780)
+ { TIMER_IRQ, 0, 24, 0, INTC_TMU0_MSK, 2},
+#ifdef CONFIG_SH_RTC
+ { RTC_IRQ, 4, 0, 0, INTC_RTC_MSK, TIMER_PRIORITY },
+#endif
+ { SCIF0_ERI_IRQ, 8, 24, 0, INTC_SCIF0_MSK, SCIF0_PRIORITY },
+ { SCIF0_RXI_IRQ, 8, 24, 0, INTC_SCIF0_MSK, SCIF0_PRIORITY },
+ { SCIF0_BRI_IRQ, 8, 24, 0, INTC_SCIF0_MSK, SCIF0_PRIORITY },
+ { SCIF0_TXI_IRQ, 8, 24, 0, INTC_SCIF0_MSK, SCIF0_PRIORITY },
+
+ { SCIF1_ERI_IRQ, 8, 16, 0, INTC_SCIF1_MSK, SCIF1_PRIORITY },
+ { SCIF1_RXI_IRQ, 8, 16, 0, INTC_SCIF1_MSK, SCIF1_PRIORITY },
+ { SCIF1_BRI_IRQ, 8, 16, 0, INTC_SCIF1_MSK, SCIF1_PRIORITY },
+ { SCIF1_TXI_IRQ, 8, 16, 0, INTC_SCIF1_MSK, SCIF1_PRIORITY },
+
+ { PCIC0_IRQ, 0x10, 8, 0, INTC_PCIC0_MSK, PCIC0_PRIORITY },
+ { PCIC1_IRQ, 0x10, 0, 0, INTC_PCIC1_MSK, PCIC1_PRIORITY },
+ { PCIC2_IRQ, 0x14, 24, 0, INTC_PCIC2_MSK, PCIC2_PRIORITY },
+ { PCIC3_IRQ, 0x14, 16, 0, INTC_PCIC3_MSK, PCIC3_PRIORITY },
+ { PCIC4_IRQ, 0x14, 8, 0, INTC_PCIC4_MSK, PCIC4_PRIORITY },
+#endif
+};
+
+void __init init_IRQ_intc2(void)
+{
+ int i;
+
+ for (i = 0; i < ARRAY_SIZE(intc2_init_data); i++) {
+ struct intc2_init *p = intc2_init_data + i;
+ make_intc2_irq(p->irq, p->ipr_offset, p->ipr_shift,
+ p-> msk_offset, p->msk_shift, p->priority);
+ }
+}
+
+/* Adds a termination callback to the interrupt */
+void intc2_add_clear_irq(int irq, int (*fn)(int))
+{
+ if (unlikely(irq < INTC2_FIRST_IRQ))
+ return;
+
+ intc2_data[irq - INTC2_FIRST_IRQ].clear_irq = fn;
+}
+
-/* $Id: irq_ipr.c,v 1.1.2.1 2002/11/17 10:53:43 mrbrown Exp $
- *
- * linux/arch/sh/kernel/irq_ipr.c
+/*
+ * arch/sh/kernel/cpu/irq/ipr.c
*
* Copyright (C) 1999 Niibe Yutaka & Takeshi Yaegashi
* Copyright (C) 2000 Kazumoto Kojima
enable_ipr_irq(irq);
}
-void make_ipr_irq(unsigned int irq, unsigned int addr, int pos, int priority)
+void make_ipr_irq(unsigned int irq, unsigned int addr, int pos,
+ int priority, int maskpos)
{
disable_irq_nosync(irq);
ipr_data[irq].addr = addr;
disable_ipr_irq(irq);
}
-#if defined(CONFIG_CPU_SUBTYPE_SH7705) || \
- defined(CONFIG_CPU_SUBTYPE_SH7707) || \
- defined(CONFIG_CPU_SUBTYPE_SH7709)
-static unsigned char pint_map[256];
-static unsigned long portcr_mask = 0;
-
-static void enable_pint_irq(unsigned int irq);
-static void disable_pint_irq(unsigned int irq);
-
-/* shutdown is same as "disable" */
-#define shutdown_pint_irq disable_pint_irq
-
-static void mask_and_ack_pint(unsigned int);
-static void end_pint_irq(unsigned int irq);
-
-static unsigned int startup_pint_irq(unsigned int irq)
-{
- enable_pint_irq(irq);
- return 0; /* never anything pending */
-}
-
-static struct hw_interrupt_type pint_irq_type = {
- .typename = "PINT-IRQ",
- .startup = startup_pint_irq,
- .shutdown = shutdown_pint_irq,
- .enable = enable_pint_irq,
- .disable = disable_pint_irq,
- .ack = mask_and_ack_pint,
- .end = end_pint_irq
-};
-
-static void disable_pint_irq(unsigned int irq)
-{
- unsigned long val, flags;
-
- local_irq_save(flags);
- val = ctrl_inw(INTC_INTER);
- val &= ~(1 << (irq - PINT_IRQ_BASE));
- ctrl_outw(val, INTC_INTER); /* disable PINTn */
- portcr_mask &= ~(3 << (irq - PINT_IRQ_BASE)*2);
- local_irq_restore(flags);
-}
-
-static void enable_pint_irq(unsigned int irq)
-{
- unsigned long val, flags;
-
- local_irq_save(flags);
- val = ctrl_inw(INTC_INTER);
- val |= 1 << (irq - PINT_IRQ_BASE);
- ctrl_outw(val, INTC_INTER); /* enable PINTn */
- portcr_mask |= 3 << (irq - PINT_IRQ_BASE)*2;
- local_irq_restore(flags);
-}
-
-static void mask_and_ack_pint(unsigned int irq)
-{
- disable_pint_irq(irq);
-}
-
-static void end_pint_irq(unsigned int irq)
-{
- if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
- enable_pint_irq(irq);
-}
-
-void make_pint_irq(unsigned int irq)
-{
- disable_irq_nosync(irq);
- irq_desc[irq].handler = &pint_irq_type;
- disable_pint_irq(irq);
-}
-#endif
-
void __init init_IRQ(void)
{
-#if defined(CONFIG_CPU_SUBTYPE_SH7705) || \
- defined(CONFIG_CPU_SUBTYPE_SH7707) || \
- defined(CONFIG_CPU_SUBTYPE_SH7709)
- int i;
-#endif
-
- make_ipr_irq(TIMER_IRQ, TIMER_IPR_ADDR, TIMER_IPR_POS, TIMER_PRIORITY);
- make_ipr_irq(TIMER1_IRQ, TIMER1_IPR_ADDR, TIMER1_IPR_POS, TIMER1_PRIORITY);
+#ifndef CONFIG_CPU_SUBTYPE_SH7780
+ make_ipr_irq(TIMER_IRQ, TIMER_IPR_ADDR, TIMER_IPR_POS, TIMER_PRIORITY, 0);
+ make_ipr_irq(TIMER1_IRQ, TIMER1_IPR_ADDR, TIMER1_IPR_POS, TIMER1_PRIORITY, 0);
#if defined(CONFIG_SH_RTC)
- make_ipr_irq(RTC_IRQ, RTC_IPR_ADDR, RTC_IPR_POS, RTC_PRIORITY);
+ make_ipr_irq(RTC_IRQ, RTC_IPR_ADDR, RTC_IPR_POS, RTC_PRIORITY, 0);
#endif
#ifdef SCI_ERI_IRQ
- make_ipr_irq(SCI_ERI_IRQ, SCI_IPR_ADDR, SCI_IPR_POS, SCI_PRIORITY);
- make_ipr_irq(SCI_RXI_IRQ, SCI_IPR_ADDR, SCI_IPR_POS, SCI_PRIORITY);
- make_ipr_irq(SCI_TXI_IRQ, SCI_IPR_ADDR, SCI_IPR_POS, SCI_PRIORITY);
+ make_ipr_irq(SCI_ERI_IRQ, SCI_IPR_ADDR, SCI_IPR_POS, SCI_PRIORITY, 0);
+ make_ipr_irq(SCI_RXI_IRQ, SCI_IPR_ADDR, SCI_IPR_POS, SCI_PRIORITY, 0);
+ make_ipr_irq(SCI_TXI_IRQ, SCI_IPR_ADDR, SCI_IPR_POS, SCI_PRIORITY, 0);
#endif
#ifdef SCIF1_ERI_IRQ
- make_ipr_irq(SCIF1_ERI_IRQ, SCIF1_IPR_ADDR, SCIF1_IPR_POS, SCIF1_PRIORITY);
- make_ipr_irq(SCIF1_RXI_IRQ, SCIF1_IPR_ADDR, SCIF1_IPR_POS, SCIF1_PRIORITY);
- make_ipr_irq(SCIF1_BRI_IRQ, SCIF1_IPR_ADDR, SCIF1_IPR_POS, SCIF1_PRIORITY);
- make_ipr_irq(SCIF1_TXI_IRQ, SCIF1_IPR_ADDR, SCIF1_IPR_POS, SCIF1_PRIORITY);
+ make_ipr_irq(SCIF1_ERI_IRQ, SCIF1_IPR_ADDR, SCIF1_IPR_POS, SCIF1_PRIORITY, 0);
+ make_ipr_irq(SCIF1_RXI_IRQ, SCIF1_IPR_ADDR, SCIF1_IPR_POS, SCIF1_PRIORITY, 0);
+ make_ipr_irq(SCIF1_BRI_IRQ, SCIF1_IPR_ADDR, SCIF1_IPR_POS, SCIF1_PRIORITY, 0);
+ make_ipr_irq(SCIF1_TXI_IRQ, SCIF1_IPR_ADDR, SCIF1_IPR_POS, SCIF1_PRIORITY, 0);
#endif
#if defined(CONFIG_CPU_SUBTYPE_SH7300)
- make_ipr_irq(SCIF0_IRQ, SCIF0_IPR_ADDR, SCIF0_IPR_POS, SCIF0_PRIORITY);
- make_ipr_irq(DMTE2_IRQ, DMA1_IPR_ADDR, DMA1_IPR_POS, DMA1_PRIORITY);
- make_ipr_irq(DMTE3_IRQ, DMA1_IPR_ADDR, DMA1_IPR_POS, DMA1_PRIORITY);
- make_ipr_irq(VIO_IRQ, VIO_IPR_ADDR, VIO_IPR_POS, VIO_PRIORITY);
+ make_ipr_irq(SCIF0_IRQ, SCIF0_IPR_ADDR, SCIF0_IPR_POS, SCIF0_PRIORITY, 0);
+ make_ipr_irq(DMTE2_IRQ, DMA1_IPR_ADDR, DMA1_IPR_POS, DMA1_PRIORITY, 0);
+ make_ipr_irq(DMTE3_IRQ, DMA1_IPR_ADDR, DMA1_IPR_POS, DMA1_PRIORITY, 0);
+ make_ipr_irq(VIO_IRQ, VIO_IPR_ADDR, VIO_IPR_POS, VIO_PRIORITY, 0);
#endif
#ifdef SCIF_ERI_IRQ
- make_ipr_irq(SCIF_ERI_IRQ, SCIF_IPR_ADDR, SCIF_IPR_POS, SCIF_PRIORITY);
- make_ipr_irq(SCIF_RXI_IRQ, SCIF_IPR_ADDR, SCIF_IPR_POS, SCIF_PRIORITY);
- make_ipr_irq(SCIF_BRI_IRQ, SCIF_IPR_ADDR, SCIF_IPR_POS, SCIF_PRIORITY);
- make_ipr_irq(SCIF_TXI_IRQ, SCIF_IPR_ADDR, SCIF_IPR_POS, SCIF_PRIORITY);
+ make_ipr_irq(SCIF_ERI_IRQ, SCIF_IPR_ADDR, SCIF_IPR_POS, SCIF_PRIORITY, 0);
+ make_ipr_irq(SCIF_RXI_IRQ, SCIF_IPR_ADDR, SCIF_IPR_POS, SCIF_PRIORITY, 0);
+ make_ipr_irq(SCIF_BRI_IRQ, SCIF_IPR_ADDR, SCIF_IPR_POS, SCIF_PRIORITY, 0);
+ make_ipr_irq(SCIF_TXI_IRQ, SCIF_IPR_ADDR, SCIF_IPR_POS, SCIF_PRIORITY, 0);
#endif
#ifdef IRDA_ERI_IRQ
- make_ipr_irq(IRDA_ERI_IRQ, IRDA_IPR_ADDR, IRDA_IPR_POS, IRDA_PRIORITY);
- make_ipr_irq(IRDA_RXI_IRQ, IRDA_IPR_ADDR, IRDA_IPR_POS, IRDA_PRIORITY);
- make_ipr_irq(IRDA_BRI_IRQ, IRDA_IPR_ADDR, IRDA_IPR_POS, IRDA_PRIORITY);
- make_ipr_irq(IRDA_TXI_IRQ, IRDA_IPR_ADDR, IRDA_IPR_POS, IRDA_PRIORITY);
+ make_ipr_irq(IRDA_ERI_IRQ, IRDA_IPR_ADDR, IRDA_IPR_POS, IRDA_PRIORITY, 0);
+ make_ipr_irq(IRDA_RXI_IRQ, IRDA_IPR_ADDR, IRDA_IPR_POS, IRDA_PRIORITY, 0);
+ make_ipr_irq(IRDA_BRI_IRQ, IRDA_IPR_ADDR, IRDA_IPR_POS, IRDA_PRIORITY, 0);
+ make_ipr_irq(IRDA_TXI_IRQ, IRDA_IPR_ADDR, IRDA_IPR_POS, IRDA_PRIORITY, 0);
#endif
#if defined(CONFIG_CPU_SUBTYPE_SH7707) || defined(CONFIG_CPU_SUBTYPE_SH7709) || \
* You should set corresponding bits of PFC to "00"
* to enable these interrupts.
*/
- make_ipr_irq(IRQ0_IRQ, IRQ0_IPR_ADDR, IRQ0_IPR_POS, IRQ0_PRIORITY);
- make_ipr_irq(IRQ1_IRQ, IRQ1_IPR_ADDR, IRQ1_IPR_POS, IRQ1_PRIORITY);
- make_ipr_irq(IRQ2_IRQ, IRQ2_IPR_ADDR, IRQ2_IPR_POS, IRQ2_PRIORITY);
- make_ipr_irq(IRQ3_IRQ, IRQ3_IPR_ADDR, IRQ3_IPR_POS, IRQ3_PRIORITY);
- make_ipr_irq(IRQ4_IRQ, IRQ4_IPR_ADDR, IRQ4_IPR_POS, IRQ4_PRIORITY);
- make_ipr_irq(IRQ5_IRQ, IRQ5_IPR_ADDR, IRQ5_IPR_POS, IRQ5_PRIORITY);
-#if !defined(CONFIG_CPU_SUBTYPE_SH7300)
- make_ipr_irq(PINT0_IRQ, PINT0_IPR_ADDR, PINT0_IPR_POS, PINT0_PRIORITY);
- make_ipr_irq(PINT8_IRQ, PINT8_IPR_ADDR, PINT8_IPR_POS, PINT8_PRIORITY);
- enable_ipr_irq(PINT0_IRQ);
- enable_ipr_irq(PINT8_IRQ);
+ make_ipr_irq(IRQ0_IRQ, IRQ0_IPR_ADDR, IRQ0_IPR_POS, IRQ0_PRIORITY, 0);
+ make_ipr_irq(IRQ1_IRQ, IRQ1_IPR_ADDR, IRQ1_IPR_POS, IRQ1_PRIORITY, 0);
+ make_ipr_irq(IRQ2_IRQ, IRQ2_IPR_ADDR, IRQ2_IPR_POS, IRQ2_PRIORITY, 0);
+ make_ipr_irq(IRQ3_IRQ, IRQ3_IPR_ADDR, IRQ3_IPR_POS, IRQ3_PRIORITY, 0);
+ make_ipr_irq(IRQ4_IRQ, IRQ4_IPR_ADDR, IRQ4_IPR_POS, IRQ4_PRIORITY, 0);
+ make_ipr_irq(IRQ5_IRQ, IRQ5_IPR_ADDR, IRQ5_IPR_POS, IRQ5_PRIORITY, 0);
+#endif
+#endif
- for(i = 0; i < 16; i++)
- make_pint_irq(PINT_IRQ_BASE + i);
- for(i = 0; i < 256; i++)
- {
- if(i & 1) pint_map[i] = 0;
- else if(i & 2) pint_map[i] = 1;
- else if(i & 4) pint_map[i] = 2;
- else if(i & 8) pint_map[i] = 3;
- else if(i & 0x10) pint_map[i] = 4;
- else if(i & 0x20) pint_map[i] = 5;
- else if(i & 0x40) pint_map[i] = 6;
- else if(i & 0x80) pint_map[i] = 7;
- }
-#endif /* !CONFIG_CPU_SUBTYPE_SH7300 */
-#endif /* CONFIG_CPU_SUBTYPE_SH7707 || CONFIG_CPU_SUBTYPE_SH7709 || CONFIG_CPU_SUBTYPE_SH7300*/
+#ifdef CONFIG_CPU_HAS_PINT_IRQ
+ init_IRQ_pint();
+#endif
-#ifdef CONFIG_CPU_SUBTYPE_ST40
+#ifdef CONFIG_CPU_HAS_INTC2_IRQ
init_IRQ_intc2();
#endif
-
/* Perform the machine specific initialisation */
- if (sh_mv.mv_init_irq != NULL) {
+ if (sh_mv.mv_init_irq != NULL)
sh_mv.mv_init_irq();
- }
}
-#if defined(CONFIG_CPU_SUBTYPE_SH7707) || defined(CONFIG_CPU_SUBTYPE_SH7709) || \
- defined(CONFIG_CPU_SUBTYPE_SH7300) || defined(CONFIG_CPU_SUBTYPE_SH7705)
+
+#if !defined(CONFIG_CPU_HAS_PINT_IRQ)
int ipr_irq_demux(int irq)
{
-#if !defined(CONFIG_CPU_SUBTYPE_SH7300)
- unsigned long creg, dreg, d, sav;
-
- if(irq == PINT0_IRQ)
- {
-#if defined(CONFIG_CPU_SUBTYPE_SH7707)
- creg = PORT_PACR;
- dreg = PORT_PADR;
-#else
- creg = PORT_PCCR;
- dreg = PORT_PCDR;
-#endif
- sav = ctrl_inw(creg);
- ctrl_outw(sav | portcr_mask, creg);
- d = (~ctrl_inb(dreg) ^ ctrl_inw(INTC_ICR2)) & ctrl_inw(INTC_INTER) & 0xff;
- ctrl_outw(sav, creg);
- if(d == 0) return irq;
- return PINT_IRQ_BASE + pint_map[d];
- }
- else if(irq == PINT8_IRQ)
- {
-#if defined(CONFIG_CPU_SUBTYPE_SH7707)
- creg = PORT_PBCR;
- dreg = PORT_PBDR;
-#else
- creg = PORT_PFCR;
- dreg = PORT_PFDR;
-#endif
- sav = ctrl_inw(creg);
- ctrl_outw(sav | (portcr_mask >> 16), creg);
- d = (~ctrl_inb(dreg) ^ (ctrl_inw(INTC_ICR2) >> 8)) & (ctrl_inw(INTC_INTER) >> 8) & 0xff;
- ctrl_outw(sav, creg);
- if(d == 0) return irq;
- return PINT_IRQ_BASE + 8 + pint_map[d];
- }
-#endif
return irq;
}
#endif
EXPORT_SYMBOL(make_ipr_irq);
-
--- /dev/null
+/*
+ * arch/sh/kernel/cpu/irq/pint.c - Interrupt handling for PINT-based IRQs.
+ *
+ * Copyright (C) 1999 Niibe Yutaka & Takeshi Yaegashi
+ * Copyright (C) 2000 Kazumoto Kojima
+ * Copyright (C) 2003 Takashi Kusuda <kusuda-takashi@hitachi-ul.co.jp>
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+
+#include <linux/config.h>
+#include <linux/init.h>
+#include <linux/irq.h>
+#include <linux/module.h>
+
+#include <asm/system.h>
+#include <asm/io.h>
+#include <asm/machvec.h>
+
+static unsigned char pint_map[256];
+static unsigned long portcr_mask;
+
+static void enable_pint_irq(unsigned int irq);
+static void disable_pint_irq(unsigned int irq);
+
+/* shutdown is same as "disable" */
+#define shutdown_pint_irq disable_pint_irq
+
+static void mask_and_ack_pint(unsigned int);
+static void end_pint_irq(unsigned int irq);
+
+static unsigned int startup_pint_irq(unsigned int irq)
+{
+ enable_pint_irq(irq);
+ return 0; /* never anything pending */
+}
+
+static struct hw_interrupt_type pint_irq_type = {
+ .typename = "PINT-IRQ",
+ .startup = startup_pint_irq,
+ .shutdown = shutdown_pint_irq,
+ .enable = enable_pint_irq,
+ .disable = disable_pint_irq,
+ .ack = mask_and_ack_pint,
+ .end = end_pint_irq
+};
+
+static void disable_pint_irq(unsigned int irq)
+{
+ unsigned long val, flags;
+
+ local_irq_save(flags);
+ val = ctrl_inw(INTC_INTER);
+ val &= ~(1 << (irq - PINT_IRQ_BASE));
+ ctrl_outw(val, INTC_INTER); /* disable PINTn */
+ portcr_mask &= ~(3 << (irq - PINT_IRQ_BASE)*2);
+ local_irq_restore(flags);
+}
+
+static void enable_pint_irq(unsigned int irq)
+{
+ unsigned long val, flags;
+
+ local_irq_save(flags);
+ val = ctrl_inw(INTC_INTER);
+ val |= 1 << (irq - PINT_IRQ_BASE);
+ ctrl_outw(val, INTC_INTER); /* enable PINTn */
+ portcr_mask |= 3 << (irq - PINT_IRQ_BASE)*2;
+ local_irq_restore(flags);
+}
+
+static void mask_and_ack_pint(unsigned int irq)
+{
+ disable_pint_irq(irq);
+}
+
+static void end_pint_irq(unsigned int irq)
+{
+ if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
+ enable_pint_irq(irq);
+}
+
+void make_pint_irq(unsigned int irq)
+{
+ disable_irq_nosync(irq);
+ irq_desc[irq].handler = &pint_irq_type;
+ disable_pint_irq(irq);
+}
+
+void __init init_IRQ_pint(void)
+{
+ int i;
+
+ make_ipr_irq(PINT0_IRQ, PINT0_IPR_ADDR, PINT0_IPR_POS, PINT0_PRIORITY);
+ make_ipr_irq(PINT8_IRQ, PINT8_IPR_ADDR, PINT8_IPR_POS, PINT8_PRIORITY);
+
+ enable_irq(PINT0_IRQ);
+ enable_irq(PINT8_IRQ);
+
+ for(i = 0; i < 16; i++)
+ make_pint_irq(PINT_IRQ_BASE + i);
+
+ for(i = 0; i < 256; i++) {
+ if (i & 1)
+ pint_map[i] = 0;
+ else if (i & 2)
+ pint_map[i] = 1;
+ else if (i & 4)
+ pint_map[i] = 2;
+ else if (i & 8)
+ pint_map[i] = 3;
+ else if (i & 0x10)
+ pint_map[i] = 4;
+ else if (i & 0x20)
+ pint_map[i] = 5;
+ else if (i & 0x40)
+ pint_map[i] = 6;
+ else if (i & 0x80)
+ pint_map[i] = 7;
+ }
+}
+
+int ipr_irq_demux(int irq)
+{
+ unsigned long creg, dreg, d, sav;
+
+ if (irq == PINT0_IRQ) {
+#if defined(CONFIG_CPU_SUBTYPE_SH7707)
+ creg = PORT_PACR;
+ dreg = PORT_PADR;
+#else
+ creg = PORT_PCCR;
+ dreg = PORT_PCDR;
+#endif
+ sav = ctrl_inw(creg);
+ ctrl_outw(sav | portcr_mask, creg);
+ d = (~ctrl_inb(dreg) ^ ctrl_inw(INTC_ICR2)) &
+ ctrl_inw(INTC_INTER) & 0xff;
+ ctrl_outw(sav, creg);
+
+ if (d == 0)
+ return irq;
+
+ return PINT_IRQ_BASE + pint_map[d];
+ } else if (irq == PINT8_IRQ) {
+#if defined(CONFIG_CPU_SUBTYPE_SH7707)
+ creg = PORT_PBCR;
+ dreg = PORT_PBDR;
+#else
+ creg = PORT_PFCR;
+ dreg = PORT_PFDR;
+#endif
+ sav = ctrl_inw(creg);
+ ctrl_outw(sav | (portcr_mask >> 16), creg);
+ d = (~ctrl_inb(dreg) ^ (ctrl_inw(INTC_ICR2) >> 8)) &
+ (ctrl_inw(INTC_INTER) >> 8) & 0xff;
+ ctrl_outw(sav, creg);
+
+ if (d == 0)
+ return irq;
+
+ return PINT_IRQ_BASE + 8 + pint_map[d];
+ }
+
+ return irq;
+}
+
obj-y := ex.o probe.o
+clock-$(CONFIG_CPU_SH3) := clock-sh3.o
+clock-$(CONFIG_CPU_SUBTYPE_SH7300) := clock-sh7300.o
+clock-$(CONFIG_CPU_SUBTYPE_SH7705) := clock-sh7705.o
+clock-$(CONFIG_CPU_SUBTYPE_SH7709) := clock-sh7709.o
+
+obj-y += $(clock-y)
+
--- /dev/null
+/*
+ * arch/sh/kernel/cpu/sh3/clock-sh3.c
+ *
+ * Generic SH-3 support for the clock framework
+ *
+ * Copyright (C) 2005 Paul Mundt
+ *
+ * FRQCR parsing hacked out of arch/sh/kernel/time.c
+ *
+ * Copyright (C) 1999 Tetsuya Okada & Niibe Yutaka
+ * Copyright (C) 2000 Philipp Rumpf <prumpf@tux.org>
+ * Copyright (C) 2002, 2003, 2004 Paul Mundt
+ * Copyright (C) 2002 M. R. Brown <mrbrown@linux-sh.org>
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <asm/clock.h>
+#include <asm/freq.h>
+#include <asm/io.h>
+
+static int stc_multipliers[] = { 1, 2, 3, 4, 6, 1, 1, 1 };
+static int ifc_divisors[] = { 1, 2, 3, 4, 1, 1, 1, 1 };
+static int pfc_divisors[] = { 1, 2, 3, 4, 6, 1, 1, 1 };
+
+static void master_clk_init(struct clk *clk)
+{
+ int frqcr = ctrl_inw(FRQCR);
+ int idx = ((frqcr & 0x2000) >> 11) | (frqcr & 0x0003);
+
+ clk->rate *= pfc_divisors[idx];
+}
+
+static struct clk_ops sh3_master_clk_ops = {
+ .init = master_clk_init,
+};
+
+static void module_clk_recalc(struct clk *clk)
+{
+ int frqcr = ctrl_inw(FRQCR);
+ int idx = ((frqcr & 0x2000) >> 11) | (frqcr & 0x0003);
+
+ clk->rate = clk->parent->rate / pfc_divisors[idx];
+}
+
+static struct clk_ops sh3_module_clk_ops = {
+ .recalc = module_clk_recalc,
+};
+
+static void bus_clk_recalc(struct clk *clk)
+{
+ int frqcr = ctrl_inw(FRQCR);
+ int idx = ((frqcr & 0x8000) >> 13) | ((frqcr & 0x0030) >> 4);
+
+ clk->rate = clk->parent->rate / stc_multipliers[idx];
+}
+
+static struct clk_ops sh3_bus_clk_ops = {
+ .recalc = bus_clk_recalc,
+};
+
+static void cpu_clk_recalc(struct clk *clk)
+{
+ int frqcr = ctrl_inw(FRQCR);
+ int idx = ((frqcr & 0x4000) >> 12) | ((frqcr & 0x000c) >> 2);
+
+ clk->rate = clk->parent->rate / ifc_divisors[idx];
+}
+
+static struct clk_ops sh3_cpu_clk_ops = {
+ .recalc = cpu_clk_recalc,
+};
+
+static struct clk_ops *sh3_clk_ops[] = {
+ &sh3_master_clk_ops,
+ &sh3_module_clk_ops,
+ &sh3_bus_clk_ops,
+ &sh3_cpu_clk_ops,
+};
+
+void __init arch_init_clk_ops(struct clk_ops **ops, int idx)
+{
+ if (idx < ARRAY_SIZE(sh3_clk_ops))
+ *ops = sh3_clk_ops[idx];
+}
+
--- /dev/null
+/*
+ * arch/sh/kernel/cpu/sh3/clock-sh7300.c
+ *
+ * SH7300 support for the clock framework
+ *
+ * Copyright (C) 2005 Paul Mundt
+ *
+ * FRQCR parsing hacked out of arch/sh/kernel/time.c
+ *
+ * Copyright (C) 1999 Tetsuya Okada & Niibe Yutaka
+ * Copyright (C) 2000 Philipp Rumpf <prumpf@tux.org>
+ * Copyright (C) 2002, 2003, 2004 Paul Mundt
+ * Copyright (C) 2002 M. R. Brown <mrbrown@linux-sh.org>
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <asm/clock.h>
+#include <asm/freq.h>
+#include <asm/io.h>
+
+static int md_table[] = { 1, 2, 3, 4, 6, 8, 12 };
+
+static void master_clk_init(struct clk *clk)
+{
+ clk->rate *= md_table[ctrl_inw(FRQCR) & 0x0007];
+}
+
+static struct clk_ops sh7300_master_clk_ops = {
+ .init = master_clk_init,
+};
+
+static void module_clk_recalc(struct clk *clk)
+{
+ int idx = (ctrl_inw(FRQCR) & 0x0007);
+ clk->rate = clk->parent->rate / md_table[idx];
+}
+
+static struct clk_ops sh7300_module_clk_ops = {
+ .recalc = module_clk_recalc,
+};
+
+static void bus_clk_recalc(struct clk *clk)
+{
+ int idx = (ctrl_inw(FRQCR) & 0x0700) >> 8;
+ clk->rate = clk->parent->rate / md_table[idx];
+}
+
+static struct clk_ops sh7300_bus_clk_ops = {
+ .recalc = bus_clk_recalc,
+};
+
+static void cpu_clk_recalc(struct clk *clk)
+{
+ int idx = (ctrl_inw(FRQCR) & 0x0070) >> 4;
+ clk->rate = clk->parent->rate / md_table[idx];
+}
+
+static struct clk_ops sh7300_cpu_clk_ops = {
+ .recalc = cpu_clk_recalc,
+};
+
+static struct clk_ops *sh7300_clk_ops[] = {
+ &sh7300_master_clk_ops,
+ &sh7300_module_clk_ops,
+ &sh7300_bus_clk_ops,
+ &sh7300_cpu_clk_ops,
+};
+
+void __init arch_init_clk_ops(struct clk_ops **ops, int idx)
+{
+ if (idx < ARRAY_SIZE(sh7300_clk_ops))
+ *ops = sh7300_clk_ops[idx];
+}
+
--- /dev/null
+/*
+ * arch/sh/kernel/cpu/sh3/clock-sh7705.c
+ *
+ * SH7705 support for the clock framework
+ *
+ * Copyright (C) 2005 Paul Mundt
+ *
+ * FRQCR parsing hacked out of arch/sh/kernel/time.c
+ *
+ * Copyright (C) 1999 Tetsuya Okada & Niibe Yutaka
+ * Copyright (C) 2000 Philipp Rumpf <prumpf@tux.org>
+ * Copyright (C) 2002, 2003, 2004 Paul Mundt
+ * Copyright (C) 2002 M. R. Brown <mrbrown@linux-sh.org>
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <asm/clock.h>
+#include <asm/freq.h>
+#include <asm/io.h>
+
+/*
+ * SH7705 uses the same divisors as the generic SH-3 case, it's just the
+ * FRQCR layout that is a bit different..
+ */
+static int stc_multipliers[] = { 1, 2, 3, 4, 6, 1, 1, 1 };
+static int ifc_divisors[] = { 1, 2, 3, 4, 1, 1, 1, 1 };
+static int pfc_divisors[] = { 1, 2, 3, 4, 6, 1, 1, 1 };
+
+static void master_clk_init(struct clk *clk)
+{
+ clk->rate *= pfc_divisors[ctrl_inw(FRQCR) & 0x0003];
+}
+
+static struct clk_ops sh7705_master_clk_ops = {
+ .init = master_clk_init,
+};
+
+static void module_clk_recalc(struct clk *clk)
+{
+ int idx = ctrl_inw(FRQCR) & 0x0003;
+ clk->rate = clk->parent->rate / pfc_divisors[idx];
+}
+
+static struct clk_ops sh7705_module_clk_ops = {
+ .recalc = module_clk_recalc,
+};
+
+static void bus_clk_recalc(struct clk *clk)
+{
+ int idx = (ctrl_inw(FRQCR) & 0x0300) >> 8;
+ clk->rate = clk->parent->rate / stc_multipliers[idx];
+}
+
+static struct clk_ops sh7705_bus_clk_ops = {
+ .recalc = bus_clk_recalc,
+};
+
+static void cpu_clk_recalc(struct clk *clk)
+{
+ int idx = (ctrl_inw(FRQCR) & 0x0030) >> 4;
+ clk->rate = clk->parent->rate / ifc_divisors[idx];
+}
+
+static struct clk_ops sh7705_cpu_clk_ops = {
+ .recalc = cpu_clk_recalc,
+};
+
+static struct clk_ops *sh7705_clk_ops[] = {
+ &sh7705_master_clk_ops,
+ &sh7705_module_clk_ops,
+ &sh7705_bus_clk_ops,
+ &sh7705_cpu_clk_ops,
+};
+
+void __init arch_init_clk_ops(struct clk_ops **ops, int idx)
+{
+ if (idx < ARRAY_SIZE(sh7705_clk_ops))
+ *ops = sh7705_clk_ops[idx];
+}
+
--- /dev/null
+/*
+ * arch/sh/kernel/cpu/sh3/clock-sh7709.c
+ *
+ * SH7709 support for the clock framework
+ *
+ * Copyright (C) 2005 Andriy Skulysh
+ *
+ * Based on arch/sh/kernel/cpu/sh3/clock-sh7705.c
+ * Copyright (C) 2005 Paul Mundt
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <asm/clock.h>
+#include <asm/freq.h>
+#include <asm/io.h>
+
+static int stc_multipliers[] = { 1, 2, 4, 8, 3, 6, 1, 1 };
+static int ifc_divisors[] = { 1, 2, 4, 1, 3, 1, 1, 1 };
+static int pfc_divisors[] = { 1, 2, 4, 1, 3, 6, 1, 1 };
+
+static void set_bus_parent(struct clk *clk)
+{
+ struct clk *bus_clk = clk_get("bus_clk");
+ clk->parent = bus_clk;
+ clk_put(bus_clk);
+}
+
+static void master_clk_init(struct clk *clk)
+{
+ int frqcr = ctrl_inw(FRQCR);
+ int idx = ((frqcr & 0x2000) >> 11) | (frqcr & 0x0003);
+
+ clk->rate *= pfc_divisors[idx];
+}
+
+static struct clk_ops sh7709_master_clk_ops = {
+ .init = master_clk_init,
+};
+
+static void module_clk_recalc(struct clk *clk)
+{
+ int frqcr = ctrl_inw(FRQCR);
+ int idx = ((frqcr & 0x2000) >> 11) | (frqcr & 0x0003);
+
+ clk->rate = clk->parent->rate / pfc_divisors[idx];
+}
+
+static struct clk_ops sh7709_module_clk_ops = {
+#ifdef CLOCK_MODE_0_1_2_7
+ .init = set_bus_parent,
+#endif
+ .recalc = module_clk_recalc,
+};
+
+static void bus_clk_recalc(struct clk *clk)
+{
+ int frqcr = ctrl_inw(FRQCR);
+ int idx = (frqcr & 0x0080) ?
+ ((frqcr & 0x8000) >> 13) | ((frqcr & 0x0030) >> 4) : 1;
+
+ clk->rate = clk->parent->rate * stc_multipliers[idx];
+}
+
+static struct clk_ops sh7709_bus_clk_ops = {
+ .recalc = bus_clk_recalc,
+};
+
+static void cpu_clk_recalc(struct clk *clk)
+{
+ int frqcr = ctrl_inw(FRQCR);
+ int idx = ((frqcr & 0x4000) >> 12) | ((frqcr & 0x000c) >> 2);
+
+ clk->rate = clk->parent->rate / ifc_divisors[idx];
+}
+
+static struct clk_ops sh7709_cpu_clk_ops = {
+ .init = set_bus_parent,
+ .recalc = cpu_clk_recalc,
+};
+
+static struct clk_ops *sh7709_clk_ops[] = {
+ &sh7709_master_clk_ops,
+ &sh7709_module_clk_ops,
+ &sh7709_bus_clk_ops,
+ &sh7709_cpu_clk_ops,
+};
+
+void __init arch_init_clk_ops(struct clk_ops **ops, int idx)
+{
+ if (idx < ARRAY_SIZE(sh7709_clk_ops))
+ *ops = sh7709_clk_ops[idx];
+}
obj-y := ex.o probe.o
obj-$(CONFIG_SH_FPU) += fpu.o
-obj-$(CONFIG_CPU_SUBTYPE_ST40STB1) += irq_intc2.o
obj-$(CONFIG_SH_STORE_QUEUES) += sq.o
+# Primary on-chip clocks (common)
+clock-$(CONFIG_CPU_SH4) := clock-sh4.o
+clock-$(CONFIG_CPU_SUBTYPE_SH73180) := clock-sh73180.o
+clock-$(CONFIG_CPU_SUBTYPE_SH7770) := clock-sh7770.o
+clock-$(CONFIG_CPU_SUBTYPE_SH7780) := clock-sh7780.o
+
+# Additional clocks by subtype
+clock-$(CONFIG_CPU_SUBTYPE_SH4_202) += clock-sh4-202.o
+
+obj-y += $(clock-y)
--- /dev/null
+/*
+ * arch/sh/kernel/cpu/sh4/clock-sh4-202.c
+ *
+ * Additional SH4-202 support for the clock framework
+ *
+ * Copyright (C) 2005 Paul Mundt
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/err.h>
+#include <asm/clock.h>
+#include <asm/freq.h>
+#include <asm/io.h>
+
+#define CPG2_FRQCR3 0xfe0a0018
+
+static int frqcr3_divisors[] = { 1, 2, 3, 4, 6, 8, 16 };
+static int frqcr3_values[] = { 0, 1, 2, 3, 4, 5, 6 };
+
+static void emi_clk_recalc(struct clk *clk)
+{
+ int idx = ctrl_inl(CPG2_FRQCR3) & 0x0007;
+ clk->rate = clk->parent->rate / frqcr3_divisors[idx];
+}
+
+static inline int frqcr3_lookup(struct clk *clk, unsigned long rate)
+{
+ int divisor = clk->parent->rate / rate;
+ int i;
+
+ for (i = 0; i < ARRAY_SIZE(frqcr3_divisors); i++)
+ if (frqcr3_divisors[i] == divisor)
+ return frqcr3_values[i];
+
+ /* Safe fallback */
+ return 5;
+}
+
+static struct clk_ops sh4202_emi_clk_ops = {
+ .recalc = emi_clk_recalc,
+};
+
+static struct clk sh4202_emi_clk = {
+ .name = "emi_clk",
+ .flags = CLK_ALWAYS_ENABLED,
+ .ops = &sh4202_emi_clk_ops,
+};
+
+static void femi_clk_recalc(struct clk *clk)
+{
+ int idx = (ctrl_inl(CPG2_FRQCR3) >> 3) & 0x0007;
+ clk->rate = clk->parent->rate / frqcr3_divisors[idx];
+}
+
+static struct clk_ops sh4202_femi_clk_ops = {
+ .recalc = femi_clk_recalc,
+};
+
+static struct clk sh4202_femi_clk = {
+ .name = "femi_clk",
+ .flags = CLK_ALWAYS_ENABLED,
+ .ops = &sh4202_femi_clk_ops,
+};
+
+static void shoc_clk_init(struct clk *clk)
+{
+ int i;
+
+ /*
+ * For some reason, the shoc_clk seems to be set to some really
+ * insane value at boot (values outside of the allowable frequency
+ * range for instance). We deal with this by scaling it back down
+ * to something sensible just in case.
+ *
+ * Start scaling from the high end down until we find something
+ * that passes rate verification..
+ */
+ for (i = 0; i < ARRAY_SIZE(frqcr3_divisors); i++) {
+ int divisor = frqcr3_divisors[i];
+
+ if (clk->ops->set_rate(clk, clk->parent->rate / divisor) == 0)
+ break;
+ }
+
+ WARN_ON(i == ARRAY_SIZE(frqcr3_divisors)); /* Undefined clock */
+}
+
+static void shoc_clk_recalc(struct clk *clk)
+{
+ int idx = (ctrl_inl(CPG2_FRQCR3) >> 6) & 0x0007;
+ clk->rate = clk->parent->rate / frqcr3_divisors[idx];
+}
+
+static int shoc_clk_verify_rate(struct clk *clk, unsigned long rate)
+{
+ struct clk *bclk = clk_get("bus_clk");
+ unsigned long bclk_rate = clk_get_rate(bclk);
+
+ clk_put(bclk);
+
+ if (rate > bclk_rate)
+ return 1;
+ if (rate > 66000000)
+ return 1;
+
+ return 0;
+}
+
+static int shoc_clk_set_rate(struct clk *clk, unsigned long rate)
+{
+ unsigned long frqcr3;
+ unsigned int tmp;
+
+ /* Make sure we have something sensible to switch to */
+ if (shoc_clk_verify_rate(clk, rate) != 0)
+ return -EINVAL;
+
+ tmp = frqcr3_lookup(clk, rate);
+
+ frqcr3 = ctrl_inl(CPG2_FRQCR3);
+ frqcr3 &= ~(0x0007 << 6);
+ frqcr3 |= tmp << 6;
+ ctrl_outl(frqcr3, CPG2_FRQCR3);
+
+ clk->rate = clk->parent->rate / frqcr3_divisors[tmp];
+
+ return 0;
+}
+
+static struct clk_ops sh4202_shoc_clk_ops = {
+ .init = shoc_clk_init,
+ .recalc = shoc_clk_recalc,
+ .set_rate = shoc_clk_set_rate,
+};
+
+static struct clk sh4202_shoc_clk = {
+ .name = "shoc_clk",
+ .flags = CLK_ALWAYS_ENABLED,
+ .ops = &sh4202_shoc_clk_ops,
+};
+
+static struct clk *sh4202_onchip_clocks[] = {
+ &sh4202_emi_clk,
+ &sh4202_femi_clk,
+ &sh4202_shoc_clk,
+};
+
+static int __init sh4202_clk_init(void)
+{
+ struct clk *clk = clk_get("master_clk");
+ int i;
+
+ for (i = 0; i < ARRAY_SIZE(sh4202_onchip_clocks); i++) {
+ struct clk *clkp = sh4202_onchip_clocks[i];
+
+ clkp->parent = clk;
+ clk_register(clkp);
+ clk_enable(clkp);
+ }
+
+ /*
+ * Now that we have the rest of the clocks registered, we need to
+ * force the parent clock to propagate so that these clocks will
+ * automatically figure out their rate. We cheat by handing the
+ * parent clock its current rate and forcing child propagation.
+ */
+ clk_set_rate(clk, clk_get_rate(clk));
+
+ clk_put(clk);
+
+ return 0;
+}
+
+arch_initcall(sh4202_clk_init);
+
--- /dev/null
+/*
+ * arch/sh/kernel/cpu/sh4/clock-sh4.c
+ *
+ * Generic SH-4 support for the clock framework
+ *
+ * Copyright (C) 2005 Paul Mundt
+ *
+ * FRQCR parsing hacked out of arch/sh/kernel/time.c
+ *
+ * Copyright (C) 1999 Tetsuya Okada & Niibe Yutaka
+ * Copyright (C) 2000 Philipp Rumpf <prumpf@tux.org>
+ * Copyright (C) 2002, 2003, 2004 Paul Mundt
+ * Copyright (C) 2002 M. R. Brown <mrbrown@linux-sh.org>
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <asm/clock.h>
+#include <asm/freq.h>
+#include <asm/io.h>
+
+static int ifc_divisors[] = { 1, 2, 3, 4, 6, 8, 1, 1 };
+#define bfc_divisors ifc_divisors /* Same */
+static int pfc_divisors[] = { 2, 3, 4, 6, 8, 2, 2, 2 };
+
+static void master_clk_init(struct clk *clk)
+{
+ clk->rate *= pfc_divisors[ctrl_inw(FRQCR) & 0x0007];
+}
+
+static struct clk_ops sh4_master_clk_ops = {
+ .init = master_clk_init,
+};
+
+static void module_clk_recalc(struct clk *clk)
+{
+ int idx = (ctrl_inw(FRQCR) & 0x0007);
+ clk->rate = clk->parent->rate / pfc_divisors[idx];
+}
+
+static struct clk_ops sh4_module_clk_ops = {
+ .recalc = module_clk_recalc,
+};
+
+static void bus_clk_recalc(struct clk *clk)
+{
+ int idx = (ctrl_inw(FRQCR) >> 3) & 0x0007;
+ clk->rate = clk->parent->rate / bfc_divisors[idx];
+}
+
+static struct clk_ops sh4_bus_clk_ops = {
+ .recalc = bus_clk_recalc,
+};
+
+static void cpu_clk_recalc(struct clk *clk)
+{
+ int idx = (ctrl_inw(FRQCR) >> 6) & 0x0007;
+ clk->rate = clk->parent->rate / ifc_divisors[idx];
+}
+
+static struct clk_ops sh4_cpu_clk_ops = {
+ .recalc = cpu_clk_recalc,
+};
+
+static struct clk_ops *sh4_clk_ops[] = {
+ &sh4_master_clk_ops,
+ &sh4_module_clk_ops,
+ &sh4_bus_clk_ops,
+ &sh4_cpu_clk_ops,
+};
+
+void __init arch_init_clk_ops(struct clk_ops **ops, int idx)
+{
+ if (idx < ARRAY_SIZE(sh4_clk_ops))
+ *ops = sh4_clk_ops[idx];
+}
+
--- /dev/null
+/*
+ * arch/sh/kernel/cpu/sh4/clock-sh73180.c
+ *
+ * SH73180 support for the clock framework
+ *
+ * Copyright (C) 2005 Paul Mundt
+ *
+ * FRQCR parsing hacked out of arch/sh/kernel/time.c
+ *
+ * Copyright (C) 1999 Tetsuya Okada & Niibe Yutaka
+ * Copyright (C) 2000 Philipp Rumpf <prumpf@tux.org>
+ * Copyright (C) 2002, 2003, 2004 Paul Mundt
+ * Copyright (C) 2002 M. R. Brown <mrbrown@linux-sh.org>
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <asm/clock.h>
+#include <asm/freq.h>
+#include <asm/io.h>
+
+/*
+ * SH73180 uses a common set of divisors, so this is quite simple..
+ */
+static int divisors[] = { 1, 2, 3, 4, 6, 8, 12, 16 };
+
+static void master_clk_init(struct clk *clk)
+{
+ clk->rate *= divisors[ctrl_inl(FRQCR) & 0x0007];
+}
+
+static struct clk_ops sh73180_master_clk_ops = {
+ .init = master_clk_init,
+};
+
+static void module_clk_recalc(struct clk *clk)
+{
+ int idx = (ctrl_inl(FRQCR) & 0x0007);
+ clk->rate = clk->parent->rate / divisors[idx];
+}
+
+static struct clk_ops sh73180_module_clk_ops = {
+ .recalc = module_clk_recalc,
+};
+
+static void bus_clk_recalc(struct clk *clk)
+{
+ int idx = (ctrl_inl(FRQCR) >> 12) & 0x0007;
+ clk->rate = clk->parent->rate / divisors[idx];
+}
+
+static struct clk_ops sh73180_bus_clk_ops = {
+ .recalc = bus_clk_recalc,
+};
+
+static void cpu_clk_recalc(struct clk *clk)
+{
+ int idx = (ctrl_inl(FRQCR) >> 20) & 0x0007;
+ clk->rate = clk->parent->rate / divisors[idx];
+}
+
+static struct clk_ops sh73180_cpu_clk_ops = {
+ .recalc = cpu_clk_recalc,
+};
+
+static struct clk_ops *sh73180_clk_ops[] = {
+ &sh73180_master_clk_ops,
+ &sh73180_module_clk_ops,
+ &sh73180_bus_clk_ops,
+ &sh73180_cpu_clk_ops,
+};
+
+void __init arch_init_clk_ops(struct clk_ops **ops, int idx)
+{
+ if (idx < ARRAY_SIZE(sh73180_clk_ops))
+ *ops = sh73180_clk_ops[idx];
+}
+
--- /dev/null
+/*
+ * arch/sh/kernel/cpu/sh4/clock-sh7770.c
+ *
+ * SH7770 support for the clock framework
+ *
+ * Copyright (C) 2005 Paul Mundt
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <asm/clock.h>
+#include <asm/freq.h>
+#include <asm/io.h>
+
+static int ifc_divisors[] = { 1, 1, 1, 1, 1, 1, 1, 1 };
+static int bfc_divisors[] = { 1, 1, 1, 1, 1, 8,12, 1 };
+static int pfc_divisors[] = { 1, 8, 1,10,12,16, 1, 1 };
+
+static void master_clk_init(struct clk *clk)
+{
+ clk->rate *= pfc_divisors[(ctrl_inl(FRQCR) >> 28) & 0x000f];
+}
+
+static struct clk_ops sh7770_master_clk_ops = {
+ .init = master_clk_init,
+};
+
+static void module_clk_recalc(struct clk *clk)
+{
+ int idx = ((ctrl_inl(FRQCR) >> 28) & 0x000f);
+ clk->rate = clk->parent->rate / pfc_divisors[idx];
+}
+
+static struct clk_ops sh7770_module_clk_ops = {
+ .recalc = module_clk_recalc,
+};
+
+static void bus_clk_recalc(struct clk *clk)
+{
+ int idx = (ctrl_inl(FRQCR) & 0x000f);
+ clk->rate = clk->parent->rate / bfc_divisors[idx];
+}
+
+static struct clk_ops sh7770_bus_clk_ops = {
+ .recalc = bus_clk_recalc,
+};
+
+static void cpu_clk_recalc(struct clk *clk)
+{
+ int idx = ((ctrl_inl(FRQCR) >> 24) & 0x000f);
+ clk->rate = clk->parent->rate / ifc_divisors[idx];
+}
+
+static struct clk_ops sh7770_cpu_clk_ops = {
+ .recalc = cpu_clk_recalc,
+};
+
+static struct clk_ops *sh7770_clk_ops[] = {
+ &sh7770_master_clk_ops,
+ &sh7770_module_clk_ops,
+ &sh7770_bus_clk_ops,
+ &sh7770_cpu_clk_ops,
+};
+
+void __init arch_init_clk_ops(struct clk_ops **ops, int idx)
+{
+ if (idx < ARRAY_SIZE(sh7770_clk_ops))
+ *ops = sh7770_clk_ops[idx];
+}
+
--- /dev/null
+/*
+ * arch/sh/kernel/cpu/sh4/clock-sh7780.c
+ *
+ * SH7780 support for the clock framework
+ *
+ * Copyright (C) 2005 Paul Mundt
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <asm/clock.h>
+#include <asm/freq.h>
+#include <asm/io.h>
+
+static int ifc_divisors[] = { 2, 4 };
+static int bfc_divisors[] = { 1, 1, 1, 8, 12, 16, 24, 1 };
+static int pfc_divisors[] = { 1, 24, 24, 1 };
+static int cfc_divisors[] = { 1, 1, 4, 1, 6, 1, 1, 1 };
+
+static void master_clk_init(struct clk *clk)
+{
+ clk->rate *= pfc_divisors[ctrl_inl(FRQCR) & 0x0003];
+}
+
+static struct clk_ops sh7780_master_clk_ops = {
+ .init = master_clk_init,
+};
+
+static void module_clk_recalc(struct clk *clk)
+{
+ int idx = (ctrl_inl(FRQCR) & 0x0003);
+ clk->rate = clk->parent->rate / pfc_divisors[idx];
+}
+
+static struct clk_ops sh7780_module_clk_ops = {
+ .recalc = module_clk_recalc,
+};
+
+static void bus_clk_recalc(struct clk *clk)
+{
+ int idx = ((ctrl_inl(FRQCR) >> 16) & 0x0007);
+ clk->rate = clk->parent->rate / bfc_divisors[idx];
+}
+
+static struct clk_ops sh7780_bus_clk_ops = {
+ .recalc = bus_clk_recalc,
+};
+
+static void cpu_clk_recalc(struct clk *clk)
+{
+ int idx = ((ctrl_inl(FRQCR) >> 24) & 0x0001);
+ clk->rate = clk->parent->rate / ifc_divisors[idx];
+}
+
+static struct clk_ops sh7780_cpu_clk_ops = {
+ .recalc = cpu_clk_recalc,
+};
+
+static struct clk_ops *sh7780_clk_ops[] = {
+ &sh7780_master_clk_ops,
+ &sh7780_module_clk_ops,
+ &sh7780_bus_clk_ops,
+ &sh7780_cpu_clk_ops,
+};
+
+void __init arch_init_clk_ops(struct clk_ops **ops, int idx)
+{
+ if (idx < ARRAY_SIZE(sh7780_clk_ops))
+ *ops = sh7780_clk_ops[idx];
+}
+
+static void shyway_clk_recalc(struct clk *clk)
+{
+ int idx = ((ctrl_inl(FRQCR) >> 20) & 0x0007);
+ clk->rate = clk->parent->rate / cfc_divisors[idx];
+}
+
+static struct clk_ops sh7780_shyway_clk_ops = {
+ .recalc = shyway_clk_recalc,
+};
+
+static struct clk sh7780_shyway_clk = {
+ .name = "shyway_clk",
+ .flags = CLK_ALWAYS_ENABLED,
+ .ops = &sh7780_shyway_clk_ops,
+};
+
+/*
+ * Additional SH7780-specific on-chip clocks that aren't already part of the
+ * clock framework
+ */
+static struct clk *sh7780_onchip_clocks[] = {
+ &sh7780_shyway_clk,
+};
+
+static int __init sh7780_clk_init(void)
+{
+ struct clk *clk = clk_get("master_clk");
+ int i;
+
+ for (i = 0; i < ARRAY_SIZE(sh7780_onchip_clocks); i++) {
+ struct clk *clkp = sh7780_onchip_clocks[i];
+
+ clkp->parent = clk;
+ clk_register(clkp);
+ clk_enable(clkp);
+ }
+
+ /*
+ * Now that we have the rest of the clocks registered, we need to
+ * force the parent clock to propagate so that these clocks will
+ * automatically figure out their rate. We cheat by handing the
+ * parent clock its current rate and forcing child propagation.
+ */
+ clk_set_rate(clk, clk_get_rate(clk));
+
+ clk_put(clk);
+
+ return 0;
+}
+
+arch_initcall(sh7780_clk_init);
+
+++ /dev/null
-/*
- * linux/arch/sh/kernel/irq_intc2.c
- *
- * Copyright (C) 2001 David J. Mckay (david.mckay@st.com)
- *
- * May be copied or modified under the terms of the GNU General Public
- * License. See linux/COPYING for more information.
- *
- * Interrupt handling for INTC2-based IRQ.
- *
- * These are the "new Hitachi style" interrupts, as present on the
- * Hitachi 7751 and the STM ST40 STB1.
- */
-
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/irq.h>
-
-#include <asm/system.h>
-#include <asm/io.h>
-#include <asm/machvec.h>
-
-
-struct intc2_data {
- unsigned char msk_offset;
- unsigned char msk_shift;
-#ifdef CONFIG_CPU_SUBTYPE_ST40
- int (*clear_irq) (int);
-#endif
-};
-
-
-static struct intc2_data intc2_data[NR_INTC2_IRQS];
-
-static void enable_intc2_irq(unsigned int irq);
-static void disable_intc2_irq(unsigned int irq);
-
-/* shutdown is same as "disable" */
-#define shutdown_intc2_irq disable_intc2_irq
-
-static void mask_and_ack_intc2(unsigned int);
-static void end_intc2_irq(unsigned int irq);
-
-static unsigned int startup_intc2_irq(unsigned int irq)
-{
- enable_intc2_irq(irq);
- return 0; /* never anything pending */
-}
-
-static struct hw_interrupt_type intc2_irq_type = {
- .typename = "INTC2-IRQ",
- .startup = startup_intc2_irq,
- .shutdown = shutdown_intc2_irq,
- .enable = enable_intc2_irq,
- .disable = disable_intc2_irq,
- .ack = mask_and_ack_intc2,
- .end = end_intc2_irq
-};
-
-static void disable_intc2_irq(unsigned int irq)
-{
- int irq_offset = irq - INTC2_FIRST_IRQ;
- int msk_shift, msk_offset;
-
- // Sanity check
- if((irq_offset<0) || (irq_offset>=NR_INTC2_IRQS))
- return;
-
- msk_shift = intc2_data[irq_offset].msk_shift;
- msk_offset = intc2_data[irq_offset].msk_offset;
-
- ctrl_outl(1<<msk_shift,
- INTC2_BASE+INTC2_INTMSK_OFFSET+msk_offset);
-}
-
-static void enable_intc2_irq(unsigned int irq)
-{
- int irq_offset = irq - INTC2_FIRST_IRQ;
- int msk_shift, msk_offset;
-
- /* Sanity check */
- if((irq_offset<0) || (irq_offset>=NR_INTC2_IRQS))
- return;
-
- msk_shift = intc2_data[irq_offset].msk_shift;
- msk_offset = intc2_data[irq_offset].msk_offset;
-
- ctrl_outl(1<<msk_shift,
- INTC2_BASE+INTC2_INTMSKCLR_OFFSET+msk_offset);
-}
-
-static void mask_and_ack_intc2(unsigned int irq)
-{
- disable_intc2_irq(irq);
-}
-
-static void end_intc2_irq(unsigned int irq)
-{
- if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
- enable_intc2_irq(irq);
-
-#ifdef CONFIG_CPU_SUBTYPE_ST40
- if (intc2_data[irq - INTC2_FIRST_IRQ].clear_irq)
- intc2_data[irq - INTC2_FIRST_IRQ].clear_irq (irq);
-#endif
-}
-
-/*
- * Setup an INTC2 style interrupt.
- * NOTE: Unlike IPR interrupts, parameters are not shifted by this code,
- * allowing the use of the numbers straight out of the datasheet.
- * For example:
- * PIO1 which is INTPRI00[19,16] and INTMSK00[13]
- * would be: ^ ^ ^ ^
- * | | | |
- * make_intc2_irq(84, 0, 16, 0, 13);
- */
-void make_intc2_irq(unsigned int irq,
- unsigned int ipr_offset, unsigned int ipr_shift,
- unsigned int msk_offset, unsigned int msk_shift,
- unsigned int priority)
-{
- int irq_offset = irq - INTC2_FIRST_IRQ;
- unsigned int flags;
- unsigned long ipr;
-
- if((irq_offset<0) || (irq_offset>=NR_INTC2_IRQS))
- return;
-
- disable_irq_nosync(irq);
-
- /* Fill the data we need */
- intc2_data[irq_offset].msk_offset = msk_offset;
- intc2_data[irq_offset].msk_shift = msk_shift;
-#ifdef CONFIG_CPU_SUBTYPE_ST40
- intc2_data[irq_offset].clear_irq = NULL;
-#endif
-
- /* Set the priority level */
- local_irq_save(flags);
-
- ipr=ctrl_inl(INTC2_BASE+INTC2_INTPRI_OFFSET+ipr_offset);
- ipr&=~(0xf<<ipr_shift);
- ipr|=(priority)<<ipr_shift;
- ctrl_outl(ipr, INTC2_BASE+INTC2_INTPRI_OFFSET+ipr_offset);
-
- local_irq_restore(flags);
-
- irq_desc[irq].handler=&intc2_irq_type;
-
- disable_intc2_irq(irq);
-}
-
-#ifdef CONFIG_CPU_SUBTYPE_ST40
-
-struct intc2_init {
- unsigned short irq;
- unsigned char ipr_offset, ipr_shift;
- unsigned char msk_offset, msk_shift;
-};
-
-static struct intc2_init intc2_init_data[] __initdata = {
- {64, 0, 0, 0, 0}, /* PCI serr */
- {65, 0, 4, 0, 1}, /* PCI err */
- {66, 0, 4, 0, 2}, /* PCI ad */
- {67, 0, 4, 0, 3}, /* PCI pwd down */
- {72, 0, 8, 0, 5}, /* DMAC INT0 */
- {73, 0, 8, 0, 6}, /* DMAC INT1 */
- {74, 0, 8, 0, 7}, /* DMAC INT2 */
- {75, 0, 8, 0, 8}, /* DMAC INT3 */
- {76, 0, 8, 0, 9}, /* DMAC INT4 */
- {78, 0, 8, 0, 11}, /* DMAC ERR */
- {80, 0, 12, 0, 12}, /* PIO0 */
- {84, 0, 16, 0, 13}, /* PIO1 */
- {88, 0, 20, 0, 14}, /* PIO2 */
- {112, 4, 0, 4, 0}, /* Mailbox */
-#ifdef CONFIG_CPU_SUBTYPE_ST40GX1
- {116, 4, 4, 4, 4}, /* SSC0 */
- {120, 4, 8, 4, 8}, /* IR Blaster */
- {124, 4, 12, 4, 12}, /* USB host */
- {128, 4, 16, 4, 16}, /* Video processor BLITTER */
- {132, 4, 20, 4, 20}, /* UART0 */
- {134, 4, 20, 4, 22}, /* UART2 */
- {136, 4, 24, 4, 24}, /* IO_PIO0 */
- {140, 4, 28, 4, 28}, /* EMPI */
- {144, 8, 0, 8, 0}, /* MAFE */
- {148, 8, 4, 8, 4}, /* PWM */
- {152, 8, 8, 8, 8}, /* SSC1 */
- {156, 8, 12, 8, 12}, /* IO_PIO1 */
- {160, 8, 16, 8, 16}, /* USB target */
- {164, 8, 20, 8, 20}, /* UART1 */
- {168, 8, 24, 8, 24}, /* Teletext */
- {172, 8, 28, 8, 28}, /* VideoSync VTG */
- {173, 8, 28, 8, 29}, /* VideoSync DVP0 */
- {174, 8, 28, 8, 30}, /* VideoSync DVP1 */
-#endif
-};
-
-void __init init_IRQ_intc2(void)
-{
- struct intc2_init *p;
-
- printk(KERN_ALERT "init_IRQ_intc2\n");
-
- for (p = intc2_init_data;
- p<intc2_init_data+ARRAY_SIZE(intc2_init_data);
- p++) {
- make_intc2_irq(p->irq, p->ipr_offset, p->ipr_shift,
- p-> msk_offset, p->msk_shift, 13);
- }
-}
-
-/* Adds a termination callback to the interrupt */
-void intc2_add_clear_irq(int irq, int (*fn)(int))
-{
- if (irq < INTC2_FIRST_IRQ)
- return;
-
- intc2_data[irq - INTC2_FIRST_IRQ].clear_irq = fn;
-}
-
-#endif /* CONFIG_CPU_SUBTYPE_ST40 */
* linux/arch/sh/kernel/io.c
*
* Copyright (C) 2000 Stuart Menefy
+ * Copyright (C) 2005 Paul Mundt
*
* Provide real functions which expand to whatever the header file defined.
* Also definitions of machine independent IO functions.
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
*/
-
-#include <asm/io.h>
#include <linux/module.h>
+#include <asm/machvec.h>
+#include <asm/io.h>
/*
* Copy data from IO memory space to "real" memory space.
* This needs to be optimized.
*/
-void memcpy_fromio(void * to, unsigned long from, unsigned long count)
+void memcpy_fromio(void *to, volatile void __iomem *from, unsigned long count)
{
char *p = to;
while (count) {
count--;
- *p = readb(from);
+ *p = readb((void __iomem *)from);
p++;
from++;
}
}
-
+EXPORT_SYMBOL(memcpy_fromio);
+
/*
* Copy data from "real" memory space to IO memory space.
* This needs to be optimized.
*/
-void memcpy_toio(unsigned long to, const void * from, unsigned long count)
+void memcpy_toio(volatile void __iomem *to, const void *from, unsigned long count)
{
const char *p = from;
while (count) {
count--;
- writeb(*p, to);
+ writeb(*p, (void __iomem *)to);
p++;
to++;
}
}
-
+EXPORT_SYMBOL(memcpy_toio);
+
/*
* "memset" on IO memory space.
* This needs to be optimized.
*/
-void memset_io(unsigned long dst, int c, unsigned long count)
+void memset_io(volatile void __iomem *dst, int c, unsigned long count)
{
while (count) {
count--;
- writeb(c, dst);
+ writeb(c, (void __iomem *)dst);
dst++;
}
}
-
-EXPORT_SYMBOL(memcpy_fromio);
-EXPORT_SYMBOL(memcpy_toio);
EXPORT_SYMBOL(memset_io);
+void __iomem *ioport_map(unsigned long port, unsigned int nr)
+{
+ return sh_mv.mv_ioport_map(port, nr);
+}
+EXPORT_SYMBOL(ioport_map);
+
+void ioport_unmap(void __iomem *addr)
+{
+ sh_mv.mv_ioport_unmap(addr);
+}
+EXPORT_SYMBOL(ioport_unmap);
* linux/arch/sh/kernel/io_generic.c
*
* Copyright (C) 2000 Niibe Yutaka
+ * Copyright (C) 2005 Paul Mundt
*
* Generic I/O routine. These can be used where a machine specific version
* is not required.
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
- *
*/
-
+#include <linux/module.h>
#include <asm/io.h>
#include <asm/machvec.h>
-#include <linux/module.h>
-#if defined(CONFIG_CPU_SH3)
+#ifdef CONFIG_CPU_SH3
+/* SH3 has a PCMCIA bug that needs a dummy read from area 6 for a
+ * workaround. */
/* I'm not sure SH7709 has this kind of bug */
-#define SH3_PCMCIA_BUG_WORKAROUND 1
-#define DUMMY_READ_AREA6 0xba000000
+#define dummy_read() ctrl_inb(0xba000000)
+#else
+#define dummy_read()
#endif
-#define PORT2ADDR(x) (sh_mv.mv_isa_port2addr(x))
-
unsigned long generic_io_base;
static inline void delay(void)
ctrl_inw(0xa0000000);
}
-unsigned char generic_inb(unsigned long port)
+u8 generic_inb(unsigned long port)
{
- return *(volatile unsigned char*)PORT2ADDR(port);
+ return ctrl_inb((unsigned long __force)ioport_map(port, 1));
}
-unsigned short generic_inw(unsigned long port)
+u16 generic_inw(unsigned long port)
{
- return *(volatile unsigned short*)PORT2ADDR(port);
+ return ctrl_inw((unsigned long __force)ioport_map(port, 2));
}
-unsigned int generic_inl(unsigned long port)
+u32 generic_inl(unsigned long port)
{
- return *(volatile unsigned long*)PORT2ADDR(port);
+ return ctrl_inl((unsigned long __force)ioport_map(port, 4));
}
-unsigned char generic_inb_p(unsigned long port)
+u8 generic_inb_p(unsigned long port)
{
- unsigned long v = *(volatile unsigned char*)PORT2ADDR(port);
+ unsigned long v = generic_inb(port);
delay();
return v;
}
-unsigned short generic_inw_p(unsigned long port)
+u16 generic_inw_p(unsigned long port)
{
- unsigned long v = *(volatile unsigned short*)PORT2ADDR(port);
+ unsigned long v = generic_inw(port);
delay();
return v;
}
-unsigned int generic_inl_p(unsigned long port)
+u32 generic_inl_p(unsigned long port)
{
- unsigned long v = *(volatile unsigned long*)PORT2ADDR(port);
+ unsigned long v = generic_inl(port);
delay();
return v;
* convert the port address to real address once.
*/
-void generic_insb(unsigned long port, void *buffer, unsigned long count)
+void generic_insb(unsigned long port, void *dst, unsigned long count)
{
- volatile unsigned char *port_addr;
- unsigned char *buf=buffer;
-
- port_addr = (volatile unsigned char *)PORT2ADDR(port);
+ volatile u8 *port_addr;
+ u8 *buf = dst;
- while(count--)
- *buf++ = *port_addr;
+ port_addr = (volatile u8 *)ioport_map(port, 1);
+ while (count--)
+ *buf++ = *port_addr;
}
-void generic_insw(unsigned long port, void *buffer, unsigned long count)
+void generic_insw(unsigned long port, void *dst, unsigned long count)
{
- volatile unsigned short *port_addr;
- unsigned short *buf=buffer;
+ volatile u16 *port_addr;
+ u16 *buf = dst;
- port_addr = (volatile unsigned short *)PORT2ADDR(port);
+ port_addr = (volatile u16 *)ioport_map(port, 2);
+ while (count--)
+ *buf++ = *port_addr;
- while(count--)
- *buf++ = *port_addr;
-#ifdef SH3_PCMCIA_BUG_WORKAROUND
- ctrl_inb (DUMMY_READ_AREA6);
-#endif
+ dummy_read();
}
-void generic_insl(unsigned long port, void *buffer, unsigned long count)
+void generic_insl(unsigned long port, void *dst, unsigned long count)
{
- volatile unsigned long *port_addr;
- unsigned long *buf=buffer;
+ volatile u32 *port_addr;
+ u32 *buf = dst;
- port_addr = (volatile unsigned long *)PORT2ADDR(port);
+ port_addr = (volatile u32 *)ioport_map(port, 4);
+ while (count--)
+ *buf++ = *port_addr;
- while(count--)
- *buf++ = *port_addr;
-#ifdef SH3_PCMCIA_BUG_WORKAROUND
- ctrl_inb (DUMMY_READ_AREA6);
-#endif
+ dummy_read();
}
-void generic_outb(unsigned char b, unsigned long port)
+void generic_outb(u8 b, unsigned long port)
{
- *(volatile unsigned char*)PORT2ADDR(port) = b;
+ ctrl_outb(b, (unsigned long __force)ioport_map(port, 1));
}
-void generic_outw(unsigned short b, unsigned long port)
+void generic_outw(u16 b, unsigned long port)
{
- *(volatile unsigned short*)PORT2ADDR(port) = b;
+ ctrl_outw(b, (unsigned long __force)ioport_map(port, 2));
}
-void generic_outl(unsigned int b, unsigned long port)
+void generic_outl(u32 b, unsigned long port)
{
- *(volatile unsigned long*)PORT2ADDR(port) = b;
+ ctrl_outl(b, (unsigned long __force)ioport_map(port, 4));
}
-void generic_outb_p(unsigned char b, unsigned long port)
+void generic_outb_p(u8 b, unsigned long port)
{
- *(volatile unsigned char*)PORT2ADDR(port) = b;
+ generic_outb(b, port);
delay();
}
-void generic_outw_p(unsigned short b, unsigned long port)
+void generic_outw_p(u16 b, unsigned long port)
{
- *(volatile unsigned short*)PORT2ADDR(port) = b;
+ generic_outw(b, port);
delay();
}
-void generic_outl_p(unsigned int b, unsigned long port)
+void generic_outl_p(u32 b, unsigned long port)
{
- *(volatile unsigned long*)PORT2ADDR(port) = b;
+ generic_outl(b, port);
delay();
}
* address. However as the port address doesn't change we only need to
* convert the port address to real address once.
*/
-
-void generic_outsb(unsigned long port, const void *buffer, unsigned long count)
+void generic_outsb(unsigned long port, const void *src, unsigned long count)
{
- volatile unsigned char *port_addr;
- const unsigned char *buf=buffer;
+ volatile u8 *port_addr;
+ const u8 *buf = src;
- port_addr = (volatile unsigned char *)PORT2ADDR(port);
+ port_addr = (volatile u8 __force *)ioport_map(port, 1);
- while(count--)
- *port_addr = *buf++;
+ while (count--)
+ *port_addr = *buf++;
}
-void generic_outsw(unsigned long port, const void *buffer, unsigned long count)
+void generic_outsw(unsigned long port, const void *src, unsigned long count)
{
- volatile unsigned short *port_addr;
- const unsigned short *buf=buffer;
+ volatile u16 *port_addr;
+ const u16 *buf = src;
- port_addr = (volatile unsigned short *)PORT2ADDR(port);
+ port_addr = (volatile u16 __force *)ioport_map(port, 2);
- while(count--)
- *port_addr = *buf++;
+ while (count--)
+ *port_addr = *buf++;
-#ifdef SH3_PCMCIA_BUG_WORKAROUND
- ctrl_inb (DUMMY_READ_AREA6);
-#endif
+ dummy_read();
}
-void generic_outsl(unsigned long port, const void *buffer, unsigned long count)
+void generic_outsl(unsigned long port, const void *src, unsigned long count)
{
- volatile unsigned long *port_addr;
- const unsigned long *buf=buffer;
+ volatile u32 *port_addr;
+ const u32 *buf = src;
- port_addr = (volatile unsigned long *)PORT2ADDR(port);
+ port_addr = (volatile u32 __force *)ioport_map(port, 4);
+ while (count--)
+ *port_addr = *buf++;
- while(count--)
- *port_addr = *buf++;
-
-#ifdef SH3_PCMCIA_BUG_WORKAROUND
- ctrl_inb (DUMMY_READ_AREA6);
-#endif
-}
-
-unsigned char generic_readb(unsigned long addr)
-{
- return *(volatile unsigned char*)addr;
+ dummy_read();
}
-unsigned short generic_readw(unsigned long addr)
+u8 generic_readb(void __iomem *addr)
{
- return *(volatile unsigned short*)addr;
+ return ctrl_inb((unsigned long __force)addr);
}
-unsigned int generic_readl(unsigned long addr)
+u16 generic_readw(void __iomem *addr)
{
- return *(volatile unsigned long*)addr;
+ return ctrl_inw((unsigned long __force)addr);
}
-void generic_writeb(unsigned char b, unsigned long addr)
+u32 generic_readl(void __iomem *addr)
{
- *(volatile unsigned char*)addr = b;
+ return ctrl_inl((unsigned long __force)addr);
}
-void generic_writew(unsigned short b, unsigned long addr)
+void generic_writeb(u8 b, void __iomem *addr)
{
- *(volatile unsigned short*)addr = b;
+ ctrl_outb(b, (unsigned long __force)addr);
}
-void generic_writel(unsigned int b, unsigned long addr)
+void generic_writew(u16 b, void __iomem *addr)
{
- *(volatile unsigned long*)addr = b;
+ ctrl_outw(b, (unsigned long __force)addr);
}
-void * generic_ioremap(unsigned long offset, unsigned long size)
+void generic_writel(u32 b, void __iomem *addr)
{
- return (void *) P2SEGADDR(offset);
+ ctrl_outl(b, (unsigned long __force)addr);
}
-EXPORT_SYMBOL(generic_ioremap);
-void generic_iounmap(void *addr)
+void __iomem *generic_ioport_map(unsigned long addr, unsigned int size)
{
+ return (void __iomem *)(addr + generic_io_base);
}
-EXPORT_SYMBOL(generic_iounmap);
-unsigned long generic_isa_port2addr(unsigned long offset)
+void generic_ioport_unmap(void __iomem *addr)
{
- return offset + generic_io_base;
}
* SuperH version: Copyright (C) 1999 Niibe Yutaka
*/
-/*
- * IRQs are in fact implemented a bit like signal handlers for the kernel.
- * Naturally it's not a 1:1 relation, but there are similarities.
- */
-
-#include <linux/config.h>
-#include <linux/module.h>
-#include <linux/ptrace.h>
-#include <linux/errno.h>
-#include <linux/kernel_stat.h>
-#include <linux/signal.h>
-#include <linux/sched.h>
-#include <linux/ioport.h>
+#include <linux/irq.h>
#include <linux/interrupt.h>
-#include <linux/timex.h>
-#include <linux/mm.h>
-#include <linux/slab.h>
-#include <linux/random.h>
-#include <linux/smp.h>
-#include <linux/smp_lock.h>
-#include <linux/init.h>
+#include <linux/kernel_stat.h>
#include <linux/seq_file.h>
-#include <linux/kallsyms.h>
-#include <linux/bitops.h>
-
-#include <asm/system.h>
-#include <asm/io.h>
-#include <asm/pgalloc.h>
-#include <asm/delay.h>
#include <asm/irq.h>
-#include <linux/irq.h>
-
+#include <asm/processor.h>
+#include <asm/cpu/mmu_context.h>
/*
* 'what should we do if we get a hw irq event on an illegal vector'.
seq_putc(p, '\n');
}
- if (i < ACTUAL_NR_IRQS) {
+ if (i < NR_IRQS) {
spin_lock_irqsave(&irq_desc[i].lock, flags);
action = irq_desc[i].action;
if (!action)
}
#endif
+
asmlinkage int do_IRQ(unsigned long r4, unsigned long r5,
unsigned long r6, unsigned long r7,
struct pt_regs regs)
-{
- int irq;
+{
+ int irq = r4;
irq_enter();
- asm volatile("stc r2_bank, %0\n\t"
- "shlr2 %0\n\t"
- "shlr2 %0\n\t"
- "shlr %0\n\t"
- "add #-16, %0\n\t"
- :"=z" (irq));
+
+#ifdef CONFIG_CPU_HAS_INTEVT
+ __asm__ __volatile__ (
+#ifdef CONFIG_CPU_HAS_SR_RB
+ "stc r2_bank, %0\n\t"
+#else
+ "mov.l @%1, %0\n\t"
+#endif
+ "shlr2 %0\n\t"
+ "shlr2 %0\n\t"
+ "shlr %0\n\t"
+ "add #-16, %0\n\t"
+ : "=z" (irq), "=r" (r4)
+ : "1" (INTEVT)
+ : "memory"
+ );
+#endif
+
irq = irq_demux(irq);
__do_IRQ(irq, ®s);
irq_exit();
--- /dev/null
+/*
+ * machine_kexec.c - handle transition of Linux booting another kernel
+ * Copyright (C) 2002-2003 Eric Biederman <ebiederm@xmission.com>
+ *
+ * GameCube/ppc32 port Copyright (C) 2004 Albert Herranz
+ * LANDISK/sh4 supported by kogiidena
+ *
+ * This source code is licensed under the GNU General Public License,
+ * Version 2. See the file COPYING for more details.
+ */
+
+#include <linux/mm.h>
+#include <linux/kexec.h>
+#include <linux/delay.h>
+#include <linux/reboot.h>
+#include <asm/pgtable.h>
+#include <asm/pgalloc.h>
+#include <asm/mmu_context.h>
+#include <asm/io.h>
+#include <asm/cacheflush.h>
+
+typedef NORET_TYPE void (*relocate_new_kernel_t)(
+ unsigned long indirection_page,
+ unsigned long reboot_code_buffer,
+ unsigned long start_address,
+ unsigned long vbr_reg) ATTRIB_NORET;
+
+const extern unsigned char relocate_new_kernel[];
+const extern unsigned int relocate_new_kernel_size;
+extern void *gdb_vbr_vector;
+
+/*
+ * Provide a dummy crash_notes definition while crash dump arrives to ppc.
+ * This prevents breakage of crash_notes attribute in kernel/ksysfs.c.
+ */
+void *crash_notes = NULL;
+
+void machine_shutdown(void)
+{
+}
+
+void machine_crash_shutdown(struct pt_regs *regs)
+{
+}
+
+/*
+ * Do what every setup is needed on image and the
+ * reboot code buffer to allow us to avoid allocations
+ * later.
+ */
+int machine_kexec_prepare(struct kimage *image)
+{
+ return 0;
+}
+
+void machine_kexec_cleanup(struct kimage *image)
+{
+}
+
+static void kexec_info(struct kimage *image)
+{
+ int i;
+ printk("kexec information\n");
+ for (i = 0; i < image->nr_segments; i++) {
+ printk(" segment[%d]: 0x%08x - 0x%08x (0x%08x)\n",
+ i,
+ (unsigned int)image->segment[i].mem,
+ (unsigned int)image->segment[i].mem + image->segment[i].memsz,
+ (unsigned int)image->segment[i].memsz);
+ }
+ printk(" start : 0x%08x\n\n", (unsigned int)image->start);
+}
+
+
+/*
+ * Do not allocate memory (or fail in any way) in machine_kexec().
+ * We are past the point of no return, committed to rebooting now.
+ */
+NORET_TYPE void machine_kexec(struct kimage *image)
+{
+
+ unsigned long page_list;
+ unsigned long reboot_code_buffer;
+ unsigned long vbr_reg;
+ relocate_new_kernel_t rnk;
+
+#if defined(CONFIG_SH_STANDARD_BIOS)
+ vbr_reg = ((unsigned long )gdb_vbr_vector) - 0x100;
+#else
+ vbr_reg = 0x80000000; // dummy
+#endif
+ /* Interrupts aren't acceptable while we reboot */
+ local_irq_disable();
+
+ page_list = image->head;
+
+ /* we need both effective and real address here */
+ reboot_code_buffer =
+ (unsigned long)page_address(image->control_code_page);
+
+ /* copy our kernel relocation code to the control code page */
+ memcpy((void *)reboot_code_buffer, relocate_new_kernel,
+ relocate_new_kernel_size);
+
+ kexec_info(image);
+ flush_cache_all();
+
+ /* now call it */
+ rnk = (relocate_new_kernel_t) reboot_code_buffer;
+ (*rnk)(page_list, reboot_code_buffer, image->start, vbr_reg);
+}
+
void machine_restart(char * __unused)
{
+
+#ifdef CONFIG_KEXEC
+ struct kimage *image;
+ image = xchg(&kexec_image, 0);
+ if (image) {
+ machine_shutdown();
+ machine_kexec(image);
+ }
+#endif
+
/* SR.BL=1 and invoke address error to let CPU reset (manual reset) */
asm volatile("ldc %0, sr\n\t"
"mov.l @%1, %0" : : "r" (0x10000000), "r" (0x80000001));
--- /dev/null
+/*
+ * relocate_kernel.S - put the kernel image in place to boot
+ * 2005.9.17 kogiidena@eggplant.ddo.jp
+ *
+ * LANDISK/sh4 is supported. Maybe, SH archtecture works well.
+ *
+ * This source code is licensed under the GNU General Public License,
+ * Version 2. See the file COPYING for more details.
+ */
+
+#include <linux/config.h>
+#include <linux/linkage.h>
+
+#define PAGE_SIZE 4096 /* must be same value as in <asm/page.h> */
+
+
+ .globl relocate_new_kernel
+relocate_new_kernel:
+ /* r4 = indirection_page */
+ /* r5 = reboot_code_buffer */
+ /* r6 = start_address */
+ /* r7 = vbr_reg */
+
+ mov.l 10f,r8 /* 4096 */
+ mov.l 11f,r9 /* 0xa0000000 */
+
+ /* stack setting */
+ add r8,r5
+ mov r5,r15
+
+ bra 1f
+ mov r4,r0 /* cmd = indirection_page */
+0:
+ mov.l @r4+,r0 /* cmd = *ind++ */
+
+1: /* addr = (cmd | 0xa0000000) & 0xfffffff0 */
+ mov r0,r2
+ or r9,r2
+ mov #-16,r1
+ and r1,r2
+
+ /* if(cmd & IND_DESTINATION) dst = addr */
+ tst #1,r0
+ bt 2f
+ bra 0b
+ mov r2,r5
+
+2: /* else if(cmd & IND_INDIRECTION) ind = addr */
+ tst #2,r0
+ bt 3f
+ bra 0b
+ mov r2,r4
+
+3: /* else if(cmd & IND_DONE) goto 6 */
+ tst #4,r0
+ bt 4f
+ bra 6f
+ nop
+
+4: /* else if(cmd & IND_SOURCE) memcpy(dst,addr,PAGE_SIZE) */
+ tst #8,r0
+ bt 0b
+
+ mov r8,r3
+ shlr2 r3
+ shlr2 r3
+5:
+ dt r3
+ mov.l @r2+,r1 /* 16n+0 */
+ mov.l r1,@r5
+ add #4,r5
+ mov.l @r2+,r1 /* 16n+4 */
+ mov.l r1,@r5
+ add #4,r5
+ mov.l @r2+,r1 /* 16n+8 */
+ mov.l r1,@r5
+ add #4,r5
+ mov.l @r2+,r1 /* 16n+12 */
+ mov.l r1,@r5
+ add #4,r5
+ bf 5b
+
+ bra 0b
+ nop
+6:
+#ifdef CONFIG_SH_STANDARD_BIOS
+ ldc r7, vbr
+#endif
+ jmp @r6
+ nop
+
+ .align 2
+10:
+ .long PAGE_SIZE
+11:
+ .long 0xa0000000
+
+relocate_new_kernel_end:
+
+ .globl relocate_new_kernel_size
+relocate_new_kernel_size:
+ .long relocate_new_kernel_end - relocate_new_kernel
*
* Copyright (C) 1999 Tetsuya Okada & Niibe Yutaka
* Copyright (C) 2000 Philipp Rumpf <prumpf@tux.org>
- * Copyright (C) 2002, 2003, 2004 Paul Mundt
+ * Copyright (C) 2002, 2003, 2004, 2005 Paul Mundt
* Copyright (C) 2002 M. R. Brown <mrbrown@linux-sh.org>
*
* Some code taken from i386 version.
*/
#include <linux/config.h>
-#include <linux/errno.h>
-#include <linux/module.h>
-#include <linux/sched.h>
#include <linux/kernel.h>
-#include <linux/param.h>
-#include <linux/string.h>
-#include <linux/mm.h>
-#include <linux/interrupt.h>
-#include <linux/time.h>
-#include <linux/delay.h>
+#include <linux/module.h>
#include <linux/init.h>
-#include <linux/smp.h>
#include <linux/profile.h>
-
-#include <asm/processor.h>
-#include <asm/uaccess.h>
-#include <asm/io.h>
-#include <asm/irq.h>
-#include <asm/delay.h>
-#include <asm/machvec.h>
+#include <asm/clock.h>
#include <asm/rtc.h>
-#include <asm/freq.h>
-#include <asm/cpu/timer.h>
-#ifdef CONFIG_SH_KGDB
+#include <asm/timer.h>
#include <asm/kgdb.h>
-#endif
-
-#include <linux/timex.h>
-#include <linux/irq.h>
-
-#define TMU_TOCR_INIT 0x00
-#define TMU0_TCR_INIT 0x0020
-#define TMU_TSTR_INIT 1
-
-#define TMU0_TCR_CALIB 0x0000
-
-#ifdef CONFIG_CPU_SUBTYPE_ST40STB1
-#define CLOCKGEN_MEMCLKCR 0xbb040038
-#define MEMCLKCR_RATIO_MASK 0x7
-#endif /* CONFIG_CPU_SUBTYPE_ST40STB1 */
extern unsigned long wall_jiffies;
-#define TICK_SIZE (tick_nsec / 1000)
-DEFINE_SPINLOCK(tmu0_lock);
+struct sys_timer *sys_timer;
+
+/* Move this somewhere more sensible.. */
+DEFINE_SPINLOCK(rtc_lock);
+EXPORT_SYMBOL(rtc_lock);
/* XXX: Can we initialize this in a routine somewhere? Dreamcast doesn't want
* these routines anywhere... */
int (*rtc_set_time)(const time_t);
#endif
-#if defined(CONFIG_CPU_SUBTYPE_SH7300)
-static int md_table[] = { 1, 2, 3, 4, 6, 8, 12 };
-#endif
-#if defined(CONFIG_CPU_SH3)
-static int stc_multipliers[] = { 1, 2, 3, 4, 6, 1, 1, 1 };
-static int stc_values[] = { 0, 1, 4, 2, 5, 0, 0, 0 };
-#define bfc_divisors stc_multipliers
-#define bfc_values stc_values
-static int ifc_divisors[] = { 1, 2, 3, 4, 1, 1, 1, 1 };
-static int ifc_values[] = { 0, 1, 4, 2, 0, 0, 0, 0 };
-static int pfc_divisors[] = { 1, 2, 3, 4, 6, 1, 1, 1 };
-static int pfc_values[] = { 0, 1, 4, 2, 5, 0, 0, 0 };
-#elif defined(CONFIG_CPU_SH4)
-#if defined(CONFIG_CPU_SUBTYPE_SH73180)
-static int ifc_divisors[] = { 1, 2, 3, 4, 6, 8, 12, 16 };
-static int ifc_values[] = { 0, 1, 2, 3, 4, 5, 6, 7 };
-#define bfc_divisors ifc_divisors /* Same */
-#define bfc_values ifc_values
-#define pfc_divisors ifc_divisors /* Same */
-#define pfc_values ifc_values
-#else
-static int ifc_divisors[] = { 1, 2, 3, 4, 6, 8, 1, 1 };
-static int ifc_values[] = { 0, 1, 2, 3, 0, 4, 0, 5 };
-#define bfc_divisors ifc_divisors /* Same */
-#define bfc_values ifc_values
-static int pfc_divisors[] = { 2, 3, 4, 6, 8, 2, 2, 2 };
-static int pfc_values[] = { 0, 0, 1, 2, 0, 3, 0, 4 };
-#endif
-#else
-#error "Unknown ifc/bfc/pfc/stc values for this processor"
-#endif
-
/*
* Scheduler clock - returns current time in nanosec units.
*/
-unsigned long long sched_clock(void)
+unsigned long long __attribute__ ((weak)) sched_clock(void)
{
return (unsigned long long)jiffies * (1000000000 / HZ);
}
-static unsigned long do_gettimeoffset(void)
-{
- int count;
- unsigned long flags;
-
- static int count_p = 0x7fffffff; /* for the first call after boot */
- static unsigned long jiffies_p = 0;
-
- /*
- * cache volatile jiffies temporarily; we have IRQs turned off.
- */
- unsigned long jiffies_t;
-
- spin_lock_irqsave(&tmu0_lock, flags);
- /* timer count may underflow right here */
- count = ctrl_inl(TMU0_TCNT); /* read the latched count */
-
- jiffies_t = jiffies;
-
- /*
- * avoiding timer inconsistencies (they are rare, but they happen)...
- * there is one kind of problem that must be avoided here:
- * 1. the timer counter underflows
- */
-
- if( jiffies_t == jiffies_p ) {
- if( count > count_p ) {
- /* the nutcase */
-
- if(ctrl_inw(TMU0_TCR) & 0x100) { /* Check UNF bit */
- /*
- * We cannot detect lost timer interrupts ...
- * well, that's why we call them lost, don't we? :)
- * [hmm, on the Pentium and Alpha we can ... sort of]
- */
- count -= LATCH;
- } else {
- printk("do_slow_gettimeoffset(): hardware timer problem?\n");
- }
- }
- } else
- jiffies_p = jiffies_t;
-
- count_p = count;
- spin_unlock_irqrestore(&tmu0_lock, flags);
-
- count = ((LATCH-1) - count) * TICK_SIZE;
- count = (count + LATCH/2) / LATCH;
-
- return count;
-}
-
void do_gettimeofday(struct timeval *tv)
{
unsigned long seq;
do {
seq = read_seqbegin(&xtime_lock);
- usec = do_gettimeoffset();
+ usec = get_timer_offset();
lost = jiffies - wall_jiffies;
if (lost)
* wall time. Discover what correction gettimeofday() would have
* made, and then undo it!
*/
- nsec -= 1000 * (do_gettimeoffset() +
+ nsec -= 1000 * (get_timer_offset() +
(jiffies - wall_jiffies) * (1000000 / HZ));
wtm_sec = wall_to_monotonic.tv_sec + (xtime.tv_sec - sec);
static long last_rtc_update;
/*
- * timer_interrupt() needs to keep up the real-time clock,
+ * handle_timer_tick() needs to keep up the real-time clock,
* as well as call the "do_timer()" routine every clocktick
*/
-static inline void do_timer_interrupt(int irq, struct pt_regs *regs)
+void handle_timer_tick(struct pt_regs *regs)
{
do_timer(regs);
#ifndef CONFIG_SMP
if (rtc_set_time(xtime.tv_sec) == 0)
last_rtc_update = xtime.tv_sec;
else
- last_rtc_update = xtime.tv_sec - 600; /* do it again in 60 s */
+ /* do it again in 60s */
+ last_rtc_update = xtime.tv_sec - 600;
}
}
-/*
- * This is the same as the above, except we _also_ save the current
- * Time Stamp Counter value at the time of the timer interrupt, so that
- * we later on can estimate the time of day more exactly.
- */
-static irqreturn_t timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
-{
- unsigned long timer_status;
-
- /* Clear UNF bit */
- timer_status = ctrl_inw(TMU0_TCR);
- timer_status &= ~0x100;
- ctrl_outw(timer_status, TMU0_TCR);
-
- /*
- * Here we are in the timer irq handler. We just have irqs locally
- * disabled but we don't know if the timer_bh is running on the other
- * CPU. We need to avoid to SMP race with it. NOTE: we don' t need
- * the irq version of write_lock because as just said we have irq
- * locally disabled. -arca
- */
- write_seqlock(&xtime_lock);
- do_timer_interrupt(irq, regs);
- write_sequnlock(&xtime_lock);
-
- return IRQ_HANDLED;
-}
-
-/*
- * Hah! We'll see if this works (switching from usecs to nsecs).
- */
-static unsigned int __init get_timer_frequency(void)
-{
- u32 freq;
- struct timespec ts1, ts2;
- unsigned long diff_nsec;
- unsigned long factor;
-
- /* Setup the timer: We don't want to generate interrupts, just
- * have it count down at its natural rate.
- */
- ctrl_outb(0, TMU_TSTR);
-#if !defined(CONFIG_CPU_SUBTYPE_SH7300)
- ctrl_outb(TMU_TOCR_INIT, TMU_TOCR);
-#endif
- ctrl_outw(TMU0_TCR_CALIB, TMU0_TCR);
- ctrl_outl(0xffffffff, TMU0_TCOR);
- ctrl_outl(0xffffffff, TMU0_TCNT);
-
- rtc_get_time(&ts2);
-
- do {
- rtc_get_time(&ts1);
- } while (ts1.tv_nsec == ts2.tv_nsec && ts1.tv_sec == ts2.tv_sec);
-
- /* actually start the timer */
- ctrl_outb(TMU_TSTR_INIT, TMU_TSTR);
-
- do {
- rtc_get_time(&ts2);
- } while (ts1.tv_nsec == ts2.tv_nsec && ts1.tv_sec == ts2.tv_sec);
-
- freq = 0xffffffff - ctrl_inl(TMU0_TCNT);
- if (ts2.tv_nsec < ts1.tv_nsec) {
- ts2.tv_nsec += 1000000000;
- ts2.tv_sec--;
- }
-
- diff_nsec = (ts2.tv_sec - ts1.tv_sec) * 1000000000 + (ts2.tv_nsec - ts1.tv_nsec);
-
- /* this should work well if the RTC has a precision of n Hz, where
- * n is an integer. I don't think we have to worry about the other
- * cases. */
- factor = (1000000000 + diff_nsec/2) / diff_nsec;
-
- if (factor * diff_nsec > 1100000000 ||
- factor * diff_nsec < 900000000)
- panic("weird RTC (diff_nsec %ld)", diff_nsec);
-
- return freq * factor;
-}
-
-void (*board_time_init)(void);
-void (*board_timer_setup)(struct irqaction *irq);
-
-static unsigned int sh_pclk_freq __initdata = CONFIG_SH_PCLK_FREQ;
-
-static int __init sh_pclk_setup(char *str)
-{
- unsigned int freq;
-
- if (get_option(&str, &freq))
- sh_pclk_freq = freq;
-
- return 1;
-}
-__setup("sh_pclk=", sh_pclk_setup);
-
-static struct irqaction irq0 = { timer_interrupt, SA_INTERRUPT, CPU_MASK_NONE, "timer", NULL, NULL};
-
-void get_current_frequency_divisors(unsigned int *ifc, unsigned int *bfc, unsigned int *pfc)
-{
- unsigned int frqcr = ctrl_inw(FRQCR);
-
-#if defined(CONFIG_CPU_SH3)
-#if defined(CONFIG_CPU_SUBTYPE_SH7300)
- *ifc = md_table[((frqcr & 0x0070) >> 4)];
- *bfc = md_table[((frqcr & 0x0700) >> 8)];
- *pfc = md_table[frqcr & 0x0007];
-#elif defined(CONFIG_CPU_SUBTYPE_SH7705)
- *bfc = stc_multipliers[(frqcr & 0x0300) >> 8];
- *ifc = ifc_divisors[(frqcr & 0x0030) >> 4];
- *pfc = pfc_divisors[frqcr & 0x0003];
-#else
- unsigned int tmp;
-
- tmp = (frqcr & 0x8000) >> 13;
- tmp |= (frqcr & 0x0030) >> 4;
- *bfc = stc_multipliers[tmp];
- tmp = (frqcr & 0x4000) >> 12;
- tmp |= (frqcr & 0x000c) >> 2;
- *ifc = ifc_divisors[tmp];
- tmp = (frqcr & 0x2000) >> 11;
- tmp |= frqcr & 0x0003;
- *pfc = pfc_divisors[tmp];
-#endif
-#elif defined(CONFIG_CPU_SH4)
-#if defined(CONFIG_CPU_SUBTYPE_SH73180)
- *ifc = ifc_divisors[(frqcr>> 20) & 0x0007];
- *bfc = bfc_divisors[(frqcr>> 12) & 0x0007];
- *pfc = pfc_divisors[frqcr & 0x0007];
-#else
- *ifc = ifc_divisors[(frqcr >> 6) & 0x0007];
- *bfc = bfc_divisors[(frqcr >> 3) & 0x0007];
- *pfc = pfc_divisors[frqcr & 0x0007];
-#endif
-#endif
-}
-
-/*
- * This bit of ugliness builds up accessor routines to get at both
- * the divisors and the physical values.
- */
-#define _FREQ_TABLE(x) \
- unsigned int get_##x##_divisor(unsigned int value) \
- { return x##_divisors[value]; } \
- \
- unsigned int get_##x##_value(unsigned int divisor) \
- { return x##_values[(divisor - 1)]; }
-
-_FREQ_TABLE(ifc);
-_FREQ_TABLE(bfc);
-_FREQ_TABLE(pfc);
-
-#ifdef CONFIG_CPU_SUBTYPE_ST40STB1
-
-/*
- * The ST40 divisors are totally different so we set the cpu data
- * clocks using a different algorithm
- *
- * I've just plugged this from the 2.4 code
- * - Alex Bennee <kernel-hacker@bennee.com>
- */
-#define CCN_PVR_CHIP_SHIFT 24
-#define CCN_PVR_CHIP_MASK 0xff
-#define CCN_PVR_CHIP_ST40STB1 0x4
-
-
-struct frqcr_data {
- unsigned short frqcr;
-
- struct {
- unsigned char multiplier;
- unsigned char divisor;
- } factor[3];
-};
-
-static struct frqcr_data st40_frqcr_table[] = {
- { 0x000, {{1,1}, {1,1}, {1,2}}},
- { 0x002, {{1,1}, {1,1}, {1,4}}},
- { 0x004, {{1,1}, {1,1}, {1,8}}},
- { 0x008, {{1,1}, {1,2}, {1,2}}},
- { 0x00A, {{1,1}, {1,2}, {1,4}}},
- { 0x00C, {{1,1}, {1,2}, {1,8}}},
- { 0x011, {{1,1}, {2,3}, {1,6}}},
- { 0x013, {{1,1}, {2,3}, {1,3}}},
- { 0x01A, {{1,1}, {1,2}, {1,4}}},
- { 0x01C, {{1,1}, {1,2}, {1,8}}},
- { 0x023, {{1,1}, {2,3}, {1,3}}},
- { 0x02C, {{1,1}, {1,2}, {1,8}}},
- { 0x048, {{1,2}, {1,2}, {1,4}}},
- { 0x04A, {{1,2}, {1,2}, {1,6}}},
- { 0x04C, {{1,2}, {1,2}, {1,8}}},
- { 0x05A, {{1,2}, {1,3}, {1,6}}},
- { 0x05C, {{1,2}, {1,3}, {1,6}}},
- { 0x063, {{1,2}, {1,4}, {1,4}}},
- { 0x06C, {{1,2}, {1,4}, {1,8}}},
- { 0x091, {{1,3}, {1,3}, {1,6}}},
- { 0x093, {{1,3}, {1,3}, {1,6}}},
- { 0x0A3, {{1,3}, {1,6}, {1,6}}},
- { 0x0DA, {{1,4}, {1,4}, {1,8}}},
- { 0x0DC, {{1,4}, {1,4}, {1,8}}},
- { 0x0EC, {{1,4}, {1,8}, {1,8}}},
- { 0x123, {{1,4}, {1,4}, {1,8}}},
- { 0x16C, {{1,4}, {1,8}, {1,8}}},
+static struct sysdev_class timer_sysclass = {
+ set_kset_name("timer"),
};
-struct memclk_data {
- unsigned char multiplier;
- unsigned char divisor;
-};
-
-static struct memclk_data st40_memclk_table[8] = {
- {1,1}, // 000
- {1,2}, // 001
- {1,3}, // 010
- {2,3}, // 011
- {1,4}, // 100
- {1,6}, // 101
- {1,8}, // 110
- {1,8} // 111
-};
-
-static void st40_specific_time_init(unsigned int module_clock, unsigned short frqcr)
+static int __init timer_init_sysfs(void)
{
- unsigned int cpu_clock, master_clock, bus_clock, memory_clock;
- struct frqcr_data *d;
- int a;
- unsigned long memclkcr;
- struct memclk_data *e;
+ int ret = sysdev_class_register(&timer_sysclass);
+ if (ret != 0)
+ return ret;
- for (a = 0; a < ARRAY_SIZE(st40_frqcr_table); a++) {
- d = &st40_frqcr_table[a];
-
- if (d->frqcr == (frqcr & 0x1ff))
- break;
- }
+ sys_timer->dev.cls = &timer_sysclass;
+ return sysdev_register(&sys_timer->dev);
+}
- if (a == ARRAY_SIZE(st40_frqcr_table)) {
- d = st40_frqcr_table;
+device_initcall(timer_init_sysfs);
- printk("ERROR: Unrecognised FRQCR value (0x%x), "
- "using default multipliers\n", frqcr);
- }
-
- memclkcr = ctrl_inl(CLOCKGEN_MEMCLKCR);
- e = &st40_memclk_table[memclkcr & MEMCLKCR_RATIO_MASK];
-
- printk(KERN_INFO "Clock multipliers: CPU: %d/%d Bus: %d/%d "
- "Mem: %d/%d Periph: %d/%d\n",
- d->factor[0].multiplier, d->factor[0].divisor,
- d->factor[1].multiplier, d->factor[1].divisor,
- e->multiplier, e->divisor,
- d->factor[2].multiplier, d->factor[2].divisor);
-
- master_clock = module_clock * d->factor[2].divisor
- / d->factor[2].multiplier;
- bus_clock = master_clock * d->factor[1].multiplier
- / d->factor[1].divisor;
- memory_clock = master_clock * e->multiplier
- / e->divisor;
- cpu_clock = master_clock * d->factor[0].multiplier
- / d->factor[0].divisor;
-
- current_cpu_data.cpu_clock = cpu_clock;
- current_cpu_data.master_clock = master_clock;
- current_cpu_data.bus_clock = bus_clock;
- current_cpu_data.memory_clock = memory_clock;
- current_cpu_data.module_clock = module_clock;
-}
-#endif
+void (*board_time_init)(void);
void __init time_init(void)
{
- unsigned int timer_freq = 0;
- unsigned int ifc, pfc, bfc;
- unsigned long interval;
-#ifdef CONFIG_CPU_SUBTYPE_ST40STB1
- unsigned long pvr;
- unsigned short frqcr;
-#endif
-
if (board_time_init)
board_time_init();
- /*
- * If we don't have an RTC (such as with the SH7300), don't attempt to
- * probe the timer frequency. Rely on an either hardcoded peripheral
- * clock value, or on the sh_pclk command line option. Note that we
- * still need to have CONFIG_SH_PCLK_FREQ set in order for things like
- * CLOCK_TICK_RATE to be sane.
- */
- current_cpu_data.module_clock = sh_pclk_freq;
-
-#ifdef CONFIG_SH_PCLK_CALC
- /* XXX: Switch this over to a more generic test. */
- {
- unsigned int freq;
-
- /*
- * If we've specified a peripheral clock frequency, and we have
- * an RTC, compare it against the autodetected value. Complain
- * if there's a mismatch.
- */
- timer_freq = get_timer_frequency();
- freq = timer_freq * 4;
-
- if (sh_pclk_freq && (sh_pclk_freq/100*99 > freq || sh_pclk_freq/100*101 < freq)) {
- printk(KERN_NOTICE "Calculated peripheral clock value "
- "%d differs from sh_pclk value %d, fixing..\n",
- freq, sh_pclk_freq);
- current_cpu_data.module_clock = freq;
- }
- }
-#endif
-
-#ifdef CONFIG_CPU_SUBTYPE_ST40STB1
- /* XXX: Update ST40 code to use board_time_init() */
- pvr = ctrl_inl(CCN_PVR);
- frqcr = ctrl_inw(FRQCR);
- printk("time.c ST40 Probe: PVR %08lx, FRQCR %04hx\n", pvr, frqcr);
-
- if (((pvr >> CCN_PVR_CHIP_SHIFT) & CCN_PVR_CHIP_MASK) == CCN_PVR_CHIP_ST40STB1)
- st40_specific_time_init(current_cpu_data.module_clock, frqcr);
- else
-#endif
- get_current_frequency_divisors(&ifc, &bfc, &pfc);
+ clk_init();
if (rtc_get_time) {
rtc_get_time(&xtime);
set_normalized_timespec(&wall_to_monotonic,
-xtime.tv_sec, -xtime.tv_nsec);
- if (board_timer_setup) {
- board_timer_setup(&irq0);
- } else {
- setup_irq(TIMER_IRQ, &irq0);
- }
-
/*
- * for ST40 chips the current_cpu_data should already be set
- * so not having valid pfc/bfc/ifc shouldn't be a problem
+ * Find the timer to use as the system timer, it will be
+ * initialized for us.
*/
- if (!current_cpu_data.master_clock)
- current_cpu_data.master_clock = current_cpu_data.module_clock * pfc;
- if (!current_cpu_data.bus_clock)
- current_cpu_data.bus_clock = current_cpu_data.master_clock / bfc;
- if (!current_cpu_data.cpu_clock)
- current_cpu_data.cpu_clock = current_cpu_data.master_clock / ifc;
-
- printk("CPU clock: %d.%02dMHz\n",
- (current_cpu_data.cpu_clock / 1000000),
- (current_cpu_data.cpu_clock % 1000000)/10000);
- printk("Bus clock: %d.%02dMHz\n",
- (current_cpu_data.bus_clock / 1000000),
- (current_cpu_data.bus_clock % 1000000)/10000);
-#ifdef CONFIG_CPU_SUBTYPE_ST40STB1
- printk("Memory clock: %d.%02dMHz\n",
- (current_cpu_data.memory_clock / 1000000),
- (current_cpu_data.memory_clock % 1000000)/10000);
-#endif
- printk("Module clock: %d.%02dMHz\n",
- (current_cpu_data.module_clock / 1000000),
- (current_cpu_data.module_clock % 1000000)/10000);
-
- interval = (current_cpu_data.module_clock/4 + HZ/2) / HZ;
-
- printk("Interval = %ld\n", interval);
-
- /* Start TMU0 */
- ctrl_outb(0, TMU_TSTR);
-#if !defined(CONFIG_CPU_SUBTYPE_SH7300)
- ctrl_outb(TMU_TOCR_INIT, TMU_TOCR);
-#endif
- ctrl_outw(TMU0_TCR_INIT, TMU0_TCR);
- ctrl_outl(interval, TMU0_TCOR);
- ctrl_outl(interval, TMU0_TCNT);
- ctrl_outb(TMU_TSTR_INIT, TMU_TSTR);
+ sys_timer = get_sys_timer();
+ printk(KERN_INFO "Using %s for system timer\n", sys_timer->name);
#if defined(CONFIG_SH_KGDB)
/*
--- /dev/null
+#
+# Makefile for the various Linux/SuperH timers
+#
+
+obj-y := timer.o
+
+obj-$(CONFIG_SH_TMU) += timer-tmu.o
+
--- /dev/null
+/*
+ * arch/sh/kernel/timers/timer-tmu.c - TMU Timer Support
+ *
+ * Copyright (C) 2005 Paul Mundt
+ *
+ * TMU handling code hacked out of arch/sh/kernel/time.c
+ *
+ * Copyright (C) 1999 Tetsuya Okada & Niibe Yutaka
+ * Copyright (C) 2000 Philipp Rumpf <prumpf@tux.org>
+ * Copyright (C) 2002, 2003, 2004 Paul Mundt
+ * Copyright (C) 2002 M. R. Brown <mrbrown@linux-sh.org>
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/interrupt.h>
+#include <linux/spinlock.h>
+#include <linux/seqlock.h>
+#include <asm/timer.h>
+#include <asm/rtc.h>
+#include <asm/io.h>
+#include <asm/irq.h>
+#include <asm/clock.h>
+
+#define TMU_TOCR_INIT 0x00
+#define TMU0_TCR_INIT 0x0020
+#define TMU_TSTR_INIT 1
+
+#define TMU0_TCR_CALIB 0x0000
+
+static DEFINE_SPINLOCK(tmu0_lock);
+
+static unsigned long tmu_timer_get_offset(void)
+{
+ int count;
+ unsigned long flags;
+
+ static int count_p = 0x7fffffff; /* for the first call after boot */
+ static unsigned long jiffies_p = 0;
+
+ /*
+ * cache volatile jiffies temporarily; we have IRQs turned off.
+ */
+ unsigned long jiffies_t;
+
+ spin_lock_irqsave(&tmu0_lock, flags);
+ /* timer count may underflow right here */
+ count = ctrl_inl(TMU0_TCNT); /* read the latched count */
+
+ jiffies_t = jiffies;
+
+ /*
+ * avoiding timer inconsistencies (they are rare, but they happen)...
+ * there is one kind of problem that must be avoided here:
+ * 1. the timer counter underflows
+ */
+
+ if (jiffies_t == jiffies_p) {
+ if (count > count_p) {
+ /* the nutcase */
+ if (ctrl_inw(TMU0_TCR) & 0x100) { /* Check UNF bit */
+ count -= LATCH;
+ } else {
+ printk("%s (): hardware timer problem?\n",
+ __FUNCTION__);
+ }
+ }
+ } else
+ jiffies_p = jiffies_t;
+
+ count_p = count;
+ spin_unlock_irqrestore(&tmu0_lock, flags);
+
+ count = ((LATCH-1) - count) * TICK_SIZE;
+ count = (count + LATCH/2) / LATCH;
+
+ return count;
+}
+
+static irqreturn_t tmu_timer_interrupt(int irq, void *dev_id,
+ struct pt_regs *regs)
+{
+ unsigned long timer_status;
+
+ /* Clear UNF bit */
+ timer_status = ctrl_inw(TMU0_TCR);
+ timer_status &= ~0x100;
+ ctrl_outw(timer_status, TMU0_TCR);
+
+ /*
+ * Here we are in the timer irq handler. We just have irqs locally
+ * disabled but we don't know if the timer_bh is running on the other
+ * CPU. We need to avoid to SMP race with it. NOTE: we don' t need
+ * the irq version of write_lock because as just said we have irq
+ * locally disabled. -arca
+ */
+ write_seqlock(&xtime_lock);
+ handle_timer_tick(regs);
+ write_sequnlock(&xtime_lock);
+
+ return IRQ_HANDLED;
+}
+
+static struct irqaction tmu_irq = {
+ .name = "timer",
+ .handler = tmu_timer_interrupt,
+ .flags = SA_INTERRUPT,
+ .mask = CPU_MASK_NONE,
+};
+
+/*
+ * Hah! We'll see if this works (switching from usecs to nsecs).
+ */
+static unsigned long tmu_timer_get_frequency(void)
+{
+ u32 freq;
+ struct timespec ts1, ts2;
+ unsigned long diff_nsec;
+ unsigned long factor;
+
+ /* Setup the timer: We don't want to generate interrupts, just
+ * have it count down at its natural rate.
+ */
+ ctrl_outb(0, TMU_TSTR);
+#if !defined(CONFIG_CPU_SUBTYPE_SH7300) && !defined(CONFIG_CPU_SUBTYPE_SH7760)
+ ctrl_outb(TMU_TOCR_INIT, TMU_TOCR);
+#endif
+ ctrl_outw(TMU0_TCR_CALIB, TMU0_TCR);
+ ctrl_outl(0xffffffff, TMU0_TCOR);
+ ctrl_outl(0xffffffff, TMU0_TCNT);
+
+ rtc_get_time(&ts2);
+
+ do {
+ rtc_get_time(&ts1);
+ } while (ts1.tv_nsec == ts2.tv_nsec && ts1.tv_sec == ts2.tv_sec);
+
+ /* actually start the timer */
+ ctrl_outb(TMU_TSTR_INIT, TMU_TSTR);
+
+ do {
+ rtc_get_time(&ts2);
+ } while (ts1.tv_nsec == ts2.tv_nsec && ts1.tv_sec == ts2.tv_sec);
+
+ freq = 0xffffffff - ctrl_inl(TMU0_TCNT);
+ if (ts2.tv_nsec < ts1.tv_nsec) {
+ ts2.tv_nsec += 1000000000;
+ ts2.tv_sec--;
+ }
+
+ diff_nsec = (ts2.tv_sec - ts1.tv_sec) * 1000000000 + (ts2.tv_nsec - ts1.tv_nsec);
+
+ /* this should work well if the RTC has a precision of n Hz, where
+ * n is an integer. I don't think we have to worry about the other
+ * cases. */
+ factor = (1000000000 + diff_nsec/2) / diff_nsec;
+
+ if (factor * diff_nsec > 1100000000 ||
+ factor * diff_nsec < 900000000)
+ panic("weird RTC (diff_nsec %ld)", diff_nsec);
+
+ return freq * factor;
+}
+
+static void tmu_clk_init(struct clk *clk)
+{
+ u8 divisor = TMU0_TCR_INIT & 0x7;
+ ctrl_outw(TMU0_TCR_INIT, TMU0_TCR);
+ clk->rate = clk->parent->rate / (4 << (divisor << 1));
+}
+
+static void tmu_clk_recalc(struct clk *clk)
+{
+ u8 divisor = ctrl_inw(TMU0_TCR) & 0x7;
+ clk->rate = clk->parent->rate / (4 << (divisor << 1));
+}
+
+static struct clk_ops tmu_clk_ops = {
+ .init = tmu_clk_init,
+ .recalc = tmu_clk_recalc,
+};
+
+static struct clk tmu0_clk = {
+ .name = "tmu0_clk",
+ .ops = &tmu_clk_ops,
+};
+
+static int tmu_timer_init(void)
+{
+ unsigned long interval;
+
+ setup_irq(TIMER_IRQ, &tmu_irq);
+
+ tmu0_clk.parent = clk_get("module_clk");
+
+ /* Start TMU0 */
+ ctrl_outb(0, TMU_TSTR);
+#if !defined(CONFIG_CPU_SUBTYPE_SH7300) && !defined(CONFIG_CPU_SUBTYPE_SH7760)
+ ctrl_outb(TMU_TOCR_INIT, TMU_TOCR);
+#endif
+
+ clk_register(&tmu0_clk);
+ clk_enable(&tmu0_clk);
+
+ interval = (clk_get_rate(&tmu0_clk) + HZ / 2) / HZ;
+ printk(KERN_INFO "Interval = %ld\n", interval);
+
+ ctrl_outl(interval, TMU0_TCOR);
+ ctrl_outl(interval, TMU0_TCNT);
+
+ ctrl_outb(TMU_TSTR_INIT, TMU_TSTR);
+
+ return 0;
+}
+
+struct sys_timer_ops tmu_timer_ops = {
+ .init = tmu_timer_init,
+ .get_frequency = tmu_timer_get_frequency,
+ .get_offset = tmu_timer_get_offset,
+};
+
+struct sys_timer tmu_timer = {
+ .name = "tmu",
+ .ops = &tmu_timer_ops,
+};
+
--- /dev/null
+/*
+ * arch/sh/kernel/timers/timer.c - Common timer code
+ *
+ * Copyright (C) 2005 Paul Mundt
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/timer.h>
+#include <linux/string.h>
+#include <asm/timer.h>
+
+static struct sys_timer *sys_timers[] __initdata = {
+#ifdef CONFIG_SH_TMU
+ &tmu_timer,
+#endif
+ NULL,
+};
+
+static char timer_override[10] __initdata;
+static int __init timer_setup(char *str)
+{
+ if (str)
+ strlcpy(timer_override, str, sizeof(timer_override));
+ return 1;
+}
+__setup("timer=", timer_setup);
+
+struct sys_timer *get_sys_timer(void)
+{
+ int i;
+
+ for (i = 0; i < ARRAY_SIZE(sys_timers); i++) {
+ struct sys_timer *t = sys_timers[i];
+
+ if (unlikely(!t))
+ break;
+ if (unlikely(timer_override[0]))
+ if ((strcmp(timer_override, t->name) != 0))
+ continue;
+ if (likely(t->ops->init() == 0))
+ return t;
+ }
+
+ return NULL;
+}
+
--- /dev/null
+menu "Processor selection"
+
+#
+# Processor families
+#
+config CPU_SH2
+ bool
+ select SH_WRITETHROUGH
+
+config CPU_SH3
+ bool
+ select CPU_HAS_INTEVT
+ select CPU_HAS_SR_RB
+
+config CPU_SH4
+ bool
+ select CPU_HAS_INTEVT
+ select CPU_HAS_SR_RB
+
+config CPU_SH4A
+ bool
+ select CPU_SH4
+ select CPU_HAS_INTC2_IRQ
+
+config CPU_SUBTYPE_ST40
+ bool
+ select CPU_SH4
+ select CPU_HAS_INTC2_IRQ
+
+#
+# Processor subtypes
+#
+
+comment "SH-2 Processor Support"
+
+config CPU_SUBTYPE_SH7604
+ bool "Support SH7604 processor"
+ select CPU_SH2
+
+comment "SH-3 Processor Support"
+
+config CPU_SUBTYPE_SH7300
+ bool "Support SH7300 processor"
+ select CPU_SH3
+
+config CPU_SUBTYPE_SH7705
+ bool "Support SH7705 processor"
+ select CPU_SH3
+ select CPU_HAS_PINT_IRQ
+
+config CPU_SUBTYPE_SH7707
+ bool "Support SH7707 processor"
+ select CPU_SH3
+ select CPU_HAS_PINT_IRQ
+ help
+ Select SH7707 if you have a 60 Mhz SH-3 HD6417707 CPU.
+
+config CPU_SUBTYPE_SH7708
+ bool "Support SH7708 processor"
+ select CPU_SH3
+ help
+ Select SH7708 if you have a 60 Mhz SH-3 HD6417708S or
+ if you have a 100 Mhz SH-3 HD6417708R CPU.
+
+config CPU_SUBTYPE_SH7709
+ bool "Support SH7709 processor"
+ select CPU_SH3
+ select CPU_HAS_PINT_IRQ
+ help
+ Select SH7709 if you have a 80 Mhz SH-3 HD6417709 CPU.
+
+comment "SH-4 Processor Support"
+
+config CPU_SUBTYPE_SH7750
+ bool "Support SH7750 processor"
+ select CPU_SH4
+ help
+ Select SH7750 if you have a 200 Mhz SH-4 HD6417750 CPU.
+
+config CPU_SUBTYPE_SH7091
+ bool "Support SH7091 processor"
+ select CPU_SH4
+ select CPU_SUBTYPE_SH7750
+ help
+ Select SH7091 if you have an SH-4 based Sega device (such as
+ the Dreamcast, Naomi, and Naomi 2).
+
+config CPU_SUBTYPE_SH7750R
+ bool "Support SH7750R processor"
+ select CPU_SH4
+ select CPU_SUBTYPE_SH7750
+
+config CPU_SUBTYPE_SH7750S
+ bool "Support SH7750S processor"
+ select CPU_SH4
+ select CPU_SUBTYPE_SH7750
+
+config CPU_SUBTYPE_SH7751
+ bool "Support SH7751 processor"
+ select CPU_SH4
+ help
+ Select SH7751 if you have a 166 Mhz SH-4 HD6417751 CPU,
+ or if you have a HD6417751R CPU.
+
+config CPU_SUBTYPE_SH7751R
+ bool "Support SH7751R processor"
+ select CPU_SH4
+ select CPU_SUBTYPE_SH7751
+
+config CPU_SUBTYPE_SH7760
+ bool "Support SH7760 processor"
+ select CPU_SH4
+ select CPU_HAS_INTC2_IRQ
+
+config CPU_SUBTYPE_SH4_202
+ bool "Support SH4-202 processor"
+ select CPU_SH4
+
+comment "ST40 Processor Support"
+
+config CPU_SUBTYPE_ST40STB1
+ bool "Support ST40STB1/ST40RA processors"
+ select CPU_SUBTYPE_ST40
+ help
+ Select ST40STB1 if you have a ST40RA CPU.
+ This was previously called the ST40STB1, hence the option name.
+
+config CPU_SUBTYPE_ST40GX1
+ bool "Support ST40GX1 processor"
+ select CPU_SUBTYPE_ST40
+ help
+ Select ST40GX1 if you have a ST40GX1 CPU.
+
+comment "SH-4A Processor Support"
+
+config CPU_SUBTYPE_SH73180
+ bool "Support SH73180 processor"
+ select CPU_SH4A
+
+config CPU_SUBTYPE_SH7770
+ bool "Support SH7770 processor"
+ select CPU_SH4A
+
+config CPU_SUBTYPE_SH7780
+ bool "Support SH7780 processor"
+ select CPU_SH4A
+
+endmenu
+
+menu "Memory management options"
+
+config MMU
+ bool "Support for memory management hardware"
+ depends on !CPU_SH2
+ default y
+ help
+ Some SH processors (such as SH-2/SH-2A) lack an MMU. In order to
+ boot on these systems, this option must not be set.
+
+ On other systems (such as the SH-3 and 4) where an MMU exists,
+ turning this off will boot the kernel on these machines with the
+ MMU implicitly switched off.
+
+config 32BIT
+ bool "Support 32-bit physical addressing through PMB"
+ depends on CPU_SH4A
+ default y
+ help
+ If you say Y here, physical addressing will be extended to
+ 32-bits through the SH-4A PMB. If this is not set, legacy
+ 29-bit physical addressing will be used.
+
+choice
+ prompt "HugeTLB page size"
+ depends on HUGETLB_PAGE && CPU_SH4 && MMU
+ default HUGETLB_PAGE_SIZE_64K
+
+config HUGETLB_PAGE_SIZE_64K
+ bool "64K"
+
+config HUGETLB_PAGE_SIZE_1MB
+ bool "1MB"
+
+endchoice
+
+source "mm/Kconfig"
+
+endmenu
+
+menu "Cache configuration"
+
+config SH7705_CACHE_32KB
+ bool "Enable 32KB cache size for SH7705"
+ depends on CPU_SUBTYPE_SH7705
+ default y
+
+config SH_DIRECT_MAPPED
+ bool "Use direct-mapped caching"
+ default n
+ help
+ Selecting this option will configure the caches to be direct-mapped,
+ even if the cache supports a 2 or 4-way mode. This is useful primarily
+ for debugging on platforms with 2 and 4-way caches (SH7750R/SH7751R,
+ SH4-202, SH4-501, etc.)
+
+ Turn this option off for platforms that do not have a direct-mapped
+ cache, and you have no need to run the caches in such a configuration.
+
+config SH_WRITETHROUGH
+ bool "Use write-through caching"
+ default y if CPU_SH2
+ help
+ Selecting this option will configure the caches in write-through
+ mode, as opposed to the default write-back configuration.
+
+ Since there's sill some aliasing issues on SH-4, this option will
+ unfortunately still require the majority of flushing functions to
+ be implemented to deal with aliasing.
+
+ If unsure, say N.
+
+config SH_OCRAM
+ bool "Operand Cache RAM (OCRAM) support"
+ help
+ Selecting this option will automatically tear down the number of
+ sets in the dcache by half, which in turn exposes a memory range.
+
+ The addresses for the OC RAM base will vary according to the
+ processor version. Consult vendor documentation for specifics.
+
+ If unsure, say N.
+
+endmenu
* 640k-1MB IO memory area on PC's
*
* (C) Copyright 1995 1996 Linus Torvalds
+ * (C) Copyright 2005, 2006 Paul Mundt
+ *
+ * This file is subject to the terms and conditions of the GNU General
+ * Public License. See the file "COPYING" in the main directory of this
+ * archive for more details.
*/
-
#include <linux/vmalloc.h>
+#include <linux/module.h>
#include <linux/mm.h>
#include <asm/io.h>
#include <asm/page.h>
#include <asm/pgalloc.h>
+#include <asm/addrspace.h>
#include <asm/cacheflush.h>
#include <asm/tlbflush.h>
if (address >= end)
BUG();
do {
+ pud_t *pud;
pmd_t *pmd;
- pmd = pmd_alloc(&init_mm, dir, address);
+
error = -ENOMEM;
+
+ pud = pud_alloc(&init_mm, dir, address);
+ if (!pud)
+ break;
+ pmd = pmd_alloc(&init_mm, pud, address);
if (!pmd)
break;
if (remap_area_pmd(pmd, address, end - address,
return error;
}
-/*
- * Generic mapping function (not visible outside):
- */
-
/*
* Remap an arbitrary physical address space into the kernel virtual
* address space. Needed when the kernel wants to access high addresses
* have to convert them into an offset in a page-aligned mapping, but the
* caller shouldn't need to know that small detail.
*/
-void * p3_ioremap(unsigned long phys_addr, unsigned long size, unsigned long flags)
+void __iomem *__ioremap(unsigned long phys_addr, unsigned long size,
+ unsigned long flags)
{
- void * addr;
struct vm_struct * area;
- unsigned long offset, last_addr;
+ unsigned long offset, last_addr, addr, orig_addr;
/* Don't allow wraparound or zero size */
last_addr = phys_addr + size - 1;
* Don't remap the low PCI/ISA area, it's always mapped..
*/
if (phys_addr >= 0xA0000 && last_addr < 0x100000)
- return phys_to_virt(phys_addr);
+ return (void __iomem *)phys_to_virt(phys_addr);
/*
* Don't allow anybody to remap normal RAM that we're using..
if (!area)
return NULL;
area->phys_addr = phys_addr;
- addr = area->addr;
- if (remap_area_pages((unsigned long) addr, phys_addr, size, flags)) {
- vunmap(addr);
- return NULL;
+ orig_addr = addr = (unsigned long)area->addr;
+
+#ifdef CONFIG_32BIT
+ /*
+ * First try to remap through the PMB once a valid VMA has been
+ * established. Smaller allocations (or the rest of the size
+ * remaining after a PMB mapping due to the size not being
+ * perfectly aligned on a PMB size boundary) are then mapped
+ * through the UTLB using conventional page tables.
+ *
+ * PMB entries are all pre-faulted.
+ */
+ if (unlikely(size >= 0x1000000)) {
+ unsigned long mapped = pmb_remap(addr, phys_addr, size, flags);
+
+ if (likely(mapped)) {
+ addr += mapped;
+ phys_addr += mapped;
+ size -= mapped;
+ }
}
- return (void *) (offset + (char *)addr);
+#endif
+
+ if (likely(size))
+ if (remap_area_pages(addr, phys_addr, size, flags)) {
+ vunmap((void *)orig_addr);
+ return NULL;
+ }
+
+ return (void __iomem *)(offset + (char *)orig_addr);
}
+EXPORT_SYMBOL(__ioremap);
-void p3_iounmap(void *addr)
+void __iounmap(void __iomem *addr)
{
- if (addr > high_memory)
- vfree((void *)(PAGE_MASK & (unsigned long)addr));
+ unsigned long vaddr = (unsigned long __force)addr;
+ struct vm_struct *p;
+
+ if (PXSEG(vaddr) < P3SEG)
+ return;
+
+#ifdef CONFIG_32BIT
+ /*
+ * Purge any PMB entries that may have been established for this
+ * mapping, then proceed with conventional VMA teardown.
+ *
+ * XXX: Note that due to the way that remove_vm_area() does
+ * matching of the resultant VMA, we aren't able to fast-forward
+ * the address past the PMB space until the end of the VMA where
+ * the page tables reside. As such, unmap_vm_area() will be
+ * forced to linearly scan over the area until it finds the page
+ * tables where PTEs that need to be unmapped actually reside,
+ * which is far from optimal. Perhaps we need to use a separate
+ * VMA for the PMB mappings?
+ * -- PFM.
+ */
+ pmb_unmap(vaddr);
+#endif
+
+ p = remove_vm_area((void *)(vaddr & PAGE_MASK));
+ if (!p) {
+ printk(KERN_ERR "%s: bad address %p\n", __FUNCTION__, addr);
+ return;
+ }
+
+ kfree(p);
}
+EXPORT_SYMBOL(__iounmap);
7300SE SH_7300_SOLUTION_ENGINE
73180SE SH_73180_SOLUTION_ENGINE
7751SYSTEMH SH_7751_SYSTEMH
-HP600 SH_HP600
-HP620 SH_HP620
-HP680 SH_HP680
-HP690 SH_HP690
+HP6XX SH_HP6XX
HD64461 HD64461
HD64465 HD64465
SH2000 SH_SH2000
#define curptr g6
-#define NR_SYSCALLS 284 /* Each OS is different... */
+#define NR_SYSCALLS 299 /* Each OS is different... */
/* These are just handy. */
#define _SV save %sp, -STACKFRAME_SZ, %sp
call do_sys_sigstack
mov %l5, %o7
- .align 4
- .globl sys_sigpause
-sys_sigpause:
- /* Note: %o0 already has correct value... */
- call do_sigpause
- add %sp, STACKFRAME_SZ, %o1
-
- ld [%curptr + TI_FLAGS], %l5
- andcc %l5, _TIF_SYSCALL_TRACE, %g0
- be 1f
- nop
-
- call syscall_trace
- nop
-
-1:
- /* We are returning to a signal handler. */
- RESTORE_ALL
-
- .align 4
- .globl sys_sigsuspend
-sys_sigsuspend:
- call do_sigsuspend
- add %sp, STACKFRAME_SZ, %o0
-
- ld [%curptr + TI_FLAGS], %l5
- andcc %l5, _TIF_SYSCALL_TRACE, %g0
- be 1f
- nop
-
- call syscall_trace
- nop
-
-1:
- /* We are returning to a signal handler. */
- RESTORE_ALL
-
- .align 4
- .globl sys_rt_sigsuspend
-sys_rt_sigsuspend:
- /* Note: %o0, %o1 already have correct value... */
- call do_rt_sigsuspend
- add %sp, STACKFRAME_SZ, %o2
-
- ld [%curptr + TI_FLAGS], %l5
- andcc %l5, _TIF_SYSCALL_TRACE, %g0
- be 1f
- nop
-
- call syscall_trace
- nop
-
-1:
- /* We are returning to a signal handler. */
- RESTORE_ALL
-
.align 4
.globl sys_sigreturn
sys_sigreturn:
ld [%curptr + TI_FLAGS], %g2
signal_p:
- andcc %g2, (_TIF_NOTIFY_RESUME|_TIF_SIGPENDING), %g0
+ andcc %g2, (_TIF_SIGPENDING|_TIF_RESTORE_SIGMASK), %g0
bz,a ret_trap_continue
ld [%sp + STACKFRAME_SZ + PT_PSR], %t_psr
- clr %o0
- mov %l5, %o2
- mov %l6, %o3
+ mov %l5, %o1
+ mov %l6, %o2
call do_signal
- add %sp, STACKFRAME_SZ, %o1 ! pt_regs ptr
+ add %sp, STACKFRAME_SZ, %o0 ! pt_regs ptr
/* Fall through. */
ld [%sp + STACKFRAME_SZ + PT_PSR], %t_psr
void *fpqueue, unsigned long *fpqdepth);
extern void fpload(unsigned long *fpregs, unsigned long *fsr);
-asmlinkage int do_signal(sigset_t *oldset, struct pt_regs * regs,
- unsigned long orig_o0, int restart_syscall);
-
/* Signal frames: the original one (compatible with SunOS):
*
* Set up a signal frame... Make the stack look the way SunOS
#define NF_ALIGNEDSZ (((sizeof(struct new_signal_frame) + 7) & (~7)))
#define RT_ALIGNEDSZ (((sizeof(struct rt_signal_frame) + 7) & (~7)))
-/*
- * atomically swap in the new signal mask, and wait for a signal.
- * This is really tricky on the Sparc, watch out...
- */
-asmlinkage void _sigpause_common(old_sigset_t set, struct pt_regs *regs)
+static int _sigpause_common(old_sigset_t set)
{
- sigset_t saveset;
-
set &= _BLOCKABLE;
spin_lock_irq(¤t->sighand->siglock);
- saveset = current->blocked;
+ current->saved_sigmask = current->blocked;
siginitset(¤t->blocked, set);
recalc_sigpending();
spin_unlock_irq(¤t->sighand->siglock);
- regs->pc = regs->npc;
- regs->npc += 4;
-
- /* Condition codes and return value where set here for sigpause,
- * and so got used by setup_frame, which again causes sigreturn()
- * to return -EINTR.
- */
- while (1) {
- current->state = TASK_INTERRUPTIBLE;
- schedule();
- /*
- * Return -EINTR and set condition code here,
- * so the interrupted system call actually returns
- * these.
- */
- regs->psr |= PSR_C;
- regs->u_regs[UREG_I0] = EINTR;
- if (do_signal(&saveset, regs, 0, 0))
- return;
- }
-}
+ current->state = TASK_INTERRUPTIBLE;
+ schedule();
+ set_thread_flag(TIF_RESTORE_SIGMASK);
-asmlinkage void do_sigpause(unsigned int set, struct pt_regs *regs)
-{
- _sigpause_common(set, regs);
+ return -ERESTARTNOHAND;
}
-asmlinkage void do_sigsuspend (struct pt_regs *regs)
+asmlinkage int sys_sigpause(unsigned int set)
{
- _sigpause_common(regs->u_regs[UREG_I0], regs);
+ return _sigpause_common(set);
}
-asmlinkage void do_rt_sigsuspend(sigset_t __user *uset, size_t sigsetsize,
- struct pt_regs *regs)
+asmlinkage int sys_sigsuspend(old_sigset_t set)
{
- sigset_t oldset, set;
-
- /* XXX: Don't preclude handling different sized sigset_t's. */
- if (sigsetsize != sizeof(sigset_t)) {
- regs->psr |= PSR_C;
- regs->u_regs[UREG_I0] = EINVAL;
- return;
- }
-
- if (copy_from_user(&set, uset, sizeof(set))) {
- regs->psr |= PSR_C;
- regs->u_regs[UREG_I0] = EFAULT;
- return;
- }
-
- sigdelsetmask(&set, ~_BLOCKABLE);
- spin_lock_irq(¤t->sighand->siglock);
- oldset = current->blocked;
- current->blocked = set;
- recalc_sigpending();
- spin_unlock_irq(¤t->sighand->siglock);
-
- regs->pc = regs->npc;
- regs->npc += 4;
-
- /* Condition codes and return value where set here for sigpause,
- * and so got used by setup_frame, which again causes sigreturn()
- * to return -EINTR.
- */
- while (1) {
- current->state = TASK_INTERRUPTIBLE;
- schedule();
- /*
- * Return -EINTR and set condition code here,
- * so the interrupted system call actually returns
- * these.
- */
- regs->psr |= PSR_C;
- regs->u_regs[UREG_I0] = EINTR;
- if (do_signal(&oldset, regs, 0, 0))
- return;
- }
+ return _sigpause_common(set);
}
static inline int
* want to handle. Thus you cannot kill init even with a SIGKILL even by
* mistake.
*/
-asmlinkage int do_signal(sigset_t *oldset, struct pt_regs * regs,
- unsigned long orig_i0, int restart_syscall)
+asmlinkage void do_signal(struct pt_regs * regs, unsigned long orig_i0, int restart_syscall)
{
siginfo_t info;
struct sparc_deliver_cookie cookie;
struct k_sigaction ka;
int signr;
+ sigset_t *oldset;
/*
* XXX Disable svr4 signal handling until solaris emulation works.
cookie.restart_syscall = restart_syscall;
cookie.orig_i0 = orig_i0;
- if (!oldset)
+ if (test_thread_flag(TIF_RESTORE_SIGMASK))
+ oldset = ¤t->saved_sigmask;
+ else
oldset = ¤t->blocked;
signr = get_signal_to_deliver(&info, &ka, regs, &cookie);
syscall_restart(cookie.orig_i0, regs, &ka.sa);
handle_signal(signr, &ka, &info, oldset,
regs, svr4_signal);
- return 1;
+ /* a signal was successfully delivered; the saved
+ * sigmask will have been stored in the signal frame,
+ * and will be restored by sigreturn, so we can simply
+ * clear the TIF_RESTORE_SIGMASK flag.
+ */
+ if (test_thread_flag(TIF_RESTORE_SIGMASK))
+ clear_thread_flag(TIF_RESTORE_SIGMASK);
+ return;
}
if (cookie.restart_syscall &&
(regs->u_regs[UREG_I0] == ERESTARTNOHAND ||
regs->pc -= 4;
regs->npc -= 4;
}
- return 0;
+
+ /* if there's no signal to deliver, we just put the saved sigmask
+ * back
+ */
+ if (test_thread_flag(TIF_RESTORE_SIGMASK)) {
+ clear_thread_flag(TIF_RESTORE_SIGMASK);
+ sigprocmask(SIG_SETMASK, ¤t->saved_sigmask, NULL);
+ }
}
asmlinkage int
extern int svr4_getcontext (svr4_ucontext_t *, struct pt_regs *);
extern int svr4_setcontext (svr4_ucontext_t *, struct pt_regs *);
-void _sigpause_common (unsigned int set, struct pt_regs *);
extern void (*__copy_1page)(void *, const void *);
extern void __memmove(void *, const void *, __kernel_size_t);
extern void (*bzero_1page)(void *);
/* Solaris/SunOS binary compatibility */
EXPORT_SYMBOL(svr4_setcontext);
EXPORT_SYMBOL(svr4_getcontext);
-EXPORT_SYMBOL(_sigpause_common);
EXPORT_SYMBOL(dump_thread);
/*265*/ .long sys_timer_delete, sys_timer_create, sys_nis_syscall, sys_io_setup, sys_io_destroy
/*270*/ .long sys_io_submit, sys_io_cancel, sys_io_getevents, sys_mq_open, sys_mq_unlink
/*275*/ .long sys_mq_timedsend, sys_mq_timedreceive, sys_mq_notify, sys_mq_getsetattr, sys_waitid
-/*280*/ .long sys_ni_syscall, sys_add_key, sys_request_key, sys_keyctl
+/*280*/ .long sys_ni_syscall, sys_add_key, sys_request_key, sys_keyctl, sys_openat
+/*285*/ .long sys_mkdirat, sys_mknodat, sys_fchownat, sys_futimesat, sys_newfstatat
+/*290*/ .long sys_unlinkat, sys_renameat, sys_linkat, sys_symlinkat, sys_readlinkat
+/*295*/ .long sys_fchmodat, sys_faccessat, sys_pselect6, sys_ppoll
#ifdef CONFIG_SUNOS_EMUL
/* Now the SunOS syscall table. */
.long sunos_nosys, sunos_nosys, sunos_nosys
.long sunos_nosys
/*280*/ .long sunos_nosys, sunos_nosys, sunos_nosys
+ .long sunos_nosys, sunos_nosys, sunos_nosys
+ .long sunos_nosys, sunos_nosys, sunos_nosys
.long sunos_nosys
+/*290*/ .long sunos_nosys, sunos_nosys, sunos_nosys
+ .long sunos_nosys, sunos_nosys, sunos_nosys
+ .long sunos_nosys, sunos_nosys, sunos_nosys
#endif
case FMOVS:
case FABSS:
case FNEGS: TYPE(2,1,0,1,0,0,0); break;
- default:
-#ifdef DEBUG_MATHEMU
- printk("unknown FPop1: %03lx\n",(insn>>5)&0x1ff);
-#endif
- break;
}
} else if ((insn & 0xc1f80000) == 0x81a80000) /* FPOP2 */ {
switch ((insn >> 5) & 0x1ff) {
case FCMPED: TYPE(3,0,0,2,1,2,1); break;
case FCMPQ: TYPE(3,0,0,3,1,3,1); break;
case FCMPEQ: TYPE(3,0,0,3,1,3,1); break;
- default:
-#ifdef DEBUG_MATHEMU
- printk("unknown FPop2: %03lx\n",(insn>>5)&0x1ff);
-#endif
- break;
}
}
int ioptex;
int i;
- if (busa < iommu->start)
- BUG();
+ BUG_ON(busa < iommu->start);
ioptex = (busa - iommu->start) >> PAGE_SHIFT;
for (i = 0; i < npages; i++) {
iopte_val(iommu->page_table[ioptex + i]) = 0;
iopte_t *first;
int ioptex;
- if ((va & ~PAGE_MASK) != 0) BUG();
- if ((addr & ~PAGE_MASK) != 0) BUG();
- if ((len & ~PAGE_MASK) != 0) BUG();
+ BUG_ON((va & ~PAGE_MASK) != 0);
+ BUG_ON((addr & ~PAGE_MASK) != 0);
+ BUG_ON((len & ~PAGE_MASK) != 0);
/* page color = physical address */
ioptex = bit_map_string_get(&iommu->usemap, len >> PAGE_SHIFT,
unsigned long end;
int ioptex = (busa - iommu->start) >> PAGE_SHIFT;
- if ((busa & ~PAGE_MASK) != 0) BUG();
- if ((len & ~PAGE_MASK) != 0) BUG();
+ BUG_ON((busa & ~PAGE_MASK) != 0);
+ BUG_ON((len & ~PAGE_MASK) != 0);
iopte += ioptex;
end = busa + len;
#
# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.15
-# Mon Jan 9 14:36:29 2006
+# Linux kernel version: 2.6.16-rc1
+# Wed Jan 18 13:41:02 2006
#
CONFIG_SPARC=y
CONFIG_SPARC64=y
# CONFIG_ATALK is not set
# CONFIG_X25 is not set
# CONFIG_LAPB is not set
+
+#
+# TIPC Configuration (EXPERIMENTAL)
+#
+# CONFIG_TIPC is not set
# CONFIG_NET_DIVERT is not set
# CONFIG_ECONET is not set
# CONFIG_WAN_ROUTER is not set
# CONFIG_SCSI_QLOGIC_FC is not set
# CONFIG_SCSI_QLOGIC_1280 is not set
# CONFIG_SCSI_QLOGICPTI is not set
-CONFIG_SCSI_QLA2XXX=y
-# CONFIG_SCSI_QLA2XXX_EMBEDDED_FIRMWARE is not set
+# CONFIG_SCSI_QLA_FC is not set
# CONFIG_SCSI_LPFC is not set
# CONFIG_SCSI_DC395x is not set
# CONFIG_SCSI_DC390T is not set
# CONFIG_DL2K is not set
CONFIG_E1000=m
CONFIG_E1000_NAPI=y
+# CONFIG_E1000_DISABLE_PACKET_SPLIT is not set
# CONFIG_MYRI_SBUS is not set
# CONFIG_NS83820 is not set
# CONFIG_HAMACHI is not set
CONFIG_SERIAL_SUNSAB=m
CONFIG_SERIAL_CORE=y
CONFIG_SERIAL_CORE_CONSOLE=y
-# CONFIG_SERIAL_JSM is not set
CONFIG_UNIX98_PTYS=y
# CONFIG_LEGACY_PTYS is not set
# CONFIG_I2C_DEBUG_BUS is not set
# CONFIG_I2C_DEBUG_CHIP is not set
+#
+# SPI support
+#
+# CONFIG_SPI is not set
+# CONFIG_SPI_MASTER is not set
+
#
# Dallas's 1-wire bus
#
#
CONFIG_USB_HID=y
CONFIG_USB_HIDINPUT=y
+# CONFIG_USB_HIDINPUT_POWERBOOK is not set
# CONFIG_HID_FF is not set
CONFIG_USB_HIDDEV=y
# CONFIG_USB_AIPTEK is not set
# Kernel hacking
#
CONFIG_PRINTK_TIME=y
-CONFIG_DEBUG_KERNEL=y
CONFIG_MAGIC_SYSRQ=y
+CONFIG_DEBUG_KERNEL=y
CONFIG_LOG_BUF_SHIFT=18
CONFIG_DETECT_SOFTLOCKUP=y
CONFIG_SCHEDSTATS=y
# CONFIG_DEBUG_SLAB is not set
+# CONFIG_DEBUG_MUTEXES is not set
# CONFIG_DEBUG_SPINLOCK is not set
# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
# CONFIG_DEBUG_KOBJECT is not set
# CONFIG_DEBUG_INFO is not set
CONFIG_DEBUG_FS=y
# CONFIG_DEBUG_VM is not set
+CONFIG_FORCED_INLINING=y
# CONFIG_RCU_TORTURE_TEST is not set
# CONFIG_DEBUG_STACK_USAGE is not set
# CONFIG_DEBUG_DCFLUSH is not set
#define curptr g6
-#define NR_SYSCALLS 284 /* Each OS is different... */
+#define NR_SYSCALLS 299 /* Each OS is different... */
.text
.align 32
add %sp, PTREGS_OFF, %o0
.globl sys_pipe, sys_sigpause, sys_nis_syscall
- .globl sys_sigsuspend, sys_rt_sigsuspend
.globl sys_rt_sigreturn
.globl sys_ptrace
.globl sys_sigaltstack
mov %i6, %o2
#endif
.align 32
-sys_sigsuspend: add %sp, PTREGS_OFF, %o0
- call do_sigsuspend
- add %o7, 1f-.-4, %o7
- nop
-sys_rt_sigsuspend: /* NOTE: %o0,%o1 have a correct value already */
- add %sp, PTREGS_OFF, %o2
- call do_rt_sigsuspend
- add %o7, 1f-.-4, %o7
- nop
-#ifdef CONFIG_COMPAT
- .globl sys32_rt_sigsuspend
-sys32_rt_sigsuspend: /* NOTE: %o0,%o1 have a correct value already */
- srl %o0, 0, %o0
- add %sp, PTREGS_OFF, %o2
- call do_rt_sigsuspend32
- add %o7, 1f-.-4, %o7
-#endif
- /* NOTE: %o0 has a correct value already */
-sys_sigpause: add %sp, PTREGS_OFF, %o1
- call do_sigpause
- add %o7, 1f-.-4, %o7
- nop
#ifdef CONFIG_COMPAT
.globl sys32_sigreturn
sys32_sigreturn:
panic("Reboot failed!");
}
+#ifdef CONFIG_COMPAT
static void show_regwindow32(struct pt_regs *regs)
{
struct reg_window32 __user *rw;
r_w.ins[0], r_w.ins[1], r_w.ins[2], r_w.ins[3],
r_w.ins[4], r_w.ins[5], r_w.ins[6], r_w.ins[7]);
}
+#else
+#define show_regwindow32(regs) do { } while (0)
+#endif
static void show_regwindow(struct pt_regs *regs)
{
wrpr %g0, RTRAP_PSTATE_IRQOFF, %pstate
ldx [%g6 + TI_FLAGS], %l0
-1: andcc %l0, (_TIF_NOTIFY_RESUME | _TIF_SIGPENDING), %g0
+1: andcc %l0, (_TIF_SIGPENDING | _TIF_RESTORE_SIGMASK), %g0
be,pt %xcc, __handle_user_windows_continue
nop
- clr %o0
- mov %l5, %o2
- mov %l6, %o3
- add %sp, PTREGS_OFF, %o1
- mov %l0, %o4
+ mov %l5, %o1
+ mov %l6, %o2
+ add %sp, PTREGS_OFF, %o0
+ mov %l0, %o3
call do_notify_resume
wrpr %g0, RTRAP_PSTATE, %pstate
wrpr %g0, RTRAP_PSTATE, %pstate
wrpr %g0, RTRAP_PSTATE_IRQOFF, %pstate
ldx [%g6 + TI_FLAGS], %l0
-1: andcc %l0, (_TIF_NOTIFY_RESUME | _TIF_SIGPENDING), %g0
+1: andcc %l0, (_TIF_SIGPENDING | _TIF_RESTORE_SIGMASK), %g0
be,pt %xcc, __handle_perfctrs_continue
sethi %hi(TSTATE_PEF), %o0
- clr %o0
- mov %l5, %o2
- mov %l6, %o3
- add %sp, PTREGS_OFF, %o1
- mov %l0, %o4
+ mov %l5, %o1
+ mov %l6, %o2
+ add %sp, PTREGS_OFF, %o0
+ mov %l0, %o3
call do_notify_resume
wrpr %g0, RTRAP_PSTATE, %pstate
ba,a,pt %xcc, __handle_userfpu_continue
__handle_signal:
- clr %o0
- mov %l5, %o2
- mov %l6, %o3
- add %sp, PTREGS_OFF, %o1
- mov %l0, %o4
+ mov %l5, %o1
+ mov %l6, %o2
+ add %sp, PTREGS_OFF, %o0
+ mov %l0, %o3
call do_notify_resume
wrpr %g0, RTRAP_PSTATE, %pstate
wrpr %g0, RTRAP_PSTATE_IRQOFF, %pstate
andcc %l1, %o0, %g0
andcc %l0, _TIF_NEED_RESCHED, %g0
bne,pn %xcc, __handle_preemption
- andcc %l0, (_TIF_NOTIFY_RESUME | _TIF_SIGPENDING), %g0
+ andcc %l0, (_TIF_SIGPENDING | _TIF_RESTORE_SIGMASK), %g0
bne,pn %xcc, __handle_signal
__handle_signal_continue:
ldub [%g6 + TI_WSAVED], %o2
serial_console = 1;
} else if (idev == PROMDEV_ITTYB && odev == PROMDEV_OTTYB) {
serial_console = 2;
+ } else if (idev == PROMDEV_IRSC && odev == PROMDEV_ORSC) {
+ serial_console = 3;
} else {
prom_printf("Inconsistent console: "
"input %d, output %d\n",
#define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP)))
-static int do_signal(sigset_t *oldset, struct pt_regs * regs,
- unsigned long orig_o0, int ret_from_syscall);
-
/* {set, get}context() needed for 64-bit SparcLinux userland. */
asmlinkage void sparc64_set_context(struct pt_regs *regs)
{
/* Align macros */
#define RT_ALIGNEDSZ (((sizeof(struct rt_signal_frame) + 7) & (~7)))
-/*
- * atomically swap in the new signal mask, and wait for a signal.
- * This is really tricky on the Sparc, watch out...
- */
-asmlinkage void _sigpause_common(old_sigset_t set, struct pt_regs *regs)
+static long _sigpause_common(old_sigset_t set)
{
- sigset_t saveset;
-
-#ifdef CONFIG_SPARC32_COMPAT
- if (test_thread_flag(TIF_32BIT)) {
- extern asmlinkage void _sigpause32_common(compat_old_sigset_t,
- struct pt_regs *);
- _sigpause32_common(set, regs);
- return;
- }
-#endif
set &= _BLOCKABLE;
spin_lock_irq(¤t->sighand->siglock);
- saveset = current->blocked;
+ current->saved_sigmask = current->blocked;
siginitset(¤t->blocked, set);
recalc_sigpending();
spin_unlock_irq(¤t->sighand->siglock);
-
- if (test_thread_flag(TIF_32BIT)) {
- regs->tpc = (regs->tnpc & 0xffffffff);
- regs->tnpc = (regs->tnpc + 4) & 0xffffffff;
- } else {
- regs->tpc = regs->tnpc;
- regs->tnpc += 4;
- }
- /* Condition codes and return value where set here for sigpause,
- * and so got used by setup_frame, which again causes sigreturn()
- * to return -EINTR.
- */
- while (1) {
- current->state = TASK_INTERRUPTIBLE;
- schedule();
- /*
- * Return -EINTR and set condition code here,
- * so the interrupted system call actually returns
- * these.
- */
- regs->tstate |= (TSTATE_ICARRY|TSTATE_XCARRY);
- regs->u_regs[UREG_I0] = EINTR;
- if (do_signal(&saveset, regs, 0, 0))
- return;
- }
+ current->state = TASK_INTERRUPTIBLE;
+ schedule();
+ set_thread_flag(TIF_RESTORE_SIGMASK);
+ return -ERESTARTNOHAND;
}
-asmlinkage void do_sigpause(unsigned int set, struct pt_regs *regs)
+asmlinkage long sys_sigpause(unsigned int set)
{
- _sigpause_common(set, regs);
+ return _sigpause_common(set);
}
-asmlinkage void do_sigsuspend(struct pt_regs *regs)
+asmlinkage long sys_sigsuspend(old_sigset_t set)
{
- _sigpause_common(regs->u_regs[UREG_I0], regs);
-}
-
-asmlinkage void do_rt_sigsuspend(sigset_t __user *uset, size_t sigsetsize, struct pt_regs *regs)
-{
- sigset_t oldset, set;
-
- /* XXX: Don't preclude handling different sized sigset_t's. */
- if (sigsetsize != sizeof(sigset_t)) {
- regs->tstate |= (TSTATE_ICARRY|TSTATE_XCARRY);
- regs->u_regs[UREG_I0] = EINVAL;
- return;
- }
- if (copy_from_user(&set, uset, sizeof(set))) {
- regs->tstate |= (TSTATE_ICARRY|TSTATE_XCARRY);
- regs->u_regs[UREG_I0] = EFAULT;
- return;
- }
-
- sigdelsetmask(&set, ~_BLOCKABLE);
- spin_lock_irq(¤t->sighand->siglock);
- oldset = current->blocked;
- current->blocked = set;
- recalc_sigpending();
- spin_unlock_irq(¤t->sighand->siglock);
-
- if (test_thread_flag(TIF_32BIT)) {
- regs->tpc = (regs->tnpc & 0xffffffff);
- regs->tnpc = (regs->tnpc + 4) & 0xffffffff;
- } else {
- regs->tpc = regs->tnpc;
- regs->tnpc += 4;
- }
-
- /* Condition codes and return value where set here for sigpause,
- * and so got used by setup_frame, which again causes sigreturn()
- * to return -EINTR.
- */
- while (1) {
- current->state = TASK_INTERRUPTIBLE;
- schedule();
- /*
- * Return -EINTR and set condition code here,
- * so the interrupted system call actually returns
- * these.
- */
- regs->tstate |= (TSTATE_ICARRY|TSTATE_XCARRY);
- regs->u_regs[UREG_I0] = EINTR;
- if (do_signal(&oldset, regs, 0, 0))
- return;
- }
+ return _sigpause_common(set);
}
static inline int
* want to handle. Thus you cannot kill init even with a SIGKILL even by
* mistake.
*/
-static int do_signal(sigset_t *oldset, struct pt_regs * regs,
- unsigned long orig_i0, int restart_syscall)
+static void do_signal(struct pt_regs *regs, unsigned long orig_i0, int restart_syscall)
{
siginfo_t info;
struct signal_deliver_cookie cookie;
struct k_sigaction ka;
int signr;
+ sigset_t *oldset;
cookie.restart_syscall = restart_syscall;
cookie.orig_i0 = orig_i0;
- if (!oldset)
+ if (test_thread_flag(TIF_RESTORE_SIGMASK))
+ oldset = ¤t->saved_sigmask;
+ else
oldset = ¤t->blocked;
#ifdef CONFIG_SPARC32_COMPAT
if (test_thread_flag(TIF_32BIT)) {
- extern int do_signal32(sigset_t *, struct pt_regs *,
- unsigned long, int);
- return do_signal32(oldset, regs, orig_i0,
- cookie.restart_syscall);
+ extern void do_signal32(sigset_t *, struct pt_regs *,
+ unsigned long, int);
+ do_signal32(oldset, regs, orig_i0,
+ cookie.restart_syscall);
+ return;
}
#endif
if (cookie.restart_syscall)
syscall_restart(orig_i0, regs, &ka.sa);
handle_signal(signr, &ka, &info, oldset, regs);
- return 1;
+
+ /* a signal was successfully delivered; the saved
+ * sigmask will have been stored in the signal frame,
+ * and will be restored by sigreturn, so we can simply
+ * clear the TIF_RESTORE_SIGMASK flag.
+ */
+ if (test_thread_flag(TIF_RESTORE_SIGMASK))
+ clear_thread_flag(TIF_RESTORE_SIGMASK);
+ return;
}
if (cookie.restart_syscall &&
(regs->u_regs[UREG_I0] == ERESTARTNOHAND ||
regs->tpc -= 4;
regs->tnpc -= 4;
}
- return 0;
+
+ /* if there's no signal to deliver, we just put the saved sigmask
+ * back
+ */
+ if (test_thread_flag(TIF_RESTORE_SIGMASK)) {
+ clear_thread_flag(TIF_RESTORE_SIGMASK);
+ sigprocmask(SIG_SETMASK, ¤t->saved_sigmask, NULL);
+ }
}
-void do_notify_resume(sigset_t *oldset, struct pt_regs *regs,
- unsigned long orig_i0, int restart_syscall,
+void do_notify_resume(struct pt_regs *regs, unsigned long orig_i0, int restart_syscall,
unsigned long thread_info_flags)
{
- if (thread_info_flags & _TIF_SIGPENDING)
- do_signal(oldset, regs, orig_i0, restart_syscall);
+ if (thread_info_flags & (_TIF_SIGPENDING | _TIF_RESTORE_SIGMASK))
+ do_signal(regs, orig_i0, restart_syscall);
}
void ptrace_signal_deliver(struct pt_regs *regs, void *cookie)
#define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP)))
-int do_signal32(sigset_t *oldset, struct pt_regs *regs,
- unsigned long orig_o0, int ret_from_syscall);
-
/* Signal frames: the original one (compatible with SunOS):
*
* Set up a signal frame... Make the stack look the way SunOS
return 0;
}
-/*
- * atomically swap in the new signal mask, and wait for a signal.
- * This is really tricky on the Sparc, watch out...
- */
-asmlinkage void _sigpause32_common(compat_old_sigset_t set, struct pt_regs *regs)
-{
- sigset_t saveset;
-
- set &= _BLOCKABLE;
- spin_lock_irq(¤t->sighand->siglock);
- saveset = current->blocked;
- siginitset(¤t->blocked, set);
- recalc_sigpending();
- spin_unlock_irq(¤t->sighand->siglock);
-
- regs->tpc = regs->tnpc;
- regs->tnpc += 4;
- if (test_thread_flag(TIF_32BIT)) {
- regs->tpc &= 0xffffffff;
- regs->tnpc &= 0xffffffff;
- }
-
- /* Condition codes and return value where set here for sigpause,
- * and so got used by setup_frame, which again causes sigreturn()
- * to return -EINTR.
- */
- while (1) {
- current->state = TASK_INTERRUPTIBLE;
- schedule();
- /*
- * Return -EINTR and set condition code here,
- * so the interrupted system call actually returns
- * these.
- */
- regs->tstate |= TSTATE_ICARRY;
- regs->u_regs[UREG_I0] = EINTR;
- if (do_signal32(&saveset, regs, 0, 0))
- return;
- }
-}
-
-asmlinkage void do_rt_sigsuspend32(u32 uset, size_t sigsetsize, struct pt_regs *regs)
-{
- sigset_t oldset, set;
- compat_sigset_t set32;
-
- /* XXX: Don't preclude handling different sized sigset_t's. */
- if (((compat_size_t)sigsetsize) != sizeof(sigset_t)) {
- regs->tstate |= TSTATE_ICARRY;
- regs->u_regs[UREG_I0] = EINVAL;
- return;
- }
- if (copy_from_user(&set32, compat_ptr(uset), sizeof(set32))) {
- regs->tstate |= TSTATE_ICARRY;
- regs->u_regs[UREG_I0] = EFAULT;
- return;
- }
- switch (_NSIG_WORDS) {
- case 4: set.sig[3] = set32.sig[6] + (((long)set32.sig[7]) << 32);
- case 3: set.sig[2] = set32.sig[4] + (((long)set32.sig[5]) << 32);
- case 2: set.sig[1] = set32.sig[2] + (((long)set32.sig[3]) << 32);
- case 1: set.sig[0] = set32.sig[0] + (((long)set32.sig[1]) << 32);
- }
- sigdelsetmask(&set, ~_BLOCKABLE);
- spin_lock_irq(¤t->sighand->siglock);
- oldset = current->blocked;
- current->blocked = set;
- recalc_sigpending();
- spin_unlock_irq(¤t->sighand->siglock);
-
- regs->tpc = regs->tnpc;
- regs->tnpc += 4;
- if (test_thread_flag(TIF_32BIT)) {
- regs->tpc &= 0xffffffff;
- regs->tnpc &= 0xffffffff;
- }
-
- /* Condition codes and return value where set here for sigpause,
- * and so got used by setup_frame, which again causes sigreturn()
- * to return -EINTR.
- */
- while (1) {
- current->state = TASK_INTERRUPTIBLE;
- schedule();
- /*
- * Return -EINTR and set condition code here,
- * so the interrupted system call actually returns
- * these.
- */
- regs->tstate |= TSTATE_ICARRY;
- regs->u_regs[UREG_I0] = EINTR;
- if (do_signal32(&oldset, regs, 0, 0))
- return;
- }
-}
-
static int restore_fpu_state32(struct pt_regs *regs, __siginfo_fpu_t __user *fpu)
{
unsigned long *fpregs = current_thread_info()->fpregs;
* want to handle. Thus you cannot kill init even with a SIGKILL even by
* mistake.
*/
-int do_signal32(sigset_t *oldset, struct pt_regs * regs,
- unsigned long orig_i0, int restart_syscall)
+void do_signal32(sigset_t *oldset, struct pt_regs * regs,
+ unsigned long orig_i0, int restart_syscall)
{
siginfo_t info;
struct signal_deliver_cookie cookie;
syscall_restart32(orig_i0, regs, &ka.sa);
handle_signal32(signr, &ka, &info, oldset,
regs, svr4_signal);
- return 1;
+
+ /* a signal was successfully delivered; the saved
+ * sigmask will have been stored in the signal frame,
+ * and will be restored by sigreturn, so we can simply
+ * clear the TIF_RESTORE_SIGMASK flag.
+ */
+ if (test_thread_flag(TIF_RESTORE_SIGMASK))
+ clear_thread_flag(TIF_RESTORE_SIGMASK);
+ return;
}
if (cookie.restart_syscall &&
(regs->u_regs[UREG_I0] == ERESTARTNOHAND ||
regs->tpc -= 4;
regs->tnpc -= 4;
}
- return 0;
+
+ /* if there's no signal to deliver, we just put the saved sigmask
+ * back
+ */
+ if (test_thread_flag(TIF_RESTORE_SIGMASK)) {
+ clear_thread_flag(TIF_RESTORE_SIGMASK);
+ sigprocmask(SIG_SETMASK, ¤t->saved_sigmask, NULL);
+ }
}
struct sigstack32 {
extern void die_if_kernel(char *str, struct pt_regs *regs);
extern pid_t kernel_thread(int (*fn)(void *), void * arg, unsigned long flags);
-void _sigpause_common (unsigned int set, struct pt_regs *);
extern void *__bzero(void *, size_t);
extern void *__memscan_zero(void *, size_t);
extern void *__memscan_generic(void *, int, size_t);
/* I/O device mmaping on Sparc64. */
EXPORT_SYMBOL(io_remap_pfn_range);
+#ifdef CONFIG_COMPAT
/* Solaris/SunOS binary compatibility */
-EXPORT_SYMBOL(_sigpause_common);
EXPORT_SYMBOL(verify_compat_iovec);
+#endif
EXPORT_SYMBOL(dump_fpu);
EXPORT_SYMBOL(pte_alloc_one_kernel);
SIGN2(sys32_bdflush, sys_bdflush, %o0, %o1)
SIGN1(sys32_mlockall, sys_mlockall, %o0)
SIGN1(sys32_nfsservctl, compat_sys_nfsservctl, %o0)
-SIGN1(sys32_clock_settime, compat_sys_clock_settime, %o1)
SIGN1(sys32_clock_nanosleep, compat_sys_clock_nanosleep, %o1)
SIGN1(sys32_timer_settime, compat_sys_timer_settime, %o1)
SIGN1(sys32_io_submit, compat_sys_io_submit, %o1)
return -EFAULT;
}
- return do_utimes(filename, (tvs ? &ktvs[0] : NULL));
+ return do_utimes(AT_FDCWD, filename, (tvs ? &ktvs[0] : NULL));
}
/* These are here just in case some old sparc32 binary calls it. */
asmlinkage long sparc32_open(const char __user *filename,
int flags, int mode)
{
- return do_sys_open(filename, flags, mode);
+ return do_sys_open(AT_FDCWD, filename, flags, mode);
}
extern unsigned long do_mremap(unsigned long addr,
/*90*/ .word sys_dup2, sys_setfsuid, compat_sys_fcntl, sys32_select, sys_setfsgid
.word sys_fsync, sys32_setpriority, sys_nis_syscall, sys_nis_syscall, sys_nis_syscall
/*100*/ .word sys32_getpriority, sys32_rt_sigreturn, sys32_rt_sigaction, sys32_rt_sigprocmask, sys32_rt_sigpending
- .word compat_sys_rt_sigtimedwait, sys32_rt_sigqueueinfo, sys32_rt_sigsuspend, sys_setresuid, sys_getresuid
+ .word compat_sys_rt_sigtimedwait, sys32_rt_sigqueueinfo, compat_sys_rt_sigsuspend, sys_setresuid, sys_getresuid
/*110*/ .word sys_setresgid, sys_getresgid, sys_setregid, sys_nis_syscall, sys_nis_syscall
.word sys32_getgroups, sys32_gettimeofday, sys32_getrusage, sys_nis_syscall, sys_getcwd
/*120*/ .word compat_sys_readv, compat_sys_writev, sys32_settimeofday, sys32_fchown16, sys_fchmod
/*240*/ .word sys_munlockall, sys32_sched_setparam, sys32_sched_getparam, sys32_sched_setscheduler, sys32_sched_getscheduler
.word sys_sched_yield, sys32_sched_get_priority_max, sys32_sched_get_priority_min, sys32_sched_rr_get_interval, compat_sys_nanosleep
/*250*/ .word sys32_mremap, sys32_sysctl, sys32_getsid, sys_fdatasync, sys32_nfsservctl
- .word sys_ni_syscall, sys32_clock_settime, compat_sys_clock_gettime, compat_sys_clock_getres, sys32_clock_nanosleep
+ .word sys_ni_syscall, compat_sys_clock_settime, compat_sys_clock_gettime, compat_sys_clock_getres, sys32_clock_nanosleep
/*260*/ .word compat_sys_sched_getaffinity, compat_sys_sched_setaffinity, sys32_timer_settime, compat_sys_timer_gettime, sys_timer_getoverrun
.word sys_timer_delete, compat_sys_timer_create, sys_ni_syscall, compat_sys_io_setup, sys_io_destroy
/*270*/ .word sys32_io_submit, sys_io_cancel, compat_sys_io_getevents, sys32_mq_open, sys_mq_unlink
.word compat_sys_mq_timedsend, compat_sys_mq_timedreceive, compat_sys_mq_notify, compat_sys_mq_getsetattr, compat_sys_waitid
-/*280*/ .word sys_ni_syscall, sys_add_key, sys_request_key, sys_keyctl
+/*280*/ .word sys_ni_syscall, sys_add_key, sys_request_key, sys_keyctl, compat_sys_openat
+ .word sys_mkdirat, sys_mknodat, sys_fchownat, compat_sys_futimesat, compat_sys_newfstatat
+/*285*/ .word sys_unlinkat, sys_renameat, sys_linkat, sys_symlinkat, sys_readlinkat
+ .word sys_fchmodat, sys_faccessat, compat_sys_pselect6, compat_sys_ppoll
#endif /* CONFIG_COMPAT */
.word sys_timer_delete, sys_timer_create, sys_ni_syscall, sys_io_setup, sys_io_destroy
/*270*/ .word sys_io_submit, sys_io_cancel, sys_io_getevents, sys_mq_open, sys_mq_unlink
.word sys_mq_timedsend, sys_mq_timedreceive, sys_mq_notify, sys_mq_getsetattr, sys_waitid
-/*280*/ .word sys_nis_syscall, sys_add_key, sys_request_key, sys_keyctl
+/*280*/ .word sys_nis_syscall, sys_add_key, sys_request_key, sys_keyctl, sys_openat
+ .word sys_mkdirat, sys_mknodat, sys_fchownat, sys_futimesat, compat_sys_newfstatat
+/*285*/ .word sys_unlinkat, sys_renameat, sys_linkat, sys_symlinkat, sys_readlinkat
+ .word sys_fchmodat, sys_faccessat, sys_pselect6, sys_ppoll
#if defined(CONFIG_SUNOS_EMUL) || defined(CONFIG_SOLARIS_EMUL) || \
defined(CONFIG_SOLARIS_EMUL_MODULE)
/*250*/ .word sunos_nosys, sunos_nosys, sunos_nosys
.word sunos_nosys, sunos_nosys, sunos_nosys
.word sunos_nosys, sunos_nosys, sunos_nosys
+ .word sunos_nosys
+/*260*/ .word sunos_nosys, sunos_nosys, sunos_nosys
.word sunos_nosys, sunos_nosys, sunos_nosys
.word sunos_nosys, sunos_nosys, sunos_nosys
+ .word sunos_nosys
+/*270*/ .word sunos_nosys, sunos_nosys, sunos_nosys
.word sunos_nosys, sunos_nosys, sunos_nosys
.word sunos_nosys, sunos_nosys, sunos_nosys
+ .word sunos_nosys
+/*280*/ .word sunos_nosys, sunos_nosys, sunos_nosys
.word sunos_nosys, sunos_nosys, sunos_nosys
.word sunos_nosys, sunos_nosys, sunos_nosys
+ .word sunos_nosys
+/*290*/ .word sunos_nosys, sunos_nosys, sunos_nosys
.word sunos_nosys, sunos_nosys, sunos_nosys
.word sunos_nosys, sunos_nosys, sunos_nosys
- .word sunos_nosys
#endif
* Since STICK is constantly updating, we have to access it carefully.
*
* The sequence we use to read is:
- * 1) read low
- * 2) read high
- * 3) read low again, if it rolled over increment high by 1
+ * 1) read high
+ * 2) read low
+ * 3) read high again, if it rolled re-read both low and high again.
*
* Writing STICK safely is also tricky:
* 1) write low to zero
static unsigned long __hbird_read_stick(void)
{
unsigned long ret, tmp1, tmp2, tmp3;
- unsigned long addr = HBIRD_STICK_ADDR;
+ unsigned long addr = HBIRD_STICK_ADDR+8;
- __asm__ __volatile__("ldxa [%1] %5, %2\n\t"
- "add %1, 0x8, %1\n\t"
- "ldxa [%1] %5, %3\n\t"
+ __asm__ __volatile__("ldxa [%1] %5, %2\n"
+ "1:\n\t"
"sub %1, 0x8, %1\n\t"
+ "ldxa [%1] %5, %3\n\t"
+ "add %1, 0x8, %1\n\t"
"ldxa [%1] %5, %4\n\t"
"cmp %4, %2\n\t"
- "blu,a,pn %%xcc, 1f\n\t"
- " add %3, 1, %3\n"
- "1:\n\t"
- "sllx %3, 32, %3\n\t"
+ "bne,a,pn %%xcc, 1b\n\t"
+ " mov %4, %2\n\t"
+ "sllx %4, 32, %4\n\t"
"or %3, %4, %0\n\t"
: "=&r" (ret), "=&r" (addr),
"=&r" (tmp1), "=&r" (tmp2), "=&r" (tmp3)
if (!strncmp(propb, "keyboard", 8))
return PROMDEV_ITTYA;
+ if (!strncmp (propb, "rsc", 3))
+ return PROMDEV_IRSC;
+
if (strncmp (propb, "tty", 3) || !propb[3])
return PROMDEV_I_UNK;
+
switch (propb[3]) {
case 'a': return PROMDEV_ITTYA;
case 'b': return PROMDEV_ITTYB;
if (!strncmp(propb, "screen", 6))
return PROMDEV_OTTYA;
+ if (!strncmp (propb, "rsc", 3))
+ return PROMDEV_ORSC;
+
if (strncmp (propb, "tty", 3) || !propb[3])
return PROMDEV_O_UNK;
+
switch (propb[3]) {
case 'a': return PROMDEV_OTTYA;
case 'b': return PROMDEV_OTTYB;
nop
call sys_sigsuspend
stx %o0, [%sp + PTREGS_OFF + PT_V9_I0]
+ b,pt %xcc, ret_from_solaris
+ nop
.globl solaris_getpid
solaris_getpid:
config HPPFS
tristate "HoneyPot ProcFS (EXPERIMENTAL)"
+ depends on EXPERIMENTAL
help
hppfs (HoneyPot ProcFS) is a filesystem which allows UML /proc
entries to be overridden, removed, or fabricated from the host.
You only need this if you are setting up a UML honeypot. Otherwise,
it is safe to say 'N' here.
- If you are actively using it, please report any problems, since it's
- getting fixed. In this moment, it is experimental on 2.6 (it works on
- 2.4).
-
config MCONSOLE
bool "Management console"
default y
Only change this if you are running nested UMLs.
config HIGHMEM
- bool "Highmem support"
- depends on !64BIT
+ bool "Highmem support (EXPERIMENTAL)"
+ depends on !64BIT && EXPERIMENTAL
+ default n
+ help
+ This was used to allow UML to run with big amounts of memory.
+ Currently it is unstable, so if unsure say N.
+
+ To use big amounts of memory, it is recommended to disable TT mode (i.e.
+ CONFIG_MODE_TT) and enable static linking (i.e. CONFIG_STATIC_LINK) -
+ this should allow the guest to use up to 2.75G of memory.
config KERNEL_STACK_ORDER
int "Kernel stack size order"
source "init/Kconfig"
-source "net/Kconfig"
-
-source "drivers/base/Kconfig"
+source "drivers/block/Kconfig"
source "arch/um/Kconfig.char"
-source "drivers/block/Kconfig"
+source "drivers/base/Kconfig"
-config NETDEVICES
- bool
- default NET
+source "net/Kconfig"
source "arch/um/Kconfig.net"
default 0x80000000 if HOST_2G_2G
config 3_LEVEL_PGTABLES
- bool "Three-level pagetables"
+ bool "Three-level pagetables (EXPERIMENTAL)"
default n
+ depends on EXPERIMENTAL
help
Three-level pagetables will let UML have more than 4G of physical
memory. All the memory that can't be mapped directly will be treated
as high memory.
+ However, this it experimental on 32-bit architectures, so if unsure say
+ N (on x86-64 it's automatically enabled, instead, as it's safe there).
+
config STUB_CODE
hex
default 0xbfffe000
um-modes-$(CONFIG_MODE_SKAS) += skas
MODE_INCLUDE += $(foreach mode,$(um-modes-y),\
- -I$(srctree)/$(ARCH_DIR)/kernel/$(mode)/include)
+ -I$(srctree)/$(ARCH_DIR)/include/$(mode))
MAKEFILES-INCL += $(foreach mode,$(um-modes-y),\
$(srctree)/$(ARCH_DIR)/Makefile-$(mode))
dpri->fd = -1;
dpri->control = -1;
dpri->dev = dev;
+ /* We will free this pointer. If it contains crap we're burned. */
+ dpri->ctl_addr = NULL;
+ dpri->data_addr = NULL;
+ dpri->local_addr = NULL;
printk("daemon backend (uml_switch version %d) - %s:%s",
SWITCH_VERSION, dpri->sock_type, dpri->ctl_sock);
struct daemon_data *pri = data;
os_close_file(pri->fd);
+ pri->fd = -1;
os_close_file(pri->control);
+ pri->control = -1;
+
kfree(pri->data_addr);
+ pri->data_addr = NULL;
kfree(pri->ctl_addr);
+ pri->ctl_addr = NULL;
kfree(pri->local_addr);
+ pri->local_addr = NULL;
}
int daemon_user_write(int fd, void *buf, int len, struct daemon_data *pri)
#include "user.h"
#include "user_util.h"
#include "chan_user.h"
+#include "os.h"
struct fd_chan {
int fd;
return pkt_len;
}
+static void uml_dev_close(void* dev)
+{
+ dev_close( (struct net_device *) dev);
+}
+
irqreturn_t uml_net_interrupt(int irq, void *dev_id, struct pt_regs *regs)
{
struct net_device *dev = dev_id;
spin_lock(&lp->lock);
while((err = uml_net_rx(dev)) > 0) ;
if(err < 0) {
+ DECLARE_WORK(close_work, uml_dev_close, dev);
printk(KERN_ERR
"Device '%s' read returned %d, shutting it down\n",
dev->name, err);
- dev_close(dev);
+ /* dev_close can't be called in interrupt context, and takes
+ * again lp->lock.
+ * And dev_close() can be safely called multiple times on the
+ * same device, since it tests for (dev->flags & IFF_UP). So
+ * there's no harm in delaying the device shutdown. */
+ schedule_work(&close_work);
goto out;
}
reactivate_fd(lp->fd, UM_ETH_IRQ);
- out:
+out:
spin_unlock(&lp->lock);
return(IRQ_HANDLED);
}
return 1;
}
+ lp = dev->priv;
+ /* This points to the transport private data. It's still clear, but we
+ * must memset it to 0 *now*. Let's help the drivers. */
+ memset(lp, 0, size);
+
/* sysfs register */
if (!driver_registered) {
platform_driver_register(¨_net_driver);
free_netdev(dev);
return 1;
}
- lp = dev->priv;
/* lp.user is the first four bytes of the transport data, which
* has already been initialized. This structure assignment will
return(-EINVAL);
}
-static int same_backing_files(char *from_cmdline, char *from_cow, char *cow)
+static int path_requires_switch(char *from_cmdline, char *from_cow, char *cow)
{
struct uml_stat buf1, buf2;
int err;
- if(from_cmdline == NULL) return(1);
- if(!strcmp(from_cmdline, from_cow)) return(1);
+ if(from_cmdline == NULL)
+ return 0;
+ if(!strcmp(from_cmdline, from_cow))
+ return 0;
err = os_stat_file(from_cmdline, &buf1);
if(err < 0){
printk("Couldn't stat '%s', err = %d\n", from_cmdline, -err);
- return(1);
+ return 0;
}
err = os_stat_file(from_cow, &buf2);
if(err < 0){
printk("Couldn't stat '%s', err = %d\n", from_cow, -err);
- return(1);
+ return 1;
}
if((buf1.ust_dev == buf2.ust_dev) && (buf1.ust_ino == buf2.ust_ino))
- return(1);
+ return 0;
printk("Backing file mismatch - \"%s\" requested,\n"
"\"%s\" specified in COW header of \"%s\"\n",
from_cmdline, from_cow, cow);
- return(0);
+ return 1;
}
static int backing_file_mismatch(char *file, __u64 size, time_t mtime)
unsigned long long size;
__u32 version, align;
char *backing_file;
- int fd, err, sectorsize, same, mode = 0644;
+ int fd, err, sectorsize, asked_switch, mode = 0644;
fd = os_open_file(file, *openflags, mode);
- if(fd < 0){
- if((fd == -ENOENT) && (create_cow_out != NULL))
+ if (fd < 0) {
+ if ((fd == -ENOENT) && (create_cow_out != NULL))
*create_cow_out = 1;
- if(!openflags->w ||
- ((fd != -EROFS) && (fd != -EACCES))) return(fd);
+ if (!openflags->w ||
+ ((fd != -EROFS) && (fd != -EACCES)))
+ return fd;
openflags->w = 0;
fd = os_open_file(file, *openflags, mode);
- if(fd < 0)
- return(fd);
+ if (fd < 0)
+ return fd;
}
err = os_lock_file(fd, openflags->w);
goto out_close;
}
- if(backing_file_out == NULL) return(fd);
+ /* Succesful return case! */
+ if(backing_file_out == NULL)
+ return(fd);
err = read_cow_header(file_reader, &fd, &version, &backing_file, &mtime,
&size, §orsize, &align, bitmap_offset_out);
"errno = %d\n", file, -err);
goto out_close;
}
- if(err) return(fd);
-
- if(backing_file_out == NULL) return(fd);
+ if(err)
+ return(fd);
- same = same_backing_files(*backing_file_out, backing_file, file);
+ asked_switch = path_requires_switch(*backing_file_out, backing_file, file);
- if(!same && !backing_file_mismatch(*backing_file_out, size, mtime)){
+ /* Allow switching only if no mismatch. */
+ if (asked_switch && !backing_file_mismatch(*backing_file_out, size, mtime)) {
printk("Switching backing file to '%s'\n", *backing_file_out);
err = write_cow_header(file, fd, *backing_file_out,
sectorsize, align, &size);
- if(err){
+ if (err) {
printk("Switch failed, errno = %d\n", -err);
- return(err);
+ goto out_close;
}
- }
- else {
+ } else {
*backing_file_out = backing_file;
err = backing_file_mismatch(*backing_file_out, size, mtime);
- if(err) goto out_close;
+ if (err)
+ goto out_close;
}
cow_sizes(version, size, sectorsize, align, *bitmap_offset_out,
bitmap_len_out, data_offset_out);
- return(fd);
+ return fd;
out_close:
os_close_file(fd);
- return(err);
+ return err;
}
int create_cow_file(char *cow_file, char *backing_file, struct openflags flags,
extern int is_syscall(unsigned long addr);
extern void arch_switch(void);
extern void free_irq(unsigned int, void *);
-extern int um_in_interrupt(void);
extern int cpu(void);
+
+/* Are we disallowed to sleep? Used to choose between GFP_KERNEL and GFP_ATOMIC. */
+extern int __cant_sleep(void);
extern void segv_handler(int sig, union uml_pt_regs *regs);
extern void sigio_handler(int sig, union uml_pt_regs *regs);
--- /dev/null
+#ifndef __UML_LONGJMP_H
+#define __UML_LONGJMP_H
+
+#include <setjmp.h>
+#include "os.h"
+
+#define UML_SIGLONGJMP(buf, val) do { \
+ longjmp(*buf, val); \
+} while(0)
+
+#define UML_SIGSETJMP(buf, enable) ({ \
+ int n; \
+ enable = get_signals(); \
+ n = setjmp(*buf); \
+ if(n != 0) \
+ set_signals(enable); \
+ n; })
+
+#endif
#include "linux/config.h"
#ifdef CONFIG_MODE_TT
-#include "mode_kern-tt.h"
+#include "mode_kern_tt.h"
#endif
#ifdef CONFIG_MODE_SKAS
-#include "mode_kern-skas.h"
+#include "mode_kern_skas.h"
#endif
#endif
-
-/*
- * Overrides for Emacs so that we follow Linus's tabbing style.
- * Emacs will notice this stuff at the end of the file and automatically
- * adjust the settings for this buffer only. This must remain at the end
- * of the file.
- * ---------------------------------------------------------------------------
- * Local variables:
- * c-file-style: "linux"
- * End:
- */
#include "../os/include/file.h"
#include "sysdep/ptrace.h"
#include "kern_util.h"
+#include "skas/mm_id.h"
#define OS_TYPE_FILE 1
#define OS_TYPE_DIR 2
int r, int w, int x);
extern int os_unmap_memory(void *addr, int len);
extern void os_flush_stdout(void);
-extern unsigned long long os_usecs(void);
/* tt.c
* for tt mode only (will be deleted in future...)
*/
+extern void stop(void);
+extern int wait_for_stop(int pid, int sig, int cont_type, void *relay);
extern int protect_memory(unsigned long addr, unsigned long len,
int r, int w, int x, int must_succeed);
extern void forward_pending_sigio(int target);
extern void unblock_signals(void);
extern int get_signals(void);
extern int set_signals(int enable);
+extern void os_usr1_signal(int on);
/* trap.c */
extern void os_fill_handlinfo(struct kern_handlers h);
extern void do_longjmp(void *p, int val);
+/* util.c */
+extern void stack_protections(unsigned long address);
+extern void task_protections(unsigned long address);
+extern int raw(int fd);
+extern void setup_machinename(char *machine_out);
+extern void setup_hostinfo(void);
+extern int setjmp_wrapper(void (*proc)(void *, void *), ...);
+
+/* time.c */
+#define BILLION (1000 * 1000 * 1000)
+
+extern void switch_timers(int to_real);
+extern void idle_sleep(int secs);
+extern void enable_timer(void);
+extern void disable_timer(void);
+extern void user_time_init(void);
+extern void uml_idle_timer(void);
+extern unsigned long long os_nsecs(void);
+
+/* skas/mem.c */
+extern long run_syscall_stub(struct mm_id * mm_idp,
+ int syscall, unsigned long *args, long expected,
+ void **addr, int done);
+extern long syscall_stub_data(struct mm_id * mm_idp,
+ unsigned long *data, int data_count,
+ void **addr, void **stub_addr);
+extern int map(struct mm_id * mm_idp, unsigned long virt,
+ unsigned long len, int r, int w, int x, int phys_fd,
+ unsigned long long offset, int done, void **data);
+extern int unmap(struct mm_id * mm_idp, void *addr, unsigned long len,
+ int done, void **data);
+extern int protect(struct mm_id * mm_idp, unsigned long addr,
+ unsigned long len, int r, int w, int x, int done,
+ void **data);
+
+/* skas/process.c */
+extern int is_skas_winch(int pid, int fd, void *data);
+extern int start_userspace(unsigned long stub_stack);
+extern int copy_context_skas0(unsigned long stack, int pid);
+extern void userspace(union uml_pt_regs *regs);
+extern void map_stub_pages(int fd, unsigned long code,
+ unsigned long data, unsigned long stack);
+extern void new_thread(void *stack, void **switch_buf_ptr,
+ void **fork_buf_ptr, void (*handler)(int));
+extern void thread_wait(void *sw, void *fb);
+extern void switch_threads(void *me, void *next);
+extern int start_idle_thread(void *stack, void *switch_buf_ptr,
+ void **fork_buf_ptr);
+extern void initial_thread_cb_skas(void (*proc)(void *),
+ void *arg);
+extern void halt_skas(void);
+extern void reboot_skas(void);
+
#endif
--- /dev/null
+/*
+ * Copyright (C) 2002 Jeff Dike (jdike@karaya.com)
+ * Licensed under the GPL
+ */
+
+#ifndef __SKAS_MMU_H
+#define __SKAS_MMU_H
+
+#include "linux/config.h"
+#include "mm_id.h"
+#include "asm/ldt.h"
+
+struct mmu_context_skas {
+ struct mm_id id;
+ unsigned long last_page_table;
+#ifdef CONFIG_3_LEVEL_PGTABLES
+ unsigned long last_pmd;
+#endif
+ uml_ldt_t ldt;
+};
+
+extern void switch_mm_skas(struct mm_id * mm_idp);
+
+#endif
--- /dev/null
+/*
+ * Copyright (C) 2002 Jeff Dike (jdike@karaya.com)
+ * Licensed under the GPL
+ */
+
+#ifndef __MODE_SKAS_H__
+#define __MODE_SKAS_H__
+
+#include <sysdep/ptrace.h>
+
+extern unsigned long exec_regs[];
+extern unsigned long exec_fp_regs[];
+extern unsigned long exec_fpx_regs[];
+extern int have_fpx_regs;
+
+extern void sig_handler_common_skas(int sig, void *sc_ptr);
+extern void kill_off_processes_skas(void);
+
+#endif
unsigned long sp, unsigned long stack_top,
struct task_struct *p, struct pt_regs *regs);
extern void release_thread_skas(struct task_struct *task);
-extern void initial_thread_cb_skas(void (*proc)(void *), void *arg);
extern void init_idle_skas(void);
extern void flush_tlb_kernel_range_skas(unsigned long start,
unsigned long end);
#define kmem_end_skas (host_task_size - 1024 * 1024)
#endif
-
-/*
- * Overrides for Emacs so that we follow Linus's tabbing style.
- * Emacs will notice this stuff at the end of the file and automatically
- * adjust the settings for this buffer only. This must remain at the end
- * of the file.
- * ---------------------------------------------------------------------------
- * Local variables:
- * c-file-style: "linux"
- * End:
- */
-/*
+/*
* Copyright (C) 2002 Jeff Dike (jdike@karaya.com)
* Licensed under the GPL
*/
struct mm_munmap {
unsigned long addr;
- unsigned long len;
+ unsigned long len;
};
struct mm_mprotect {
unsigned long addr;
unsigned long len;
- unsigned int prot;
+ unsigned int prot;
};
struct proc_mm_op {
};
#endif
-
-/*
- * Overrides for Emacs so that we follow Linus's tabbing style.
- * Emacs will notice this stuff at the end of the file and automatically
- * adjust the settings for this buffer only. This must remain at the end
- * of the file.
- * ---------------------------------------------------------------------------
- * Local variables:
- * c-file-style: "linux"
- * End:
- */
--- /dev/null
+/*
+ * Copyright (C) 2002 Jeff Dike (jdike@karaya.com)
+ * Licensed under the GPL
+ */
+
+#ifndef __SKAS_H
+#define __SKAS_H
+
+#include "mm_id.h"
+#include "sysdep/ptrace.h"
+
+extern int userspace_pid[];
+extern int proc_mm, ptrace_faultinfo, ptrace_ldt;
+extern int skas_needs_stub;
+
+extern int user_thread(unsigned long stack, int flags);
+extern void new_thread_proc(void *stack, void (*handler)(int sig));
+extern void new_thread_handler(int sig);
+extern void handle_syscall(union uml_pt_regs *regs);
+extern void user_signal(int sig, union uml_pt_regs *regs, int pid);
+extern int new_mm(unsigned long stack);
+extern void get_skas_faultinfo(int pid, struct faultinfo * fi);
+extern long execute_syscall_skas(void *r);
+extern unsigned long current_stub_stack(void);
+
+#endif
extern int strnlen_user_skas(const void __user *str, int len);
#endif
-
-/*
- * Overrides for Emacs so that we follow Linus's tabbing style.
- * Emacs will notice this stuff at the end of the file and automatically
- * adjust the settings for this buffer only. This must remain at the end
- * of the file.
- * ---------------------------------------------------------------------------
- * Local variables:
- * c-file-style: "linux"
- * End:
- */
+++ /dev/null
-/*
- * Copyright (C) 2002 Jeff Dike (jdike@karaya.com)
- * Licensed under the GPL
- */
-
-#ifndef __TIME_USER_H__
-#define __TIME_USER_H__
-
-extern void timer(void);
-extern void switch_timers(int to_real);
-extern void idle_sleep(int secs);
-extern void enable_timer(void);
-extern void prepare_timer(void * ptr);
-extern void disable_timer(void);
-extern unsigned long time_lock(void);
-extern void time_unlock(unsigned long);
-extern void user_time_init(void);
-
-#endif
-/*
+/*
* Copyright (C) 2000, 2001, 2002 Jeff Dike (jdike@karaya.com) and
* Lars Brinkhoff.
* Licensed under the GPL
--- /dev/null
+/*
+ * Copyright (C) 2002 Jeff Dike (jdike@karaya.com)
+ * Licensed under the GPL
+ */
+
+#ifndef __TT_MMU_H
+#define __TT_MMU_H
+
+struct mmu_context_tt {
+};
+
+#endif
--- /dev/null
+/*
+ * Copyright (C) 2002 Jeff Dike (jdike@karaya.com)
+ * Licensed under the GPL
+ */
+
+#ifndef __MODE_TT_H__
+#define __MODE_TT_H__
+
+#include "sysdep/ptrace.h"
+
+enum { OP_NONE, OP_EXEC, OP_FORK, OP_TRACE_ON, OP_REBOOT, OP_HALT, OP_CB };
+
+extern int tracing_pid;
+
+extern int tracer(int (*init_proc)(void *), void *sp);
+extern void sig_handler_common_tt(int sig, void *sc);
+extern void syscall_handler_tt(int sig, union uml_pt_regs *regs);
+extern void reboot_tt(void);
+extern void halt_tt(void);
+extern int is_tracer_winch(int pid, int fd, void *data);
+extern void kill_off_processes_tt(void);
+
+#endif
--- /dev/null
+/*
+ * Copyright (C) 2002 Jeff Dike (jdike@karaya.com)
+ * Licensed under the GPL
+ */
+
+#ifndef __TT_MODE_KERN_H__
+#define __TT_MODE_KERN_H__
+
+#include "linux/sched.h"
+#include "asm/page.h"
+#include "asm/ptrace.h"
+#include "asm/uaccess.h"
+
+extern void switch_to_tt(void *prev, void *next);
+extern void flush_thread_tt(void);
+extern void start_thread_tt(struct pt_regs *regs, unsigned long eip,
+ unsigned long esp);
+extern int copy_thread_tt(int nr, unsigned long clone_flags, unsigned long sp,
+ unsigned long stack_top, struct task_struct *p,
+ struct pt_regs *regs);
+extern void release_thread_tt(struct task_struct *task);
+extern void initial_thread_cb_tt(void (*proc)(void *), void *arg);
+extern void init_idle_tt(void);
+extern void flush_tlb_kernel_range_tt(unsigned long start, unsigned long end);
+extern void flush_tlb_kernel_vm_tt(void);
+extern void __flush_tlb_one_tt(unsigned long addr);
+extern void flush_tlb_range_tt(struct vm_area_struct *vma,
+ unsigned long start, unsigned long end);
+extern void flush_tlb_mm_tt(struct mm_struct *mm);
+extern void force_flush_all_tt(void);
+extern long execute_syscall_tt(void *r);
+extern void before_mem_tt(unsigned long brk_start);
+extern unsigned long set_task_sizes_tt(int arg, unsigned long *host_size_out,
+ unsigned long *task_size_out);
+extern int start_uml_tt(void);
+extern int external_pid_tt(struct task_struct *task);
+extern int thread_pid_tt(struct task_struct *task);
+
+#define kmem_end_tt (host_task_size - ABOVE_KMEM)
+
+#endif
-/*
+/*
* Copyright (C) 2002 Jeff Dike (jdike@karaya.com)
* Licensed under the GPL
*/
#endif
-/*
- * Overrides for Emacs so that we follow Linus's tabbing style.
- * Emacs will notice this stuff at the end of the file and automatically
- * adjust the settings for this buffer only. This must remain at the end
- * of the file.
- * ---------------------------------------------------------------------------
- * Local variables:
- * c-file-style: "linux"
- * End:
- */
extern int strnlen_user_tt(const void __user *str, int len);
#endif
-
-/*
- * Overrides for Emacs so that we follow Linus's tabbing style.
- * Emacs will notice this stuff at the end of the file and automatically
- * adjust the settings for this buffer only. This must remain at the end
- * of the file.
- * ---------------------------------------------------------------------------
- * Local variables:
- * c-file-style: "linux"
- * End:
- */
extern unsigned long strlcpy(char *, const char *, unsigned long);
extern unsigned long strlcat(char *, const char *, unsigned long);
extern void *um_vmalloc(int size);
+extern void *um_vmalloc_atomic(int size);
extern void vfree(void *ptr);
#endif
extern int pty_output_sigio;
extern int pty_close_sigio;
-extern void stop(void);
-extern void stack_protections(unsigned long address);
-extern void task_protections(unsigned long address);
-extern int wait_for_stop(int pid, int sig, int cont_type, void *relay);
extern void *add_signal_handler(int sig, void (*handler)(int));
extern int linux_main(int argc, char **argv);
extern void set_cmdline(char *cmd);
extern int get_pty(void);
extern void *um_kmalloc(int size);
extern int switcheroo(int fd, int prot, void *from, void *to, int size);
-extern void setup_machinename(char *machine_out);
-extern void setup_hostinfo(void);
extern void do_exec(int old_pid, int new_pid);
extern void tracer_panic(char *msg, ...);
extern int detach(int pid, int sig);
extern int arch_handle_signal(int sig, union uml_pt_regs *regs);
extern int arch_fixup(unsigned long address, void *sc_ptr);
extern void arch_init_thread(void);
-extern int setjmp_wrapper(void (*proc)(void *, void *), ...);
extern int raw(int fd);
#endif
-
-/*
- * Overrides for Emacs so that we follow Linus's tabbing style.
- * Emacs will notice this stuff at the end of the file and automatically
- * adjust the settings for this buffer only. This must remain at the end
- * of the file.
- * ---------------------------------------------------------------------------
- * Local variables:
- * c-file-style: "linux"
- * End:
- */
obj-y = config.o exec_kern.o exitcode.o \
init_task.o irq.o irq_user.o ksyms.o mem.o physmem.o \
process_kern.o ptrace.o reboot.o resource.o sigio_user.o sigio_kern.o \
- signal_kern.o smp.o syscall_kern.o sysrq.o time.o \
- time_kern.o tlb.o trap_kern.o uaccess.o um_arch.o umid.o \
- user_util.o
+ signal_kern.o smp.o syscall_kern.o sysrq.o \
+ time_kern.o tlb.o trap_kern.o uaccess.o um_arch.o umid.o
obj-$(CONFIG_BLK_DEV_INITRD) += initrd.o
obj-$(CONFIG_GPROF) += gprof_syms.o
user-objs-$(CONFIG_TTY_LOG) += tty_log.o
-USER_OBJS := $(user-objs-y) config.o time.o tty_log.o user_util.o
+USER_OBJS := $(user-objs-y) config.o tty_log.o
include arch/um/scripts/Makefile.rules
#include "irq_user.h"
#include "tlb.h"
#include "os.h"
-#include "time_user.h"
#include "choose-mode.h"
#include "mode_kern.h"
#include "init.h"
#include "irq_user.h"
#include "mem_user.h"
-#include "time_user.h"
#include "tlb.h"
#include "frame_kern.h"
#include "sigcontext.h"
void *um_kmalloc(int size)
{
- return(kmalloc(size, GFP_KERNEL));
+ return kmalloc(size, GFP_KERNEL);
}
void *um_kmalloc_atomic(int size)
{
- return(kmalloc(size, GFP_ATOMIC));
+ return kmalloc(size, GFP_ATOMIC);
}
void *um_vmalloc(int size)
{
- return(vmalloc(size));
+ return vmalloc(size);
+}
+
+void *um_vmalloc_atomic(int size)
+{
+ return __vmalloc(size, GFP_ATOMIC | __GFP_HIGHMEM, PAGE_KERNEL);
+}
+
+int __cant_sleep(void) {
+ return in_atomic() || irqs_disabled() || in_interrupt();
+ /* Is in_interrupt() really needed? */
}
unsigned long get_fault_addr(void)
return(0);
}
-int um_in_interrupt(void)
-{
- return(in_interrupt());
-}
-
int cpu(void)
{
return(current_thread->cpu);
return(err);
}
-static int setup_initial_poll(int fd)
+static struct pollfd* setup_initial_poll(int fd)
{
struct pollfd *p;
- p = um_kmalloc_atomic(sizeof(struct pollfd));
- if(p == NULL){
+ p = um_kmalloc(sizeof(struct pollfd));
+ if (p == NULL) {
printk("setup_initial_poll : failed to allocate poll\n");
- return(-1);
+ return NULL;
}
*p = ((struct pollfd) { .fd = fd,
.events = POLLIN,
.revents = 0 });
- current_poll = ((struct pollfds) { .poll = p,
- .used = 1,
- .size = 1 });
- return(0);
+ return p;
}
void write_sigio_workaround(void)
{
unsigned long stack;
+ struct pollfd *p;
int err;
+ int l_write_sigio_fds[2];
+ int l_sigio_private[2];
+ int l_write_sigio_pid;
+ /* We call this *tons* of times - and most ones we must just fail. */
sigio_lock();
- if(write_sigio_pid != -1)
- goto out;
+ l_write_sigio_pid = write_sigio_pid;
+ sigio_unlock();
- err = os_pipe(write_sigio_fds, 1, 1);
+ if (l_write_sigio_pid != -1)
+ return;
+
+ err = os_pipe(l_write_sigio_fds, 1, 1);
if(err < 0){
printk("write_sigio_workaround - os_pipe 1 failed, "
"err = %d\n", -err);
- goto out;
+ return;
}
- err = os_pipe(sigio_private, 1, 1);
+ err = os_pipe(l_sigio_private, 1, 1);
if(err < 0){
- printk("write_sigio_workaround - os_pipe 2 failed, "
+ printk("write_sigio_workaround - os_pipe 1 failed, "
"err = %d\n", -err);
goto out_close1;
}
- if(setup_initial_poll(sigio_private[1]))
+
+ p = setup_initial_poll(l_sigio_private[1]);
+ if(!p)
goto out_close2;
- write_sigio_pid = run_helper_thread(write_sigio_thread, NULL,
+ sigio_lock();
+
+ /* Did we race? Don't try to optimize this, please, it's not so likely
+ * to happen, and no more than once at the boot. */
+ if(write_sigio_pid != -1)
+ goto out_unlock;
+
+ write_sigio_pid = run_helper_thread(write_sigio_thread, NULL,
CLONE_FILES | CLONE_VM, &stack, 0);
- if(write_sigio_pid < 0) goto out_close2;
+ if (write_sigio_pid < 0)
+ goto out_clear;
- if(write_sigio_irq(write_sigio_fds[0]))
+ if (write_sigio_irq(l_write_sigio_fds[0]))
goto out_kill;
- out:
+ /* Success, finally. */
+ memcpy(write_sigio_fds, l_write_sigio_fds, sizeof(l_write_sigio_fds));
+ memcpy(sigio_private, l_sigio_private, sizeof(l_sigio_private));
+
+ current_poll = ((struct pollfds) { .poll = p,
+ .used = 1,
+ .size = 1 });
+
sigio_unlock();
return;
out_kill:
- os_kill_process(write_sigio_pid, 1);
+ l_write_sigio_pid = write_sigio_pid;
write_sigio_pid = -1;
+ sigio_unlock();
+ /* Going to call waitpid, avoid holding the lock. */
+ os_kill_process(l_write_sigio_pid, 1);
+ goto out_free;
+
+ out_clear:
+ write_sigio_pid = -1;
+ out_unlock:
+ sigio_unlock();
+ out_free:
+ kfree(p);
out_close2:
- os_close_file(sigio_private[0]);
- os_close_file(sigio_private[1]);
+ os_close_file(l_sigio_private[0]);
+ os_close_file(l_sigio_private[1]);
out_close1:
- os_close_file(write_sigio_fds[0]);
- os_close_file(write_sigio_fds[1]);
- sigio_unlock();
+ os_close_file(l_write_sigio_fds[0]);
+ os_close_file(l_write_sigio_fds[1]);
+ return;
}
int read_sigio_fd(int fd)
return err;
}
-static int kern_do_signal(struct pt_regs *regs, sigset_t *oldset)
+static int kern_do_signal(struct pt_regs *regs)
{
struct k_sigaction ka_copy;
siginfo_t info;
+ sigset_t *oldset;
int sig, handled_sig = 0;
+ if (test_thread_flag(TIF_RESTORE_SIGMASK))
+ oldset = ¤t->saved_sigmask;
+ else
+ oldset = ¤t->blocked;
+
while((sig = get_signal_to_deliver(&info, &ka_copy, regs, NULL)) > 0){
handled_sig = 1;
/* Whee! Actually deliver the signal. */
- if(!handle_signal(regs, sig, &ka_copy, &info, oldset))
+ if(!handle_signal(regs, sig, &ka_copy, &info, oldset)){
+ /* a signal was successfully delivered; the saved
+ * sigmask will have been stored in the signal frame,
+ * and will be restored by sigreturn, so we can simply
+ * clear the TIF_RESTORE_SIGMASK flag */
+ if (test_thread_flag(TIF_RESTORE_SIGMASK))
+ clear_thread_flag(TIF_RESTORE_SIGMASK);
break;
+ }
}
/* Did we come from a system call? */
if(!handled_sig && (PT_REGS_SYSCALL_NR(regs) >= 0)){
/* Restart the system call - no handlers present */
- if(PT_REGS_SYSCALL_RET(regs) == -ERESTARTNOHAND ||
- PT_REGS_SYSCALL_RET(regs) == -ERESTARTSYS ||
- PT_REGS_SYSCALL_RET(regs) == -ERESTARTNOINTR){
+ switch(PT_REGS_SYSCALL_RET(regs)){
+ case -ERESTARTNOHAND:
+ case -ERESTARTSYS:
+ case -ERESTARTNOINTR:
PT_REGS_ORIG_SYSCALL(regs) = PT_REGS_SYSCALL_NR(regs);
PT_REGS_RESTART_SYSCALL(regs);
- }
- else if(PT_REGS_SYSCALL_RET(regs) == -ERESTART_RESTARTBLOCK){
+ break;
+ case -ERESTART_RESTARTBLOCK:
PT_REGS_SYSCALL_RET(regs) = __NR_restart_syscall;
PT_REGS_RESTART_SYSCALL(regs);
+ break;
}
}
if(current->ptrace & PT_DTRACE)
current->thread.singlestep_syscall =
is_syscall(PT_REGS_IP(¤t->thread.regs));
+
+ /* if there's no signal to deliver, we just put the saved sigmask
+ * back */
+ if (!handled_sig && test_thread_flag(TIF_RESTORE_SIGMASK)) {
+ clear_thread_flag(TIF_RESTORE_SIGMASK);
+ sigprocmask(SIG_SETMASK, ¤t->saved_sigmask, NULL);
+ }
return(handled_sig);
}
int do_signal(void)
{
- return(kern_do_signal(¤t->thread.regs, ¤t->blocked));
+ return(kern_do_signal(¤t->thread.regs));
}
/*
*/
long sys_sigsuspend(int history0, int history1, old_sigset_t mask)
{
- sigset_t saveset;
-
mask &= _BLOCKABLE;
spin_lock_irq(¤t->sighand->siglock);
- saveset = current->blocked;
+ current->saved_sigmask = current->blocked;
siginitset(¤t->blocked, mask);
recalc_sigpending();
spin_unlock_irq(¤t->sighand->siglock);
- PT_REGS_SYSCALL_RET(¤t->thread.regs) = -EINTR;
- while (1) {
- current->state = TASK_INTERRUPTIBLE;
- schedule();
- if(kern_do_signal(¤t->thread.regs, &saveset))
- return(-EINTR);
- }
-}
-
-long sys_rt_sigsuspend(sigset_t __user *unewset, size_t sigsetsize)
-{
- sigset_t saveset, newset;
-
- /* XXX: Don't preclude handling different sized sigset_t's. */
- if (sigsetsize != sizeof(sigset_t))
- return -EINVAL;
-
- if (copy_from_user(&newset, unewset, sizeof(newset)))
- return -EFAULT;
- sigdelsetmask(&newset, ~_BLOCKABLE);
-
- spin_lock_irq(¤t->sighand->siglock);
- saveset = current->blocked;
- current->blocked = newset;
- recalc_sigpending();
- spin_unlock_irq(¤t->sighand->siglock);
-
- PT_REGS_SYSCALL_RET(¤t->thread.regs) = -EINTR;
- while (1) {
- current->state = TASK_INTERRUPTIBLE;
- schedule();
- if (kern_do_signal(¤t->thread.regs, &saveset))
- return(-EINTR);
- }
+ current->state = TASK_INTERRUPTIBLE;
+ schedule();
+ set_thread_flag(TIF_RESTORE_SIGMASK);
+ return -ERESTARTNOHAND;
}
long sys_sigaltstack(const stack_t __user *uss, stack_t __user *uoss)
{
return(do_sigaltstack(uss, uoss, PT_REGS_SP(¤t->thread.regs)));
}
-
-/*
- * Overrides for Emacs so that we follow Linus's tabbing style.
- * Emacs will notice this stuff at the end of the file and automatically
- * adjust the settings for this buffer only. This must remain at the end
- * of the file.
- * ---------------------------------------------------------------------------
- * Local variables:
- * c-file-style: "linux"
- * End:
- */
-#
+#
# Copyright (C) 2002 - 2004 Jeff Dike (jdike@addtoit.com)
# Licensed under the GPL
#
-obj-y := clone.o exec_kern.o mem.o mem_user.o mmu.o process.o process_kern.o \
+obj-y := clone.o exec_kern.o mem.o mmu.o process_kern.o \
syscall.o tlb.o uaccess.o
-USER_OBJS := process.o clone.o
+USER_OBJS := clone.o
include arch/um/scripts/Makefile.rules
+++ /dev/null
-/*
- * Copyright (C) 2002 Jeff Dike (jdike@karaya.com)
- * Licensed under the GPL
- */
-
-#ifndef __SKAS_MMU_H
-#define __SKAS_MMU_H
-
-#include "linux/config.h"
-#include "mm_id.h"
-#include "asm/ldt.h"
-
-struct mmu_context_skas {
- struct mm_id id;
- unsigned long last_page_table;
-#ifdef CONFIG_3_LEVEL_PGTABLES
- unsigned long last_pmd;
-#endif
- uml_ldt_t ldt;
-};
-
-extern void switch_mm_skas(struct mm_id * mm_idp);
-
-#endif
-
-/*
- * Overrides for Emacs so that we follow Linus's tabbing style.
- * Emacs will notice this stuff at the end of the file and automatically
- * adjust the settings for this buffer only. This must remain at the end
- * of the file.
- * ---------------------------------------------------------------------------
- * Local variables:
- * c-file-style: "linux"
- * End:
- */
+++ /dev/null
-/*
- * Copyright (C) 2002 Jeff Dike (jdike@karaya.com)
- * Licensed under the GPL
- */
-
-#ifndef __MODE_SKAS_H__
-#define __MODE_SKAS_H__
-
-#include <sysdep/ptrace.h>
-
-extern unsigned long exec_regs[];
-extern unsigned long exec_fp_regs[];
-extern unsigned long exec_fpx_regs[];
-extern int have_fpx_regs;
-
-extern void sig_handler_common_skas(int sig, void *sc_ptr);
-extern void halt_skas(void);
-extern void reboot_skas(void);
-extern void kill_off_processes_skas(void);
-extern int is_skas_winch(int pid, int fd, void *data);
-
-#endif
-
-/*
- * Overrides for Emacs so that we follow Linus's tabbing style.
- * Emacs will notice this stuff at the end of the file and automatically
- * adjust the settings for this buffer only. This must remain at the end
- * of the file.
- * ---------------------------------------------------------------------------
- * Local variables:
- * c-file-style: "linux"
- * End:
- */
+++ /dev/null
-/*
- * Copyright (C) 2002 Jeff Dike (jdike@karaya.com)
- * Licensed under the GPL
- */
-
-#ifndef __SKAS_H
-#define __SKAS_H
-
-#include "mm_id.h"
-#include "sysdep/ptrace.h"
-
-extern int userspace_pid[];
-extern int proc_mm, ptrace_faultinfo, ptrace_ldt;
-extern int skas_needs_stub;
-
-extern void switch_threads(void *me, void *next);
-extern void thread_wait(void *sw, void *fb);
-extern void new_thread(void *stack, void **switch_buf_ptr, void **fork_buf_ptr,
- void (*handler)(int));
-extern int start_idle_thread(void *stack, void *switch_buf_ptr,
- void **fork_buf_ptr);
-extern int user_thread(unsigned long stack, int flags);
-extern void userspace(union uml_pt_regs *regs);
-extern void new_thread_proc(void *stack, void (*handler)(int sig));
-extern void new_thread_handler(int sig);
-extern void handle_syscall(union uml_pt_regs *regs);
-extern int map(struct mm_id * mm_idp, unsigned long virt,
- unsigned long len, int r, int w, int x, int phys_fd,
- unsigned long long offset, int done, void **data);
-extern int unmap(struct mm_id * mm_idp, void *addr, unsigned long len,
- int done, void **data);
-extern int protect(struct mm_id * mm_idp, unsigned long addr,
- unsigned long len, int r, int w, int x, int done,
- void **data);
-extern void user_signal(int sig, union uml_pt_regs *regs, int pid);
-extern int new_mm(int from, unsigned long stack);
-extern int start_userspace(unsigned long stub_stack);
-extern int copy_context_skas0(unsigned long stack, int pid);
-extern void get_skas_faultinfo(int pid, struct faultinfo * fi);
-extern long execute_syscall_skas(void *r);
-extern unsigned long current_stub_stack(void);
-extern long run_syscall_stub(struct mm_id * mm_idp,
- int syscall, unsigned long *args, long expected,
- void **addr, int done);
-extern long syscall_stub_data(struct mm_id * mm_idp,
- unsigned long *data, int data_count,
- void **addr, void **stub_addr);
-
-#endif
struct mmu_context_skas *from_mm = NULL;
struct mmu_context_skas *to_mm = &mm->context.skas;
unsigned long stack = 0;
- int from_fd, ret = -ENOMEM;
+ int ret = -ENOMEM;
if(skas_needs_stub){
stack = get_zeroed_page(GFP_KERNEL);
from_mm = ¤t->mm->context.skas;
if(proc_mm){
- if(from_mm)
- from_fd = from_mm->id.u.mm_fd;
- else from_fd = -1;
-
- ret = new_mm(from_fd, stack);
+ ret = new_mm(stack);
if(ret < 0){
printk("init_new_context_skas - new_mm failed, "
"errno = %d\n", ret);
#include <asm/types.h>
#include "user.h"
#include "ptrace_user.h"
-#include "time_user.h"
#include "sysdep/ptrace.h"
#include "user_util.h"
#include "kern_util.h"
-/*
+/*
* Copyright (C) 2002 Jeff Dike (jdike@karaya.com)
* Licensed under the GPL
*/
#include "asm/uaccess.h"
#include "asm/atomic.h"
#include "kern_util.h"
-#include "time_user.h"
#include "skas.h"
#include "os.h"
#include "user_util.h"
#include "tlb.h"
#include "kern.h"
#include "mode.h"
-#include "proc_mm.h"
#include "registers.h"
void switch_to_skas(void *prev, void *next)
if(current->pid == 0)
switch_timers(0);
- switch_threads(&from->thread.mode.skas.switch_buf,
+ switch_threads(&from->thread.mode.skas.switch_buf,
to->thread.mode.skas.switch_buf);
if(current->pid == 0)
fn = current->thread.request.u.thread.proc;
arg = current->thread.request.u.thread.arg;
- change_sig(SIGUSR1, 1);
- thread_wait(¤t->thread.mode.skas.switch_buf,
+ os_usr1_signal(1);
+ thread_wait(¤t->thread.mode.skas.switch_buf,
current->thread.mode.skas.fork_buf);
if(current->thread.prev_sched != NULL)
void fork_handler(int sig)
{
- change_sig(SIGUSR1, 1);
- thread_wait(¤t->thread.mode.skas.switch_buf,
+ os_usr1_signal(1);
+ thread_wait(¤t->thread.mode.skas.switch_buf,
current->thread.mode.skas.fork_buf);
force_flush_all();
schedule_tail(current->thread.prev_sched);
current->thread.prev_sched = NULL;
- /* Handle any immediate reschedules or signals */
+/* Handle any immediate reschedules or signals */
interrupt_end();
userspace(¤t->thread.regs.regs);
}
int copy_thread_skas(int nr, unsigned long clone_flags, unsigned long sp,
- unsigned long stack_top, struct task_struct * p,
+ unsigned long stack_top, struct task_struct * p,
struct pt_regs *regs)
{
void (*handler)(int);
return(0);
}
-extern void map_stub_pages(int fd, unsigned long code,
- unsigned long data, unsigned long stack);
-int new_mm(int from, unsigned long stack)
+int new_mm(unsigned long stack)
{
- struct proc_mm_op copy;
- int n, fd;
+ int fd;
fd = os_open_file("/proc/mm", of_cloexec(of_write(OPENFLAGS())), 0);
if(fd < 0)
return(fd);
- if(from != -1){
- copy = ((struct proc_mm_op) { .op = MM_COPY_SEGMENTS,
- .u =
- { .copy_segments = from } } );
- n = os_write_file(fd, ©, sizeof(copy));
- if(n != sizeof(copy))
- printk("new_mm : /proc/mm copy_segments failed, "
- "err = %d\n", -n);
- }
-
if(skas_needs_stub)
map_stub_pages(fd, CONFIG_STUB_CODE, CONFIG_STUB_DATA, stack);
#include "asm/pgtable.h"
#include "asm/uaccess.h"
#include "kern_util.h"
-#include "user_util.h"
+#include "os.h"
extern void *um_virt_to_phys(struct task_struct *task, unsigned long addr,
pte_t *pte_out);
syscall_record[index].syscall = syscall;
syscall_record[index].pid = current_pid();
syscall_record[index].result = 0xdeadbeef;
- syscall_record[index].start = os_usecs();
+ syscall_record[index].start = os_nsecs();
return(index);
}
void record_syscall_end(int index, long result)
{
syscall_record[index].result = result;
- syscall_record[index].end = os_usecs();
+ syscall_record[index].end = os_nsecs();
}
-/*
+/*
* Copyright (C) 2000 Jeff Dike (jdike@karaya.com)
* Licensed under the GPL
*/
#include "linux/interrupt.h"
#include "linux/init.h"
#include "linux/delay.h"
+#include "linux/hrtimer.h"
#include "asm/irq.h"
#include "asm/param.h"
#include "asm/current.h"
#include "kern_util.h"
#include "user_util.h"
-#include "time_user.h"
#include "mode.h"
#include "os.h"
int timer_irq_inited = 0;
static int first_tick;
-static unsigned long long prev_usecs;
+static unsigned long long prev_nsecs;
#ifdef CONFIG_UML_REAL_TIME_CLOCK
static long long delta; /* Deviation per interval */
#endif
if(first_tick){
#ifdef CONFIG_UML_REAL_TIME_CLOCK
/* We've had 1 tick */
- unsigned long long usecs = os_usecs();
+ unsigned long long nsecs = os_nsecs();
- delta += usecs - prev_usecs;
- prev_usecs = usecs;
+ delta += nsecs - prev_nsecs;
+ prev_nsecs = nsecs;
/* Protect against the host clock being set backwards */
if(delta < 0)
delta = 0;
- ticks += (delta * HZ) / MILLION;
- delta -= (ticks * MILLION) / HZ;
+ ticks += (delta * HZ) / BILLION;
+ delta -= (ticks * BILLION) / HZ;
#else
ticks = 1;
#endif
}
else {
- prev_usecs = os_usecs();
+ prev_nsecs = os_nsecs();
first_tick = 1;
}
}
}
-void boot_timer_handler(int sig)
+void do_boot_timer_handler(struct sigcontext * sc)
{
struct pt_regs regs;
- CHOOSE_MODE((void)
- (UPT_SC(®s.regs) = (struct sigcontext *) (&sig + 1)),
+ CHOOSE_MODE((void) (UPT_SC(®s.regs) = sc),
(void) (regs.regs.skas.is_user = 0));
do_timer(®s);
}
+static DEFINE_SPINLOCK(timer_spinlock);
+
+static unsigned long long local_offset = 0;
+
+static inline unsigned long long get_time(void)
+{
+ unsigned long long nsecs;
+ unsigned long flags;
+
+ spin_lock_irqsave(&timer_spinlock, flags);
+ nsecs = os_nsecs();
+ nsecs += local_offset;
+ spin_unlock_irqrestore(&timer_spinlock, flags);
+
+ return nsecs;
+}
+
irqreturn_t um_timer(int irq, void *dev, struct pt_regs *regs)
{
+ unsigned long long nsecs;
unsigned long flags;
do_timer(regs);
+
write_seqlock_irqsave(&xtime_lock, flags);
- timer();
+ nsecs = get_time() + local_offset;
+ xtime.tv_sec = nsecs / NSEC_PER_SEC;
+ xtime.tv_nsec = nsecs - xtime.tv_sec * NSEC_PER_SEC;
write_sequnlock_irqrestore(&xtime_lock, flags);
+
return(IRQ_HANDLED);
}
long um_time(int __user *tloc)
{
- struct timeval now;
+ long ret = get_time() / NSEC_PER_SEC;
- do_gettimeofday(&now);
- if (tloc) {
- if (put_user(now.tv_sec, tloc))
- now.tv_sec = -EFAULT;
- }
- return now.tv_sec;
+ if((tloc != NULL) && put_user(ret, tloc))
+ return -EFAULT;
+
+ return ret;
+}
+
+void do_gettimeofday(struct timeval *tv)
+{
+ unsigned long long nsecs = get_time();
+
+ tv->tv_sec = nsecs / NSEC_PER_SEC;
+ /* Careful about calculations here - this was originally done as
+ * (nsecs - tv->tv_sec * NSEC_PER_SEC) / NSEC_PER_USEC
+ * which gave bogus (> 1000000) values. Dunno why, suspect gcc
+ * (4.0.0) miscompiled it, or there's a subtle 64/32-bit conversion
+ * problem that I missed.
+ */
+ nsecs -= tv->tv_sec * NSEC_PER_SEC;
+ tv->tv_usec = (unsigned long) nsecs / NSEC_PER_USEC;
+}
+
+static inline void set_time(unsigned long long nsecs)
+{
+ unsigned long long now;
+ unsigned long flags;
+
+ spin_lock_irqsave(&timer_spinlock, flags);
+ now = os_nsecs();
+ local_offset = nsecs - now;
+ spin_unlock_irqrestore(&timer_spinlock, flags);
+
+ clock_was_set();
}
long um_stime(int __user *tptr)
{
int value;
- struct timespec new;
if (get_user(value, tptr))
return -EFAULT;
- new.tv_sec = value;
- new.tv_nsec = 0;
- do_settimeofday(&new);
+
+ set_time((unsigned long long) value * NSEC_PER_SEC);
+
+ return 0;
+}
+
+int do_settimeofday(struct timespec *tv)
+{
+ set_time((unsigned long long) tv->tv_sec * NSEC_PER_SEC + tv->tv_nsec);
+
return 0;
}
{
local_irq_disable();
irq_enter();
- update_process_times(CHOOSE_MODE(user_context(UPT_SP(regs)),
- (regs)->skas.is_user));
+ update_process_times(CHOOSE_MODE(
+ (UPT_SC(regs) && user_context(UPT_SP(regs))),
+ (regs)->skas.is_user));
irq_exit();
local_irq_enable();
if(current_thread->cpu == 0)
timer_irq(regs);
}
-static DEFINE_SPINLOCK(timer_spinlock);
-
-unsigned long time_lock(void)
-{
- unsigned long flags;
-
- spin_lock_irqsave(&timer_spinlock, flags);
- return(flags);
-}
-
-void time_unlock(unsigned long flags)
-{
- spin_unlock_irqrestore(&timer_spinlock, flags);
-}
-
int __init timer_init(void)
{
int err;
}
__initcall(timer_init);
-
-/*
- * Overrides for Emacs so that we follow Linus's tabbing style.
- * Emacs will notice this stuff at the end of the file and automatically
- * adjust the settings for this buffer only. This must remain at the end
- * of the file.
- * ---------------------------------------------------------------------------
- * Local variables:
- * c-file-style: "linux"
- * End:
- */
#include "user_util.h"
#include "kern_util.h"
#include "irq_user.h"
-#include "time_user.h"
#include "mem_user.h"
#include "os.h"
#include "tlb.h"
#include "user_util.h"
#include "tt.h"
#include "sysdep/thread.h"
+#include "os.h"
extern int debugger_pid;
extern int debugger_fd;
+++ /dev/null
-/*
- * Copyright (C) 2002 Jeff Dike (jdike@karaya.com)
- * Licensed under the GPL
- */
-
-#ifndef __TT_MMU_H
-#define __TT_MMU_H
-
-struct mmu_context_tt {
-};
-
-#endif
-
-/*
- * Overrides for Emacs so that we follow Linus's tabbing style.
- * Emacs will notice this stuff at the end of the file and automatically
- * adjust the settings for this buffer only. This must remain at the end
- * of the file.
- * ---------------------------------------------------------------------------
- * Local variables:
- * c-file-style: "linux"
- * End:
- */
#include "os.h"
#include "kern.h"
#include "sigcontext.h"
-#include "time_user.h"
#include "mem_user.h"
#include "tlb.h"
#include "mode.h"
#include "kern_util.h"
#include "ptrace_user.h"
#include "tt.h"
+#include "os.h"
long proxy_ptrace(struct debugger *debugger, int arg1, pid_t arg2,
long arg3, long arg4, pid_t child, int *ret)
#include "ptrace_user.h"
#include "user_util.h"
#include "user.h"
+#include "os.h"
int get_syscall(pid_t pid, long *arg1, long *arg2, long *arg3, long *arg4,
long *arg5)
{
struct sigcontext *sc = sc_ptr;
struct tt_regs save_regs, *r;
- int save_errno = errno, is_user;
+ int save_errno = errno, is_user = 0;
void (*handler)(int, union uml_pt_regs *);
/* This is done because to allow SIGSEGV to be delivered inside a SEGV
GET_FAULTINFO_FROM_SC(r->faultinfo, sc);
}
save_regs = *r;
- is_user = user_context(SC_SP(sc));
+ if (sc)
+ is_user = user_context(SC_SP(sc));
r->sc = sc;
if(sig != SIGUSR2)
r->syscall = -1;
obj-y = aio.o elf_aux.o file.o helper.o main.o mem.o process.o signal.o \
start_up.o time.o trap.o tt.o tty.o uaccess.o umid.o user_syms.o \
- drivers/ sys-$(SUBARCH)/
+ util.o drivers/ sys-$(SUBARCH)/
obj-$(CONFIG_MODE_SKAS) += skas/
USER_OBJS := aio.o elf_aux.o file.o helper.o main.o mem.o process.o signal.o \
- start_up.o time.o trap.o tt.o tty.o uaccess.o umid.o
+ start_up.o time.o trap.o tt.o tty.o uaccess.o umid.o util.o
elf_aux.o: $(ARCH_DIR)/kernel-offsets.h
CFLAGS_elf_aux.o += -I$(objtree)/arch/um
if((stack_out != NULL) && (*stack_out != 0))
stack = *stack_out;
- else stack = alloc_stack(0, um_in_interrupt());
+ else stack = alloc_stack(0, __cant_sleep());
if(stack == 0)
return(-ENOMEM);
unsigned long stack, sp;
int pid, status, err;
- stack = alloc_stack(stack_order, um_in_interrupt());
+ stack = alloc_stack(stack_order, __cant_sleep());
if(stack == 0) return(-ENOMEM);
sp = stack + (page_size() << stack_order) - sizeof(void *);
#include "user_util.h"
#include "kern_util.h"
#include "mem_user.h"
-#include "time_user.h"
#include "irq_user.h"
#include "user.h"
#include "init.h"
int main(int argc, char **argv, char **envp)
{
char **new_argv;
- sigset_t mask;
int ret, i, err;
- /* Enable all signals except SIGIO - in some environments, we can
- * enter with some signals blocked
- */
-
- sigemptyset(&mask);
- sigaddset(&mask, SIGIO);
- if(sigprocmask(SIG_SETMASK, &mask, NULL) < 0){
- perror("sigprocmask");
- exit(1);
- }
-
#ifdef UML_CONFIG_CMDLINE_ON_HOST
/* Allocate memory for thread command lines */
if(argc < 2 || strlen(argv[1]) < THREAD_NAME_LEN - 1){
#include "process.h"
#include "irq_user.h"
#include "kern_util.h"
+#include "longjmp.h"
#define ARBITRARY_ADDR -1
#define FAILURE_PID -1
int run_kernel_thread(int (*fn)(void *), void *arg, void **jmp_ptr)
{
- sigjmp_buf buf;
- int n;
-
- *jmp_ptr = &buf;
- n = sigsetjmp(buf, 1);
- if(n != 0)
- return(n);
- (*fn)(arg);
- return(0);
+ sigjmp_buf buf;
+ int n, enable;
+
+ *jmp_ptr = &buf;
+ n = UML_SIGSETJMP(&buf, enable);
+ if(n != 0)
+ return(n);
+ (*fn)(arg);
+ return(0);
}
-
-/*
- * Overrides for Emacs so that we follow Linus's tabbing style.
- * Emacs will notice this stuff at the end of the file and automatically
- * adjust the settings for this buffer only. This must remain at the end
- * of the file.
- * ---------------------------------------------------------------------------
- * Local variables:
- * c-file-style: "linux"
- * End:
- */
#include <string.h>
#include <sys/mman.h>
#include "user_util.h"
-#include "kern_util.h"
#include "user.h"
#include "signal_kern.h"
#include "sysdep/sigcontext.h"
#include "sysdep/signal.h"
#include "sigcontext.h"
-#include "time_user.h"
#include "mode.h"
+#include "os.h"
+
+/* These are the asynchronous signals. SIGVTALRM and SIGARLM are handled
+ * together under SIGVTALRM_BIT. SIGPROF is excluded because we want to
+ * be able to profile all of UML, not just the non-critical sections. If
+ * profiling is not thread-safe, then that is not my problem. We can disable
+ * profiling when SMP is enabled in that case.
+ */
+#define SIGIO_BIT 0
+#define SIGIO_MASK (1 << SIGIO_BIT)
+
+#define SIGVTALRM_BIT 1
+#define SIGVTALRM_MASK (1 << SIGVTALRM_BIT)
+
+#define SIGALRM_BIT 2
+#define SIGALRM_MASK (1 << SIGALRM_BIT)
+
+static int signals_enabled = 1;
+static int pending = 0;
void sig_handler(ARCH_SIGHDLR_PARAM)
{
struct sigcontext *sc;
+ int enabled;
+
+ /* Must be the first thing that this handler does - x86_64 stores
+ * the sigcontext in %rdx, and we need to save it before it has a
+ * chance to get trashed.
+ */
ARCH_GET_SIGCONTEXT(sc, sig);
+
+ enabled = signals_enabled;
+ if(!enabled && (sig == SIGIO)){
+ pending |= SIGIO_MASK;
+ return;
+ }
+
+ block_signals();
+
CHOOSE_MODE_PROC(sig_handler_common_tt, sig_handler_common_skas,
sig, sc);
+
+ set_signals(enabled);
}
extern int timer_irq_inited;
-void alarm_handler(ARCH_SIGHDLR_PARAM)
+static void real_alarm_handler(int sig, struct sigcontext *sc)
{
- struct sigcontext *sc;
-
- ARCH_GET_SIGCONTEXT(sc, sig);
- if(!timer_irq_inited) return;
+ if(!timer_irq_inited){
+ signals_enabled = 1;
+ return;
+ }
if(sig == SIGALRM)
switch_timers(0);
if(sig == SIGALRM)
switch_timers(1);
+
+}
+
+void alarm_handler(ARCH_SIGHDLR_PARAM)
+{
+ struct sigcontext *sc;
+ int enabled;
+
+ ARCH_GET_SIGCONTEXT(sc, sig);
+
+ enabled = signals_enabled;
+ if(!signals_enabled){
+ if(sig == SIGVTALRM)
+ pending |= SIGVTALRM_MASK;
+ else pending |= SIGALRM_MASK;
+
+ return;
+ }
+
+ block_signals();
+
+ real_alarm_handler(sig, sc);
+ set_signals(enabled);
+}
+
+extern void do_boot_timer_handler(struct sigcontext * sc);
+
+void boot_timer_handler(ARCH_SIGHDLR_PARAM)
+{
+ struct sigcontext *sc;
+ int enabled;
+
+ ARCH_GET_SIGCONTEXT(sc, sig);
+
+ enabled = signals_enabled;
+ if(!enabled){
+ if(sig == SIGVTALRM)
+ pending |= SIGVTALRM_MASK;
+ else pending |= SIGALRM_MASK;
+ return;
+ }
+
+ block_signals();
+
+ do_boot_timer_handler(sc);
+ set_signals(enabled);
}
void set_sigstack(void *sig_stack, int size)
{
struct sigaction action;
va_list ap;
+ sigset_t sig_mask;
int mask;
va_start(ap, flags);
action.sa_flags = flags;
action.sa_restorer = NULL;
if(sigaction(sig, &action, NULL) < 0)
- panic("sigaction failed");
+ panic("sigaction failed - errno = %d\n", errno);
+
+ sigemptyset(&sig_mask);
+ sigaddset(&sig_mask, sig);
+ if(sigprocmask(SIG_UNBLOCK, &sig_mask, NULL) < 0)
+ panic("sigprocmask failed - errno = %d\n", errno);
}
int change_sig(int signal, int on)
return(!sigismember(&old, signal));
}
-/* Both here and in set/get_signal we don't touch SIGPROF, because we must not
- * disable profiling; it's safe because the profiling code does not interact
- * with the kernel code at all.*/
-
-static void change_signals(int type)
-{
- sigset_t mask;
-
- sigemptyset(&mask);
- sigaddset(&mask, SIGVTALRM);
- sigaddset(&mask, SIGALRM);
- sigaddset(&mask, SIGIO);
- if(sigprocmask(type, &mask, NULL) < 0)
- panic("Failed to change signal mask - errno = %d", errno);
-}
-
void block_signals(void)
{
- change_signals(SIG_BLOCK);
+ signals_enabled = 0;
}
void unblock_signals(void)
{
- change_signals(SIG_UNBLOCK);
-}
+ int save_pending;
-/* These are the asynchronous signals. SIGVTALRM and SIGARLM are handled
- * together under SIGVTALRM_BIT. SIGPROF is excluded because we want to
- * be able to profile all of UML, not just the non-critical sections. If
- * profiling is not thread-safe, then that is not my problem. We can disable
- * profiling when SMP is enabled in that case.
- */
-#define SIGIO_BIT 0
-#define SIGVTALRM_BIT 1
+ if(signals_enabled == 1)
+ return;
-static int enable_mask(sigset_t *mask)
-{
- int sigs;
+ /* We loop because the IRQ handler returns with interrupts off. So,
+ * interrupts may have arrived and we need to re-enable them and
+ * recheck pending.
+ */
+ while(1){
+ /* Save and reset save_pending after enabling signals. This
+ * way, pending won't be changed while we're reading it.
+ */
+ signals_enabled = 1;
+
+ save_pending = pending;
+ if(save_pending == 0)
+ return;
+
+ pending = 0;
+
+ /* We have pending interrupts, so disable signals, as the
+ * handlers expect them off when they are called. They will
+ * be enabled again above.
+ */
+
+ signals_enabled = 0;
- sigs = sigismember(mask, SIGIO) ? 0 : 1 << SIGIO_BIT;
- sigs |= sigismember(mask, SIGVTALRM) ? 0 : 1 << SIGVTALRM_BIT;
- sigs |= sigismember(mask, SIGALRM) ? 0 : 1 << SIGVTALRM_BIT;
- return(sigs);
+ /* Deal with SIGIO first because the alarm handler might
+ * schedule, leaving the pending SIGIO stranded until we come
+ * back here.
+ */
+ if(save_pending & SIGIO_MASK)
+ CHOOSE_MODE_PROC(sig_handler_common_tt,
+ sig_handler_common_skas, SIGIO, NULL);
+
+ if(save_pending & SIGALRM_MASK)
+ real_alarm_handler(SIGALRM, NULL);
+
+ if(save_pending & SIGVTALRM_MASK)
+ real_alarm_handler(SIGVTALRM, NULL);
+ }
}
int get_signals(void)
{
- sigset_t mask;
-
- if(sigprocmask(SIG_SETMASK, NULL, &mask) < 0)
- panic("Failed to get signal mask");
- return(enable_mask(&mask));
+ return signals_enabled;
}
int set_signals(int enable)
{
- sigset_t mask;
int ret;
+ if(signals_enabled == enable)
+ return enable;
- sigemptyset(&mask);
- if(enable & (1 << SIGIO_BIT))
- sigaddset(&mask, SIGIO);
- if(enable & (1 << SIGVTALRM_BIT)){
- sigaddset(&mask, SIGVTALRM);
- sigaddset(&mask, SIGALRM);
- }
+ ret = signals_enabled;
+ if(enable)
+ unblock_signals();
+ else block_signals();
- /* This is safe - sigprocmask is guaranteed to copy locally the
- * value of new_set, do his work and then, at the end, write to
- * old_set.
- */
- if(sigprocmask(SIG_UNBLOCK, &mask, &mask) < 0)
- panic("Failed to enable signals");
- ret = enable_mask(&mask);
- sigemptyset(&mask);
- if((enable & (1 << SIGIO_BIT)) == 0)
- sigaddset(&mask, SIGIO);
- if((enable & (1 << SIGVTALRM_BIT)) == 0){
- sigaddset(&mask, SIGVTALRM);
- sigaddset(&mask, SIGALRM);
- }
- if(sigprocmask(SIG_BLOCK, &mask, NULL) < 0)
- panic("Failed to block signals");
+ return ret;
+}
- return(ret);
+void os_usr1_signal(int on)
+{
+ change_sig(SIGUSR1, on);
}
# Licensed under the GPL
#
-obj-y := trap.o
+obj-y := mem.o process.o trap.o
-USER_OBJS := trap.o
+USER_OBJS := mem.o process.o trap.o
include arch/um/scripts/Makefile.rules
-/*
+/*
* Copyright (C) 2002 Jeff Dike (jdike@karaya.com)
* Licensed under the GPL
*/
static inline unsigned long *check_init_stack(struct mm_id * mm_idp,
unsigned long *stack)
{
- if(stack == NULL){
+ if(stack == NULL) {
stack = (unsigned long *) mm_idp->stack + 2;
*stack = 0;
}
int multi_count = 0;
int multi_op_count = 0;
-static long do_syscall_stub(struct mm_id *mm_idp, void **addr)
+static inline long do_syscall_stub(struct mm_id * mm_idp, void **addr)
{
unsigned long regs[MAX_REG_NR];
- unsigned long *data;
- unsigned long *syscall;
+ int n;
long ret, offset;
- int n, pid = mm_idp->u.pid;
+ unsigned long * data;
+ unsigned long * syscall;
+ int pid = mm_idp->u.pid;
if(proc_mm)
#warning Need to look up userspace_pid by cpu
multi_count++;
- get_safe_registers(regs);
- regs[REGS_IP_INDEX] = UML_CONFIG_STUB_CODE +
+ get_safe_registers(regs);
+ regs[REGS_IP_INDEX] = UML_CONFIG_STUB_CODE +
((unsigned long) &batch_syscall_stub -
- (unsigned long) &__syscall_stub_start);
+ (unsigned long) &__syscall_stub_start);
+
n = ptrace_setregs(pid, regs);
if(n < 0)
panic("do_syscall_stub : PTRACE_SETREGS failed, errno = %d\n",
if (offset) {
data = (unsigned long *)(mm_idp->stack +
offset - UML_CONFIG_STUB_DATA);
+ printk("do_syscall_stub : ret = %d, offset = %d, "
+ "data = 0x%x\n", ret, offset, data);
syscall = (unsigned long *)((unsigned long)data + data[0]);
printk("do_syscall_stub: syscall %ld failed, return value = "
"0x%lx, expected return value = 0x%lx\n",
long run_syscall_stub(struct mm_id * mm_idp, int syscall,
unsigned long *args, long expected, void **addr,
- int done)
+ int done)
{
- unsigned long *stack = check_init_stack(mm_idp, *addr);
+ unsigned long *stack = check_init_stack(mm_idp, *addr);
if(done && *addr == NULL)
single_count++;
- *stack += sizeof(long);
+ *stack += sizeof(long);
stack += *stack / sizeof(long);
- *stack++ = syscall;
- *stack++ = args[0];
- *stack++ = args[1];
- *stack++ = args[2];
- *stack++ = args[3];
- *stack++ = args[4];
- *stack++ = args[5];
+ *stack++ = syscall;
+ *stack++ = args[0];
+ *stack++ = args[1];
+ *stack++ = args[2];
+ *stack++ = args[3];
+ *stack++ = args[4];
+ *stack++ = args[5];
*stack++ = expected;
- *stack = 0;
- multi_op_count++;
+ *stack = 0;
+ multi_op_count++;
- if(!done && ((((unsigned long) stack) & ~PAGE_MASK) <
+ if(!done && ((((unsigned long) stack) & ~PAGE_MASK) <
PAGE_SIZE - 10 * sizeof(long))){
*addr = stack;
- return 0;
- }
+ return 0;
+ }
return do_syscall_stub(mm_idp, addr);
}
if((((unsigned long) *addr) & ~PAGE_MASK) >=
PAGE_SIZE - (10 + data_count) * sizeof(long)) {
ret = do_syscall_stub(mm_idp, addr);
- /* in case of error, don't overwrite data on stack */
+ /* in case of error, don't overwrite data on stack */
if(ret)
return ret;
}
int r, int w, int x, int phys_fd, unsigned long long offset,
int done, void **data)
{
- int prot, ret;
-
- prot = (r ? PROT_READ : 0) | (w ? PROT_WRITE : 0) |
- (x ? PROT_EXEC : 0);
-
- if(proc_mm){
- struct proc_mm_op map;
- int fd = mm_idp->u.mm_fd;
-
- map = ((struct proc_mm_op) { .op = MM_MMAP,
- .u =
- { .mmap =
- { .addr = virt,
- .len = len,
- .prot = prot,
- .flags = MAP_SHARED |
- MAP_FIXED,
- .fd = phys_fd,
- .offset= offset
- } } } );
+ int prot, ret;
+
+ prot = (r ? PROT_READ : 0) | (w ? PROT_WRITE : 0) |
+ (x ? PROT_EXEC : 0);
+
+ if(proc_mm){
+ struct proc_mm_op map;
+ int fd = mm_idp->u.mm_fd;
+
+ map = ((struct proc_mm_op) { .op = MM_MMAP,
+ .u =
+ { .mmap =
+ { .addr = virt,
+ .len = len,
+ .prot = prot,
+ .flags = MAP_SHARED |
+ MAP_FIXED,
+ .fd = phys_fd,
+ .offset= offset
+ } } } );
ret = os_write_file(fd, &map, sizeof(map));
if(ret != sizeof(map))
printk("map : /proc/mm map failed, err = %d\n", -ret);
else ret = 0;
- }
- else {
- unsigned long args[] = { virt, len, prot,
- MAP_SHARED | MAP_FIXED, phys_fd,
- MMAP_OFFSET(offset) };
+ }
+ else {
+ unsigned long args[] = { virt, len, prot,
+ MAP_SHARED | MAP_FIXED, phys_fd,
+ MMAP_OFFSET(offset) };
ret = run_syscall_stub(mm_idp, STUB_MMAP_NR, args, virt,
data, done);
- }
+ }
return ret;
}
int unmap(struct mm_id * mm_idp, void *addr, unsigned long len, int done,
void **data)
{
- int ret;
-
- if(proc_mm){
- struct proc_mm_op unmap;
- int fd = mm_idp->u.mm_fd;
-
- unmap = ((struct proc_mm_op) { .op = MM_MUNMAP,
- .u =
- { .munmap =
- { .addr =
- (unsigned long) addr,
- .len = len } } } );
+ int ret;
+
+ if(proc_mm){
+ struct proc_mm_op unmap;
+ int fd = mm_idp->u.mm_fd;
+
+ unmap = ((struct proc_mm_op) { .op = MM_MUNMAP,
+ .u =
+ { .munmap =
+ { .addr =
+ (unsigned long) addr,
+ .len = len } } } );
ret = os_write_file(fd, &unmap, sizeof(unmap));
if(ret != sizeof(unmap))
printk("unmap - proc_mm write returned %d\n", ret);
else ret = 0;
- }
- else {
- unsigned long args[] = { (unsigned long) addr, len, 0, 0, 0,
- 0 };
+ }
+ else {
+ unsigned long args[] = { (unsigned long) addr, len, 0, 0, 0,
+ 0 };
ret = run_syscall_stub(mm_idp, __NR_munmap, args, 0,
data, done);
- if(ret < 0)
- printk("munmap stub failed, errno = %d\n", ret);
- }
+ }
- return ret;
+ return ret;
}
int protect(struct mm_id * mm_idp, unsigned long addr, unsigned long len,
int r, int w, int x, int done, void **data)
{
- struct proc_mm_op protect;
- int prot, ret;
-
- prot = (r ? PROT_READ : 0) | (w ? PROT_WRITE : 0) |
- (x ? PROT_EXEC : 0);
-
- if(proc_mm){
- int fd = mm_idp->u.mm_fd;
- protect = ((struct proc_mm_op) { .op = MM_MPROTECT,
- .u =
- { .mprotect =
- { .addr =
- (unsigned long) addr,
- .len = len,
- .prot = prot } } } );
-
- ret = os_write_file(fd, &protect, sizeof(protect));
- if(ret != sizeof(protect))
- printk("protect failed, err = %d", -ret);
- else ret = 0;
- }
- else {
- unsigned long args[] = { addr, len, prot, 0, 0, 0 };
-
- ret = run_syscall_stub(mm_idp, __NR_mprotect, args, 0,
- data, done);
- }
-
- return ret;
+ struct proc_mm_op protect;
+ int prot, ret;
+
+ prot = (r ? PROT_READ : 0) | (w ? PROT_WRITE : 0) |
+ (x ? PROT_EXEC : 0);
+ if(proc_mm){
+ int fd = mm_idp->u.mm_fd;
+
+ protect = ((struct proc_mm_op) { .op = MM_MPROTECT,
+ .u =
+ { .mprotect =
+ { .addr =
+ (unsigned long) addr,
+ .len = len,
+ .prot = prot } } } );
+
+ ret = os_write_file(fd, &protect, sizeof(protect));
+ if(ret != sizeof(protect))
+ printk("protect failed, err = %d", -ret);
+ else ret = 0;
+ }
+ else {
+ unsigned long args[] = { addr, len, prot, 0, 0, 0 };
+
+ ret = run_syscall_stub(mm_idp, __NR_mprotect, args, 0,
+ data, done);
+ }
+
+ return ret;
}
void before_mem_skas(unsigned long unused)
--- /dev/null
+/*
+ * Copyright (C) 2002- 2004 Jeff Dike (jdike@addtoit.com)
+ * Licensed under the GPL
+ */
+
+#include <stdlib.h>
+#include <string.h>
+#include <unistd.h>
+#include <errno.h>
+#include <signal.h>
+#include <setjmp.h>
+#include <sched.h>
+#include "ptrace_user.h"
+#include <sys/wait.h>
+#include <sys/mman.h>
+#include <sys/user.h>
+#include <sys/time.h>
+#include <asm/unistd.h>
+#include <asm/types.h>
+#include "user.h"
+#include "sysdep/ptrace.h"
+#include "user_util.h"
+#include "kern_util.h"
+#include "skas.h"
+#include "stub-data.h"
+#include "mm_id.h"
+#include "sysdep/sigcontext.h"
+#include "sysdep/stub.h"
+#include "os.h"
+#include "proc_mm.h"
+#include "skas_ptrace.h"
+#include "chan_user.h"
+#include "registers.h"
+#include "mem.h"
+#include "uml-config.h"
+#include "process.h"
+#include "longjmp.h"
+
+int is_skas_winch(int pid, int fd, void *data)
+{
+ if(pid != os_getpgrp())
+ return(0);
+
+ register_winch_irq(-1, fd, -1, data);
+ return(1);
+}
+
+void wait_stub_done(int pid, int sig, char * fname)
+{
+ int n, status, err;
+
+ do {
+ if ( sig != -1 ) {
+ err = ptrace(PTRACE_CONT, pid, 0, sig);
+ if(err)
+ panic("%s : continue failed, errno = %d\n",
+ fname, errno);
+ }
+ sig = 0;
+
+ CATCH_EINTR(n = waitpid(pid, &status, WUNTRACED));
+ } while((n >= 0) && WIFSTOPPED(status) &&
+ ((WSTOPSIG(status) == SIGVTALRM) ||
+ /* running UML inside a detached screen can cause
+ * SIGWINCHes
+ */
+ (WSTOPSIG(status) == SIGWINCH)));
+
+ if((n < 0) || !WIFSTOPPED(status) ||
+ (WSTOPSIG(status) != SIGUSR1 && WSTOPSIG(status) != SIGTRAP)){
+ unsigned long regs[HOST_FRAME_SIZE];
+
+ if(ptrace(PTRACE_GETREGS, pid, 0, regs) < 0)
+ printk("Failed to get registers from stub, "
+ "errno = %d\n", errno);
+ else {
+ int i;
+
+ printk("Stub registers -\n");
+ for(i = 0; i < HOST_FRAME_SIZE; i++)
+ printk("\t%d - %lx\n", i, regs[i]);
+ }
+ panic("%s : failed to wait for SIGUSR1/SIGTRAP, "
+ "pid = %d, n = %d, errno = %d, status = 0x%x\n",
+ fname, pid, n, errno, status);
+ }
+}
+
+extern unsigned long current_stub_stack(void);
+
+void get_skas_faultinfo(int pid, struct faultinfo * fi)
+{
+ int err;
+
+ if(ptrace_faultinfo){
+ err = ptrace(PTRACE_FAULTINFO, pid, 0, fi);
+ if(err)
+ panic("get_skas_faultinfo - PTRACE_FAULTINFO failed, "
+ "errno = %d\n", errno);
+
+ /* Special handling for i386, which has different structs */
+ if (sizeof(struct ptrace_faultinfo) < sizeof(struct faultinfo))
+ memset((char *)fi + sizeof(struct ptrace_faultinfo), 0,
+ sizeof(struct faultinfo) -
+ sizeof(struct ptrace_faultinfo));
+ }
+ else {
+ wait_stub_done(pid, SIGSEGV, "get_skas_faultinfo");
+
+ /* faultinfo is prepared by the stub-segv-handler at start of
+ * the stub stack page. We just have to copy it.
+ */
+ memcpy(fi, (void *)current_stub_stack(), sizeof(*fi));
+ }
+}
+
+static void handle_segv(int pid, union uml_pt_regs * regs)
+{
+ get_skas_faultinfo(pid, ®s->skas.faultinfo);
+ segv(regs->skas.faultinfo, 0, 1, NULL);
+}
+
+/*To use the same value of using_sysemu as the caller, ask it that value (in local_using_sysemu)*/
+static void handle_trap(int pid, union uml_pt_regs *regs, int local_using_sysemu)
+{
+ int err, status;
+
+ /* Mark this as a syscall */
+ UPT_SYSCALL_NR(regs) = PT_SYSCALL_NR(regs->skas.regs);
+
+ if (!local_using_sysemu)
+ {
+ err = ptrace(PTRACE_POKEUSR, pid, PT_SYSCALL_NR_OFFSET,
+ __NR_getpid);
+ if(err < 0)
+ panic("handle_trap - nullifying syscall failed errno = %d\n",
+ errno);
+
+ err = ptrace(PTRACE_SYSCALL, pid, 0, 0);
+ if(err < 0)
+ panic("handle_trap - continuing to end of syscall failed, "
+ "errno = %d\n", errno);
+
+ CATCH_EINTR(err = waitpid(pid, &status, WUNTRACED));
+ if((err < 0) || !WIFSTOPPED(status) ||
+ (WSTOPSIG(status) != SIGTRAP + 0x80))
+ panic("handle_trap - failed to wait at end of syscall, "
+ "errno = %d, status = %d\n", errno, status);
+ }
+
+ handle_syscall(regs);
+}
+
+extern int __syscall_stub_start;
+
+static int userspace_tramp(void *stack)
+{
+ void *addr;
+
+ ptrace(PTRACE_TRACEME, 0, 0, 0);
+
+ init_new_thread_signals(1);
+ enable_timer();
+
+ if(!proc_mm){
+ /* This has a pte, but it can't be mapped in with the usual
+ * tlb_flush mechanism because this is part of that mechanism
+ */
+ int fd;
+ __u64 offset;
+ fd = phys_mapping(to_phys(&__syscall_stub_start), &offset);
+ addr = mmap64((void *) UML_CONFIG_STUB_CODE, page_size(),
+ PROT_EXEC, MAP_FIXED | MAP_PRIVATE, fd, offset);
+ if(addr == MAP_FAILED){
+ printk("mapping mmap stub failed, errno = %d\n",
+ errno);
+ exit(1);
+ }
+
+ if(stack != NULL){
+ fd = phys_mapping(to_phys(stack), &offset);
+ addr = mmap((void *) UML_CONFIG_STUB_DATA, page_size(),
+ PROT_READ | PROT_WRITE,
+ MAP_FIXED | MAP_SHARED, fd, offset);
+ if(addr == MAP_FAILED){
+ printk("mapping segfault stack failed, "
+ "errno = %d\n", errno);
+ exit(1);
+ }
+ }
+ }
+ if(!ptrace_faultinfo && (stack != NULL)){
+ unsigned long v = UML_CONFIG_STUB_CODE +
+ (unsigned long) stub_segv_handler -
+ (unsigned long) &__syscall_stub_start;
+
+ set_sigstack((void *) UML_CONFIG_STUB_DATA, page_size());
+ set_handler(SIGSEGV, (void *) v, SA_ONSTACK,
+ SIGIO, SIGWINCH, SIGALRM, SIGVTALRM,
+ SIGUSR1, -1);
+ }
+
+ os_stop_process(os_getpid());
+ return(0);
+}
+
+/* Each element set once, and only accessed by a single processor anyway */
+#undef NR_CPUS
+#define NR_CPUS 1
+int userspace_pid[NR_CPUS];
+
+int start_userspace(unsigned long stub_stack)
+{
+ void *stack;
+ unsigned long sp;
+ int pid, status, n, flags;
+
+ stack = mmap(NULL, PAGE_SIZE, PROT_READ | PROT_WRITE | PROT_EXEC,
+ MAP_PRIVATE | MAP_ANONYMOUS, -1, 0);
+ if(stack == MAP_FAILED)
+ panic("start_userspace : mmap failed, errno = %d", errno);
+ sp = (unsigned long) stack + PAGE_SIZE - sizeof(void *);
+
+ flags = CLONE_FILES | SIGCHLD;
+ if(proc_mm) flags |= CLONE_VM;
+ pid = clone(userspace_tramp, (void *) sp, flags, (void *) stub_stack);
+ if(pid < 0)
+ panic("start_userspace : clone failed, errno = %d", errno);
+
+ do {
+ CATCH_EINTR(n = waitpid(pid, &status, WUNTRACED));
+ if(n < 0)
+ panic("start_userspace : wait failed, errno = %d",
+ errno);
+ } while(WIFSTOPPED(status) && (WSTOPSIG(status) == SIGVTALRM));
+
+ if(!WIFSTOPPED(status) || (WSTOPSIG(status) != SIGSTOP))
+ panic("start_userspace : expected SIGSTOP, got status = %d",
+ status);
+
+ if (ptrace(PTRACE_OLDSETOPTIONS, pid, NULL, (void *)PTRACE_O_TRACESYSGOOD) < 0)
+ panic("start_userspace : PTRACE_OLDSETOPTIONS failed, errno=%d\n",
+ errno);
+
+ if(munmap(stack, PAGE_SIZE) < 0)
+ panic("start_userspace : munmap failed, errno = %d\n", errno);
+
+ return(pid);
+}
+
+void userspace(union uml_pt_regs *regs)
+{
+ int err, status, op, pid = userspace_pid[0];
+ int local_using_sysemu; /*To prevent races if using_sysemu changes under us.*/
+
+ while(1){
+ restore_registers(pid, regs);
+
+ /* Now we set local_using_sysemu to be used for one loop */
+ local_using_sysemu = get_using_sysemu();
+
+ op = SELECT_PTRACE_OPERATION(local_using_sysemu, singlestepping(NULL));
+
+ err = ptrace(op, pid, 0, 0);
+ if(err)
+ panic("userspace - could not resume userspace process, "
+ "pid=%d, ptrace operation = %d, errno = %d\n",
+ op, errno);
+
+ CATCH_EINTR(err = waitpid(pid, &status, WUNTRACED));
+ if(err < 0)
+ panic("userspace - waitpid failed, errno = %d\n",
+ errno);
+
+ regs->skas.is_user = 1;
+ save_registers(pid, regs);
+ UPT_SYSCALL_NR(regs) = -1; /* Assume: It's not a syscall */
+
+ if(WIFSTOPPED(status)){
+ switch(WSTOPSIG(status)){
+ case SIGSEGV:
+ if(PTRACE_FULL_FAULTINFO || !ptrace_faultinfo)
+ user_signal(SIGSEGV, regs, pid);
+ else handle_segv(pid, regs);
+ break;
+ case SIGTRAP + 0x80:
+ handle_trap(pid, regs, local_using_sysemu);
+ break;
+ case SIGTRAP:
+ relay_signal(SIGTRAP, regs);
+ break;
+ case SIGIO:
+ case SIGVTALRM:
+ case SIGILL:
+ case SIGBUS:
+ case SIGFPE:
+ case SIGWINCH:
+ user_signal(WSTOPSIG(status), regs, pid);
+ break;
+ default:
+ printk("userspace - child stopped with signal "
+ "%d\n", WSTOPSIG(status));
+ }
+ pid = userspace_pid[0];
+ interrupt_end();
+
+ /* Avoid -ERESTARTSYS handling in host */
+ if(PT_SYSCALL_NR_OFFSET != PT_SYSCALL_RET_OFFSET)
+ PT_SYSCALL_NR(regs->skas.regs) = -1;
+ }
+ }
+}
+#define INIT_JMP_NEW_THREAD 0
+#define INIT_JMP_REMOVE_SIGSTACK 1
+#define INIT_JMP_CALLBACK 2
+#define INIT_JMP_HALT 3
+#define INIT_JMP_REBOOT 4
+
+int copy_context_skas0(unsigned long new_stack, int pid)
+{
+ int err;
+ unsigned long regs[MAX_REG_NR];
+ unsigned long current_stack = current_stub_stack();
+ struct stub_data *data = (struct stub_data *) current_stack;
+ struct stub_data *child_data = (struct stub_data *) new_stack;
+ __u64 new_offset;
+ int new_fd = phys_mapping(to_phys((void *)new_stack), &new_offset);
+
+ /* prepare offset and fd of child's stack as argument for parent's
+ * and child's mmap2 calls
+ */
+ *data = ((struct stub_data) { .offset = MMAP_OFFSET(new_offset),
+ .fd = new_fd,
+ .timer = ((struct itimerval)
+ { { 0, 1000000 / hz() },
+ { 0, 1000000 / hz() }})});
+ get_safe_registers(regs);
+
+ /* Set parent's instruction pointer to start of clone-stub */
+ regs[REGS_IP_INDEX] = UML_CONFIG_STUB_CODE +
+ (unsigned long) stub_clone_handler -
+ (unsigned long) &__syscall_stub_start;
+ regs[REGS_SP_INDEX] = UML_CONFIG_STUB_DATA + PAGE_SIZE -
+ sizeof(void *);
+#ifdef __SIGNAL_FRAMESIZE
+ regs[REGS_SP_INDEX] -= __SIGNAL_FRAMESIZE;
+#endif
+ err = ptrace_setregs(pid, regs);
+ if(err < 0)
+ panic("copy_context_skas0 : PTRACE_SETREGS failed, "
+ "pid = %d, errno = %d\n", pid, errno);
+
+ /* set a well known return code for detection of child write failure */
+ child_data->err = 12345678;
+
+ /* Wait, until parent has finished its work: read child's pid from
+ * parent's stack, and check, if bad result.
+ */
+ wait_stub_done(pid, 0, "copy_context_skas0");
+
+ pid = data->err;
+ if(pid < 0)
+ panic("copy_context_skas0 - stub-parent reports error %d\n",
+ pid);
+
+ /* Wait, until child has finished too: read child's result from
+ * child's stack and check it.
+ */
+ wait_stub_done(pid, -1, "copy_context_skas0");
+ if (child_data->err != UML_CONFIG_STUB_DATA)
+ panic("copy_context_skas0 - stub-child reports error %d\n",
+ child_data->err);
+
+ if (ptrace(PTRACE_OLDSETOPTIONS, pid, NULL,
+ (void *)PTRACE_O_TRACESYSGOOD) < 0)
+ panic("copy_context_skas0 : PTRACE_OLDSETOPTIONS failed, "
+ "errno = %d\n", errno);
+
+ return pid;
+}
+
+/*
+ * This is used only, if stub pages are needed, while proc_mm is
+ * availabl. Opening /proc/mm creates a new mm_context, which lacks
+ * the stub-pages. Thus, we map them using /proc/mm-fd
+ */
+void map_stub_pages(int fd, unsigned long code,
+ unsigned long data, unsigned long stack)
+{
+ struct proc_mm_op mmop;
+ int n;
+ __u64 code_offset;
+ int code_fd = phys_mapping(to_phys((void *) &__syscall_stub_start),
+ &code_offset);
+
+ mmop = ((struct proc_mm_op) { .op = MM_MMAP,
+ .u =
+ { .mmap =
+ { .addr = code,
+ .len = PAGE_SIZE,
+ .prot = PROT_EXEC,
+ .flags = MAP_FIXED | MAP_PRIVATE,
+ .fd = code_fd,
+ .offset = code_offset
+ } } });
+ n = os_write_file(fd, &mmop, sizeof(mmop));
+ if(n != sizeof(mmop))
+ panic("map_stub_pages : /proc/mm map for code failed, "
+ "err = %d\n", -n);
+
+ if ( stack ) {
+ __u64 map_offset;
+ int map_fd = phys_mapping(to_phys((void *)stack), &map_offset);
+ mmop = ((struct proc_mm_op)
+ { .op = MM_MMAP,
+ .u =
+ { .mmap =
+ { .addr = data,
+ .len = PAGE_SIZE,
+ .prot = PROT_READ | PROT_WRITE,
+ .flags = MAP_FIXED | MAP_SHARED,
+ .fd = map_fd,
+ .offset = map_offset
+ } } });
+ n = os_write_file(fd, &mmop, sizeof(mmop));
+ if(n != sizeof(mmop))
+ panic("map_stub_pages : /proc/mm map for data failed, "
+ "err = %d\n", -n);
+ }
+}
+
+void new_thread(void *stack, void **switch_buf_ptr, void **fork_buf_ptr,
+ void (*handler)(int))
+{
+ unsigned long flags;
+ sigjmp_buf switch_buf, fork_buf;
+ int enable;
+
+ *switch_buf_ptr = &switch_buf;
+ *fork_buf_ptr = &fork_buf;
+
+ /* Somewhat subtle - siglongjmp restores the signal mask before doing
+ * the longjmp. This means that when jumping from one stack to another
+ * when the target stack has interrupts enabled, an interrupt may occur
+ * on the source stack. This is bad when starting up a process because
+ * it's not supposed to get timer ticks until it has been scheduled.
+ * So, we disable interrupts around the sigsetjmp to ensure that
+ * they can't happen until we get back here where they are safe.
+ */
+ flags = get_signals();
+ block_signals();
+ if(UML_SIGSETJMP(&fork_buf, enable) == 0)
+ new_thread_proc(stack, handler);
+
+ remove_sigstack();
+
+ set_signals(flags);
+}
+
+void thread_wait(void *sw, void *fb)
+{
+ sigjmp_buf buf, **switch_buf = sw, *fork_buf;
+ int enable;
+
+ *switch_buf = &buf;
+ fork_buf = fb;
+ if(UML_SIGSETJMP(&buf, enable) == 0)
+ siglongjmp(*fork_buf, INIT_JMP_REMOVE_SIGSTACK);
+}
+
+void switch_threads(void *me, void *next)
+{
+ sigjmp_buf my_buf, **me_ptr = me, *next_buf = next;
+ int enable;
+
+ *me_ptr = &my_buf;
+ if(UML_SIGSETJMP(&my_buf, enable) == 0)
+ UML_SIGLONGJMP(next_buf, 1);
+}
+
+static sigjmp_buf initial_jmpbuf;
+
+/* XXX Make these percpu */
+static void (*cb_proc)(void *arg);
+static void *cb_arg;
+static sigjmp_buf *cb_back;
+
+int start_idle_thread(void *stack, void *switch_buf_ptr, void **fork_buf_ptr)
+{
+ sigjmp_buf **switch_buf = switch_buf_ptr;
+ int n, enable;
+
+ set_handler(SIGWINCH, (__sighandler_t) sig_handler,
+ SA_ONSTACK | SA_RESTART, SIGUSR1, SIGIO, SIGALRM,
+ SIGVTALRM, -1);
+
+ *fork_buf_ptr = &initial_jmpbuf;
+ n = UML_SIGSETJMP(&initial_jmpbuf, enable);
+ switch(n){
+ case INIT_JMP_NEW_THREAD:
+ new_thread_proc((void *) stack, new_thread_handler);
+ break;
+ case INIT_JMP_REMOVE_SIGSTACK:
+ remove_sigstack();
+ break;
+ case INIT_JMP_CALLBACK:
+ (*cb_proc)(cb_arg);
+ UML_SIGLONGJMP(cb_back, 1);
+ break;
+ case INIT_JMP_HALT:
+ kmalloc_ok = 0;
+ return(0);
+ case INIT_JMP_REBOOT:
+ kmalloc_ok = 0;
+ return(1);
+ default:
+ panic("Bad sigsetjmp return in start_idle_thread - %d\n", n);
+ }
+ UML_SIGLONGJMP(*switch_buf, 1);
+}
+
+void initial_thread_cb_skas(void (*proc)(void *), void *arg)
+{
+ sigjmp_buf here;
+ int enable;
+
+ cb_proc = proc;
+ cb_arg = arg;
+ cb_back = &here;
+
+ block_signals();
+ if(UML_SIGSETJMP(&here, enable) == 0)
+ UML_SIGLONGJMP(&initial_jmpbuf, INIT_JMP_CALLBACK);
+ unblock_signals();
+
+ cb_proc = NULL;
+ cb_arg = NULL;
+ cb_back = NULL;
+}
+
+void halt_skas(void)
+{
+ block_signals();
+ UML_SIGLONGJMP(&initial_jmpbuf, INIT_JMP_HALT);
+}
+
+void reboot_skas(void)
+{
+ block_signals();
+ UML_SIGLONGJMP(&initial_jmpbuf, INIT_JMP_REBOOT);
+}
+
+void switch_mm_skas(struct mm_id *mm_idp)
+{
+ int err;
+
+#warning need cpu pid in switch_mm_skas
+ if(proc_mm){
+ err = ptrace(PTRACE_SWITCH_MM, userspace_pid[0], 0,
+ mm_idp->u.mm_fd);
+ if(err)
+ panic("switch_mm_skas - PTRACE_SWITCH_MM failed, "
+ "errno = %d\n", errno);
+ }
+ else userspace_pid[0] = mm_idp->u.pid;
+}
#include "irq_user.h"
#include "ptrace_user.h"
#include "mem_user.h"
-#include "time_user.h"
#include "init.h"
#include "os.h"
#include "uml-config.h"
+/*
+ * Copyright (C) 2000, 2001, 2002 Jeff Dike (jdike@karaya.com)
+ * Licensed under the GPL
+ */
+
+#include <stdio.h>
#include <stdlib.h>
+#include <unistd.h>
+#include <time.h>
#include <sys/time.h>
+#include <signal.h>
+#include <errno.h>
+#include "user_util.h"
+#include "kern_util.h"
+#include "user.h"
+#include "process.h"
+#include "kern_constants.h"
+#include "os.h"
+
+/* XXX This really needs to be declared and initialized in a kernel file since
+ * it's in <linux/time.h>
+ */
+extern struct timespec wall_to_monotonic;
+
+static void set_interval(int timer_type)
+{
+ int usec = 1000000/hz();
+ struct itimerval interval = ((struct itimerval) { { 0, usec },
+ { 0, usec } });
+
+ if(setitimer(timer_type, &interval, NULL) == -1)
+ panic("setitimer failed - errno = %d\n", errno);
+}
+
+void enable_timer(void)
+{
+ set_interval(ITIMER_VIRTUAL);
+}
+
+void disable_timer(void)
+{
+ struct itimerval disable = ((struct itimerval) { { 0, 0 }, { 0, 0 }});
+ if((setitimer(ITIMER_VIRTUAL, &disable, NULL) < 0) ||
+ (setitimer(ITIMER_REAL, &disable, NULL) < 0))
+ printk("disnable_timer - setitimer failed, errno = %d\n",
+ errno);
+ /* If there are signals already queued, after unblocking ignore them */
+ set_handler(SIGALRM, SIG_IGN, 0, -1);
+ set_handler(SIGVTALRM, SIG_IGN, 0, -1);
+}
+
+void switch_timers(int to_real)
+{
+ struct itimerval disable = ((struct itimerval) { { 0, 0 }, { 0, 0 }});
+ struct itimerval enable = ((struct itimerval) { { 0, 1000000/hz() },
+ { 0, 1000000/hz() }});
+ int old, new;
+
+ if(to_real){
+ old = ITIMER_VIRTUAL;
+ new = ITIMER_REAL;
+ }
+ else {
+ old = ITIMER_REAL;
+ new = ITIMER_VIRTUAL;
+ }
+
+ if((setitimer(old, &disable, NULL) < 0) ||
+ (setitimer(new, &enable, NULL)))
+ printk("switch_timers - setitimer failed, errno = %d\n",
+ errno);
+}
-unsigned long long os_usecs(void)
+void uml_idle_timer(void)
+{
+ if(signal(SIGVTALRM, SIG_IGN) == SIG_ERR)
+ panic("Couldn't unset SIGVTALRM handler");
+
+ set_handler(SIGALRM, (__sighandler_t) alarm_handler,
+ SA_RESTART, SIGUSR1, SIGIO, SIGWINCH, SIGVTALRM, -1);
+ set_interval(ITIMER_REAL);
+}
+
+extern void ktime_get_ts(struct timespec *ts);
+#define do_posix_clock_monotonic_gettime(ts) ktime_get_ts(ts)
+
+void time_init(void)
+{
+ struct timespec now;
+
+ if(signal(SIGVTALRM, boot_timer_handler) == SIG_ERR)
+ panic("Couldn't set SIGVTALRM handler");
+ set_interval(ITIMER_VIRTUAL);
+
+ do_posix_clock_monotonic_gettime(&now);
+ wall_to_monotonic.tv_sec = -now.tv_sec;
+ wall_to_monotonic.tv_nsec = -now.tv_nsec;
+}
+
+unsigned long long os_nsecs(void)
{
struct timeval tv;
gettimeofday(&tv, NULL);
- return((unsigned long long) tv.tv_sec * 1000000 + tv.tv_usec);
+ return((unsigned long long) tv.tv_sec * BILLION + tv.tv_usec * 1000);
}
-/*
- * Overrides for Emacs so that we follow Linus's tabbing style.
- * Emacs will notice this stuff at the end of the file and automatically
- * adjust the settings for this buffer only. This must remain at the end
- * of the file.
- * ---------------------------------------------------------------------------
- * Local variables:
- * c-file-style: "linux"
- * End:
- */
+void idle_sleep(int secs)
+{
+ struct timespec ts;
+
+ ts.tv_sec = secs;
+ ts.tv_nsec = 0;
+ nanosleep(&ts, NULL);
+}
+
+/* XXX This partly duplicates init_irq_signals */
+
+void user_time_init(void)
+{
+ set_handler(SIGVTALRM, (__sighandler_t) alarm_handler,
+ SA_ONSTACK | SA_RESTART, SIGUSR1, SIGIO, SIGWINCH,
+ SIGALRM, SIGUSR2, -1);
+ set_handler(SIGALRM, (__sighandler_t) alarm_handler,
+ SA_ONSTACK | SA_RESTART, SIGUSR1, SIGIO, SIGWINCH,
+ SIGVTALRM, SIGUSR2, -1);
+ set_interval(ITIMER_VIRTUAL);
+}
#include "user_util.h"
#include "os.h"
#include "mode.h"
+#include "longjmp.h"
void usr2_handler(int sig, union uml_pt_regs *regs)
{
{
sigjmp_buf *buf = b;
- siglongjmp(*buf, val);
+ UML_SIGLONGJMP(buf, val);
}
#include "sysdep/sigcontext.h"
#include "irq_user.h"
#include "ptrace_user.h"
-#include "time_user.h"
#include "init.h"
#include "os.h"
#include "uml-config.h"
} while(1);
}
+void stop(void)
+{
+ while(1) sleep(1000000);
+}
+
+int wait_for_stop(int pid, int sig, int cont_type, void *relay)
+{
+ sigset_t *relay_signals = relay;
+ int status, ret;
+
+ while(1){
+ CATCH_EINTR(ret = waitpid(pid, &status, WUNTRACED));
+ if((ret < 0) ||
+ !WIFSTOPPED(status) || (WSTOPSIG(status) != sig)){
+ if(ret < 0){
+ printk("wait failed, errno = %d\n",
+ errno);
+ }
+ else if(WIFEXITED(status))
+ printk("process %d exited with status %d\n",
+ pid, WEXITSTATUS(status));
+ else if(WIFSIGNALED(status))
+ printk("process %d exited with signal %d\n",
+ pid, WTERMSIG(status));
+ else if((WSTOPSIG(status) == SIGVTALRM) ||
+ (WSTOPSIG(status) == SIGALRM) ||
+ (WSTOPSIG(status) == SIGIO) ||
+ (WSTOPSIG(status) == SIGPROF) ||
+ (WSTOPSIG(status) == SIGCHLD) ||
+ (WSTOPSIG(status) == SIGWINCH) ||
+ (WSTOPSIG(status) == SIGINT)){
+ ptrace(cont_type, pid, 0, WSTOPSIG(status));
+ continue;
+ }
+ else if((relay_signals != NULL) &&
+ sigismember(relay_signals, WSTOPSIG(status))){
+ ptrace(cont_type, pid, 0, WSTOPSIG(status));
+ continue;
+ }
+ else printk("process %d stopped with signal %d\n",
+ pid, WSTOPSIG(status));
+ panic("wait_for_stop failed to wait for %d to stop "
+ "with %d\n", pid, sig);
+ }
+ return(status);
+ }
+}
+
/*
*-------------------------
* only for tt mode (will be deleted in future...)
#include <setjmp.h>
#include <string.h>
+#include "longjmp.h"
unsigned long __do_user_copy(void *to, const void *from, int n,
void **fault_addr, void **fault_catcher,
int n), int *faulted_out)
{
unsigned long *faddrp = (unsigned long *) fault_addr, ret;
+ int enable;
sigjmp_buf jbuf;
*fault_catcher = &jbuf;
- if(sigsetjmp(jbuf, 1) == 0){
+ if(UML_SIGSETJMP(&jbuf, enable) == 0){
(*op)(to, from, n);
ret = 0;
*faulted_out = 0;
-/*
+/*
* Copyright (C) 2000, 2001, 2002 Jeff Dike (jdike@karaya.com)
* Licensed under the GPL
*/
#include "init.h"
#include "ptrace_user.h"
#include "uml-config.h"
-
-void stop(void)
-{
- while(1) sleep(1000000);
-}
+#include "os.h"
+#include "longjmp.h"
void stack_protections(unsigned long address)
{
int prot = PROT_READ | PROT_WRITE | PROT_EXEC;
- if(mprotect((void *) address, page_size(), prot) < 0)
+ if(mprotect((void *) address, page_size(), prot) < 0)
panic("protecting stack failed, errno = %d", errno);
}
panic("protecting stack failed, errno = %d", errno);
}
-int wait_for_stop(int pid, int sig, int cont_type, void *relay)
-{
- sigset_t *relay_signals = relay;
- int status, ret;
-
- while(1){
- CATCH_EINTR(ret = waitpid(pid, &status, WUNTRACED));
- if((ret < 0) ||
- !WIFSTOPPED(status) || (WSTOPSIG(status) != sig)){
- if(ret < 0){
- printk("wait failed, errno = %d\n",
- errno);
- }
- else if(WIFEXITED(status))
- printk("process %d exited with status %d\n",
- pid, WEXITSTATUS(status));
- else if(WIFSIGNALED(status))
- printk("process %d exited with signal %d\n",
- pid, WTERMSIG(status));
- else if((WSTOPSIG(status) == SIGVTALRM) ||
- (WSTOPSIG(status) == SIGALRM) ||
- (WSTOPSIG(status) == SIGIO) ||
- (WSTOPSIG(status) == SIGPROF) ||
- (WSTOPSIG(status) == SIGCHLD) ||
- (WSTOPSIG(status) == SIGWINCH) ||
- (WSTOPSIG(status) == SIGINT)){
- ptrace(cont_type, pid, 0, WSTOPSIG(status));
- continue;
- }
- else if((relay_signals != NULL) &&
- sigismember(relay_signals, WSTOPSIG(status))){
- ptrace(cont_type, pid, 0, WSTOPSIG(status));
- continue;
- }
- else printk("process %d stopped with signal %d\n",
- pid, WSTOPSIG(status));
- panic("wait_for_stop failed to wait for %d to stop "
- "with %d\n", pid, sig);
- }
- return(status);
- }
-}
-
int raw(int fd)
{
struct termios tt;
cfmakeraw(&tt);
- CATCH_EINTR(err = tcsetattr(fd, TCSADRAIN, &tt));
+ CATCH_EINTR(err = tcsetattr(fd, TCSADRAIN, &tt));
if(err < 0)
return -errno;
int setjmp_wrapper(void (*proc)(void *, void *), ...)
{
- va_list args;
+ va_list args;
sigjmp_buf buf;
int n;
va_end(args);
return(n);
}
-
-/*
- * Overrides for Emacs so that we follow Linus's tabbing style.
- * Emacs will notice this stuff at the end of the file and automatically
- * adjust the settings for this buffer only. This must remain at the end
- * of the file.
- * ---------------------------------------------------------------------------
- * Local variables:
- * c-file-style: "linux"
- * End:
- */
#include "choose-mode.h"
#include "kern.h"
#include "mode_kern.h"
+#include "proc_mm.h"
+#include "os.h"
extern int modify_ldt(int func, void *ptr, unsigned long bytecount);
int i;
long page, err=0;
void *addr = NULL;
+ struct proc_mm_op copy;
- memset(&desc, 0, sizeof(desc));
if(!ptrace_ldt)
init_MUTEX(&new_mm->ldt.semaphore);
if(!from_mm){
+ memset(&desc, 0, sizeof(desc));
/*
* We have to initialize a clean ldt.
*/
}
}
new_mm->ldt.entry_count = 0;
+
+ goto out;
}
- else if (!ptrace_ldt) {
+
+ if(proc_mm){
+ /* We have a valid from_mm, so we now have to copy the LDT of
+ * from_mm to new_mm, because using proc_mm an new mm with
+ * an empty/default LDT was created in new_mm()
+ */
+ copy = ((struct proc_mm_op) { .op = MM_COPY_SEGMENTS,
+ .u =
+ { .copy_segments =
+ from_mm->id.u.mm_fd } } );
+ i = os_write_file(new_mm->id.u.mm_fd, ©, sizeof(copy));
+ if(i != sizeof(copy))
+ printk("new_mm : /proc/mm copy_segments failed, "
+ "err = %d\n", -i);
+ }
+
+ if(!ptrace_ldt) {
/* Our local LDT is used to supply the data for
* modify_ldt(READLDT), if PTRACE_LDT isn't available,
* i.e., we have to use the stub for modify_ldt, which
up(&from_mm->ldt.semaphore);
}
+ out:
return err;
}
config ARCH_SPARSEMEM_ENABLE
def_bool y
- depends on NUMA
+ depends on (NUMA || EXPERIMENTAL)
+
+config ARCH_MEMORY_PROBE
+ def_bool y
+ depends on MEMORY_HOTPLUG
config ARCH_FLATMEM_ENABLE
def_bool y
config HAVE_ARCH_EARLY_PFN_TO_NID
def_bool y
+ depends on NUMA
config NR_CPUS
int "Maximum number of CPUs (2-256)"
#
# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.15-git7
-# Wed Jan 11 11:57:36 2006
+# Linux kernel version: 2.6.15-git12
+# Mon Jan 16 13:09:08 2006
#
CONFIG_X86_64=y
CONFIG_64BIT=y
# CONFIG_ATALK is not set
# CONFIG_X25 is not set
# CONFIG_LAPB is not set
+
+#
+# TIPC Configuration (EXPERIMENTAL)
+#
+# CONFIG_TIPC is not set
# CONFIG_NET_DIVERT is not set
# CONFIG_ECONET is not set
# CONFIG_WAN_ROUTER is not set
# CONFIG_SCSI_IPR is not set
# CONFIG_SCSI_QLOGIC_FC is not set
# CONFIG_SCSI_QLOGIC_1280 is not set
-CONFIG_SCSI_QLA2XXX=y
-# CONFIG_SCSI_QLA2XXX_EMBEDDED_FIRMWARE is not set
+# CONFIG_SCSI_QLA_FC is not set
# CONFIG_SCSI_LPFC is not set
# CONFIG_SCSI_DC395x is not set
# CONFIG_SCSI_DC390T is not set
# CONFIG_DL2K is not set
CONFIG_E1000=y
# CONFIG_E1000_NAPI is not set
+# CONFIG_E1000_DISABLE_PACKET_SPLIT is not set
# CONFIG_NS83820 is not set
# CONFIG_HAMACHI is not set
# CONFIG_YELLOWFIN is not set
# CONFIG_W83877F_WDT is not set
# CONFIG_W83977F_WDT is not set
# CONFIG_MACHZ_WDT is not set
+# CONFIG_SBC_EPX_C3_WATCHDOG is not set
#
# PCI-based Watchdog Cards
#
# CONFIG_I2C is not set
+#
+# SPI support
+#
+# CONFIG_SPI is not set
+# CONFIG_SPI_MASTER is not set
+
#
# Dallas's 1-wire bus
#
#
CONFIG_USB_HID=y
CONFIG_USB_HIDINPUT=y
+# CONFIG_USB_HIDINPUT_POWERBOOK is not set
# CONFIG_HID_FF is not set
# CONFIG_USB_HIDDEV is not set
# CONFIG_USB_AIPTEK is not set
CONFIG_DEBUG_FS=y
# CONFIG_DEBUG_VM is not set
# CONFIG_FRAME_POINTER is not set
+# CONFIG_FORCED_INLINING is not set
# CONFIG_RCU_TORTURE_TEST is not set
CONFIG_INIT_DEBUG=y
# CONFIG_DEBUG_RODATA is not set
#
obj-$(CONFIG_IA32_EMULATION) := ia32entry.o sys_ia32.o ia32_signal.o tls32.o \
- ia32_binfmt.o fpu32.o ptrace32.o syscall32.o syscall32_syscall.o
+ ia32_binfmt.o fpu32.o ptrace32.o syscall32.o syscall32_syscall.o \
+ mmap32.o
sysv-$(CONFIG_SYSVIPC) := ipc32.o
obj-$(CONFIG_IA32_EMULATION) += $(sysv-y)
} while(0)
-#define elf_map elf32_map
-
#include <linux/module.h>
MODULE_DESCRIPTION("Binary format loader for compatibility with IA32 ELF binaries.");
}
EXPORT_SYMBOL(ia32_setup_arg_pages);
-static unsigned long
-elf32_map (struct file *filep, unsigned long addr, struct elf_phdr *eppnt, int prot, int type)
-{
- unsigned long map_addr;
- struct task_struct *me = current;
-
- down_write(&me->mm->mmap_sem);
- map_addr = do_mmap(filep, ELF_PAGESTART(addr),
- eppnt->p_filesz + ELF_PAGEOFFSET(eppnt->p_vaddr), prot,
- type,
- eppnt->p_offset - ELF_PAGEOFFSET(eppnt->p_vaddr));
- up_write(&me->mm->mmap_sem);
- return(map_addr);
-}
-
#ifdef CONFIG_SYSCTL
/* Register vsyscall32 into the ABI table */
#include <linux/sysctl.h>
.quad sys_inotify_add_watch
.quad sys_inotify_rm_watch
.quad sys_migrate_pages
+ .quad compat_sys_openat /* 295 */
+ .quad sys_mkdirat
+ .quad sys_mknodat
+ .quad sys_fchownat
+ .quad sys_futimesat
+ .quad compat_sys_newfstatat /* 300 */
+ .quad sys_unlinkat
+ .quad sys_renameat
+ .quad sys_linkat
+ .quad sys_symlinkat
+ .quad sys_readlinkat /* 305 */
+ .quad sys_fchmodat
+ .quad sys_faccessat
ia32_syscall_end:
.rept IA32_NR_syscalls-(ia32_syscall_end-ia32_sys_call_table)/8
.quad ni_syscall
--- /dev/null
+/*
+ * linux/arch/x86_64/ia32/mm/mmap.c
+ *
+ * flexible mmap layout support
+ *
+ * Based on the i386 version which was
+ *
+ * Copyright 2003-2004 Red Hat Inc., Durham, North Carolina.
+ * All Rights Reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ *
+ *
+ * Started by Ingo Molnar <mingo@elte.hu>
+ */
+
+#include <linux/personality.h>
+#include <linux/mm.h>
+#include <linux/random.h>
+
+/*
+ * Top of mmap area (just below the process stack).
+ *
+ * Leave an at least ~128 MB hole.
+ */
+#define MIN_GAP (128*1024*1024)
+#define MAX_GAP (TASK_SIZE/6*5)
+
+static inline unsigned long mmap_base(struct mm_struct *mm)
+{
+ unsigned long gap = current->signal->rlim[RLIMIT_STACK].rlim_cur;
+ unsigned long random_factor = 0;
+
+ if (current->flags & PF_RANDOMIZE)
+ random_factor = get_random_int() % (1024*1024);
+
+ if (gap < MIN_GAP)
+ gap = MIN_GAP;
+ else if (gap > MAX_GAP)
+ gap = MAX_GAP;
+
+ return PAGE_ALIGN(TASK_SIZE - gap - random_factor);
+}
+
+/*
+ * This function, called very early during the creation of a new
+ * process VM image, sets up which VM layout function to use:
+ */
+void ia32_pick_mmap_layout(struct mm_struct *mm)
+{
+ /*
+ * Fall back to the standard layout if the personality
+ * bit is set, or if the expected stack growth is unlimited:
+ */
+ if (sysctl_legacy_va_layout ||
+ (current->personality & ADDR_COMPAT_LAYOUT) ||
+ current->signal->rlim[RLIMIT_STACK].rlim_cur == RLIM_INFINITY) {
+ mm->mmap_base = TASK_UNMAPPED_BASE;
+ mm->get_unmapped_area = arch_get_unmapped_area;
+ mm->unmap_area = arch_unmap_area;
+ } else {
+ mm->mmap_base = mmap_base(mm);
+ mm->get_unmapped_area = arch_get_unmapped_area_topdown;
+ mm->unmap_area = arch_unmap_area_topdown;
+ }
+}
ENTRY(stext)
ENTRY(_stext)
-.org 0x1000
-ENTRY(init_level4_pgt)
+ $page = 0
+#define NEXT_PAGE(name) \
+ $page = $page + 1; \
+ .org $page * 0x1000; \
+ phys_/**/name = $page * 0x1000 + __PHYSICAL_START; \
+ENTRY(name)
+
+NEXT_PAGE(init_level4_pgt)
/* This gets initialized in x86_64_start_kernel */
.fill 512,8,0
-.org 0x2000
-ENTRY(level3_ident_pgt)
- .quad 0x0000000000004007 + __PHYSICAL_START
+NEXT_PAGE(level3_ident_pgt)
+ .quad phys_level2_ident_pgt | 0x007
.fill 511,8,0
-.org 0x3000
-ENTRY(level3_kernel_pgt)
+NEXT_PAGE(level3_kernel_pgt)
.fill 510,8,0
/* (2^48-(2*1024*1024*1024)-((2^39)*511))/(2^30) = 510 */
- .quad 0x0000000000005007 + __PHYSICAL_START /* -> level2_kernel_pgt */
+ .quad phys_level2_kernel_pgt | 0x007
.fill 1,8,0
-.org 0x4000
-ENTRY(level2_ident_pgt)
+NEXT_PAGE(level2_ident_pgt)
/* 40MB for bootup. */
- .quad 0x0000000000000083
- .quad 0x0000000000200083
- .quad 0x0000000000400083
- .quad 0x0000000000600083
- .quad 0x0000000000800083
- .quad 0x0000000000A00083
- .quad 0x0000000000C00083
- .quad 0x0000000000E00083
- .quad 0x0000000001000083
- .quad 0x0000000001200083
- .quad 0x0000000001400083
- .quad 0x0000000001600083
- .quad 0x0000000001800083
- .quad 0x0000000001A00083
- .quad 0x0000000001C00083
- .quad 0x0000000001E00083
- .quad 0x0000000002000083
- .quad 0x0000000002200083
- .quad 0x0000000002400083
- .quad 0x0000000002600083
+ i = 0
+ .rept 20
+ .quad i << 21 | 0x083
+ i = i + 1
+ .endr
/* Temporary mappings for the super early allocator in arch/x86_64/mm/init.c */
.globl temp_boot_pmds
temp_boot_pmds:
.fill 492,8,0
-.org 0x5000
-ENTRY(level2_kernel_pgt)
+NEXT_PAGE(level2_kernel_pgt)
/* 40MB kernel mapping. The kernel code cannot be bigger than that.
When you change this change KERNEL_TEXT_SIZE in page.h too. */
/* (2^48-(2*1024*1024*1024)-((2^39)*511)-((2^30)*510)) = 0 */
- .quad 0x0000000000000183
- .quad 0x0000000000200183
- .quad 0x0000000000400183
- .quad 0x0000000000600183
- .quad 0x0000000000800183
- .quad 0x0000000000A00183
- .quad 0x0000000000C00183
- .quad 0x0000000000E00183
- .quad 0x0000000001000183
- .quad 0x0000000001200183
- .quad 0x0000000001400183
- .quad 0x0000000001600183
- .quad 0x0000000001800183
- .quad 0x0000000001A00183
- .quad 0x0000000001C00183
- .quad 0x0000000001E00183
- .quad 0x0000000002000183
- .quad 0x0000000002200183
- .quad 0x0000000002400183
- .quad 0x0000000002600183
+ i = 0
+ .rept 20
+ .quad i << 21 | 0x183
+ i = i + 1
+ .endr
/* Module mapping starts here */
.fill 492,8,0
-.org 0x6000
-ENTRY(empty_zero_page)
-
-.org 0x7000
-ENTRY(empty_bad_page)
+NEXT_PAGE(empty_zero_page)
-.org 0x8000
-ENTRY(empty_bad_pte_table)
+NEXT_PAGE(level3_physmem_pgt)
+ .quad phys_level2_kernel_pgt | 0x007 /* so that __va works even before pagetable_init */
+ .fill 511,8,0
-.org 0x9000
-ENTRY(empty_bad_pmd_table)
+#undef NEXT_PAGE
-.org 0xa000
-ENTRY(level3_physmem_pgt)
- .quad 0x0000000000005007 + __PHYSICAL_START /* -> level2_kernel_pgt (so that __va works even before pagetable_init) */
+ .data
- .org 0xb000
#ifdef CONFIG_ACPI_SLEEP
+ .align PAGE_SIZE
ENTRY(wakeup_level4_pgt)
- .quad 0x0000000000002007 + __PHYSICAL_START /* -> level3_ident_pgt */
+ .quad phys_level3_ident_pgt | 0x007
.fill 255,8,0
- .quad 0x000000000000a007 + __PHYSICAL_START
+ .quad phys_level3_physmem_pgt | 0x007
.fill 254,8,0
/* (2^48-(2*1024*1024*1024))/(2^39) = 511 */
- .quad 0x0000000000003007 + __PHYSICAL_START /* -> level3_kernel_pgt */
+ .quad phys_level3_kernel_pgt | 0x007
#endif
#ifndef CONFIG_HOTPLUG_CPU
*/
.align PAGE_SIZE
ENTRY(boot_level4_pgt)
- .quad 0x0000000000002007 + __PHYSICAL_START /* -> level3_ident_pgt */
+ .quad phys_level3_ident_pgt | 0x007
.fill 255,8,0
- .quad 0x000000000000a007 + __PHYSICAL_START
+ .quad phys_level3_physmem_pgt | 0x007
.fill 254,8,0
/* (2^48-(2*1024*1024*1024))/(2^39) = 511 */
- .quad 0x0000000000003007 + __PHYSICAL_START /* -> level3_kernel_pgt */
+ .quad phys_level3_kernel_pgt | 0x007
.data
pda->irqstackptr += IRQSTACKSIZE-64;
}
-char boot_exception_stacks[(N_EXCEPTION_STACKS - 2) * EXCEPTION_STKSZ + DEBUG_STKSZ]
+char boot_exception_stacks[(N_EXCEPTION_STACKS - 1) * EXCEPTION_STKSZ + DEBUG_STKSZ]
__attribute__((section(".bss.page_aligned")));
/* May not be marked __init: used by software suspend */
# Makefile for the linux x86_64-specific parts of the memory manager.
#
-obj-y := init.o fault.o ioremap.o extable.o pageattr.o
+obj-y := init.o fault.o ioremap.o extable.o pageattr.o mmap.o
obj-$(CONFIG_HUGETLB_PAGE) += hugetlbpage.o
obj-$(CONFIG_NUMA) += numa.o
obj-$(CONFIG_K8_NUMA) += k8topology.o
#include <linux/proc_fs.h>
#include <linux/pci.h>
#include <linux/dma-mapping.h>
+#include <linux/module.h>
+#include <linux/memory_hotplug.h>
#include <asm/processor.h>
#include <asm/system.h>
{}
};
-static __init void *alloc_low_page(int *index, unsigned long *phys)
+static __meminit void *alloc_low_page(int *index, unsigned long *phys)
{
struct temp_map *ti;
int i;
unsigned long pfn = table_end++, paddr;
void *adr;
+ if (after_bootmem) {
+ adr = (void *)get_zeroed_page(GFP_ATOMIC);
+ *phys = __pa(adr);
+ return adr;
+ }
+
if (pfn >= end_pfn)
panic("alloc_low_page: ran out of memory");
for (i = 0; temp_mappings[i].allocated; i++) {
ti->allocated = 1;
__flush_tlb();
adr = ti->address + ((pfn << PAGE_SHIFT) & ~PMD_MASK);
+ memset(adr, 0, PAGE_SIZE);
*index = i;
*phys = pfn * PAGE_SIZE;
return adr;
}
-static __init void unmap_low_page(int i)
+static __meminit void unmap_low_page(int i)
{
- struct temp_map *ti = &temp_mappings[i];
+ struct temp_map *ti;
+
+ if (after_bootmem)
+ return;
+
+ ti = &temp_mappings[i];
set_pmd(ti->pmd, __pmd(0));
ti->allocated = 0;
}
-static void __init phys_pud_init(pud_t *pud, unsigned long address, unsigned long end)
+static void __meminit
+phys_pmd_init(pmd_t *pmd, unsigned long address, unsigned long end)
+{
+ int i;
+
+ for (i = 0; i < PTRS_PER_PMD; pmd++, i++, address += PMD_SIZE) {
+ unsigned long entry;
+
+ if (address > end) {
+ for (; i < PTRS_PER_PMD; i++, pmd++)
+ set_pmd(pmd, __pmd(0));
+ break;
+ }
+ entry = _PAGE_NX|_PAGE_PSE|_KERNPG_TABLE|_PAGE_GLOBAL|address;
+ entry &= __supported_pte_mask;
+ set_pmd(pmd, __pmd(entry));
+ }
+}
+
+static void __meminit
+phys_pmd_update(pud_t *pud, unsigned long address, unsigned long end)
+{
+ pmd_t *pmd = pmd_offset(pud, (unsigned long)__va(address));
+
+ if (pmd_none(*pmd)) {
+ spin_lock(&init_mm.page_table_lock);
+ phys_pmd_init(pmd, address, end);
+ spin_unlock(&init_mm.page_table_lock);
+ __flush_tlb_all();
+ }
+}
+
+static void __meminit phys_pud_init(pud_t *pud, unsigned long address, unsigned long end)
{
- long i, j;
+ long i = pud_index(address);
- i = pud_index(address);
pud = pud + i;
+
+ if (after_bootmem && pud_val(*pud)) {
+ phys_pmd_update(pud, address, end);
+ return;
+ }
+
for (; i < PTRS_PER_PUD; pud++, i++) {
int map;
unsigned long paddr, pmd_phys;
pmd_t *pmd;
- paddr = address + i*PUD_SIZE;
- if (paddr >= end) {
- for (; i < PTRS_PER_PUD; i++, pud++)
- set_pud(pud, __pud(0));
+ paddr = (address & PGDIR_MASK) + i*PUD_SIZE;
+ if (paddr >= end)
break;
- }
- if (!e820_mapped(paddr, paddr+PUD_SIZE, 0)) {
+ if (!after_bootmem && !e820_mapped(paddr, paddr+PUD_SIZE, 0)) {
set_pud(pud, __pud(0));
continue;
}
pmd = alloc_low_page(&map, &pmd_phys);
+ spin_lock(&init_mm.page_table_lock);
set_pud(pud, __pud(pmd_phys | _KERNPG_TABLE));
- for (j = 0; j < PTRS_PER_PMD; pmd++, j++, paddr += PMD_SIZE) {
- unsigned long pe;
-
- if (paddr >= end) {
- for (; j < PTRS_PER_PMD; j++, pmd++)
- set_pmd(pmd, __pmd(0));
- break;
- }
- pe = _PAGE_NX|_PAGE_PSE | _KERNPG_TABLE | _PAGE_GLOBAL | paddr;
- pe &= __supported_pte_mask;
- set_pmd(pmd, __pmd(pe));
- }
+ phys_pmd_init(pmd, paddr, end);
+ spin_unlock(&init_mm.page_table_lock);
unmap_low_page(map);
}
__flush_tlb();
table_start >>= PAGE_SHIFT;
table_end = table_start;
+
+ early_printk("kernel direct mapping tables up to %lx @ %lx-%lx\n",
+ end, table_start << PAGE_SHIFT, table_end << PAGE_SHIFT);
}
/* Setup the direct mapping of the physical memory at PAGE_OFFSET.
This runs before bootmem is initialized and gets pages directly from the
physical memory. To access them they are temporarily mapped. */
-void __init init_memory_mapping(unsigned long start, unsigned long end)
+void __meminit init_memory_mapping(unsigned long start, unsigned long end)
{
unsigned long next;
* mapped. Unfortunately this is done currently before the nodes are
* discovered.
*/
- find_early_table_space(end);
+ if (!after_bootmem)
+ find_early_table_space(end);
start = (unsigned long)__va(start);
end = (unsigned long)__va(end);
for (; start < end; start = next) {
int map;
unsigned long pud_phys;
- pud_t *pud = alloc_low_page(&map, &pud_phys);
+ pgd_t *pgd = pgd_offset_k(start);
+ pud_t *pud;
+
+ if (after_bootmem)
+ pud = pud_offset_k(pgd, __PAGE_OFFSET);
+ else
+ pud = alloc_low_page(&map, &pud_phys);
+
next = start + PGDIR_SIZE;
if (next > end)
next = end;
phys_pud_init(pud, __pa(start), __pa(next));
- set_pgd(pgd_offset_k(start), mk_kernel_pgd(pud_phys));
+ if (!after_bootmem)
+ set_pgd(pgd_offset_k(start), mk_kernel_pgd(pud_phys));
unmap_low_page(map);
}
- asm volatile("movq %%cr4,%0" : "=r" (mmu_cr4_features));
+ if (!after_bootmem)
+ asm volatile("movq %%cr4,%0" : "=r" (mmu_cr4_features));
__flush_tlb_all();
- early_printk("kernel direct mapping tables upto %lx @ %lx-%lx\n", end,
- table_start<<PAGE_SHIFT,
- table_end<<PAGE_SHIFT);
}
void __cpuinit zap_low_mappings(int cpu)
void __init paging_init(void)
{
unsigned long zones[MAX_NR_ZONES], holes[MAX_NR_ZONES];
+
+ memory_present(0, 0, end_pfn);
+ sparse_init();
size_zones(zones, holes, 0, end_pfn);
free_area_init_node(0, NODE_DATA(0), zones,
__pa(PAGE_OFFSET) >> PAGE_SHIFT, holes);
__flush_tlb_all();
}
+/*
+ * Memory hotplug specific functions
+ * These are only for non-NUMA machines right now.
+ */
+#ifdef CONFIG_MEMORY_HOTPLUG
+
+void online_page(struct page *page)
+{
+ ClearPageReserved(page);
+ set_page_count(page, 1);
+ __free_page(page);
+ totalram_pages++;
+ num_physpages++;
+}
+
+int add_memory(u64 start, u64 size)
+{
+ struct pglist_data *pgdat = NODE_DATA(0);
+ struct zone *zone = pgdat->node_zones + MAX_NR_ZONES-2;
+ unsigned long start_pfn = start >> PAGE_SHIFT;
+ unsigned long nr_pages = size >> PAGE_SHIFT;
+ int ret;
+
+ ret = __add_pages(zone, start_pfn, nr_pages);
+ if (ret)
+ goto error;
+
+ init_memory_mapping(start, (start + size -1));
+
+ return ret;
+error:
+ printk("%s: Problem encountered in __add_pages!\n", __func__);
+ return ret;
+}
+EXPORT_SYMBOL_GPL(add_memory);
+
+int remove_memory(u64 start, u64 size)
+{
+ return -EINVAL;
+}
+EXPORT_SYMBOL_GPL(remove_memory);
+
+#endif
+
static struct kcore_list kcore_mem, kcore_vmalloc, kcore_kernel, kcore_modules,
kcore_vsyscall;
--- /dev/null
+/* Copyright 2005 Andi Kleen, SuSE Labs.
+ * Licensed under GPL, v.2
+ */
+#include <linux/config.h>
+#include <linux/mm.h>
+#include <linux/sched.h>
+#include <linux/random.h>
+#include <asm/ia32.h>
+
+/* Notebook: move the mmap code from sys_x86_64.c over here. */
+
+void arch_pick_mmap_layout(struct mm_struct *mm)
+{
+#ifdef CONFIG_IA32_EMULATION
+ if (current_thread_info()->flags & _TIF_IA32)
+ return ia32_pick_mmap_layout(mm);
+#endif
+ mm->mmap_base = TASK_UNMAPPED_BASE;
+ if (current->flags & PF_RANDOMIZE) {
+ /* Add 28bit randomness which is about 40bits of address space
+ because mmap base has to be page aligned.
+ or ~1/128 of the total user VM
+ (total user address space is 47bits) */
+ unsigned rnd = get_random_int() & 0xfffffff;
+ mm->mmap_base += ((unsigned long)rnd) << PAGE_SHIFT;
+ }
+ mm->get_unmapped_area = arch_get_unmapped_area;
+ mm->unmap_area = arch_unmap_area;
+}
+
static char chosen_elevator[16];
-static void elevator_setup_default(void)
+static int __init elevator_setup(char *str)
{
- struct elevator_type *e;
-
/*
- * If default has not been set, use the compiled-in selection.
+ * Be backwards-compatible with previous kernels, so users
+ * won't get the wrong elevator.
*/
- if (!chosen_elevator[0])
- strcpy(chosen_elevator, CONFIG_DEFAULT_IOSCHED);
-
- /*
- * If the given scheduler is not available, fall back to no-op.
- */
- if ((e = elevator_find(chosen_elevator)))
- elevator_put(e);
+ if (!strcmp(str, "as"))
+ strcpy(chosen_elevator, "anticipatory");
else
- strcpy(chosen_elevator, "noop");
-}
-
-static int __init elevator_setup(char *str)
-{
- strncpy(chosen_elevator, str, sizeof(chosen_elevator) - 1);
+ strncpy(chosen_elevator, str, sizeof(chosen_elevator) - 1);
return 0;
}
q->end_sector = 0;
q->boundary_rq = NULL;
- elevator_setup_default();
+ if (name && !(e = elevator_get(name)))
+ return -EINVAL;
- if (!name)
- name = chosen_elevator;
+ if (!e && *chosen_elevator && !(e = elevator_get(chosen_elevator)))
+ printk("I/O scheduler %s not found\n", chosen_elevator);
- e = elevator_get(name);
- if (!e)
- return -EINVAL;
+ if (!e && !(e = elevator_get(CONFIG_DEFAULT_IOSCHED))) {
+ printk("Default I/O scheduler not found, using no-op\n");
+ e = elevator_get("noop");
+ }
eq = kmalloc(sizeof(struct elevator_queue), GFP_KERNEL);
if (!eq) {
spin_unlock_irq(&elv_list_lock);
printk(KERN_INFO "io scheduler %s registered", e->elevator_name);
- if (!strcmp(e->elevator_name, chosen_elevator))
- printk(" (default)");
+ if (!strcmp(e->elevator_name, chosen_elevator) ||
+ (!*chosen_elevator &&
+ !strcmp(e->elevator_name, CONFIG_DEFAULT_IOSCHED)))
+ printk(" (default)");
printk("\n");
return 0;
}
* blk_queue_ordered - does this queue support ordered writes
* @q: the request queue
* @ordered: one of QUEUE_ORDERED_*
+ * @prepare_flush_fn: rq setup helper for cache flush ordered writes
*
* Description:
* For journalled file systems, doing ordered writes on a commit
return -EINVAL;
}
+ q->ordered = ordered;
q->next_ordered = ordered;
q->prepare_flush_fn = prepare_flush_fn;
* Enables a low level driver to set an upper limit on the size of
* received requests.
**/
-void blk_queue_max_sectors(request_queue_t *q, unsigned short max_sectors)
+void blk_queue_max_sectors(request_queue_t *q, unsigned int max_sectors)
{
if ((max_sectors << 9) < PAGE_CACHE_SIZE) {
max_sectors = 1 << (PAGE_CACHE_SHIFT - 9);
/**
* blk_end_sync_rq - executes a completion event on a request
* @rq: request to complete
+ * @error: end io status of the request
*/
void blk_end_sync_rq(struct request *rq, int error)
{
if (blk_fs_request(req) && req->rq_disk) {
const int rw = rq_data_dir(req);
- __disk_stat_add(req->rq_disk, sectors[rw], nr_bytes >> 9);
+ disk_stat_add(req->rq_disk, sectors[rw], nr_bytes >> 9);
}
total_bytes = bio_nbytes = 0;
source "drivers/sn/Kconfig"
+source "drivers/edac/Kconfig"
+
endmenu
obj-$(CONFIG_MD) += md/
obj-$(CONFIG_BT) += bluetooth/
obj-$(CONFIG_ISDN) += isdn/
+obj-$(CONFIG_EDAC) += edac/
obj-$(CONFIG_MCA) += mca/
obj-$(CONFIG_EISA) += eisa/
obj-$(CONFIG_CPU_FREQ) += cpufreq/
}
memset((void *)info, 0, sizeof(struct esp_struct));
+ spin_lock_init(&info->lock);
/* rx_trigger, tx_trigger are needed by autoconfig */
info->config.rx_trigger = rx_trigger;
info->config.tx_trigger = tx_trigger;
init_waitqueue_head(&info->close_wait);
init_waitqueue_head(&info->delta_msr_wait);
init_waitqueue_head(&info->break_wait);
- spin_lock_init(&info->lock);
ports = info;
printk(KERN_INFO "ttyP%d at 0x%04x (irq = %d) is an ESP ",
info->line, info->port, info->irq);
+++ /dev/null
-/****************************************************************************
- ******* *******
- ******* BRATES.H *******
- ******* *******
- ****************************************************************************
-
- Author : Jeremy Rolls
- Date : 1 Nov 1990
-
- *
- * (C) 1990 - 2000 Specialix International Ltd., Byfleet, Surrey, UK.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
-
- Version : 0.01
-
-
- Mods
- ----------------------------------------------------------------------------
- Date By Description
- ----------------------------------------------------------------------------
-
- ***************************************************************************/
-
-#ifndef _brates_h
-#ifndef lint
-/* static char * _brates_h_sccs = "@(#)brates.h 1.4"; */
-#endif
-#define _brates_h 1
-/* List of baud rate defines. Most are borrowed from /usr/include/sys/termio.h
-*/
-#ifndef INKERNEL
-
-#define B0 0x00
-#define B50 0x01
-#define B75 0x02
-#define B110 0x03
-#define B134 0x04
-#define B150 0x05
-#define B200 0x06
-#define B300 0x07
-#define B600 0x08
-#define B1200 0x09
-#define B1800 0x0a
-#define B2400 0x0b
-#define B4800 0x0c
-#define B9600 0x0d
-#define B19200 0x0e
-#define B38400 0x0f
-
-#endif
-
-/*
-** The following baudrates may or may not be defined
-** on various UNIX systems.
-** If they are not then we define them.
-** If they are then we do not define them ;-)
-**
-** This is appalling that we use same definitions as UNIX
-** for our own download code as there is no garuntee that
-** B57600 will be defined as 0x11 by a UNIX system....
-** Arghhhhh!!!!!!!!!!!!!!
-*/
-#if !defined(B56000)
-#define B56000 0x10
-#endif
-
-#if !defined(B57600)
-#define B57600 0x11
-#endif
-
-#if !defined(B64000)
-#define B64000 0x12
-#endif
-
-#if !defined(B115200)
-#define B115200 0x13
-#endif
-
-
-#if !defined(B2000)
-#define B2000 0x14
-#endif
-
-
-#define MAX_RATE B2000
-
-struct baud_rate { /* Tag for baud rates */
- /* short host_rate, *//* As passed by the driver */
- short divisor, /* The divisor */
- prescaler; /* The pre-scaler */
-};
-
-#endif
+++ /dev/null
-/*
- *
- * (C) 1990 - 2000 Specialix International Ltd., Byfleet, Surrey, UK.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
-*/
-#ifndef _chan_h
-#define _chan_h
-
-#ifndef lint
-#ifdef SCCS
-static char *_rio_chan_h_sccs = "@(#)chan.h 1.1";
-#endif
-#endif
-
-#define Link0 0
-#define Link1 1
-#define Link2 2
-#define Link3 3
-
-#endif
+++ /dev/null
-
-
-/****************************************************************************
- ******* *******
- ******* C O M M A N D P A C K E T H E A D E R S
- ******* *******
- ****************************************************************************
-
- Author : Ian Nandhra
- Date :
-
- *
- * (C) 1990 - 2000 Specialix International Ltd., Byfleet, Surrey, UK.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
-
- Version : 0.01
-
-
- Mods
- ----------------------------------------------------------------------------
- Date By Description
- ----------------------------------------------------------------------------
-
- ***************************************************************************/
-
-
-#ifndef _cmd_h
-#define _cmd_h
-
-#ifndef lint
-#ifdef SCCS
-static char *_rio_cmd_h_sccs = "@(#)cmd.h 1.1";
-#endif
-#endif
-
-
-#define PRE_EMPTIVE_CMD 0x80
-#define INLINE_CMD ~PRE_EMPTIVE_CMD
-
-#define CMD_IGNORE_PKT ( (ushort) 0)
-#define CMD_STATUS_REQ ( (ushort) 1)
-#define CMD_UNIT_STATUS_REQ ( (ushort) 2) /* Is this needed ??? */
-#define CMD_CONF_PORT ( (ushort) 3)
-#define CMD_CONF_UNIT ( (ushort) 4)
-#define CMD_ROUTE_MAP_REQ ( (ushort) 5)
-#define CMD_FLUSH_TX ( (ushort) 6)
-#define CMD_FLUSH_RX ( (ushort) 7)
-#define CMD_PARTION_PORT ( (ushort) 8)
-#define CMD_RESET_PORT ( (ushort) 0x0a)
-#define CMD_BOOT_UNIT ( (ushort) 0x0b)
-#define CMD_FOUND_UNIT ( (ushort) 0x0c)
-#define CMD_ATTACHED_RTA_2 ( (ushort) 0x0d)
-#define CMD_PROVIDE_BOOT ( (ushort) 0x0e)
-#define CMD_CIRRUS ( (ushort) 0x0f)
-
-#define FORM_STATUS_PKT ( (ushort) 1 )
-#define FORM_POLL_PKT ( (ushort) 2 )
-#define FORM_LINK_STATUS_PKT ( (ushort) 3 )
-
-
-#define CMD_DATA_PORT ( (ushort) 1 )
-#define CMD_DATA ( (ushort) 2 )
-
-#define CMD_TX_PART ( (ushort) 2 )
-#define CMD_RX_PART ( (ushort) 3 )
-#define CMD_RX_LIMIT ( (ushort) 4 )
-
-#endif
-
-/*********** end of file ***********/
+++ /dev/null
-/*
-** -----------------------------------------------------------------------------
-**
-** Perle Specialix driver for Linux
-** Ported from existing RIO Driver for SCO sources.
- *
- * (C) 1990 - 2000 Specialix International Ltd., Byfleet, Surrey, UK.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
-**
-** Module : data.h
-** SID : 1.2
-** Last Modified : 11/6/98 11:34:09
-** Retrieved : 11/6/98 11:34:21
-**
-** ident @(#)data.h 1.2
-**
-** -----------------------------------------------------------------------------
-*/
-
-#ifndef __rio_datadex__
-#define __rio_datadex__
-
-#ifndef lint
-static char *_data_h_sccs_ = "@(#)data.h 1.2";
-#endif
-
-#endif
+++ /dev/null
-/*
-** File: debug.h
-**
-** Author: David Dix
-**
-** Created: 12th March 1993
-**
-** Last modified: 93/04/27
-**
- *
- * (C) 1990 - 2000 Specialix International Ltd., Byfleet, Surrey, UK.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
-*/
-
-#ifndef _debug_h_
-#define _debug_h_
-
-
-#if defined(DCIRRUS)
-#define DBPACKET(pkt, opt, str, chn) debug_packet((pkt), (opt), (str), (chn))
-#else
-#define DBPACKET(pkt, opt, str, c)
-#endif /* DCIRRUS */
-
-
-#endif /* _debug_h_ */
+++ /dev/null
-/*
-** -----------------------------------------------------------------------------
-**
-** Perle Specialix driver for Linux
-** Ported from existing RIO Driver for SCO sources.
-
- *
- * (C) 1990 - 2000 Specialix International Ltd., Byfleet, Surrey, UK.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
-**
-** Module : eisa.h
-** SID : 1.2
-** Last Modified : 11/6/98 11:34:10
-** Retrieved : 11/6/98 11:34:21
-**
-** ident @(#)eisa.h 1.2
-**
-** -----------------------------------------------------------------------------
-*/
-
-#ifndef __rio_eisa_h__
-#define __rio_eisa_h__
-
-#ifdef SCCS_LABELS
-#ifndef lint
-static char *_eisa_h_sccs_ = "@(#)eisa.h 1.2";
-#endif
-#endif
-
-/*
-** things to do with the EISA bus
-*/
-
-#define RIO_EISA_STRING_ADDRESS 0xfffd9 /* where EISA is stored */
-
-#define RIO_MAX_EISA_SLOTS 16 /* how many EISA slots? */
-
-#define RIO_EISA_IDENT 0x984D /* Specialix */
-#define RIO_EISA_PRODUCT_CODE 0x14 /* Code 14 */
-#define RIO_EISA_ENABLE_BIT 0x01 /* To enable card */
-
-#define EISA_MEMORY_BASE_LO 0xC00 /* A16-A23 */
-#define EISA_MEMORY_BASE_HI 0xC01 /* A24-A31 */
-#define EISA_INTERRUPT_VEC 0xC02 /* see below */
-#define EISA_CONTROL_PORT 0xC02 /* see below */
-#define EISA_INTERRUPT_RESET 0xC03 /* read to clear IRQ */
-
-#define EISA_PRODUCT_IDENT_LO 0xC80 /* where RIO_EISA_IDENT is */
-#define EISA_PRODUCT_IDENT_HI 0xC81
-#define EISA_PRODUCT_NUMBER 0xC82 /* where PROD_CODE is */
-#define EISA_REVISION_NUMBER 0xC83 /* revision (1dp) */
-#define EISA_ENABLE 0xC84 /* set LSB to enable card */
-#define EISA_UNIQUE_NUM_0 0xC88 /* vomit */
-#define EISA_UNIQUE_NUM_1 0xC8A
-#define EISA_UNIQUE_NUM_2 0xC90 /* bit strangely arranged */
-#define EISA_UNIQUE_NUM_3 0xC92
-#define EISA_MANUF_YEAR 0xC98 /* when */
-#define EISA_MANUF_WEEK 0xC9A /* more when */
-
-#define EISA_TP_BOOT_FROM_RAM 0x01
-#define EISA_TP_BOOT_FROM_LINK 0x00
-#define EISA_TP_FAST_LINKS 0x02
-#define EISA_TP_SLOW_LINKS 0x00
-#define EISA_TP_BUS_ENABLE 0x04
-#define EISA_TP_BUS_DISABLE 0x00
-#define EISA_TP_RUN 0x08
-#define EISA_TP_RESET 0x00
-#define EISA_POLLED 0x00
-#define EISA_IRQ_3 0x30
-#define EISA_IRQ_4 0x40
-#define EISA_IRQ_5 0x50
-#define EISA_IRQ_6 0x60
-#define EISA_IRQ_7 0x70
-#define EISA_IRQ_9 0x90
-#define EISA_IRQ_10 0xA0
-#define EISA_IRQ_11 0xB0
-#define EISA_IRQ_12 0xC0
-#define EISA_IRQ_14 0xE0
-#define EISA_IRQ_15 0xF0
-
-#define EISA_INTERRUPT_MASK 0xF0
-#define EISA_CONTROL_MASK 0x0F
-
-#define RIO_EISA_DEFAULT_MODE EISA_TP_SLOW_LINKS
-
-#define RIOEisaToIvec(X) (uchar )((uchar)((X) & EISA_INTERRUPT_MASK)>>4)
-
-#define INBZ(z,x) inb(((z)<<12) | (x))
-#define OUTBZ(z,x,y) outb((((z)<<12) | (x)), y)
-
-#endif /* __rio_eisa_h__ */
+++ /dev/null
-/****************************************************************************
- ******* *******
- ******* E N A B L E H E A D E R S
- ******* *******
- ****************************************************************************
-
- Author : Ian Nandhra
- Date :
-
- *
- * (C) 1990 - 2000 Specialix International Ltd., Byfleet, Surrey, UK.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
-
- Version : 0.01
-
-
- Mods
- ----------------------------------------------------------------------------
- Date By Description
- ----------------------------------------------------------------------------
-
- ***************************************************************************/
-
-#ifndef lint
-#ifdef SCCS
-static char *_rio_enable_h_sccs = "@(#)enable.h 1.1";
-#endif
-#endif
-
-
-#define ENABLE_LTT TRUE
-#define ENABLE_LRT TRUE
-
-
-/*********** end of file ***********/
+++ /dev/null
-
-
-/****************************************************************************
- ******* *******
- ******* F O R M P A C K E T H E A D E R F I L E
- ******* *******
- ****************************************************************************
-
- Author : Ian Nandhra
- Date :
-
- *
- * (C) 1990 - 2000 Specialix International Ltd., Byfleet, Surrey, UK.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
-
- Version : 0.01
-
-
- Mods
- ----------------------------------------------------------------------------
- Date By Description
- ----------------------------------------------------------------------------
-
- ***************************************************************************/
-
-#ifndef _formpkt_h
-#define _formpkt_h 1
-
-#ifndef lint
-#ifdef SCCS
-static char *_rio_formpkt_h_sccs = "@(#)formpkt.h 1.1";
-#endif
-#endif
-
-typedef struct FORM_BOOT_PKT_1 FORM_BOOT_PKT_1;
-struct FORM_BOOT_PKT_1 {
- ushort pkt_number;
- ushort pkt_total;
- ushort boot_top;
-};
-
-typedef struct FORM_BOOT_PKT_2 FORM_BOOT_PKT_2;
-struct FORM_BOOT_PKT_2 {
- ushort pkt_number;
- char boot_data[10];
-};
-
-
-typedef struct FORM_ATTACH_RTA FORM_ATTACH_RTA;
-struct FORM_ATTACH_RTA {
- char cmd_code;
- char booter_serial[4];
- char booter_link;
- char bootee_serial[4];
- char bootee_link;
-};
-
-
-typedef struct FORM_BOOT_ID FORM_BOOT_ID;
-struct FORM_BOOT_ID {
- char cmd_code;
- char bootee_serial[4];
- char bootee_prod_id;
- char bootee_link;
-};
-
-
-
-typedef struct FORM_ROUTE_1 FORM_ROUTE_1;
-struct FORM_ROUTE_1 {
- char cmd_code;
- char pkt_number;
- char total_in_sequence;
- char unit_id;
- char host_unit_id;
-};
-
-typedef struct FORM_ROUTE_2 FORM_ROUTE_2;
-struct FORM_ROUTE_2 {
- char cmd_code;
- char pkt_number;
- char total_in_sequence;
- char route_data[9];
-};
-
-typedef struct FORM_ROUTE_REQ FORM_ROUTE_REQ;
-struct FORM_ROUTE_REQ {
- char cmd_code;
- char pkt_number;
- char total_in_sequence;
- char route_data[10];
-};
-
-
-typedef struct FORM_ERROR FORM_ERROR;
-struct FORM_ERROR {
- char cmd_code;
- char error_code;
-
-};
-
-typedef struct FORM_STATUS FORM_STATUS;
-struct FORM_STATUS {
- char cmd_code;
- char status_code;
- char last_packet_valid;
- char tx_buffer;
- char rx_buffer;
- char port_status;
- char phb_status;
-};
-
-
-typedef struct FORM_LINK_STATUS FORM_LINK_STATUS;
-struct FORM_LINK_STATUS {
- char cmd_code;
- char status_code;
- char link_number;
- ushort rx_errors;
- ushort tx_errors;
- ushort csum_errors;
- ushort disconnects;
-};
-
-
-
-typedef struct FORM_PARTITION FORM_PARTITION;
-struct FORM_PARTITION {
- char cmd_code;
- char status_code;
- char port_number;
- char tx_max;
- char rx_max;
- char rx_limit;
-};
-
-
-#endif
-
-/*********** end of file ***********/
+++ /dev/null
-/****************************************************************************
- ******* *******
- ******* H O S T H A R D W A R E
- ******* *******
- ****************************************************************************
-
- Author : Ian Nandhra / Jeremy Rolls
- Date :
-
- *
- * (C) 1990 - 2000 Specialix International Ltd., Byfleet, Surrey, UK.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
-
- Version : 0.01
-
-
- Mods
- ----------------------------------------------------------------------------
- Date By Description
- ----------------------------------------------------------------------------
-
- ***************************************************************************/
-
-
-#ifndef lint
-#ifdef SCCS_LABELS
-static char *_rio_hosthw_h_sccs = "@(#)hosthw.h 1.2";
-#endif
-#endif
-
-#define SET_OTHER_INTERRUPT ( (volatile u_short *) 0x7c80 )
-#define SET_EISA_INTERRUPT ( (volatile u_short *) 0x7ef0 )
-
-#define EISA_HOST 0x30
-#define AT_HOST 0xa0
-#define MCA_HOST 0xb0
-#define PCI_HOST 0xd0
-
-#define PRODUCT_MASK 0xf0
-
-
-/*********** end of file ***********/
+++ /dev/null
-/****************************************************************************
- ******* *******
- ******* L R T
- ******* *******
- ****************************************************************************
-
- Author : Ian Nandhra / Jeremy Rolls
- Date :
-
- *
- * (C) 1990 - 2000 Specialix International Ltd., Byfleet, Surrey, UK.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
-
- Version : 0.01
-
-
- Mods
- ----------------------------------------------------------------------------
- Date By Description
- ----------------------------------------------------------------------------
-
- ***************************************************************************/
-
-#ifndef lint
-#ifdef SCCS_LABELS
-static char *_rio_lrt_h_sccs = "@(#)lrt.h 1.1";
-#endif
-#endif
-
-
-#ifdef DCIRRUS
-#define LRT_STACK (unsigned short) 600
-#else
-#define LRT_STACK (ushort) 200
-#endif
-
-
-
-/*********** end of file ***********/
+++ /dev/null
-/****************************************************************************
- ******* *******
- ******* L T T
- ******* *******
- ****************************************************************************
-
- Author : Ian Nandhra / Jeremy Rolls
- Date :
-
- *
- * (C) 1990 - 2000 Specialix International Ltd., Byfleet, Surrey, UK.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
-
- Version : 0.01
-
-
- Mods
- ----------------------------------------------------------------------------
- Date By Description
- ----------------------------------------------------------------------------
-
- ***************************************************************************/
-
-#ifndef lint
-#ifdef SCCS_LABELS
-static char *_rio_ltt_h_sccs = "@(#)ltt.h 1.1";
-#endif
-#endif
-
-#ifdef DCIRRUS
-#define LTT_STACK (unsigned short) 600
-#else
-#define LTT_STACK (ushort) 200
-#endif
-
-
-
-
-/*********** end of file ***********/
+++ /dev/null
-
-
-
-/****************************************************************************
- ******* *******
- ******* L T T W A K E U P H E A D E R
- ******* *******
- ****************************************************************************
-
- Author : Ian Nandhra
- Date :
-
- *
- * (C) 1990 - 2000 Specialix International Ltd., Byfleet, Surrey, UK.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
-
- Version : 0.01
-
-
- Mods
- ----------------------------------------------------------------------------
- Date By Description
- ----------------------------------------------------------------------------
-
- ***************************************************************************/
-
-#ifndef lint
-#ifdef SCCS_LABELS
-static char *_rio_lttwake_h_sccs = "@(#)lttwake.h 1.1";
-#endif
-#endif
-
-#define LTT_WAKEUP_STACK 500
-#define LTT_WAKEUP_INTERVAL (int) (500 * MILLISECOND)
-
-
-/*********** end of file ***********/
+++ /dev/null
-/*
-** -----------------------------------------------------------------------------
-**
-** Perle Specialix driver for Linux
-** Ported from existing RIO Driver for SCO sources.
- *
- * (C) 1990 - 2000 Specialix International Ltd., Byfleet, Surrey, UK.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
-**
-** Module : mca.h
-** SID : 1.2
-** Last Modified : 11/6/98 11:34:11
-** Retrieved : 11/6/98 11:34:21
-**
-** ident @(#)mca.h 1.2
-**
-** -----------------------------------------------------------------------------
-*/
-
-#ifndef __rio_mca_h__
-#define __rio_mca_h__
-
-#ifdef SCCS_LABELS
-static char *_mca_h_sccs_ = "@(#)mca.h 1.2";
-#endif
-
-/*
-** Micro Channel stuff
-*/
-
-#define McaMaxSlots 8
-#define McaSlotSelect 0x96
-#define McaSlotEnable 0x08
-#define McaIdLow 0x100
-#define McaIdHigh 0x101
-#define McaIrqEnable 0x102
-#define McaMemory 0x103
-#define McaRIOId 0x6a5c
-#define McaIrq9 0x00
-#define McaIrq3 0x02
-#define McaIrq4 0x04
-#define McaIrq7 0x06
-#define McaIrq10 0x08
-#define McaIrq11 0x0A
-#define McaIrq12 0x0C
-#define McaIrq15 0x0E
-#define McaIrqMask 0x0E
-#define McaCardEnable 0x01
-#define McaAddress(X) (((X)&0xFF)<<16)
-
-#define McaTpFastLinks 0x40
-#define McaTpSlowLinks 0x00
-#define McaTpBootFromRam 0x01
-#define McaTpBootFromLink 0x00
-#define McaTpBusEnable 0x02
-#define McaTpBusDisable 0x00
-
-#define RIO_MCA_DEFAULT_MODE SLOW_LINKS
-
-#endif /* __rio_mca_h__ */
+++ /dev/null
-/*
-** -----------------------------------------------------------------------------
-**
-** Perle Specialix driver for Linux
-** Ported from existing RIO Driver for SCO sources.
- *
- * (C) 1990 - 2000 Specialix International Ltd., Byfleet, Surrey, UK.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
-**
-** Module : mesg.h
-** SID : 1.2
-** Last Modified : 11/6/98 11:34:12
-** Retrieved : 11/6/98 11:34:21
-**
-** ident @(#)mesg.h 1.2
-**
-** -----------------------------------------------------------------------------
-*/
-
-#ifndef __rio_mesg_h__
-#define __rio_mesg_h__
-
-#ifdef SCCS_LABELS
-static char *_mesg_h_sccs_ = "@(#)mesg.h 1.2";
-#endif
-
-
-#endif /* __rio_mesg_h__ */
+++ /dev/null
-/****************************************************************************
- ******* *******
- ******* P O L L
- ******* *******
- ****************************************************************************
-
- Author : Ian Nandhra / Jeremy Rolls
- Date :
-
- *
- * (C) 1990 - 2000 Specialix International Ltd., Byfleet, Surrey, UK.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
-
- Version : 0.01
-
-
- Mods
- ----------------------------------------------------------------------------
- Date By Description
- ----------------------------------------------------------------------------
-
- ***************************************************************************/
-
-#ifndef _poll_h
-#define _poll_h
-
-#ifndef lint
-#ifdef SCCS_LABELS
-static char *_rio_poll_h_sccs = "@(#)poll.h 1.2";
-#endif
-#endif
-
-
-#ifdef HOST
-#define POLL_STACK 100
-#endif
-#ifdef RTA
-#define POLL_STACK 200
-#endif
-
-#define POLL_PERIOD (int) SECOND
-
-/* The various poll commands */
-#define POLL_POLL 0 /* We are connected and happy.. */
-#define POLL_INTRO 1 /* Introduction packet */
-#define POLL_TOPOLOGY 2 /* Topology update */
-#define POLL_ASSIGN 3 /* ID assign */
-#define POLL_FOAD 4 /* F*** Off And Die */
-#define POLL_LMD 5 /* Let Me Die */
-#define POLL_DYB 6 /* Die You Ba***** */
-
-/* The way data fields are split up for POLL packets */
-#define POLL_HOST_SERIAL 2 /* Host who booted me */
-#define POLL_MY_SERIAL 6 /* My serial number */
-#define POLL_YOUR_ID 1 /* Your ID number */
-#define POLL_TOPOLOGY_FIELDS 2 /* Topology maps */
-
-#endif
-
-/*********** end of file ***********/
+++ /dev/null
-/*
- *
- * (C) 1990 - 2000 Specialix International Ltd., Byfleet, Surrey, UK.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-#ifndef _prototypes_h
-#define _prototypes_h
-
-
-/*
-** boot.c
-*/
-void init_boot(char *p, short stage);
-
-/*
-** disconct.c
-*/
-void kill_boot(LPB * link);
-void disconnected(LPB * link);
-short boot_3(LPB * link, PKT * pkt);
-short send_3_pkt(LPB * link, PKT * pkt);
-
-/*
-** error.c
-*/
-void du_error(void);
-
-/*
-** formpkt.c
-*/
-ushort sum_it(PKT * pkt);
-void form_rup_pkt(RUP * form_rup, PKT * pkt);
-void form_poll_pkt(int type, LPB * link, int node);
-void form_route_pkt(int type, PKT * pkt, LPB * link);
-
-/*
-** idle.c
-*/
-void idle(Process * idle_p);
-
-/*
-** init.c
-*/
-void general_init(void);
-void mem_halt(int error);
-
-/*
-** linkinit.c
-*/
-void initlink(u_short number, LPB * link);
-void runlink(LPB * link);
-
-/*
-** list.c
-*/
-PKT *get_free_start(void);
-void put_free_start(PKT * pkt);
-
-#ifdef HOST
-int can_remove_transmit(PKT ** pkt, PKT * pointer);
-#endif
-
-#ifdef RTA
-int spl7(void);
-int spl0(void);
-Q_BUF *get_free_q(void);
-PKT *get_free_end(void);
-int add_end(PKT * pkt, PHB * phb, int type);
-unsigned short free_packets(PHB * phb, int type);
-int can_remove_start(PKT ** pkt, PHB * phb, int type);
-int can_add_start(PHB * phb, int type);
-int can_add_end(PHB * phb, int type);
-void put_free_end(PKT * pkt);
-int remove_start(PKT ** pkt, PHB * phb, int type);
-#endif
-
-/*
-** Lrt.c
-*/
-void lrt(Process * lrt_p, LPB * link);
-
-#ifdef RTA
-void set_led_red(LPB * link);
-#endif
-
-/*
-** ltt.c
-*/
-void ltt(Process * ltt_p, LPB * link, PHB * phb_ptr[]);
-void send_poll(LPB * link);
-void request_id(LPB * link);
-void send_topology_update(LPB * link);
-void send_topology(LPB * link);
-void supply_id(LPB * link);
-
-#ifdef RTA
-void redirect_queue(LPB * link, ushort flush);
-int obtain_rup(int rup_number, PKT ** pkt_address, LPB * link);
-#endif
-
-#ifdef TESTING_PERF
-int consume_cpu(void);
-#endif
-
-/*
-** lttwake.c
-*/
-#ifdef HOST
-void ltt_wakeup(Process * ltt_wakeup_p);
-#endif
-
-/*
-** mapgen.c
-*/
-void generate_id_map(short mapping, ROUTE_STR route[]);
-void gen_map(int mapping, int looking_at, int come_from, ROUTE_STR route[], int link, int *ttl);
-void adjust_ttl(int mapping, int looking_at, int come_from, ROUTE_STR route[], int link, int *ttl);
-void init_sys_map(void);
-
-/*
-** mmu.c
-*/
-char *rio_malloc(unsigned int amount);
-char *rio_calloc(unsigned int num, unsigned int size);
-ERROR rio_mmu_init(uint total_mem);
-
-/*
-** partn.c
-*/
-void partition_tx(struct PHB *phb, u_short tx_size, u_short rx_size, u_short rx_limit);
-
-/*
-** poll.c
-*/
-void tx_poll(Process * tx_poll_p);
-
-/*
-** process.c
-*/
-int get_proc_space(Process ** pd, int **pws, int wssize);
-
-/*
-** readrom.c
-*/
-void read_serial_number(char *buf);
-
-/*
-** rio.c
-*/
-int main(void);
-
-/*
-** route.c
-*/
-void route_update(PKT * pkt, LPB * link);
-
-/*
-** rtainit.c
-*/
-#if defined(RTA)
-void rta_init(ushort RtaType);
-#endif /* defined(RTA) */
-
-/*
-** rupboot.c
-*/
-void rup_boot(PKT * pkt, RUP * this_rup, LPB * link);
-
-#ifdef RTA
-void kill_your_neighbour(int link_to_kill);
-#endif
-
-/*
-** rupcmd.c
-*/
-void rup_command(PKT * pkt, struct RUP *this_rup, LPB * link);
-
-/*
-** ruperr.c
-*/
-void rup_error(PKT * pkt, RUP * this_rup, LPB * link);
-void illegal_cmd(PKT * src_pkt);
-
-/*
-** ruppoll.c
-*/
-void rup_poll(PKT * pkt, RUP * this_rup, LPB * link);
-
-/*
-** ruppower.c
-*/
-void rup_power(PKT * pkt, RUP * this_rup, LPB * link);
-
-/*
-** ruprm.c
-*/
-void rup_route_map(PKT * pkt, RUP * this_rup, LPB * link);
-
-/*
-** rupstat.c
-*/
-void rup_status(PKT * pkt, RUP * this_rup, LPB * link);
-
-/*
-** rupsync.c
-*/
-void rup_sync(PKT * pkt);
-
-/*
-** rxpkt.c
-*/
-ERROR rx_pkt(PKT_ptr_ptr pkt_address, LPB * link);
-
-/*
-** sendsts.c
-*/
-void send_status(PKT * requesting_pkt, RUP * this_rup);
-
-/*
-** serial.c
-*/
-void assign_serial(char *ser_in, char *ser_out);
-int cmp_serial(char *ser_1, char *ser_2);
-
-/*
-** txpkt.c
-*/
-ERROR tx_pkt(PKT * pkt, LPB * link);
-short send_sync(LPB * link);
-
-#endif /* _prototypes_h */
*/
#define IRQ_RATE_LIMIT 200
-#if 0
-/* Not implemented */
-/*
- * The following defines are mostly for testing purposes. But if you need
- * some nice reporting in your syslog, you can define them also.
- */
-#define RIO_REPORT_FIFO
-#define RIO_REPORT_OVERRUN
-#endif
-
/* These constants are derived from SCO Source */
static struct Conf
PortP = (struct Port *) ptr;
PortP->gs.tty = NULL;
-#if 0
- port->gs.flags &= ~GS_ACTIVE;
- if (!port->gs.tty) {
- rio_dprintk(RIO_DBUG_TTY, "No tty.\n");
- return;
- }
- if (!port->gs.tty->termios) {
- rio_dprintk(RIO_DEBUG_TTY, "No termios.\n");
- return;
- }
- if (port->gs.tty->termios->c_cflag & HUPCL) {
- rio_setsignals(port, 0, 0);
- }
-#endif
-
func_exit();
}
rc = 0;
switch (cmd) {
-#if 0
- case TIOCGSOFTCAR:
- rc = put_user(((tty->termios->c_cflag & CLOCAL) ? 1 : 0), (unsigned int *) arg);
- break;
-#endif
case TIOCSSOFTCAR:
if ((rc = get_user(ival, (unsigned int *) arg)) == 0) {
tty->termios->c_cflag = (tty->termios->c_cflag & ~CLOCAL) | (ival ? CLOCAL : 0);
if (access_ok(VERIFY_READ, (void *) arg, sizeof(struct serial_struct)))
rc = gs_setserial(&PortP->gs, (struct serial_struct *) arg);
break;
-#if 0
- /*
- * note: these IOCTLs no longer reach here. Use
- * tiocmset/tiocmget driver methods instead. The
- * #if 0 disablement predates this comment.
- */
- case TIOCMGET:
- rc = -EFAULT;
- if (access_ok(VERIFY_WRITE, (void *) arg, sizeof(unsigned int))) {
- rc = 0;
- ival = rio_getsignals(port);
- put_user(ival, (unsigned int *) arg);
- }
- break;
- case TIOCMBIS:
- if ((rc = get_user(ival, (unsigned int *) arg)) == 0) {
- rio_setsignals(port, ((ival & TIOCM_DTR) ? 1 : -1), ((ival & TIOCM_RTS) ? 1 : -1));
- }
- break;
- case TIOCMBIC:
- if ((rc = get_user(ival, (unsigned int *) arg)) == 0) {
- rio_setsignals(port, ((ival & TIOCM_DTR) ? 0 : -1), ((ival & TIOCM_RTS) ? 0 : -1));
- }
- break;
- case TIOCMSET:
- if ((rc = get_user(ival, (unsigned int *) arg)) == 0) {
- rio_setsignals(port, ((ival & TIOCM_DTR) ? 1 : 0), ((ival & TIOCM_RTS) ? 1 : 0));
- }
- break;
-#endif
default:
rc = -ENOIOCTLCMD;
break;
struct CmdBlk *CmdBlkP;
uint sequence;
-#ifdef CHECK
- CheckHost(Host);
- CheckRup(Rup);
- CheckHostP(HostP);
- CheckPacketP(PacketP);
-#endif
-
/*
** If we haven't been told what to boot, we can't boot it.
*/
MyType = "RTA";
MyName = HostP->Mapping[Rup].Name;
}
-#ifdef CHECK
- CheckString(MyType);
- CheckString(MyName);
-#endif
-
MyLink = RBYTE(PktCmdP->LinkNum);
/*
}
}
-#if 0
-/*
- Function: This function is to disable the disk interrupt
- Returns : Nothing
-*/
-void
-disable_interrupt(vector)
-int vector;
-{
- int ps;
- int val;
-
- disable(ps);
- if (vector > 40) {
- val = 1 << (vector - 40);
- __outb(S8259+1, __inb(S8259+1) | val);
- }
- else {
- val = 1 << (vector - 32);
- __outb(M8259+1, __inb(M8259+1) | val);
- }
- restore(ps);
-}
-
-/*
- Function: This function is to enable the disk interrupt
- Returns : Nothing
-*/
-void
-enable_interrupt(vector)
-int vector;
-{
- int ps;
- int val;
-
- disable(ps);
- if (vector > 40) {
- val = 1 << (vector - 40);
- val = ~val;
- __outb(S8259+1, __inb(S8259+1) & val);
- }
- else {
- val = 1 << (vector - 32);
- val = ~val;
- __outb(M8259+1, __inb(M8259+1) & val);
- }
- restore(ps);
-}
-#endif
func_enter();
-#ifdef CHECK
- CheckHost(Host);
- CheckHostP(HostP);
- CheckPacketP(PacketP);
-#endif
-
/*
** 16 port RTA note:
** Command rup packets coming from the RTA will have pkt->data[1] (which
SysPort = UnixRupP->BaseSysPort + (RBYTE(PktCmdP->PhbNum) % (ushort) PORTS_PER_RTA);
rio_dprintk(RIO_DEBUG_CMD, "Command on rup %d, port %d\n", rup, SysPort);
-#ifdef CHECK
- CheckRup(rup);
- CheckUnixRupP(UnixRupP);
-#endif
if (UnixRupP->BaseSysPort == NO_PORT) {
rio_dprintk(RIO_DEBUG_CMD, "OBSCURE ERROR!\n");
rio_dprintk(RIO_DEBUG_CMD, "Diagnostics follow. Please WRITE THESE DOWN and report them to Specialix Technical Support\n");
rio_dprintk(RIO_DEBUG_CMD, "COMMAND information: Host Port Number 0x%x, " "Command Code 0x%x\n", PktCmdP->PhbNum, PktCmdP->Command);
return TRUE;
}
-#ifdef CHECK
- CheckSysPort(SysPort);
-#endif
PortP = p->RIOPortp[SysPort];
rio_spin_lock_irqsave(&PortP->portSem, flags);
switch (RBYTE(PktCmdP->Command)) {
struct UnixRup *UnixRupP;
unsigned long flags;
-#ifdef CHECK
- CheckHostP(HostP);
- CheckRup(Rup);
- CheckCmdBlkP(CmdBlkP);
-#endif
if (Rup >= (ushort) (MAX_RUP + LINKS_PER_UNIT)) {
rio_dprintk(RIO_DEBUG_CMD, "Illegal rup number %d in RIOQueueCmdBlk\n", Rup);
RIOFreeCmdBlk(CmdBlkP);
** If it returns RIO_FAIL then don't
** send this command yet!
*/
-#ifdef CHECK
- CheckCmdBlkP(CmdBlkP);
-#endif
if (!(CmdBlkP->PreFuncP ? (*CmdBlkP->PreFuncP) (CmdBlkP->PreArg, CmdBlkP) : TRUE)) {
rio_dprintk(RIO_DEBUG_CMD, "Not ready to start command 0x%x\n", (int) CmdBlkP);
} else {
/*
** Whammy! blat that pack!
*/
-#ifdef CHECK
- CheckPacketP((PKT *) RIO_PTR(HostP->Caddr, UnixRupP->RupP->txpkt));
-#endif
HostP->Copy((caddr_t) & CmdBlkP->Packet, RIO_PTR(HostP->Caddr, UnixRupP->RupP->txpkt), sizeof(PKT));
/*
unsigned long flags;
rio_spin_lock_irqsave(&PortP->portSem, flags);
-#ifdef CHECK
- CheckPortP(PortP);
-#endif
PortP->WflushFlag++;
PortP->MagicFlags |= MAGIC_FLUSH;
rio_spin_unlock_irqrestore(&PortP->portSem, flags);
rio_spin_lock_irqsave(&PortP->portSem, flags);
-#ifdef CHECK
- CheckPortP(PortP);
-#endif
rio_dprintk(RIO_DEBUG_CMD, "Decrement in use count for port\n");
if (PortP->InUse) {
}
case RIO_DEBUG_MEM:
-#ifdef DEBUG_MEM_SUPPORT
- RIO_DEBUG_CTRL, if (su)
- return rio_RIODebugMemory(RIO_DEBUG_CTRL, arg);
- else
-#endif
- return -EPERM;
+ return -EPERM;
case RIO_ALL_MODEM:
rio_dprintk(RIO_DEBUG_CTRL, "RIO_ALL_MODEM\n");
case RIO_GET_LOG:
rio_dprintk(RIO_DEBUG_CTRL, "RIO_GET_LOG\n");
-#ifdef LOGGING
- RIOGetLog(arg);
- return 0;
-#else
return -EINVAL;
-#endif
case RIO_GET_MODTYPE:
if (copyin((int) arg, (caddr_t) & port, sizeof(uint)) == COPYFAIL) {
rio_dprintk(RIO_DEBUG_CTRL, "entering loop (%d %d)!\n", PortSetup.From, PortSetup.To);
for (loop = PortSetup.From; loop <= PortSetup.To; loop++) {
rio_dprintk(RIO_DEBUG_CTRL, "in loop (%d)!\n", loop);
-#if 0
- PortP = p->RIOPortp[loop];
- if (!PortP->TtyP)
- PortP->TtyP = &p->channel[loop];
-
- rio_spin_lock_irqsave(&PortP->portSem, flags);
- if (PortSetup.IxAny)
- PortP->Config |= RIO_IXANY;
- else
- PortP->Config &= ~RIO_IXANY;
- if (PortSetup.IxOn)
- PortP->Config |= RIO_IXON;
- else
- PortP->Config &= ~RIO_IXON;
-
- /*
- ** If the port needs to wait for all a processes output
- ** to drain before closing then this flag will be set.
- */
- if (PortSetup.Drain) {
- PortP->Config |= RIO_WAITDRAIN;
- } else {
- PortP->Config &= ~RIO_WAITDRAIN;
- }
- /*
- ** Store settings if locking or unlocking port or if the
- ** port is not locked, when setting the store option.
- */
- if (PortP->Mapped && ((PortSetup.Lock && !PortP->Lock) || (!PortP->Lock && (PortSetup.Store && !PortP->Store)))) {
- PortP->StoredTty.iflag = PortP->TtyP->tm.c_iflag;
- PortP->StoredTty.oflag = PortP->TtyP->tm.c_oflag;
- PortP->StoredTty.cflag = PortP->TtyP->tm.c_cflag;
- PortP->StoredTty.lflag = PortP->TtyP->tm.c_lflag;
- PortP->StoredTty.line = PortP->TtyP->tm.c_line;
- bcopy(PortP->TtyP->tm.c_cc, PortP->StoredTty.cc, NCC + 5);
- }
- PortP->Lock = PortSetup.Lock;
- PortP->Store = PortSetup.Store;
- PortP->Xprint.XpCps = PortSetup.XpCps;
- bcopy(PortSetup.XpOn, PortP->Xprint.XpOn, MAX_XP_CTRL_LEN);
- bcopy(PortSetup.XpOff, PortP->Xprint.XpOff, MAX_XP_CTRL_LEN);
- PortP->Xprint.XpOn[MAX_XP_CTRL_LEN - 1] = '\0';
- PortP->Xprint.XpOff[MAX_XP_CTRL_LEN - 1] = '\0';
- PortP->Xprint.XpLen = RIOStrlen(PortP->Xprint.XpOn) + RIOStrlen(PortP->Xprint.XpOff);
- rio_spin_unlock_irqrestore(&PortP->portSem, flags);
-#endif
}
rio_dprintk(RIO_DEBUG_CTRL, "after loop (%d)!\n", loop);
rio_dprintk(RIO_DEBUG_CTRL, "Retval:%x\n", retval);
rio_dprintk(RIO_DEBUG_CTRL, "Port %d\n", PortTty.port);
PortP = (p->RIOPortp[PortTty.port]);
-#if 0
- PortTty.Tty.tm.c_iflag = PortP->TtyP->tm.c_iflag;
- PortTty.Tty.tm.c_oflag = PortP->TtyP->tm.c_oflag;
- PortTty.Tty.tm.c_cflag = PortP->TtyP->tm.c_cflag;
- PortTty.Tty.tm.c_lflag = PortP->TtyP->tm.c_lflag;
-#endif
if (copyout((caddr_t) & PortTty, (int) arg, sizeof(struct PortTty)) == COPYFAIL) {
p->RIOError.Error = COPYOUT_FAILED;
return -EFAULT;
return -ENXIO;
}
PortP = (p->RIOPortp[PortTty.port]);
-#if 0
- rio_spin_lock_irqsave(&PortP->portSem, flags);
- PortP->TtyP->tm.c_iflag = PortTty.Tty.tm.c_iflag;
- PortP->TtyP->tm.c_oflag = PortTty.Tty.tm.c_oflag;
- PortP->TtyP->tm.c_cflag = PortTty.Tty.tm.c_cflag;
- PortP->TtyP->tm.c_lflag = PortTty.Tty.tm.c_lflag;
- rio_spin_unlock_irqrestore(&PortP->portSem, flags);
-#endif
-
RIOParam(PortP, CONFIG, PortP->State & RIO_MODEM, OK_TO_SLEEP);
return retval;
rio_spin_unlock_irqrestore(&PortP->portSem, flags);
return retval;
-#ifdef DEBUG_SUPPORTED
- case RIO_READ_LEVELS:
- {
- int num;
- rio_dprintk(RIO_DEBUG_CTRL, "RIO_READ_LEVELS\n");
- for (num = 0; RIODbInf[num].Flag; num++);
- rio_dprintk(RIO_DEBUG_CTRL, "%d levels to copy\n", num);
- if (copyout((caddr_t) RIODbInf, (int) arg, sizeof(struct DbInf) * (num + 1)) == COPYFAIL) {
- rio_dprintk(RIO_DEBUG_CTRL, "ReadLevels Copy failed\n");
- p->RIOError.Error = COPYOUT_FAILED;
- return -EFAULT;
- }
- rio_dprintk(RIO_DEBUG_CTRL, "%d levels to copied\n", num);
- return retval;
- }
-#endif
-
case RIO_READ_CONFIG:
rio_dprintk(RIO_DEBUG_CTRL, "RIO_READ_CONFIG\n");
if (copyout((caddr_t) & p->RIOConf, (int) arg, sizeof(struct Conf)) == COPYFAIL) {
(void) RIOBoardTest(p->RIOHosts[Host].PaddrP, p->RIOHosts[Host].Caddr, p->RIOHosts[Host].Type, p->RIOHosts[Host].Slot);
bzero((caddr_t) & p->RIOHosts[Host].Flags, ((int) &p->RIOHosts[Host].____end_marker____) - ((int) &p->RIOHosts[Host].Flags));
p->RIOHosts[Host].Flags = RC_WAITING;
-#if 0
- RIOSetupDataStructs(p);
-#endif
}
RIOFoadWakeup(p);
p->RIONumBootPkts = 0;
p->RIOBooting = 0;
-
-#ifdef RINGBUFFER_SUPPORT
- for (loop = 0; loop < RIO_PORTS; loop++)
- if (p->RIOPortp[loop]->TxRingBuffer)
- sysfree((void *) p->RIOPortp[loop]->TxRingBuffer, RIOBufferSize);
-#endif
-#if 0
- bzero((caddr_t) & p->RIOPortp[0], RIO_PORTS * sizeof(struct Port));
-#else
printk("HEEEEELP!\n");
-#endif
for (loop = 0; loop < RIO_PORTS; loop++) {
-#if 0
- p->RIOPortp[loop]->TtyP = &p->channel[loop];
-#endif
-
spin_lock_init(&p->RIOPortp[loop]->portSem);
p->RIOPortp[loop]->InUse = NOT_INUSE;
}
ushort rup;
int port;
-#ifdef CHECK
- CheckPortP(PortP);
-#endif
-
if (PortP->State & RIO_DELETED) {
rio_dprintk(RIO_DEBUG_CTRL, "Preemptive command to deleted RTA ignored\n");
return RIO_FAIL;
int RIOPCIinit(struct rio_info *p, int Mode);
-#if 0
-static void RIOAllocateInterrupts(struct rio_info *);
-static int RIOReport(struct rio_info *);
-static void RIOStopInterrupts(struct rio_info *, int, int);
-#endif
-
static int RIOScrub(int, BYTE *, int);
-#if 0
-extern int rio_intr();
-
-/*
-** Init time code.
-*/
-void
-rioinit( p, info )
-struct rio_info * p;
-struct RioHostInfo * info;
-{
- /*
- ** Multi-Host card support - taking the easy way out - sorry !
- ** We allocate and set up the Host and Port structs when the
- ** driver is called to 'install' the first host.
- ** We check for this first 'call' by testing the RIOPortp pointer.
- */
- if ( !p->RIOPortp )
- {
- rio_dprintk (RIO_DEBUG_INIT, "Allocating and setting up driver data structures\n");
-
- RIOAllocDataStructs(p); /* allocate host/port structs */
- RIOSetupDataStructs(p); /* setup topology structs */
- }
-
- RIOInitHosts( p, info ); /* hunt down the hardware */
-
- RIOAllocateInterrupts(p); /* allocate interrupts */
- RIOReport(p); /* show what we found */
-}
-
-/*
-** Initialise the Cards
-*/
-void
-RIOInitHosts(p, info)
-struct rio_info * p;
-struct RioHostInfo * info;
-{
-/*
-** 15.10.1998 ARG - ESIL 0762 part fix
-** If there is no ISA card definition - we always look for PCI cards.
-** As we currently only support one host card this lets an ISA card
-** definition take precedence over PLUG and PLAY.
-** No ISA card - we are PLUG and PLAY with PCI.
-*/
-
- /*
- ** Note - for PCI both these will be zero, that's okay because
- ** RIOPCIInit() fills them in if a card is found.
- */
- p->RIOHosts[p->RIONumHosts].Ivec = info->vector;
- p->RIOHosts[p->RIONumHosts].PaddrP = info->location;
-
- /*
- ** Check that we are able to accommodate another host
- */
- if ( p->RIONumHosts >= RIO_HOSTS )
- {
- p->RIOFailed++;
- return;
- }
-
- if ( info->bus & ISA_BUS )
- {
- rio_dprintk (RIO_DEBUG_INIT, "initialising card %d (ISA)\n", p->RIONumHosts);
- RIOISAinit(p, p->mode);
- }
- else
- {
- rio_dprintk (RIO_DEBUG_INIT, "initialising card %d (PCI)\n", p->RIONumHosts);
- RIOPCIinit(p, RIO_PCI_DEFAULT_MODE);
- }
-
- rio_dprintk (RIO_DEBUG_INIT, "Total hosts initialised so far : %d\n", p->RIONumHosts);
-
-
-#ifdef FUTURE_RELEASE
- if (p->bus & EISA_BUS)
- /* EISA card */
- RIOEISAinit(p, RIO_EISA_DEFAULT_MODE);
-
- if (p->bus & MCA_BUS)
- /* MCA card */
- RIOMCAinit(p, RIO_MCA_DEFAULT_MODE);
-#endif
-}
-
-/*
-** go through memory for an AT host that we pass in the device info
-** structure and initialise
-*/
-void
-RIOISAinit(p, mode)
-struct rio_info * p;
-int mode;
-{
-
- /* XXX Need to implement this. */
-#if 0
- p->intr_tid = iointset(p->RIOHosts[p->RIONumHosts].Ivec,
- (int (*)())rio_intr, (char*)p->RIONumHosts);
-
- rio_dprintk (RIO_DEBUG_INIT, "Set interrupt handler, intr_tid = 0x%x\n", p->intr_tid );
-
- if (RIODoAT(p, p->RIOHosts[p->RIONumHosts].PaddrP, mode)) {
- return;
- }
- else {
- rio_dprintk (RIO_DEBUG_INIT, "RIODoAT failed\n");
- p->RIOFailed++;
- }
-#endif
-
-}
-
-/*
-** RIODoAT :
-**
-** Map in a boards physical address, check that the board is there,
-** test the board and if everything is okay assign the board an entry
-** in the Rio Hosts structure.
-*/
-int
-RIODoAT(p, Base, mode)
-struct rio_info * p;
-int Base;
-int mode;
-{
-#define FOUND 1
-#define NOT_FOUND 0
-
- caddr_t cardAddr;
-
- /*
- ** Check to see if we actually have a board at this physical address.
- */
- if ((cardAddr = RIOCheckForATCard(Base)) != 0) {
- /*
- ** Now test the board to see if it is working.
- */
- if (RIOBoardTest(Base, cardAddr, RIO_AT, 0) == RIO_SUCCESS) {
- /*
- ** Fill out a slot in the Rio host structure.
- */
- if (RIOAssignAT(p, Base, cardAddr, mode)) {
- return(FOUND);
- }
- }
- RIOMapout(Base, RIO_AT_MEM_SIZE, cardAddr);
- }
- return(NOT_FOUND);
-}
-
-caddr_t
-RIOCheckForATCard(Base)
-int Base;
-{
- int off;
- struct DpRam *cardp; /* (Points at the host) */
- caddr_t virtAddr;
- unsigned char RIOSigTab[24];
-/*
-** Table of values to search for as prom signature of a host card
-*/
- strcpy(RIOSigTab, "JBJGPGGHINSMJPJR");
-
- /*
- ** Hey! Yes, You reading this code! Yo, grab a load a this:
- **
- ** IF the card is using WORD MODE rather than BYTE MODE
- ** then it will occupy 128K of PHYSICAL memory area. So,
- ** you might think that the following Mapin is wrong. Well,
- ** it isn't, because the SECOND 64K of occupied space is an
- ** EXACT COPY of the FIRST 64K. (good?), so, we need only
- ** map it in in one 64K block.
- */
- if (RIOMapin(Base, RIO_AT_MEM_SIZE, &virtAddr) == -1) {
- rio_dprintk (RIO_DEBUG_INIT, "RIO-init: Couldn't map the board in!\n");
- return((caddr_t)0);
- }
-
- /*
- ** virtAddr points to the DP ram of the system.
- ** We now cast this to a pointer to a RIO Host,
- ** and have a rummage about in the PROM.
- */
- cardp = (struct DpRam *)virtAddr;
-
- for (off=0; RIOSigTab[off]; off++) {
- if ((RBYTE(cardp->DpSignature[off]) & 0xFF) != RIOSigTab[off]) {
- /*
- ** Signature mismatch - card not at this address
- */
- RIOMapout(Base, RIO_AT_MEM_SIZE, virtAddr);
- rio_dprintk (RIO_DEBUG_INIT, "RIO-init: Couldn't match the signature 0x%x 0x%x!\n",
- (int)cardp, off);
- return((caddr_t)0);
- }
- }
-
- /*
- ** If we get here then we must have found a valid board so return
- ** its virtual address.
- */
- return(virtAddr);
-}
-#endif
/**
** RIOAssignAT :
rio_dprintk (RIO_DEBUG_INIT, "RIO-init: Tests Passed at 0x%x\n", Base);
return(1);
}
-#if 0
-#ifdef FUTURE_RELEASE
-int RIOMCAinit(int Mode)
-{
- uchar SlotNumber;
- caddr_t Caddr;
- uint Paddr;
- uint Ivec;
- int Handle;
- int ret = 0;
-
- /*
- ** Valid mode information for MCA cards
- ** is only FAST LINKS
- */
- Mode = (Mode & FAST_LINKS) ? McaTpFastLinks : McaTpSlowLinks;
- rio_dprintk (RIO_DEBUG_INIT, "RIOMCAinit(%d)\n",Mode);
-
-
- /*
- ** Check out each of the slots
- */
- for (SlotNumber = 0; SlotNumber < McaMaxSlots; SlotNumber++) {
- /*
- ** Enable the slot we want to talk to
- */
- outb( McaSlotSelect, SlotNumber | McaSlotEnable );
-
- /*
- ** Read the ID word from the slot
- */
- if (((inb(McaIdHigh)<< 8)|inb(McaIdLow)) == McaRIOId)
- {
- rio_dprintk (RIO_DEBUG_INIT, "Potential MCA card in slot %d\n", SlotNumber);
-
- /*
- ** Card appears to be a RIO MCA card!
- */
- RIOMachineType |= (1<<RIO_MCA);
-
- /*
- ** Just check we haven't found too many wonderful objects
- */
- if ( RIONumHosts >= RIO_HOSTS )
- {
- Rprintf(RIOMesgTooManyCards);
- return(ret);
- }
-
- /*
- ** McaIrqEnable contains the interrupt vector, and a card
- ** enable bit.
- */
- Ivec = inb(McaIrqEnable);
-
- rio_dprintk (RIO_DEBUG_INIT, "Ivec is %x\n", Ivec);
-
- switch ( Ivec & McaIrqMask )
- {
- case McaIrq9:
- rio_dprintk (RIO_DEBUG_INIT, "IRQ9\n");
- break;
- case McaIrq3:
- rio_dprintk (RIO_DEBUG_INIT, "IRQ3\n");
- break;
- case McaIrq4:
- rio_dprintk (RIO_DEBUG_INIT, "IRQ4\n");
- break;
- case McaIrq7:
- rio_dprintk (RIO_DEBUG_INIT, "IRQ7\n");
- break;
- case McaIrq10:
- rio_dprintk (RIO_DEBUG_INIT, "IRQ10\n");
- break;
- case McaIrq11:
- rio_dprintk (RIO_DEBUG_INIT, "IRQ11\n");
- break;
- case McaIrq12:
- rio_dprintk (RIO_DEBUG_INIT, "IRQ12\n");
- break;
- case McaIrq15:
- rio_dprintk (RIO_DEBUG_INIT, "IRQ15\n");
- break;
- }
-
- /*
- ** If the card enable bit isn't set, then set it!
- */
- if ((Ivec & McaCardEnable) != McaCardEnable) {
- rio_dprintk (RIO_DEBUG_INIT, "McaCardEnable not set - setting!\n");
- outb(McaIrqEnable,Ivec|McaCardEnable);
- } else
- rio_dprintk (RIO_DEBUG_INIT, "McaCardEnable already set\n");
-
- /*
- ** Convert the IRQ enable mask into something useful
- */
- Ivec = RIOMcaToIvec[Ivec & McaIrqMask];
-
- /*
- ** Find the physical address
- */
- rio_dprintk (RIO_DEBUG_INIT, "inb(McaMemory) is %x\n", inb(McaMemory));
- Paddr = McaAddress(inb(McaMemory));
-
- rio_dprintk (RIO_DEBUG_INIT, "MCA card has Ivec %d Addr %x\n", Ivec, Paddr);
-
- if ( Paddr != 0 )
- {
-
- /*
- ** Tell the memory mapper that we want to talk to it
- */
- Handle = RIOMapin( Paddr, RIO_MCA_MEM_SIZE, &Caddr );
-
- if ( Handle == -1 ) {
- rio_dprintk (RIO_DEBUG_INIT, "Couldn't map %d bytes at %x\n", RIO_MCA_MEM_SIZE, Paddr;
- continue;
- }
-
- rio_dprintk (RIO_DEBUG_INIT, "Board mapped to vaddr 0x%x\n", Caddr);
-
- /*
- ** And check that it is actually there!
- */
- if ( RIOBoardTest( Paddr,Caddr,RIO_MCA,SlotNumber ) == RIO_SUCCESS )
- {
- rio_dprintk (RIO_DEBUG_INIT, "Board has passed test\n");
- rio_dprintk (RIO_DEBUG_INIT, "Slot %d. Type %d. Paddr 0x%x. Caddr 0x%x. Mode 0x%x.\n",
- SlotNumber, RIO_MCA, Paddr, Caddr, Mode);
-
- /*
- ** Board has passed its scrub test. Fill in all the
- ** transient stuff.
- */
- p->RIOHosts[RIONumHosts].Slot = SlotNumber;
- p->RIOHosts[RIONumHosts].Ivec = Ivec;
- p->RIOHosts[RIONumHosts].Type = RIO_MCA;
- p->RIOHosts[RIONumHosts].Copy = bcopy;
- p->RIOHosts[RIONumHosts].PaddrP = Paddr;
- p->RIOHosts[RIONumHosts].Caddr = Caddr;
- p->RIOHosts[RIONumHosts].CardP = (struct DpRam *)Caddr;
- p->RIOHosts[RIONumHosts].Mode = Mode;
- WBYTE(p->RIOHosts[p->RIONumHosts].ResetInt , 0xff);
- p->RIOHosts[RIONumHosts].UniqueNum =
- ((RBYTE(p->RIOHosts[RIONumHosts].Unique[0])&0xFF)<<0)|
- ((RBYTE(p->RIOHosts[RIONumHosts].Unique[1])&0xFF)<<8)|
- ((RBYTE(p->RIOHosts[RIONumHosts].Unique[2])&0xFF)<<16)|
- ((RBYTE(p->RIOHosts[RIONumHosts].Unique[3])&0xFF)<<24);
- RIONumHosts++;
- ret++;
- }
- else
- {
- /*
- ** It failed the test, so ignore it.
- */
- rio_dprintk (RIO_DEBUG_INIT, "TEST FAILED\n");
- RIOMapout(Paddr, RIO_MCA_MEM_SIZE, Caddr );
- }
- }
- else
- {
- rio_dprintk (RIO_DEBUG_INIT, "Slot %d - Paddr zero!\n", SlotNumber);
- }
- }
- else
- {
- rio_dprintk (RIO_DEBUG_INIT, "Slot %d NOT RIO\n", SlotNumber);
- }
- }
- /*
- ** Now we have checked all the slots, turn off the MCA slot selector
- */
- outb(McaSlotSelect,0);
- rio_dprintk (RIO_DEBUG_INIT, "Slot %d NOT RIO\n", SlotNumber);
- return ret;
-}
-
-int RIOEISAinit( int Mode )
-{
- static int EISADone = 0;
- uint Paddr;
- int PollIntMixMsgDone = 0;
- caddr_t Caddr;
- ushort Ident;
- uchar EisaSlot;
- uchar Ivec;
- int ret = 0;
-
- /*
- ** The only valid mode information for EISA hosts is fast or slow
- ** links.
- */
- Mode = (Mode & FAST_LINKS) ? EISA_TP_FAST_LINKS : EISA_TP_SLOW_LINKS;
-
- if ( EISADone )
- {
- rio_dprintk (RIO_DEBUG_INIT, "RIOEISAinit() - already done, return.\n");
- return(0);
- }
-
- EISADone++;
-
- rio_dprintk (RIO_DEBUG_INIT, "RIOEISAinit()\n");
-
-
- /*
- ** First check all cards to see if ANY are set for polled mode operation.
- ** If so, set ALL to polled.
- */
-
- for ( EisaSlot=1; EisaSlot<=RIO_MAX_EISA_SLOTS; EisaSlot++ )
- {
- Ident = (INBZ(EisaSlot,EISA_PRODUCT_IDENT_HI)<<8) |
- INBZ(EisaSlot,EISA_PRODUCT_IDENT_LO);
-
- if ( Ident == RIO_EISA_IDENT )
- {
- rio_dprintk (RIO_DEBUG_INIT, "Found Specialix product\n");
-
- if ( INBZ(EisaSlot,EISA_PRODUCT_NUMBER) != RIO_EISA_PRODUCT_CODE )
- {
- rio_dprintk (RIO_DEBUG_INIT, "Not Specialix RIO - Product number %x\n",
- INBZ(EisaSlot, EISA_PRODUCT_NUMBER));
- continue; /* next slot */
- }
- /*
- ** Its a Specialix RIO!
- */
- rio_dprintk (RIO_DEBUG_INIT, "RIO Revision %d\n",
- INBZ(EisaSlot, EISA_REVISION_NUMBER));
-
- RIOMachineType |= (1<<RIO_EISA);
-
- /*
- ** Just check we haven't found too many wonderful objects
- */
- if ( RIONumHosts >= RIO_HOSTS )
- {
- Rprintf(RIOMesgTooManyCards);
- return 0;
- }
-
- /*
- ** Ensure that the enable bit is set!
- */
- OUTBZ( EisaSlot, EISA_ENABLE, RIO_EISA_ENABLE_BIT );
-
- /*
- ** EISA_INTERRUPT_VEC contains the interrupt vector.
- */
- Ivec = INBZ(EisaSlot,EISA_INTERRUPT_VEC);
-
-#ifdef RIODEBUG
- switch ( Ivec & EISA_INTERRUPT_MASK )
- {
- case EISA_IRQ_3:
- rio_dprintk (RIO_DEBUG_INIT, "EISA IRQ 3\n");
- break;
- case EISA_IRQ_4:
- rio_dprintk (RIO_DEBUG_INIT, "EISA IRQ 4\n");
- break;
- case EISA_IRQ_5:
- rio_dprintk (RIO_DEBUG_INIT, "EISA IRQ 5\n");
- break;
- case EISA_IRQ_6:
- rio_dprintk (RIO_DEBUG_INIT, "EISA IRQ 6\n");
- break;
- case EISA_IRQ_7:
- rio_dprintk (RIO_DEBUG_INIT, "EISA IRQ 7\n");
- break;
- case EISA_IRQ_9:
- rio_dprintk (RIO_DEBUG_INIT, "EISA IRQ 9\n");
- break;
- case EISA_IRQ_10:
- rio_dprintk (RIO_DEBUG_INIT, "EISA IRQ 10\n");
- break;
- case EISA_IRQ_11:
- rio_dprintk (RIO_DEBUG_INIT, "EISA IRQ 11\n");
- break;
- case EISA_IRQ_12:
- rio_dprintk (RIO_DEBUG_INIT, "EISA IRQ 12\n");
- break;
- case EISA_IRQ_14:
- rio_dprintk (RIO_DEBUG_INIT, "EISA IRQ 14\n");
- break;
- case EISA_IRQ_15:
- rio_dprintk (RIO_DEBUG_INIT, "EISA IRQ 15\n");
- break;
- case EISA_POLLED:
- rio_dprintk (RIO_DEBUG_INIT, "EISA POLLED\n");
- break;
- default:
- rio_dprintk (RIO_DEBUG_INIT, NULL,DBG_INIT|DBG_FAIL,"Shagged interrupt number!\n");
- Ivec &= EISA_CONTROL_MASK;
- }
-#endif
-
- if ( (Ivec & EISA_INTERRUPT_MASK) ==
- EISA_POLLED )
- {
- RIOWillPoll = 1;
- break; /* From EisaSlot loop */
- }
- }
- }
-
- /*
- ** Do it all again now we know whether to change all cards to polled
- ** mode or not
- */
-
- for ( EisaSlot=1; EisaSlot<=RIO_MAX_EISA_SLOTS; EisaSlot++ )
- {
- Ident = (INBZ(EisaSlot,EISA_PRODUCT_IDENT_HI)<<8) |
- INBZ(EisaSlot,EISA_PRODUCT_IDENT_LO);
-
- if ( Ident == RIO_EISA_IDENT )
- {
- if ( INBZ(EisaSlot,EISA_PRODUCT_NUMBER) != RIO_EISA_PRODUCT_CODE )
- continue; /* next slot */
-
- /*
- ** Its a Specialix RIO!
- */
-
- /*
- ** Ensure that the enable bit is set!
- */
- OUTBZ( EisaSlot, EISA_ENABLE, RIO_EISA_ENABLE_BIT );
-
- /*
- ** EISA_INTERRUPT_VEC contains the interrupt vector.
- */
- Ivec = INBZ(EisaSlot,EISA_INTERRUPT_VEC);
-
- if ( RIOWillPoll )
- {
- /*
- ** If we are going to operate in polled mode, but this
- ** board is configured to be interrupt driven, display
- ** the message explaining the situation to the punter,
- ** assuming we haven't already done so.
- */
-
- if ( !PollIntMixMsgDone &&
- (Ivec & EISA_INTERRUPT_MASK) != EISA_POLLED )
- {
- Rprintf(RIOMesgAllPolled);
- PollIntMixMsgDone = 1;
- }
-
- /*
- ** Ungraciously ignore whatever the board reports as its
- ** interrupt vector...
- */
-
- Ivec &= ~EISA_INTERRUPT_MASK;
-
- /*
- ** ...and force it to dance to the poll tune.
- */
-
- Ivec |= EISA_POLLED;
- }
-
- /*
- ** Convert the IRQ enable mask into something useful (0-15)
- */
- Ivec = RIOEisaToIvec(Ivec);
-
- rio_dprintk (RIO_DEBUG_INIT, "EISA host in slot %d has Ivec 0x%x\n",
- EisaSlot, Ivec);
-
- /*
- ** Find the physical address
- */
- Paddr = (INBZ(EisaSlot,EISA_MEMORY_BASE_HI)<<24) |
- (INBZ(EisaSlot,EISA_MEMORY_BASE_LO)<<16);
-
- rio_dprintk (RIO_DEBUG_INIT, "EISA card has Ivec %d Addr %x\n", Ivec, Paddr);
-
- if ( Paddr == 0 )
- {
- rio_dprintk (RIO_DEBUG_INIT,
- "Board in slot %d configured for address zero!\n", EisaSlot);
- continue;
- }
-
- /*
- ** Tell the memory mapper that we want to talk to it
- */
- rio_dprintk (RIO_DEBUG_INIT, "About to map EISA card \n");
-
- if (RIOMapin( Paddr, RIO_EISA_MEM_SIZE, &Caddr) == -1) {
- rio_dprintk (RIO_DEBUG_INIT, "Couldn't map %d bytes at %x\n",
- RIO_EISA_MEM_SIZE,Paddr);
- continue;
- }
-
- rio_dprintk (RIO_DEBUG_INIT, "Board mapped to vaddr 0x%x\n", Caddr);
-
- /*
- ** And check that it is actually there!
- */
- if ( RIOBoardTest( Paddr,Caddr,RIO_EISA,EisaSlot) == RIO_SUCCESS )
- {
- rio_dprintk (RIO_DEBUG_INIT, "Board has passed test\n");
- rio_dprintk (RIO_DEBUG_INIT,
- "Slot %d. Ivec %d. Type %d. Paddr 0x%x. Caddr 0x%x. Mode 0x%x.\n",
- EisaSlot,Ivec,RIO_EISA,Paddr,Caddr,Mode);
-
- /*
- ** Board has passed its scrub test. Fill in all the
- ** transient stuff.
- */
- p->RIOHosts[RIONumHosts].Slot = EisaSlot;
- p->RIOHosts[RIONumHosts].Ivec = Ivec;
- p->RIOHosts[RIONumHosts].Type = RIO_EISA;
- p->RIOHosts[RIONumHosts].Copy = bcopy;
- p->RIOHosts[RIONumHosts].PaddrP = Paddr;
- p->RIOHosts[RIONumHosts].Caddr = Caddr;
- p->RIOHosts[RIONumHosts].CardP = (struct DpRam *)Caddr;
- p->RIOHosts[RIONumHosts].Mode = Mode;
- /*
- ** because the EISA prom is mapped into IO space, we
- ** need to copy the unqiue number into the memory area
- ** that it would have occupied, so that the download
- ** code can determine its ID and card type.
- */
- WBYTE(p->RIOHosts[RIONumHosts].Unique[0],INBZ(EisaSlot,EISA_UNIQUE_NUM_0));
- WBYTE(p->RIOHosts[RIONumHosts].Unique[1],INBZ(EisaSlot,EISA_UNIQUE_NUM_1));
- WBYTE(p->RIOHosts[RIONumHosts].Unique[2],INBZ(EisaSlot,EISA_UNIQUE_NUM_2));
- WBYTE(p->RIOHosts[RIONumHosts].Unique[3],INBZ(EisaSlot,EISA_UNIQUE_NUM_3));
- p->RIOHosts[RIONumHosts].UniqueNum =
- ((RBYTE(p->RIOHosts[RIONumHosts].Unique[0])&0xFF)<<0)|
- ((RBYTE(p->RIOHosts[RIONumHosts].Unique[1])&0xFF)<<8)|
- ((RBYTE(p->RIOHosts[RIONumHosts].Unique[2])&0xFF)<<16)|
- ((RBYTE(p->RIOHosts[RIONumHosts].Unique[3])&0xFF)<<24);
- INBZ(EisaSlot,EISA_INTERRUPT_RESET);
- RIONumHosts++;
- ret++;
- }
- else
- {
- /*
- ** It failed the test, so ignore it.
- */
- rio_dprintk (RIO_DEBUG_INIT, "TEST FAILED\n");
-
- RIOMapout(Paddr, RIO_EISA_MEM_SIZE, Caddr );
- }
- }
- }
- if (RIOMachineType & RIO_EISA)
- return ret+1;
- return ret;
-}
-#endif
-
-
-#ifndef linux
-
-#define CONFIG_ADDRESS 0xcf8
-#define CONFIG_DATA 0xcfc
-#define FORWARD_REG 0xcfa
-
-
-static int
-read_config(int bus_number, int device_num, int r_number)
-{
- unsigned int cav;
- unsigned int val;
-
-/*
- Build config_address_value:
-
- 31 24 23 16 15 11 10 8 7 0
- ------------------------------------------------------
- |1| 0000000 | bus_number | device # | 000 | register |
- ------------------------------------------------------
-*/
-
- cav = r_number & 0xff;
- cav |= ((device_num & 0x1f) << 11);
- cav |= ((bus_number & 0xff) << 16);
- cav |= 0x80000000; /* Enable bit */
- outpd(CONFIG_ADDRESS,cav);
- val = inpd(CONFIG_DATA);
- outpd(CONFIG_ADDRESS,0);
- return val;
-}
-
-static
-write_config(bus_number,device_num,r_number,val)
-{
- unsigned int cav;
-
-/*
- Build config_address_value:
-
- 31 24 23 16 15 11 10 8 7 0
- ------------------------------------------------------
- |1| 0000000 | bus_number | device # | 000 | register |
- ------------------------------------------------------
-*/
-
- cav = r_number & 0xff;
- cav |= ((device_num & 0x1f) << 11);
- cav |= ((bus_number & 0xff) << 16);
- cav |= 0x80000000; /* Enable bit */
- outpd(CONFIG_ADDRESS, cav);
- outpd(CONFIG_DATA, val);
- outpd(CONFIG_ADDRESS, 0);
- return val;
-}
-#else
-/* XXX Implement these... */
-static int
-read_config(int bus_number, int device_num, int r_number)
-{
- return 0;
-}
-
-static int
-write_config(int bus_number, int device_num, int r_number)
-{
- return 0;
-}
-
-#endif
-
-int
-RIOPCIinit(p, Mode)
-struct rio_info *p;
-int Mode;
-{
- #define MAX_PCI_SLOT 32
- #define RIO_PCI_JET_CARD 0x200011CB
-
- static int slot; /* count of machine's PCI slots searched so far */
- caddr_t Caddr; /* Virtual address of the current PCI host card. */
- unsigned char Ivec; /* interrupt vector for the current PCI host */
- unsigned long Paddr; /* Physical address for the current PCI host */
- int Handle; /* Handle to Virtual memory allocated for current PCI host */
-
-
- rio_dprintk (RIO_DEBUG_INIT, "Search for a RIO PCI card - start at slot %d\n", slot);
-
- /*
- ** Initialise the search status
- */
- p->RIOLastPCISearch = RIO_FAIL;
-
- while ( (slot < MAX_PCI_SLOT) & (p->RIOLastPCISearch != RIO_SUCCESS) )
- {
- rio_dprintk (RIO_DEBUG_INIT, "Currently testing slot %d\n", slot);
-
- if (read_config(0,slot,0) == RIO_PCI_JET_CARD) {
- p->RIOHosts[p->RIONumHosts].Ivec = 0;
- Paddr = read_config(0,slot,0x18);
- Paddr = Paddr - (Paddr & 0x1); /* Mask off the io bit */
-
- if ( (Paddr == 0) || ((Paddr & 0xffff0000) == 0xffff0000) ) {
- rio_dprintk (RIO_DEBUG_INIT, "Goofed up slot\n"); /* what! */
- slot++;
- continue;
- }
-
- p->RIOHosts[p->RIONumHosts].PaddrP = Paddr;
- Ivec = (read_config(0,slot,0x3c) & 0xff);
-
- rio_dprintk (RIO_DEBUG_INIT, "PCI Host at 0x%x, Intr %d\n", (int)Paddr, Ivec);
-
- Handle = RIOMapin( Paddr, RIO_PCI_MEM_SIZE, &Caddr );
- if (Handle == -1) {
- rio_dprintk (RIO_DEBUG_INIT, "Couldn't map %d bytes at 0x%x\n", RIO_PCI_MEM_SIZE, (int)Paddr);
- slot++;
- continue;
- }
- p->RIOHosts[p->RIONumHosts].Ivec = Ivec + 32;
- p->intr_tid = iointset(p->RIOHosts[p->RIONumHosts].Ivec,
- (int (*)())rio_intr, (char *)p->RIONumHosts);
- if (RIOBoardTest( Paddr, Caddr, RIO_PCI, 0 ) == RIO_SUCCESS) {
- rio_dprintk (RIO_DEBUG_INIT, ("Board has passed test\n");
- rio_dprintk (RIO_DEBUG_INIT, ("Paddr 0x%x. Caddr 0x%x. Mode 0x%x.\n", Paddr, Caddr, Mode);
-
- /*
- ** Board has passed its scrub test. Fill in all the
- ** transient stuff.
- */
- p->RIOHosts[p->RIONumHosts].Slot = 0;
- p->RIOHosts[p->RIONumHosts].Ivec = Ivec + 32;
- p->RIOHosts[p->RIONumHosts].Type = RIO_PCI;
- p->RIOHosts[p->RIONumHosts].Copy = rio_pcicopy;
- p->RIOHosts[p->RIONumHosts].PaddrP = Paddr;
- p->RIOHosts[p->RIONumHosts].Caddr = Caddr;
- p->RIOHosts[p->RIONumHosts].CardP = (struct DpRam *)Caddr;
- p->RIOHosts[p->RIONumHosts].Mode = Mode;
-
-#if 0
- WBYTE(p->RIOHosts[p->RIONumHosts].Control,
- BOOT_FROM_RAM | EXTERNAL_BUS_OFF |
- p->RIOHosts[p->RIONumHosts].Mode |
- INTERRUPT_DISABLE );
- WBYTE(p->RIOHosts[p->RIONumHosts].ResetInt,0xff);
- WBYTE(p->RIOHosts[p->RIONumHosts].Control,
- BOOT_FROM_RAM | EXTERNAL_BUS_OFF |
- p->RIOHosts[p->RIONumHosts].Mode |
- INTERRUPT_DISABLE );
- WBYTE(p->RIOHosts[p->RIONumHosts].ResetInt,0xff);
-#else
- WBYTE(p->RIOHosts[p->RIONumHosts].ResetInt, 0xff);
-#endif
- p->RIOHosts[p->RIONumHosts].UniqueNum =
- ((RBYTE(p->RIOHosts[p->RIONumHosts].Unique[0])&0xFF)<<0)|
- ((RBYTE(p->RIOHosts[p->RIONumHosts].Unique[1])&0xFF)<<8)|
- ((RBYTE(p->RIOHosts[p->RIONumHosts].Unique[2])&0xFF)<<16)|
- ((RBYTE(p->RIOHosts[p->RIONumHosts].Unique[3])&0xFF)<<24);
-
- rio_dprintk (RIO_DEBUG_INIT, "Unique no 0x%x.\n",
- p->RIOHosts[p->RIONumHosts].UniqueNum);
-
- p->RIOLastPCISearch = RIO_SUCCESS;
- p->RIONumHosts++;
- }
- }
- slot++;
- }
-
- if ( slot >= MAX_PCI_SLOT ) {
- rio_dprintk (RIO_DEBUG_INIT, "All %d PCI slots have tested for RIO cards !!!\n",
- MAX_PCI_SLOT);
- }
-
-
- /*
- ** I don't think we want to do this anymore
- **
-
- if (!p->RIOLastPCISearch == RIO_FAIL ) {
- p->RIOFailed++;
- }
-
- **
- */
-}
-
-#ifdef FUTURE_RELEASE
-void riohalt( void )
-{
- int host;
- for ( host=0; host<p->RIONumHosts; host++ )
- {
- rio_dprintk (RIO_DEBUG_INIT, "Stop host %d\n", host);
- (void)RIOBoardTest( p->RIOHosts[host].PaddrP, p->RIOHosts[host].Caddr, p->RIOHosts[host].Type,p->RIOHosts[host].Slot );
- }
-}
-#endif
-#endif
static uchar val[] = {
#ifdef VERY_LONG_TEST
return RIO_SUCCESS;
}
-/*
-** try to ensure that every host is either in polled mode
-** or is in interrupt mode. Only allow interrupt mode if
-** all hosts can interrupt (why?)
-** and force into polled mode if told to. Patch up the
-** interrupt vector & salute The Queen when you've done.
-*/
-#if 0
-static void
-RIOAllocateInterrupts(p)
-struct rio_info * p;
-{
- int Host;
-
- /*
- ** Easy case - if we have been told to poll, then we poll.
- */
- if (p->mode & POLLED_MODE) {
- RIOStopInterrupts(p, 0, 0);
- return;
- }
-
- /*
- ** check - if any host has been set to polled mode, then all must be.
- */
- for (Host=0; Host<p->RIONumHosts; Host++) {
- if ( (p->RIOHosts[Host].Type != RIO_AT) &&
- (p->RIOHosts[Host].Ivec == POLLED) ) {
- RIOStopInterrupts(p, 1, Host );
- return;
- }
- }
- for (Host=0; Host<p->RIONumHosts; Host++) {
- if (p->RIOHosts[Host].Type == RIO_AT) {
- if ( (p->RIOHosts[Host].Ivec - 32) == 0) {
- RIOStopInterrupts(p, 2, Host );
- return;
- }
- }
- }
-}
-
-/*
-** something has decided that we can't be doing with these
-** new-fangled interrupt thingies. Set everything up to just
-** poll.
-*/
-static void
-RIOStopInterrupts(p, Reason, Host)
-struct rio_info * p;
-int Reason;
-int Host;
-{
-#ifdef FUTURE_RELEASE
- switch (Reason) {
- case 0: /* forced into polling by rio_polled */
- break;
- case 1: /* SCU has set 'Host' into polled mode */
- break;
- case 2: /* there aren't enough interrupt vectors for 'Host' */
- break;
- }
-#endif
-
- for (Host=0; Host<p->RIONumHosts; Host++ ) {
- struct Host *HostP = &p->RIOHosts[Host];
-
- switch (HostP->Type) {
- case RIO_AT:
- /*
- ** The AT host has it's interrupts disabled by clearing the
- ** int_enable bit.
- */
- HostP->Mode &= ~INTERRUPT_ENABLE;
- HostP->Ivec = POLLED;
- break;
-#ifdef FUTURE_RELEASE
- case RIO_EISA:
- /*
- ** The EISA host has it's interrupts disabled by setting the
- ** Ivec to zero
- */
- HostP->Ivec = POLLED;
- break;
-#endif
- case RIO_PCI:
- /*
- ** The PCI host has it's interrupts disabled by clearing the
- ** int_enable bit, like a regular host card.
- */
- HostP->Mode &= ~RIO_PCI_INT_ENABLE;
- HostP->Ivec = POLLED;
- break;
-#ifdef FUTURE_RELEASE
- case RIO_MCA:
- /*
- ** There's always one, isn't there?
- ** The MCA host card cannot have it's interrupts disabled.
- */
- RIOPatchVec(HostP);
- break;
-#endif
- }
- }
-}
-
-/*
-** This function is called at init time to setup the data structures.
-*/
-void
-RIOAllocDataStructs(p)
-struct rio_info * p;
-{
- int port,
- host,
- tm;
-
- p->RIOPortp = (struct Port *)sysbrk(RIO_PORTS * sizeof(struct Port));
- if (!p->RIOPortp) {
- rio_dprintk (RIO_DEBUG_INIT, "RIO-init: No memory for port structures\n");
- p->RIOFailed++;
- return;
- }
- bzero( p->RIOPortp, sizeof(struct Port) * RIO_PORTS );
- rio_dprintk (RIO_DEBUG_INIT, "RIO-init: allocated and cleared memory for port structs\n");
- rio_dprintk (RIO_DEBUG_INIT, "First RIO port struct @0x%x, size=0x%x bytes\n",
- (int)p->RIOPortp, sizeof(struct Port));
-
- for( port=0; port<RIO_PORTS; port++ ) {
- p->RIOPortp[port].PortNum = port;
- p->RIOPortp[port].TtyP = &p->channel[port];
- sreset (p->RIOPortp[port].InUse); /* Let the first guy uses it */
- p->RIOPortp[port].portSem = -1; /* Let the first guy takes it */
- p->RIOPortp[port].ParamSem = -1; /* Let the first guy takes it */
- p->RIOPortp[port].timeout_id = 0; /* Let the first guy takes it */
- }
-
- p->RIOHosts = (struct Host *)sysbrk(RIO_HOSTS * sizeof(struct Host));
- if (!p->RIOHosts) {
- rio_dprintk (RIO_DEBUG_INIT, "RIO-init: No memory for host structures\n");
- p->RIOFailed++;
- return;
- }
- bzero(p->RIOHosts, sizeof(struct Host)*RIO_HOSTS);
- rio_dprintk (RIO_DEBUG_INIT, "RIO-init: allocated and cleared memory for host structs\n");
- rio_dprintk (RIO_DEBUG_INIT, "First RIO host struct @0x%x, size=0x%x bytes\n",
- (int)p->RIOHosts, sizeof(struct Host));
-
- for( host=0; host<RIO_HOSTS; host++ ) {
- spin_lock_init (&p->RIOHosts[host].HostLock);
- p->RIOHosts[host].timeout_id = 0; /* Let the first guy takes it */
- }
- /*
- ** check that the buffer size is valid, round down to the next power of
- ** two if necessary; if the result is zero, then, hey, no double buffers.
- */
- for ( tm = 1; tm && tm <= p->RIOConf.BufferSize; tm <<= 1 )
- ;
- tm >>= 1;
- p->RIOBufferSize = tm;
- p->RIOBufferMask = tm ? tm - 1 : 0;
-}
-
-/*
-** this function gets called whenever the data structures need to be
-** re-setup, for example, after a riohalt (why did I ever invent it?)
-*/
-void
-RIOSetupDataStructs(p)
-struct rio_info * p;
-{
- int host, entry, rup;
-
- for ( host=0; host<RIO_HOSTS; host++ ) {
- struct Host *HostP = &p->RIOHosts[host];
- for ( entry=0; entry<LINKS_PER_UNIT; entry++ ) {
- HostP->Topology[entry].Unit = ROUTE_DISCONNECT;
- HostP->Topology[entry].Link = NO_LINK;
- }
- bcopy("HOST X", HostP->Name, 7);
- HostP->Name[5] = '1'+host;
- for (rup=0; rup<(MAX_RUP + LINKS_PER_UNIT); rup++) {
- if (rup < MAX_RUP) {
- for (entry=0; entry<LINKS_PER_UNIT; entry++ ) {
- HostP->Mapping[rup].Topology[entry].Unit = ROUTE_DISCONNECT;
- HostP->Mapping[rup].Topology[entry].Link = NO_LINK;
- }
- RIODefaultName(p, HostP, rup);
- }
- spin_lock_init(&HostP->UnixRups[rup].RupLock);
- }
- }
-}
-#endif
int
RIODefaultName(p, HostP, UnitId)
struct Host * HostP;
uint UnitId;
{
-#ifdef CHECK
- CheckHost( Host );
- CheckUnitId( UnitId );
-#endif
bcopy("UNKNOWN RTA X-XX",HostP->Mapping[UnitId].Name,17);
HostP->Mapping[UnitId].Name[12]='1'+(HostP-p->RIOHosts);
if ((UnitId+1) > 9) {
#define RIO_RELEASE "Linux"
#define RELEASE_ID "1.0"
-#if 0
-static int
-RIOReport(p)
-struct rio_info * p;
-{
- char * RIORelease = RIO_RELEASE;
- char * RIORelID = RELEASE_ID;
- int host;
-
- rio_dprintk (RIO_DEBUG_INIT, "RIO : Release: %s ID: %s\n", RIORelease, RIORelID);
-
- if ( p->RIONumHosts==0 ) {
- rio_dprintk (RIO_DEBUG_INIT, "\nNo Hosts configured\n");
- return(0);
- }
-
- for ( host=0; host < p->RIONumHosts; host++ ) {
- struct Host *HostP = &p->RIOHosts[host];
- switch ( HostP->Type ) {
- case RIO_AT:
- rio_dprintk (RIO_DEBUG_INIT, "AT BUS : found the card at 0x%x\n", HostP->PaddrP);
- }
- }
- return 0;
-}
-#endif
-
static struct rioVersion stVersion;
struct rioVersion *
return &stVersion;
}
-#if 0
-int
-RIOMapin(paddr, size, vaddr)
-paddr_t paddr;
-int size;
-caddr_t * vaddr;
-{
- *vaddr = (caddr_t)permap( (long)paddr, size);
- return ((int)*vaddr);
-}
-
-void
-RIOMapout(paddr, size, vaddr)
-paddr_t paddr;
-long size;
-caddr_t vaddr;
-{
-}
-#endif
-
-
void
RIOHostReset(Type, DpRamP, Slot)
uint Type;
WBYTE(DpRamP->DpResetTpu, 0xFF);
udelay(3);
break;
-#ifdef FUTURE_RELEASE
- case RIO_EISA:
- /*
- ** Bet this doesn't work!
- */
- OUTBZ( Slot, EISA_CONTROL_PORT,
- EISA_TP_RUN | EISA_TP_BUS_DISABLE |
- EISA_TP_SLOW_LINKS | EISA_TP_BOOT_FROM_RAM );
- OUTBZ( Slot, EISA_CONTROL_PORT,
- EISA_TP_RESET | EISA_TP_BUS_DISABLE |
- EISA_TP_SLOW_LINKS | EISA_TP_BOOT_FROM_RAM );
- suspend( 3 );
- OUTBZ( Slot, EISA_CONTROL_PORT,
- EISA_TP_RUN | EISA_TP_BUS_DISABLE |
- EISA_TP_SLOW_LINKS | EISA_TP_BOOT_FROM_RAM );
- break;
- case RIO_MCA:
- WBYTE(DpRamP->DpControl , McaTpBootFromRam | McaTpBusDisable );
- WBYTE(DpRamP->DpResetTpu , 0xFF );
- suspend( 3 );
- WBYTE(DpRamP->DpControl , McaTpBootFromRam | McaTpBusDisable );
- WBYTE(DpRamP->DpResetTpu , 0xFF );
- suspend( 3 );
- break;
-#endif
case RIO_PCI:
rio_dprintk (RIO_DEBUG_INIT, " (RIO_PCI)\n");
DpRamP->DpControl = RIO_PCI_BOOT_FROM_RAM;
/* for (i=0; i<6000; i++); */
/* suspend( 3 ); */
break;
-#ifdef FUTURE_RELEASE
- default:
- Rprintf(RIOMesgNoSupport,Type,DpRamP,Slot);
- return;
-#endif
-
default:
rio_dprintk (RIO_DEBUG_INIT, " (UNKNOWN)\n");
break;
+++ /dev/null
-/*
-** -----------------------------------------------------------------------------
-**
-** Perle Specialix driver for Linux
-** Ported from existing RIO Driver for SCO sources.
- *
- * (C) 1990 - 2000 Specialix International Ltd., Byfleet, Surrey, UK.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
-**
-** Module : riolocks.h
-** SID : 1.2
-** Last Modified : 11/6/98 11:34:13
-** Retrieved : 11/6/98 11:34:22
-**
-** ident @(#)riolocks.h 1.2
-**
-** -----------------------------------------------------------------------------
-*/
-
-#ifndef __rio_riolocks_h__
-#define __rio_riolocks_h__
-
-#ifdef SCCS_LABELS
-static char *_riolocks_h_sccs_ = "@(#)riolocks.h 1.2";
-#endif
-
-#define LOCKB(lk) lockb(lk);
-#define UNLOCKB(lk, oldspl) unlockb(lk, oldspl);
-
-#endif
** paramed with OPEN, we want to restore the saved port termio, but
** only if StoredTermio has been saved, i.e. NOT 1st open after reboot.
*/
-#if 0
- if (PortP->FirstOpen) {
- PortP->StoredTty.iflag = TtyP->tm.c_iflag;
- PortP->StoredTty.oflag = TtyP->tm.c_oflag;
- PortP->StoredTty.cflag = TtyP->tm.c_cflag;
- PortP->StoredTty.lflag = TtyP->tm.c_lflag;
- PortP->StoredTty.line = TtyP->tm.c_line;
- for (i = 0; i < NCC + 5; i++)
- PortP->StoredTty.cc[i] = TtyP->tm.c_cc[i];
- PortP->FirstOpen = 0;
- } else if (PortP->Store || PortP->Lock) {
- rio_dprintk(RIO_DEBUG_PARAM, "OPEN: Restoring stored/locked params\n");
- TtyP->tm.c_iflag = PortP->StoredTty.iflag;
- TtyP->tm.c_oflag = PortP->StoredTty.oflag;
- TtyP->tm.c_cflag = PortP->StoredTty.cflag;
- TtyP->tm.c_lflag = PortP->StoredTty.lflag;
- TtyP->tm.c_line = PortP->StoredTty.line;
- for (i = 0; i < NCC + 5; i++)
- TtyP->tm.c_cc[i] = PortP->StoredTty.cc[i];
- }
-#endif
}
/*
phb_param_ptr = (struct phb_param *) PacketP->data;
-#if 0
- /*
- ** COR 1
- */
- if (TtyP->tm.c_iflag & INPCK) {
- rio_dprintk(RIO_DEBUG_PARAM, "Parity checking on input enabled\n");
- Cor1 |= COR1_INPCK;
- }
-#endif
-
switch (TtyP->termios->c_cflag & CSIZE) {
case CS5:
{
#ifdef XMT1EN
if (TtyP->termios->c_cflag & XMT1EN)
rio_dprintk(RIO_DEBUG_PARAM, "XMT1EN (?)\n");
-#endif
-#if 0
- if (TtyP->termios->c_cflag & LOBLK)
- rio_dprintk(RIO_DEBUG_PARAM, "LOBLK - JCL output blocks when not current\n");
#endif
if (TtyP->termios->c_lflag & ISIG)
rio_dprintk(RIO_DEBUG_PARAM, "Input character signal generating enabled\n");
rio_dprintk(RIO_DEBUG_PARAM, "Carriage return delay set\n");
if (TtyP->termios->c_oflag & TABDLY)
rio_dprintk(RIO_DEBUG_PARAM, "Tab delay set\n");
-#if 0
- if (TtyP->termios->c_oflag & BSDLY)
- rio_dprintk(RIO_DEBUG_PARAM, "Back-space delay set\n");
- if (TtyP->termios->c_oflag & VTDLY)
- rio_dprintk(RIO_DEBUG_PARAM, "Vertical tab delay set\n");
- if (TtyP->termios->c_oflag & FFDLY)
- rio_dprintk(RIO_DEBUG_PARAM, "Form-feed delay set\n");
-#endif
/*
** These things are kind of useful in a later life!
*/
int Lies;
unsigned long flags;
-#ifdef STACK
- RIOStackCheck("RIORouteRup");
-#endif
-#ifdef CHECK
- CheckPacketP(PacketP);
- CheckHostP(HostP);
- CheckRup(Rup);
- CheckHost(Host);
-#endif
/*
** Is this unit telling us it's current link topology?
*/
for (port = 0; port < PORTS_PER_RTA; port++, PortN++) {
ushort dest_port = port + 8;
-#if 0
- uint PktInt;
-#endif
WORD *TxPktP;
PKT *Pkt;
unsigned long flags;
rio_spin_lock_irqsave(&HostP->HostLock, flags);
-#ifdef CHECK
- CheckHostP(HostP);
- CheckUnitId(UnitId);
-#endif
if (RIOCheck(HostP, UnitId)) {
rio_dprintk(RIO_DEBUG_ROUTE, "Unit %d is NOT isolated\n", UnitId);
rio_spin_unlock_irqrestore(&HostP->HostLock, flags);
{
uint link, unit;
-#ifdef CHECK
- CheckHostP(HostP);
- CheckUnitId(UnitId);
-#endif
UnitId--; /* this trick relies on the Unit Id being UNSIGNED! */
if (UnitId >= MAX_RUP) /* dontcha just lurv unsigned maths! */
{
unsigned char link;
-#ifdef CHECK
- CheckHostP(HostP);
- CheckUnitId(UnitId);
-#endif
/* rio_dprint(RIO_DEBUG_ROUTE, ("Check to see if unit %d has a route to the host\n",UnitId)); */
rio_dprintk(RIO_DEBUG_ROUTE, "RIOCheck : UnitID = %d\n", UnitId);
ushort RtaType;
unsigned long flags;
-#ifdef CHECK
- CheckHostP(HostP);
- CheckHostMapP(HostMapP);
-#endif
-
rio_dprintk(RIO_DEBUG_TABLE, "Mapping sysport %d to id %d\n", (int) HostMapP->SysPort, HostMapP->ID);
/*
rio_dprintk(RIO_DEBUG_TABLE, "c1 p = %p, p->rioPortp = %p\n", p, p->RIOPortp);
PortP = p->RIOPortp[SysPort];
-#if 0
- PortP->TtyP = &p->channel[SysPort];
-#endif
rio_dprintk(RIO_DEBUG_TABLE, "Map port\n");
/*
+++ /dev/null
-/****************************************************************************
- ******* *******
- ******* T I M E
- ******* *******
- ****************************************************************************
-
- Author : Jeremy Rolls
- Date :
-
- *
- * (C) 1990 - 2000 Specialix International Ltd., Byfleet, Surrey, UK.
- *
-
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
-
- Version : 0.01
-
-
- Mods
- ----------------------------------------------------------------------------
- Date By Description
- ----------------------------------------------------------------------------
-
- ***************************************************************************/
-
-#ifndef _riotime_h
-#define _riotime_h 1
-
-#ifndef lint
-#ifdef SCCS
-static char *_rio_riotime_h_sccs = "@(#)riotime.h 1.1";
-#endif
-#endif
-
-#define TWO_POWER_FIFTEEN (ushort)32768
-#define RioTime() riotime
-#define RioTimeAfter(time1,time2) ((ushort)time1 - (ushort)time2) < TWO_POWER_FIFTEEN
-#define RioTimePlus(time1,time2) ((ushort)time1 + (ushort)time2)
-
-/**************************************
- * Convert a RIO tick (1/10th second)
- * into transputer low priority ticks
- *************************************/
-#define RioTimeToLow(time) (time*(100000 / 64))
-#define RioLowToTime(time) ((time*64)/100000)
-
-#define RIOTENTHSECOND (ushort)1
-#define RIOSECOND (ushort)(RIOTENTHSECOND * 10)
-#endif
-
-/*********** end of file ***********/
#include "list.h"
#include "sam.h"
-#if 0
-static void ttyseth_pv(struct Port *, struct ttystatics *, struct termios *sg, int);
-#endif
-
static void RIOClearUp(struct Port *PortP);
int RIOShortCommand(struct rio_info *p, struct Port *PortP, int command, int len, int arg);
-#if 0
-static int RIOCookMode(struct ttystatics *);
-#endif
extern int conv_vb[]; /* now defined in ttymgr.c */
extern int conv_bv[]; /* now defined in ttymgr.c */
** until the RTA is present then we must spin here waiting for
** the RTA to boot.
*/
-#if 0
- if (!(PortP->HostP->Mapping[PortP->RupNum].Flags & RTA_BOOTED)) {
- if (PortP->WaitUntilBooted) {
- rio_dprintk(RIO_DEBUG_TTY, "Waiting for RTA to boot\n");
- do {
- if (RIODelay(PortP, HUNDRED_MS) == RIO_FAIL) {
- rio_dprintk(RIO_DEBUG_TTY, "RTA EINTR in delay \n");
- func_exit();
- return -EINTR;
- }
- if (repeat_this-- <= 0) {
- rio_dprintk(RIO_DEBUG_TTY, "Waiting for RTA to boot timeout\n");
- RIOPreemptiveCmd(p, PortP, FCLOSE);
- pseterr(EINTR);
- func_exit();
- return -EIO;
- }
- } while (!(PortP->HostP->Mapping[PortP->RupNum].Flags & RTA_BOOTED));
- rio_dprintk(RIO_DEBUG_TTY, "RTA has been booted\n");
- } else {
- rio_dprintk(RIO_DEBUG_TTY, "RTA never booted\n");
- pseterr(ENXIO);
- func_exit();
- return 0;
- }
- }
-#else
/* I find the above code a bit hairy. I find the below code
easier to read and shorter. Now, if it works too that would
be great... -- REW
}
}
rio_dprintk(RIO_DEBUG_TTY, "RTA has been booted\n");
-#endif
-#if 0
- tp = PortP->TtyP; /* get tty struct */
-#endif
rio_spin_lock_irqsave(&PortP->portSem, flags);
if (p->RIOHalted) {
goto bombout;
}
-#if 0
- retval = gs_init_port(&PortP->gs);
- if (retval) {
- func_exit();
- return retval;
- }
-#endif
/*
** If the port is in the final throws of being closed,
command piggybacks the parameters immediately.
-- REW */
RIOParam(PortP, OPEN, Modem, OK_TO_SLEEP); /* Open the port */
-#if 0
- /* This delay of 1 second was annoying. I removed it. -- REW */
- RIODelay(PortP, HUNDRED_MS * 10);
- RIOParam(PortP, CONFIG, Modem, OK_TO_SLEEP); /* Config the port */
-#endif
rio_spin_lock_irqsave(&PortP->portSem, flags);
/*
PortP->State |= RIO_WOPEN;
rio_spin_unlock_irqrestore(&PortP->portSem, flags);
if (RIODelay(PortP, HUNDRED_MS) == RIO_FAIL)
-#if 0
- if (sleep((caddr_t) & tp->tm.c_canqo, TTIPRI | PCATCH))
-#endif
{
/*
** ACTION: verify that this is a good thing
*/
int riotclose(void *ptr)
{
-#if 0
- register uint SysPort = dev;
- struct ttystatics *tp; /* pointer to our ttystruct */
-#endif
struct Port *PortP = ptr; /* pointer to the port structure */
int deleted = 0;
int try = -1; /* Disable the timeouts by setting them to -1 */
end_time = jiffies + MAX_SCHEDULE_TIMEOUT;
Modem = rio_ismodem(tty);
-#if 0
- /* What F.CKING cache? Even then, a higly idle multiprocessor,
- system with large caches this won't work . Better find out when
- this doesn't work asap, and fix the cause. -- REW */
-
- RIODelay(PortP, HUNDRED_MS * 10); /* To flush the cache */
-#endif
rio_spin_lock_irqsave(&PortP->portSem, flags);
/*
}
-/*
-** decide if we need to use the line discipline.
-** This routine can return one of three values:
-** COOK_RAW if no processing has to be done by the line discipline or the card
-** COOK_WELL if the line discipline must be used to do the processing
-** COOK_MEDIUM if the card can do all the processing necessary.
-*/
-#if 0
-static int RIOCookMode(struct ttystatics *tp)
-{
- /*
- ** We can't handle tm.c_mstate != 0 on SCO
- ** We can't handle mapping
- ** We can't handle non-ttwrite line disc.
- ** We can't handle lflag XCASE
- ** We can handle oflag OPOST & (OCRNL, ONLCR, TAB3)
- */
-
-#ifdef CHECK
- CheckTtyP(tp);
-#endif
- if (!(tp->tm.c_oflag & OPOST)) /* No post processing */
- return COOK_RAW; /* Raw mode o/p */
-
- if (tp->tm.c_lflag & XCASE)
- return COOK_WELL; /* Use line disc */
-
- if (tp->tm.c_oflag & ~(OPOST | ONLCR | OCRNL | TAB3))
- return COOK_WELL; /* Use line disc for strange modes */
-
- if (tp->tm.c_oflag == OPOST) /* If only OPOST is set, do RAW */
- return COOK_RAW;
-
- /*
- ** So, we need to output process!
- */
- return COOK_MEDIUM;
-}
-#endif
static void RIOClearUp(PortP)
struct Port *PortP;
unsigned long flags;
rio_dprintk(RIO_DEBUG_TTY, "entering shortcommand.\n");
-#ifdef CHECK
- CheckPortP(PortP);
- if (len < 1 || len > 2)
- cprintf(("STUPID LENGTH %d\n", len));
-#endif
if (PortP->State & RIO_DELETED) {
rio_dprintk(RIO_DEBUG_TTY, "Short command to deleted RTA ignored\n");
}
-#if 0
-/*
-** This is an ioctl interface. This is the twentieth century. You know what
-** its all about.
-*/
-int riotioctl(struct rio_info *p, struct tty_struct *tty, int cmd, caddr_t arg)
-{
- register struct Port *PortP;
- register struct ttystatics *tp;
- int current;
- int ParamSemIncremented = 0;
- int old_oflag, old_cflag, old_iflag, changed, oldcook;
- int i;
- unsigned char sio_regs[5]; /* Here be magic */
- short vpix_cflag;
- short divisor;
- int baud;
- uint SysPort = rio_minor(tty);
- int Modem = rio_ismodem(tty);
- int ioctl_processed;
-
- rio_dprintk(RIO_DEBUG_TTY, "port ioctl SysPort %d command 0x%x argument 0x%x %s\n", SysPort, cmd, arg, Modem ? "Modem" : "tty");
-
- if (SysPort >= RIO_PORTS) {
- rio_dprintk(RIO_DEBUG_TTY, "Bad port number %d\n", SysPort);
- return -ENXIO;
- }
-
- PortP = p->RIOPortp[SysPort];
- tp = PortP->TtyP;
-
- rio_spin_lock_irqsave(&PortP->portSem, flags);
-
-#ifdef STATS
- PortP->Stat.IoctlCnt++;
-#endif
-
- if (PortP->State & RIO_DELETED) {
- rio_spin_unlock_irqrestore(&PortP->portSem, flags);
- return -EIO;
- }
-
-
- if (p->RIOHalted) {
- RIOClearUp(PortP);
- rio_spin_unlock_irqrestore(&PortP->portSem, flags);
- return -EIO;
- }
-
- /*
- ** Count ioctls for port statistics reporting
- */
- if (PortP->statsGather)
- PortP->ioctls++;
-
- /*
- ** Specialix RIO Ioctl calls
- */
- switch (cmd) {
-
- case TCRIOTRIAD:
- if (arg)
- PortP->State |= RIO_TRIAD_MODE;
- else
- PortP->State &= ~RIO_TRIAD_MODE;
- /*
- ** Normally, when istrip is set on a port, a config is
- ** sent to the RTA instructing the CD1400 to do the
- ** stripping. In TRIAD mode, the interrupt receive routine
- ** must do the stripping instead, since it has to detect
- ** an 8 bit function key sequence. If istrip is set with
- ** TRIAD mode on(off), and 8 bit data is being read by
- ** the port, the user then turns TRIAD mode off(on), the RTA
- ** must be reconfigured (not) to do the stripping.
- ** Hence we call RIOParam here.
- */
- rio_spin_unlock_irqrestore(&PortP->portSem, flags);
- RIOParam(PortP, CONFIG, Modem, OK_TO_SLEEP);
- return 0;
-
- case TCRIOTSTATE:
- rio_dprintk(RIO_DEBUG_TTY, "tbusy/tstop monitoring %sabled\n", arg ? "en" : "dis");
- /* MonitorTstate = 0 ; */
- rio_spin_unlock_irqrestore(&PortP->portSem, flags);
- RIOParam(PortP, CONFIG, Modem, OK_TO_SLEEP);
- return 0;
-
- case TCRIOSTATE: /* current state of Modem input pins */
- rio_dprintk(RIO_DEBUG_TTY, "TCRIOSTATE\n");
- if (RIOPreemptiveCmd(p, PortP, MGET) == RIO_FAIL)
- rio_dprintk(RIO_DEBUG_TTY, "TCRIOSTATE command failed\n");
- PortP->State |= RIO_BUSY;
- current = PortP->ModemState;
- if (copyout((caddr_t) & current, (int) arg, sizeof(current)) == COPYFAIL) {
- rio_dprintk(RIO_DEBUG_TTY, "Copyout failed\n");
- rio_spin_unlock_irqrestore(&PortP->portSem, flags);
- pseterr(EFAULT);
- }
- rio_spin_unlock_irqrestore(&PortP->portSem, flags);
- return 0;
-
- case TCRIOMBIS: /* Set modem lines */
- case TCRIOMBIC: /* Clear modem lines */
- rio_dprintk(RIO_DEBUG_TTY, "TCRIOMBIS/TCRIOMBIC\n");
- if (cmd == TCRIOMBIS) {
- uint state;
- state = (uint) arg;
- PortP->ModemState |= (ushort) state;
- PortP->ModemLines = (ulong) arg;
- if (RIOPreemptiveCmd(p, PortP, MBIS) == RIO_FAIL)
- rio_dprintk(RIO_DEBUG_TTY, "TCRIOMBIS command failed\n");
- } else {
- uint state;
-
- state = (uint) arg;
- PortP->ModemState &= ~(ushort) state;
- PortP->ModemLines = (ulong) arg;
- if (RIOPreemptiveCmd(p, PortP, MBIC) == RIO_FAIL)
- rio_dprintk(RIO_DEBUG_TTY, "TCRIOMBIC command failed\n");
- }
- PortP->State |= RIO_BUSY;
- rio_spin_unlock_irqrestore(&PortP->portSem, flags);
- return 0;
-
- case TCRIOXPON: /* set Xprint ON string */
- rio_dprintk(RIO_DEBUG_TTY, "TCRIOXPON\n");
- if (copyin((int) arg, (caddr_t) PortP->Xprint.XpOn, MAX_XP_CTRL_LEN) == COPYFAIL) {
- rio_dprintk(RIO_DEBUG_TTY, "Copyin failed\n");
- PortP->Xprint.XpOn[0] = '\0';
- rio_spin_unlock_irqrestore(&PortP->portSem, flags);
- pseterr(EFAULT);
- }
- PortP->Xprint.XpOn[MAX_XP_CTRL_LEN - 1] = '\0';
- PortP->Xprint.XpLen = strlen(PortP->Xprint.XpOn) + strlen(PortP->Xprint.XpOff);
- rio_spin_unlock_irqrestore(&PortP->portSem, flags);
- return 0;
-
- case TCRIOXPOFF: /* set Xprint OFF string */
- rio_dprintk(RIO_DEBUG_TTY, "TCRIOXPOFF\n");
- if (copyin((int) arg, (caddr_t) PortP->Xprint.XpOff, MAX_XP_CTRL_LEN) == COPYFAIL) {
- rio_dprintk(RIO_DEBUG_TTY, "Copyin failed\n");
- PortP->Xprint.XpOff[0] = '\0';
- rio_spin_unlock_irqrestore(&PortP->portSem, flags);
- pseterr(EFAULT);
- }
- PortP->Xprint.XpOff[MAX_XP_CTRL_LEN - 1] = '\0';
- PortP->Xprint.XpLen = strlen(PortP->Xprint.XpOn) + strlen(PortP->Xprint.XpOff);
- rio_spin_unlock_irqrestore(&PortP->portSem, flags);
- return 0;
-
- case TCRIOXPCPS: /* set Xprint CPS string */
- rio_dprintk(RIO_DEBUG_TTY, "TCRIOXPCPS\n");
- if ((uint) arg > p->RIOConf.MaxXpCps || (uint) arg < p->RIOConf.MinXpCps) {
- rio_dprintk(RIO_DEBUG_TTY, "%d CPS out of range\n", arg);
- rio_spin_unlock_irqrestore(&PortP->portSem, flags);
- pseterr(EINVAL);
- return 0;
- }
- PortP->Xprint.XpCps = (uint) arg;
- rio_spin_unlock_irqrestore(&PortP->portSem, flags);
- return 0;
-
- case TCRIOXPRINT:
- rio_dprintk(RIO_DEBUG_TTY, "TCRIOXPRINT\n");
- if (copyout((caddr_t) & PortP->Xprint, (int) arg, sizeof(struct Xprint)) == COPYFAIL) {
- rio_spin_unlock_irqrestore(&PortP->portSem, flags);
- pseterr(EFAULT);
- }
- rio_spin_unlock_irqrestore(&PortP->portSem, flags);
- return 0;
-
- case TCRIOIXANYON:
- rio_dprintk(RIO_DEBUG_TTY, "TCRIOIXANYON\n");
- PortP->Config |= RIO_IXANY;
- rio_spin_unlock_irqrestore(&PortP->portSem, flags);
- return 0;
-
- case TCRIOIXANYOFF:
- rio_dprintk(RIO_DEBUG_TTY, "TCRIOIXANYOFF\n");
- PortP->Config &= ~RIO_IXANY;
- rio_spin_unlock_irqrestore(&PortP->portSem, flags);
- return 0;
-
- case TCRIOIXONON:
- rio_dprintk(RIO_DEBUG_TTY, "TCRIOIXONON\n");
- PortP->Config |= RIO_IXON;
- rio_spin_unlock_irqrestore(&PortP->portSem, flags);
- return 0;
-
- case TCRIOIXONOFF:
- rio_dprintk(RIO_DEBUG_TTY, "TCRIOIXONOFF\n");
- PortP->Config &= ~RIO_IXON;
- rio_spin_unlock_irqrestore(&PortP->portSem, flags);
- return 0;
-
-/*
-** 15.10.1998 ARG - ESIL 0761 part fix
-** Added support for CTS and RTS flow control ioctls :
-*/
- case TCRIOCTSFLOWEN:
- rio_dprintk(RIO_DEBUG_TTY, "TCRIOCTSFLOWEN\n");
- PortP->Config |= RIO_CTSFLOW;
- rio_spin_unlock_irqrestore(&PortP->portSem, flags);
- RIOParam(PortP, CONFIG, Modem, OK_TO_SLEEP);
- return 0;
-
- case TCRIOCTSFLOWDIS:
- rio_dprintk(RIO_DEBUG_TTY, "TCRIOCTSFLOWDIS\n");
- PortP->Config &= ~RIO_CTSFLOW;
- rio_spin_unlock_irqrestore(&PortP->portSem, flags);
- RIOParam(PortP, CONFIG, Modem, OK_TO_SLEEP);
- return 0;
-
- case TCRIORTSFLOWEN:
- rio_dprintk(RIO_DEBUG_TTY, "TCRIORTSFLOWEN\n");
- PortP->Config |= RIO_RTSFLOW;
- rio_spin_unlock_irqrestore(&PortP->portSem, flags);
- RIOParam(PortP, CONFIG, Modem, OK_TO_SLEEP);
- return 0;
-
- case TCRIORTSFLOWDIS:
- rio_dprintk(RIO_DEBUG_TTY, "TCRIORTSFLOWDIS\n");
- PortP->Config &= ~RIO_RTSFLOW;
- rio_spin_unlock_irqrestore(&PortP->portSem, flags);
- RIOParam(PortP, CONFIG, Modem, OK_TO_SLEEP);
- return 0;
-
-/* end ESIL 0761 part fix */
-
- }
-
-
- /* Lynx IOCTLS */
- switch (cmd) {
- case TIOCSETP:
- case TIOCSETN:
- case OTIOCSETP:
- case OTIOCSETN:
- ioctl_processed++;
- ttyseth(PortP, tp, (struct old_sgttyb *) arg);
- break;
- case TCSETA:
- case TCSETAW:
- case TCSETAF:
- ioctl_processed++;
- rio_dprintk(RIO_DEBUG_TTY, "NON POSIX ioctl\n");
- ttyseth_pv(PortP, tp, (struct termios *) arg, 0);
- break;
- case TCSETAP: /* posix tcsetattr() */
- case TCSETAWP: /* posix tcsetattr() */
- case TCSETAFP: /* posix tcsetattr() */
- rio_dprintk(RIO_DEBUG_TTY, "NON POSIX SYSV ioctl\n");
- ttyseth_pv(PortP, tp, (struct termios *) arg, 1);
- ioctl_processed++;
- break;
- }
-
- /*
- ** If its any of the commands that require the port to be in the
- ** non-busy state wait until all output has drained
- */
- if (!ioctl_processed)
- switch (cmd) {
- case TCSETAW:
- case TCSETAF:
- case TCSETA:
- case TCSBRK:
-#define OLD_POSIX ('x' << 8)
-#define OLD_POSIX_SETA (OLD_POSIX | 2)
-#define OLD_POSIX_SETAW (OLD_POSIX | 3)
-#define OLD_POSIX_SETAF (OLD_POSIX | 4)
-#define NEW_POSIX (('i' << 24) | ('X' << 16))
-#define NEW_POSIX_SETA (NEW_POSIX | 2)
-#define NEW_POSIX_SETAW (NEW_POSIX | 3)
-#define NEW_POSIX_SETAF (NEW_POSIX | 4)
- case OLD_POSIX_SETA:
- case OLD_POSIX_SETAW:
- case OLD_POSIX_SETAF:
- case NEW_POSIX_SETA:
- case NEW_POSIX_SETAW:
- case NEW_POSIX_SETAF:
-#ifdef TIOCSETP
- case TIOCSETP:
-#endif
- case TIOCSETD:
- case TIOCSETN:
- rio_dprintk(RIO_DEBUG_TTY, "wait for non-BUSY, semaphore set\n");
- /*
- ** Wait for drain here, at least as far as the double buffer
- ** being empty.
- */
- /* XXX Does the above comment mean that this has
- still to be implemented? -- REW */
- /* XXX Is the locking OK together with locking
- in txenable? (Deadlock?) -- REW */
-
- RIOTxEnable((char *) PortP);
- break;
- default:
- break;
- }
-
- old_cflag = tp->tm.c_cflag;
- old_iflag = tp->tm.c_iflag;
- old_oflag = tp->tm.c_oflag;
- oldcook = PortP->CookMode;
-
- if (p->RIOHalted) {
- RIOClearUp(PortP);
- rio_spin_unlock_irqrestore(&PortP->portSem, flags);
- pseterr(EIO);
- return 0;
- }
-
- PortP->FlushCmdBodge = 0;
-
- /*
- ** If the port is locked, and it is reconfigured, we want
- ** to restore the state of the tty structure so the change is NOT
- ** made.
- */
- if (PortP->Lock) {
- tp->tm.c_iflag = PortP->StoredTty.iflag;
- tp->tm.c_oflag = PortP->StoredTty.oflag;
- tp->tm.c_cflag = PortP->StoredTty.cflag;
- tp->tm.c_lflag = PortP->StoredTty.lflag;
- tp->tm.c_line = PortP->StoredTty.line;
- for (i = 0; i < NCC + 1; i++)
- tp->tm.c_cc[i] = PortP->StoredTty.cc[i];
- } else {
- /*
- ** If the port is set to store the parameters, and it is
- ** reconfigured, we want to save the current tty struct so it
- ** may be restored on the next open.
- */
- if (PortP->Store) {
- PortP->StoredTty.iflag = tp->tm.c_iflag;
- PortP->StoredTty.oflag = tp->tm.c_oflag;
- PortP->StoredTty.cflag = tp->tm.c_cflag;
- PortP->StoredTty.lflag = tp->tm.c_lflag;
- PortP->StoredTty.line = tp->tm.c_line;
- for (i = 0; i < NCC + 1; i++)
- PortP->StoredTty.cc[i] = tp->tm.c_cc[i];
- }
- }
-
- changed = (tp->tm.c_cflag != old_cflag) || (tp->tm.c_iflag != old_iflag) || (tp->tm.c_oflag != old_oflag);
-
- PortP->CookMode = RIOCookMode(tp); /* Set new cooking mode */
-
- rio_dprintk(RIO_DEBUG_TTY, "RIOIoctl changed %d newcook %d oldcook %d\n", changed, PortP->CookMode, oldcook);
-
-#ifdef MODEM_SUPPORT
- /*
- ** kludge to force CARR_ON if CLOCAL set
- */
- if ((tp->tm.c_cflag & CLOCAL) || (PortP->ModemState & MSVR1_CD)) {
- tp->tm.c_state |= CARR_ON;
- wakeup((caddr_t) & tp->tm.c_canq);
- }
-#endif
-
- if (p->RIOHalted) {
- RIOClearUp(PortP);
- rio_spin_unlock_irqrestore(&PortP->portSem, flags);
- pseterr(EIO);
- return 0;
- }
- /*
- ** Re-configure if modes or cooking have changed
- */
- if (changed || oldcook != PortP->CookMode || (ioctl_processed)) {
- rio_spin_unlock_irqrestore(&PortP->portSem, flags);
- rio_dprintk(RIO_DEBUG_TTY, "Ioctl changing the PORT settings\n");
- RIOParam(PortP, CONFIG, Modem, OK_TO_SLEEP);
- rio_spin_lock_irqsave(&PortP->portSem, flags);
- }
-
- if (p->RIOHalted) {
- rio_spin_unlock_irqrestore(&PortP->portSem, flags);
- RIOClearUp(PortP);
- pseterr(EIO);
- return 0;
- }
- rio_spin_unlock_irqrestore(&PortP->portSem, flags);
- return 0;
-}
-
-/*
- ttyseth -- set hardware dependent tty settings
-*/
-void ttyseth(PortP, s, sg)
-struct Port *PortP;
-struct ttystatics *s;
-struct old_sgttyb *sg;
-{
- struct old_sgttyb *tsg;
- struct termios *tp = &s->tm;
-
- tsg = &s->sg;
-
- if (sg->sg_flags & (EVENP | ODDP)) {
- tp->c_cflag &= PARENB;
- if (sg->sg_flags & EVENP) {
- if (sg->sg_flags & ODDP) {
- tp->c_cflag &= V_CS7;
- tp->c_cflag &= ~PARENB;
- } else {
- tp->c_cflag &= V_CS7;
- tp->c_cflag &= PARENB;
- tp->c_cflag &= PARODD;
- }
- } else if (sg->sg_flags & ODDP) {
- tp->c_cflag &= V_CS7;
- tp->c_cflag &= PARENB;
- tp->c_cflag &= PARODD;
- } else {
- tp->c_cflag &= V_CS7;
- tp->c_cflag &= PARENB;
- }
- }
-/*
- * Use ispeed as the desired speed. Most implementations don't handle
- * separate input and output speeds very well. If the RIO handles this,
- * I will have to use separate sets of flags to store them in the
- * Port structure.
- */
- if (!sg->sg_ospeed)
- sg->sg_ospeed = sg->sg_ispeed;
- else
- sg->sg_ispeed = sg->sg_ospeed;
- if (sg->sg_ispeed > V_EXTB)
- sg->sg_ispeed = V_EXTB;
- if (sg->sg_ispeed < V_B0)
- sg->sg_ispeed = V_B0;
- *tsg = *sg;
- tp->c_cflag = (tp->c_cflag & ~V_CBAUD) | conv_bv[(int) sg->sg_ispeed];
-}
-
-/*
- ttyseth_pv -- set hardware dependent tty settings using either the
- POSIX termios structure or the System V termio structure.
- sysv = 0 => (POSIX): struct termios *sg
- sysv != 0 => (System V): struct termio *sg
-*/
-static void ttyseth_pv(PortP, s, sg, sysv)
-struct Port *PortP;
-struct ttystatics *s;
-struct termios *sg;
-int sysv;
-{
- int speed;
- unsigned char csize;
- unsigned char cread;
- unsigned int lcr_flags;
- int ps;
-
- if (sysv) {
- /* sg points to a System V termio structure */
- csize = ((struct termio *) sg)->c_cflag & CSIZE;
- cread = ((struct termio *) sg)->c_cflag & CREAD;
- speed = conv_vb[((struct termio *) sg)->c_cflag & V_CBAUD];
- } else {
- /* sg points to a POSIX termios structure */
- csize = sg->c_cflag & CSIZE;
- cread = sg->c_cflag & CREAD;
- speed = conv_vb[sg->c_cflag & V_CBAUD];
- }
- if (s->sg.sg_ispeed != speed || s->sg.sg_ospeed != speed) {
- s->sg.sg_ispeed = speed;
- s->sg.sg_ospeed = speed;
- s->tm.c_cflag = (s->tm.c_cflag & ~V_CBAUD) | conv_bv[(int) s->sg.sg_ispeed];
- }
-}
-#endif
+++ /dev/null
-/************************************************************************/
-/* */
-/* Title : RIO Shared Memory Window Inteface */
-/* */
-/* Author : N.P.Vassallo */
-/* */
-/* Creation : 7th June 1999 */
-/* */
-/* Version : 1.0.0 */
-/* */
-/* Copyright : (c) Specialix International Ltd. 1999 *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- * */
-/* Description : Prototypes, structures and definitions */
-/* describing RIO host card shared memory */
-/* window interface structures: */
-/* PARMMAP */
-/* RUP */
-/* PHB */
-/* LPB */
-/* PKT */
-/* */
-/************************************************************************/
-
-/* History...
-
-1.0.0 07/06/99 NPV Creation. (based on PARMMAP.H)
-
-*/
-
-#ifndef _riowinif_h /* If RIOWINDIF.H not already defined */
-#define _riowinif_h 1
-
-/*****************************************************************************
-******************************** *********************************
-******************************** General *********************************
-******************************** *********************************
-*****************************************************************************/
-
-#define TPNULL ((_u16)(0x8000))
-
-/*****************************************************************************
-******************************** ********************************
-******************************** PARM_MAP ********************************
-******************************** ********************************
-*****************************************************************************/
-
-/* The PARM_MAP structure defines global values relating to the Host Card / RTA
- and is the main structure from which all other structures are referenced. */
-
-typedef struct _PARM_MAP {
- _u16 phb_ptr; /* 0x00 Pointer to the PHB array */
- _u16 phb_num_ptr; /* 0x02 Ptr to Number of PHB's */
- _u16 free_list; /* 0x04 Free List pointer */
- _u16 free_list_end; /* 0x06 Free List End pointer */
- _u16 q_free_list_ptr; /* 0x08 Ptr to Q_BUF variable */
- _u16 unit_id_ptr; /* 0x0A Unit Id */
- _u16 link_str_ptr; /* 0x0C Link Structure Array */
- _u16 bootloader_1; /* 0x0E 1st Stage Boot Loader */
- _u16 bootloader_2; /* 0x10 2nd Stage Boot Loader */
- _u16 port_route_map_ptr; /* 0x12 Port Route Map */
- _u16 route_ptr; /* 0x14 Route Map */
- _u16 map_present; /* 0x16 Route Map present */
- _u16 pkt_num; /* 0x18 Total number of packets */
- _u16 q_num; /* 0x1A Total number of Q packets */
- _u16 buffers_per_port; /* 0x1C Number of buffers per port */
- _u16 heap_size; /* 0x1E Initial size of heap */
- _u16 heap_left; /* 0x20 Current Heap left */
- _u16 error; /* 0x22 Error code */
- _u16 tx_max; /* 0x24 Max number of tx pkts per phb */
- _u16 rx_max; /* 0x26 Max number of rx pkts per phb */
- _u16 rx_limit; /* 0x28 For high / low watermarks */
- _u16 links; /* 0x2A Links to use */
- _u16 timer; /* 0x2C Interrupts per second */
- _u16 rups; /* 0x2E Pointer to the RUPs */
- _u16 max_phb; /* 0x30 Mostly for debugging */
- _u16 living; /* 0x32 Just increments!! */
- _u16 init_done; /* 0x34 Initialisation over */
- _u16 booting_link; /* 0x36 */
- _u16 idle_count; /* 0x38 Idle time counter */
- _u16 busy_count; /* 0x3A Busy counter */
- _u16 idle_control; /* 0x3C Control Idle Process */
- _u16 tx_intr; /* 0x3E TX interrupt pending */
- _u16 rx_intr; /* 0x40 RX interrupt pending */
- _u16 rup_intr; /* 0x42 RUP interrupt pending */
-
-} PARM_MAP;
-
-/* Same thing again, but defined as offsets... */
-
-#define PM_phb_ptr 0x00 /* 0x00 Pointer to the PHB array */
-#define PM_phb_num_ptr 0x02 /* 0x02 Ptr to Number of PHB's */
-#define PM_free_list 0x04 /* 0x04 Free List pointer */
-#define PM_free_list_end 0x06 /* 0x06 Free List End pointer */
-#define PM_q_free_list_ptr 0x08 /* 0x08 Ptr to Q_BUF variable */
-#define PM_unit_id_ptr 0x0A /* 0x0A Unit Id */
-#define PM_link_str_ptr 0x0C /* 0x0C Link Structure Array */
-#define PM_bootloader_1 0x0E /* 0x0E 1st Stage Boot Loader */
-#define PM_bootloader_2 0x10 /* 0x10 2nd Stage Boot Loader */
-#define PM_port_route_map_ptr 0x12 /* 0x12 Port Route Map */
-#define PM_route_ptr 0x14 /* 0x14 Route Map */
-#define PM_map_present 0x16 /* 0x16 Route Map present */
-#define PM_pkt_num 0x18 /* 0x18 Total number of packets */
-#define PM_q_num 0x1A /* 0x1A Total number of Q packets */
-#define PM_buffers_per_port 0x1C /* 0x1C Number of buffers per port */
-#define PM_heap_size 0x1E /* 0x1E Initial size of heap */
-#define PM_heap_left 0x20 /* 0x20 Current Heap left */
-#define PM_error 0x22 /* 0x22 Error code */
-#define PM_tx_max 0x24 /* 0x24 Max number of tx pkts per phb */
-#define PM_rx_max 0x26 /* 0x26 Max number of rx pkts per phb */
-#define PM_rx_limit 0x28 /* 0x28 For high / low watermarks */
-#define PM_links 0x2A /* 0x2A Links to use */
-#define PM_timer 0x2C /* 0x2C Interrupts per second */
-#define PM_rups 0x2E /* 0x2E Pointer to the RUPs */
-#define PM_max_phb 0x30 /* 0x30 Mostly for debugging */
-#define PM_living 0x32 /* 0x32 Just increments!! */
-#define PM_init_done 0x34 /* 0x34 Initialisation over */
-#define PM_booting_link 0x36 /* 0x36 */
-#define PM_idle_count 0x38 /* 0x38 Idle time counter */
-#define PM_busy_count 0x3A /* 0x3A Busy counter */
-#define PM_idle_control 0x3C /* 0x3C Control Idle Process */
-#define PM_tx_intr 0x3E /* 0x4E TX interrupt pending */
-#define PM_rx_intr 0x40 /* 0x40 RX interrupt pending */
-#define PM_rup_intr 0x42 /* 0x42 RUP interrupt pending */
-#define sizeof_PARM_MAP 0x44 /* structure size = 0x44 */
-
-/* PARM_MAP.error definitions... */
-#define E_NO_ERROR 0x00
-#define E_PROCESS_NOT_INIT 0x01
-#define E_LINK_TIMEOUT 0x02
-#define E_NO_ROUTE 0x03
-#define E_CONFUSED 0x04
-#define E_HOME 0x05
-#define E_CSUM_FAIL 0x06
-#define E_DISCONNECTED 0x07
-#define E_BAD_RUP 0x08
-#define E_NO_VIRGIN 0x09
-#define E_BOOT_RUP_BUSY 0x10
-#define E_CHANALLOC 0x80
-#define E_POLL_ALLOC 0x81
-#define E_LTTWAKE 0x82
-#define E_LTT_ALLOC 0x83
-#define E_LRT_ALLOC 0x84
-#define E_CIRRUS 0x85
-#define E_MONITOR 0x86
-#define E_PHB_ALLOC 0x87
-#define E_ARRAY_ALLOC 0x88
-#define E_QBUF_ALLOC 0x89
-#define E_PKT_ALLOC 0x8a
-#define E_GET_TX_Q_BUF 0x8b
-#define E_GET_RX_Q_BUF 0x8c
-#define E_MEM_OUT 0x8d
-#define E_MMU_INIT 0x8e
-#define E_LTT_INIT 0x8f
-#define E_LRT_INIT 0x90
-#define E_LINK_RUN 0x91
-#define E_MONITOR_ALLOC 0x92
-#define E_MONITOR_INIT 0x93
-#define E_POLL_INIT 0x94
-
-/* PARM_MAP.links definitions... */
-#define RIO_LINK_ENABLE 0x80FF
-
-/*****************************************************************************
-********************************** ***********************************
-********************************** RUP ***********************************
-********************************** ***********************************
-*****************************************************************************/
-
-/* The RUP (Remote Unit Port) structure relates to the Remote Terminal Adapters
- attached to the system and there is normally an array of MAX_RUPS (=16) structures
- in a host card, defined by PARM_MAP->rup. */
-
-typedef struct _RUP {
- _u16 txpkt; /* 0x00 Outgoing packet */
- _u16 rxpkt; /* 0x02 ncoming packet */
- _u16 link; /* 0x04 Which link to send packet down ? */
- _u8 rup_dest_unit[2]; /* 0x06 Destination Unit */
- _u16 handshake; /* 0x08 Handshaking */
- _u16 timeout; /* 0x0A Timeout */
- _u16 status; /* 0x0C Status */
- _u16 txcontrol; /* 0x0E Transmit control */
- _u16 rxcontrol; /* 0x10 Receive control */
-
-} RUP;
-
-/* Same thing again, but defined as offsets... */
-
-#define RUP_txpkt 0x00 /* 0x00 Outgoing packet */
-#define RUP_rxpkt 0x02 /* 0x02 Incoming packet */
-#define RUP_link 0x04 /* 0x04 Which link to send packet down ? */
-#define RUP_rup_dest_unit 0x06 /* 0x06 Destination Unit */
-#define RUP_handshake 0x08 /* 0x08 Handshaking */
-#define RUP_timeout 0x0A /* 0x0A Timeout */
-#define RUP_status 0x0C /* 0x0C Status */
-#define RUP_txcontrol 0x0E /* 0x0E Transmit control */
-#define RUP_rxcontrol 0x10 /* 0x10 Receive control */
-#define sizeof_RUP 0x12 /* structure size = 0x12 */
-
-#define MAX_RUP 16
-
-/* RUP.txcontrol definitions... */
-#define TX_RUP_INACTIVE 0 /* Nothing to transmit */
-#define TX_PACKET_READY 1 /* Transmit packet ready */
-#define TX_LOCK_RUP 2 /* Transmit side locked */
-
-/* RUP.txcontrol definitions... */
-#define RX_RUP_INACTIVE 0 /* Nothing received */
-#define RX_PACKET_READY 1 /* Packet received */
-
-#define RUP_NO_OWNER 0xFF /* RUP not owned by any process */
-
-/*****************************************************************************
-********************************** ***********************************
-********************************** PHB ***********************************
-********************************** ***********************************
-*****************************************************************************/
-
-/* The PHB (Port Header Block) structure relates to the serial ports attached
- to the system and there is normally an array of MAX_PHBS (=128) structures
- in a host card, defined by PARM_MAP->phb_ptr and PARM_MAP->phb_num_ptr. */
-
-typedef struct _PHB {
- _u16 source; /* 0x00 Location of the PHB in the host card */
- _u16 handshake; /* 0x02 Used to manage receive packet flow control */
- _u16 status; /* 0x04 Internal port transmit/receive status */
- _u16 timeout; /* 0x06 Time period to wait for an ACK */
- _u16 link; /* 0x08 The host link associated with the PHB */
- _u16 destination; /* 0x0A Location of the remote port on the network */
-
- _u16 tx_start; /* 0x0C first entry in the packet array for transmit packets */
- _u16 tx_end; /* 0x0E last entry in the packet array for transmit packets */
- _u16 tx_add; /* 0x10 position in the packet array for new transmit packets */
- _u16 tx_remove; /* 0x12 current position in the packet pointer array */
-
- _u16 rx_start; /* 0x14 first entry in the packet array for receive packets */
- _u16 rx_end; /* 0x16 last entry in the packet array for receive packets */
- _u16 rx_add; /* 0x18 position in the packet array for new receive packets */
- _u16 rx_remove; /* 0x1A current position in the packet pointer array */
-
-} PHB;
-
-/* Same thing again, but defined as offsets... */
-
-#define PHB_source 0x00 /* 0x00 Location of the PHB in the host card */
-#define PHB_handshake 0x02 /* 0x02 Used to manage receive packet flow control */
-#define PHB_status 0x04 /* 0x04 Internal port transmit/receive status */
-#define PHB_timeout 0x06 /* 0x06 Time period to wait for an ACK */
-#define PHB_link 0x08 /* 0x08 The host link associated with the PHB */
-#define PHB_destination 0x0A /* 0x0A Location of the remote port on the network */
-#define PHB_tx_start 0x0C /* 0x0C first entry in the packet array for transmit packets */
-#define PHB_tx_end 0x0E /* 0x0E last entry in the packet array for transmit packets */
-#define PHB_tx_add 0x10 /* 0x10 position in the packet array for new transmit packets */
-#define PHB_tx_remove 0x12 /* 0x12 current position in the packet pointer array */
-#define PHB_rx_start 0x14 /* 0x14 first entry in the packet array for receive packets */
-#define PHB_rx_end 0x16 /* 0x16 last entry in the packet array for receive packets */
-#define PHB_rx_add 0x18 /* 0x18 position in the packet array for new receive packets */
-#define PHB_rx_remove 0x1A /* 0x1A current position in the packet pointer array */
-#define sizeof_PHB 0x1C /* structure size = 0x1C */
-
-/* PHB.handshake definitions... */
-#define PHB_HANDSHAKE_SET 0x0001 /* Set by LRT */
-#define PHB_HANDSHAKE_RESET 0x0002 /* Set by ISR / driver */
-#define PHB_HANDSHAKE_FLAGS (PHB_HANDSHAKE_RESET|PHB_HANDSHAKE_SET)
- /* Reset by ltt */
-
-#define MAX_PHB 128 /* range 0-127 */
-
-/*****************************************************************************
-********************************** ***********************************
-********************************** LPB ***********************************
-********************************** ***********************************
-*****************************************************************************/
-
-/* The LPB (Link Parameter Block) structure relates to a RIO Network Link
- and there is normally an array of MAX_LINKS (=4) structures in a host card,
- defined by PARM_MAP->link_str_ptr. */
-
-typedef struct _LPB {
- _u16 link_number; /* 0x00 Link Number */
- _u16 in_ch; /* 0x02 Link In Channel */
- _u16 out_ch; /* 0x04 Link Out Channel */
- _u8 attached_serial[4]; /* 0x06 Attached serial number */
- _u8 attached_host_serial[4]; /* 0x0A Serial number of Host who booted other end */
- _u16 descheduled; /* 0x0E Currently Descheduled */
- _u16 state; /* 0x10 Current state */
- _u16 send_poll; /* 0x12 Send a Poll Packet */
- _u16 ltt_p; /* 0x14 Process Descriptor */
- _u16 lrt_p; /* 0x16 Process Descriptor */
- _u16 lrt_status; /* 0x18 Current lrt status */
- _u16 ltt_status; /* 0x1A Current ltt status */
- _u16 timeout; /* 0x1C Timeout value */
- _u16 topology; /* 0x1E Topology bits */
- _u16 mon_ltt; /* 0x20 */
- _u16 mon_lrt; /* 0x22 */
- _u16 num_pkts; /* 0x24 */
- _u16 add_packet_list; /* 0x26 Add packets to here */
- _u16 remove_packet_list; /* 0x28 Send packets from here */
-
- _u16 lrt_fail_chan; /* 0x2A Lrt's failure channel */
- _u16 ltt_fail_chan; /* 0x2C Ltt's failure channel */
-
- RUP rup; /* 0x2E RUP structure for HOST to driver comms */
- RUP link_rup; /* 0x40 RUP for the link (POLL, topology etc.) */
- _u16 attached_link; /* 0x52 Number of attached link */
- _u16 csum_errors; /* 0x54 csum errors */
- _u16 num_disconnects; /* 0x56 number of disconnects */
- _u16 num_sync_rcvd; /* 0x58 # sync's received */
- _u16 num_sync_rqst; /* 0x5A # sync requests */
- _u16 num_tx; /* 0x5C Num pkts sent */
- _u16 num_rx; /* 0x5E Num pkts received */
- _u16 module_attached; /* 0x60 Module tpyes of attached */
- _u16 led_timeout; /* 0x62 LED timeout */
- _u16 first_port; /* 0x64 First port to service */
- _u16 last_port; /* 0x66 Last port to service */
-
-} LPB;
-
-/* Same thing again, but defined as offsets... */
-
-#define LPB_link_number 0x00 /* 0x00 Link Number */
-#define LPB_in_ch 0x02 /* 0x02 Link In Channel */
-#define LPB_out_ch 0x04 /* 0x04 Link Out Channel */
-#define LPB_attached_serial 0x06 /* 0x06 Attached serial number */
-#define LPB_attached_host_serial 0x0A /* 0x0A Serial number of Host who booted other end */
-#define LPB_descheduled 0x0E /* 0x0E Currently Descheduled */
-#define LPB_state 0x10 /* 0x10 Current state */
-#define LPB_send_poll 0x12 /* 0x12 Send a Poll Packet */
-#define LPB_ltt_p 0x14 /* 0x14 Process Descriptor */
-#define LPB_lrt_p 0x16 /* 0x16 Process Descriptor */
-#define LPB_lrt_status 0x18 /* 0x18 Current lrt status */
-#define LPB_ltt_status 0x1A /* 0x1A Current ltt status */
-#define LPB_timeout 0x1C /* 0x1C Timeout value */
-#define LPB_topology 0x1E /* 0x1E Topology bits */
-#define LPB_mon_ltt 0x20 /* 0x20 */
-#define LPB_mon_lrt 0x22 /* 0x22 */
-#define LPB_num_pkts 0x24 /* 0x24 */
-#define LPB_add_packet_list 0x26 /* 0x26 Add packets to here */
-#define LPB_remove_packet_list 0x28 /* 0x28 Send packets from here */
-#define LPB_lrt_fail_chan 0x2A /* 0x2A Lrt's failure channel */
-#define LPB_ltt_fail_chan 0x2C /* 0x2C Ltt's failure channel */
-#define LPB_rup 0x2E /* 0x2E RUP structure for HOST to driver comms */
-#define LPB_link_rup 0x40 /* 0x40 RUP for the link (POLL, topology etc.) */
-#define LPB_attached_link 0x52 /* 0x52 Number of attached link */
-#define LPB_csum_errors 0x54 /* 0x54 csum errors */
-#define LPB_num_disconnects 0x56 /* 0x56 number of disconnects */
-#define LPB_num_sync_rcvd 0x58 /* 0x58 # sync's received */
-#define LPB_num_sync_rqst 0x5A /* 0x5A # sync requests */
-#define LPB_num_tx 0x5C /* 0x5C Num pkts sent */
-#define LPB_num_rx 0x5E /* 0x5E Num pkts received */
-#define LPB_module_attached 0x60 /* 0x60 Module tpyes of attached */
-#define LPB_led_timeout 0x62 /* 0x62 LED timeout */
-#define LPB_first_port 0x64 /* 0x64 First port to service */
-#define LPB_last_port 0x66 /* 0x66 Last port to service */
-#define sizeof_LPB 0x68 /* structure size = 0x68 */
-
-#define LINKS_PER_UNIT 4 /* number of links from a host */
-
-/*****************************************************************************
-******************************** *******************************
-******************************** FREE_LIST *******************************
-******************************** *******************************
-*****************************************************************************/
-
-/* Used to overlay packet headers when allocating/freeing packets from the free list */
-
-typedef struct _FREE_LIST {
- _u16 next; /* 0x00 offset of next list item */
- _u16 prev; /* 0x02 offset of previous list item */
-
-} FREE_LIST;
-
-/* Same thing again, but defined as offsets... */
-
-#define FL_next 0x00 /* 0x00 offset of next list item */
-#define FL_prev 0x02 /* 0x02 offset of previous list item */
-
-/*****************************************************************************
-********************************** ***********************************
-********************************** PKT ***********************************
-********************************** ***********************************
-*****************************************************************************/
-
-/* The PKT is the main unit of communication between Host Cards and RTAs across
- the RIO network. */
-
-#define PKT_MAX_DATA_LEN 72 /* Size of packet data */
-
-typedef struct _PKT {
- _u8 dest_unit; /* 0x00 Destination Unit Id */
- _u8 dest_port; /* 0x01 Destination Port */
- _u8 src_unit; /* 0x02 Source Unit Id */
- _u8 src_port; /* 0x03 Source Port */
- _u8 len; /* 0x04 Length (in bytes) of data field */
- _u8 control; /* 0x05 */
- _u8 data[PKT_MAX_DATA_LEN]; /* 0x06 Actual data */
- _u16 csum; /* 0x4E C-SUM */
-
-} PKT;
-
-/* Same thing again, but defined as offsets... */
-
-#define PKT_dest_unit 0x00 /* 0x00 Destination Unit Id */
-#define PKT_dest_port 0x01 /* 0x01 Destination Port */
-#define PKT_src_unit 0x02 /* 0x02 Source Unit Id */
-#define PKT_src_port 0x03 /* 0x03 Source Port */
-#define PKT_len 0x04 /* 0x04 Length (in bytes) of data field */
-#define PKT_control 0x05 /* 0x05 */
-#define PKT_data 0x06 /* 0x06 Actual data */
-#define PKT_csum 0x4E /* 0x4E C-SUM */
-#define sizeof_PKT 0x50 /* structure size = 0x50 */
-
-/* PKT.len definitions... */
-#define PKT_CMD_BIT 0x80
-#define PKT_CMD_DATA 0x80
-#define PKT_LEN_MASK 0x7F
-
-/* PKT.control definitions... */
-#define PKT_ACK 0x40
-#define PKT_TGL 0x20
-#define DATA_WNDW 0x10
-#define PKT_TTL_MASK 0x0F
-#define MAX_TTL 0x0F
-
-/*****************************************************************************
-***************************** ****************************
-***************************** Control Packets ****************************
-***************************** ****************************
-*****************************************************************************/
-
-/* The following definitions and structures define the control packets sent
- between the driver and RIO Ports, RTAs and Host Cards. */
-
-#define PRE_EMPTIVE 0x80 /* Pre-emptive command (sent via port's RUP) */
-
-/* "in-band" and "pre-emptive" port commands... */
-#define OPEN 0x00 /* Driver->RIO Open a port */
-#define CONFIG 0x01 /* Driver->RIO Configure a port */
-#define MOPEN 0x02 /* Driver->RIO Modem open (wait for DCD) */
-#define CLOSE 0x03 /* Driver->RIO Close a port */
-#define WFLUSH (0x04|PRE_EMPTIVE) /* Driver->RIO Write flush */
-#define RFLUSH (0x05|PRE_EMPTIVE) /* Driver->RIO Read flush */
-#define RESUME (0x06|PRE_EMPTIVE) /* Driver->RIO Behave as if XON received */
-#define SBREAK 0x07 /* Driver->RIO Start break */
-#define EBREAK 0x08 /* Driver->RIO End break */
-#define SUSPEND (0x09|PRE_EMPTIVE) /* Driver->RIO Behave as if XOFF received */
-#define FCLOSE (0x0A|PRE_EMPTIVE) /* Driver->RIO Force close */
-#define XPRINT 0x0B /* Driver->RIO Xprint packet */
-#define MBIS (0x0C|PRE_EMPTIVE) /* Driver->RIO Set modem lines */
-#define MBIC (0x0D|PRE_EMPTIVE) /* Driver->RIO Clear modem lines */
-#define MSET (0x0E|PRE_EMPTIVE) /* Driver->RIO Set modem lines */
-#define PCLOSE 0x0F /* Driver->RIO Pseudo close */
-#define MGET (0x10|PRE_EMPTIVE) /* Driver->RIO Force update of modem status */
-#define MEMDUMP (0x11|PRE_EMPTIVE) /* Driver->RIO DEBUG request for RTA memory */
-#define READ_REGISTER (0x12|PRE_EMPTIVE) /* Driver->RIO DEBUG read CD1400 register */
-
-/* Remote Unit Port (RUP) packet definitions... (specified in PKT.dest_unit and PKT.src_unit) */
-#define SYNC_RUP 0xFF /* Download internal */
-#define COMMAND_RUP 0xFE /* Command ack/status */
-#define ERROR_RUP 0xFD /* Download internal */
-#define POLL_RUP 0xFC /* Download internal */
-#define BOOT_RUP 0xFB /* Used to boot RTAs */
-#define ROUTE_RUP 0xFA /* Used to specify routing/topology */
-#define STATUS_RUP 0xF9 /* Not used */
-#define POWER_RUP 0xF8 /* Download internal */
-
-/* COMMAND_RUP definitions... */
-#define COMPLETE (0x20|PRE_EMPTIVE) /* RIO->Driver Command complete */
-#define BREAK_RECEIVED (0x21|PRE_EMPTIVE) /* RIO->Driver Break received */
-#define MODEM_STATUS (0x22|PRE_EMPTIVE) /* RIO->Driver Modem status change */
-
-/* BOOT_RUP definitions... */
-#define BOOT_REQUEST 0x00 /* RIO->Driver Request for boot */
-#define BOOT_ABORT 0x01 /* Driver->RIO Abort a boot */
-#define BOOT_SEQUENCE 0x02 /* Driver->RIO Packet with firmware details */
-#define BOOT_COMPLETED 0x03 /* RIO->Driver Boot completed */
-#define IFOAD 0x2F /* Driver->RIO Shutdown/Reboot RTA (Fall Over And Die) */
-#define IDENTIFY 0x30 /* Driver->RIO Identify RTA */
-#define ZOMBIE 0x31 /* Driver->RIO Shutdown/Flash LEDs */
-#define UFOAD 0x32 /* Driver->RIO Shutdown/Reboot neighbouring RTA */
-#define IWAIT 0x33 /* Driver->RIO Pause booting process */
-
-/* ROUTE_RUP definitions... */
-#define ROUTE_REQUEST 0x00 /* RIO->Driver Request an ID */
-#define ROUTE_FOAD 0x01 /* Driver->RIO Shutdown/reboot RTA */
-#define ROUTE_ALREADY 0x02 /* Driver->RIO Not used */
-#define ROUTE_USED 0x03 /* Driver->RIO Not used */
-#define ROUTE_ALLOCATE 0x04 /* Driver->RIO Allocate RTA RUP numbers */
-#define ROUTE_REQ_TOP 0x05 /* Driver->RIO Not used */
-#define ROUTE_TOPOLOGY 0x06 /* RIO->Driver Route/Topology status */
-
-/*****************************************************************************
-********************************** **********************************
-********************************** OPEN **********************************
-********************************** **********************************
-*****************************************************************************/
-
-/* (Driver->RIO,in-band)
-
- Sent to open a port.
- Structure of configuration info used with OPEN, CONFIG and MOPEN packets... */
-
-#define PKT_Cmd (PKT_Data+0) /* Command code */
-#define PKT_Cor1 (PKT_Data+1) /* Channel Option Register 1 */
-#define PKT_Cor2 (PKT_Data+2) /* Channel Option Register 2 */
-#define PKT_Cor4 (PKT_Data+3) /* Channel Option Register 4 */
-#define PKT_Cor5 (PKT_Data+4) /* Channel Option Register 5 */
-#define PKT_TxXon (PKT_Data+5) /* Transmit XON character */
-#define PKT_TxXoff (PKT_Data+6) /* Transmit XOFF character */
-#define PKT_RxXon (PKT_Data+7) /* Receive XON character */
-#define PKT_RxXoff (PKT_Data+8) /* Receive XOFF character */
-#define PKT_Lnext (PKT_Data+9) /* Lnext character */
-#define PKT_TxBaud (PKT_Data+10) /* Transmit baud rate */
-#define PKT_RxBaud (PKT_Data+11) /* Receive baud rate */
-
-/* COR1 definitions... */
-#define COR1_PARITY 0xE0 /* Parity mask */
-#define COR1_NONE 0x00 /* No parity */
-#define COR1_SPACE 0x20 /* Space parity */
-#define COR1_EVEN 0x40 /* Even parity */
-#define COR1_MARK 0xA0 /* Mark parity */
-#define COR1_ODD 0xC0 /* Odd parity */
-
-#define COR1_STOPBITS 0x0C /* Stop bits mask */
-#define COR1_STOP1 0x00 /* 1 stop bit */
-#define COR1_STOP1_5 0x04 /* 1.5 stop bits */
-#define COR1_STOP2 0x08 /* 2 stop bits */
-
-#define COR1_DATABITS 0x03 /* Data bits mask */
-#define COR1_DATA5 0x00 /* 5 data bits */
-#define COR1_DATA6 0x01 /* 6 data bits */
-#define COR1_DATA7 0x02 /* 7 data bits */
-#define COR1_DATA8 0x03 /* 8 data bits */
-
-/* COR2 definitions... */
-#define COR2_XON_TXFLOW 0x40 /* XON/XOFF Transmit Flow */
-#define COR2_XANY_TXFLOW 0xC0 /* XON/XANY Transmit Flow */
-#define COR2_HUPCL 0x20 /* Hang Up On Close */
-#define COR2_DSR_TXFLOW 0x08 /* DSR Transmit Flow Control */
-#define COR2_RTS_RXFLOW 0x04 /* RTS Receive Flow Control */
-#define COR2_CTS_TXFLOW 0x02 /* CTS Transmit Flow Control */
-#define COR2_XON_RXFLOW 0x01 /* XON/XOFF Receive Flow */
-
-/* COR4 definition... */
-#define COR4_IGNCR 0x80 /* Discard received CR */
-#define COR4_ICRNL 0x40 /* Map received CR -> NL */
-#define COR4_INLCR 0x20 /* Map received NL -> CR */
-#define COR4_IGNBRK 0x10 /* Ignore Received Break */
-#define COR4_NBRKINT 0x08 /* No interrupt on rx Break */
-#define COR4_IGNPAR 0x04 /* ignore rx parity error chars */
-#define COR4_PARMRK 0x02 /* Mark rx parity error chars */
-#define COR4_RAISEMOD 0x01 /* Raise modem lines on !0 baud */
-
-/* COR5 definitions... */
-#define COR5_ISTRIP 0x80 /* Strip input chars to 7 bits */
-#define COR5_LNE 0x40 /* Enable LNEXT processing */
-#define COR5_CMOE 0x20 /* Match good & error characters */
-#define COR5_TAB3 0x10 /* TAB3 mode */
-#define COR5_TSTATE_ON 0x08 /* Enable tbusy/tstop monitoring */
-#define COR5_TSTATE_OFF 0x04 /* Disable tbusy/tstop monitoring */
-#define COR5_ONLCR 0x02 /* NL -> CR NL on output */
-#define COR5_OCRNL 0x01 /* CR -> NL on output */
-
-/* RxBaud and TxBaud definitions... */
-#define RIO_B0 0x00 /* RTS / DTR signals dropped */
-#define RIO_B50 0x01 /* 50 baud */
-#define RIO_B75 0x02 /* 75 baud */
-#define RIO_B110 0x03 /* 110 baud */
-#define RIO_B134 0x04 /* 134.5 baud */
-#define RIO_B150 0x05 /* 150 baud */
-#define RIO_B200 0x06 /* 200 baud */
-#define RIO_B300 0x07 /* 300 baud */
-#define RIO_B600 0x08 /* 600 baud */
-#define RIO_B1200 0x09 /* 1200 baud */
-#define RIO_B1800 0x0A /* 1800 baud */
-#define RIO_B2400 0x0B /* 2400 baud */
-#define RIO_B4800 0x0C /* 4800 baud */
-#define RIO_B9600 0x0D /* 9600 baud */
-#define RIO_B19200 0x0E /* 19200 baud */
-#define RIO_B38400 0x0F /* 38400 baud */
-#define RIO_B56000 0x10 /* 56000 baud */
-#define RIO_B57600 0x11 /* 57600 baud */
-#define RIO_B64000 0x12 /* 64000 baud */
-#define RIO_B115200 0x13 /* 115200 baud */
-#define RIO_B2000 0x14 /* 2000 baud */
-
-/*****************************************************************************
-********************************* *********************************
-********************************* CONFIG *********************************
-********************************* *********************************
-*****************************************************************************/
-
-/* (Driver->RIO,in-band)
-
- CONFIG is sent from the driver to configure an already opened port.
- Packet structure is same as OPEN. */
-
-/*****************************************************************************
-********************************* **********************************
-********************************* MOPEN **********************************
-********************************* **********************************
-*****************************************************************************/
-
-/* (Driver->RIO,in-band)
-
- MOPEN is sent from the driver to open a port attached to a modem. (in-band)
- Packet structure is same as OPEN. */
-
-/*****************************************************************************
-********************************* **********************************
-********************************* CLOSE **********************************
-********************************* **********************************
-*****************************************************************************/
-
-/* (Driver->RIO,in-band)
-
- CLOSE is sent from the driver to close a previously opened port.
- No parameters.
- */
-#if 0
-#define PKT_Cmd (PKT_Data+0) /* Command code */
-#endif
-/*****************************************************************************
-********************************* *********************************
-********************************* WFLUSH *********************************
-********************************* *********************************
-*****************************************************************************/
-
-/* (Driver->RIO,pre-emptive)
-
- WFLUSH is sent pre-emptively from the driver to flush the write buffers and
- packets of a port. (pre-emptive)
-
- WFLUSH is also sent in-band from the driver to a port as a marker to end
- write flushing previously started by a pre-emptive WFLUSH packet. (in-band)
- */
-#if 0
-#define PKT_Cmd (PKT_Data+0) /* Command code */
-#endif
-#define PKT_PhbNum (PKT_Data+1) /* Port number wrt RTA */
-
-/*****************************************************************************
-********************************* *********************************
-********************************* RFLUSH *********************************
-********************************* *********************************
-*****************************************************************************/
-
-/* (Driver->RIO,pre-emptive)
-
- RFLUSH is sent pre-emptively from the driver to flush the read buffers and
- packets of a port.
- */
-#if 0
-#define PKT_Cmd (PKT_Data+0) /* Command code */
-#define PKT_PhbNum (PKT_Data+1) /* Port number wrt RTA */
-#endif
-
-/*****************************************************************************
-********************************* *********************************
-********************************* RESUME *********************************
-********************************* *********************************
-*****************************************************************************/
-
-/* (Driver->RIO,pre-emptive)
-
- RESUME is sent pre-emptively from the driver to cause a port to resume
- transmission of data if blocked by XOFF. (as if XON had been received)
- */
-#if 0
-#define PKT_Cmd (PKT_Data+0) /* Command code */
-#define PKT_PhbNum (PKT_Data+1) /* Port number wrt RTA */
-#endif
-
-/*****************************************************************************
-********************************* *********************************
-********************************* SBREAK *********************************
-********************************* *********************************
-*****************************************************************************/
-
-/* (Driver->RIO,in-band)
-
- SBREAK is sent in-band from the driver to a port to suspend data and start
- break signal transmission.
-
- If the break delay is 0, the break signal will be acknowledged with a
- RUP_COMMAND, COMPLETE packet and continue until an EBREAK packet is received.
-
- Otherwise, there is no acknowledgement and the break signal will last for the
- specified number of mS.
- */
-#if 0
-#define PKT_Cmd (PKT_Data+0) /* Command code */
-#endif
-#define PKT_BreakDelay (PKT_Data+1) /* Break delay in mS */
-
-/*****************************************************************************
-********************************* *********************************
-********************************* EBREAK *********************************
-********************************* *********************************
-*****************************************************************************/
-
-/* (Driver->RIO,in-band)
-
- EBREAK is sent in-band from the driver to a port to stop transmission of a
- break signal.
-
- No parameters. */
-
-/*****************************************************************************
-********************************* ********************************
-********************************* SUSPEND ********************************
-********************************* ********************************
-*****************************************************************************/
-
-/* (Driver->RIO,pre-emptive)
-
- SUSPEND is sent pre-emptively from the driver to cause a port to suspend
- transmission of data. (as if XOFF had been received)
- */
-#if 0
-#define PKT_Cmd (PKT_Data+0) /* Command code */
-#define PKT_PhbNum (PKT_Data+1) /* Port number wrt RTA */
-#endif
-
-/*****************************************************************************
-********************************* *********************************
-********************************* FCLOSE *********************************
-********************************* *********************************
-*****************************************************************************/
-
-/* (Driver->RIO,pre-emptive)
-
- FCLOSE is sent pre-emptively from the driver to force close a port.
- A force close flushes receive and transmit queues, and also lowers all output
- modem signals if the COR5_HUPCL (Hang Up On Close) flag is set.
- */
-#if 0
-#define PKT_Cmd (PKT_Data+0) /* Command code */
-#define PKT_PhbNum (PKT_Data+1) /* Port number wrt RTA */
-#endif
-
-/*****************************************************************************
-********************************* *********************************
-********************************* XPRINT *********************************
-********************************* *********************************
-*****************************************************************************/
-
-/* (Driver->RIO,in-band)
-
- XPRINT is sent as a normal I/O data packet except that the PKT_CMD_BIT of
- the "len" field is set, and the first "data" byte is XPRINT.
-
- The I/O data in the XPRINT packet will contain the following:
- - Transparent Print Start Sequence
- - Transparent Print Data
- - Transparent Print Stop Sequence.
- */
-#if 0
-#define PKT_Cmd (PKT_Data+0) /* Command code */
-#define PKT_PhbNum (PKT_Data+1) /* Port number wrt RTA */
-#endif
-
-/*****************************************************************************
-********************************** **********************************
-********************************** MBIS **********************************
-********************************** **********************************
-*****************************************************************************/
-
-/* (Driver->RIO,pre-emptive)
-
- MBIS is sent pre-emptively from the driver to set a port's modem signals.
- */
-#if 0
-#define PKT_Cmd (PKT_Data+0) /* Command code */
-#define PKT_PhbNum (PKT_Data+1) /* Port number wrt RTA */
-#endif
-#define PKT_ModemSet (PKT_Data+4) /* Modem set signals mask */
-
-/* ModemSet definitions... */
-#define MBIS_RTS 0x01 /* RTS modem signal */
-#define MBIS_DTR 0x02 /* DTR modem signal */
-
-/*****************************************************************************
-********************************** **********************************
-********************************** MBIC **********************************
-********************************** **********************************
-*****************************************************************************/
-
-/* (Driver->RIO,pre-emptive)
-
- MBIC is sent pre-emptively from the driver to clear a port's modem signals.
- */
-#if 0
-#define PKT_Cmd (PKT_Data+0) /* Command code */
-#define PKT_PhbNum (PKT_Data+1) /* Port number wrt RTA */
-#endif
-
-#define PKT_ModemClear (PKT_Data+4) /* Modem clear signals mask */
-
-/* ModemClear definitions... */
-#define MBIC_RTS 0x01 /* RTS modem signal */
-#define MBIC_DTR 0x02 /* DTR modem signal */
-
-/*****************************************************************************
-********************************** **********************************
-********************************** MSET **********************************
-********************************** **********************************
-*****************************************************************************/
-
-/* (Driver->RIO,pre-emptive)
-
- MSET is sent pre-emptively from the driver to set/clear a port's modem signals. */
-#if 0
-#define PKT_Cmd (PKT_Data+0) /* Command code */
-#define PKT_PhbNum (PKT_Data+1) /* Port number wrt RTA */
-#endif
-
-#define PKT_ModemSet (PKT_Data+4) /* Modem set signals mask */
-
-/* ModemSet definitions... */
-#define MSET_RTS 0x01 /* RTS modem signal */
-#define MSET_DTR 0x02 /* DTR modem signal */
-
-/*****************************************************************************
-********************************* *********************************
-********************************* PCLOSE *********************************
-********************************* *********************************
-*****************************************************************************/
-
-/* (Driver->RIO,in-band)
-
- PCLOSE is sent from the driver to pseudo close a previously opened port.
-
- The port will close when all data has been sent/received, however, the
- port's transmit / receive and modem signals will be left enabled and the
- port marked internally as Pseudo Closed. */
-
-#define PKT_Cmd (PKT_Data+0) /* Command code */
-
-/*****************************************************************************
-********************************** **********************************
-********************************** MGET **********************************
-********************************** **********************************
-*****************************************************************************/
-
-/* (Driver->RIO,pre-emptive)
-
- MGET is sent pre-emptively from the driver to request the port's current modem signals. */
-
-#define PKT_Cmd (PKT_Data+0) /* Command code */
-#define PKT_PhbNum (PKT_Data+1) /* Port number wrt RTA */
-
-/*****************************************************************************
-********************************* ********************************
-********************************* MEMDUMP ********************************
-********************************* ********************************
-*****************************************************************************/
-
-/* (Driver->RIO,pre-emptive)
-
- MEMDUMP is sent pre-emptively from the driver to request a dump of 32 bytes
- of the specified port's RTA address space.
- */
-#if 0
-#define PKT_Cmd (PKT_Data+0) /* Command code */
-#endif
-#define PKT_PhbNum (PKT_Data+1) /* Port number wrt RTA */
-#define PKT_SubCmd (PKT_Data+5) /* Sub Command */
-#define PKT_Address (PKT_Data+6) /* Requested address */
-
-/*****************************************************************************
-****************************** *****************************
-****************************** READ_REGISTER *****************************
-****************************** *****************************
-*****************************************************************************/
-
-/* (Driver->RIO,pre-emptive)
-
- READ_REGISTER is sent pre-emptively from the driver to request the contents
- of the CD1400 register specified in address.
- */
-#if 0
-#define PKT_Cmd (PKT_Data+0) /* Command code */
-#endif
-#define PKT_PhbNum (PKT_Data+1) /* Port number wrt RTA */
-#define PKT_SubCmd (PKT_Data+5) /* Sub Command */
-#define PKT_Address (PKT_Data+6) /* Requested address */
-
-/*****************************************************************************
-************************ **************************
-************************ COMMAND_RUP - COMPLETE **************************
-************************ **************************
-*****************************************************************************/
-
-/* (RIO->Driver,pre-emptive)
-
- COMMAND_RUP - COMPLETE is sent in response to all port I/O control command
- packets, except MEMDUMP and READ_REGISTER.
- */
-#if 0
-#define PKT_Cmd (PKT_Data+0) /* Command code */
-#endif
-#define PKT_PhbNum (PKT_Data+1) /* Port number wrt RTA */
-#define PKT_Cmd2 (PKT_Data+2) /* Command code copy */
-#define PKT_ModemStatus (PKT_Data+3) /* Modem signal status */
-#define PKT_PortStatus (PKT_Data+4) /* Port signal status */
-#define PKT_SubCmd (PKT_Data+5) /* Sub Command */
-
-/* ModemStatus definitions... */
-#define MODEM_DSR 0x80 /* Data Set Ready modem state */
-#define MODEM_CTS 0x40 /* Clear To Send modem state */
-#define MODEM_RI 0x20 /* Ring Indicate modem state */
-#define MODEM_CD 0x10 /* Carrier Detect modem state */
-#define MODEM_TSTOP 0x08 /* Transmit Stopped state */
-#define MODEM_TEMPTY 0x04 /* Transmit Empty state */
-#define MODEM_DTR 0x02 /* DTR modem output state */
-#define MODEM_RTS 0x01 /* RTS modem output state */
-
-/* PortStatus definitions... */
-#define PORT_ISOPEN 0x01 /* Port open ? */
-#define PORT_HUPCL 0x02 /* Hangup on close? */
-#define PORT_MOPENPEND 0x04 /* Modem open pending */
-#define PORT_ISPARALLEL 0x08 /* Parallel port */
-#define PORT_BREAK 0x10 /* Port on break */
-#define PORT_STATUSPEND 0020 /* Status packet pending */
-#define PORT_BREAKPEND 0x40 /* Break packet pending */
-#define PORT_MODEMPEND 0x80 /* Modem status packet pending */
-
-/*****************************************************************************
-************************ **************************
-************************ COMMAND_RUP - COMPLETE **************************
-************************ **************************
-*****************************************************************************/
-
-/* (RIO->Driver,pre-emptive)
-
- COMMAND_RUP - COMPLETE is sent in response to all port I/O control command
- packets, except MEMDUMP and READ_REGISTER.
- */
-#if 0
-#define PKT_Cmd (PKT_Data+0) /* Command code */
-#define PKT_PhbNum (PKT_Data+1) /* Port number wrt RTA */
-#define PKT_Cmd2 (PKT_Data+2) /* Command code copy */
-#endif
-#define PKT_ModemStatus (PKT_Data+3) /* Modem signal status */
-#define PKT_PortStatus (PKT_Data+4) /* Port signal status */
-#if 0
-#define PKT_SubCmd (PKT_Data+5) /* Sub Command */
-#endif
-
-/* ModemStatus definitions... */
-#define MODEM_DSR 0x80 /* Data Set Ready modem state */
-#define MODEM_CTS 0x40 /* Clear To Send modem state */
-#define MODEM_RI 0x20 /* Ring Indicate modem state */
-#define MODEM_CD 0x10 /* Carrier Detect modem state */
-#define MODEM_TSTOP 0x08 /* Transmit Stopped state */
-#define MODEM_TEMPTY 0x04 /* Transmit Empty state */
-#define MODEM_DTR 0x02 /* DTR modem output state */
-#define MODEM_RTS 0x01 /* RTS modem output state */
-
-/* PortStatus definitions... */
-#define PORT_ISOPEN 0x01 /* Port open ? */
-#define PORT_HUPCL 0x02 /* Hangup on close? */
-#define PORT_MOPENPEND 0x04 /* Modem open pending */
-#define PORT_ISPARALLEL 0x08 /* Parallel port */
-#define PORT_BREAK 0x10 /* Port on break */
-#define PORT_STATUSPEND 0020 /* Status packet pending */
-#define PORT_BREAKPEND 0x40 /* Break packet pending */
-#define PORT_MODEMPEND 0x80 /* Modem status packet pending */
-
-/*****************************************************************************
-******************** ********************
-******************** COMMAND_RUP - COMPLETE - MEMDUMP ********************
-******************** ********************
-*****************************************************************************/
-
-/* (RIO->Driver,pre-emptive)
-
- COMMAND_RUP - COMPLETE - MEMDUMP is sent as an acknowledgement for a MEMDUMP
- port I/O control command packet.
- */
-#if 0
-#define PKT_Cmd (PKT_Data+0) /* Command code */
-#define PKT_PhbNum (PKT_Data+1) /* Port number wrt RTA */
-#define PKT_Cmd2 (PKT_Data+2) /* Command code copy */
-#define PKT_ModemStatus (PKT_Data+3) /* Modem signal status */
-#define PKT_PortStatus (PKT_Data+4) /* Port signal status */
-#define PKT_SubCmd (PKT_Data+5) /* Sub Command */
-#define PKT_Address (PKT_Data+6) /* Requested address */
-#endif
-#define PKT_Dump (PKT_Data+8) /* 32bytes of requested dump data */
-
-/*****************************************************************************
-***************** *****************
-***************** COMMAND_RUP - COMPLETE - READ_REGISTER *****************
-***************** *****************
-*****************************************************************************/
-
-/* (RIO->Driver,pre-emptive)
-
- COMMAND_RUP - COMPLETE - READ_REGISTER is sent as an acknowledgement for a
- READ_REGISTER port I/O control command packet.
- */
-#if 0
-#define PKT_Cmd (PKT_Data+0) /*Command code */
-#define PKT_PhbNum (PKT_Data+1) /*Port number wrt RTA */
-#define PKT_Cmd2 (PKT_Data+2) /* Command code copy */
-#endif
-#define PKT_RegisterValue (PKT_Data+3) /* Modem signal status */
-#if 0
-#define PKT_PortStatus (PKT_Data+4) /* Port signal status */
-#define PKT_SubCmd (PKT_Data+5) /* Sub Command */
-#endif
-
-/*****************************************************************************
-********************* ***********************
-********************* COMMAND_RUP - BREAK_RECEIVED ***********************
-********************* ***********************
-*****************************************************************************/
-
-/* (RIO->Driver,pre-emptive)
-
- COMMAND_RUP - BREAK_RECEIVED packets are sent when the port detects a receive BREAK signal.
- */
-#if 0
-#define PKT_Cmd (PKT_Data+0) /* Command code */
-#define PKT_PhbNum (PKT_Data+1) /* Port number wrt RTA */
-#define PKT_Cmd2 (PKT_Data+2) /* Command code copy */
-#endif
-
-/*****************************************************************************
-********************* *************************
-********************* COMMAND_RUP - MODEM_STATUS *************************
-********************* *************************
-*****************************************************************************/
-
-/* (RIO->Driver,pre-emptive)
-
- COMMAND_RUP - MODEM_STATUS packets are sent whenever the port detects a
- change in the input modem signal states.
-
- */
-#if 0
-#define PKT_Cmd (PKT_Data+0) /* Command code */
-#define PKT_PhbNum (PKT_Data+1) /* Port number wrt RTA */
-#define PKT_Cmd2 (PKT_Data+2) /* Command code copy */
-#define PKT_ModemStatus (PKT_Data+3) /* Modem signal status */
-#endif
-
-/*****************************************************************************
-************************ *************************
-************************ BOOT_RUP - BOOT_REQUEST *************************
-************************ *************************
-*****************************************************************************/
-
-/* (RIO->Driver,pre-emptive)
-
- BOOT_RUP - BOOT_REQUEST packets are sent to the Driver from RIO to request
- firmware code to load onto attached RTAs.
- */
-#if 0
-#define PKT_Cmd (PKT_Data+0) /* Command code */
-#endif
-
-/*****************************************************************************
-************************ ************************
-************************ BOOT_RUP - BOOT_SEQUENCE ************************
-************************ ************************
-*****************************************************************************/
-
-/* (Driver->RIO,pre-emptive)
-
- BOOT_RUP - BOOT_SEQUENCE packets are sent from the Driver to RIO in response
- to a BOOT_RUP - BOOT_REQUEST packet.
- */
-#if 0
-#define PKT_Cmd (PKT_Data+0) /* Command code */
-#endif
-#define PKT_NumPackets (PKT_Data+2) /* Packets required to load firmware */
-#define PKT_LoadBase (PKT_Data+4) /* RTA firmware load address */
-#define PKT_CodeSize (PKT_Data+6) /* Size of firmware in bytes */
-#define PKT_CmdString (PKT_Data+8) /* Command string */
-
-/*****************************************************************************
-************************ ***********************
-************************ BOOT_RUP - BOOT_COMPLETED ***********************
-************************ ***********************
-*****************************************************************************/
-
-/* (RIO->Driver,pre-emptive)
-
- BOOT_RUP - BOOT_COMPLETE is sent to the Driver from RIO when downloading of
- RTA firmware has completed.
- */
-#if 0
-#define PKT_Cmd (PKT_Data+0) /* Command code */
-#endif
-#define PKT_LinkNumber (PKT_Data+1) /* Link number RTA booted on */
-#define PKT_SerialNumber (PKT_Data+2) /* 4 byte serial number */
-
-/*****************************************************************************
-************************ ***********************
-************************ BOOT_RUP - Packet Request ***********************
-************************ ***********************
-*****************************************************************************/
-
-/* (RIO->Driver,pre-emptive)
-
- BOOT_RUP packet without the PKT_CMD_BIT set in the PKT->len field is sent
- from RIO to the Driver as a request for a firmware boot packet. */
-
-#define PKT_SequenceNumber (PKT_Data+0) /* Packet sequence number */
-
-/*****************************************************************************
-*********************** ***********************
-*********************** BOOT_RUP - Packet Response ***********************
-*********************** ***********************
-*****************************************************************************/
-
-/* (Driver->RIO,pre-emptive)
-
- In response to a BOOT_RUP boot packet request, the driver fills out the response
- packet with the 70 bytes of the requested sequence.
- */
-#if 0
-#define PKT_SequenceNumber (PKT_Data+0) /* Packet sequence number */
-#endif
-#define PKT_FirmwarePacket (PKT_Data+2) /* Firmware packet */
-
-/*****************************************************************************
-**************************** ****************************
-**************************** BOOT_RUP - IFOAD ****************************
-**************************** ****************************
-*****************************************************************************/
-
-/* (Driver->RIO,pre-emptive)
-
- BOOT_RUP - IFOAD packets are sent from the Driver to an RTA to cause the
- RTA to shut down and reboot.
- */
-#if 0
-#define PKT_Cmd (PKT_Data+0) /* Command code */
-#endif
-#define PKT_IfoadId1 (PKT_Data+2) /* IFOAD Id 1 */
-#define PKT_IfoadId2 (PKT_Data+3) /* IFOAD Id 2 */
-
-#define IFOADID1 0xAD
-#define IFOADID2 0xF0
-
-/*****************************************************************************
-************************** ***************************
-************************** BOOT_RUP - IDENTIFY ***************************
-************************** ***************************
-*****************************************************************************/
-
-/* (Driver->RIO,pre-emptive)
-
- BOOT_RUP - IDENTIFY packets are sent from the Driver to an RTA to cause the
- RTA to flash its LEDs for a period of time.
- */
-#if 0
-#define PKT_Cmd (PKT_Data+0) /* Command code */
-#endif
-#define PKT_IdentifyId (PKT_Data+2) /* defines pattern to flash */
-
-/*****************************************************************************
-**************************** ***************************
-**************************** BOOT_RUP - ZOMBIE ***************************
-**************************** ***************************
-*****************************************************************************/
-
-/* (Driver->RIO,pre-emptive)
-
- BOOT_RUP - ZOMBIE packets are sent from the Driver to an RTA to cause the
- RTA to shut down and flash it's LEDs.
- */
-#if 0
-#define PKT_Cmd (PKT_Data+0) /* Command code */
-#endif
-#define PKT_ZombieId1 (PKT_Data+2) /* ZOMBIE Id 1 */
-#define PKT_ZombieId2 (PKT_Data+3) /* ZOMBIE Id 2 */
-
-#define ZOMBIEID1 0x52
-#define ZOMBIEID2 0x21
-
-/*****************************************************************************
-**************************** ****************************
-**************************** BOOT_RUP - UFOAD ****************************
-**************************** ****************************
-*****************************************************************************/
-
-/* (Driver->RIO,pre-emptive)
-
- BOOT_RUP - UFOAD packets are sent from the Driver to an RTA to cause the RTA
- to ask it's neighbouring RTA to shut down and reboot.
- */
-#if 0
-#define PKT_Cmd (PKT_Data+0) /* Command code */
-#define PKT_LinkNumber (PKT_Data+1) /* Link number of RTA to UFOAD */
-#endif
-#define PKT_UfoadId1 (PKT_Data+2) /* UFOAD Id 1 */
-#define PKT_UfoadId2 (PKT_Data+3) /* UFOAD Id 2 */
-
-#define UFOADID1 0x1E
-#define UFOADID2 0x0D
-
-/*****************************************************************************
-**************************** ****************************
-**************************** BOOT_RUP - IWAIT ****************************
-**************************** ****************************
-*****************************************************************************/
-
-/* (Driver->RIO,pre-emptive)
-
- BOOT_RUP - IWAIT packets are sent from the Driver to an RTA to cause the RTA
- to pause booting on the specified link for 30 seconds.
- */
-#if 0
-#define PKT_Cmd (PKT_Data+0) /* Command code */
-#define PKT_LinkNumber (PKT_Data+1) /* Link number of RTA to UFOAD */
-#endif
-#define PKT_IwaitId1 (PKT_Data+2) /* IWAIT Id 1 */
-#define PKT_IwaitId2 (PKT_Data+3) /* IWAIT Id 2 */
-
-#define IWAITID1 0xDE
-#define IWAITID2 0xB1
-
-/*****************************************************************************
-************************ ***********************
-************************ ROUTE_RUP - ROUTE_REQUEST ***********************
-************************ ***********************
-*****************************************************************************/
-
-/* (RIO->Driver,pre-emptive)
-
- ROUTE_RUP - ROUTE_REQUEST packets are sent from a newly booted or connected
- RTA to a Driver to request an ID (RUP or unit number).
- */
-#if 0
-#define PKT_Cmd (PKT_Data+0) /* Command code */
-#endif
-#define PKT_SerialNumber (PKT_Data+2) /* 4 byte serial number */
-#define PKT_ModuleTypes (PKT_Data+6) /* RTA Module types */
-
-/* ModuleTypes definitions... */
-#define MOD_BLANK 0x0F /* Blank plate attached */
-#define MOD_RS232DB25 0x00 /* RS232 DB25 connector */
-#define MOD_RS232RJ45 0x01 /* RS232 RJ45 connector */
-#define MOD_RS422DB25 0x02 /* RS422 DB25 connector */
-#define MOD_RS485DB25 0x03 /* RS485 DB25 connector */
-#define MOD_PARALLEL 0x04 /* Centronics parallel */
-
-#define MOD2 0x08 /* Set to indicate Rev2 module */
-
-/*****************************************************************************
-************************* *************************
-************************* ROUTE_RUP - ROUTE_FOAD *************************
-************************* *************************
-*****************************************************************************/
-
-/* (Driver->RIO,pre-emptive)
-
- ROUTE_RUP - ROUTE_FOAD packet is sent as a response to a ROUTE_RUP - ROUTE_REQUEST
- packet to cause the RTA to "Fall Over And Die"., i.e. shutdown and reboot.
- */
-#if 0
-#define PKT_Cmd (PKT_Data+0) /* Command code */
-#endif
-#define PKT_RouteCmdString (PKT_Data+2) /* Command string */
-
-/*****************************************************************************
-*********************** ***********************
-*********************** ROUTE_RUP - ROUTE_ALLOCATE ***********************
-*********************** ***********************
-*****************************************************************************/
-
-/* (Driver->RIO,pre-emptive)
-
- ROUTE_RUP - ROUTE_ALLOCATE packet is sent as a response to a ROUTE_RUP - ROUTE_REQUEST
- packet to allocate the RTA's Id number (RUP number 1..16)
- */
-#if 0
-#define PKT_Cmd (PKT_Data+0) /* Command code */
-#endif
-#define PKT_IdNum (PKT_Data+1) /* RUP number for ports 1..8 */
-#if 0
-#define PKT_RouteCmdString (PKT_Data+2) /* Command string */
-#endif
-#define PKT_IdNum2 (PKT_Data+0x17) /* RUP number for ports 9..16 */
-
-/*****************************************************************************
-*********************** ***********************
-*********************** ROUTE_RUP - ROUTE_TOPOLOGY ***********************
-*********************** ***********************
-*****************************************************************************/
-
-/* (RIO->Driver,pre-emptive)
-
- ROUTE_RUP - ROUTE_TOPOLOGY packet is sent to inform the driver of an RTA's
- current link status.
- */
-#if 0
-#define PKT_Cmd (PKT_Data+0) /* Command code */
-#endif
-#define PKT_Link1Rup (PKT_Data+2) /* Link 1 RUP number */
-#define PKT_Link1Link (PKT_Data+3) /* Link 1 link number */
-#define PKT_Link2Rup (PKT_Data+4) /* Link 2 RUP number */
-#define PKT_Link2Link (PKT_Data+5) /* Link 2 link number */
-#define PKT_Link3Rup (PKT_Data+6) /* Link 3 RUP number */
-#define PKT_Link3Link (PKT_Data+7) /* Link 3 link number */
-#define PKT_Link4Rup (PKT_Data+8) /* Link 4 RUP number */
-#define PKT_Link4Link (PKT_Data+9) /* Link 4 link number */
-#define PKT_RtaVpdProm (PKT_Data+10) /* 32 bytes of RTA VPD PROM Contents */
-
-#endif /* _sxwinif_h */
-
-/* End of RIOWINIF.H */
+++ /dev/null
-/*
-** -----------------------------------------------------------------------------
-**
-** Perle Specialix driver for Linux
-** Ported from existing RIO Driver for SCO sources.
- *
- * (C) 1990 - 2000 Specialix International Ltd., Byfleet, Surrey, UK.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
-**
-** Module : riscos.h
-** SID : 1.2
-** Last Modified : 11/6/98 11:34:19
-** Retrieved : 11/6/98 11:34:22
-**
-** ident @(#)riscos.h 1.2
-**
-** -----------------------------------------------------------------------------
-*/
-
-#ifndef __rio_riscos_h__
-#define __rio_riscos_h__
-
-#ifdef SCCS_LABELS
-static char *_riscos_h_sccs_ = "@(#)riscos.h 1.2";
-#endif
-
-/*
-** This module used to define all those little itsy bits required for RISC/OS
-** now it's full of null macros.
-*/
-
-/*
-** RBYTE reads a byte from a location.
-** RWORD reads a word from a location.
-** WBYTE writes a byte to a location.
-** WWORD writes a word to a location.
-** RINDW reads a word through a pointer.
-** WINDW writes a word through a pointer.
-** RIOSWAB swaps the two bytes of a word, if needed.
-*/
-
-#define RIOSWAB(N) (N)
-#define WBYTE(A,V) (A)=(uchar)(V)
-#define WWORD(A,V) (A)=(ushort)(V)
-#define RBYTE(A) (uchar)(A)
-#define RWORD(A) (ushort)(A)
-#define RINDW(A) (*(ushort *)(A))
-#define WINDW(A,V) (*(ushort *)(A)=(ushort)(V))
-
-#endif /* __rio_riscos_h__ */
+++ /dev/null
-
-/****************************************************************************
- ******* *******
- ******* R T A H A R D W A R E
- ******* *******
- ****************************************************************************
-
- Author : Ian Nandhra
- Date :
-
- *
- * (C) 1990 - 2000 Specialix International Ltd., Byfleet, Surrey, UK.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
-
- Version : 0.01
-
-
- Mods
- ----------------------------------------------------------------------------
- Date By Description
- ----------------------------------------------------------------------------
-
- ***************************************************************************/
-
-#ifndef lint
-#ifdef SCCS_LABELS
-static char *_rio_rtahw_h_sccs = "@(#)rtahw.h 1.5";
-#endif
-#endif
-
-#define WATCHDOG_ADDR ((unsigned short *)0x7a00)
-#define RTA_LED_ADDR ((unsigned short *)0x7c00)
-#define SERIALNUM_ADDR ((unsigned char *)0x7809)
-#define LATCH_ADDR ((unsigned char *)0x7800)
-
-/*
-** Here we define where the cd1400 chips are in memory.
-*/
-#define CD1400_ONE_ADDR (0x7300)
-#define CD1400_TWO_ADDR (0x7200)
-#define CD1400_THREE_ADDR (0x7100)
-#define CD1400_FOUR_ADDR (0x7000)
-
-/*
-** Define the different types of modules we can have
-*/
-enum module {
- MOD_BLANK = 0x0f, /* Blank plate attached */
- MOD_RS232DB25 = 0x00, /* RS232 DB25 connector */
- MOD_RS232RJ45 = 0x01, /* RS232 RJ45 connector */
- MOD_RS422DB25 = 0x02, /* RS422 DB25 connector */
- MOD_RS485DB25 = 0x03, /* RS485 DB25 connector */
- MOD_PARALLEL = 0x04 /* Centronics parallel */
-};
-
-#define TYPE_HOST 0
-#define TYPE_RTA8 1
-#define TYPE_RTA16 2
-
-#define WATCH_DOG WATCHDOG_ADDR
-
-/*********** end of file ***********/
+++ /dev/null
-/****************************************************************************
- ******* *******
- ******* RUPSTAT
- ******* *******
- ****************************************************************************
-
- Author : Jeremy Rolls
- Date :
-
- *
- * (C) 1990 - 2000 Specialix International Ltd., Byfleet, Surrey, UK.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
-
- Version : 0.01
-
-
- Mods
- ----------------------------------------------------------------------------
- Date By Description
- ----------------------------------------------------------------------------
-
- ***************************************************************************/
-
-#ifndef _rupstat_h
-#define _rupstat_h
-
-#ifndef lint
-#ifdef SCCS_LABELS
-static char *_rio_rupstat_h_sccs = "@(#)rupstat.h 1.1";
-#endif
-#endif
-
-#define STATUS_SYNC 0
-#define STATUS_REQ_TOP 1
-#define STATUS_TOPOLOGY 2
-
-#endif
+++ /dev/null
-/*
-** File: selftest.h
-**
-** Author: David Dix
-**
-** Created: 15th March 1993
-**
-** Last modified: 94/06/14
-**
- *
- * (C) 1990 - 2000 Specialix International Ltd., Byfleet, Surrey, UK.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
-*/
-
-#ifndef _selftests_h_
-#define _selftests_h_
-
-/*
-** Selftest identifier...
-*/
-#define SELFTEST_MAGIC 0x5a5a
-
-/*
-** This is the structure of the packet that is sent back after each
-** selftest on a booting RTA.
-*/
-typedef struct {
- short magic; /* Identifies packet type */
- int test; /* Test number, see below */
- unsigned int result; /* Result value */
- unsigned int dataIn;
- unsigned int dataOut;
-} selftestStruct;
-
-/*
-** The different tests are identified by the following data values.
-*/
-enum test {
- TESTS_COMPLETE = 0x00,
- MEMTEST_ADDR = 0x01,
- MEMTEST_BIT = 0x02,
- MEMTEST_FILL = 0x03,
- MEMTEST_DATABUS = 0x04,
- MEMTEST_ADDRBUS = 0x05,
- CD1400_INIT = 0x10,
- CD1400_LOOP = 0x11,
- CD1400_INTERRUPT = 0x12
-};
-
-enum result {
- E_PORT = 0x10,
- E_TX = 0x11,
- E_RX = 0x12,
- E_EXCEPT = 0x13,
- E_COMPARE = 0x14,
- E_MODEM = 0x15,
- E_TIMEOUT = 0x16,
- E_INTERRUPT = 0x17
-};
-#endif /* _selftests_h_ */
+++ /dev/null
-
-/****************************************************************************
- ******* *******
- ******* S Y S T E M M A P H E A D E R
- ******* *******
- ****************************************************************************
-
- Author : Ian Nandhra
- Date :
-
- *
- * (C) 1990 - 2000 Specialix International Ltd., Byfleet, Surrey, UK.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
-
- Version : 0.01
-
-
- Mods
- ----------------------------------------------------------------------------
- Date By Description
- ----------------------------------------------------------------------------
-
- ***************************************************************************/
-
-#ifndef lint
-#ifdef SCCS_LABELS
-static char *_rio_sysmap_h_sccs = "@(#)sysmap.h 1.1";
-#endif
-#endif
-
-#define SYSTEM_MAP_LEN 64 /* Len of System Map array */
-
-
-typedef struct SYS_MAP SYS_MAP;
-typedef struct SYS_MAP_LINK SYS_MAP_LINK;
-
-struct SYS_MAP_LINK {
- short id; /* Unit Id */
- short link; /* Id's Link */
- short been_here; /* Used by map_gen */
-};
-
-struct SYS_MAP {
- char serial_num[4];
- SYS_MAP_LINK link[4];
-};
-
-
-/*********** end of file ***********/
+++ /dev/null
-
-/****************************************************************************
- ******* *******
- ******* T I M E O U T S
- ******* *******
- ****************************************************************************
-
- Author : Ian Nandhra
- Date :
-
- *
- * (C) 1990 - 2000 Specialix International Ltd., Byfleet, Surrey, UK.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
-
- Version : 0.01
-
-
- Mods
- ----------------------------------------------------------------------------
- Date By Description
- ----------------------------------------------------------------------------
-
- ***************************************************************************/
-
-#ifndef lint
-#ifdef SCCS_LABELS
-static char *_rio_defaults_h_sccs = "@(#)timeouts.h 1.3";
-#endif
-#endif
-
-#define MILLISECOND (int) (1000/64) /* 15.625 low ticks */
-#define SECOND (int) 15625 /* Low priority ticks */
-
-#define TX_TIMEOUT (int) (200 * MILLISECOND)
-
-
-/*********** end of file ***********/
static int set_interface(struct slgt_info *info, int if_mode)
{
unsigned long flags;
- unsigned char val;
+ unsigned short val;
DBGINFO(("%s set_interface=%x)\n", info->device_name, if_mode));
spin_lock_irqsave(&info->lock,flags);
#include <linux/kernel.h> /* printk() */
#include <linux/fs.h> /* everything... */
#include <linux/errno.h> /* error codes */
-#include <linux/delay.h> /* udelay */
#include <linux/slab.h>
#include <linux/ioport.h>
#include <linux/interrupt.h>
documented in the MCPBL0010 TPS under the Telecom Clock API section, 11.4.
alarms :
current_ref :
+received_ref_clk3a :
+received_ref_clk3b :
enable_clk3a_output :
enable_clk3b_output :
enable_clka0_output :
filter_select :
hardware_switching :
hardware_switching_mode :
-interrupt_switch :
+telclock_version :
mode_select :
refalign :
reset :
select_amcb2_transmit_clock :
select_redundant_clock :
select_ref_frequency :
-test_mode :
All sysfs interfaces are integers in hex format, i.e echo 99 > refalign
has the same effect as echo 0x99 > refalign.
return 0;
}
-ssize_t tlclk_read(struct file *filp, char __user *buf, size_t count,
+static ssize_t tlclk_read(struct file *filp, char __user *buf, size_t count,
loff_t *f_pos)
{
if (count < sizeof(struct tlclk_alarms))
return sizeof(struct tlclk_alarms);
}
-ssize_t tlclk_write(struct file *filp, const char __user *buf, size_t count,
+static ssize_t tlclk_write(struct file *filp, const char __user *buf, size_t count,
loff_t *f_pos)
{
return 0;
static DEVICE_ATTR(current_ref, S_IRUGO, show_current_ref, NULL);
-static ssize_t show_interrupt_switch(struct device *d,
+static ssize_t show_telclock_version(struct device *d,
struct device_attribute *attr, char *buf)
{
unsigned long ret_val;
unsigned long flags;
spin_lock_irqsave(&event_lock, flags);
- ret_val = inb(TLCLK_REG6);
+ ret_val = inb(TLCLK_REG5);
spin_unlock_irqrestore(&event_lock, flags);
return sprintf(buf, "0x%lX\n", ret_val);
}
-static DEVICE_ATTR(interrupt_switch, S_IRUGO,
- show_interrupt_switch, NULL);
+static DEVICE_ATTR(telclock_version, S_IRUGO,
+ show_telclock_version, NULL);
static ssize_t show_alarms(struct device *d,
struct device_attribute *attr, char *buf)
static DEVICE_ATTR(alarms, S_IRUGO, show_alarms, NULL);
+static ssize_t store_received_ref_clk3a(struct device *d,
+ struct device_attribute *attr, const char *buf, size_t count)
+{
+ unsigned long tmp;
+ unsigned char val;
+ unsigned long flags;
+
+ sscanf(buf, "%lX", &tmp);
+ dev_dbg(d, ": tmp = 0x%lX\n", tmp);
+
+ val = (unsigned char)tmp;
+ spin_lock_irqsave(&event_lock, flags);
+ SET_PORT_BITS(TLCLK_REG1, 0xef, val);
+ spin_unlock_irqrestore(&event_lock, flags);
+
+ return strnlen(buf, count);
+}
+
+static DEVICE_ATTR(received_ref_clk3a, S_IWUGO, NULL,
+ store_received_ref_clk3a);
+
+
+static ssize_t store_received_ref_clk3b(struct device *d,
+ struct device_attribute *attr, const char *buf, size_t count)
+{
+ unsigned long tmp;
+ unsigned char val;
+ unsigned long flags;
+
+ sscanf(buf, "%lX", &tmp);
+ dev_dbg(d, ": tmp = 0x%lX\n", tmp);
+
+ val = (unsigned char)tmp;
+ spin_lock_irqsave(&event_lock, flags);
+ SET_PORT_BITS(TLCLK_REG1, 0xef, val << 1);
+ spin_unlock_irqrestore(&event_lock, flags);
+
+ return strnlen(buf, count);
+}
+
+static DEVICE_ATTR(received_ref_clk3b, S_IWUGO, NULL,
+ store_received_ref_clk3b);
+
+
static ssize_t store_enable_clk3b_output(struct device *d,
struct device_attribute *attr, const char *buf, size_t count)
{
static DEVICE_ATTR(enable_clka0_output, S_IWUGO, NULL,
store_enable_clka0_output);
-static ssize_t store_test_mode(struct device *d,
- struct device_attribute *attr, const char *buf, size_t count)
-{
- unsigned long flags;
- unsigned long tmp;
- unsigned char val;
-
- sscanf(buf, "%lX", &tmp);
- dev_dbg(d, "tmp = 0x%lX\n", tmp);
-
- val = (unsigned char)tmp;
- spin_lock_irqsave(&event_lock, flags);
- SET_PORT_BITS(TLCLK_REG4, 0xfd, 2);
- spin_unlock_irqrestore(&event_lock, flags);
-
- return strnlen(buf, count);
-}
-
-static DEVICE_ATTR(test_mode, S_IWUGO, NULL, store_test_mode);
-
static ssize_t store_select_amcb2_transmit_clock(struct device *d,
struct device_attribute *attr, const char *buf, size_t count)
{
SET_PORT_BITS(TLCLK_REG3, 0xc7, 0x38);
switch (val) {
case CLK_8_592MHz:
- SET_PORT_BITS(TLCLK_REG0, 0xfc, 1);
+ SET_PORT_BITS(TLCLK_REG0, 0xfc, 2);
break;
case CLK_11_184MHz:
SET_PORT_BITS(TLCLK_REG0, 0xfc, 0);
SET_PORT_BITS(TLCLK_REG0, 0xfc, 3);
break;
case CLK_44_736MHz:
- SET_PORT_BITS(TLCLK_REG0, 0xfc, 2);
+ SET_PORT_BITS(TLCLK_REG0, 0xfc, 1);
break;
}
} else
dev_dbg(d, "tmp = 0x%lX\n", tmp);
spin_lock_irqsave(&event_lock, flags);
SET_PORT_BITS(TLCLK_REG0, 0xf7, 0);
- udelay(2);
SET_PORT_BITS(TLCLK_REG0, 0xf7, 0x08);
- udelay(2);
SET_PORT_BITS(TLCLK_REG0, 0xf7, 0);
spin_unlock_irqrestore(&event_lock, flags);
static struct attribute *tlclk_sysfs_entries[] = {
&dev_attr_current_ref.attr,
- &dev_attr_interrupt_switch.attr,
+ &dev_attr_telclock_version.attr,
&dev_attr_alarms.attr,
+ &dev_attr_received_ref_clk3a.attr,
+ &dev_attr_received_ref_clk3b.attr,
&dev_attr_enable_clk3a_output.attr,
&dev_attr_enable_clk3b_output.attr,
&dev_attr_enable_clkb1_output.attr,
&dev_attr_enable_clka1_output.attr,
&dev_attr_enable_clkb0_output.attr,
&dev_attr_enable_clka0_output.attr,
- &dev_attr_test_mode.attr,
&dev_attr_select_amcb1_transmit_clock.attr,
&dev_attr_select_amcb2_transmit_clock.attr,
&dev_attr_select_redundant_clock.attr,
#include <linux/slab.h>
#include <linux/cpu.h>
#include <linux/completion.h>
+#include <linux/mutex.h>
#define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_CORE, "cpufreq-core", msg)
static LIST_HEAD(cpufreq_governor_list);
-static DECLARE_MUTEX (cpufreq_governor_sem);
+static DEFINE_MUTEX (cpufreq_governor_mutex);
struct cpufreq_policy * cpufreq_cpu_get(unsigned int cpu)
{
return -EINVAL;
} else {
struct cpufreq_governor *t;
- down(&cpufreq_governor_sem);
+ mutex_lock(&cpufreq_governor_mutex);
if (!cpufreq_driver || !cpufreq_driver->target)
goto out;
list_for_each_entry(t, &cpufreq_governor_list, governor_list) {
if (!strnicmp(str_governor,t->name,CPUFREQ_NAME_LEN)) {
*governor = t;
- up(&cpufreq_governor_sem);
+ mutex_unlock(&cpufreq_governor_mutex);
return 0;
}
}
out:
- up(&cpufreq_governor_sem);
+ mutex_unlock(&cpufreq_governor_mutex);
}
return -EINVAL;
}
policy->cpu = cpu;
policy->cpus = cpumask_of_cpu(cpu);
- init_MUTEX_LOCKED(&policy->lock);
+ mutex_init(&policy->lock);
+ mutex_lock(&policy->lock);
init_completion(&policy->kobj_unregister);
INIT_WORK(&policy->update, handle_update, (void *)(long)cpu);
ret = cpufreq_driver->init(policy);
if (ret) {
dprintk("initialization failed\n");
+ mutex_unlock(&policy->lock);
goto err_out;
}
strlcpy(policy->kobj.name, "cpufreq", KOBJ_NAME_LEN);
ret = kobject_register(&policy->kobj);
- if (ret)
+ if (ret) {
+ mutex_unlock(&policy->lock);
goto err_out_driver_exit;
-
+ }
/* set up files for this cpu device */
drv_attr = cpufreq_driver->attr;
while ((drv_attr) && (*drv_attr)) {
spin_unlock_irqrestore(&cpufreq_driver_lock, flags);
policy->governor = NULL; /* to assure that the starting sequence is
* run in cpufreq_set_policy */
- up(&policy->lock);
+ mutex_unlock(&policy->lock);
/* set default policy */
spin_unlock_irqrestore(&cpufreq_driver_lock, flags);
#endif
- down(&data->lock);
+ mutex_lock(&data->lock);
if (cpufreq_driver->target)
__cpufreq_governor(data, CPUFREQ_GOV_STOP);
- up(&data->lock);
+ mutex_unlock(&data->lock);
kobject_unregister(&data->kobj);
unsigned int ret = 0;
if (policy) {
- down(&policy->lock);
+ mutex_lock(&policy->lock);
ret = policy->cur;
- up(&policy->lock);
+ mutex_unlock(&policy->lock);
cpufreq_cpu_put(policy);
}
if (!cpufreq_driver->get)
goto out;
- down(&policy->lock);
+ mutex_lock(&policy->lock);
ret = cpufreq_driver->get(cpu);
}
}
- up(&policy->lock);
+ mutex_unlock(&policy->lock);
out:
cpufreq_cpu_put(policy);
if (!policy)
return -EINVAL;
- down(&policy->lock);
+ mutex_lock(&policy->lock);
ret = __cpufreq_driver_target(policy, target_freq, relation);
- up(&policy->lock);
+ mutex_unlock(&policy->lock);
cpufreq_cpu_put(policy);
if (!policy)
return -EINVAL;
- down(&policy->lock);
+ mutex_lock(&policy->lock);
ret = __cpufreq_governor(policy, event);
- up(&policy->lock);
+ mutex_unlock(&policy->lock);
cpufreq_cpu_put(policy);
if (!governor)
return -EINVAL;
- down(&cpufreq_governor_sem);
+ mutex_lock(&cpufreq_governor_mutex);
list_for_each_entry(t, &cpufreq_governor_list, governor_list) {
if (!strnicmp(governor->name,t->name,CPUFREQ_NAME_LEN)) {
- up(&cpufreq_governor_sem);
+ mutex_unlock(&cpufreq_governor_mutex);
return -EBUSY;
}
}
list_add(&governor->governor_list, &cpufreq_governor_list);
- up(&cpufreq_governor_sem);
+ mutex_unlock(&cpufreq_governor_mutex);
return 0;
}
if (!governor)
return;
- down(&cpufreq_governor_sem);
+ mutex_lock(&cpufreq_governor_mutex);
list_del(&governor->governor_list);
- up(&cpufreq_governor_sem);
+ mutex_unlock(&cpufreq_governor_mutex);
return;
}
EXPORT_SYMBOL_GPL(cpufreq_unregister_governor);
if (!cpu_policy)
return -EINVAL;
- down(&cpu_policy->lock);
+ mutex_lock(&cpu_policy->lock);
memcpy(policy, cpu_policy, sizeof(struct cpufreq_policy));
- up(&cpu_policy->lock);
+ mutex_unlock(&cpu_policy->lock);
cpufreq_cpu_put(cpu_policy);
return -EINVAL;
/* lock this CPU */
- down(&data->lock);
+ mutex_lock(&data->lock);
ret = __cpufreq_set_policy(data, policy);
data->user_policy.min = data->min;
data->user_policy.policy = data->policy;
data->user_policy.governor = data->governor;
- up(&data->lock);
+ mutex_unlock(&data->lock);
cpufreq_cpu_put(data);
return ret;
if (!data)
return -ENODEV;
- down(&data->lock);
+ mutex_lock(&data->lock);
dprintk("updating policy for CPU %u\n", cpu);
memcpy(&policy,
policy.policy = data->user_policy.policy;
policy.governor = data->user_policy.governor;
+ /* BIOS might change freq behind our back
+ -> ask driver for current freq and notify governors about a change */
+ if (cpufreq_driver->get) {
+ policy.cur = cpufreq_driver->get(cpu);
+ if (data->cur != policy.cur)
+ cpufreq_out_of_sync(cpu, data->cur, policy.cur);
+ }
+
ret = __cpufreq_set_policy(data, &policy);
- up(&data->lock);
+ mutex_unlock(&data->lock);
cpufreq_cpu_put(data);
return ret;
#include <linux/jiffies.h>
#include <linux/kernel_stat.h>
#include <linux/percpu.h>
-
+#include <linux/mutex.h>
/*
* dbs is used in this file as a shortform for demandbased switching
* It helps to keep variable names smaller, simpler
static unsigned int dbs_enable; /* number of CPUs using this policy */
-static DECLARE_MUTEX (dbs_sem);
+static DEFINE_MUTEX (dbs_mutex);
static DECLARE_WORK (dbs_work, do_dbs_timer, NULL);
struct dbs_tuners {
if (ret != 1 )
return -EINVAL;
- down(&dbs_sem);
+ mutex_lock(&dbs_mutex);
dbs_tuners_ins.sampling_down_factor = input;
- up(&dbs_sem);
+ mutex_unlock(&dbs_mutex);
return count;
}
int ret;
ret = sscanf (buf, "%u", &input);
- down(&dbs_sem);
+ mutex_lock(&dbs_mutex);
if (ret != 1 || input > MAX_SAMPLING_RATE || input < MIN_SAMPLING_RATE) {
- up(&dbs_sem);
+ mutex_unlock(&dbs_mutex);
return -EINVAL;
}
dbs_tuners_ins.sampling_rate = input;
- up(&dbs_sem);
+ mutex_unlock(&dbs_mutex);
return count;
}
int ret;
ret = sscanf (buf, "%u", &input);
- down(&dbs_sem);
+ mutex_lock(&dbs_mutex);
if (ret != 1 || input > MAX_FREQUENCY_UP_THRESHOLD ||
input < MIN_FREQUENCY_UP_THRESHOLD ||
input <= dbs_tuners_ins.down_threshold) {
- up(&dbs_sem);
+ mutex_unlock(&dbs_mutex);
return -EINVAL;
}
dbs_tuners_ins.up_threshold = input;
- up(&dbs_sem);
+ mutex_unlock(&dbs_mutex);
return count;
}
int ret;
ret = sscanf (buf, "%u", &input);
- down(&dbs_sem);
+ mutex_lock(&dbs_mutex);
if (ret != 1 || input > MAX_FREQUENCY_DOWN_THRESHOLD ||
input < MIN_FREQUENCY_DOWN_THRESHOLD ||
input >= dbs_tuners_ins.up_threshold) {
- up(&dbs_sem);
+ mutex_unlock(&dbs_mutex);
return -EINVAL;
}
dbs_tuners_ins.down_threshold = input;
- up(&dbs_sem);
+ mutex_unlock(&dbs_mutex);
return count;
}
if ( input > 1 )
input = 1;
- down(&dbs_sem);
+ mutex_lock(&dbs_mutex);
if ( input == dbs_tuners_ins.ignore_nice ) { /* nothing to do */
- up(&dbs_sem);
+ mutex_unlock(&dbs_mutex);
return count;
}
dbs_tuners_ins.ignore_nice = input;
j_dbs_info->prev_cpu_idle_up = get_cpu_idle_time(j);
j_dbs_info->prev_cpu_idle_down = j_dbs_info->prev_cpu_idle_up;
}
- up(&dbs_sem);
+ mutex_unlock(&dbs_mutex);
return count;
}
/* no need to test here if freq_step is zero as the user might actually
* want this, they would be crazy though :) */
- down(&dbs_sem);
+ mutex_lock(&dbs_mutex);
dbs_tuners_ins.freq_step = input;
- up(&dbs_sem);
+ mutex_unlock(&dbs_mutex);
return count;
}
static void do_dbs_timer(void *data)
{
int i;
- down(&dbs_sem);
+ mutex_lock(&dbs_mutex);
for_each_online_cpu(i)
dbs_check_cpu(i);
schedule_delayed_work(&dbs_work,
usecs_to_jiffies(dbs_tuners_ins.sampling_rate));
- up(&dbs_sem);
+ mutex_unlock(&dbs_mutex);
}
static inline void dbs_timer_init(void)
if (this_dbs_info->enable) /* Already enabled */
break;
- down(&dbs_sem);
+ mutex_lock(&dbs_mutex);
for_each_cpu_mask(j, policy->cpus) {
struct cpu_dbs_info_s *j_dbs_info;
j_dbs_info = &per_cpu(cpu_dbs_info, j);
dbs_timer_init();
}
- up(&dbs_sem);
+ mutex_unlock(&dbs_mutex);
break;
case CPUFREQ_GOV_STOP:
- down(&dbs_sem);
+ mutex_lock(&dbs_mutex);
this_dbs_info->enable = 0;
sysfs_remove_group(&policy->kobj, &dbs_attr_group);
dbs_enable--;
if (dbs_enable == 0)
dbs_timer_exit();
- up(&dbs_sem);
+ mutex_unlock(&dbs_mutex);
break;
case CPUFREQ_GOV_LIMITS:
- down(&dbs_sem);
+ mutex_lock(&dbs_mutex);
if (policy->max < this_dbs_info->cur_policy->cur)
__cpufreq_driver_target(
this_dbs_info->cur_policy,
__cpufreq_driver_target(
this_dbs_info->cur_policy,
policy->min, CPUFREQ_RELATION_L);
- up(&dbs_sem);
+ mutex_unlock(&dbs_mutex);
break;
}
return 0;
#include <linux/jiffies.h>
#include <linux/kernel_stat.h>
#include <linux/percpu.h>
+#include <linux/mutex.h>
/*
* dbs is used in this file as a shortform for demandbased switching
static unsigned int dbs_enable; /* number of CPUs using this policy */
-static DECLARE_MUTEX (dbs_sem);
+static DEFINE_MUTEX (dbs_mutex);
static DECLARE_WORK (dbs_work, do_dbs_timer, NULL);
struct dbs_tuners {
if (input > MAX_SAMPLING_DOWN_FACTOR || input < 1)
return -EINVAL;
- down(&dbs_sem);
+ mutex_lock(&dbs_mutex);
dbs_tuners_ins.sampling_down_factor = input;
- up(&dbs_sem);
+ mutex_unlock(&dbs_mutex);
return count;
}
int ret;
ret = sscanf (buf, "%u", &input);
- down(&dbs_sem);
+ mutex_lock(&dbs_mutex);
if (ret != 1 || input > MAX_SAMPLING_RATE || input < MIN_SAMPLING_RATE) {
- up(&dbs_sem);
+ mutex_unlock(&dbs_mutex);
return -EINVAL;
}
dbs_tuners_ins.sampling_rate = input;
- up(&dbs_sem);
+ mutex_unlock(&dbs_mutex);
return count;
}
int ret;
ret = sscanf (buf, "%u", &input);
- down(&dbs_sem);
+ mutex_lock(&dbs_mutex);
if (ret != 1 || input > MAX_FREQUENCY_UP_THRESHOLD ||
input < MIN_FREQUENCY_UP_THRESHOLD) {
- up(&dbs_sem);
+ mutex_unlock(&dbs_mutex);
return -EINVAL;
}
dbs_tuners_ins.up_threshold = input;
- up(&dbs_sem);
+ mutex_unlock(&dbs_mutex);
return count;
}
if ( input > 1 )
input = 1;
- down(&dbs_sem);
+ mutex_lock(&dbs_mutex);
if ( input == dbs_tuners_ins.ignore_nice ) { /* nothing to do */
- up(&dbs_sem);
+ mutex_unlock(&dbs_mutex);
return count;
}
dbs_tuners_ins.ignore_nice = input;
j_dbs_info->prev_cpu_idle_up = get_cpu_idle_time(j);
j_dbs_info->prev_cpu_idle_down = j_dbs_info->prev_cpu_idle_up;
}
- up(&dbs_sem);
+ mutex_unlock(&dbs_mutex);
return count;
}
static void do_dbs_timer(void *data)
{
int i;
- down(&dbs_sem);
+ mutex_lock(&dbs_mutex);
for_each_online_cpu(i)
dbs_check_cpu(i);
schedule_delayed_work(&dbs_work,
usecs_to_jiffies(dbs_tuners_ins.sampling_rate));
- up(&dbs_sem);
+ mutex_unlock(&dbs_mutex);
}
static inline void dbs_timer_init(void)
if (this_dbs_info->enable) /* Already enabled */
break;
- down(&dbs_sem);
+ mutex_lock(&dbs_mutex);
for_each_cpu_mask(j, policy->cpus) {
struct cpu_dbs_info_s *j_dbs_info;
j_dbs_info = &per_cpu(cpu_dbs_info, j);
dbs_timer_init();
}
- up(&dbs_sem);
+ mutex_unlock(&dbs_mutex);
break;
case CPUFREQ_GOV_STOP:
- down(&dbs_sem);
+ mutex_lock(&dbs_mutex);
this_dbs_info->enable = 0;
sysfs_remove_group(&policy->kobj, &dbs_attr_group);
dbs_enable--;
if (dbs_enable == 0)
dbs_timer_exit();
- up(&dbs_sem);
+ mutex_unlock(&dbs_mutex);
break;
case CPUFREQ_GOV_LIMITS:
- down(&dbs_sem);
+ mutex_lock(&dbs_mutex);
if (policy->max < this_dbs_info->cur_policy->cur)
__cpufreq_driver_target(
this_dbs_info->cur_policy,
__cpufreq_driver_target(
this_dbs_info->cur_policy,
policy->min, CPUFREQ_RELATION_L);
- up(&dbs_sem);
+ mutex_unlock(&dbs_mutex);
break;
}
return 0;
+
/*
* linux/drivers/cpufreq/cpufreq_userspace.c
*
#include <linux/types.h>
#include <linux/fs.h>
#include <linux/sysfs.h>
+#include <linux/mutex.h>
#include <asm/uaccess.h>
static unsigned int cpu_cur_freq[NR_CPUS]; /* current CPU freq */
static unsigned int cpu_set_freq[NR_CPUS]; /* CPU freq desired by userspace */
static unsigned int cpu_is_managed[NR_CPUS];
-static struct cpufreq_policy current_policy[NR_CPUS];
-static DECLARE_MUTEX (userspace_sem);
+static DEFINE_MUTEX (userspace_mutex);
#define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_GOVERNOR, "userspace", msg)
*
* Sets the CPU frequency to freq.
*/
-static int cpufreq_set(unsigned int freq, unsigned int cpu)
+static int cpufreq_set(unsigned int freq, struct cpufreq_policy *policy)
{
int ret = -EINVAL;
- dprintk("cpufreq_set for cpu %u, freq %u kHz\n", cpu, freq);
+ dprintk("cpufreq_set for cpu %u, freq %u kHz\n", policy->cpu, freq);
- down(&userspace_sem);
- if (!cpu_is_managed[cpu])
+ mutex_lock(&userspace_mutex);
+ if (!cpu_is_managed[policy->cpu])
goto err;
- cpu_set_freq[cpu] = freq;
+ cpu_set_freq[policy->cpu] = freq;
- if (freq < cpu_min_freq[cpu])
- freq = cpu_min_freq[cpu];
- if (freq > cpu_max_freq[cpu])
- freq = cpu_max_freq[cpu];
+ if (freq < cpu_min_freq[policy->cpu])
+ freq = cpu_min_freq[policy->cpu];
+ if (freq > cpu_max_freq[policy->cpu])
+ freq = cpu_max_freq[policy->cpu];
/*
* We're safe from concurrent calls to ->target() here
- * as we hold the userspace_sem lock. If we were calling
+ * as we hold the userspace_mutex lock. If we were calling
* cpufreq_driver_target, a deadlock situation might occur:
- * A: cpufreq_set (lock userspace_sem) -> cpufreq_driver_target(lock policy->lock)
- * B: cpufreq_set_policy(lock policy->lock) -> __cpufreq_governor -> cpufreq_governor_userspace (lock userspace_sem)
+ * A: cpufreq_set (lock userspace_mutex) -> cpufreq_driver_target(lock policy->lock)
+ * B: cpufreq_set_policy(lock policy->lock) -> __cpufreq_governor -> cpufreq_governor_userspace (lock userspace_mutex)
*/
- ret = __cpufreq_driver_target(¤t_policy[cpu], freq,
- CPUFREQ_RELATION_L);
+ ret = __cpufreq_driver_target(policy, freq, CPUFREQ_RELATION_L);
err:
- up(&userspace_sem);
+ mutex_unlock(&userspace_mutex);
return ret;
}
if (ret != 1)
return -EINVAL;
- cpufreq_set(freq, policy->cpu);
+ cpufreq_set(freq, policy);
return count;
}
if (!cpu_online(cpu))
return -EINVAL;
BUG_ON(!policy->cur);
- down(&userspace_sem);
+ mutex_lock(&userspace_mutex);
cpu_is_managed[cpu] = 1;
cpu_min_freq[cpu] = policy->min;
cpu_max_freq[cpu] = policy->max;
cpu_cur_freq[cpu] = policy->cur;
cpu_set_freq[cpu] = policy->cur;
sysfs_create_file (&policy->kobj, &freq_attr_scaling_setspeed.attr);
- memcpy (¤t_policy[cpu], policy, sizeof(struct cpufreq_policy));
dprintk("managing cpu %u started (%u - %u kHz, currently %u kHz)\n", cpu, cpu_min_freq[cpu], cpu_max_freq[cpu], cpu_cur_freq[cpu]);
- up(&userspace_sem);
+ mutex_unlock(&userspace_mutex);
break;
case CPUFREQ_GOV_STOP:
- down(&userspace_sem);
+ mutex_lock(&userspace_mutex);
cpu_is_managed[cpu] = 0;
cpu_min_freq[cpu] = 0;
cpu_max_freq[cpu] = 0;
cpu_set_freq[cpu] = 0;
sysfs_remove_file (&policy->kobj, &freq_attr_scaling_setspeed.attr);
dprintk("managing cpu %u stopped\n", cpu);
- up(&userspace_sem);
+ mutex_unlock(&userspace_mutex);
break;
case CPUFREQ_GOV_LIMITS:
- down(&userspace_sem);
- cpu_min_freq[cpu] = policy->min;
- cpu_max_freq[cpu] = policy->max;
- dprintk("limit event for cpu %u: %u - %u kHz, currently %u kHz, last set to %u kHz\n", cpu, cpu_min_freq[cpu], cpu_max_freq[cpu], cpu_cur_freq[cpu], cpu_set_freq[cpu]);
+ mutex_lock(&userspace_mutex);
+ dprintk("limit event for cpu %u: %u - %u kHz,"
+ "currently %u kHz, last set to %u kHz\n",
+ cpu, policy->min, policy->max,
+ cpu_cur_freq[cpu], cpu_set_freq[cpu]);
if (policy->max < cpu_set_freq[cpu]) {
- __cpufreq_driver_target(¤t_policy[cpu], policy->max,
- CPUFREQ_RELATION_H);
- } else if (policy->min > cpu_set_freq[cpu]) {
- __cpufreq_driver_target(¤t_policy[cpu], policy->min,
- CPUFREQ_RELATION_L);
- } else {
- __cpufreq_driver_target(¤t_policy[cpu], cpu_set_freq[cpu],
- CPUFREQ_RELATION_L);
+ __cpufreq_driver_target(policy, policy->max,
+ CPUFREQ_RELATION_H);
+ }
+ else if (policy->min > cpu_set_freq[cpu]) {
+ __cpufreq_driver_target(policy, policy->min,
+ CPUFREQ_RELATION_L);
}
- memcpy (¤t_policy[cpu], policy, sizeof(struct cpufreq_policy));
- up(&userspace_sem);
+ else {
+ __cpufreq_driver_target(policy, cpu_set_freq[cpu],
+ CPUFREQ_RELATION_L);
+ }
+ cpu_min_freq[cpu] = policy->min;
+ cpu_max_freq[cpu] = policy->max;
+ cpu_cur_freq[cpu] = policy->cur;
+ mutex_unlock(&userspace_mutex);
break;
}
return 0;
--- /dev/null
+#
+# EDAC Kconfig
+# Copyright (c) 2003 Linux Networx
+# Licensed and distributed under the GPL
+#
+# $Id: Kconfig,v 1.4.2.7 2005/07/08 22:05:38 dsp_llnl Exp $
+#
+
+menu 'EDAC - error detection and reporting (RAS)'
+
+config EDAC
+ tristate "EDAC core system error reporting"
+ depends on X86
+ default y
+ help
+ EDAC is designed to report errors in the core system.
+ These are low-level errors that are reported in the CPU or
+ supporting chipset: memory errors, cache errors, PCI errors,
+ thermal throttling, etc.. If unsure, select 'Y'.
+
+
+comment "Reporting subsystems"
+ depends on EDAC
+
+config EDAC_DEBUG
+ bool "Debugging"
+ depends on EDAC
+ help
+ This turns on debugging information for the entire EDAC
+ sub-system. You can insert module with "debug_level=x", current
+ there're four debug levels (x=0,1,2,3 from low to high).
+ Usually you should select 'N'.
+
+config EDAC_MM_EDAC
+ tristate "Main Memory EDAC (Error Detection And Correction) reporting"
+ depends on EDAC
+ default y
+ help
+ Some systems are able to detect and correct errors in main
+ memory. EDAC can report statistics on memory error
+ detection and correction (EDAC - or commonly referred to ECC
+ errors). EDAC will also try to decode where these errors
+ occurred so that a particular failing memory module can be
+ replaced. If unsure, select 'Y'.
+
+
+config EDAC_AMD76X
+ tristate "AMD 76x (760, 762, 768)"
+ depends on EDAC_MM_EDAC && PCI
+ help
+ Support for error detection and correction on the AMD 76x
+ series of chipsets used with the Athlon processor.
+
+config EDAC_E7XXX
+ tristate "Intel e7xxx (e7205, e7500, e7501, e7505)"
+ depends on EDAC_MM_EDAC && PCI
+ help
+ Support for error detection and correction on the Intel
+ E7205, E7500, E7501 and E7505 server chipsets.
+
+config EDAC_E752X
+ tristate "Intel e752x (e7520, e7525, e7320)"
+ depends on EDAC_MM_EDAC && PCI
+ help
+ Support for error detection and correction on the Intel
+ E7520, E7525, E7320 server chipsets.
+
+config EDAC_I82875P
+ tristate "Intel 82875p (D82875P, E7210)"
+ depends on EDAC_MM_EDAC && PCI
+ help
+ Support for error detection and correction on the Intel
+ DP82785P and E7210 server chipsets.
+
+config EDAC_I82860
+ tristate "Intel 82860"
+ depends on EDAC_MM_EDAC && PCI
+ help
+ Support for error detection and correction on the Intel
+ 82860 chipset.
+
+config EDAC_R82600
+ tristate "Radisys 82600 embedded chipset"
+ depends on EDAC_MM_EDAC
+ help
+ Support for error detection and correction on the Radisys
+ 82600 embedded chipset.
+
+choice
+ prompt "Error detecting method"
+ depends on EDAC
+ default EDAC_POLL
+
+config EDAC_POLL
+ bool "Poll for errors"
+ depends on EDAC
+ help
+ Poll the chipset periodically to detect errors.
+
+endchoice
+
+endmenu
--- /dev/null
+#
+# Makefile for the Linux kernel EDAC drivers.
+#
+# Copyright 02 Jul 2003, Linux Networx (http://lnxi.com)
+# This file may be distributed under the terms of the
+# GNU General Public License.
+#
+# $Id: Makefile,v 1.4.2.3 2005/07/08 22:05:38 dsp_llnl Exp $
+
+
+obj-$(CONFIG_EDAC_MM_EDAC) += edac_mc.o
+obj-$(CONFIG_EDAC_AMD76X) += amd76x_edac.o
+obj-$(CONFIG_EDAC_E7XXX) += e7xxx_edac.o
+obj-$(CONFIG_EDAC_E752X) += e752x_edac.o
+obj-$(CONFIG_EDAC_I82875P) += i82875p_edac.o
+obj-$(CONFIG_EDAC_I82860) += i82860_edac.o
+obj-$(CONFIG_EDAC_R82600) += r82600_edac.o
+
--- /dev/null
+/*
+ * AMD 76x Memory Controller kernel module
+ * (C) 2003 Linux Networx (http://lnxi.com)
+ * This file may be distributed under the terms of the
+ * GNU General Public License.
+ *
+ * Written by Thayne Harbaugh
+ * Based on work by Dan Hollis <goemon at anime dot net> and others.
+ * http://www.anime.net/~goemon/linux-ecc/
+ *
+ * $Id: edac_amd76x.c,v 1.4.2.5 2005/10/05 00:43:44 dsp_llnl Exp $
+ *
+ */
+
+
+#include <linux/config.h>
+#include <linux/module.h>
+#include <linux/init.h>
+
+#include <linux/pci.h>
+#include <linux/pci_ids.h>
+
+#include <linux/slab.h>
+
+#include "edac_mc.h"
+
+
+#define AMD76X_NR_CSROWS 8
+#define AMD76X_NR_CHANS 1
+#define AMD76X_NR_DIMMS 4
+
+
+/* AMD 76x register addresses - device 0 function 0 - PCI bridge */
+#define AMD76X_ECC_MODE_STATUS 0x48 /* Mode and status of ECC (32b)
+ *
+ * 31:16 reserved
+ * 15:14 SERR enabled: x1=ue 1x=ce
+ * 13 reserved
+ * 12 diag: disabled, enabled
+ * 11:10 mode: dis, EC, ECC, ECC+scrub
+ * 9:8 status: x1=ue 1x=ce
+ * 7:4 UE cs row
+ * 3:0 CE cs row
+ */
+#define AMD76X_DRAM_MODE_STATUS 0x58 /* DRAM Mode and status (32b)
+ *
+ * 31:26 clock disable 5 - 0
+ * 25 SDRAM init
+ * 24 reserved
+ * 23 mode register service
+ * 22:21 suspend to RAM
+ * 20 burst refresh enable
+ * 19 refresh disable
+ * 18 reserved
+ * 17:16 cycles-per-refresh
+ * 15:8 reserved
+ * 7:0 x4 mode enable 7 - 0
+ */
+#define AMD76X_MEM_BASE_ADDR 0xC0 /* Memory base address (8 x 32b)
+ *
+ * 31:23 chip-select base
+ * 22:16 reserved
+ * 15:7 chip-select mask
+ * 6:3 reserved
+ * 2:1 address mode
+ * 0 chip-select enable
+ */
+
+
+struct amd76x_error_info {
+ u32 ecc_mode_status;
+};
+
+
+enum amd76x_chips {
+ AMD761 = 0,
+ AMD762
+};
+
+
+struct amd76x_dev_info {
+ const char *ctl_name;
+};
+
+
+static const struct amd76x_dev_info amd76x_devs[] = {
+ [AMD761] = {.ctl_name = "AMD761"},
+ [AMD762] = {.ctl_name = "AMD762"},
+};
+
+
+/**
+ * amd76x_get_error_info - fetch error information
+ * @mci: Memory controller
+ * @info: Info to fill in
+ *
+ * Fetch and store the AMD76x ECC status. Clear pending status
+ * on the chip so that further errors will be reported
+ */
+
+static void amd76x_get_error_info (struct mem_ctl_info *mci,
+ struct amd76x_error_info *info)
+{
+ pci_read_config_dword(mci->pdev, AMD76X_ECC_MODE_STATUS,
+ &info->ecc_mode_status);
+
+ if (info->ecc_mode_status & BIT(8))
+ pci_write_bits32(mci->pdev, AMD76X_ECC_MODE_STATUS,
+ (u32) BIT(8), (u32) BIT(8));
+
+ if (info->ecc_mode_status & BIT(9))
+ pci_write_bits32(mci->pdev, AMD76X_ECC_MODE_STATUS,
+ (u32) BIT(9), (u32) BIT(9));
+}
+
+
+/**
+ * amd76x_process_error_info - Error check
+ * @mci: Memory controller
+ * @info: Previously fetched information from chip
+ * @handle_errors: 1 if we should do recovery
+ *
+ * Process the chip state and decide if an error has occurred.
+ * A return of 1 indicates an error. Also if handle_errors is true
+ * then attempt to handle and clean up after the error
+ */
+
+static int amd76x_process_error_info (struct mem_ctl_info *mci,
+ struct amd76x_error_info *info, int handle_errors)
+{
+ int error_found;
+ u32 row;
+
+ error_found = 0;
+
+ /*
+ * Check for an uncorrectable error
+ */
+ if (info->ecc_mode_status & BIT(8)) {
+ error_found = 1;
+
+ if (handle_errors) {
+ row = (info->ecc_mode_status >> 4) & 0xf;
+ edac_mc_handle_ue(mci,
+ mci->csrows[row].first_page, 0, row,
+ mci->ctl_name);
+ }
+ }
+
+ /*
+ * Check for a correctable error
+ */
+ if (info->ecc_mode_status & BIT(9)) {
+ error_found = 1;
+
+ if (handle_errors) {
+ row = info->ecc_mode_status & 0xf;
+ edac_mc_handle_ce(mci,
+ mci->csrows[row].first_page, 0, 0, row, 0,
+ mci->ctl_name);
+ }
+ }
+ return error_found;
+}
+
+/**
+ * amd76x_check - Poll the controller
+ * @mci: Memory controller
+ *
+ * Called by the poll handlers this function reads the status
+ * from the controller and checks for errors.
+ */
+
+static void amd76x_check(struct mem_ctl_info *mci)
+{
+ struct amd76x_error_info info;
+ debugf3("MC: " __FILE__ ": %s()\n", __func__);
+ amd76x_get_error_info(mci, &info);
+ amd76x_process_error_info(mci, &info, 1);
+}
+
+
+/**
+ * amd76x_probe1 - Perform set up for detected device
+ * @pdev; PCI device detected
+ * @dev_idx: Device type index
+ *
+ * We have found an AMD76x and now need to set up the memory
+ * controller status reporting. We configure and set up the
+ * memory controller reporting and claim the device.
+ */
+
+static int amd76x_probe1(struct pci_dev *pdev, int dev_idx)
+{
+ int rc = -ENODEV;
+ int index;
+ struct mem_ctl_info *mci = NULL;
+ enum edac_type ems_modes[] = {
+ EDAC_NONE,
+ EDAC_EC,
+ EDAC_SECDED,
+ EDAC_SECDED
+ };
+ u32 ems;
+ u32 ems_mode;
+
+ debugf0("MC: " __FILE__ ": %s()\n", __func__);
+
+ pci_read_config_dword(pdev, AMD76X_ECC_MODE_STATUS, &ems);
+ ems_mode = (ems >> 10) & 0x3;
+
+ mci = edac_mc_alloc(0, AMD76X_NR_CSROWS, AMD76X_NR_CHANS);
+
+ if (mci == NULL) {
+ rc = -ENOMEM;
+ goto fail;
+ }
+
+ debugf0("MC: " __FILE__ ": %s(): mci = %p\n", __func__, mci);
+
+ mci->pdev = pci_dev_get(pdev);
+ mci->mtype_cap = MEM_FLAG_RDDR;
+
+ mci->edac_ctl_cap = EDAC_FLAG_NONE | EDAC_FLAG_EC | EDAC_FLAG_SECDED;
+ mci->edac_cap = ems_mode ?
+ (EDAC_FLAG_EC | EDAC_FLAG_SECDED) : EDAC_FLAG_NONE;
+
+ mci->mod_name = BS_MOD_STR;
+ mci->mod_ver = "$Revision: 1.4.2.5 $";
+ mci->ctl_name = amd76x_devs[dev_idx].ctl_name;
+ mci->edac_check = amd76x_check;
+ mci->ctl_page_to_phys = NULL;
+
+ for (index = 0; index < mci->nr_csrows; index++) {
+ struct csrow_info *csrow = &mci->csrows[index];
+ u32 mba;
+ u32 mba_base;
+ u32 mba_mask;
+ u32 dms;
+
+ /* find the DRAM Chip Select Base address and mask */
+ pci_read_config_dword(mci->pdev,
+ AMD76X_MEM_BASE_ADDR + (index * 4),
+ &mba);
+
+ if (!(mba & BIT(0)))
+ continue;
+
+ mba_base = mba & 0xff800000UL;
+ mba_mask = ((mba & 0xff80) << 16) | 0x7fffffUL;
+
+ pci_read_config_dword(mci->pdev, AMD76X_DRAM_MODE_STATUS,
+ &dms);
+
+ csrow->first_page = mba_base >> PAGE_SHIFT;
+ csrow->nr_pages = (mba_mask + 1) >> PAGE_SHIFT;
+ csrow->last_page = csrow->first_page + csrow->nr_pages - 1;
+ csrow->page_mask = mba_mask >> PAGE_SHIFT;
+ csrow->grain = csrow->nr_pages << PAGE_SHIFT;
+ csrow->mtype = MEM_RDDR;
+ csrow->dtype = ((dms >> index) & 0x1) ? DEV_X4 : DEV_UNKNOWN;
+ csrow->edac_mode = ems_modes[ems_mode];
+ }
+
+ /* clear counters */
+ pci_write_bits32(mci->pdev, AMD76X_ECC_MODE_STATUS, (u32) (0x3 << 8),
+ (u32) (0x3 << 8));
+
+ if (edac_mc_add_mc(mci)) {
+ debugf3("MC: " __FILE__
+ ": %s(): failed edac_mc_add_mc()\n", __func__);
+ goto fail;
+ }
+
+ /* get this far and it's successful */
+ debugf3("MC: " __FILE__ ": %s(): success\n", __func__);
+ return 0;
+
+fail:
+ if (mci) {
+ if(mci->pdev)
+ pci_dev_put(mci->pdev);
+ edac_mc_free(mci);
+ }
+ return rc;
+}
+
+/* returns count (>= 0), or negative on error */
+static int __devinit amd76x_init_one(struct pci_dev *pdev,
+ const struct pci_device_id *ent)
+{
+ debugf0("MC: " __FILE__ ": %s()\n", __func__);
+
+ /* don't need to call pci_device_enable() */
+ return amd76x_probe1(pdev, ent->driver_data);
+}
+
+
+/**
+ * amd76x_remove_one - driver shutdown
+ * @pdev: PCI device being handed back
+ *
+ * Called when the driver is unloaded. Find the matching mci
+ * structure for the device then delete the mci and free the
+ * resources.
+ */
+
+static void __devexit amd76x_remove_one(struct pci_dev *pdev)
+{
+ struct mem_ctl_info *mci;
+
+ debugf0(__FILE__ ": %s()\n", __func__);
+
+ if ((mci = edac_mc_find_mci_by_pdev(pdev)) == NULL)
+ return;
+ if (edac_mc_del_mc(mci))
+ return;
+ pci_dev_put(mci->pdev);
+ edac_mc_free(mci);
+}
+
+
+static const struct pci_device_id amd76x_pci_tbl[] __devinitdata = {
+ {PCI_VEND_DEV(AMD, FE_GATE_700C), PCI_ANY_ID, PCI_ANY_ID, 0, 0,
+ AMD762},
+ {PCI_VEND_DEV(AMD, FE_GATE_700E), PCI_ANY_ID, PCI_ANY_ID, 0, 0,
+ AMD761},
+ {0,} /* 0 terminated list. */
+};
+
+MODULE_DEVICE_TABLE(pci, amd76x_pci_tbl);
+
+
+static struct pci_driver amd76x_driver = {
+ .name = BS_MOD_STR,
+ .probe = amd76x_init_one,
+ .remove = __devexit_p(amd76x_remove_one),
+ .id_table = amd76x_pci_tbl,
+};
+
+static int __init amd76x_init(void)
+{
+ return pci_register_driver(&amd76x_driver);
+}
+
+static void __exit amd76x_exit(void)
+{
+ pci_unregister_driver(&amd76x_driver);
+}
+
+module_init(amd76x_init);
+module_exit(amd76x_exit);
+
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("Linux Networx (http://lnxi.com) Thayne Harbaugh");
+MODULE_DESCRIPTION("MC support for AMD 76x memory controllers");
--- /dev/null
+/*
+ * Intel e752x Memory Controller kernel module
+ * (C) 2004 Linux Networx (http://lnxi.com)
+ * This file may be distributed under the terms of the
+ * GNU General Public License.
+ *
+ * See "enum e752x_chips" below for supported chipsets
+ *
+ * Written by Tom Zimmerman
+ *
+ * Contributors:
+ * Thayne Harbaugh at realmsys.com (?)
+ * Wang Zhenyu at intel.com
+ * Dave Jiang at mvista.com
+ *
+ * $Id: edac_e752x.c,v 1.5.2.11 2005/10/05 00:43:44 dsp_llnl Exp $
+ *
+ */
+
+
+#include <linux/config.h>
+#include <linux/module.h>
+#include <linux/init.h>
+
+#include <linux/pci.h>
+#include <linux/pci_ids.h>
+
+#include <linux/slab.h>
+
+#include "edac_mc.h"
+
+
+#ifndef PCI_DEVICE_ID_INTEL_7520_0
+#define PCI_DEVICE_ID_INTEL_7520_0 0x3590
+#endif /* PCI_DEVICE_ID_INTEL_7520_0 */
+
+#ifndef PCI_DEVICE_ID_INTEL_7520_1_ERR
+#define PCI_DEVICE_ID_INTEL_7520_1_ERR 0x3591
+#endif /* PCI_DEVICE_ID_INTEL_7520_1_ERR */
+
+#ifndef PCI_DEVICE_ID_INTEL_7525_0
+#define PCI_DEVICE_ID_INTEL_7525_0 0x359E
+#endif /* PCI_DEVICE_ID_INTEL_7525_0 */
+
+#ifndef PCI_DEVICE_ID_INTEL_7525_1_ERR
+#define PCI_DEVICE_ID_INTEL_7525_1_ERR 0x3593
+#endif /* PCI_DEVICE_ID_INTEL_7525_1_ERR */
+
+#ifndef PCI_DEVICE_ID_INTEL_7320_0
+#define PCI_DEVICE_ID_INTEL_7320_0 0x3592
+#endif /* PCI_DEVICE_ID_INTEL_7320_0 */
+
+#ifndef PCI_DEVICE_ID_INTEL_7320_1_ERR
+#define PCI_DEVICE_ID_INTEL_7320_1_ERR 0x3593
+#endif /* PCI_DEVICE_ID_INTEL_7320_1_ERR */
+
+#define E752X_NR_CSROWS 8 /* number of csrows */
+
+
+/* E752X register addresses - device 0 function 0 */
+#define E752X_DRB 0x60 /* DRAM row boundary register (8b) */
+#define E752X_DRA 0x70 /* DRAM row attribute register (8b) */
+ /*
+ * 31:30 Device width row 7
+ * 01=x8 10=x4 11=x8 DDR2
+ * 27:26 Device width row 6
+ * 23:22 Device width row 5
+ * 19:20 Device width row 4
+ * 15:14 Device width row 3
+ * 11:10 Device width row 2
+ * 7:6 Device width row 1
+ * 3:2 Device width row 0
+ */
+#define E752X_DRC 0x7C /* DRAM controller mode reg (32b) */
+ /* FIXME:IS THIS RIGHT? */
+ /*
+ * 22 Number channels 0=1,1=2
+ * 19:18 DRB Granularity 32/64MB
+ */
+#define E752X_DRM 0x80 /* Dimm mapping register */
+#define E752X_DDRCSR 0x9A /* DDR control and status reg (16b) */
+ /*
+ * 14:12 1 single A, 2 single B, 3 dual
+ */
+#define E752X_TOLM 0xC4 /* DRAM top of low memory reg (16b) */
+#define E752X_REMAPBASE 0xC6 /* DRAM remap base address reg (16b) */
+#define E752X_REMAPLIMIT 0xC8 /* DRAM remap limit address reg (16b) */
+#define E752X_REMAPOFFSET 0xCA /* DRAM remap limit offset reg (16b) */
+
+/* E752X register addresses - device 0 function 1 */
+#define E752X_FERR_GLOBAL 0x40 /* Global first error register (32b) */
+#define E752X_NERR_GLOBAL 0x44 /* Global next error register (32b) */
+#define E752X_HI_FERR 0x50 /* Hub interface first error reg (8b) */
+#define E752X_HI_NERR 0x52 /* Hub interface next error reg (8b) */
+#define E752X_HI_ERRMASK 0x54 /* Hub interface error mask reg (8b) */
+#define E752X_HI_SMICMD 0x5A /* Hub interface SMI command reg (8b) */
+#define E752X_SYSBUS_FERR 0x60 /* System buss first error reg (16b) */
+#define E752X_SYSBUS_NERR 0x62 /* System buss next error reg (16b) */
+#define E752X_SYSBUS_ERRMASK 0x64 /* System buss error mask reg (16b) */
+#define E752X_SYSBUS_SMICMD 0x6A /* System buss SMI command reg (16b) */
+#define E752X_BUF_FERR 0x70 /* Memory buffer first error reg (8b) */
+#define E752X_BUF_NERR 0x72 /* Memory buffer next error reg (8b) */
+#define E752X_BUF_ERRMASK 0x74 /* Memory buffer error mask reg (8b) */
+#define E752X_BUF_SMICMD 0x7A /* Memory buffer SMI command reg (8b) */
+#define E752X_DRAM_FERR 0x80 /* DRAM first error register (16b) */
+#define E752X_DRAM_NERR 0x82 /* DRAM next error register (16b) */
+#define E752X_DRAM_ERRMASK 0x84 /* DRAM error mask register (8b) */
+#define E752X_DRAM_SMICMD 0x8A /* DRAM SMI command register (8b) */
+#define E752X_DRAM_RETR_ADD 0xAC /* DRAM Retry address register (32b) */
+#define E752X_DRAM_SEC1_ADD 0xA0 /* DRAM first correctable memory */
+ /* error address register (32b) */
+ /*
+ * 31 Reserved
+ * 30:2 CE address (64 byte block 34:6)
+ * 1 Reserved
+ * 0 HiLoCS
+ */
+#define E752X_DRAM_SEC2_ADD 0xC8 /* DRAM first correctable memory */
+ /* error address register (32b) */
+ /*
+ * 31 Reserved
+ * 30:2 CE address (64 byte block 34:6)
+ * 1 Reserved
+ * 0 HiLoCS
+ */
+#define E752X_DRAM_DED_ADD 0xA4 /* DRAM first uncorrectable memory */
+ /* error address register (32b) */
+ /*
+ * 31 Reserved
+ * 30:2 CE address (64 byte block 34:6)
+ * 1 Reserved
+ * 0 HiLoCS
+ */
+#define E752X_DRAM_SCRB_ADD 0xA8 /* DRAM first uncorrectable scrub memory */
+ /* error address register (32b) */
+ /*
+ * 31 Reserved
+ * 30:2 CE address (64 byte block 34:6)
+ * 1 Reserved
+ * 0 HiLoCS
+ */
+#define E752X_DRAM_SEC1_SYNDROME 0xC4 /* DRAM first correctable memory */
+ /* error syndrome register (16b) */
+#define E752X_DRAM_SEC2_SYNDROME 0xC6 /* DRAM second correctable memory */
+ /* error syndrome register (16b) */
+#define E752X_DEVPRES1 0xF4 /* Device Present 1 register (8b) */
+
+/* ICH5R register addresses - device 30 function 0 */
+#define ICH5R_PCI_STAT 0x06 /* PCI status register (16b) */
+#define ICH5R_PCI_2ND_STAT 0x1E /* PCI status secondary reg (16b) */
+#define ICH5R_PCI_BRIDGE_CTL 0x3E /* PCI bridge control register (16b) */
+
+enum e752x_chips {
+ E7520 = 0,
+ E7525 = 1,
+ E7320 = 2
+};
+
+
+struct e752x_pvt {
+ struct pci_dev *bridge_ck;
+ struct pci_dev *dev_d0f0;
+ struct pci_dev *dev_d0f1;
+ u32 tolm;
+ u32 remapbase;
+ u32 remaplimit;
+ int mc_symmetric;
+ u8 map[8];
+ int map_type;
+ const struct e752x_dev_info *dev_info;
+};
+
+
+struct e752x_dev_info {
+ u16 err_dev;
+ const char *ctl_name;
+};
+
+struct e752x_error_info {
+ u32 ferr_global;
+ u32 nerr_global;
+ u8 hi_ferr;
+ u8 hi_nerr;
+ u16 sysbus_ferr;
+ u16 sysbus_nerr;
+ u8 buf_ferr;
+ u8 buf_nerr;
+ u16 dram_ferr;
+ u16 dram_nerr;
+ u32 dram_sec1_add;
+ u32 dram_sec2_add;
+ u16 dram_sec1_syndrome;
+ u16 dram_sec2_syndrome;
+ u32 dram_ded_add;
+ u32 dram_scrb_add;
+ u32 dram_retr_add;
+};
+
+static const struct e752x_dev_info e752x_devs[] = {
+ [E7520] = {
+ .err_dev = PCI_DEVICE_ID_INTEL_7520_1_ERR,
+ .ctl_name = "E7520"},
+ [E7525] = {
+ .err_dev = PCI_DEVICE_ID_INTEL_7525_1_ERR,
+ .ctl_name = "E7525"},
+ [E7320] = {
+ .err_dev = PCI_DEVICE_ID_INTEL_7320_1_ERR,
+ .ctl_name = "E7320"},
+};
+
+
+static unsigned long ctl_page_to_phys(struct mem_ctl_info *mci,
+ unsigned long page)
+{
+ u32 remap;
+ struct e752x_pvt *pvt = (struct e752x_pvt *) mci->pvt_info;
+
+ debugf3("MC: " __FILE__ ": %s()\n", __func__);
+
+ if (page < pvt->tolm)
+ return page;
+ if ((page >= 0x100000) && (page < pvt->remapbase))
+ return page;
+ remap = (page - pvt->tolm) + pvt->remapbase;
+ if (remap < pvt->remaplimit)
+ return remap;
+ printk(KERN_ERR "Invalid page %lx - out of range\n", page);
+ return pvt->tolm - 1;
+}
+
+static void do_process_ce(struct mem_ctl_info *mci, u16 error_one,
+ u32 sec1_add, u16 sec1_syndrome)
+{
+ u32 page;
+ int row;
+ int channel;
+ int i;
+ struct e752x_pvt *pvt = (struct e752x_pvt *) mci->pvt_info;
+
+ debugf3("MC: " __FILE__ ": %s()\n", __func__);
+
+ /* convert the addr to 4k page */
+ page = sec1_add >> (PAGE_SHIFT - 4);
+
+ /* FIXME - check for -1 */
+ if (pvt->mc_symmetric) {
+ /* chip select are bits 14 & 13 */
+ row = ((page >> 1) & 3);
+ printk(KERN_WARNING
+ "Test row %d Table %d %d %d %d %d %d %d %d\n",
+ row, pvt->map[0], pvt->map[1], pvt->map[2],
+ pvt->map[3], pvt->map[4], pvt->map[5],
+ pvt->map[6], pvt->map[7]);
+
+ /* test for channel remapping */
+ for (i = 0; i < 8; i++) {
+ if (pvt->map[i] == row)
+ break;
+ }
+ printk(KERN_WARNING "Test computed row %d\n", i);
+ if (i < 8)
+ row = i;
+ else
+ printk(KERN_WARNING
+ "MC%d: row %d not found in remap table\n",
+ mci->mc_idx, row);
+ } else
+ row = edac_mc_find_csrow_by_page(mci, page);
+ /* 0 = channel A, 1 = channel B */
+ channel = !(error_one & 1);
+
+ if (!pvt->map_type)
+ row = 7 - row;
+ edac_mc_handle_ce(mci, page, 0, sec1_syndrome, row, channel,
+ "e752x CE");
+}
+
+
+static inline void process_ce(struct mem_ctl_info *mci, u16 error_one,
+ u32 sec1_add, u16 sec1_syndrome, int *error_found,
+ int handle_error)
+{
+ *error_found = 1;
+
+ if (handle_error)
+ do_process_ce(mci, error_one, sec1_add, sec1_syndrome);
+}
+
+static void do_process_ue(struct mem_ctl_info *mci, u16 error_one, u32 ded_add,
+ u32 scrb_add)
+{
+ u32 error_2b, block_page;
+ int row;
+ struct e752x_pvt *pvt = (struct e752x_pvt *) mci->pvt_info;
+
+ debugf3("MC: " __FILE__ ": %s()\n", __func__);
+
+ if (error_one & 0x0202) {
+ error_2b = ded_add;
+ /* convert to 4k address */
+ block_page = error_2b >> (PAGE_SHIFT - 4);
+ row = pvt->mc_symmetric ?
+ /* chip select are bits 14 & 13 */
+ ((block_page >> 1) & 3) :
+ edac_mc_find_csrow_by_page(mci, block_page);
+ edac_mc_handle_ue(mci, block_page, 0, row,
+ "e752x UE from Read");
+ }
+ if (error_one & 0x0404) {
+ error_2b = scrb_add;
+ /* convert to 4k address */
+ block_page = error_2b >> (PAGE_SHIFT - 4);
+ row = pvt->mc_symmetric ?
+ /* chip select are bits 14 & 13 */
+ ((block_page >> 1) & 3) :
+ edac_mc_find_csrow_by_page(mci, block_page);
+ edac_mc_handle_ue(mci, block_page, 0, row,
+ "e752x UE from Scruber");
+ }
+}
+
+static inline void process_ue(struct mem_ctl_info *mci, u16 error_one,
+ u32 ded_add, u32 scrb_add, int *error_found, int handle_error)
+{
+ *error_found = 1;
+
+ if (handle_error)
+ do_process_ue(mci, error_one, ded_add, scrb_add);
+}
+
+static inline void process_ue_no_info_wr(struct mem_ctl_info *mci,
+ int *error_found, int handle_error)
+{
+ *error_found = 1;
+
+ if (!handle_error)
+ return;
+
+ debugf3("MC: " __FILE__ ": %s()\n", __func__);
+ edac_mc_handle_ue_no_info(mci, "e752x UE log memory write");
+}
+
+static void do_process_ded_retry(struct mem_ctl_info *mci, u16 error,
+ u32 retry_add)
+{
+ u32 error_1b, page;
+ int row;
+ struct e752x_pvt *pvt = (struct e752x_pvt *) mci->pvt_info;
+
+ error_1b = retry_add;
+ page = error_1b >> (PAGE_SHIFT - 4); /* convert the addr to 4k page */
+ row = pvt->mc_symmetric ?
+ ((page >> 1) & 3) : /* chip select are bits 14 & 13 */
+ edac_mc_find_csrow_by_page(mci, page);
+ printk(KERN_WARNING
+ "MC%d: CE page 0x%lx, row %d : Memory read retry\n",
+ mci->mc_idx, (long unsigned int) page, row);
+}
+
+static inline void process_ded_retry(struct mem_ctl_info *mci, u16 error,
+ u32 retry_add, int *error_found, int handle_error)
+{
+ *error_found = 1;
+
+ if (handle_error)
+ do_process_ded_retry(mci, error, retry_add);
+}
+
+static inline void process_threshold_ce(struct mem_ctl_info *mci, u16 error,
+ int *error_found, int handle_error)
+{
+ *error_found = 1;
+
+ if (handle_error)
+ printk(KERN_WARNING "MC%d: Memory threshold CE\n",
+ mci->mc_idx);
+}
+
+static char *global_message[11] = {
+ "PCI Express C1", "PCI Express C", "PCI Express B1",
+ "PCI Express B", "PCI Express A1", "PCI Express A",
+ "DMA Controler", "HUB Interface", "System Bus",
+ "DRAM Controler", "Internal Buffer"
+};
+
+static char *fatal_message[2] = { "Non-Fatal ", "Fatal " };
+
+static void do_global_error(int fatal, u32 errors)
+{
+ int i;
+
+ for (i = 0; i < 11; i++) {
+ if (errors & (1 << i))
+ printk(KERN_WARNING "%sError %s\n",
+ fatal_message[fatal], global_message[i]);
+ }
+}
+
+static inline void global_error(int fatal, u32 errors, int *error_found,
+ int handle_error)
+{
+ *error_found = 1;
+
+ if (handle_error)
+ do_global_error(fatal, errors);
+}
+
+static char *hub_message[7] = {
+ "HI Address or Command Parity", "HI Illegal Access",
+ "HI Internal Parity", "Out of Range Access",
+ "HI Data Parity", "Enhanced Config Access",
+ "Hub Interface Target Abort"
+};
+
+static void do_hub_error(int fatal, u8 errors)
+{
+ int i;
+
+ for (i = 0; i < 7; i++) {
+ if (errors & (1 << i))
+ printk(KERN_WARNING "%sError %s\n",
+ fatal_message[fatal], hub_message[i]);
+ }
+}
+
+static inline void hub_error(int fatal, u8 errors, int *error_found,
+ int handle_error)
+{
+ *error_found = 1;
+
+ if (handle_error)
+ do_hub_error(fatal, errors);
+}
+
+static char *membuf_message[4] = {
+ "Internal PMWB to DRAM parity",
+ "Internal PMWB to System Bus Parity",
+ "Internal System Bus or IO to PMWB Parity",
+ "Internal DRAM to PMWB Parity"
+};
+
+static void do_membuf_error(u8 errors)
+{
+ int i;
+
+ for (i = 0; i < 4; i++) {
+ if (errors & (1 << i))
+ printk(KERN_WARNING "Non-Fatal Error %s\n",
+ membuf_message[i]);
+ }
+}
+
+static inline void membuf_error(u8 errors, int *error_found, int handle_error)
+{
+ *error_found = 1;
+
+ if (handle_error)
+ do_membuf_error(errors);
+}
+
+#if 0
+char *sysbus_message[10] = {
+ "Addr or Request Parity",
+ "Data Strobe Glitch",
+ "Addr Strobe Glitch",
+ "Data Parity",
+ "Addr Above TOM",
+ "Non DRAM Lock Error",
+ "MCERR", "BINIT",
+ "Memory Parity",
+ "IO Subsystem Parity"
+};
+#endif /* 0 */
+
+static void do_sysbus_error(int fatal, u32 errors)
+{
+ int i;
+
+ for (i = 0; i < 10; i++) {
+ if (errors & (1 << i))
+ printk(KERN_WARNING "%sError System Bus %s\n",
+ fatal_message[fatal], global_message[i]);
+ }
+}
+
+static inline void sysbus_error(int fatal, u32 errors, int *error_found,
+ int handle_error)
+{
+ *error_found = 1;
+
+ if (handle_error)
+ do_sysbus_error(fatal, errors);
+}
+
+static void e752x_check_hub_interface (struct e752x_error_info *info,
+ int *error_found, int handle_error)
+{
+ u8 stat8;
+
+ //pci_read_config_byte(dev,E752X_HI_FERR,&stat8);
+ stat8 = info->hi_ferr;
+ if(stat8 & 0x7f) { /* Error, so process */
+ stat8 &= 0x7f;
+ if(stat8 & 0x2b)
+ hub_error(1, stat8 & 0x2b, error_found, handle_error);
+ if(stat8 & 0x54)
+ hub_error(0, stat8 & 0x54, error_found, handle_error);
+ }
+ //pci_read_config_byte(dev,E752X_HI_NERR,&stat8);
+ stat8 = info->hi_nerr;
+ if(stat8 & 0x7f) { /* Error, so process */
+ stat8 &= 0x7f;
+ if (stat8 & 0x2b)
+ hub_error(1, stat8 & 0x2b, error_found, handle_error);
+ if(stat8 & 0x54)
+ hub_error(0, stat8 & 0x54, error_found, handle_error);
+ }
+}
+
+static void e752x_check_sysbus (struct e752x_error_info *info, int *error_found,
+ int handle_error)
+{
+ u32 stat32, error32;
+
+ //pci_read_config_dword(dev,E752X_SYSBUS_FERR,&stat32);
+ stat32 = info->sysbus_ferr + (info->sysbus_nerr << 16);
+
+ if (stat32 == 0)
+ return; /* no errors */
+
+ error32 = (stat32 >> 16) & 0x3ff;
+ stat32 = stat32 & 0x3ff;
+ if(stat32 & 0x083)
+ sysbus_error(1, stat32 & 0x083, error_found, handle_error);
+ if(stat32 & 0x37c)
+ sysbus_error(0, stat32 & 0x37c, error_found, handle_error);
+ if(error32 & 0x083)
+ sysbus_error(1, error32 & 0x083, error_found, handle_error);
+ if(error32 & 0x37c)
+ sysbus_error(0, error32 & 0x37c, error_found, handle_error);
+}
+
+static void e752x_check_membuf (struct e752x_error_info *info, int *error_found,
+ int handle_error)
+{
+ u8 stat8;
+
+ stat8 = info->buf_ferr;
+ if (stat8 & 0x0f) { /* Error, so process */
+ stat8 &= 0x0f;
+ membuf_error(stat8, error_found, handle_error);
+ }
+ stat8 = info->buf_nerr;
+ if (stat8 & 0x0f) { /* Error, so process */
+ stat8 &= 0x0f;
+ membuf_error(stat8, error_found, handle_error);
+ }
+}
+
+static void e752x_check_dram (struct mem_ctl_info *mci,
+ struct e752x_error_info *info, int *error_found, int handle_error)
+{
+ u16 error_one, error_next;
+
+ error_one = info->dram_ferr;
+ error_next = info->dram_nerr;
+
+ /* decode and report errors */
+ if(error_one & 0x0101) /* check first error correctable */
+ process_ce(mci, error_one, info->dram_sec1_add,
+ info->dram_sec1_syndrome, error_found,
+ handle_error);
+
+ if(error_next & 0x0101) /* check next error correctable */
+ process_ce(mci, error_next, info->dram_sec2_add,
+ info->dram_sec2_syndrome, error_found,
+ handle_error);
+
+ if(error_one & 0x4040)
+ process_ue_no_info_wr(mci, error_found, handle_error);
+
+ if(error_next & 0x4040)
+ process_ue_no_info_wr(mci, error_found, handle_error);
+
+ if(error_one & 0x2020)
+ process_ded_retry(mci, error_one, info->dram_retr_add,
+ error_found, handle_error);
+
+ if(error_next & 0x2020)
+ process_ded_retry(mci, error_next, info->dram_retr_add,
+ error_found, handle_error);
+
+ if(error_one & 0x0808)
+ process_threshold_ce(mci, error_one, error_found,
+ handle_error);
+
+ if(error_next & 0x0808)
+ process_threshold_ce(mci, error_next, error_found,
+ handle_error);
+
+ if(error_one & 0x0606)
+ process_ue(mci, error_one, info->dram_ded_add,
+ info->dram_scrb_add, error_found, handle_error);
+
+ if(error_next & 0x0606)
+ process_ue(mci, error_next, info->dram_ded_add,
+ info->dram_scrb_add, error_found, handle_error);
+}
+
+static void e752x_get_error_info (struct mem_ctl_info *mci,
+ struct e752x_error_info *info)
+{
+ struct pci_dev *dev;
+ struct e752x_pvt *pvt;
+
+ memset(info, 0, sizeof(*info));
+ pvt = (struct e752x_pvt *) mci->pvt_info;
+ dev = pvt->dev_d0f1;
+
+ pci_read_config_dword(dev, E752X_FERR_GLOBAL, &info->ferr_global);
+
+ if (info->ferr_global) {
+ pci_read_config_byte(dev, E752X_HI_FERR, &info->hi_ferr);
+ pci_read_config_word(dev, E752X_SYSBUS_FERR,
+ &info->sysbus_ferr);
+ pci_read_config_byte(dev, E752X_BUF_FERR, &info->buf_ferr);
+ pci_read_config_word(dev, E752X_DRAM_FERR,
+ &info->dram_ferr);
+ pci_read_config_dword(dev, E752X_DRAM_SEC1_ADD,
+ &info->dram_sec1_add);
+ pci_read_config_word(dev, E752X_DRAM_SEC1_SYNDROME,
+ &info->dram_sec1_syndrome);
+ pci_read_config_dword(dev, E752X_DRAM_DED_ADD,
+ &info->dram_ded_add);
+ pci_read_config_dword(dev, E752X_DRAM_SCRB_ADD,
+ &info->dram_scrb_add);
+ pci_read_config_dword(dev, E752X_DRAM_RETR_ADD,
+ &info->dram_retr_add);
+
+ if (info->hi_ferr & 0x7f)
+ pci_write_config_byte(dev, E752X_HI_FERR,
+ info->hi_ferr);
+
+ if (info->sysbus_ferr)
+ pci_write_config_word(dev, E752X_SYSBUS_FERR,
+ info->sysbus_ferr);
+
+ if (info->buf_ferr & 0x0f)
+ pci_write_config_byte(dev, E752X_BUF_FERR,
+ info->buf_ferr);
+
+ if (info->dram_ferr)
+ pci_write_bits16(pvt->bridge_ck, E752X_DRAM_FERR,
+ info->dram_ferr, info->dram_ferr);
+
+ pci_write_config_dword(dev, E752X_FERR_GLOBAL,
+ info->ferr_global);
+ }
+
+ pci_read_config_dword(dev, E752X_NERR_GLOBAL, &info->nerr_global);
+
+ if (info->nerr_global) {
+ pci_read_config_byte(dev, E752X_HI_NERR, &info->hi_nerr);
+ pci_read_config_word(dev, E752X_SYSBUS_NERR,
+ &info->sysbus_nerr);
+ pci_read_config_byte(dev, E752X_BUF_NERR, &info->buf_nerr);
+ pci_read_config_word(dev, E752X_DRAM_NERR,
+ &info->dram_nerr);
+ pci_read_config_dword(dev, E752X_DRAM_SEC2_ADD,
+ &info->dram_sec2_add);
+ pci_read_config_word(dev, E752X_DRAM_SEC2_SYNDROME,
+ &info->dram_sec2_syndrome);
+
+ if (info->hi_nerr & 0x7f)
+ pci_write_config_byte(dev, E752X_HI_NERR,
+ info->hi_nerr);
+
+ if (info->sysbus_nerr)
+ pci_write_config_word(dev, E752X_SYSBUS_NERR,
+ info->sysbus_nerr);
+
+ if (info->buf_nerr & 0x0f)
+ pci_write_config_byte(dev, E752X_BUF_NERR,
+ info->buf_nerr);
+
+ if (info->dram_nerr)
+ pci_write_bits16(pvt->bridge_ck, E752X_DRAM_NERR,
+ info->dram_nerr, info->dram_nerr);
+
+ pci_write_config_dword(dev, E752X_NERR_GLOBAL,
+ info->nerr_global);
+ }
+}
+
+static int e752x_process_error_info (struct mem_ctl_info *mci,
+ struct e752x_error_info *info, int handle_errors)
+{
+ u32 error32, stat32;
+ int error_found;
+
+ error_found = 0;
+ error32 = (info->ferr_global >> 18) & 0x3ff;
+ stat32 = (info->ferr_global >> 4) & 0x7ff;
+
+ if (error32)
+ global_error(1, error32, &error_found, handle_errors);
+
+ if (stat32)
+ global_error(0, stat32, &error_found, handle_errors);
+
+ error32 = (info->nerr_global >> 18) & 0x3ff;
+ stat32 = (info->nerr_global >> 4) & 0x7ff;
+
+ if (error32)
+ global_error(1, error32, &error_found, handle_errors);
+
+ if (stat32)
+ global_error(0, stat32, &error_found, handle_errors);
+
+ e752x_check_hub_interface(info, &error_found, handle_errors);
+ e752x_check_sysbus(info, &error_found, handle_errors);
+ e752x_check_membuf(info, &error_found, handle_errors);
+ e752x_check_dram(mci, info, &error_found, handle_errors);
+ return error_found;
+}
+
+static void e752x_check(struct mem_ctl_info *mci)
+{
+ struct e752x_error_info info;
+ debugf3("MC: " __FILE__ ": %s()\n", __func__);
+ e752x_get_error_info(mci, &info);
+ e752x_process_error_info(mci, &info, 1);
+}
+
+static int e752x_probe1(struct pci_dev *pdev, int dev_idx)
+{
+ int rc = -ENODEV;
+ int index;
+ u16 pci_data, stat;
+ u32 stat32;
+ u16 stat16;
+ u8 stat8;
+ struct mem_ctl_info *mci = NULL;
+ struct e752x_pvt *pvt = NULL;
+ u16 ddrcsr;
+ u32 drc;
+ int drc_chan; /* Number of channels 0=1chan,1=2chan */
+ int drc_drbg; /* DRB granularity 0=64mb,1=128mb */
+ int drc_ddim; /* DRAM Data Integrity Mode 0=none,2=edac */
+ u32 dra;
+ unsigned long last_cumul_size;
+ struct pci_dev *pres_dev;
+ struct pci_dev *dev = NULL;
+
+ debugf0("MC: " __FILE__ ": %s(): mci\n", __func__);
+ debugf0("Starting Probe1\n");
+
+ /* enable device 0 function 1 */
+ pci_read_config_byte(pdev, E752X_DEVPRES1, &stat8);
+ stat8 |= (1 << 5);
+ pci_write_config_byte(pdev, E752X_DEVPRES1, stat8);
+
+ /* need to find out the number of channels */
+ pci_read_config_dword(pdev, E752X_DRC, &drc);
+ pci_read_config_word(pdev, E752X_DDRCSR, &ddrcsr);
+ /* FIXME: should check >>12 or 0xf, true for all? */
+ /* Dual channel = 1, Single channel = 0 */
+ drc_chan = (((ddrcsr >> 12) & 3) == 3);
+ drc_drbg = drc_chan + 1; /* 128 in dual mode, 64 in single */
+ drc_ddim = (drc >> 20) & 0x3;
+
+ mci = edac_mc_alloc(sizeof(*pvt), E752X_NR_CSROWS, drc_chan + 1);
+
+ if (mci == NULL) {
+ rc = -ENOMEM;
+ goto fail;
+ }
+
+ debugf3("MC: " __FILE__ ": %s(): init mci\n", __func__);
+
+ mci->mtype_cap = MEM_FLAG_RDDR;
+ mci->edac_ctl_cap = EDAC_FLAG_NONE | EDAC_FLAG_SECDED |
+ EDAC_FLAG_S4ECD4ED;
+ /* FIXME - what if different memory types are in different csrows? */
+ mci->mod_name = BS_MOD_STR;
+ mci->mod_ver = "$Revision: 1.5.2.11 $";
+ mci->pdev = pdev;
+
+ debugf3("MC: " __FILE__ ": %s(): init pvt\n", __func__);
+ pvt = (struct e752x_pvt *) mci->pvt_info;
+ pvt->dev_info = &e752x_devs[dev_idx];
+ pvt->bridge_ck = pci_get_device(PCI_VENDOR_ID_INTEL,
+ pvt->dev_info->err_dev,
+ pvt->bridge_ck);
+ if (pvt->bridge_ck == NULL)
+ pvt->bridge_ck = pci_scan_single_device(pdev->bus,
+ PCI_DEVFN(0, 1));
+ if (pvt->bridge_ck == NULL) {
+ printk(KERN_ERR "MC: error reporting device not found:"
+ "vendor %x device 0x%x (broken BIOS?)\n",
+ PCI_VENDOR_ID_INTEL, e752x_devs[dev_idx].err_dev);
+ goto fail;
+ }
+ pvt->mc_symmetric = ((ddrcsr & 0x10) != 0);
+
+ debugf3("MC: " __FILE__ ": %s(): more mci init\n", __func__);
+ mci->ctl_name = pvt->dev_info->ctl_name;
+ mci->edac_check = e752x_check;
+ mci->ctl_page_to_phys = ctl_page_to_phys;
+
+ /* find out the device types */
+ pci_read_config_dword(pdev, E752X_DRA, &dra);
+
+ /*
+ * The dram row boundary (DRB) reg values are boundary address for
+ * each DRAM row with a granularity of 64 or 128MB (single/dual
+ * channel operation). DRB regs are cumulative; therefore DRB7 will
+ * contain the total memory contained in all eight rows.
+ */
+ for (last_cumul_size = index = 0; index < mci->nr_csrows; index++) {
+ u8 value;
+ u32 cumul_size;
+ /* mem_dev 0=x8, 1=x4 */
+ int mem_dev = (dra >> (index * 4 + 2)) & 0x3;
+ struct csrow_info *csrow = &mci->csrows[index];
+
+ mem_dev = (mem_dev == 2);
+ pci_read_config_byte(mci->pdev, E752X_DRB + index, &value);
+ /* convert a 128 or 64 MiB DRB to a page size. */
+ cumul_size = value << (25 + drc_drbg - PAGE_SHIFT);
+ debugf3("MC: " __FILE__ ": %s(): (%d) cumul_size 0x%x\n",
+ __func__, index, cumul_size);
+ if (cumul_size == last_cumul_size)
+ continue; /* not populated */
+
+ csrow->first_page = last_cumul_size;
+ csrow->last_page = cumul_size - 1;
+ csrow->nr_pages = cumul_size - last_cumul_size;
+ last_cumul_size = cumul_size;
+ csrow->grain = 1 << 12; /* 4KiB - resolution of CELOG */
+ csrow->mtype = MEM_RDDR; /* only one type supported */
+ csrow->dtype = mem_dev ? DEV_X4 : DEV_X8;
+
+ /*
+ * if single channel or x8 devices then SECDED
+ * if dual channel and x4 then S4ECD4ED
+ */
+ if (drc_ddim) {
+ if (drc_chan && mem_dev) {
+ csrow->edac_mode = EDAC_S4ECD4ED;
+ mci->edac_cap |= EDAC_FLAG_S4ECD4ED;
+ } else {
+ csrow->edac_mode = EDAC_SECDED;
+ mci->edac_cap |= EDAC_FLAG_SECDED;
+ }
+ } else
+ csrow->edac_mode = EDAC_NONE;
+ }
+
+ /* Fill in the memory map table */
+ {
+ u8 value;
+ u8 last = 0;
+ u8 row = 0;
+ for (index = 0; index < 8; index += 2) {
+
+ pci_read_config_byte(mci->pdev, E752X_DRB + index,
+ &value);
+ /* test if there is a dimm in this slot */
+ if (value == last) {
+ /* no dimm in the slot, so flag it as empty */
+ pvt->map[index] = 0xff;
+ pvt->map[index + 1] = 0xff;
+ } else { /* there is a dimm in the slot */
+ pvt->map[index] = row;
+ row++;
+ last = value;
+ /* test the next value to see if the dimm is
+ double sided */
+ pci_read_config_byte(mci->pdev,
+ E752X_DRB + index + 1,
+ &value);
+ pvt->map[index + 1] = (value == last) ?
+ 0xff : /* the dimm is single sided,
+ so flag as empty */
+ row; /* this is a double sided dimm
+ to save the next row # */
+ row++;
+ last = value;
+ }
+ }
+ }
+
+ /* set the map type. 1 = normal, 0 = reversed */
+ pci_read_config_byte(mci->pdev, E752X_DRM, &stat8);
+ pvt->map_type = ((stat8 & 0x0f) > ((stat8 >> 4) & 0x0f));
+
+ mci->edac_cap |= EDAC_FLAG_NONE;
+
+ debugf3("MC: " __FILE__ ": %s(): tolm, remapbase, remaplimit\n",
+ __func__);
+ /* load the top of low memory, remap base, and remap limit vars */
+ pci_read_config_word(mci->pdev, E752X_TOLM, &pci_data);
+ pvt->tolm = ((u32) pci_data) << 4;
+ pci_read_config_word(mci->pdev, E752X_REMAPBASE, &pci_data);
+ pvt->remapbase = ((u32) pci_data) << 14;
+ pci_read_config_word(mci->pdev, E752X_REMAPLIMIT, &pci_data);
+ pvt->remaplimit = ((u32) pci_data) << 14;
+ printk("tolm = %x, remapbase = %x, remaplimit = %x\n", pvt->tolm,
+ pvt->remapbase, pvt->remaplimit);
+
+ if (edac_mc_add_mc(mci)) {
+ debugf3("MC: " __FILE__
+ ": %s(): failed edac_mc_add_mc()\n",
+ __func__);
+ goto fail;
+ }
+
+ /* Walk through the PCI table and clear errors */
+ switch (dev_idx) {
+ case E7520:
+ dev = pci_get_device(PCI_VENDOR_ID_INTEL,
+ PCI_DEVICE_ID_INTEL_7520_0, NULL);
+ break;
+ case E7525:
+ dev = pci_get_device(PCI_VENDOR_ID_INTEL,
+ PCI_DEVICE_ID_INTEL_7525_0, NULL);
+ break;
+ case E7320:
+ dev = pci_get_device(PCI_VENDOR_ID_INTEL,
+ PCI_DEVICE_ID_INTEL_7320_0, NULL);
+ break;
+ }
+
+
+ pvt->dev_d0f0 = dev;
+ for (pres_dev = dev;
+ ((struct pci_dev *) pres_dev->global_list.next != dev);
+ pres_dev = (struct pci_dev *) pres_dev->global_list.next) {
+ pci_read_config_dword(pres_dev, PCI_COMMAND, &stat32);
+ stat = (u16) (stat32 >> 16);
+ /* clear any error bits */
+ if (stat32 & ((1 << 6) + (1 << 8)))
+ pci_write_config_word(pres_dev, PCI_STATUS, stat);
+ }
+ /* find the error reporting device and clear errors */
+ dev = pvt->dev_d0f1 = pci_dev_get(pvt->bridge_ck);
+ /* Turn off error disable & SMI in case the BIOS turned it on */
+ pci_write_config_byte(dev, E752X_HI_ERRMASK, 0x00);
+ pci_write_config_byte(dev, E752X_HI_SMICMD, 0x00);
+ pci_write_config_word(dev, E752X_SYSBUS_ERRMASK, 0x00);
+ pci_write_config_word(dev, E752X_SYSBUS_SMICMD, 0x00);
+ pci_write_config_byte(dev, E752X_BUF_ERRMASK, 0x00);
+ pci_write_config_byte(dev, E752X_BUF_SMICMD, 0x00);
+ pci_write_config_byte(dev, E752X_DRAM_ERRMASK, 0x00);
+ pci_write_config_byte(dev, E752X_DRAM_SMICMD, 0x00);
+ /* clear other MCH errors */
+ pci_read_config_dword(dev, E752X_FERR_GLOBAL, &stat32);
+ pci_write_config_dword(dev, E752X_FERR_GLOBAL, stat32);
+ pci_read_config_dword(dev, E752X_NERR_GLOBAL, &stat32);
+ pci_write_config_dword(dev, E752X_NERR_GLOBAL, stat32);
+ pci_read_config_byte(dev, E752X_HI_FERR, &stat8);
+ pci_write_config_byte(dev, E752X_HI_FERR, stat8);
+ pci_read_config_byte(dev, E752X_HI_NERR, &stat8);
+ pci_write_config_byte(dev, E752X_HI_NERR, stat8);
+ pci_read_config_dword(dev, E752X_SYSBUS_FERR, &stat32);
+ pci_write_config_dword(dev, E752X_SYSBUS_FERR, stat32);
+ pci_read_config_byte(dev, E752X_BUF_FERR, &stat8);
+ pci_write_config_byte(dev, E752X_BUF_FERR, stat8);
+ pci_read_config_byte(dev, E752X_BUF_NERR, &stat8);
+ pci_write_config_byte(dev, E752X_BUF_NERR, stat8);
+ pci_read_config_word(dev, E752X_DRAM_FERR, &stat16);
+ pci_write_config_word(dev, E752X_DRAM_FERR, stat16);
+ pci_read_config_word(dev, E752X_DRAM_NERR, &stat16);
+ pci_write_config_word(dev, E752X_DRAM_NERR, stat16);
+
+ /* get this far and it's successful */
+ debugf3("MC: " __FILE__ ": %s(): success\n", __func__);
+ return 0;
+
+fail:
+ if (mci) {
+ if (pvt->dev_d0f0)
+ pci_dev_put(pvt->dev_d0f0);
+ if (pvt->dev_d0f1)
+ pci_dev_put(pvt->dev_d0f1);
+ if (pvt->bridge_ck)
+ pci_dev_put(pvt->bridge_ck);
+ edac_mc_free(mci);
+ }
+ return rc;
+}
+
+/* returns count (>= 0), or negative on error */
+static int __devinit e752x_init_one(struct pci_dev *pdev,
+ const struct pci_device_id *ent)
+{
+ debugf0("MC: " __FILE__ ": %s()\n", __func__);
+
+ /* wake up and enable device */
+ if(pci_enable_device(pdev) < 0)
+ return -EIO;
+ return e752x_probe1(pdev, ent->driver_data);
+}
+
+
+static void __devexit e752x_remove_one(struct pci_dev *pdev)
+{
+ struct mem_ctl_info *mci;
+ struct e752x_pvt *pvt;
+
+ debugf0(__FILE__ ": %s()\n", __func__);
+
+ if ((mci = edac_mc_find_mci_by_pdev(pdev)) == NULL)
+ return;
+
+ if (edac_mc_del_mc(mci))
+ return;
+
+ pvt = (struct e752x_pvt *) mci->pvt_info;
+ pci_dev_put(pvt->dev_d0f0);
+ pci_dev_put(pvt->dev_d0f1);
+ pci_dev_put(pvt->bridge_ck);
+ edac_mc_free(mci);
+}
+
+
+static const struct pci_device_id e752x_pci_tbl[] __devinitdata = {
+ {PCI_VEND_DEV(INTEL, 7520_0), PCI_ANY_ID, PCI_ANY_ID, 0, 0,
+ E7520},
+ {PCI_VEND_DEV(INTEL, 7525_0), PCI_ANY_ID, PCI_ANY_ID, 0, 0,
+ E7525},
+ {PCI_VEND_DEV(INTEL, 7320_0), PCI_ANY_ID, PCI_ANY_ID, 0, 0,
+ E7320},
+ {0,} /* 0 terminated list. */
+};
+
+MODULE_DEVICE_TABLE(pci, e752x_pci_tbl);
+
+
+static struct pci_driver e752x_driver = {
+ name: BS_MOD_STR,
+ probe: e752x_init_one,
+ remove: __devexit_p(e752x_remove_one),
+ id_table: e752x_pci_tbl,
+};
+
+
+static int __init e752x_init(void)
+{
+ int pci_rc;
+
+ debugf3("MC: " __FILE__ ": %s()\n", __func__);
+ pci_rc = pci_register_driver(&e752x_driver);
+ return (pci_rc < 0) ? pci_rc : 0;
+}
+
+
+static void __exit e752x_exit(void)
+{
+ debugf3("MC: " __FILE__ ": %s()\n", __func__);
+ pci_unregister_driver(&e752x_driver);
+}
+
+
+module_init(e752x_init);
+module_exit(e752x_exit);
+
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("Linux Networx (http://lnxi.com) Tom Zimmerman\n");
+MODULE_DESCRIPTION("MC support for Intel e752x memory controllers");
--- /dev/null
+/*
+ * Intel e7xxx Memory Controller kernel module
+ * (C) 2003 Linux Networx (http://lnxi.com)
+ * This file may be distributed under the terms of the
+ * GNU General Public License.
+ *
+ * See "enum e7xxx_chips" below for supported chipsets
+ *
+ * Written by Thayne Harbaugh
+ * Based on work by Dan Hollis <goemon at anime dot net> and others.
+ * http://www.anime.net/~goemon/linux-ecc/
+ *
+ * Contributors:
+ * Eric Biederman (Linux Networx)
+ * Tom Zimmerman (Linux Networx)
+ * Jim Garlick (Lawrence Livermore National Labs)
+ * Dave Peterson (Lawrence Livermore National Labs)
+ * That One Guy (Some other place)
+ * Wang Zhenyu (intel.com)
+ *
+ * $Id: edac_e7xxx.c,v 1.5.2.9 2005/10/05 00:43:44 dsp_llnl Exp $
+ *
+ */
+
+
+#include <linux/config.h>
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/pci.h>
+#include <linux/pci_ids.h>
+#include <linux/slab.h>
+#include "edac_mc.h"
+
+
+#ifndef PCI_DEVICE_ID_INTEL_7205_0
+#define PCI_DEVICE_ID_INTEL_7205_0 0x255d
+#endif /* PCI_DEVICE_ID_INTEL_7205_0 */
+
+#ifndef PCI_DEVICE_ID_INTEL_7205_1_ERR
+#define PCI_DEVICE_ID_INTEL_7205_1_ERR 0x2551
+#endif /* PCI_DEVICE_ID_INTEL_7205_1_ERR */
+
+#ifndef PCI_DEVICE_ID_INTEL_7500_0
+#define PCI_DEVICE_ID_INTEL_7500_0 0x2540
+#endif /* PCI_DEVICE_ID_INTEL_7500_0 */
+
+#ifndef PCI_DEVICE_ID_INTEL_7500_1_ERR
+#define PCI_DEVICE_ID_INTEL_7500_1_ERR 0x2541
+#endif /* PCI_DEVICE_ID_INTEL_7500_1_ERR */
+
+#ifndef PCI_DEVICE_ID_INTEL_7501_0
+#define PCI_DEVICE_ID_INTEL_7501_0 0x254c
+#endif /* PCI_DEVICE_ID_INTEL_7501_0 */
+
+#ifndef PCI_DEVICE_ID_INTEL_7501_1_ERR
+#define PCI_DEVICE_ID_INTEL_7501_1_ERR 0x2541
+#endif /* PCI_DEVICE_ID_INTEL_7501_1_ERR */
+
+#ifndef PCI_DEVICE_ID_INTEL_7505_0
+#define PCI_DEVICE_ID_INTEL_7505_0 0x2550
+#endif /* PCI_DEVICE_ID_INTEL_7505_0 */
+
+#ifndef PCI_DEVICE_ID_INTEL_7505_1_ERR
+#define PCI_DEVICE_ID_INTEL_7505_1_ERR 0x2551
+#endif /* PCI_DEVICE_ID_INTEL_7505_1_ERR */
+
+
+#define E7XXX_NR_CSROWS 8 /* number of csrows */
+#define E7XXX_NR_DIMMS 8 /* FIXME - is this correct? */
+
+
+/* E7XXX register addresses - device 0 function 0 */
+#define E7XXX_DRB 0x60 /* DRAM row boundary register (8b) */
+#define E7XXX_DRA 0x70 /* DRAM row attribute register (8b) */
+ /*
+ * 31 Device width row 7 0=x8 1=x4
+ * 27 Device width row 6
+ * 23 Device width row 5
+ * 19 Device width row 4
+ * 15 Device width row 3
+ * 11 Device width row 2
+ * 7 Device width row 1
+ * 3 Device width row 0
+ */
+#define E7XXX_DRC 0x7C /* DRAM controller mode reg (32b) */
+ /*
+ * 22 Number channels 0=1,1=2
+ * 19:18 DRB Granularity 32/64MB
+ */
+#define E7XXX_TOLM 0xC4 /* DRAM top of low memory reg (16b) */
+#define E7XXX_REMAPBASE 0xC6 /* DRAM remap base address reg (16b) */
+#define E7XXX_REMAPLIMIT 0xC8 /* DRAM remap limit address reg (16b) */
+
+/* E7XXX register addresses - device 0 function 1 */
+#define E7XXX_DRAM_FERR 0x80 /* DRAM first error register (8b) */
+#define E7XXX_DRAM_NERR 0x82 /* DRAM next error register (8b) */
+#define E7XXX_DRAM_CELOG_ADD 0xA0 /* DRAM first correctable memory */
+ /* error address register (32b) */
+ /*
+ * 31:28 Reserved
+ * 27:6 CE address (4k block 33:12)
+ * 5:0 Reserved
+ */
+#define E7XXX_DRAM_UELOG_ADD 0xB0 /* DRAM first uncorrectable memory */
+ /* error address register (32b) */
+ /*
+ * 31:28 Reserved
+ * 27:6 CE address (4k block 33:12)
+ * 5:0 Reserved
+ */
+#define E7XXX_DRAM_CELOG_SYNDROME 0xD0 /* DRAM first correctable memory */
+ /* error syndrome register (16b) */
+
+enum e7xxx_chips {
+ E7500 = 0,
+ E7501,
+ E7505,
+ E7205,
+};
+
+
+struct e7xxx_pvt {
+ struct pci_dev *bridge_ck;
+ u32 tolm;
+ u32 remapbase;
+ u32 remaplimit;
+ const struct e7xxx_dev_info *dev_info;
+};
+
+
+struct e7xxx_dev_info {
+ u16 err_dev;
+ const char *ctl_name;
+};
+
+
+struct e7xxx_error_info {
+ u8 dram_ferr;
+ u8 dram_nerr;
+ u32 dram_celog_add;
+ u16 dram_celog_syndrome;
+ u32 dram_uelog_add;
+};
+
+static const struct e7xxx_dev_info e7xxx_devs[] = {
+ [E7500] = {
+ .err_dev = PCI_DEVICE_ID_INTEL_7500_1_ERR,
+ .ctl_name = "E7500"},
+ [E7501] = {
+ .err_dev = PCI_DEVICE_ID_INTEL_7501_1_ERR,
+ .ctl_name = "E7501"},
+ [E7505] = {
+ .err_dev = PCI_DEVICE_ID_INTEL_7505_1_ERR,
+ .ctl_name = "E7505"},
+ [E7205] = {
+ .err_dev = PCI_DEVICE_ID_INTEL_7205_1_ERR,
+ .ctl_name = "E7205"},
+};
+
+
+/* FIXME - is this valid for both SECDED and S4ECD4ED? */
+static inline int e7xxx_find_channel(u16 syndrome)
+{
+ debugf3("MC: " __FILE__ ": %s()\n", __func__);
+
+ if ((syndrome & 0xff00) == 0)
+ return 0;
+ if ((syndrome & 0x00ff) == 0)
+ return 1;
+ if ((syndrome & 0xf000) == 0 || (syndrome & 0x0f00) == 0)
+ return 0;
+ return 1;
+}
+
+
+static unsigned long
+ctl_page_to_phys(struct mem_ctl_info *mci, unsigned long page)
+{
+ u32 remap;
+ struct e7xxx_pvt *pvt = (struct e7xxx_pvt *) mci->pvt_info;
+
+ debugf3("MC: " __FILE__ ": %s()\n", __func__);
+
+ if ((page < pvt->tolm) ||
+ ((page >= 0x100000) && (page < pvt->remapbase)))
+ return page;
+ remap = (page - pvt->tolm) + pvt->remapbase;
+ if (remap < pvt->remaplimit)
+ return remap;
+ printk(KERN_ERR "Invalid page %lx - out of range\n", page);
+ return pvt->tolm - 1;
+}
+
+
+static void process_ce(struct mem_ctl_info *mci, struct e7xxx_error_info *info)
+{
+ u32 error_1b, page;
+ u16 syndrome;
+ int row;
+ int channel;
+
+ debugf3("MC: " __FILE__ ": %s()\n", __func__);
+
+ /* read the error address */
+ error_1b = info->dram_celog_add;
+ /* FIXME - should use PAGE_SHIFT */
+ page = error_1b >> 6; /* convert the address to 4k page */
+ /* read the syndrome */
+ syndrome = info->dram_celog_syndrome;
+ /* FIXME - check for -1 */
+ row = edac_mc_find_csrow_by_page(mci, page);
+ /* convert syndrome to channel */
+ channel = e7xxx_find_channel(syndrome);
+ edac_mc_handle_ce(mci, page, 0, syndrome, row, channel,
+ "e7xxx CE");
+}
+
+
+static void process_ce_no_info(struct mem_ctl_info *mci)
+{
+ debugf3("MC: " __FILE__ ": %s()\n", __func__);
+ edac_mc_handle_ce_no_info(mci, "e7xxx CE log register overflow");
+}
+
+
+static void process_ue(struct mem_ctl_info *mci, struct e7xxx_error_info *info)
+{
+ u32 error_2b, block_page;
+ int row;
+
+ debugf3("MC: " __FILE__ ": %s()\n", __func__);
+
+ /* read the error address */
+ error_2b = info->dram_uelog_add;
+ /* FIXME - should use PAGE_SHIFT */
+ block_page = error_2b >> 6; /* convert to 4k address */
+ row = edac_mc_find_csrow_by_page(mci, block_page);
+ edac_mc_handle_ue(mci, block_page, 0, row, "e7xxx UE");
+}
+
+
+static void process_ue_no_info(struct mem_ctl_info *mci)
+{
+ debugf3("MC: " __FILE__ ": %s()\n", __func__);
+ edac_mc_handle_ue_no_info(mci, "e7xxx UE log register overflow");
+}
+
+
+static void e7xxx_get_error_info (struct mem_ctl_info *mci,
+ struct e7xxx_error_info *info)
+{
+ struct e7xxx_pvt *pvt;
+
+ pvt = (struct e7xxx_pvt *) mci->pvt_info;
+ pci_read_config_byte(pvt->bridge_ck, E7XXX_DRAM_FERR,
+ &info->dram_ferr);
+ pci_read_config_byte(pvt->bridge_ck, E7XXX_DRAM_NERR,
+ &info->dram_nerr);
+
+ if ((info->dram_ferr & 1) || (info->dram_nerr & 1)) {
+ pci_read_config_dword(pvt->bridge_ck, E7XXX_DRAM_CELOG_ADD,
+ &info->dram_celog_add);
+ pci_read_config_word(pvt->bridge_ck,
+ E7XXX_DRAM_CELOG_SYNDROME, &info->dram_celog_syndrome);
+ }
+
+ if ((info->dram_ferr & 2) || (info->dram_nerr & 2))
+ pci_read_config_dword(pvt->bridge_ck, E7XXX_DRAM_UELOG_ADD,
+ &info->dram_uelog_add);
+
+ if (info->dram_ferr & 3)
+ pci_write_bits8(pvt->bridge_ck, E7XXX_DRAM_FERR, 0x03,
+ 0x03);
+
+ if (info->dram_nerr & 3)
+ pci_write_bits8(pvt->bridge_ck, E7XXX_DRAM_NERR, 0x03,
+ 0x03);
+}
+
+
+static int e7xxx_process_error_info (struct mem_ctl_info *mci,
+ struct e7xxx_error_info *info, int handle_errors)
+{
+ int error_found;
+
+ error_found = 0;
+
+ /* decode and report errors */
+ if (info->dram_ferr & 1) { /* check first error correctable */
+ error_found = 1;
+
+ if (handle_errors)
+ process_ce(mci, info);
+ }
+
+ if (info->dram_ferr & 2) { /* check first error uncorrectable */
+ error_found = 1;
+
+ if (handle_errors)
+ process_ue(mci, info);
+ }
+
+ if (info->dram_nerr & 1) { /* check next error correctable */
+ error_found = 1;
+
+ if (handle_errors) {
+ if (info->dram_ferr & 1)
+ process_ce_no_info(mci);
+ else
+ process_ce(mci, info);
+ }
+ }
+
+ if (info->dram_nerr & 2) { /* check next error uncorrectable */
+ error_found = 1;
+
+ if (handle_errors) {
+ if (info->dram_ferr & 2)
+ process_ue_no_info(mci);
+ else
+ process_ue(mci, info);
+ }
+ }
+
+ return error_found;
+}
+
+
+static void e7xxx_check(struct mem_ctl_info *mci)
+{
+ struct e7xxx_error_info info;
+
+ debugf3("MC: " __FILE__ ": %s()\n", __func__);
+ e7xxx_get_error_info(mci, &info);
+ e7xxx_process_error_info(mci, &info, 1);
+}
+
+
+static int e7xxx_probe1(struct pci_dev *pdev, int dev_idx)
+{
+ int rc = -ENODEV;
+ int index;
+ u16 pci_data;
+ struct mem_ctl_info *mci = NULL;
+ struct e7xxx_pvt *pvt = NULL;
+ u32 drc;
+ int drc_chan = 1; /* Number of channels 0=1chan,1=2chan */
+ int drc_drbg = 1; /* DRB granularity 0=32mb,1=64mb */
+ int drc_ddim; /* DRAM Data Integrity Mode 0=none,2=edac */
+ u32 dra;
+ unsigned long last_cumul_size;
+
+
+ debugf0("MC: " __FILE__ ": %s(): mci\n", __func__);
+
+ /* need to find out the number of channels */
+ pci_read_config_dword(pdev, E7XXX_DRC, &drc);
+ /* only e7501 can be single channel */
+ if (dev_idx == E7501) {
+ drc_chan = ((drc >> 22) & 0x1);
+ drc_drbg = (drc >> 18) & 0x3;
+ }
+ drc_ddim = (drc >> 20) & 0x3;
+
+ mci = edac_mc_alloc(sizeof(*pvt), E7XXX_NR_CSROWS, drc_chan + 1);
+
+ if (mci == NULL) {
+ rc = -ENOMEM;
+ goto fail;
+ }
+
+ debugf3("MC: " __FILE__ ": %s(): init mci\n", __func__);
+
+ mci->mtype_cap = MEM_FLAG_RDDR;
+ mci->edac_ctl_cap =
+ EDAC_FLAG_NONE | EDAC_FLAG_SECDED | EDAC_FLAG_S4ECD4ED;
+ /* FIXME - what if different memory types are in different csrows? */
+ mci->mod_name = BS_MOD_STR;
+ mci->mod_ver = "$Revision: 1.5.2.9 $";
+ mci->pdev = pdev;
+
+ debugf3("MC: " __FILE__ ": %s(): init pvt\n", __func__);
+ pvt = (struct e7xxx_pvt *) mci->pvt_info;
+ pvt->dev_info = &e7xxx_devs[dev_idx];
+ pvt->bridge_ck = pci_get_device(PCI_VENDOR_ID_INTEL,
+ pvt->dev_info->err_dev,
+ pvt->bridge_ck);
+ if (!pvt->bridge_ck) {
+ printk(KERN_ERR
+ "MC: error reporting device not found:"
+ "vendor %x device 0x%x (broken BIOS?)\n",
+ PCI_VENDOR_ID_INTEL, e7xxx_devs[dev_idx].err_dev);
+ goto fail;
+ }
+
+ debugf3("MC: " __FILE__ ": %s(): more mci init\n", __func__);
+ mci->ctl_name = pvt->dev_info->ctl_name;
+
+ mci->edac_check = e7xxx_check;
+ mci->ctl_page_to_phys = ctl_page_to_phys;
+
+ /* find out the device types */
+ pci_read_config_dword(pdev, E7XXX_DRA, &dra);
+
+ /*
+ * The dram row boundary (DRB) reg values are boundary address
+ * for each DRAM row with a granularity of 32 or 64MB (single/dual
+ * channel operation). DRB regs are cumulative; therefore DRB7 will
+ * contain the total memory contained in all eight rows.
+ */
+ for (last_cumul_size = index = 0; index < mci->nr_csrows; index++) {
+ u8 value;
+ u32 cumul_size;
+ /* mem_dev 0=x8, 1=x4 */
+ int mem_dev = (dra >> (index * 4 + 3)) & 0x1;
+ struct csrow_info *csrow = &mci->csrows[index];
+
+ pci_read_config_byte(mci->pdev, E7XXX_DRB + index, &value);
+ /* convert a 64 or 32 MiB DRB to a page size. */
+ cumul_size = value << (25 + drc_drbg - PAGE_SHIFT);
+ debugf3("MC: " __FILE__ ": %s(): (%d) cumul_size 0x%x\n",
+ __func__, index, cumul_size);
+ if (cumul_size == last_cumul_size)
+ continue; /* not populated */
+
+ csrow->first_page = last_cumul_size;
+ csrow->last_page = cumul_size - 1;
+ csrow->nr_pages = cumul_size - last_cumul_size;
+ last_cumul_size = cumul_size;
+ csrow->grain = 1 << 12; /* 4KiB - resolution of CELOG */
+ csrow->mtype = MEM_RDDR; /* only one type supported */
+ csrow->dtype = mem_dev ? DEV_X4 : DEV_X8;
+
+ /*
+ * if single channel or x8 devices then SECDED
+ * if dual channel and x4 then S4ECD4ED
+ */
+ if (drc_ddim) {
+ if (drc_chan && mem_dev) {
+ csrow->edac_mode = EDAC_S4ECD4ED;
+ mci->edac_cap |= EDAC_FLAG_S4ECD4ED;
+ } else {
+ csrow->edac_mode = EDAC_SECDED;
+ mci->edac_cap |= EDAC_FLAG_SECDED;
+ }
+ } else
+ csrow->edac_mode = EDAC_NONE;
+ }
+
+ mci->edac_cap |= EDAC_FLAG_NONE;
+
+ debugf3("MC: " __FILE__ ": %s(): tolm, remapbase, remaplimit\n",
+ __func__);
+ /* load the top of low memory, remap base, and remap limit vars */
+ pci_read_config_word(mci->pdev, E7XXX_TOLM, &pci_data);
+ pvt->tolm = ((u32) pci_data) << 4;
+ pci_read_config_word(mci->pdev, E7XXX_REMAPBASE, &pci_data);
+ pvt->remapbase = ((u32) pci_data) << 14;
+ pci_read_config_word(mci->pdev, E7XXX_REMAPLIMIT, &pci_data);
+ pvt->remaplimit = ((u32) pci_data) << 14;
+ printk("tolm = %x, remapbase = %x, remaplimit = %x\n", pvt->tolm,
+ pvt->remapbase, pvt->remaplimit);
+
+ /* clear any pending errors, or initial state bits */
+ pci_write_bits8(pvt->bridge_ck, E7XXX_DRAM_FERR, 0x03, 0x03);
+ pci_write_bits8(pvt->bridge_ck, E7XXX_DRAM_NERR, 0x03, 0x03);
+
+ if (edac_mc_add_mc(mci) != 0) {
+ debugf3("MC: " __FILE__
+ ": %s(): failed edac_mc_add_mc()\n",
+ __func__);
+ goto fail;
+ }
+
+ /* get this far and it's successful */
+ debugf3("MC: " __FILE__ ": %s(): success\n", __func__);
+ return 0;
+
+fail:
+ if (mci != NULL) {
+ if(pvt != NULL && pvt->bridge_ck)
+ pci_dev_put(pvt->bridge_ck);
+ edac_mc_free(mci);
+ }
+
+ return rc;
+}
+
+/* returns count (>= 0), or negative on error */
+static int __devinit
+e7xxx_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
+{
+ debugf0("MC: " __FILE__ ": %s()\n", __func__);
+
+ /* wake up and enable device */
+ return pci_enable_device(pdev) ?
+ -EIO : e7xxx_probe1(pdev, ent->driver_data);
+}
+
+
+static void __devexit e7xxx_remove_one(struct pci_dev *pdev)
+{
+ struct mem_ctl_info *mci;
+ struct e7xxx_pvt *pvt;
+
+ debugf0(__FILE__ ": %s()\n", __func__);
+
+ if (((mci = edac_mc_find_mci_by_pdev(pdev)) != 0) &&
+ edac_mc_del_mc(mci)) {
+ pvt = (struct e7xxx_pvt *) mci->pvt_info;
+ pci_dev_put(pvt->bridge_ck);
+ edac_mc_free(mci);
+ }
+}
+
+
+static const struct pci_device_id e7xxx_pci_tbl[] __devinitdata = {
+ {PCI_VEND_DEV(INTEL, 7205_0), PCI_ANY_ID, PCI_ANY_ID, 0, 0,
+ E7205},
+ {PCI_VEND_DEV(INTEL, 7500_0), PCI_ANY_ID, PCI_ANY_ID, 0, 0,
+ E7500},
+ {PCI_VEND_DEV(INTEL, 7501_0), PCI_ANY_ID, PCI_ANY_ID, 0, 0,
+ E7501},
+ {PCI_VEND_DEV(INTEL, 7505_0), PCI_ANY_ID, PCI_ANY_ID, 0, 0,
+ E7505},
+ {0,} /* 0 terminated list. */
+};
+
+MODULE_DEVICE_TABLE(pci, e7xxx_pci_tbl);
+
+
+static struct pci_driver e7xxx_driver = {
+ .name = BS_MOD_STR,
+ .probe = e7xxx_init_one,
+ .remove = __devexit_p(e7xxx_remove_one),
+ .id_table = e7xxx_pci_tbl,
+};
+
+
+static int __init e7xxx_init(void)
+{
+ return pci_register_driver(&e7xxx_driver);
+}
+
+
+static void __exit e7xxx_exit(void)
+{
+ pci_unregister_driver(&e7xxx_driver);
+}
+
+module_init(e7xxx_init);
+module_exit(e7xxx_exit);
+
+
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("Linux Networx (http://lnxi.com) Thayne Harbaugh et al\n"
+ "Based on.work by Dan Hollis et al");
+MODULE_DESCRIPTION("MC support for Intel e7xxx memory controllers");
--- /dev/null
+/*
+ * edac_mc kernel module
+ * (C) 2005 Linux Networx (http://lnxi.com)
+ * This file may be distributed under the terms of the
+ * GNU General Public License.
+ *
+ * Written by Thayne Harbaugh
+ * Based on work by Dan Hollis <goemon at anime dot net> and others.
+ * http://www.anime.net/~goemon/linux-ecc/
+ *
+ * Modified by Dave Peterson and Doug Thompson
+ *
+ */
+
+
+#include <linux/config.h>
+#include <linux/version.h>
+#include <linux/module.h>
+#include <linux/proc_fs.h>
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <linux/smp.h>
+#include <linux/init.h>
+#include <linux/sysctl.h>
+#include <linux/highmem.h>
+#include <linux/timer.h>
+#include <linux/slab.h>
+#include <linux/jiffies.h>
+#include <linux/spinlock.h>
+#include <linux/list.h>
+#include <linux/sysdev.h>
+#include <linux/ctype.h>
+
+#include <asm/uaccess.h>
+#include <asm/page.h>
+#include <asm/edac.h>
+
+#include "edac_mc.h"
+
+#define EDAC_MC_VERSION "edac_mc Ver: 2.0.0 " __DATE__
+
+#ifdef CONFIG_EDAC_DEBUG
+/* Values of 0 to 4 will generate output */
+int edac_debug_level = 1;
+EXPORT_SYMBOL(edac_debug_level);
+#endif
+
+/* EDAC Controls, setable by module parameter, and sysfs */
+static int log_ue = 1;
+static int log_ce = 1;
+static int panic_on_ue = 1;
+static int poll_msec = 1000;
+
+static int check_pci_parity = 0; /* default YES check PCI parity */
+static int panic_on_pci_parity; /* default no panic on PCI Parity */
+static atomic_t pci_parity_count = ATOMIC_INIT(0);
+
+/* lock to memory controller's control array */
+static DECLARE_MUTEX(mem_ctls_mutex);
+static struct list_head mc_devices = LIST_HEAD_INIT(mc_devices);
+
+/* Structure of the whitelist and blacklist arrays */
+struct edac_pci_device_list {
+ unsigned int vendor; /* Vendor ID */
+ unsigned int device; /* Deviice ID */
+};
+
+
+#define MAX_LISTED_PCI_DEVICES 32
+
+/* List of PCI devices (vendor-id:device-id) that should be skipped */
+static struct edac_pci_device_list pci_blacklist[MAX_LISTED_PCI_DEVICES];
+static int pci_blacklist_count;
+
+/* List of PCI devices (vendor-id:device-id) that should be scanned */
+static struct edac_pci_device_list pci_whitelist[MAX_LISTED_PCI_DEVICES];
+static int pci_whitelist_count ;
+
+/* START sysfs data and methods */
+
+static const char *mem_types[] = {
+ [MEM_EMPTY] = "Empty",
+ [MEM_RESERVED] = "Reserved",
+ [MEM_UNKNOWN] = "Unknown",
+ [MEM_FPM] = "FPM",
+ [MEM_EDO] = "EDO",
+ [MEM_BEDO] = "BEDO",
+ [MEM_SDR] = "Unbuffered-SDR",
+ [MEM_RDR] = "Registered-SDR",
+ [MEM_DDR] = "Unbuffered-DDR",
+ [MEM_RDDR] = "Registered-DDR",
+ [MEM_RMBS] = "RMBS"
+};
+
+static const char *dev_types[] = {
+ [DEV_UNKNOWN] = "Unknown",
+ [DEV_X1] = "x1",
+ [DEV_X2] = "x2",
+ [DEV_X4] = "x4",
+ [DEV_X8] = "x8",
+ [DEV_X16] = "x16",
+ [DEV_X32] = "x32",
+ [DEV_X64] = "x64"
+};
+
+static const char *edac_caps[] = {
+ [EDAC_UNKNOWN] = "Unknown",
+ [EDAC_NONE] = "None",
+ [EDAC_RESERVED] = "Reserved",
+ [EDAC_PARITY] = "PARITY",
+ [EDAC_EC] = "EC",
+ [EDAC_SECDED] = "SECDED",
+ [EDAC_S2ECD2ED] = "S2ECD2ED",
+ [EDAC_S4ECD4ED] = "S4ECD4ED",
+ [EDAC_S8ECD8ED] = "S8ECD8ED",
+ [EDAC_S16ECD16ED] = "S16ECD16ED"
+};
+
+
+/* sysfs object: /sys/devices/system/edac */
+static struct sysdev_class edac_class = {
+ set_kset_name("edac"),
+};
+
+/* sysfs objects:
+ * /sys/devices/system/edac/mc
+ * /sys/devices/system/edac/pci
+ */
+static struct kobject edac_memctrl_kobj;
+static struct kobject edac_pci_kobj;
+
+/*
+ * /sys/devices/system/edac/mc;
+ * data structures and methods
+ */
+static ssize_t memctrl_string_show(void *ptr, char *buffer)
+{
+ char *value = (char*) ptr;
+ return sprintf(buffer, "%s\n", value);
+}
+
+static ssize_t memctrl_int_show(void *ptr, char *buffer)
+{
+ int *value = (int*) ptr;
+ return sprintf(buffer, "%d\n", *value);
+}
+
+static ssize_t memctrl_int_store(void *ptr, const char *buffer, size_t count)
+{
+ int *value = (int*) ptr;
+
+ if (isdigit(*buffer))
+ *value = simple_strtoul(buffer, NULL, 0);
+
+ return count;
+}
+
+struct memctrl_dev_attribute {
+ struct attribute attr;
+ void *value;
+ ssize_t (*show)(void *,char *);
+ ssize_t (*store)(void *, const char *, size_t);
+};
+
+/* Set of show/store abstract level functions for memory control object */
+static ssize_t
+memctrl_dev_show(struct kobject *kobj, struct attribute *attr, char *buffer)
+{
+ struct memctrl_dev_attribute *memctrl_dev;
+ memctrl_dev = (struct memctrl_dev_attribute*)attr;
+
+ if (memctrl_dev->show)
+ return memctrl_dev->show(memctrl_dev->value, buffer);
+ return -EIO;
+}
+
+static ssize_t
+memctrl_dev_store(struct kobject *kobj, struct attribute *attr,
+ const char *buffer, size_t count)
+{
+ struct memctrl_dev_attribute *memctrl_dev;
+ memctrl_dev = (struct memctrl_dev_attribute*)attr;
+
+ if (memctrl_dev->store)
+ return memctrl_dev->store(memctrl_dev->value, buffer, count);
+ return -EIO;
+}
+
+static struct sysfs_ops memctrlfs_ops = {
+ .show = memctrl_dev_show,
+ .store = memctrl_dev_store
+};
+
+#define MEMCTRL_ATTR(_name,_mode,_show,_store) \
+struct memctrl_dev_attribute attr_##_name = { \
+ .attr = {.name = __stringify(_name), .mode = _mode }, \
+ .value = &_name, \
+ .show = _show, \
+ .store = _store, \
+};
+
+#define MEMCTRL_STRING_ATTR(_name,_data,_mode,_show,_store) \
+struct memctrl_dev_attribute attr_##_name = { \
+ .attr = {.name = __stringify(_name), .mode = _mode }, \
+ .value = _data, \
+ .show = _show, \
+ .store = _store, \
+};
+
+/* cwrow<id> attribute f*/
+MEMCTRL_STRING_ATTR(mc_version,EDAC_MC_VERSION,S_IRUGO,memctrl_string_show,NULL);
+
+/* csrow<id> control files */
+MEMCTRL_ATTR(panic_on_ue,S_IRUGO|S_IWUSR,memctrl_int_show,memctrl_int_store);
+MEMCTRL_ATTR(log_ue,S_IRUGO|S_IWUSR,memctrl_int_show,memctrl_int_store);
+MEMCTRL_ATTR(log_ce,S_IRUGO|S_IWUSR,memctrl_int_show,memctrl_int_store);
+MEMCTRL_ATTR(poll_msec,S_IRUGO|S_IWUSR,memctrl_int_show,memctrl_int_store);
+
+
+/* Base Attributes of the memory ECC object */
+static struct memctrl_dev_attribute *memctrl_attr[] = {
+ &attr_panic_on_ue,
+ &attr_log_ue,
+ &attr_log_ce,
+ &attr_poll_msec,
+ &attr_mc_version,
+ NULL,
+};
+
+/* Main MC kobject release() function */
+static void edac_memctrl_master_release(struct kobject *kobj)
+{
+ debugf1("EDAC MC: " __FILE__ ": %s()\n", __func__);
+}
+
+static struct kobj_type ktype_memctrl = {
+ .release = edac_memctrl_master_release,
+ .sysfs_ops = &memctrlfs_ops,
+ .default_attrs = (struct attribute **) memctrl_attr,
+};
+
+
+/* Initialize the main sysfs entries for edac:
+ * /sys/devices/system/edac
+ *
+ * and children
+ *
+ * Return: 0 SUCCESS
+ * !0 FAILURE
+ */
+static int edac_sysfs_memctrl_setup(void)
+{
+ int err=0;
+
+ debugf1("MC: " __FILE__ ": %s()\n", __func__);
+
+ /* create the /sys/devices/system/edac directory */
+ err = sysdev_class_register(&edac_class);
+ if (!err) {
+ /* Init the MC's kobject */
+ memset(&edac_memctrl_kobj, 0, sizeof (edac_memctrl_kobj));
+ kobject_init(&edac_memctrl_kobj);
+
+ edac_memctrl_kobj.parent = &edac_class.kset.kobj;
+ edac_memctrl_kobj.ktype = &ktype_memctrl;
+
+ /* generate sysfs "..../edac/mc" */
+ err = kobject_set_name(&edac_memctrl_kobj,"mc");
+ if (!err) {
+ /* FIXME: maybe new sysdev_create_subdir() */
+ err = kobject_register(&edac_memctrl_kobj);
+ if (err) {
+ debugf1("Failed to register '.../edac/mc'\n");
+ } else {
+ debugf1("Registered '.../edac/mc' kobject\n");
+ }
+ }
+ } else {
+ debugf1(KERN_WARNING "__FILE__ %s() error=%d\n", __func__,err);
+ }
+
+ return err;
+}
+
+/*
+ * MC teardown:
+ * the '..../edac/mc' kobject followed by '..../edac' itself
+ */
+static void edac_sysfs_memctrl_teardown(void)
+{
+ debugf0("MC: " __FILE__ ": %s()\n", __func__);
+
+ /* Unregister the MC's kobject */
+ kobject_unregister(&edac_memctrl_kobj);
+
+ /* release the master edac mc kobject */
+ kobject_put(&edac_memctrl_kobj);
+
+ /* Unregister the 'edac' object */
+ sysdev_class_unregister(&edac_class);
+}
+
+/*
+ * /sys/devices/system/edac/pci;
+ * data structures and methods
+ */
+
+struct list_control {
+ struct edac_pci_device_list *list;
+ int *count;
+};
+
+/* Output the list as: vendor_id:device:id<,vendor_id:device_id> */
+static ssize_t edac_pci_list_string_show(void *ptr, char *buffer)
+{
+ struct list_control *listctl;
+ struct edac_pci_device_list *list;
+ char *p = buffer;
+ int len=0;
+ int i;
+
+ listctl = ptr;
+ list = listctl->list;
+
+ for (i = 0; i < *(listctl->count); i++, list++ ) {
+ if (len > 0)
+ len += snprintf(p + len, (PAGE_SIZE-len), ",");
+
+ len += snprintf(p + len,
+ (PAGE_SIZE-len),
+ "%x:%x",
+ list->vendor,list->device);
+ }
+
+ len += snprintf(p + len,(PAGE_SIZE-len), "\n");
+
+ return (ssize_t) len;
+}
+
+/**
+ *
+ * Scan string from **s to **e looking for one 'vendor:device' tuple
+ * where each field is a hex value
+ *
+ * return 0 if an entry is NOT found
+ * return 1 if an entry is found
+ * fill in *vendor_id and *device_id with values found
+ *
+ * In both cases, make sure *s has been moved forward toward *e
+ */
+static int parse_one_device(const char **s,const char **e,
+ unsigned int *vendor_id, unsigned int *device_id)
+{
+ const char *runner, *p;
+
+ /* if null byte, we are done */
+ if (!**s) {
+ (*s)++; /* keep *s moving */
+ return 0;
+ }
+
+ /* skip over newlines & whitespace */
+ if ((**s == '\n') || isspace(**s)) {
+ (*s)++;
+ return 0;
+ }
+
+ if (!isxdigit(**s)) {
+ (*s)++;
+ return 0;
+ }
+
+ /* parse vendor_id */
+ runner = *s;
+ while (runner < *e) {
+ /* scan for vendor:device delimiter */
+ if (*runner == ':') {
+ *vendor_id = simple_strtol((char*) *s, (char**) &p, 16);
+ runner = p + 1;
+ break;
+ }
+ runner++;
+ }
+
+ if (!isxdigit(*runner)) {
+ *s = ++runner;
+ return 0;
+ }
+
+ /* parse device_id */
+ if (runner < *e) {
+ *device_id = simple_strtol((char*)runner, (char**)&p, 16);
+ runner = p;
+ }
+
+ *s = runner;
+
+ return 1;
+}
+
+static ssize_t edac_pci_list_string_store(void *ptr, const char *buffer,
+ size_t count)
+{
+ struct list_control *listctl;
+ struct edac_pci_device_list *list;
+ unsigned int vendor_id, device_id;
+ const char *s, *e;
+ int *index;
+
+ s = (char*)buffer;
+ e = s + count;
+
+ listctl = ptr;
+ list = listctl->list;
+ index = listctl->count;
+
+ *index = 0;
+ while (*index < MAX_LISTED_PCI_DEVICES) {
+
+ if (parse_one_device(&s,&e,&vendor_id,&device_id)) {
+ list[ *index ].vendor = vendor_id;
+ list[ *index ].device = device_id;
+ (*index)++;
+ }
+
+ /* check for all data consume */
+ if (s >= e)
+ break;
+ }
+
+ return count;
+}
+
+static ssize_t edac_pci_int_show(void *ptr, char *buffer)
+{
+ int *value = ptr;
+ return sprintf(buffer,"%d\n",*value);
+}
+
+static ssize_t edac_pci_int_store(void *ptr, const char *buffer, size_t count)
+{
+ int *value = ptr;
+
+ if (isdigit(*buffer))
+ *value = simple_strtoul(buffer,NULL,0);
+
+ return count;
+}
+
+struct edac_pci_dev_attribute {
+ struct attribute attr;
+ void *value;
+ ssize_t (*show)(void *,char *);
+ ssize_t (*store)(void *, const char *,size_t);
+};
+
+/* Set of show/store abstract level functions for PCI Parity object */
+static ssize_t edac_pci_dev_show(struct kobject *kobj, struct attribute *attr,
+ char *buffer)
+{
+ struct edac_pci_dev_attribute *edac_pci_dev;
+ edac_pci_dev= (struct edac_pci_dev_attribute*)attr;
+
+ if (edac_pci_dev->show)
+ return edac_pci_dev->show(edac_pci_dev->value, buffer);
+ return -EIO;
+}
+
+static ssize_t edac_pci_dev_store(struct kobject *kobj, struct attribute *attr,
+ const char *buffer, size_t count)
+{
+ struct edac_pci_dev_attribute *edac_pci_dev;
+ edac_pci_dev= (struct edac_pci_dev_attribute*)attr;
+
+ if (edac_pci_dev->show)
+ return edac_pci_dev->store(edac_pci_dev->value, buffer, count);
+ return -EIO;
+}
+
+static struct sysfs_ops edac_pci_sysfs_ops = {
+ .show = edac_pci_dev_show,
+ .store = edac_pci_dev_store
+};
+
+
+#define EDAC_PCI_ATTR(_name,_mode,_show,_store) \
+struct edac_pci_dev_attribute edac_pci_attr_##_name = { \
+ .attr = {.name = __stringify(_name), .mode = _mode }, \
+ .value = &_name, \
+ .show = _show, \
+ .store = _store, \
+};
+
+#define EDAC_PCI_STRING_ATTR(_name,_data,_mode,_show,_store) \
+struct edac_pci_dev_attribute edac_pci_attr_##_name = { \
+ .attr = {.name = __stringify(_name), .mode = _mode }, \
+ .value = _data, \
+ .show = _show, \
+ .store = _store, \
+};
+
+static struct list_control pci_whitelist_control = {
+ .list = pci_whitelist,
+ .count = &pci_whitelist_count
+};
+
+static struct list_control pci_blacklist_control = {
+ .list = pci_blacklist,
+ .count = &pci_blacklist_count
+};
+
+/* whitelist attribute */
+EDAC_PCI_STRING_ATTR(pci_parity_whitelist,
+ &pci_whitelist_control,
+ S_IRUGO|S_IWUSR,
+ edac_pci_list_string_show,
+ edac_pci_list_string_store);
+
+EDAC_PCI_STRING_ATTR(pci_parity_blacklist,
+ &pci_blacklist_control,
+ S_IRUGO|S_IWUSR,
+ edac_pci_list_string_show,
+ edac_pci_list_string_store);
+
+/* PCI Parity control files */
+EDAC_PCI_ATTR(check_pci_parity,S_IRUGO|S_IWUSR,edac_pci_int_show,edac_pci_int_store);
+EDAC_PCI_ATTR(panic_on_pci_parity,S_IRUGO|S_IWUSR,edac_pci_int_show,edac_pci_int_store);
+EDAC_PCI_ATTR(pci_parity_count,S_IRUGO,edac_pci_int_show,NULL);
+
+/* Base Attributes of the memory ECC object */
+static struct edac_pci_dev_attribute *edac_pci_attr[] = {
+ &edac_pci_attr_check_pci_parity,
+ &edac_pci_attr_panic_on_pci_parity,
+ &edac_pci_attr_pci_parity_count,
+ &edac_pci_attr_pci_parity_whitelist,
+ &edac_pci_attr_pci_parity_blacklist,
+ NULL,
+};
+
+/* No memory to release */
+static void edac_pci_release(struct kobject *kobj)
+{
+ debugf1("EDAC PCI: " __FILE__ ": %s()\n", __func__);
+}
+
+static struct kobj_type ktype_edac_pci = {
+ .release = edac_pci_release,
+ .sysfs_ops = &edac_pci_sysfs_ops,
+ .default_attrs = (struct attribute **) edac_pci_attr,
+};
+
+/**
+ * edac_sysfs_pci_setup()
+ *
+ */
+static int edac_sysfs_pci_setup(void)
+{
+ int err;
+
+ debugf1("MC: " __FILE__ ": %s()\n", __func__);
+
+ memset(&edac_pci_kobj, 0, sizeof(edac_pci_kobj));
+
+ kobject_init(&edac_pci_kobj);
+ edac_pci_kobj.parent = &edac_class.kset.kobj;
+ edac_pci_kobj.ktype = &ktype_edac_pci;
+
+ err = kobject_set_name(&edac_pci_kobj, "pci");
+ if (!err) {
+ /* Instanstiate the csrow object */
+ /* FIXME: maybe new sysdev_create_subdir() */
+ err = kobject_register(&edac_pci_kobj);
+ if (err)
+ debugf1("Failed to register '.../edac/pci'\n");
+ else
+ debugf1("Registered '.../edac/pci' kobject\n");
+ }
+ return err;
+}
+
+
+static void edac_sysfs_pci_teardown(void)
+{
+ debugf0("MC: " __FILE__ ": %s()\n", __func__);
+
+ kobject_unregister(&edac_pci_kobj);
+ kobject_put(&edac_pci_kobj);
+}
+
+/* EDAC sysfs CSROW data structures and methods */
+
+/* Set of more detailed csrow<id> attribute show/store functions */
+static ssize_t csrow_ch0_dimm_label_show(struct csrow_info *csrow, char *data)
+{
+ ssize_t size = 0;
+
+ if (csrow->nr_channels > 0) {
+ size = snprintf(data, EDAC_MC_LABEL_LEN,"%s\n",
+ csrow->channels[0].label);
+ }
+ return size;
+}
+
+static ssize_t csrow_ch1_dimm_label_show(struct csrow_info *csrow, char *data)
+{
+ ssize_t size = 0;
+
+ if (csrow->nr_channels > 0) {
+ size = snprintf(data, EDAC_MC_LABEL_LEN, "%s\n",
+ csrow->channels[1].label);
+ }
+ return size;
+}
+
+static ssize_t csrow_ch0_dimm_label_store(struct csrow_info *csrow,
+ const char *data, size_t size)
+{
+ ssize_t max_size = 0;
+
+ if (csrow->nr_channels > 0) {
+ max_size = min((ssize_t)size,(ssize_t)EDAC_MC_LABEL_LEN-1);
+ strncpy(csrow->channels[0].label, data, max_size);
+ csrow->channels[0].label[max_size] = '\0';
+ }
+ return size;
+}
+
+static ssize_t csrow_ch1_dimm_label_store(struct csrow_info *csrow,
+ const char *data, size_t size)
+{
+ ssize_t max_size = 0;
+
+ if (csrow->nr_channels > 1) {
+ max_size = min((ssize_t)size,(ssize_t)EDAC_MC_LABEL_LEN-1);
+ strncpy(csrow->channels[1].label, data, max_size);
+ csrow->channels[1].label[max_size] = '\0';
+ }
+ return max_size;
+}
+
+static ssize_t csrow_ue_count_show(struct csrow_info *csrow, char *data)
+{
+ return sprintf(data,"%u\n", csrow->ue_count);
+}
+
+static ssize_t csrow_ce_count_show(struct csrow_info *csrow, char *data)
+{
+ return sprintf(data,"%u\n", csrow->ce_count);
+}
+
+static ssize_t csrow_ch0_ce_count_show(struct csrow_info *csrow, char *data)
+{
+ ssize_t size = 0;
+
+ if (csrow->nr_channels > 0) {
+ size = sprintf(data,"%u\n", csrow->channels[0].ce_count);
+ }
+ return size;
+}
+
+static ssize_t csrow_ch1_ce_count_show(struct csrow_info *csrow, char *data)
+{
+ ssize_t size = 0;
+
+ if (csrow->nr_channels > 1) {
+ size = sprintf(data,"%u\n", csrow->channels[1].ce_count);
+ }
+ return size;
+}
+
+static ssize_t csrow_size_show(struct csrow_info *csrow, char *data)
+{
+ return sprintf(data,"%u\n", PAGES_TO_MiB(csrow->nr_pages));
+}
+
+static ssize_t csrow_mem_type_show(struct csrow_info *csrow, char *data)
+{
+ return sprintf(data,"%s\n", mem_types[csrow->mtype]);
+}
+
+static ssize_t csrow_dev_type_show(struct csrow_info *csrow, char *data)
+{
+ return sprintf(data,"%s\n", dev_types[csrow->dtype]);
+}
+
+static ssize_t csrow_edac_mode_show(struct csrow_info *csrow, char *data)
+{
+ return sprintf(data,"%s\n", edac_caps[csrow->edac_mode]);
+}
+
+struct csrowdev_attribute {
+ struct attribute attr;
+ ssize_t (*show)(struct csrow_info *,char *);
+ ssize_t (*store)(struct csrow_info *, const char *,size_t);
+};
+
+#define to_csrow(k) container_of(k, struct csrow_info, kobj)
+#define to_csrowdev_attr(a) container_of(a, struct csrowdev_attribute, attr)
+
+/* Set of show/store higher level functions for csrow objects */
+static ssize_t csrowdev_show(struct kobject *kobj, struct attribute *attr,
+ char *buffer)
+{
+ struct csrow_info *csrow = to_csrow(kobj);
+ struct csrowdev_attribute *csrowdev_attr = to_csrowdev_attr(attr);
+
+ if (csrowdev_attr->show)
+ return csrowdev_attr->show(csrow, buffer);
+ return -EIO;
+}
+
+static ssize_t csrowdev_store(struct kobject *kobj, struct attribute *attr,
+ const char *buffer, size_t count)
+{
+ struct csrow_info *csrow = to_csrow(kobj);
+ struct csrowdev_attribute * csrowdev_attr = to_csrowdev_attr(attr);
+
+ if (csrowdev_attr->store)
+ return csrowdev_attr->store(csrow, buffer, count);
+ return -EIO;
+}
+
+static struct sysfs_ops csrowfs_ops = {
+ .show = csrowdev_show,
+ .store = csrowdev_store
+};
+
+#define CSROWDEV_ATTR(_name,_mode,_show,_store) \
+struct csrowdev_attribute attr_##_name = { \
+ .attr = {.name = __stringify(_name), .mode = _mode }, \
+ .show = _show, \
+ .store = _store, \
+};
+
+/* cwrow<id>/attribute files */
+CSROWDEV_ATTR(size_mb,S_IRUGO,csrow_size_show,NULL);
+CSROWDEV_ATTR(dev_type,S_IRUGO,csrow_dev_type_show,NULL);
+CSROWDEV_ATTR(mem_type,S_IRUGO,csrow_mem_type_show,NULL);
+CSROWDEV_ATTR(edac_mode,S_IRUGO,csrow_edac_mode_show,NULL);
+CSROWDEV_ATTR(ue_count,S_IRUGO,csrow_ue_count_show,NULL);
+CSROWDEV_ATTR(ce_count,S_IRUGO,csrow_ce_count_show,NULL);
+CSROWDEV_ATTR(ch0_ce_count,S_IRUGO,csrow_ch0_ce_count_show,NULL);
+CSROWDEV_ATTR(ch1_ce_count,S_IRUGO,csrow_ch1_ce_count_show,NULL);
+
+/* control/attribute files */
+CSROWDEV_ATTR(ch0_dimm_label,S_IRUGO|S_IWUSR,
+ csrow_ch0_dimm_label_show,
+ csrow_ch0_dimm_label_store);
+CSROWDEV_ATTR(ch1_dimm_label,S_IRUGO|S_IWUSR,
+ csrow_ch1_dimm_label_show,
+ csrow_ch1_dimm_label_store);
+
+
+/* Attributes of the CSROW<id> object */
+static struct csrowdev_attribute *csrow_attr[] = {
+ &attr_dev_type,
+ &attr_mem_type,
+ &attr_edac_mode,
+ &attr_size_mb,
+ &attr_ue_count,
+ &attr_ce_count,
+ &attr_ch0_ce_count,
+ &attr_ch1_ce_count,
+ &attr_ch0_dimm_label,
+ &attr_ch1_dimm_label,
+ NULL,
+};
+
+
+/* No memory to release */
+static void edac_csrow_instance_release(struct kobject *kobj)
+{
+ debugf1("EDAC MC: " __FILE__ ": %s()\n", __func__);
+}
+
+static struct kobj_type ktype_csrow = {
+ .release = edac_csrow_instance_release,
+ .sysfs_ops = &csrowfs_ops,
+ .default_attrs = (struct attribute **) csrow_attr,
+};
+
+/* Create a CSROW object under specifed edac_mc_device */
+static int edac_create_csrow_object(struct kobject *edac_mci_kobj,
+ struct csrow_info *csrow, int index )
+{
+ int err = 0;
+
+ debugf0("MC: " __FILE__ ": %s()\n", __func__);
+
+ memset(&csrow->kobj, 0, sizeof(csrow->kobj));
+
+ /* generate ..../edac/mc/mc<id>/csrow<index> */
+
+ kobject_init(&csrow->kobj);
+ csrow->kobj.parent = edac_mci_kobj;
+ csrow->kobj.ktype = &ktype_csrow;
+
+ /* name this instance of csrow<id> */
+ err = kobject_set_name(&csrow->kobj,"csrow%d",index);
+ if (!err) {
+ /* Instanstiate the csrow object */
+ err = kobject_register(&csrow->kobj);
+ if (err)
+ debugf0("Failed to register CSROW%d\n",index);
+ else
+ debugf0("Registered CSROW%d\n",index);
+ }
+
+ return err;
+}
+
+/* sysfs data structures and methods for the MCI kobjects */
+
+static ssize_t mci_reset_counters_store(struct mem_ctl_info *mci,
+ const char *data, size_t count )
+{
+ int row, chan;
+
+ mci->ue_noinfo_count = 0;
+ mci->ce_noinfo_count = 0;
+ mci->ue_count = 0;
+ mci->ce_count = 0;
+ for (row = 0; row < mci->nr_csrows; row++) {
+ struct csrow_info *ri = &mci->csrows[row];
+
+ ri->ue_count = 0;
+ ri->ce_count = 0;
+ for (chan = 0; chan < ri->nr_channels; chan++)
+ ri->channels[chan].ce_count = 0;
+ }
+ mci->start_time = jiffies;
+
+ return count;
+}
+
+static ssize_t mci_ue_count_show(struct mem_ctl_info *mci, char *data)
+{
+ return sprintf(data,"%d\n", mci->ue_count);
+}
+
+static ssize_t mci_ce_count_show(struct mem_ctl_info *mci, char *data)
+{
+ return sprintf(data,"%d\n", mci->ce_count);
+}
+
+static ssize_t mci_ce_noinfo_show(struct mem_ctl_info *mci, char *data)
+{
+ return sprintf(data,"%d\n", mci->ce_noinfo_count);
+}
+
+static ssize_t mci_ue_noinfo_show(struct mem_ctl_info *mci, char *data)
+{
+ return sprintf(data,"%d\n", mci->ue_noinfo_count);
+}
+
+static ssize_t mci_seconds_show(struct mem_ctl_info *mci, char *data)
+{
+ return sprintf(data,"%ld\n", (jiffies - mci->start_time) / HZ);
+}
+
+static ssize_t mci_mod_name_show(struct mem_ctl_info *mci, char *data)
+{
+ return sprintf(data,"%s %s\n", mci->mod_name, mci->mod_ver);
+}
+
+static ssize_t mci_ctl_name_show(struct mem_ctl_info *mci, char *data)
+{
+ return sprintf(data,"%s\n", mci->ctl_name);
+}
+
+static int mci_output_edac_cap(char *buf, unsigned long edac_cap)
+{
+ char *p = buf;
+ int bit_idx;
+
+ for (bit_idx = 0; bit_idx < 8 * sizeof(edac_cap); bit_idx++) {
+ if ((edac_cap >> bit_idx) & 0x1)
+ p += sprintf(p, "%s ", edac_caps[bit_idx]);
+ }
+
+ return p - buf;
+}
+
+static ssize_t mci_edac_capability_show(struct mem_ctl_info *mci, char *data)
+{
+ char *p = data;
+
+ p += mci_output_edac_cap(p,mci->edac_ctl_cap);
+ p += sprintf(p, "\n");
+
+ return p - data;
+}
+
+static ssize_t mci_edac_current_capability_show(struct mem_ctl_info *mci,
+ char *data)
+{
+ char *p = data;
+
+ p += mci_output_edac_cap(p,mci->edac_cap);
+ p += sprintf(p, "\n");
+
+ return p - data;
+}
+
+static int mci_output_mtype_cap(char *buf, unsigned long mtype_cap)
+{
+ char *p = buf;
+ int bit_idx;
+
+ for (bit_idx = 0; bit_idx < 8 * sizeof(mtype_cap); bit_idx++) {
+ if ((mtype_cap >> bit_idx) & 0x1)
+ p += sprintf(p, "%s ", mem_types[bit_idx]);
+ }
+
+ return p - buf;
+}
+
+static ssize_t mci_supported_mem_type_show(struct mem_ctl_info *mci, char *data)
+{
+ char *p = data;
+
+ p += mci_output_mtype_cap(p,mci->mtype_cap);
+ p += sprintf(p, "\n");
+
+ return p - data;
+}
+
+static ssize_t mci_size_mb_show(struct mem_ctl_info *mci, char *data)
+{
+ int total_pages, csrow_idx;
+
+ for (total_pages = csrow_idx = 0; csrow_idx < mci->nr_csrows;
+ csrow_idx++) {
+ struct csrow_info *csrow = &mci->csrows[csrow_idx];
+
+ if (!csrow->nr_pages)
+ continue;
+ total_pages += csrow->nr_pages;
+ }
+
+ return sprintf(data,"%u\n", PAGES_TO_MiB(total_pages));
+}
+
+struct mcidev_attribute {
+ struct attribute attr;
+ ssize_t (*show)(struct mem_ctl_info *,char *);
+ ssize_t (*store)(struct mem_ctl_info *, const char *,size_t);
+};
+
+#define to_mci(k) container_of(k, struct mem_ctl_info, edac_mci_kobj)
+#define to_mcidev_attr(a) container_of(a, struct mcidev_attribute, attr)
+
+static ssize_t mcidev_show(struct kobject *kobj, struct attribute *attr,
+ char *buffer)
+{
+ struct mem_ctl_info *mem_ctl_info = to_mci(kobj);
+ struct mcidev_attribute * mcidev_attr = to_mcidev_attr(attr);
+
+ if (mcidev_attr->show)
+ return mcidev_attr->show(mem_ctl_info, buffer);
+ return -EIO;
+}
+
+static ssize_t mcidev_store(struct kobject *kobj, struct attribute *attr,
+ const char *buffer, size_t count)
+{
+ struct mem_ctl_info *mem_ctl_info = to_mci(kobj);
+ struct mcidev_attribute * mcidev_attr = to_mcidev_attr(attr);
+
+ if (mcidev_attr->store)
+ return mcidev_attr->store(mem_ctl_info, buffer, count);
+ return -EIO;
+}
+
+static struct sysfs_ops mci_ops = {
+ .show = mcidev_show,
+ .store = mcidev_store
+};
+
+#define MCIDEV_ATTR(_name,_mode,_show,_store) \
+struct mcidev_attribute mci_attr_##_name = { \
+ .attr = {.name = __stringify(_name), .mode = _mode }, \
+ .show = _show, \
+ .store = _store, \
+};
+
+/* Control file */
+MCIDEV_ATTR(reset_counters,S_IWUSR,NULL,mci_reset_counters_store);
+
+/* Attribute files */
+MCIDEV_ATTR(mc_name,S_IRUGO,mci_ctl_name_show,NULL);
+MCIDEV_ATTR(module_name,S_IRUGO,mci_mod_name_show,NULL);
+MCIDEV_ATTR(edac_capability,S_IRUGO,mci_edac_capability_show,NULL);
+MCIDEV_ATTR(size_mb,S_IRUGO,mci_size_mb_show,NULL);
+MCIDEV_ATTR(seconds_since_reset,S_IRUGO,mci_seconds_show,NULL);
+MCIDEV_ATTR(ue_noinfo_count,S_IRUGO,mci_ue_noinfo_show,NULL);
+MCIDEV_ATTR(ce_noinfo_count,S_IRUGO,mci_ce_noinfo_show,NULL);
+MCIDEV_ATTR(ue_count,S_IRUGO,mci_ue_count_show,NULL);
+MCIDEV_ATTR(ce_count,S_IRUGO,mci_ce_count_show,NULL);
+MCIDEV_ATTR(edac_current_capability,S_IRUGO,
+ mci_edac_current_capability_show,NULL);
+MCIDEV_ATTR(supported_mem_type,S_IRUGO,
+ mci_supported_mem_type_show,NULL);
+
+
+static struct mcidev_attribute *mci_attr[] = {
+ &mci_attr_reset_counters,
+ &mci_attr_module_name,
+ &mci_attr_mc_name,
+ &mci_attr_edac_capability,
+ &mci_attr_edac_current_capability,
+ &mci_attr_supported_mem_type,
+ &mci_attr_size_mb,
+ &mci_attr_seconds_since_reset,
+ &mci_attr_ue_noinfo_count,
+ &mci_attr_ce_noinfo_count,
+ &mci_attr_ue_count,
+ &mci_attr_ce_count,
+ NULL
+};
+
+
+/*
+ * Release of a MC controlling instance
+ */
+static void edac_mci_instance_release(struct kobject *kobj)
+{
+ struct mem_ctl_info *mci;
+ mci = container_of(kobj,struct mem_ctl_info,edac_mci_kobj);
+
+ debugf0("MC: " __FILE__ ": %s() idx=%d calling kfree\n",
+ __func__, mci->mc_idx);
+
+ kfree(mci);
+}
+
+static struct kobj_type ktype_mci = {
+ .release = edac_mci_instance_release,
+ .sysfs_ops = &mci_ops,
+ .default_attrs = (struct attribute **) mci_attr,
+};
+
+#define EDAC_DEVICE_SYMLINK "device"
+
+/*
+ * Create a new Memory Controller kobject instance,
+ * mc<id> under the 'mc' directory
+ *
+ * Return:
+ * 0 Success
+ * !0 Failure
+ */
+static int edac_create_sysfs_mci_device(struct mem_ctl_info *mci)
+{
+ int i;
+ int err;
+ struct csrow_info *csrow;
+ struct kobject *edac_mci_kobj=&mci->edac_mci_kobj;
+
+ debugf0("MC: " __FILE__ ": %s() idx=%d\n", __func__, mci->mc_idx);
+
+ memset(edac_mci_kobj, 0, sizeof(*edac_mci_kobj));
+ kobject_init(edac_mci_kobj);
+
+ /* set the name of the mc<id> object */
+ err = kobject_set_name(edac_mci_kobj,"mc%d",mci->mc_idx);
+ if (err)
+ return err;
+
+ /* link to our parent the '..../edac/mc' object */
+ edac_mci_kobj->parent = &edac_memctrl_kobj;
+ edac_mci_kobj->ktype = &ktype_mci;
+
+ /* register the mc<id> kobject */
+ err = kobject_register(edac_mci_kobj);
+ if (err)
+ return err;
+
+ /* create a symlink for the device */
+ err = sysfs_create_link(edac_mci_kobj, &mci->pdev->dev.kobj,
+ EDAC_DEVICE_SYMLINK);
+ if (err) {
+ kobject_unregister(edac_mci_kobj);
+ return err;
+ }
+
+ /* Make directories for each CSROW object
+ * under the mc<id> kobject
+ */
+ for (i = 0; i < mci->nr_csrows; i++) {
+
+ csrow = &mci->csrows[i];
+
+ /* Only expose populated CSROWs */
+ if (csrow->nr_pages > 0) {
+ err = edac_create_csrow_object(edac_mci_kobj,csrow,i);
+ if (err)
+ goto fail;
+ }
+ }
+
+ /* Mark this MCI instance as having sysfs entries */
+ mci->sysfs_active = MCI_SYSFS_ACTIVE;
+
+ return 0;
+
+
+ /* CSROW error: backout what has already been registered, */
+fail:
+ for ( i--; i >= 0; i--) {
+ if (csrow->nr_pages > 0) {
+ kobject_unregister(&mci->csrows[i].kobj);
+ kobject_put(&mci->csrows[i].kobj);
+ }
+ }
+
+ kobject_unregister(edac_mci_kobj);
+ kobject_put(edac_mci_kobj);
+
+ return err;
+}
+
+/*
+ * remove a Memory Controller instance
+ */
+static void edac_remove_sysfs_mci_device(struct mem_ctl_info *mci)
+{
+ int i;
+
+ debugf0("MC: " __FILE__ ": %s()\n", __func__);
+
+ /* remove all csrow kobjects */
+ for (i = 0; i < mci->nr_csrows; i++) {
+ if (mci->csrows[i].nr_pages > 0) {
+ kobject_unregister(&mci->csrows[i].kobj);
+ kobject_put(&mci->csrows[i].kobj);
+ }
+ }
+
+ sysfs_remove_link(&mci->edac_mci_kobj, EDAC_DEVICE_SYMLINK);
+
+ kobject_unregister(&mci->edac_mci_kobj);
+ kobject_put(&mci->edac_mci_kobj);
+}
+
+/* END OF sysfs data and methods */
+
+#ifdef CONFIG_EDAC_DEBUG
+
+EXPORT_SYMBOL(edac_mc_dump_channel);
+
+void edac_mc_dump_channel(struct channel_info *chan)
+{
+ debugf4("\tchannel = %p\n", chan);
+ debugf4("\tchannel->chan_idx = %d\n", chan->chan_idx);
+ debugf4("\tchannel->ce_count = %d\n", chan->ce_count);
+ debugf4("\tchannel->label = '%s'\n", chan->label);
+ debugf4("\tchannel->csrow = %p\n\n", chan->csrow);
+}
+
+
+EXPORT_SYMBOL(edac_mc_dump_csrow);
+
+void edac_mc_dump_csrow(struct csrow_info *csrow)
+{
+ debugf4("\tcsrow = %p\n", csrow);
+ debugf4("\tcsrow->csrow_idx = %d\n", csrow->csrow_idx);
+ debugf4("\tcsrow->first_page = 0x%lx\n",
+ csrow->first_page);
+ debugf4("\tcsrow->last_page = 0x%lx\n", csrow->last_page);
+ debugf4("\tcsrow->page_mask = 0x%lx\n", csrow->page_mask);
+ debugf4("\tcsrow->nr_pages = 0x%x\n", csrow->nr_pages);
+ debugf4("\tcsrow->nr_channels = %d\n",
+ csrow->nr_channels);
+ debugf4("\tcsrow->channels = %p\n", csrow->channels);
+ debugf4("\tcsrow->mci = %p\n\n", csrow->mci);
+}
+
+
+EXPORT_SYMBOL(edac_mc_dump_mci);
+
+void edac_mc_dump_mci(struct mem_ctl_info *mci)
+{
+ debugf3("\tmci = %p\n", mci);
+ debugf3("\tmci->mtype_cap = %lx\n", mci->mtype_cap);
+ debugf3("\tmci->edac_ctl_cap = %lx\n", mci->edac_ctl_cap);
+ debugf3("\tmci->edac_cap = %lx\n", mci->edac_cap);
+ debugf4("\tmci->edac_check = %p\n", mci->edac_check);
+ debugf3("\tmci->nr_csrows = %d, csrows = %p\n",
+ mci->nr_csrows, mci->csrows);
+ debugf3("\tpdev = %p\n", mci->pdev);
+ debugf3("\tmod_name:ctl_name = %s:%s\n",
+ mci->mod_name, mci->ctl_name);
+ debugf3("\tpvt_info = %p\n\n", mci->pvt_info);
+}
+
+
+#endif /* CONFIG_EDAC_DEBUG */
+
+/* 'ptr' points to a possibly unaligned item X such that sizeof(X) is 'size'.
+ * Adjust 'ptr' so that its alignment is at least as stringent as what the
+ * compiler would provide for X and return the aligned result.
+ *
+ * If 'size' is a constant, the compiler will optimize this whole function
+ * down to either a no-op or the addition of a constant to the value of 'ptr'.
+ */
+static inline char * align_ptr (void *ptr, unsigned size)
+{
+ unsigned align, r;
+
+ /* Here we assume that the alignment of a "long long" is the most
+ * stringent alignment that the compiler will ever provide by default.
+ * As far as I know, this is a reasonable assumption.
+ */
+ if (size > sizeof(long))
+ align = sizeof(long long);
+ else if (size > sizeof(int))
+ align = sizeof(long);
+ else if (size > sizeof(short))
+ align = sizeof(int);
+ else if (size > sizeof(char))
+ align = sizeof(short);
+ else
+ return (char *) ptr;
+
+ r = size % align;
+
+ if (r == 0)
+ return (char *) ptr;
+
+ return (char *) (((unsigned long) ptr) + align - r);
+}
+
+
+EXPORT_SYMBOL(edac_mc_alloc);
+
+/**
+ * edac_mc_alloc: Allocate a struct mem_ctl_info structure
+ * @size_pvt: size of private storage needed
+ * @nr_csrows: Number of CWROWS needed for this MC
+ * @nr_chans: Number of channels for the MC
+ *
+ * Everything is kmalloc'ed as one big chunk - more efficient.
+ * Only can be used if all structures have the same lifetime - otherwise
+ * you have to allocate and initialize your own structures.
+ *
+ * Use edac_mc_free() to free mc structures allocated by this function.
+ *
+ * Returns:
+ * NULL allocation failed
+ * struct mem_ctl_info pointer
+ */
+struct mem_ctl_info *edac_mc_alloc(unsigned sz_pvt, unsigned nr_csrows,
+ unsigned nr_chans)
+{
+ struct mem_ctl_info *mci;
+ struct csrow_info *csi, *csrow;
+ struct channel_info *chi, *chp, *chan;
+ void *pvt;
+ unsigned size;
+ int row, chn;
+
+ /* Figure out the offsets of the various items from the start of an mc
+ * structure. We want the alignment of each item to be at least as
+ * stringent as what the compiler would provide if we could simply
+ * hardcode everything into a single struct.
+ */
+ mci = (struct mem_ctl_info *) 0;
+ csi = (struct csrow_info *)align_ptr(&mci[1], sizeof(*csi));
+ chi = (struct channel_info *)
+ align_ptr(&csi[nr_csrows], sizeof(*chi));
+ pvt = align_ptr(&chi[nr_chans * nr_csrows], sz_pvt);
+ size = ((unsigned long) pvt) + sz_pvt;
+
+ if ((mci = kmalloc(size, GFP_KERNEL)) == NULL)
+ return NULL;
+
+ /* Adjust pointers so they point within the memory we just allocated
+ * rather than an imaginary chunk of memory located at address 0.
+ */
+ csi = (struct csrow_info *) (((char *) mci) + ((unsigned long) csi));
+ chi = (struct channel_info *) (((char *) mci) + ((unsigned long) chi));
+ pvt = sz_pvt ? (((char *) mci) + ((unsigned long) pvt)) : NULL;
+
+ memset(mci, 0, size); /* clear all fields */
+
+ mci->csrows = csi;
+ mci->pvt_info = pvt;
+ mci->nr_csrows = nr_csrows;
+
+ for (row = 0; row < nr_csrows; row++) {
+ csrow = &csi[row];
+ csrow->csrow_idx = row;
+ csrow->mci = mci;
+ csrow->nr_channels = nr_chans;
+ chp = &chi[row * nr_chans];
+ csrow->channels = chp;
+
+ for (chn = 0; chn < nr_chans; chn++) {
+ chan = &chp[chn];
+ chan->chan_idx = chn;
+ chan->csrow = csrow;
+ }
+ }
+
+ return mci;
+}
+
+
+EXPORT_SYMBOL(edac_mc_free);
+
+/**
+ * edac_mc_free: Free a previously allocated 'mci' structure
+ * @mci: pointer to a struct mem_ctl_info structure
+ *
+ * Free up a previously allocated mci structure
+ * A MCI structure can be in 2 states after being allocated
+ * by edac_mc_alloc().
+ * 1) Allocated in a MC driver's probe, but not yet committed
+ * 2) Allocated and committed, by a call to edac_mc_add_mc()
+ * edac_mc_add_mc() is the function that adds the sysfs entries
+ * thus, this free function must determine which state the 'mci'
+ * structure is in, then either free it directly or
+ * perform kobject cleanup by calling edac_remove_sysfs_mci_device().
+ *
+ * VOID Return
+ */
+void edac_mc_free(struct mem_ctl_info *mci)
+{
+ /* only if sysfs entries for this mci instance exist
+ * do we remove them and defer the actual kfree via
+ * the kobject 'release()' callback.
+ *
+ * Otherwise, do a straight kfree now.
+ */
+ if (mci->sysfs_active == MCI_SYSFS_ACTIVE)
+ edac_remove_sysfs_mci_device(mci);
+ else
+ kfree(mci);
+}
+
+
+
+EXPORT_SYMBOL(edac_mc_find_mci_by_pdev);
+
+struct mem_ctl_info *edac_mc_find_mci_by_pdev(struct pci_dev *pdev)
+{
+ struct mem_ctl_info *mci;
+ struct list_head *item;
+
+ debugf3("MC: " __FILE__ ": %s()\n", __func__);
+
+ list_for_each(item, &mc_devices) {
+ mci = list_entry(item, struct mem_ctl_info, link);
+
+ if (mci->pdev == pdev)
+ return mci;
+ }
+
+ return NULL;
+}
+
+static int add_mc_to_global_list (struct mem_ctl_info *mci)
+{
+ struct list_head *item, *insert_before;
+ struct mem_ctl_info *p;
+ int i;
+
+ if (list_empty(&mc_devices)) {
+ mci->mc_idx = 0;
+ insert_before = &mc_devices;
+ } else {
+ if (edac_mc_find_mci_by_pdev(mci->pdev)) {
+ printk(KERN_WARNING
+ "EDAC MC: %s (%s) %s %s already assigned %d\n",
+ mci->pdev->dev.bus_id, pci_name(mci->pdev),
+ mci->mod_name, mci->ctl_name, mci->mc_idx);
+ return 1;
+ }
+
+ insert_before = NULL;
+ i = 0;
+
+ list_for_each(item, &mc_devices) {
+ p = list_entry(item, struct mem_ctl_info, link);
+
+ if (p->mc_idx != i) {
+ insert_before = item;
+ break;
+ }
+
+ i++;
+ }
+
+ mci->mc_idx = i;
+
+ if (insert_before == NULL)
+ insert_before = &mc_devices;
+ }
+
+ list_add_tail_rcu(&mci->link, insert_before);
+ return 0;
+}
+
+
+
+EXPORT_SYMBOL(edac_mc_add_mc);
+
+/**
+ * edac_mc_add_mc: Insert the 'mci' structure into the mci global list
+ * @mci: pointer to the mci structure to be added to the list
+ *
+ * Return:
+ * 0 Success
+ * !0 Failure
+ */
+
+/* FIXME - should a warning be printed if no error detection? correction? */
+int edac_mc_add_mc(struct mem_ctl_info *mci)
+{
+ int rc = 1;
+
+ debugf0("MC: " __FILE__ ": %s()\n", __func__);
+#ifdef CONFIG_EDAC_DEBUG
+ if (edac_debug_level >= 3)
+ edac_mc_dump_mci(mci);
+ if (edac_debug_level >= 4) {
+ int i;
+
+ for (i = 0; i < mci->nr_csrows; i++) {
+ int j;
+ edac_mc_dump_csrow(&mci->csrows[i]);
+ for (j = 0; j < mci->csrows[i].nr_channels; j++)
+ edac_mc_dump_channel(&mci->csrows[i].
+ channels[j]);
+ }
+ }
+#endif
+ down(&mem_ctls_mutex);
+
+ if (add_mc_to_global_list(mci))
+ goto finish;
+
+ /* set load time so that error rate can be tracked */
+ mci->start_time = jiffies;
+
+ if (edac_create_sysfs_mci_device(mci)) {
+ printk(KERN_WARNING
+ "EDAC MC%d: failed to create sysfs device\n",
+ mci->mc_idx);
+ /* FIXME - should there be an error code and unwind? */
+ goto finish;
+ }
+
+ /* Report action taken */
+ printk(KERN_INFO
+ "EDAC MC%d: Giving out device to %s %s: PCI %s\n",
+ mci->mc_idx, mci->mod_name, mci->ctl_name,
+ pci_name(mci->pdev));
+
+
+ rc = 0;
+
+finish:
+ up(&mem_ctls_mutex);
+ return rc;
+}
+
+
+
+static void complete_mc_list_del (struct rcu_head *head)
+{
+ struct mem_ctl_info *mci;
+
+ mci = container_of(head, struct mem_ctl_info, rcu);
+ INIT_LIST_HEAD(&mci->link);
+ complete(&mci->complete);
+}
+
+static void del_mc_from_global_list (struct mem_ctl_info *mci)
+{
+ list_del_rcu(&mci->link);
+ init_completion(&mci->complete);
+ call_rcu(&mci->rcu, complete_mc_list_del);
+ wait_for_completion(&mci->complete);
+}
+
+EXPORT_SYMBOL(edac_mc_del_mc);
+
+/**
+ * edac_mc_del_mc: Remove the specified mci structure from global list
+ * @mci: Pointer to struct mem_ctl_info structure
+ *
+ * Returns:
+ * 0 Success
+ * 1 Failure
+ */
+int edac_mc_del_mc(struct mem_ctl_info *mci)
+{
+ int rc = 1;
+
+ debugf0("MC%d: " __FILE__ ": %s()\n", mci->mc_idx, __func__);
+ down(&mem_ctls_mutex);
+ del_mc_from_global_list(mci);
+ printk(KERN_INFO
+ "EDAC MC%d: Removed device %d for %s %s: PCI %s\n",
+ mci->mc_idx, mci->mc_idx, mci->mod_name, mci->ctl_name,
+ pci_name(mci->pdev));
+ rc = 0;
+ up(&mem_ctls_mutex);
+
+ return rc;
+}
+
+
+EXPORT_SYMBOL(edac_mc_scrub_block);
+
+void edac_mc_scrub_block(unsigned long page, unsigned long offset,
+ u32 size)
+{
+ struct page *pg;
+ void *virt_addr;
+ unsigned long flags = 0;
+
+ debugf3("MC: " __FILE__ ": %s()\n", __func__);
+
+ /* ECC error page was not in our memory. Ignore it. */
+ if(!pfn_valid(page))
+ return;
+
+ /* Find the actual page structure then map it and fix */
+ pg = pfn_to_page(page);
+
+ if (PageHighMem(pg))
+ local_irq_save(flags);
+
+ virt_addr = kmap_atomic(pg, KM_BOUNCE_READ);
+
+ /* Perform architecture specific atomic scrub operation */
+ atomic_scrub(virt_addr + offset, size);
+
+ /* Unmap and complete */
+ kunmap_atomic(virt_addr, KM_BOUNCE_READ);
+
+ if (PageHighMem(pg))
+ local_irq_restore(flags);
+}
+
+
+/* FIXME - should return -1 */
+EXPORT_SYMBOL(edac_mc_find_csrow_by_page);
+
+int edac_mc_find_csrow_by_page(struct mem_ctl_info *mci,
+ unsigned long page)
+{
+ struct csrow_info *csrows = mci->csrows;
+ int row, i;
+
+ debugf1("MC%d: " __FILE__ ": %s(): 0x%lx\n", mci->mc_idx, __func__,
+ page);
+ row = -1;
+
+ for (i = 0; i < mci->nr_csrows; i++) {
+ struct csrow_info *csrow = &csrows[i];
+
+ if (csrow->nr_pages == 0)
+ continue;
+
+ debugf3("MC%d: " __FILE__
+ ": %s(): first(0x%lx) page(0x%lx)"
+ " last(0x%lx) mask(0x%lx)\n", mci->mc_idx,
+ __func__, csrow->first_page, page,
+ csrow->last_page, csrow->page_mask);
+
+ if ((page >= csrow->first_page) &&
+ (page <= csrow->last_page) &&
+ ((page & csrow->page_mask) ==
+ (csrow->first_page & csrow->page_mask))) {
+ row = i;
+ break;
+ }
+ }
+
+ if (row == -1)
+ printk(KERN_ERR
+ "EDAC MC%d: could not look up page error address %lx\n",
+ mci->mc_idx, (unsigned long) page);
+
+ return row;
+}
+
+
+EXPORT_SYMBOL(edac_mc_handle_ce);
+
+/* FIXME - setable log (warning/emerg) levels */
+/* FIXME - integrate with evlog: http://evlog.sourceforge.net/ */
+void edac_mc_handle_ce(struct mem_ctl_info *mci,
+ unsigned long page_frame_number,
+ unsigned long offset_in_page,
+ unsigned long syndrome, int row, int channel,
+ const char *msg)
+{
+ unsigned long remapped_page;
+
+ debugf3("MC%d: " __FILE__ ": %s()\n", mci->mc_idx, __func__);
+
+ /* FIXME - maybe make panic on INTERNAL ERROR an option */
+ if (row >= mci->nr_csrows || row < 0) {
+ /* something is wrong */
+ printk(KERN_ERR
+ "EDAC MC%d: INTERNAL ERROR: row out of range (%d >= %d)\n",
+ mci->mc_idx, row, mci->nr_csrows);
+ edac_mc_handle_ce_no_info(mci, "INTERNAL ERROR");
+ return;
+ }
+ if (channel >= mci->csrows[row].nr_channels || channel < 0) {
+ /* something is wrong */
+ printk(KERN_ERR
+ "EDAC MC%d: INTERNAL ERROR: channel out of range "
+ "(%d >= %d)\n",
+ mci->mc_idx, channel, mci->csrows[row].nr_channels);
+ edac_mc_handle_ce_no_info(mci, "INTERNAL ERROR");
+ return;
+ }
+
+ if (log_ce)
+ /* FIXME - put in DIMM location */
+ printk(KERN_WARNING
+ "EDAC MC%d: CE page 0x%lx, offset 0x%lx,"
+ " grain %d, syndrome 0x%lx, row %d, channel %d,"
+ " label \"%s\": %s\n", mci->mc_idx,
+ page_frame_number, offset_in_page,
+ mci->csrows[row].grain, syndrome, row, channel,
+ mci->csrows[row].channels[channel].label, msg);
+
+ mci->ce_count++;
+ mci->csrows[row].ce_count++;
+ mci->csrows[row].channels[channel].ce_count++;
+
+ if (mci->scrub_mode & SCRUB_SW_SRC) {
+ /*
+ * Some MC's can remap memory so that it is still available
+ * at a different address when PCI devices map into memory.
+ * MC's that can't do this lose the memory where PCI devices
+ * are mapped. This mapping is MC dependant and so we call
+ * back into the MC driver for it to map the MC page to
+ * a physical (CPU) page which can then be mapped to a virtual
+ * page - which can then be scrubbed.
+ */
+ remapped_page = mci->ctl_page_to_phys ?
+ mci->ctl_page_to_phys(mci, page_frame_number) :
+ page_frame_number;
+
+ edac_mc_scrub_block(remapped_page, offset_in_page,
+ mci->csrows[row].grain);
+ }
+}
+
+
+EXPORT_SYMBOL(edac_mc_handle_ce_no_info);
+
+void edac_mc_handle_ce_no_info(struct mem_ctl_info *mci,
+ const char *msg)
+{
+ if (log_ce)
+ printk(KERN_WARNING
+ "EDAC MC%d: CE - no information available: %s\n",
+ mci->mc_idx, msg);
+ mci->ce_noinfo_count++;
+ mci->ce_count++;
+}
+
+
+EXPORT_SYMBOL(edac_mc_handle_ue);
+
+void edac_mc_handle_ue(struct mem_ctl_info *mci,
+ unsigned long page_frame_number,
+ unsigned long offset_in_page, int row,
+ const char *msg)
+{
+ int len = EDAC_MC_LABEL_LEN * 4;
+ char labels[len + 1];
+ char *pos = labels;
+ int chan;
+ int chars;
+
+ debugf3("MC%d: " __FILE__ ": %s()\n", mci->mc_idx, __func__);
+
+ /* FIXME - maybe make panic on INTERNAL ERROR an option */
+ if (row >= mci->nr_csrows || row < 0) {
+ /* something is wrong */
+ printk(KERN_ERR
+ "EDAC MC%d: INTERNAL ERROR: row out of range (%d >= %d)\n",
+ mci->mc_idx, row, mci->nr_csrows);
+ edac_mc_handle_ue_no_info(mci, "INTERNAL ERROR");
+ return;
+ }
+
+ chars = snprintf(pos, len + 1, "%s",
+ mci->csrows[row].channels[0].label);
+ len -= chars;
+ pos += chars;
+ for (chan = 1; (chan < mci->csrows[row].nr_channels) && (len > 0);
+ chan++) {
+ chars = snprintf(pos, len + 1, ":%s",
+ mci->csrows[row].channels[chan].label);
+ len -= chars;
+ pos += chars;
+ }
+
+ if (log_ue)
+ printk(KERN_EMERG
+ "EDAC MC%d: UE page 0x%lx, offset 0x%lx, grain %d, row %d,"
+ " labels \"%s\": %s\n", mci->mc_idx,
+ page_frame_number, offset_in_page,
+ mci->csrows[row].grain, row, labels, msg);
+
+ if (panic_on_ue)
+ panic
+ ("EDAC MC%d: UE page 0x%lx, offset 0x%lx, grain %d, row %d,"
+ " labels \"%s\": %s\n", mci->mc_idx,
+ page_frame_number, offset_in_page,
+ mci->csrows[row].grain, row, labels, msg);
+
+ mci->ue_count++;
+ mci->csrows[row].ue_count++;
+}
+
+
+EXPORT_SYMBOL(edac_mc_handle_ue_no_info);
+
+void edac_mc_handle_ue_no_info(struct mem_ctl_info *mci,
+ const char *msg)
+{
+ if (panic_on_ue)
+ panic("EDAC MC%d: Uncorrected Error", mci->mc_idx);
+
+ if (log_ue)
+ printk(KERN_WARNING
+ "EDAC MC%d: UE - no information available: %s\n",
+ mci->mc_idx, msg);
+ mci->ue_noinfo_count++;
+ mci->ue_count++;
+}
+
+
+#ifdef CONFIG_PCI
+
+static u16 get_pci_parity_status(struct pci_dev *dev, int secondary)
+{
+ int where;
+ u16 status;
+
+ where = secondary ? PCI_SEC_STATUS : PCI_STATUS;
+ pci_read_config_word(dev, where, &status);
+
+ /* If we get back 0xFFFF then we must suspect that the card has been pulled but
+ the Linux PCI layer has not yet finished cleaning up. We don't want to report
+ on such devices */
+
+ if (status == 0xFFFF) {
+ u32 sanity;
+ pci_read_config_dword(dev, 0, &sanity);
+ if (sanity == 0xFFFFFFFF)
+ return 0;
+ }
+ status &= PCI_STATUS_DETECTED_PARITY | PCI_STATUS_SIG_SYSTEM_ERROR |
+ PCI_STATUS_PARITY;
+
+ if (status)
+ /* reset only the bits we are interested in */
+ pci_write_config_word(dev, where, status);
+
+ return status;
+}
+
+typedef void (*pci_parity_check_fn_t) (struct pci_dev *dev);
+
+/* Clear any PCI parity errors logged by this device. */
+static void edac_pci_dev_parity_clear( struct pci_dev *dev )
+{
+ u8 header_type;
+
+ get_pci_parity_status(dev, 0);
+
+ /* read the device TYPE, looking for bridges */
+ pci_read_config_byte(dev, PCI_HEADER_TYPE, &header_type);
+
+ if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE)
+ get_pci_parity_status(dev, 1);
+}
+
+/*
+ * PCI Parity polling
+ *
+ */
+static void edac_pci_dev_parity_test(struct pci_dev *dev)
+{
+ u16 status;
+ u8 header_type;
+
+ /* read the STATUS register on this device
+ */
+ status = get_pci_parity_status(dev, 0);
+
+ debugf2("PCI STATUS= 0x%04x %s\n", status, dev->dev.bus_id );
+
+ /* check the status reg for errors */
+ if (status) {
+ if (status & (PCI_STATUS_SIG_SYSTEM_ERROR))
+ printk(KERN_CRIT
+ "EDAC PCI- "
+ "Signaled System Error on %s\n",
+ pci_name (dev));
+
+ if (status & (PCI_STATUS_PARITY)) {
+ printk(KERN_CRIT
+ "EDAC PCI- "
+ "Master Data Parity Error on %s\n",
+ pci_name (dev));
+
+ atomic_inc(&pci_parity_count);
+ }
+
+ if (status & (PCI_STATUS_DETECTED_PARITY)) {
+ printk(KERN_CRIT
+ "EDAC PCI- "
+ "Detected Parity Error on %s\n",
+ pci_name (dev));
+
+ atomic_inc(&pci_parity_count);
+ }
+ }
+
+ /* read the device TYPE, looking for bridges */
+ pci_read_config_byte(dev, PCI_HEADER_TYPE, &header_type);
+
+ debugf2("PCI HEADER TYPE= 0x%02x %s\n", header_type, dev->dev.bus_id );
+
+ if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) {
+ /* On bridges, need to examine secondary status register */
+ status = get_pci_parity_status(dev, 1);
+
+ debugf2("PCI SEC_STATUS= 0x%04x %s\n",
+ status, dev->dev.bus_id );
+
+ /* check the secondary status reg for errors */
+ if (status) {
+ if (status & (PCI_STATUS_SIG_SYSTEM_ERROR))
+ printk(KERN_CRIT
+ "EDAC PCI-Bridge- "
+ "Signaled System Error on %s\n",
+ pci_name (dev));
+
+ if (status & (PCI_STATUS_PARITY)) {
+ printk(KERN_CRIT
+ "EDAC PCI-Bridge- "
+ "Master Data Parity Error on %s\n",
+ pci_name (dev));
+
+ atomic_inc(&pci_parity_count);
+ }
+
+ if (status & (PCI_STATUS_DETECTED_PARITY)) {
+ printk(KERN_CRIT
+ "EDAC PCI-Bridge- "
+ "Detected Parity Error on %s\n",
+ pci_name (dev));
+
+ atomic_inc(&pci_parity_count);
+ }
+ }
+ }
+}
+
+/*
+ * check_dev_on_list: Scan for a PCI device on a white/black list
+ * @list: an EDAC &edac_pci_device_list white/black list pointer
+ * @free_index: index of next free entry on the list
+ * @pci_dev: PCI Device pointer
+ *
+ * see if list contains the device.
+ *
+ * Returns: 0 not found
+ * 1 found on list
+ */
+static int check_dev_on_list(struct edac_pci_device_list *list, int free_index,
+ struct pci_dev *dev)
+{
+ int i;
+ int rc = 0; /* Assume not found */
+ unsigned short vendor=dev->vendor;
+ unsigned short device=dev->device;
+
+ /* Scan the list, looking for a vendor/device match
+ */
+ for (i = 0; i < free_index; i++, list++ ) {
+ if ( (list->vendor == vendor ) &&
+ (list->device == device )) {
+ rc = 1;
+ break;
+ }
+ }
+
+ return rc;
+}
+
+/*
+ * pci_dev parity list iterator
+ * Scan the PCI device list for one iteration, looking for SERRORs
+ * Master Parity ERRORS or Parity ERRORs on primary or secondary devices
+ */
+static inline void edac_pci_dev_parity_iterator(pci_parity_check_fn_t fn)
+{
+ struct pci_dev *dev=NULL;
+
+ /* request for kernel access to the next PCI device, if any,
+ * and while we are looking at it have its reference count
+ * bumped until we are done with it
+ */
+ while((dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) {
+
+ /* if whitelist exists then it has priority, so only scan those
+ * devices on the whitelist
+ */
+ if (pci_whitelist_count > 0 ) {
+ if (check_dev_on_list(pci_whitelist,
+ pci_whitelist_count, dev))
+ fn(dev);
+ } else {
+ /*
+ * if no whitelist, then check if this devices is
+ * blacklisted
+ */
+ if (!check_dev_on_list(pci_blacklist,
+ pci_blacklist_count, dev))
+ fn(dev);
+ }
+ }
+}
+
+static void do_pci_parity_check(void)
+{
+ unsigned long flags;
+ int before_count;
+
+ debugf3("MC: " __FILE__ ": %s()\n", __func__);
+
+ if (!check_pci_parity)
+ return;
+
+ before_count = atomic_read(&pci_parity_count);
+
+ /* scan all PCI devices looking for a Parity Error on devices and
+ * bridges
+ */
+ local_irq_save(flags);
+ edac_pci_dev_parity_iterator(edac_pci_dev_parity_test);
+ local_irq_restore(flags);
+
+ /* Only if operator has selected panic on PCI Error */
+ if (panic_on_pci_parity) {
+ /* If the count is different 'after' from 'before' */
+ if (before_count != atomic_read(&pci_parity_count))
+ panic("EDAC: PCI Parity Error");
+ }
+}
+
+
+static inline void clear_pci_parity_errors(void)
+{
+ /* Clear any PCI bus parity errors that devices initially have logged
+ * in their registers.
+ */
+ edac_pci_dev_parity_iterator(edac_pci_dev_parity_clear);
+}
+
+
+#else /* CONFIG_PCI */
+
+
+static inline void do_pci_parity_check(void)
+{
+ /* no-op */
+}
+
+
+static inline void clear_pci_parity_errors(void)
+{
+ /* no-op */
+}
+
+
+#endif /* CONFIG_PCI */
+
+/*
+ * Iterate over all MC instances and check for ECC, et al, errors
+ */
+static inline void check_mc_devices (void)
+{
+ unsigned long flags;
+ struct list_head *item;
+ struct mem_ctl_info *mci;
+
+ debugf3("MC: " __FILE__ ": %s()\n", __func__);
+
+ /* during poll, have interrupts off */
+ local_irq_save(flags);
+
+ list_for_each(item, &mc_devices) {
+ mci = list_entry(item, struct mem_ctl_info, link);
+
+ if (mci->edac_check != NULL)
+ mci->edac_check(mci);
+ }
+
+ local_irq_restore(flags);
+}
+
+
+/*
+ * Check MC status every poll_msec.
+ * Check PCI status every poll_msec as well.
+ *
+ * This where the work gets done for edac.
+ *
+ * SMP safe, doesn't use NMI, and auto-rate-limits.
+ */
+static void do_edac_check(void)
+{
+
+ debugf3("MC: " __FILE__ ": %s()\n", __func__);
+
+ check_mc_devices();
+
+ do_pci_parity_check();
+}
+
+
+/*
+ * EDAC thread state information
+ */
+struct bs_thread_info
+{
+ struct task_struct *task;
+ struct completion *event;
+ char *name;
+ void (*run)(void);
+};
+
+static struct bs_thread_info bs_thread;
+
+/*
+ * edac_kernel_thread
+ * This the kernel thread that processes edac operations
+ * in a normal thread environment
+ */
+static int edac_kernel_thread(void *arg)
+{
+ struct bs_thread_info *thread = (struct bs_thread_info *) arg;
+
+ /* detach thread */
+ daemonize(thread->name);
+
+ current->exit_signal = SIGCHLD;
+ allow_signal(SIGKILL);
+ thread->task = current;
+
+ /* indicate to starting task we have started */
+ complete(thread->event);
+
+ /* loop forever, until we are told to stop */
+ while(thread->run != NULL) {
+ void (*run)(void);
+
+ /* call the function to check the memory controllers */
+ run = thread->run;
+ if (run)
+ run();
+
+ if (signal_pending(current))
+ flush_signals(current);
+
+ /* ensure we are interruptable */
+ set_current_state(TASK_INTERRUPTIBLE);
+
+ /* goto sleep for the interval */
+ schedule_timeout((HZ * poll_msec) / 1000);
+ try_to_freeze();
+ }
+
+ /* notify waiter that we are exiting */
+ complete(thread->event);
+
+ return 0;
+}
+
+/*
+ * edac_mc_init
+ * module initialization entry point
+ */
+static int __init edac_mc_init(void)
+{
+ int ret;
+ struct completion event;
+
+ printk(KERN_INFO "MC: " __FILE__ " version " EDAC_MC_VERSION "\n");
+
+ /*
+ * Harvest and clear any boot/initialization PCI parity errors
+ *
+ * FIXME: This only clears errors logged by devices present at time of
+ * module initialization. We should also do an initial clear
+ * of each newly hotplugged device.
+ */
+ clear_pci_parity_errors();
+
+ /* perform check for first time to harvest boot leftovers */
+ do_edac_check();
+
+ /* Create the MC sysfs entires */
+ if (edac_sysfs_memctrl_setup()) {
+ printk(KERN_ERR "EDAC MC: Error initializing sysfs code\n");
+ return -ENODEV;
+ }
+
+ /* Create the PCI parity sysfs entries */
+ if (edac_sysfs_pci_setup()) {
+ edac_sysfs_memctrl_teardown();
+ printk(KERN_ERR "EDAC PCI: Error initializing sysfs code\n");
+ return -ENODEV;
+ }
+
+ /* Create our kernel thread */
+ init_completion(&event);
+ bs_thread.event = &event;
+ bs_thread.name = "kedac";
+ bs_thread.run = do_edac_check;
+
+ /* create our kernel thread */
+ ret = kernel_thread(edac_kernel_thread, &bs_thread, CLONE_KERNEL);
+ if (ret < 0) {
+ /* remove the sysfs entries */
+ edac_sysfs_memctrl_teardown();
+ edac_sysfs_pci_teardown();
+ return -ENOMEM;
+ }
+
+ /* wait for our kernel theard ack that it is up and running */
+ wait_for_completion(&event);
+
+ return 0;
+}
+
+
+/*
+ * edac_mc_exit()
+ * module exit/termination functioni
+ */
+static void __exit edac_mc_exit(void)
+{
+ struct completion event;
+
+ debugf0("MC: " __FILE__ ": %s()\n", __func__);
+
+ init_completion(&event);
+ bs_thread.event = &event;
+
+ /* As soon as ->run is set to NULL, the task could disappear,
+ * so we need to hold tasklist_lock until we have sent the signal
+ */
+ read_lock(&tasklist_lock);
+ bs_thread.run = NULL;
+ send_sig(SIGKILL, bs_thread.task, 1);
+ read_unlock(&tasklist_lock);
+ wait_for_completion(&event);
+
+ /* tear down the sysfs device */
+ edac_sysfs_memctrl_teardown();
+ edac_sysfs_pci_teardown();
+}
+
+
+
+
+module_init(edac_mc_init);
+module_exit(edac_mc_exit);
+
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("Linux Networx (http://lnxi.com) Thayne Harbaugh et al\n"
+ "Based on.work by Dan Hollis et al");
+MODULE_DESCRIPTION("Core library routines for MC reporting");
+
+module_param(panic_on_ue, int, 0644);
+MODULE_PARM_DESC(panic_on_ue, "Panic on uncorrected error: 0=off 1=on");
+module_param(check_pci_parity, int, 0644);
+MODULE_PARM_DESC(check_pci_parity, "Check for PCI bus parity errors: 0=off 1=on");
+module_param(panic_on_pci_parity, int, 0644);
+MODULE_PARM_DESC(panic_on_pci_parity, "Panic on PCI Bus Parity error: 0=off 1=on");
+module_param(log_ue, int, 0644);
+MODULE_PARM_DESC(log_ue, "Log uncorrectable error to console: 0=off 1=on");
+module_param(log_ce, int, 0644);
+MODULE_PARM_DESC(log_ce, "Log correctable error to console: 0=off 1=on");
+module_param(poll_msec, int, 0644);
+MODULE_PARM_DESC(poll_msec, "Polling period in milliseconds");
+#ifdef CONFIG_EDAC_DEBUG
+module_param(edac_debug_level, int, 0644);
+MODULE_PARM_DESC(edac_debug_level, "Debug level");
+#endif
--- /dev/null
+/*
+ * MC kernel module
+ * (C) 2003 Linux Networx (http://lnxi.com)
+ * This file may be distributed under the terms of the
+ * GNU General Public License.
+ *
+ * Written by Thayne Harbaugh
+ * Based on work by Dan Hollis <goemon at anime dot net> and others.
+ * http://www.anime.net/~goemon/linux-ecc/
+ *
+ * NMI handling support added by
+ * Dave Peterson <dsp@llnl.gov> <dave_peterson@pobox.com>
+ *
+ * $Id: edac_mc.h,v 1.4.2.10 2005/10/05 00:43:44 dsp_llnl Exp $
+ *
+ */
+
+
+#ifndef _EDAC_MC_H_
+#define _EDAC_MC_H_
+
+
+#include <linux/config.h>
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <linux/module.h>
+#include <linux/spinlock.h>
+#include <linux/smp.h>
+#include <linux/pci.h>
+#include <linux/time.h>
+#include <linux/nmi.h>
+#include <linux/rcupdate.h>
+#include <linux/completion.h>
+#include <linux/kobject.h>
+
+
+#define EDAC_MC_LABEL_LEN 31
+#define MC_PROC_NAME_MAX_LEN 7
+
+#if PAGE_SHIFT < 20
+#define PAGES_TO_MiB( pages ) ( ( pages ) >> ( 20 - PAGE_SHIFT ) )
+#else /* PAGE_SHIFT > 20 */
+#define PAGES_TO_MiB( pages ) ( ( pages ) << ( PAGE_SHIFT - 20 ) )
+#endif
+
+#ifdef CONFIG_EDAC_DEBUG
+extern int edac_debug_level;
+#define edac_debug_printk(level, fmt, args...) \
+do { if (level <= edac_debug_level) printk(KERN_DEBUG fmt, ##args); } while(0)
+#define debugf0( ... ) edac_debug_printk(0, __VA_ARGS__ )
+#define debugf1( ... ) edac_debug_printk(1, __VA_ARGS__ )
+#define debugf2( ... ) edac_debug_printk(2, __VA_ARGS__ )
+#define debugf3( ... ) edac_debug_printk(3, __VA_ARGS__ )
+#define debugf4( ... ) edac_debug_printk(4, __VA_ARGS__ )
+#else /* !CONFIG_EDAC_DEBUG */
+#define debugf0( ... )
+#define debugf1( ... )
+#define debugf2( ... )
+#define debugf3( ... )
+#define debugf4( ... )
+#endif /* !CONFIG_EDAC_DEBUG */
+
+
+#define bs_xstr(s) bs_str(s)
+#define bs_str(s) #s
+#define BS_MOD_STR bs_xstr(KBUILD_BASENAME)
+
+#define BIT(x) (1 << (x))
+
+#define PCI_VEND_DEV(vend, dev) PCI_VENDOR_ID_ ## vend, PCI_DEVICE_ID_ ## vend ## _ ## dev
+
+/* memory devices */
+enum dev_type {
+ DEV_UNKNOWN = 0,
+ DEV_X1,
+ DEV_X2,
+ DEV_X4,
+ DEV_X8,
+ DEV_X16,
+ DEV_X32, /* Do these parts exist? */
+ DEV_X64 /* Do these parts exist? */
+};
+
+#define DEV_FLAG_UNKNOWN BIT(DEV_UNKNOWN)
+#define DEV_FLAG_X1 BIT(DEV_X1)
+#define DEV_FLAG_X2 BIT(DEV_X2)
+#define DEV_FLAG_X4 BIT(DEV_X4)
+#define DEV_FLAG_X8 BIT(DEV_X8)
+#define DEV_FLAG_X16 BIT(DEV_X16)
+#define DEV_FLAG_X32 BIT(DEV_X32)
+#define DEV_FLAG_X64 BIT(DEV_X64)
+
+/* memory types */
+enum mem_type {
+ MEM_EMPTY = 0, /* Empty csrow */
+ MEM_RESERVED, /* Reserved csrow type */
+ MEM_UNKNOWN, /* Unknown csrow type */
+ MEM_FPM, /* Fast page mode */
+ MEM_EDO, /* Extended data out */
+ MEM_BEDO, /* Burst Extended data out */
+ MEM_SDR, /* Single data rate SDRAM */
+ MEM_RDR, /* Registered single data rate SDRAM */
+ MEM_DDR, /* Double data rate SDRAM */
+ MEM_RDDR, /* Registered Double data rate SDRAM */
+ MEM_RMBS /* Rambus DRAM */
+};
+
+#define MEM_FLAG_EMPTY BIT(MEM_EMPTY)
+#define MEM_FLAG_RESERVED BIT(MEM_RESERVED)
+#define MEM_FLAG_UNKNOWN BIT(MEM_UNKNOWN)
+#define MEM_FLAG_FPM BIT(MEM_FPM)
+#define MEM_FLAG_EDO BIT(MEM_EDO)
+#define MEM_FLAG_BEDO BIT(MEM_BEDO)
+#define MEM_FLAG_SDR BIT(MEM_SDR)
+#define MEM_FLAG_RDR BIT(MEM_RDR)
+#define MEM_FLAG_DDR BIT(MEM_DDR)
+#define MEM_FLAG_RDDR BIT(MEM_RDDR)
+#define MEM_FLAG_RMBS BIT(MEM_RMBS)
+
+
+/* chipset Error Detection and Correction capabilities and mode */
+enum edac_type {
+ EDAC_UNKNOWN = 0, /* Unknown if ECC is available */
+ EDAC_NONE, /* Doesnt support ECC */
+ EDAC_RESERVED, /* Reserved ECC type */
+ EDAC_PARITY, /* Detects parity errors */
+ EDAC_EC, /* Error Checking - no correction */
+ EDAC_SECDED, /* Single bit error correction, Double detection */
+ EDAC_S2ECD2ED, /* Chipkill x2 devices - do these exist? */
+ EDAC_S4ECD4ED, /* Chipkill x4 devices */
+ EDAC_S8ECD8ED, /* Chipkill x8 devices */
+ EDAC_S16ECD16ED, /* Chipkill x16 devices */
+};
+
+#define EDAC_FLAG_UNKNOWN BIT(EDAC_UNKNOWN)
+#define EDAC_FLAG_NONE BIT(EDAC_NONE)
+#define EDAC_FLAG_PARITY BIT(EDAC_PARITY)
+#define EDAC_FLAG_EC BIT(EDAC_EC)
+#define EDAC_FLAG_SECDED BIT(EDAC_SECDED)
+#define EDAC_FLAG_S2ECD2ED BIT(EDAC_S2ECD2ED)
+#define EDAC_FLAG_S4ECD4ED BIT(EDAC_S4ECD4ED)
+#define EDAC_FLAG_S8ECD8ED BIT(EDAC_S8ECD8ED)
+#define EDAC_FLAG_S16ECD16ED BIT(EDAC_S16ECD16ED)
+
+
+/* scrubbing capabilities */
+enum scrub_type {
+ SCRUB_UNKNOWN = 0, /* Unknown if scrubber is available */
+ SCRUB_NONE, /* No scrubber */
+ SCRUB_SW_PROG, /* SW progressive (sequential) scrubbing */
+ SCRUB_SW_SRC, /* Software scrub only errors */
+ SCRUB_SW_PROG_SRC, /* Progressive software scrub from an error */
+ SCRUB_SW_TUNABLE, /* Software scrub frequency is tunable */
+ SCRUB_HW_PROG, /* HW progressive (sequential) scrubbing */
+ SCRUB_HW_SRC, /* Hardware scrub only errors */
+ SCRUB_HW_PROG_SRC, /* Progressive hardware scrub from an error */
+ SCRUB_HW_TUNABLE /* Hardware scrub frequency is tunable */
+};
+
+#define SCRUB_FLAG_SW_PROG BIT(SCRUB_SW_PROG)
+#define SCRUB_FLAG_SW_SRC BIT(SCRUB_SW_SRC_CORR)
+#define SCRUB_FLAG_SW_PROG_SRC BIT(SCRUB_SW_PROG_SRC_CORR)
+#define SCRUB_FLAG_SW_TUN BIT(SCRUB_SW_SCRUB_TUNABLE)
+#define SCRUB_FLAG_HW_PROG BIT(SCRUB_HW_PROG)
+#define SCRUB_FLAG_HW_SRC BIT(SCRUB_HW_SRC_CORR)
+#define SCRUB_FLAG_HW_PROG_SRC BIT(SCRUB_HW_PROG_SRC_CORR)
+#define SCRUB_FLAG_HW_TUN BIT(SCRUB_HW_TUNABLE)
+
+enum mci_sysfs_status {
+ MCI_SYSFS_INACTIVE = 0, /* sysfs entries NOT registered */
+ MCI_SYSFS_ACTIVE /* sysfs entries ARE registered */
+};
+
+/* FIXME - should have notify capabilities: NMI, LOG, PROC, etc */
+
+/*
+ * There are several things to be aware of that aren't at all obvious:
+ *
+ *
+ * SOCKETS, SOCKET SETS, BANKS, ROWS, CHIP-SELECT ROWS, CHANNELS, etc..
+ *
+ * These are some of the many terms that are thrown about that don't always
+ * mean what people think they mean (Inconceivable!). In the interest of
+ * creating a common ground for discussion, terms and their definitions
+ * will be established.
+ *
+ * Memory devices: The individual chip on a memory stick. These devices
+ * commonly output 4 and 8 bits each. Grouping several
+ * of these in parallel provides 64 bits which is common
+ * for a memory stick.
+ *
+ * Memory Stick: A printed circuit board that agregates multiple
+ * memory devices in parallel. This is the atomic
+ * memory component that is purchaseable by Joe consumer
+ * and loaded into a memory socket.
+ *
+ * Socket: A physical connector on the motherboard that accepts
+ * a single memory stick.
+ *
+ * Channel: Set of memory devices on a memory stick that must be
+ * grouped in parallel with one or more additional
+ * channels from other memory sticks. This parallel
+ * grouping of the output from multiple channels are
+ * necessary for the smallest granularity of memory access.
+ * Some memory controllers are capable of single channel -
+ * which means that memory sticks can be loaded
+ * individually. Other memory controllers are only
+ * capable of dual channel - which means that memory
+ * sticks must be loaded as pairs (see "socket set").
+ *
+ * Chip-select row: All of the memory devices that are selected together.
+ * for a single, minimum grain of memory access.
+ * This selects all of the parallel memory devices across
+ * all of the parallel channels. Common chip-select rows
+ * for single channel are 64 bits, for dual channel 128
+ * bits.
+ *
+ * Single-Ranked stick: A Single-ranked stick has 1 chip-select row of memmory.
+ * Motherboards commonly drive two chip-select pins to
+ * a memory stick. A single-ranked stick, will occupy
+ * only one of those rows. The other will be unused.
+ *
+ * Double-Ranked stick: A double-ranked stick has two chip-select rows which
+ * access different sets of memory devices. The two
+ * rows cannot be accessed concurrently.
+ *
+ * Double-sided stick: DEPRECATED TERM, see Double-Ranked stick.
+ * A double-sided stick has two chip-select rows which
+ * access different sets of memory devices. The two
+ * rows cannot be accessed concurrently. "Double-sided"
+ * is irrespective of the memory devices being mounted
+ * on both sides of the memory stick.
+ *
+ * Socket set: All of the memory sticks that are required for for
+ * a single memory access or all of the memory sticks
+ * spanned by a chip-select row. A single socket set
+ * has two chip-select rows and if double-sided sticks
+ * are used these will occupy those chip-select rows.
+ *
+ * Bank: This term is avoided because it is unclear when
+ * needing to distinguish between chip-select rows and
+ * socket sets.
+ *
+ * Controller pages:
+ *
+ * Physical pages:
+ *
+ * Virtual pages:
+ *
+ *
+ * STRUCTURE ORGANIZATION AND CHOICES
+ *
+ *
+ *
+ * PS - I enjoyed writing all that about as much as you enjoyed reading it.
+ */
+
+
+struct channel_info {
+ int chan_idx; /* channel index */
+ u32 ce_count; /* Correctable Errors for this CHANNEL */
+ char label[EDAC_MC_LABEL_LEN + 1]; /* DIMM label on motherboard */
+ struct csrow_info *csrow; /* the parent */
+};
+
+
+struct csrow_info {
+ unsigned long first_page; /* first page number in dimm */
+ unsigned long last_page; /* last page number in dimm */
+ unsigned long page_mask; /* used for interleaving -
+ 0UL for non intlv */
+ u32 nr_pages; /* number of pages in csrow */
+ u32 grain; /* granularity of reported error in bytes */
+ int csrow_idx; /* the chip-select row */
+ enum dev_type dtype; /* memory device type */
+ u32 ue_count; /* Uncorrectable Errors for this csrow */
+ u32 ce_count; /* Correctable Errors for this csrow */
+ enum mem_type mtype; /* memory csrow type */
+ enum edac_type edac_mode; /* EDAC mode for this csrow */
+ struct mem_ctl_info *mci; /* the parent */
+
+ struct kobject kobj; /* sysfs kobject for this csrow */
+
+ /* FIXME the number of CHANNELs might need to become dynamic */
+ u32 nr_channels;
+ struct channel_info *channels;
+};
+
+
+struct mem_ctl_info {
+ struct list_head link; /* for global list of mem_ctl_info structs */
+ unsigned long mtype_cap; /* memory types supported by mc */
+ unsigned long edac_ctl_cap; /* Mem controller EDAC capabilities */
+ unsigned long edac_cap; /* configuration capabilities - this is
+ closely related to edac_ctl_cap. The
+ difference is that the controller
+ may be capable of s4ecd4ed which would
+ be listed in edac_ctl_cap, but if
+ channels aren't capable of s4ecd4ed then the
+ edac_cap would not have that capability. */
+ unsigned long scrub_cap; /* chipset scrub capabilities */
+ enum scrub_type scrub_mode; /* current scrub mode */
+
+ enum mci_sysfs_status sysfs_active; /* status of sysfs */
+
+ /* pointer to edac checking routine */
+ void (*edac_check) (struct mem_ctl_info * mci);
+ /*
+ * Remaps memory pages: controller pages to physical pages.
+ * For most MC's, this will be NULL.
+ */
+ /* FIXME - why not send the phys page to begin with? */
+ unsigned long (*ctl_page_to_phys) (struct mem_ctl_info * mci,
+ unsigned long page);
+ int mc_idx;
+ int nr_csrows;
+ struct csrow_info *csrows;
+ /*
+ * FIXME - what about controllers on other busses? - IDs must be
+ * unique. pdev pointer should be sufficiently unique, but
+ * BUS:SLOT.FUNC numbers may not be unique.
+ */
+ struct pci_dev *pdev;
+ const char *mod_name;
+ const char *mod_ver;
+ const char *ctl_name;
+ char proc_name[MC_PROC_NAME_MAX_LEN + 1];
+ void *pvt_info;
+ u32 ue_noinfo_count; /* Uncorrectable Errors w/o info */
+ u32 ce_noinfo_count; /* Correctable Errors w/o info */
+ u32 ue_count; /* Total Uncorrectable Errors for this MC */
+ u32 ce_count; /* Total Correctable Errors for this MC */
+ unsigned long start_time; /* mci load start time (in jiffies) */
+
+ /* this stuff is for safe removal of mc devices from global list while
+ * NMI handlers may be traversing list
+ */
+ struct rcu_head rcu;
+ struct completion complete;
+
+ /* edac sysfs device control */
+ struct kobject edac_mci_kobj;
+};
+
+
+
+/* write all or some bits in a byte-register*/
+static inline void pci_write_bits8(struct pci_dev *pdev, int offset,
+ u8 value, u8 mask)
+{
+ if (mask != 0xff) {
+ u8 buf;
+ pci_read_config_byte(pdev, offset, &buf);
+ value &= mask;
+ buf &= ~mask;
+ value |= buf;
+ }
+ pci_write_config_byte(pdev, offset, value);
+}
+
+
+/* write all or some bits in a word-register*/
+static inline void pci_write_bits16(struct pci_dev *pdev, int offset,
+ u16 value, u16 mask)
+{
+ if (mask != 0xffff) {
+ u16 buf;
+ pci_read_config_word(pdev, offset, &buf);
+ value &= mask;
+ buf &= ~mask;
+ value |= buf;
+ }
+ pci_write_config_word(pdev, offset, value);
+}
+
+
+/* write all or some bits in a dword-register*/
+static inline void pci_write_bits32(struct pci_dev *pdev, int offset,
+ u32 value, u32 mask)
+{
+ if (mask != 0xffff) {
+ u32 buf;
+ pci_read_config_dword(pdev, offset, &buf);
+ value &= mask;
+ buf &= ~mask;
+ value |= buf;
+ }
+ pci_write_config_dword(pdev, offset, value);
+}
+
+
+#ifdef CONFIG_EDAC_DEBUG
+void edac_mc_dump_channel(struct channel_info *chan);
+void edac_mc_dump_mci(struct mem_ctl_info *mci);
+void edac_mc_dump_csrow(struct csrow_info *csrow);
+#endif /* CONFIG_EDAC_DEBUG */
+
+extern int edac_mc_add_mc(struct mem_ctl_info *mci);
+extern int edac_mc_del_mc(struct mem_ctl_info *mci);
+
+extern int edac_mc_find_csrow_by_page(struct mem_ctl_info *mci,
+ unsigned long page);
+
+extern struct mem_ctl_info *edac_mc_find_mci_by_pdev(struct pci_dev
+ *pdev);
+
+extern void edac_mc_scrub_block(unsigned long page,
+ unsigned long offset, u32 size);
+
+/*
+ * The no info errors are used when error overflows are reported.
+ * There are a limited number of error logging registers that can
+ * be exausted. When all registers are exhausted and an additional
+ * error occurs then an error overflow register records that an
+ * error occured and the type of error, but doesn't have any
+ * further information. The ce/ue versions make for cleaner
+ * reporting logic and function interface - reduces conditional
+ * statement clutter and extra function arguments.
+ */
+extern void edac_mc_handle_ce(struct mem_ctl_info *mci,
+ unsigned long page_frame_number,
+ unsigned long offset_in_page,
+ unsigned long syndrome,
+ int row, int channel, const char *msg);
+
+extern void edac_mc_handle_ce_no_info(struct mem_ctl_info *mci,
+ const char *msg);
+
+extern void edac_mc_handle_ue(struct mem_ctl_info *mci,
+ unsigned long page_frame_number,
+ unsigned long offset_in_page,
+ int row, const char *msg);
+
+extern void edac_mc_handle_ue_no_info(struct mem_ctl_info *mci,
+ const char *msg);
+
+/*
+ * This kmalloc's and initializes all the structures.
+ * Can't be used if all structures don't have the same lifetime.
+ */
+extern struct mem_ctl_info *edac_mc_alloc(unsigned sz_pvt,
+ unsigned nr_csrows, unsigned nr_chans);
+
+/* Free an mc previously allocated by edac_mc_alloc() */
+extern void edac_mc_free(struct mem_ctl_info *mci);
+
+
+#endif /* _EDAC_MC_H_ */
--- /dev/null
+/*
+ * Intel 82860 Memory Controller kernel module
+ * (C) 2005 Red Hat (http://www.redhat.com)
+ * This file may be distributed under the terms of the
+ * GNU General Public License.
+ *
+ * Written by Ben Woodard <woodard@redhat.com>
+ * shamelessly copied from and based upon the edac_i82875 driver
+ * by Thayne Harbaugh of Linux Networx. (http://lnxi.com)
+ */
+
+
+#include <linux/config.h>
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/pci.h>
+#include <linux/pci_ids.h>
+#include <linux/slab.h>
+#include "edac_mc.h"
+
+
+#ifndef PCI_DEVICE_ID_INTEL_82860_0
+#define PCI_DEVICE_ID_INTEL_82860_0 0x2531
+#endif /* PCI_DEVICE_ID_INTEL_82860_0 */
+
+#define I82860_MCHCFG 0x50
+#define I82860_GBA 0x60
+#define I82860_GBA_MASK 0x7FF
+#define I82860_GBA_SHIFT 24
+#define I82860_ERRSTS 0xC8
+#define I82860_EAP 0xE4
+#define I82860_DERRCTL_STS 0xE2
+
+enum i82860_chips {
+ I82860 = 0,
+};
+
+struct i82860_dev_info {
+ const char *ctl_name;
+};
+
+struct i82860_error_info {
+ u16 errsts;
+ u32 eap;
+ u16 derrsyn;
+ u16 errsts2;
+};
+
+static const struct i82860_dev_info i82860_devs[] = {
+ [I82860] = {
+ .ctl_name = "i82860"},
+};
+
+static struct pci_dev *mci_pdev = NULL; /* init dev: in case that AGP code
+ has already registered driver */
+
+static int i82860_registered = 1;
+
+static void i82860_get_error_info (struct mem_ctl_info *mci,
+ struct i82860_error_info *info)
+{
+ /*
+ * This is a mess because there is no atomic way to read all the
+ * registers at once and the registers can transition from CE being
+ * overwritten by UE.
+ */
+ pci_read_config_word(mci->pdev, I82860_ERRSTS, &info->errsts);
+ pci_read_config_dword(mci->pdev, I82860_EAP, &info->eap);
+ pci_read_config_word(mci->pdev, I82860_DERRCTL_STS, &info->derrsyn);
+ pci_read_config_word(mci->pdev, I82860_ERRSTS, &info->errsts2);
+
+ pci_write_bits16(mci->pdev, I82860_ERRSTS, 0x0003, 0x0003);
+
+ /*
+ * If the error is the same for both reads then the first set of reads
+ * is valid. If there is a change then there is a CE no info and the
+ * second set of reads is valid and should be UE info.
+ */
+ if (!(info->errsts2 & 0x0003))
+ return;
+ if ((info->errsts ^ info->errsts2) & 0x0003) {
+ pci_read_config_dword(mci->pdev, I82860_EAP, &info->eap);
+ pci_read_config_word(mci->pdev, I82860_DERRCTL_STS,
+ &info->derrsyn);
+ }
+}
+
+static int i82860_process_error_info (struct mem_ctl_info *mci,
+ struct i82860_error_info *info, int handle_errors)
+{
+ int row;
+
+ if (!(info->errsts2 & 0x0003))
+ return 0;
+
+ if (!handle_errors)
+ return 1;
+
+ if ((info->errsts ^ info->errsts2) & 0x0003) {
+ edac_mc_handle_ce_no_info(mci, "UE overwrote CE");
+ info->errsts = info->errsts2;
+ }
+
+ info->eap >>= PAGE_SHIFT;
+ row = edac_mc_find_csrow_by_page(mci, info->eap);
+
+ if (info->errsts & 0x0002)
+ edac_mc_handle_ue(mci, info->eap, 0, row, "i82860 UE");
+ else
+ edac_mc_handle_ce(mci, info->eap, 0, info->derrsyn, row,
+ 0, "i82860 UE");
+
+ return 1;
+}
+
+static void i82860_check(struct mem_ctl_info *mci)
+{
+ struct i82860_error_info info;
+
+ debugf1("MC%d: " __FILE__ ": %s()\n", mci->mc_idx, __func__);
+ i82860_get_error_info(mci, &info);
+ i82860_process_error_info(mci, &info, 1);
+}
+
+static int i82860_probe1(struct pci_dev *pdev, int dev_idx)
+{
+ int rc = -ENODEV;
+ int index;
+ struct mem_ctl_info *mci = NULL;
+ unsigned long last_cumul_size;
+
+ u16 mchcfg_ddim; /* DRAM Data Integrity Mode 0=none,2=edac */
+
+ /* RDRAM has channels but these don't map onto the abstractions that
+ edac uses.
+ The device groups from the GRA registers seem to map reasonably
+ well onto the notion of a chip select row.
+ There are 16 GRA registers and since the name is associated with
+ the channel and the GRA registers map to physical devices so we are
+ going to make 1 channel for group.
+ */
+ mci = edac_mc_alloc(0, 16, 1);
+ if (!mci)
+ return -ENOMEM;
+
+ debugf3("MC: " __FILE__ ": %s(): init mci\n", __func__);
+
+ mci->pdev = pdev;
+ mci->mtype_cap = MEM_FLAG_DDR;
+
+
+ mci->edac_ctl_cap = EDAC_FLAG_NONE | EDAC_FLAG_SECDED;
+ /* I"m not sure about this but I think that all RDRAM is SECDED */
+ mci->edac_cap = EDAC_FLAG_SECDED;
+ /* adjust FLAGS */
+
+ mci->mod_name = BS_MOD_STR;
+ mci->mod_ver = "$Revision: 1.1.2.6 $";
+ mci->ctl_name = i82860_devs[dev_idx].ctl_name;
+ mci->edac_check = i82860_check;
+ mci->ctl_page_to_phys = NULL;
+
+ pci_read_config_word(mci->pdev, I82860_MCHCFG, &mchcfg_ddim);
+ mchcfg_ddim = mchcfg_ddim & 0x180;
+
+ /*
+ * The group row boundary (GRA) reg values are boundary address
+ * for each DRAM row with a granularity of 16MB. GRA regs are
+ * cumulative; therefore GRA15 will contain the total memory contained
+ * in all eight rows.
+ */
+ for (last_cumul_size = index = 0; index < mci->nr_csrows; index++) {
+ u16 value;
+ u32 cumul_size;
+ struct csrow_info *csrow = &mci->csrows[index];
+
+ pci_read_config_word(mci->pdev, I82860_GBA + index * 2,
+ &value);
+
+ cumul_size = (value & I82860_GBA_MASK) <<
+ (I82860_GBA_SHIFT - PAGE_SHIFT);
+ debugf3("MC: " __FILE__ ": %s(): (%d) cumul_size 0x%x\n",
+ __func__, index, cumul_size);
+ if (cumul_size == last_cumul_size)
+ continue; /* not populated */
+
+ csrow->first_page = last_cumul_size;
+ csrow->last_page = cumul_size - 1;
+ csrow->nr_pages = cumul_size - last_cumul_size;
+ last_cumul_size = cumul_size;
+ csrow->grain = 1 << 12; /* I82860_EAP has 4KiB reolution */
+ csrow->mtype = MEM_RMBS;
+ csrow->dtype = DEV_UNKNOWN;
+ csrow->edac_mode = mchcfg_ddim ? EDAC_SECDED : EDAC_NONE;
+ }
+
+ /* clear counters */
+ pci_write_bits16(mci->pdev, I82860_ERRSTS, 0x0003, 0x0003);
+
+ if (edac_mc_add_mc(mci)) {
+ debugf3("MC: " __FILE__
+ ": %s(): failed edac_mc_add_mc()\n",
+ __func__);
+ edac_mc_free(mci);
+ } else {
+ /* get this far and it's successful */
+ debugf3("MC: " __FILE__ ": %s(): success\n", __func__);
+ rc = 0;
+ }
+ return rc;
+}
+
+/* returns count (>= 0), or negative on error */
+static int __devinit i82860_init_one(struct pci_dev *pdev,
+ const struct pci_device_id *ent)
+{
+ int rc;
+
+ debugf0("MC: " __FILE__ ": %s()\n", __func__);
+
+ printk(KERN_INFO "i82860 init one\n");
+ if(pci_enable_device(pdev) < 0)
+ return -EIO;
+ rc = i82860_probe1(pdev, ent->driver_data);
+ if(rc == 0)
+ mci_pdev = pci_dev_get(pdev);
+ return rc;
+}
+
+static void __devexit i82860_remove_one(struct pci_dev *pdev)
+{
+ struct mem_ctl_info *mci;
+
+ debugf0(__FILE__ ": %s()\n", __func__);
+
+ mci = edac_mc_find_mci_by_pdev(pdev);
+ if ((mci != NULL) && (edac_mc_del_mc(mci) == 0))
+ edac_mc_free(mci);
+}
+
+static const struct pci_device_id i82860_pci_tbl[] __devinitdata = {
+ {PCI_VEND_DEV(INTEL, 82860_0), PCI_ANY_ID, PCI_ANY_ID, 0, 0,
+ I82860},
+ {0,} /* 0 terminated list. */
+};
+
+MODULE_DEVICE_TABLE(pci, i82860_pci_tbl);
+
+static struct pci_driver i82860_driver = {
+ .name = BS_MOD_STR,
+ .probe = i82860_init_one,
+ .remove = __devexit_p(i82860_remove_one),
+ .id_table = i82860_pci_tbl,
+};
+
+static int __init i82860_init(void)
+{
+ int pci_rc;
+
+ debugf3("MC: " __FILE__ ": %s()\n", __func__);
+ if ((pci_rc = pci_register_driver(&i82860_driver)) < 0)
+ return pci_rc;
+
+ if (!mci_pdev) {
+ i82860_registered = 0;
+ mci_pdev = pci_get_device(PCI_VENDOR_ID_INTEL,
+ PCI_DEVICE_ID_INTEL_82860_0, NULL);
+ if (mci_pdev == NULL) {
+ debugf0("860 pci_get_device fail\n");
+ return -ENODEV;
+ }
+ pci_rc = i82860_init_one(mci_pdev, i82860_pci_tbl);
+ if (pci_rc < 0) {
+ debugf0("860 init fail\n");
+ pci_dev_put(mci_pdev);
+ return -ENODEV;
+ }
+ }
+ return 0;
+}
+
+static void __exit i82860_exit(void)
+{
+ debugf3("MC: " __FILE__ ": %s()\n", __func__);
+
+ pci_unregister_driver(&i82860_driver);
+ if (!i82860_registered) {
+ i82860_remove_one(mci_pdev);
+ pci_dev_put(mci_pdev);
+ }
+}
+
+module_init(i82860_init);
+module_exit(i82860_exit);
+
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR
+ ("Red Hat Inc. (http://www.redhat.com.com) Ben Woodard <woodard@redhat.com>");
+MODULE_DESCRIPTION("ECC support for Intel 82860 memory hub controllers");
--- /dev/null
+/*
+ * Intel D82875P Memory Controller kernel module
+ * (C) 2003 Linux Networx (http://lnxi.com)
+ * This file may be distributed under the terms of the
+ * GNU General Public License.
+ *
+ * Written by Thayne Harbaugh
+ * Contributors:
+ * Wang Zhenyu at intel.com
+ *
+ * $Id: edac_i82875p.c,v 1.5.2.11 2005/10/05 00:43:44 dsp_llnl Exp $
+ *
+ * Note: E7210 appears same as D82875P - zhenyu.z.wang at intel.com
+ */
+
+
+#include <linux/config.h>
+#include <linux/module.h>
+#include <linux/init.h>
+
+#include <linux/pci.h>
+#include <linux/pci_ids.h>
+
+#include <linux/slab.h>
+
+#include "edac_mc.h"
+
+
+#ifndef PCI_DEVICE_ID_INTEL_82875_0
+#define PCI_DEVICE_ID_INTEL_82875_0 0x2578
+#endif /* PCI_DEVICE_ID_INTEL_82875_0 */
+
+#ifndef PCI_DEVICE_ID_INTEL_82875_6
+#define PCI_DEVICE_ID_INTEL_82875_6 0x257e
+#endif /* PCI_DEVICE_ID_INTEL_82875_6 */
+
+
+/* four csrows in dual channel, eight in single channel */
+#define I82875P_NR_CSROWS(nr_chans) (8/(nr_chans))
+
+
+/* Intel 82875p register addresses - device 0 function 0 - DRAM Controller */
+#define I82875P_EAP 0x58 /* Error Address Pointer (32b)
+ *
+ * 31:12 block address
+ * 11:0 reserved
+ */
+
+#define I82875P_DERRSYN 0x5c /* DRAM Error Syndrome (8b)
+ *
+ * 7:0 DRAM ECC Syndrome
+ */
+
+#define I82875P_DES 0x5d /* DRAM Error Status (8b)
+ *
+ * 7:1 reserved
+ * 0 Error channel 0/1
+ */
+
+#define I82875P_ERRSTS 0xc8 /* Error Status Register (16b)
+ *
+ * 15:10 reserved
+ * 9 non-DRAM lock error (ndlock)
+ * 8 Sftwr Generated SMI
+ * 7 ECC UE
+ * 6 reserved
+ * 5 MCH detects unimplemented cycle
+ * 4 AGP access outside GA
+ * 3 Invalid AGP access
+ * 2 Invalid GA translation table
+ * 1 Unsupported AGP command
+ * 0 ECC CE
+ */
+
+#define I82875P_ERRCMD 0xca /* Error Command (16b)
+ *
+ * 15:10 reserved
+ * 9 SERR on non-DRAM lock
+ * 8 SERR on ECC UE
+ * 7 SERR on ECC CE
+ * 6 target abort on high exception
+ * 5 detect unimplemented cyc
+ * 4 AGP access outside of GA
+ * 3 SERR on invalid AGP access
+ * 2 invalid translation table
+ * 1 SERR on unsupported AGP command
+ * 0 reserved
+ */
+
+
+/* Intel 82875p register addresses - device 6 function 0 - DRAM Controller */
+#define I82875P_PCICMD6 0x04 /* PCI Command Register (16b)
+ *
+ * 15:10 reserved
+ * 9 fast back-to-back - ro 0
+ * 8 SERR enable - ro 0
+ * 7 addr/data stepping - ro 0
+ * 6 parity err enable - ro 0
+ * 5 VGA palette snoop - ro 0
+ * 4 mem wr & invalidate - ro 0
+ * 3 special cycle - ro 0
+ * 2 bus master - ro 0
+ * 1 mem access dev6 - 0(dis),1(en)
+ * 0 IO access dev3 - 0(dis),1(en)
+ */
+
+#define I82875P_BAR6 0x10 /* Mem Delays Base ADDR Reg (32b)
+ *
+ * 31:12 mem base addr [31:12]
+ * 11:4 address mask - ro 0
+ * 3 prefetchable - ro 0(non),1(pre)
+ * 2:1 mem type - ro 0
+ * 0 mem space - ro 0
+ */
+
+/* Intel 82875p MMIO register space - device 0 function 0 - MMR space */
+
+#define I82875P_DRB_SHIFT 26 /* 64MiB grain */
+#define I82875P_DRB 0x00 /* DRAM Row Boundary (8b x 8)
+ *
+ * 7 reserved
+ * 6:0 64MiB row boundary addr
+ */
+
+#define I82875P_DRA 0x10 /* DRAM Row Attribute (4b x 8)
+ *
+ * 7 reserved
+ * 6:4 row attr row 1
+ * 3 reserved
+ * 2:0 row attr row 0
+ *
+ * 000 = 4KiB
+ * 001 = 8KiB
+ * 010 = 16KiB
+ * 011 = 32KiB
+ */
+
+#define I82875P_DRC 0x68 /* DRAM Controller Mode (32b)
+ *
+ * 31:30 reserved
+ * 29 init complete
+ * 28:23 reserved
+ * 22:21 nr chan 00=1,01=2
+ * 20 reserved
+ * 19:18 Data Integ Mode 00=none,01=ecc
+ * 17:11 reserved
+ * 10:8 refresh mode
+ * 7 reserved
+ * 6:4 mode select
+ * 3:2 reserved
+ * 1:0 DRAM type 01=DDR
+ */
+
+
+enum i82875p_chips {
+ I82875P = 0,
+};
+
+
+struct i82875p_pvt {
+ struct pci_dev *ovrfl_pdev;
+ void *ovrfl_window;
+};
+
+
+struct i82875p_dev_info {
+ const char *ctl_name;
+};
+
+
+struct i82875p_error_info {
+ u16 errsts;
+ u32 eap;
+ u8 des;
+ u8 derrsyn;
+ u16 errsts2;
+};
+
+
+static const struct i82875p_dev_info i82875p_devs[] = {
+ [I82875P] = {
+ .ctl_name = "i82875p"},
+};
+
+static struct pci_dev *mci_pdev = NULL; /* init dev: in case that AGP code
+ has already registered driver */
+static int i82875p_registered = 1;
+
+static void i82875p_get_error_info (struct mem_ctl_info *mci,
+ struct i82875p_error_info *info)
+{
+ /*
+ * This is a mess because there is no atomic way to read all the
+ * registers at once and the registers can transition from CE being
+ * overwritten by UE.
+ */
+ pci_read_config_word(mci->pdev, I82875P_ERRSTS, &info->errsts);
+ pci_read_config_dword(mci->pdev, I82875P_EAP, &info->eap);
+ pci_read_config_byte(mci->pdev, I82875P_DES, &info->des);
+ pci_read_config_byte(mci->pdev, I82875P_DERRSYN, &info->derrsyn);
+ pci_read_config_word(mci->pdev, I82875P_ERRSTS, &info->errsts2);
+
+ pci_write_bits16(mci->pdev, I82875P_ERRSTS, 0x0081, 0x0081);
+
+ /*
+ * If the error is the same then we can for both reads then
+ * the first set of reads is valid. If there is a change then
+ * there is a CE no info and the second set of reads is valid
+ * and should be UE info.
+ */
+ if (!(info->errsts2 & 0x0081))
+ return;
+ if ((info->errsts ^ info->errsts2) & 0x0081) {
+ pci_read_config_dword(mci->pdev, I82875P_EAP, &info->eap);
+ pci_read_config_byte(mci->pdev, I82875P_DES, &info->des);
+ pci_read_config_byte(mci->pdev, I82875P_DERRSYN,
+ &info->derrsyn);
+ }
+}
+
+static int i82875p_process_error_info (struct mem_ctl_info *mci,
+ struct i82875p_error_info *info, int handle_errors)
+{
+ int row, multi_chan;
+
+ multi_chan = mci->csrows[0].nr_channels - 1;
+
+ if (!(info->errsts2 & 0x0081))
+ return 0;
+
+ if (!handle_errors)
+ return 1;
+
+ if ((info->errsts ^ info->errsts2) & 0x0081) {
+ edac_mc_handle_ce_no_info(mci, "UE overwrote CE");
+ info->errsts = info->errsts2;
+ }
+
+ info->eap >>= PAGE_SHIFT;
+ row = edac_mc_find_csrow_by_page(mci, info->eap);
+
+ if (info->errsts & 0x0080)
+ edac_mc_handle_ue(mci, info->eap, 0, row, "i82875p UE");
+ else
+ edac_mc_handle_ce(mci, info->eap, 0, info->derrsyn, row,
+ multi_chan ? (info->des & 0x1) : 0,
+ "i82875p CE");
+
+ return 1;
+}
+
+
+static void i82875p_check(struct mem_ctl_info *mci)
+{
+ struct i82875p_error_info info;
+
+ debugf1("MC%d: " __FILE__ ": %s()\n", mci->mc_idx, __func__);
+ i82875p_get_error_info(mci, &info);
+ i82875p_process_error_info(mci, &info, 1);
+}
+
+
+#ifdef CONFIG_PROC_FS
+extern int pci_proc_attach_device(struct pci_dev *);
+#endif
+
+static int i82875p_probe1(struct pci_dev *pdev, int dev_idx)
+{
+ int rc = -ENODEV;
+ int index;
+ struct mem_ctl_info *mci = NULL;
+ struct i82875p_pvt *pvt = NULL;
+ unsigned long last_cumul_size;
+ struct pci_dev *ovrfl_pdev;
+ void __iomem *ovrfl_window = NULL;
+
+ u32 drc;
+ u32 drc_chan; /* Number of channels 0=1chan,1=2chan */
+ u32 nr_chans;
+ u32 drc_ddim; /* DRAM Data Integrity Mode 0=none,2=edac */
+
+ debugf0("MC: " __FILE__ ": %s()\n", __func__);
+
+ ovrfl_pdev = pci_find_device(PCI_VEND_DEV(INTEL, 82875_6), NULL);
+
+ if (!ovrfl_pdev) {
+ /*
+ * Intel tells BIOS developers to hide device 6 which
+ * configures the overflow device access containing
+ * the DRBs - this is where we expose device 6.
+ * http://www.x86-secret.com/articles/tweak/pat/patsecrets-2.htm
+ */
+ pci_write_bits8(pdev, 0xf4, 0x2, 0x2);
+ ovrfl_pdev =
+ pci_scan_single_device(pdev->bus, PCI_DEVFN(6, 0));
+ if (!ovrfl_pdev)
+ goto fail;
+ }
+#ifdef CONFIG_PROC_FS
+ if (!ovrfl_pdev->procent && pci_proc_attach_device(ovrfl_pdev)) {
+ printk(KERN_ERR "MC: " __FILE__
+ ": %s(): Failed to attach overflow device\n",
+ __func__);
+ goto fail;
+ }
+#endif /* CONFIG_PROC_FS */
+ if (pci_enable_device(ovrfl_pdev)) {
+ printk(KERN_ERR "MC: " __FILE__
+ ": %s(): Failed to enable overflow device\n",
+ __func__);
+ goto fail;
+ }
+
+ if (pci_request_regions(ovrfl_pdev, pci_name(ovrfl_pdev))) {
+#ifdef CORRECT_BIOS
+ goto fail;
+#endif
+ }
+ /* cache is irrelevant for PCI bus reads/writes */
+ ovrfl_window = ioremap_nocache(pci_resource_start(ovrfl_pdev, 0),
+ pci_resource_len(ovrfl_pdev, 0));
+
+ if (!ovrfl_window) {
+ printk(KERN_ERR "MC: " __FILE__
+ ": %s(): Failed to ioremap bar6\n", __func__);
+ goto fail;
+ }
+
+ /* need to find out the number of channels */
+ drc = readl(ovrfl_window + I82875P_DRC);
+ drc_chan = ((drc >> 21) & 0x1);
+ nr_chans = drc_chan + 1;
+ drc_ddim = (drc >> 18) & 0x1;
+
+ mci = edac_mc_alloc(sizeof(*pvt), I82875P_NR_CSROWS(nr_chans),
+ nr_chans);
+
+ if (!mci) {
+ rc = -ENOMEM;
+ goto fail;
+ }
+
+ debugf3("MC: " __FILE__ ": %s(): init mci\n", __func__);
+
+ mci->pdev = pdev;
+ mci->mtype_cap = MEM_FLAG_DDR;
+
+ mci->edac_ctl_cap = EDAC_FLAG_NONE | EDAC_FLAG_SECDED;
+ mci->edac_cap = EDAC_FLAG_UNKNOWN;
+ /* adjust FLAGS */
+
+ mci->mod_name = BS_MOD_STR;
+ mci->mod_ver = "$Revision: 1.5.2.11 $";
+ mci->ctl_name = i82875p_devs[dev_idx].ctl_name;
+ mci->edac_check = i82875p_check;
+ mci->ctl_page_to_phys = NULL;
+
+ debugf3("MC: " __FILE__ ": %s(): init pvt\n", __func__);
+
+ pvt = (struct i82875p_pvt *) mci->pvt_info;
+ pvt->ovrfl_pdev = ovrfl_pdev;
+ pvt->ovrfl_window = ovrfl_window;
+
+ /*
+ * The dram row boundary (DRB) reg values are boundary address
+ * for each DRAM row with a granularity of 32 or 64MB (single/dual
+ * channel operation). DRB regs are cumulative; therefore DRB7 will
+ * contain the total memory contained in all eight rows.
+ */
+ for (last_cumul_size = index = 0; index < mci->nr_csrows; index++) {
+ u8 value;
+ u32 cumul_size;
+ struct csrow_info *csrow = &mci->csrows[index];
+
+ value = readb(ovrfl_window + I82875P_DRB + index);
+ cumul_size = value << (I82875P_DRB_SHIFT - PAGE_SHIFT);
+ debugf3("MC: " __FILE__ ": %s(): (%d) cumul_size 0x%x\n",
+ __func__, index, cumul_size);
+ if (cumul_size == last_cumul_size)
+ continue; /* not populated */
+
+ csrow->first_page = last_cumul_size;
+ csrow->last_page = cumul_size - 1;
+ csrow->nr_pages = cumul_size - last_cumul_size;
+ last_cumul_size = cumul_size;
+ csrow->grain = 1 << 12; /* I82875P_EAP has 4KiB reolution */
+ csrow->mtype = MEM_DDR;
+ csrow->dtype = DEV_UNKNOWN;
+ csrow->edac_mode = drc_ddim ? EDAC_SECDED : EDAC_NONE;
+ }
+
+ /* clear counters */
+ pci_write_bits16(mci->pdev, I82875P_ERRSTS, 0x0081, 0x0081);
+
+ if (edac_mc_add_mc(mci)) {
+ debugf3("MC: " __FILE__
+ ": %s(): failed edac_mc_add_mc()\n", __func__);
+ goto fail;
+ }
+
+ /* get this far and it's successful */
+ debugf3("MC: " __FILE__ ": %s(): success\n", __func__);
+ return 0;
+
+ fail:
+ if (mci)
+ edac_mc_free(mci);
+
+ if (ovrfl_window)
+ iounmap(ovrfl_window);
+
+ if (ovrfl_pdev) {
+ pci_release_regions(ovrfl_pdev);
+ pci_disable_device(ovrfl_pdev);
+ }
+
+ /* NOTE: the ovrfl proc entry and pci_dev are intentionally left */
+ return rc;
+}
+
+
+/* returns count (>= 0), or negative on error */
+static int __devinit i82875p_init_one(struct pci_dev *pdev,
+ const struct pci_device_id *ent)
+{
+ int rc;
+
+ debugf0("MC: " __FILE__ ": %s()\n", __func__);
+
+ printk(KERN_INFO "i82875p init one\n");
+ if(pci_enable_device(pdev) < 0)
+ return -EIO;
+ rc = i82875p_probe1(pdev, ent->driver_data);
+ if (mci_pdev == NULL)
+ mci_pdev = pci_dev_get(pdev);
+ return rc;
+}
+
+
+static void __devexit i82875p_remove_one(struct pci_dev *pdev)
+{
+ struct mem_ctl_info *mci;
+ struct i82875p_pvt *pvt = NULL;
+
+ debugf0(__FILE__ ": %s()\n", __func__);
+
+ if ((mci = edac_mc_find_mci_by_pdev(pdev)) == NULL)
+ return;
+
+ pvt = (struct i82875p_pvt *) mci->pvt_info;
+ if (pvt->ovrfl_window)
+ iounmap(pvt->ovrfl_window);
+
+ if (pvt->ovrfl_pdev) {
+#ifdef CORRECT_BIOS
+ pci_release_regions(pvt->ovrfl_pdev);
+#endif /*CORRECT_BIOS */
+ pci_disable_device(pvt->ovrfl_pdev);
+ pci_dev_put(pvt->ovrfl_pdev);
+ }
+
+ if (edac_mc_del_mc(mci))
+ return;
+
+ edac_mc_free(mci);
+}
+
+
+static const struct pci_device_id i82875p_pci_tbl[] __devinitdata = {
+ {PCI_VEND_DEV(INTEL, 82875_0), PCI_ANY_ID, PCI_ANY_ID, 0, 0,
+ I82875P},
+ {0,} /* 0 terminated list. */
+};
+
+MODULE_DEVICE_TABLE(pci, i82875p_pci_tbl);
+
+
+static struct pci_driver i82875p_driver = {
+ .name = BS_MOD_STR,
+ .probe = i82875p_init_one,
+ .remove = __devexit_p(i82875p_remove_one),
+ .id_table = i82875p_pci_tbl,
+};
+
+
+static int __init i82875p_init(void)
+{
+ int pci_rc;
+
+ debugf3("MC: " __FILE__ ": %s()\n", __func__);
+ pci_rc = pci_register_driver(&i82875p_driver);
+ if (pci_rc < 0)
+ return pci_rc;
+ if (mci_pdev == NULL) {
+ i82875p_registered = 0;
+ mci_pdev =
+ pci_get_device(PCI_VENDOR_ID_INTEL,
+ PCI_DEVICE_ID_INTEL_82875_0, NULL);
+ if (!mci_pdev) {
+ debugf0("875p pci_get_device fail\n");
+ return -ENODEV;
+ }
+ pci_rc = i82875p_init_one(mci_pdev, i82875p_pci_tbl);
+ if (pci_rc < 0) {
+ debugf0("875p init fail\n");
+ pci_dev_put(mci_pdev);
+ return -ENODEV;
+ }
+ }
+ return 0;
+}
+
+
+static void __exit i82875p_exit(void)
+{
+ debugf3("MC: " __FILE__ ": %s()\n", __func__);
+
+ pci_unregister_driver(&i82875p_driver);
+ if (!i82875p_registered) {
+ i82875p_remove_one(mci_pdev);
+ pci_dev_put(mci_pdev);
+ }
+}
+
+
+module_init(i82875p_init);
+module_exit(i82875p_exit);
+
+
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("Linux Networx (http://lnxi.com) Thayne Harbaugh");
+MODULE_DESCRIPTION("MC support for Intel 82875 memory hub controllers");
--- /dev/null
+/*
+ * Radisys 82600 Embedded chipset Memory Controller kernel module
+ * (C) 2005 EADS Astrium
+ * This file may be distributed under the terms of the
+ * GNU General Public License.
+ *
+ * Written by Tim Small <tim@buttersideup.com>, based on work by Thayne
+ * Harbaugh, Dan Hollis <goemon at anime dot net> and others.
+ *
+ * $Id: edac_r82600.c,v 1.1.2.6 2005/10/05 00:43:44 dsp_llnl Exp $
+ *
+ * Written with reference to 82600 High Integration Dual PCI System
+ * Controller Data Book:
+ * http://www.radisys.com/files/support_downloads/007-01277-0002.82600DataBook.pdf
+ * references to this document given in []
+ */
+
+#include <linux/config.h>
+#include <linux/module.h>
+#include <linux/init.h>
+
+#include <linux/pci.h>
+#include <linux/pci_ids.h>
+
+#include <linux/slab.h>
+
+#include "edac_mc.h"
+
+/* Radisys say "The 82600 integrates a main memory SDRAM controller that
+ * supports up to four banks of memory. The four banks can support a mix of
+ * sizes of 64 bit wide (72 bits with ECC) Synchronous DRAM (SDRAM) DIMMs,
+ * each of which can be any size from 16MB to 512MB. Both registered (control
+ * signals buffered) and unbuffered DIMM types are supported. Mixing of
+ * registered and unbuffered DIMMs as well as mixing of ECC and non-ECC DIMMs
+ * is not allowed. The 82600 SDRAM interface operates at the same frequency as
+ * the CPU bus, 66MHz, 100MHz or 133MHz."
+ */
+
+#define R82600_NR_CSROWS 4
+#define R82600_NR_CHANS 1
+#define R82600_NR_DIMMS 4
+
+#define R82600_BRIDGE_ID 0x8200
+
+/* Radisys 82600 register addresses - device 0 function 0 - PCI bridge */
+#define R82600_DRAMC 0x57 /* Various SDRAM related control bits
+ * all bits are R/W
+ *
+ * 7 SDRAM ISA Hole Enable
+ * 6 Flash Page Mode Enable
+ * 5 ECC Enable: 1=ECC 0=noECC
+ * 4 DRAM DIMM Type: 1=
+ * 3 BIOS Alias Disable
+ * 2 SDRAM BIOS Flash Write Enable
+ * 1:0 SDRAM Refresh Rate: 00=Disabled
+ * 01=7.8usec (256Mbit SDRAMs)
+ * 10=15.6us 11=125usec
+ */
+
+#define R82600_SDRAMC 0x76 /* "SDRAM Control Register"
+ * More SDRAM related control bits
+ * all bits are R/W
+ *
+ * 15:8 Reserved.
+ *
+ * 7:5 Special SDRAM Mode Select
+ *
+ * 4 Force ECC
+ *
+ * 1=Drive ECC bits to 0 during
+ * write cycles (i.e. ECC test mode)
+ *
+ * 0=Normal ECC functioning
+ *
+ * 3 Enhanced Paging Enable
+ *
+ * 2 CAS# Latency 0=3clks 1=2clks
+ *
+ * 1 RAS# to CAS# Delay 0=3 1=2
+ *
+ * 0 RAS# Precharge 0=3 1=2
+ */
+
+#define R82600_EAP 0x80 /* ECC Error Address Pointer Register
+ *
+ * 31 Disable Hardware Scrubbing (RW)
+ * 0=Scrub on corrected read
+ * 1=Don't scrub on corrected read
+ *
+ * 30:12 Error Address Pointer (RO)
+ * Upper 19 bits of error address
+ *
+ * 11:4 Syndrome Bits (RO)
+ *
+ * 3 BSERR# on multibit error (RW)
+ * 1=enable 0=disable
+ *
+ * 2 NMI on Single Bit Eror (RW)
+ * 1=NMI triggered by SBE n.b. other
+ * prerequeists
+ * 0=NMI not triggered
+ *
+ * 1 MBE (R/WC)
+ * read 1=MBE at EAP (see above)
+ * read 0=no MBE, or SBE occurred first
+ * write 1=Clear MBE status (must also
+ * clear SBE)
+ * write 0=NOP
+ *
+ * 1 SBE (R/WC)
+ * read 1=SBE at EAP (see above)
+ * read 0=no SBE, or MBE occurred first
+ * write 1=Clear SBE status (must also
+ * clear MBE)
+ * write 0=NOP
+ */
+
+#define R82600_DRBA 0x60 /* + 0x60..0x63 SDRAM Row Boundry Address
+ * Registers
+ *
+ * 7:0 Address lines 30:24 - upper limit of
+ * each row [p57]
+ */
+
+struct r82600_error_info {
+ u32 eapr;
+};
+
+
+static unsigned int disable_hardware_scrub = 0;
+
+
+static void r82600_get_error_info (struct mem_ctl_info *mci,
+ struct r82600_error_info *info)
+{
+ pci_read_config_dword(mci->pdev, R82600_EAP, &info->eapr);
+
+ if (info->eapr & BIT(0))
+ /* Clear error to allow next error to be reported [p.62] */
+ pci_write_bits32(mci->pdev, R82600_EAP,
+ ((u32) BIT(0) & (u32) BIT(1)),
+ ((u32) BIT(0) & (u32) BIT(1)));
+
+ if (info->eapr & BIT(1))
+ /* Clear error to allow next error to be reported [p.62] */
+ pci_write_bits32(mci->pdev, R82600_EAP,
+ ((u32) BIT(0) & (u32) BIT(1)),
+ ((u32) BIT(0) & (u32) BIT(1)));
+}
+
+
+static int r82600_process_error_info (struct mem_ctl_info *mci,
+ struct r82600_error_info *info, int handle_errors)
+{
+ int error_found;
+ u32 eapaddr, page;
+ u32 syndrome;
+
+ error_found = 0;
+
+ /* bits 30:12 store the upper 19 bits of the 32 bit error address */
+ eapaddr = ((info->eapr >> 12) & 0x7FFF) << 13;
+ /* Syndrome in bits 11:4 [p.62] */
+ syndrome = (info->eapr >> 4) & 0xFF;
+
+ /* the R82600 reports at less than page *
+ * granularity (upper 19 bits only) */
+ page = eapaddr >> PAGE_SHIFT;
+
+ if (info->eapr & BIT(0)) { /* CE? */
+ error_found = 1;
+
+ if (handle_errors)
+ edac_mc_handle_ce(
+ mci, page, 0, /* not avail */
+ syndrome,
+ edac_mc_find_csrow_by_page(mci, page),
+ 0, /* channel */
+ mci->ctl_name);
+ }
+
+ if (info->eapr & BIT(1)) { /* UE? */
+ error_found = 1;
+
+ if (handle_errors)
+ /* 82600 doesn't give enough info */
+ edac_mc_handle_ue(mci, page, 0,
+ edac_mc_find_csrow_by_page(mci, page),
+ mci->ctl_name);
+ }
+
+ return error_found;
+}
+
+static void r82600_check(struct mem_ctl_info *mci)
+{
+ struct r82600_error_info info;
+
+ debugf1("MC%d: " __FILE__ ": %s()\n", mci->mc_idx, __func__);
+ r82600_get_error_info(mci, &info);
+ r82600_process_error_info(mci, &info, 1);
+}
+
+static int r82600_probe1(struct pci_dev *pdev, int dev_idx)
+{
+ int rc = -ENODEV;
+ int index;
+ struct mem_ctl_info *mci = NULL;
+ u8 dramcr;
+ u32 ecc_on;
+ u32 reg_sdram;
+ u32 eapr;
+ u32 scrub_disabled;
+ u32 sdram_refresh_rate;
+ u32 row_high_limit_last = 0;
+ u32 eap_init_bits;
+
+ debugf0("MC: " __FILE__ ": %s()\n", __func__);
+
+
+ pci_read_config_byte(pdev, R82600_DRAMC, &dramcr);
+ pci_read_config_dword(pdev, R82600_EAP, &eapr);
+
+ ecc_on = dramcr & BIT(5);
+ reg_sdram = dramcr & BIT(4);
+ scrub_disabled = eapr & BIT(31);
+ sdram_refresh_rate = dramcr & (BIT(0) | BIT(1));
+
+ debugf2("MC: " __FILE__ ": %s(): sdram refresh rate = %#0x\n",
+ __func__, sdram_refresh_rate);
+
+ debugf2("MC: " __FILE__ ": %s(): DRAMC register = %#0x\n", __func__,
+ dramcr);
+
+ mci = edac_mc_alloc(0, R82600_NR_CSROWS, R82600_NR_CHANS);
+
+ if (mci == NULL) {
+ rc = -ENOMEM;
+ goto fail;
+ }
+
+ debugf0("MC: " __FILE__ ": %s(): mci = %p\n", __func__, mci);
+
+ mci->pdev = pdev;
+ mci->mtype_cap = MEM_FLAG_RDDR | MEM_FLAG_DDR;
+
+ mci->edac_ctl_cap = EDAC_FLAG_NONE | EDAC_FLAG_EC | EDAC_FLAG_SECDED;
+ /* FIXME try to work out if the chip leads have been *
+ * used for COM2 instead on this board? [MA6?] MAYBE: */
+
+ /* On the R82600, the pins for memory bits 72:65 - i.e. the *
+ * EC bits are shared with the pins for COM2 (!), so if COM2 *
+ * is enabled, we assume COM2 is wired up, and thus no EDAC *
+ * is possible. */
+ mci->edac_cap = EDAC_FLAG_NONE | EDAC_FLAG_EC | EDAC_FLAG_SECDED;
+ if (ecc_on) {
+ if (scrub_disabled)
+ debugf3("MC: " __FILE__ ": %s(): mci = %p - "
+ "Scrubbing disabled! EAP: %#0x\n", __func__,
+ mci, eapr);
+ } else
+ mci->edac_cap = EDAC_FLAG_NONE;
+
+ mci->mod_name = BS_MOD_STR;
+ mci->mod_ver = "$Revision: 1.1.2.6 $";
+ mci->ctl_name = "R82600";
+ mci->edac_check = r82600_check;
+ mci->ctl_page_to_phys = NULL;
+
+ for (index = 0; index < mci->nr_csrows; index++) {
+ struct csrow_info *csrow = &mci->csrows[index];
+ u8 drbar; /* sDram Row Boundry Address Register */
+ u32 row_high_limit;
+ u32 row_base;
+
+ /* find the DRAM Chip Select Base address and mask */
+ pci_read_config_byte(mci->pdev, R82600_DRBA + index, &drbar);
+
+ debugf1("MC%d: " __FILE__ ": %s() Row=%d DRBA = %#0x\n",
+ mci->mc_idx, __func__, index, drbar);
+
+ row_high_limit = ((u32) drbar << 24);
+/* row_high_limit = ((u32)drbar << 24) | 0xffffffUL; */
+
+ debugf1("MC%d: " __FILE__ ": %s() Row=%d, "
+ "Boundry Address=%#0x, Last = %#0x \n",
+ mci->mc_idx, __func__, index, row_high_limit,
+ row_high_limit_last);
+
+ /* Empty row [p.57] */
+ if (row_high_limit == row_high_limit_last)
+ continue;
+
+ row_base = row_high_limit_last;
+
+ csrow->first_page = row_base >> PAGE_SHIFT;
+ csrow->last_page = (row_high_limit >> PAGE_SHIFT) - 1;
+ csrow->nr_pages = csrow->last_page - csrow->first_page + 1;
+ /* Error address is top 19 bits - so granularity is *
+ * 14 bits */
+ csrow->grain = 1 << 14;
+ csrow->mtype = reg_sdram ? MEM_RDDR : MEM_DDR;
+ /* FIXME - check that this is unknowable with this chipset */
+ csrow->dtype = DEV_UNKNOWN;
+
+ /* Mode is global on 82600 */
+ csrow->edac_mode = ecc_on ? EDAC_SECDED : EDAC_NONE;
+ row_high_limit_last = row_high_limit;
+ }
+
+ /* clear counters */
+ /* FIXME should we? */
+
+ if (edac_mc_add_mc(mci)) {
+ debugf3("MC: " __FILE__
+ ": %s(): failed edac_mc_add_mc()\n", __func__);
+ goto fail;
+ }
+
+ /* get this far and it's successful */
+
+ /* Clear error flags to allow next error to be reported [p.62] */
+ /* Test systems seem to always have the UE flag raised on boot */
+
+ eap_init_bits = BIT(0) & BIT(1);
+ if (disable_hardware_scrub) {
+ eap_init_bits |= BIT(31);
+ debugf3("MC: " __FILE__ ": %s(): Disabling Hardware Scrub "
+ "(scrub on error)\n", __func__);
+ }
+
+ pci_write_bits32(mci->pdev, R82600_EAP, eap_init_bits,
+ eap_init_bits);
+
+ debugf3("MC: " __FILE__ ": %s(): success\n", __func__);
+ return 0;
+
+fail:
+ if (mci)
+ edac_mc_free(mci);
+
+ return rc;
+}
+
+/* returns count (>= 0), or negative on error */
+static int __devinit r82600_init_one(struct pci_dev *pdev,
+ const struct pci_device_id *ent)
+{
+ debugf0("MC: " __FILE__ ": %s()\n", __func__);
+
+ /* don't need to call pci_device_enable() */
+ return r82600_probe1(pdev, ent->driver_data);
+}
+
+
+static void __devexit r82600_remove_one(struct pci_dev *pdev)
+{
+ struct mem_ctl_info *mci;
+
+ debugf0(__FILE__ ": %s()\n", __func__);
+
+ if (((mci = edac_mc_find_mci_by_pdev(pdev)) != NULL) &&
+ !edac_mc_del_mc(mci))
+ edac_mc_free(mci);
+}
+
+
+static const struct pci_device_id r82600_pci_tbl[] __devinitdata = {
+ {PCI_DEVICE(PCI_VENDOR_ID_RADISYS, R82600_BRIDGE_ID)},
+ {0,} /* 0 terminated list. */
+};
+
+MODULE_DEVICE_TABLE(pci, r82600_pci_tbl);
+
+
+static struct pci_driver r82600_driver = {
+ .name = BS_MOD_STR,
+ .probe = r82600_init_one,
+ .remove = __devexit_p(r82600_remove_one),
+ .id_table = r82600_pci_tbl,
+};
+
+
+static int __init r82600_init(void)
+{
+ return pci_register_driver(&r82600_driver);
+}
+
+
+static void __exit r82600_exit(void)
+{
+ pci_unregister_driver(&r82600_driver);
+}
+
+
+module_init(r82600_init);
+module_exit(r82600_exit);
+
+
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("Tim Small <tim@buttersideup.com> - WPAD Ltd. "
+ "on behalf of EADS Astrium");
+MODULE_DESCRIPTION("MC support for Radisys 82600 memory controllers");
+
+module_param(disable_hardware_scrub, bool, 0644);
+MODULE_PARM_DESC(disable_hardware_scrub,
+ "If set, disable the chipset's automatic scrub for CEs");
ib_unregister_event_handler(&sa_dev->event_handler);
+ flush_scheduled_work();
+
for (i = 0; i <= sa_dev->end_port - sa_dev->start_port; ++i) {
ib_unregister_mad_agent(sa_dev->port[i].agent);
kref_put(&sa_dev->port[i].sm_ah->ref, free_sm_ah);
unregister_filesystem(&uverbs_event_fs);
class_destroy(uverbs_class);
unregister_chrdev_region(IB_UVERBS_BASE_DEV, IB_UVERBS_MAX_DEVICES);
+ flush_scheduled_work();
idr_destroy(&ib_uverbs_pd_idr);
idr_destroy(&ib_uverbs_mr_idr);
idr_destroy(&ib_uverbs_mw_idr);
ah->av->sl_tclass_flowlabel & cpu_to_be32(0xfffff);
ib_get_cached_gid(&dev->ib_dev,
be32_to_cpu(ah->av->port_pd) >> 24,
- ah->av->gid_index,
+ ah->av->gid_index % dev->limits.gid_table_len,
&header->grh.source_gid);
memcpy(header->grh.destination_gid.raw,
ah->av->dgid, 16);
list_add_tail(&neigh->list, &path->neigh_list);
- if (path->pathrec.dlid) {
+ if (path->ah) {
kref_get(&path->ah->ref);
neigh->ah = path->ah;
return;
}
- if (path->pathrec.dlid) {
+ if (path->ah) {
ipoib_dbg(priv, "Send unicast ARP to %04x\n",
be16_to_cpu(path->pathrec.dlid));
struct ipoib_dev_priv *priv = netdev_priv(dev);
struct ipoib_neigh *neigh, *tmp;
unsigned long flags;
+ int tx_dropped = 0;
ipoib_dbg_mcast(netdev_priv(dev),
"deleting multicast group " IPOIB_GID_FMT "\n",
if (mcast->ah)
ipoib_put_ah(mcast->ah);
- while (!skb_queue_empty(&mcast->pkt_queue))
+ while (!skb_queue_empty(&mcast->pkt_queue)) {
+ ++tx_dropped;
dev_kfree_skb_any(skb_dequeue(&mcast->pkt_queue));
+ }
+
+ spin_lock_irqsave(&priv->tx_lock, flags);
+ priv->stats.tx_dropped += tx_dropped;
+ spin_unlock_irqrestore(&priv->tx_lock, flags);
kfree(mcast);
}
}
/* actually send any queued packets */
+ spin_lock_irq(&priv->tx_lock);
while (!skb_queue_empty(&mcast->pkt_queue)) {
struct sk_buff *skb = skb_dequeue(&mcast->pkt_queue);
+ spin_unlock_irq(&priv->tx_lock);
skb->dev = dev;
if (dev_queue_xmit(skb))
ipoib_warn(priv, "dev_queue_xmit failed to requeue packet\n");
+ spin_lock_irq(&priv->tx_lock);
}
+ spin_unlock_irq(&priv->tx_lock);
return 0;
}
{
struct ipoib_mcast *mcast = mcast_ptr;
struct net_device *dev = mcast->dev;
+ struct ipoib_dev_priv *priv = netdev_priv(dev);
if (!status)
ipoib_mcast_join_finish(mcast, mcmember);
IPOIB_GID_ARG(mcast->mcmember.mgid), status);
/* Flush out any queued packets */
- while (!skb_queue_empty(&mcast->pkt_queue))
+ spin_lock_irq(&priv->tx_lock);
+ while (!skb_queue_empty(&mcast->pkt_queue)) {
+ ++priv->stats.tx_dropped;
dev_kfree_skb_any(skb_dequeue(&mcast->pkt_queue));
+ }
+ spin_unlock_irq(&priv->tx_lock);
/* Clear the busy flag so we try again */
clear_bit(IPOIB_MCAST_FLAG_BUSY, &mcast->flags);
if (!mcast) {
ipoib_warn(priv, "unable to allocate memory for "
"multicast structure\n");
+ ++priv->stats.tx_dropped;
dev_kfree_skb_any(skb);
goto out;
}
if (!mcast->ah) {
if (skb_queue_len(&mcast->pkt_queue) < IPOIB_MAX_MCAST_QUEUE)
skb_queue_tail(&mcast->pkt_queue, skb);
- else
+ else {
+ ++priv->stats.tx_dropped;
dev_kfree_skb_any(skb);
+ }
if (mcast->query)
ipoib_dbg_mcast(priv, "no address vector, "
config TOUCHSCREEN_HP600
tristate "HP Jornada 680/690 touchscreen"
- depends on SH_HP600 && SH_ADC
+ depends on SH_HP6XX && SH_ADC
help
Say Y here if you have a HP Jornada 680 or 690 and want to
support the built-in touchscreen.
#ifdef CONFIG_ARCH_OMAP
#include <asm/arch/gpio.h>
#endif
-
-#else
-#define set_irq_type(irq,type) do{}while(0)
#endif
ts->msg.complete = ads7846_rx;
ts->msg.context = ts;
- if (request_irq(spi->irq, ads7846_irq, SA_SAMPLE_RANDOM,
- spi->dev.bus_id, ts)) {
+ if (request_irq(spi->irq, ads7846_irq,
+ SA_SAMPLE_RANDOM | SA_TRIGGER_FALLING,
+ spi->dev.bus_id, ts)) {
dev_dbg(&spi->dev, "irq %d busy?\n", spi->irq);
input_unregister_device(&ts->input);
kfree(ts);
return -EBUSY;
}
- set_irq_type(spi->irq, IRQT_FALLING);
dev_info(&spi->dev, "touchscreen, irq %d\n", spi->irq);
* completion notification.
*/
+#include <asm/types.h>
#include <asm/atomic.h>
#include <linux/blkdev.h>
mddev->ctime = get_seconds();
mddev->level = info->level;
+ mddev->clevel[0] = 0;
mddev->size = info->size;
mddev->raid_disks = info->raid_disks;
/* don't set md_minor, it is determined by which /dev/md* was
.remove = bt878_remove,
};
-static int bt878_pci_driver_registered = 0;
+static int bt878_pci_driver_registered;
/*******************************/
/* Module management functions */
return 0;
}
-static int dvb_bt8xx_remove(struct bttv_sub_device *sub)
+static void dvb_bt8xx_remove(struct bttv_sub_device *sub)
{
struct dvb_bt8xx_card *card = dev_get_drvdata(&sub->dev);
dvb_unregister_adapter(&card->dvb_adapter);
kfree(card);
-
- return 0;
}
static struct bttv_sub_driver driver = {
#include <linux/device.h>
#include <linux/fs.h>
#include <linux/cdev.h>
-
+#include <linux/mutex.h>
#include "dvbdev.h"
static int dvbdev_debug;
#define dprintk if (dvbdev_debug) printk
static LIST_HEAD(dvb_adapter_list);
-static DECLARE_MUTEX(dvbdev_register_lock);
+static DEFINE_MUTEX(dvbdev_register_lock);
static const char * const dnames[] = {
"video", "audio", "sec", "frontend", "demux", "dvr", "ca",
struct dvb_device *dvbdev;
int id;
- if (down_interruptible (&dvbdev_register_lock))
+ if (mutex_lock_interruptible(&dvbdev_register_lock))
return -ERESTARTSYS;
if ((id = dvbdev_get_free_id (adap, type)) < 0) {
- up (&dvbdev_register_lock);
+ mutex_unlock(&dvbdev_register_lock);
*pdvbdev = NULL;
printk ("%s: could get find free device id...\n", __FUNCTION__);
return -ENFILE;
*pdvbdev = dvbdev = kmalloc(sizeof(struct dvb_device), GFP_KERNEL);
if (!dvbdev) {
- up(&dvbdev_register_lock);
+ mutex_unlock(&dvbdev_register_lock);
return -ENOMEM;
}
- up (&dvbdev_register_lock);
+ mutex_unlock(&dvbdev_register_lock);
memcpy(dvbdev, template, sizeof(struct dvb_device));
dvbdev->type = type;
{
int num;
- if (down_interruptible (&dvbdev_register_lock))
+ if (mutex_lock_interruptible(&dvbdev_register_lock))
return -ERESTARTSYS;
if ((num = dvbdev_get_free_adapter_num ()) < 0) {
- up (&dvbdev_register_lock);
+ mutex_unlock(&dvbdev_register_lock);
return -ENFILE;
}
list_add_tail (&adap->list_head, &dvb_adapter_list);
- up (&dvbdev_register_lock);
+ mutex_unlock(&dvbdev_register_lock);
return num;
}
{
devfs_remove("dvb/adapter%d", adap->num);
- if (down_interruptible (&dvbdev_register_lock))
+ if (mutex_lock_interruptible(&dvbdev_register_lock))
return -ERESTARTSYS;
list_del (&adap->list_head);
- up (&dvbdev_register_lock);
+ mutex_unlock(&dvbdev_register_lock);
return 0;
}
EXPORT_SYMBOL(dvb_unregister_adapter);
module_exit (cxusb_module_exit);
MODULE_AUTHOR("Patrick Boettcher <patrick.boettcher@desy.de>");
+MODULE_AUTHOR("Michael Krufky <mkrufky@m1k.net>");
+MODULE_AUTHOR("Chris Pascoe <c.pascoe@itee.uq.edu.au>");
MODULE_DESCRIPTION("Driver for Conexant USB2.0 hybrid reference design");
MODULE_VERSION("1.0-alpha");
MODULE_LICENSE("GPL");
.name = "Samsung TBMV30111IN",
.min = 54000000,
.max = 860000000,
- .count = 4,
+ .count = 6,
.entries = {
{ 172000000, 44000000, 166666, 0xb4, 0x01 },
{ 214000000, 44000000, 166666, 0xb4, 0x02 },
static int hw_sections;
static int rgb_on;
static int volume = 255;
-static int budgetpatch = 0;
+static int budgetpatch;
module_param_named(debug, av7110_debug, int, 0644);
MODULE_PARM_DESC(debug, "debug level (bitmask, default 0)");
static void restart_feeds(struct av7110 *av7110);
-static int av7110_num = 0;
+static int av7110_num;
#define FE_FUNC_OVERRIDE(fe_func, av7110_copy, av7110_func) \
{\
{
int i;
int blocks, rest;
- u32 base, bootblock = BOOT_BLOCK;
+ u32 base, bootblock = AV7110_BOOT_BLOCK;
dprintk(4, "%p\n", av7110);
- blocks = len / BOOT_MAX_SIZE;
- rest = len % BOOT_MAX_SIZE;
+ blocks = len / AV7110_BOOT_MAX_SIZE;
+ rest = len % AV7110_BOOT_MAX_SIZE;
base = DRAM_START_CODE;
for (i = 0; i < blocks; i++) {
- if (waitdebi(av7110, BOOT_STATE, BOOTSTATE_BUFFER_EMPTY) < 0) {
+ if (waitdebi(av7110, AV7110_BOOT_STATE, BOOTSTATE_BUFFER_EMPTY) < 0) {
printk(KERN_ERR "dvb-ttpci: load_dram(): timeout at block %d\n", i);
return -ETIMEDOUT;
}
dprintk(4, "writing DRAM block %d\n", i);
mwdebi(av7110, DEBISWAB, bootblock,
- ((char*)data) + i * BOOT_MAX_SIZE, BOOT_MAX_SIZE);
+ ((char*)data) + i * AV7110_BOOT_MAX_SIZE, AV7110_BOOT_MAX_SIZE);
bootblock ^= 0x1400;
- iwdebi(av7110, DEBISWAB, BOOT_BASE, swab32(base), 4);
- iwdebi(av7110, DEBINOSWAP, BOOT_SIZE, BOOT_MAX_SIZE, 2);
- iwdebi(av7110, DEBINOSWAP, BOOT_STATE, BOOTSTATE_BUFFER_FULL, 2);
- base += BOOT_MAX_SIZE;
+ iwdebi(av7110, DEBISWAB, AV7110_BOOT_BASE, swab32(base), 4);
+ iwdebi(av7110, DEBINOSWAP, AV7110_BOOT_SIZE, AV7110_BOOT_MAX_SIZE, 2);
+ iwdebi(av7110, DEBINOSWAP, AV7110_BOOT_STATE, BOOTSTATE_BUFFER_FULL, 2);
+ base += AV7110_BOOT_MAX_SIZE;
}
if (rest > 0) {
- if (waitdebi(av7110, BOOT_STATE, BOOTSTATE_BUFFER_EMPTY) < 0) {
+ if (waitdebi(av7110, AV7110_BOOT_STATE, BOOTSTATE_BUFFER_EMPTY) < 0) {
printk(KERN_ERR "dvb-ttpci: load_dram(): timeout at last block\n");
return -ETIMEDOUT;
}
if (rest > 4)
mwdebi(av7110, DEBISWAB, bootblock,
- ((char*)data) + i * BOOT_MAX_SIZE, rest);
+ ((char*)data) + i * AV7110_BOOT_MAX_SIZE, rest);
else
mwdebi(av7110, DEBISWAB, bootblock,
- ((char*)data) + i * BOOT_MAX_SIZE - 4, rest + 4);
+ ((char*)data) + i * AV7110_BOOT_MAX_SIZE - 4, rest + 4);
- iwdebi(av7110, DEBISWAB, BOOT_BASE, swab32(base), 4);
- iwdebi(av7110, DEBINOSWAP, BOOT_SIZE, rest, 2);
- iwdebi(av7110, DEBINOSWAP, BOOT_STATE, BOOTSTATE_BUFFER_FULL, 2);
+ iwdebi(av7110, DEBISWAB, AV7110_BOOT_BASE, swab32(base), 4);
+ iwdebi(av7110, DEBINOSWAP, AV7110_BOOT_SIZE, rest, 2);
+ iwdebi(av7110, DEBINOSWAP, AV7110_BOOT_STATE, BOOTSTATE_BUFFER_FULL, 2);
}
- if (waitdebi(av7110, BOOT_STATE, BOOTSTATE_BUFFER_EMPTY) < 0) {
+ if (waitdebi(av7110, AV7110_BOOT_STATE, BOOTSTATE_BUFFER_EMPTY) < 0) {
printk(KERN_ERR "dvb-ttpci: load_dram(): timeout after last block\n");
return -ETIMEDOUT;
}
- iwdebi(av7110, DEBINOSWAP, BOOT_SIZE, 0, 2);
- iwdebi(av7110, DEBINOSWAP, BOOT_STATE, BOOTSTATE_BUFFER_FULL, 2);
- if (waitdebi(av7110, BOOT_STATE, BOOTSTATE_BOOT_COMPLETE) < 0) {
+ iwdebi(av7110, DEBINOSWAP, AV7110_BOOT_SIZE, 0, 2);
+ iwdebi(av7110, DEBINOSWAP, AV7110_BOOT_STATE, BOOTSTATE_BUFFER_FULL, 2);
+ if (waitdebi(av7110, AV7110_BOOT_STATE, BOOTSTATE_AV7110_BOOT_COMPLETE) < 0) {
printk(KERN_ERR "dvb-ttpci: load_dram(): final handshake timeout\n");
return -ETIMEDOUT;
}
//saa7146_setgpio(dev, 3, SAA7146_GPIO_INPUT);
mwdebi(av7110, DEBISWAB, DPRAM_BASE, bootcode, sizeof(bootcode));
- iwdebi(av7110, DEBINOSWAP, BOOT_STATE, BOOTSTATE_BUFFER_FULL, 2);
+ iwdebi(av7110, DEBINOSWAP, AV7110_BOOT_STATE, BOOTSTATE_BUFFER_FULL, 2);
if (saa7146_wait_for_debi_done(av7110->dev, 1)) {
printk(KERN_ERR "dvb-ttpci: av7110_bootarm(): "
{
BOOTSTATE_BUFFER_EMPTY = 0,
BOOTSTATE_BUFFER_FULL = 1,
- BOOTSTATE_BOOT_COMPLETE = 2
+ BOOTSTATE_AV7110_BOOT_COMPLETE = 2
};
enum av7110_type_rec_play_format
#define DPRAM_BASE 0x4000
/* boot protocol area */
-#define BOOT_STATE (DPRAM_BASE + 0x3F8)
-#define BOOT_SIZE (DPRAM_BASE + 0x3FA)
-#define BOOT_BASE (DPRAM_BASE + 0x3FC)
-#define BOOT_BLOCK (DPRAM_BASE + 0x400)
-#define BOOT_MAX_SIZE 0xc00
+#define AV7110_BOOT_STATE (DPRAM_BASE + 0x3F8)
+#define AV7110_BOOT_SIZE (DPRAM_BASE + 0x3FA)
+#define AV7110_BOOT_BASE (DPRAM_BASE + 0x3FC)
+#define AV7110_BOOT_BLOCK (DPRAM_BASE + 0x400)
+#define AV7110_BOOT_MAX_SIZE 0xc00
/* firmware command protocol area */
#define IRQ_STATE (DPRAM_BASE + 0x0F4)
zoran-objs := zr36120.o zr36120_i2c.o zr36120_mem.o
zr36067-objs := zoran_procfs.o zoran_device.o \
zoran_driver.o zoran_card.o
-tuner-objs := tuner-core.o tuner-simple.o mt20xx.o tda8290.o tea5767.o
+tuner-objs := tuner-core.o tuner-types.o tuner-simple.o \
+ mt20xx.o tda8290.o tea5767.o
msp3400-objs := msp3400-driver.o msp3400-kthreads.o
static int freq = DEFAULT_FREQ; /* BCLK: available 50 or 70 (MHz) */
static int vga = 0; /* default mode(0:QVGA mode, other:VGA mode) */
static int vga_interlace = 0; /* 0 is normal mode for, else interlace mode */
-MODULE_PARM(freq, "i");
-MODULE_PARM(vga, "i");
-MODULE_PARM(vga_interlace, "i");
+module_param(freq, int, 0);
+module_param(vga, int, 0);
+module_param(vga_interlace, int, 0);
static int ar_initialize(struct video_device *dev);
I2C_CLIENT_END };
I2C_CLIENT_INSMOD;
-int debug = 0; /* debug output */
+int debug; /* debug output */
module_param(debug, int, 0644);
/* ---------------------------------------------------------------------- */
MODULE_AUTHOR("Gerd Knorr");
MODULE_LICENSE("GPL");
-static unsigned int debug = 0;
+static unsigned int debug;
module_param(debug, int, 0644);
MODULE_PARM_DESC(debug,"debug messages, default is 0 (no)");
static int __devinit pvr_boot(struct bttv *btv);
/* config variables */
-static unsigned int triton1=0;
-static unsigned int vsfx=0;
+static unsigned int triton1;
+static unsigned int vsfx;
static unsigned int latency = UNSET;
int no_overlay=-1;
#ifdef MODULE
static unsigned int autoload = 1;
#else
-static unsigned int autoload = 0;
+static unsigned int autoload;
#endif
static unsigned int gpiomask = UNSET;
static unsigned int audioall = UNSET;
unsigned int bttv_num; /* number of Bt848s in use */
struct bttv bttvs[BTTV_MAX];
-unsigned int bttv_debug = 0;
+unsigned int bttv_debug;
unsigned int bttv_verbose = 1;
-unsigned int bttv_gpio = 0;
+unsigned int bttv_gpio;
/* config variables */
#ifdef __BIG_ENDIAN
static unsigned int bigendian=1;
#else
-static unsigned int bigendian=0;
+static unsigned int bigendian;
#endif
static unsigned int radio[BTTV_MAX];
-static unsigned int irq_debug = 0;
+static unsigned int irq_debug;
static unsigned int gbuffers = 8;
static unsigned int gbufsize = 0x208000;
static int video_nr = -1;
static int radio_nr = -1;
static int vbi_nr = -1;
-static int debug_latency = 0;
+static int debug_latency;
-static unsigned int fdsr = 0;
+static unsigned int fdsr;
/* options */
-static unsigned int combfilter = 0;
-static unsigned int lumafilter = 0;
+static unsigned int combfilter;
+static unsigned int lumafilter;
static unsigned int automute = 1;
-static unsigned int chroma_agc = 0;
+static unsigned int chroma_agc;
static unsigned int adc_crush = 1;
static unsigned int whitecrush_upper = 0xCF;
static unsigned int whitecrush_lower = 0x7F;
-static unsigned int vcr_hack = 0;
-static unsigned int irq_iswitch = 0;
+static unsigned int vcr_hack;
+static unsigned int irq_iswitch;
static unsigned int uv_ratio = 50;
-static unsigned int full_luma_range = 0;
-static unsigned int coring = 0;
+static unsigned int full_luma_range;
+static unsigned int coring;
extern int no_overlay;
/* API features (turn on/off stuff for testing) */
static unsigned int v4l2 = 1;
-
/* insmod args */
module_param(bttv_verbose, int, 0644);
module_param(bttv_gpio, int, 0644);
return 1;
/* is it free? */
- down(&btv->reslock);
+ mutex_lock(&btv->reslock);
if (btv->resources & bit) {
/* no, someone else uses it */
- up(&btv->reslock);
+ mutex_unlock(&btv->reslock);
return 0;
}
/* it's free, grab it */
fh->resources |= bit;
btv->resources |= bit;
- up(&btv->reslock);
+ mutex_unlock(&btv->reslock);
return 1;
}
/* trying to free ressources not allocated by us ... */
printk("bttv: BUG! (btres)\n");
}
- down(&btv->reslock);
+ mutex_lock(&btv->reslock);
fh->resources &= ~bits;
btv->resources &= ~bits;
- up(&btv->reslock);
+ mutex_unlock(&btv->reslock);
}
/* ----------------------------------------------------------------------- */
case VIDIOCSFREQ:
{
unsigned long *freq = arg;
- down(&btv->lock);
+ mutex_lock(&btv->lock);
btv->freq=*freq;
bttv_call_i2c_clients(btv,VIDIOCSFREQ,freq);
if (btv->has_matchbox && btv->radio_user)
tea5757_set_freq(btv,*freq);
- up(&btv->lock);
+ mutex_unlock(&btv->lock);
return 0;
}
if (v->mode >= BTTV_TVNORMS)
return -EINVAL;
- down(&btv->lock);
+ mutex_lock(&btv->lock);
set_tvnorm(btv,v->mode);
bttv_call_i2c_clients(btv,cmd,v);
- up(&btv->lock);
+ mutex_unlock(&btv->lock);
return 0;
}
if (v->norm >= BTTV_TVNORMS)
return -EINVAL;
- down(&btv->lock);
+ mutex_lock(&btv->lock);
if (channel == btv->input &&
v->norm == btv->tvnorm) {
/* nothing to do */
- up(&btv->lock);
+ mutex_unlock(&btv->lock);
return 0;
}
btv->tvnorm = v->norm;
set_input(btv,v->channel);
- up(&btv->lock);
+ mutex_unlock(&btv->lock);
return 0;
}
v->flags |= VIDEO_AUDIO_MUTABLE;
v->mode = VIDEO_SOUND_MONO;
- down(&btv->lock);
+ mutex_lock(&btv->lock);
bttv_call_i2c_clients(btv,cmd,v);
/* card specific hooks */
if (btv->audio_hook)
btv->audio_hook(btv,v,0);
- up(&btv->lock);
+ mutex_unlock(&btv->lock);
return 0;
}
case VIDIOCSAUDIO:
if (audio >= bttv_tvcards[btv->c.type].audio_inputs)
return -EINVAL;
- down(&btv->lock);
+ mutex_lock(&btv->lock);
audio_mux(btv, (v->flags&VIDEO_AUDIO_MUTE) ? AUDIO_MUTE : AUDIO_UNMUTE);
bttv_call_i2c_clients(btv,cmd,v);
if (btv->audio_hook)
btv->audio_hook(btv,v,1);
- up(&btv->lock);
+ mutex_unlock(&btv->lock);
return 0;
}
if (i == BTTV_TVNORMS)
return -EINVAL;
- down(&btv->lock);
+ mutex_lock(&btv->lock);
set_tvnorm(btv,i);
i2c_vidiocschan(btv);
- up(&btv->lock);
+ mutex_unlock(&btv->lock);
return 0;
}
case VIDIOC_QUERYSTD:
if (*i > bttv_tvcards[btv->c.type].video_inputs)
return -EINVAL;
- down(&btv->lock);
+ mutex_lock(&btv->lock);
set_input(btv,*i);
- up(&btv->lock);
+ mutex_unlock(&btv->lock);
return 0;
}
return -EINVAL;
if (0 != t->index)
return -EINVAL;
- down(&btv->lock);
+ mutex_lock(&btv->lock);
memset(t,0,sizeof(*t));
strcpy(t->name, "Television");
t->type = V4L2_TUNER_ANALOG_TV;
}
}
/* FIXME: fill capability+audmode */
- up(&btv->lock);
+ mutex_unlock(&btv->lock);
return 0;
}
case VIDIOC_S_TUNER:
return -EINVAL;
if (0 != t->index)
return -EINVAL;
- down(&btv->lock);
+ mutex_lock(&btv->lock);
{
struct video_audio va;
memset(&va, 0, sizeof(struct video_audio));
if (btv->audio_hook)
btv->audio_hook(btv,&va,1);
}
- up(&btv->lock);
+ mutex_unlock(&btv->lock);
return 0;
}
return -EINVAL;
if (unlikely (f->type != V4L2_TUNER_ANALOG_TV))
return -EINVAL;
- down(&btv->lock);
+ mutex_lock(&btv->lock);
btv->freq = f->frequency;
bttv_call_i2c_clients(btv,VIDIOCSFREQ,&btv->freq);
if (btv->has_matchbox && btv->radio_user)
tea5757_set_freq(btv,btv->freq);
- up(&btv->lock);
+ mutex_unlock(&btv->lock);
return 0;
}
case VIDIOC_LOG_STATUS:
return -ENODEV;
dprintk("bttv%d: open called (radio)\n",btv->c.nr);
- down(&btv->lock);
+ mutex_lock(&btv->lock);
btv->radio_user++;
bttv_call_i2c_clients(btv,AUDC_SET_RADIO,&btv->tuner_type);
audio_mux(btv,AUDIO_RADIO);
- up(&btv->lock);
+ mutex_unlock(&btv->lock);
return 0;
}
sprintf(btv->c.name,"bttv%d",btv->c.nr);
/* initialize structs / fill in defaults */
- init_MUTEX(&btv->lock);
- init_MUTEX(&btv->reslock);
+ mutex_init(&btv->lock);
+ mutex_init(&btv->reslock);
spin_lock_init(&btv->s_lock);
spin_lock_init(&btv->gpio_lock);
init_waitqueue_head(&btv->gpioq);
static int attach_inform(struct i2c_client *client);
-static int i2c_debug = 0;
-static int i2c_hw = 0;
-static int i2c_scan = 0;
+static int i2c_debug;
+static int i2c_hw;
+static int i2c_scan;
module_param(i2c_debug, int, 0644);
module_param(i2c_hw, int, 0444);
module_param(i2c_scan, int, 0444);
#include <linux/videodev.h>
#include <linux/pci.h>
#include <linux/input.h>
+#include <linux/mutex.h>
#include <asm/scatterlist.h>
#include <asm/io.h>
/* locking */
spinlock_t s_lock;
- struct semaphore lock;
+ struct mutex lock;
int resources;
- struct semaphore reslock;
+ struct mutex reslock;
#ifdef VIDIOC_G_PRIORITY
struct v4l2_prio_state prio;
#endif
static unsigned short normal_i2c[] = { 0x88 >> 1, I2C_CLIENT_END };
-int cx25840_debug = 0;
+static int cx25840_debug;
module_param_named(debug,cx25840_debug, int, 0644);
config VIDEO_CX88_ALSA
tristate "ALSA DMA audio support"
- depends on VIDEO_CX88 && SND
- select SND_PCM_OSS
+ depends on VIDEO_CX88 && SND && EXPERIMENTAL
---help---
This is a video4linux driver for direct (DMA) audio on
Conexant 2388x based TV cards.
obj-$(CONFIG_VIDEO_CX88) += cx88xx.o cx8800.o cx8802.o cx88-blackbird.o
obj-$(CONFIG_VIDEO_CX88_DVB) += cx88-dvb.o cx88-vp3054-i2c.o
+obj-$(CONFIG_VIDEO_CX88_ALSA) += cx88-alsa.o
EXTRA_CFLAGS += -I$(src)/..
EXTRA_CFLAGS += -I$(srctree)/drivers/media/dvb/dvb-core
MODULE_SUPPORTED_DEVICE("{{Conexant,23881},"
"{{Conexant,23882},"
"{{Conexant,23883}");
-static unsigned int debug = 0;
+static unsigned int debug;
module_param(debug,int,0644);
MODULE_PARM_DESC(debug,"enable debug messages");
.channels_min = 1,
.channels_max = 2,
.buffer_bytes_max = (2*2048),
- .period_bytes_min = 256,
+ .period_bytes_min = 2048,
.period_bytes_max = 2048,
.periods_min = 2,
- .periods_max = 16,
+ .periods_max = 2,
};
/*
* Alsa Constructor - Component probe
*/
-static int devno=0;
+static int devno;
static int __devinit snd_cx88_create(snd_card_t *card, struct pci_dev *pci,
snd_cx88_card_t **rchip)
{
.id_table = cx88_audio_pci_tbl,
.probe = cx88_audio_initdev,
.remove = cx88_audio_finidev,
- SND_PCI_PM_CALLBACKS
};
/****************************************************************************
#include <linux/pci.h>
#include <linux/delay.h>
#include <linux/videodev2.h>
+#include <linux/mutex.h>
#include "cx88.h"
#include <media/v4l2-common.h>
static unsigned int cx88_devcount;
static LIST_HEAD(cx88_devlist);
-static DECLARE_MUTEX(devlist);
+static DEFINE_MUTEX(devlist);
#define NO_SYNC_LINE (-1U)
struct list_head *item;
int i;
- down(&devlist);
+ mutex_lock(&devlist);
list_for_each(item,&cx88_devlist) {
core = list_entry(item, struct cx88_core, devlist);
if (pci->bus->number != core->pci_bus)
if (0 != get_ressources(core,pci))
goto fail_unlock;
atomic_inc(&core->refcount);
- up(&devlist);
+ mutex_unlock(&devlist);
return core;
}
core = kzalloc(sizeof(*core),GFP_KERNEL);
cx88_card_setup(core);
cx88_ir_init(core,pci);
- up(&devlist);
+ mutex_unlock(&devlist);
return core;
fail_free:
kfree(core);
fail_unlock:
- up(&devlist);
+ mutex_unlock(&devlist);
return NULL;
}
if (!atomic_dec_and_test(&core->refcount))
return;
- down(&devlist);
+ mutex_lock(&devlist);
cx88_ir_fini(core);
if (0 == core->i2c_rc)
i2c_bit_del_bus(&core->i2c_adap);
list_del(&core->devlist);
iounmap(core->lmmio);
cx88_devcount--;
- up(&devlist);
+ mutex_unlock(&devlist);
kfree(core);
}
module_param(audio_debug, int, 0644);
MODULE_PARM_DESC(audio_debug, "enable debug messages [audio]");
+static unsigned int always_analog = 0;
+module_param(always_analog,int,0644);
+MODULE_PARM_DESC(always_analog,"force analog audio out");
+
+
#define dprintk(fmt, arg...) if (audio_debug) \
printk(KERN_DEBUG "%s/0: " fmt, core->name , ## arg)
cx_write(AUD_I2SOUTPUTCNTL, 1);
cx_write(AUD_I2SCNTL, 0);
/* cx_write(AUD_APB_IN_RATE_ADJ, 0); */
- } else {
+ }
+ if ((always_analog) || (!cx88_boards[core->board].blackbird)) {
ctl |= EN_DAC_ENABLE;
cx_write(AUD_CTL, ctl);
}
#include "cx88-vp3054-i2c.h"
+MODULE_DESCRIPTION("driver for cx2388x VP3054 design");
+MODULE_AUTHOR("Chris Pascoe <c.pascoe@itee.uq.edu.au>");
+MODULE_LICENSE("GPL");
+
/* ----------------------------------------------------------------------- */
static void vp3054_bit_setscl(void *data, int state)
[ 0x40 ] = KEY_ZOOM,
};
+static IR_KEYTAB_TYPE ir_codes_em_pinnacle_usb[IR_KEYTAB_SIZE] = {
+ [ 0x3a ] = KEY_KP0,
+ [ 0x31 ] = KEY_KP1,
+ [ 0x32 ] = KEY_KP2,
+ [ 0x33 ] = KEY_KP3,
+ [ 0x34 ] = KEY_KP4,
+ [ 0x35 ] = KEY_KP5,
+ [ 0x36 ] = KEY_KP6,
+ [ 0x37 ] = KEY_KP7,
+ [ 0x38 ] = KEY_KP8,
+ [ 0x39 ] = KEY_KP9,
+
+ [ 0x2f ] = KEY_POWER,
+
+ [ 0x2e ] = KEY_P,
+ [ 0x1f ] = KEY_L,
+ [ 0x2b ] = KEY_I,
+
+ [ 0x2d ] = KEY_ZOOM,
+ [ 0x1e ] = KEY_ZOOM,
+ [ 0x1b ] = KEY_VOLUMEUP,
+ [ 0x0f ] = KEY_VOLUMEDOWN,
+ [ 0x17 ] = KEY_CHANNELUP,
+ [ 0x1c ] = KEY_CHANNELDOWN,
+ [ 0x25 ] = KEY_INFO,
+
+ [ 0x3c ] = KEY_MUTE,
+
+ [ 0x3d ] = KEY_LEFT,
+ [ 0x3b ] = KEY_RIGHT,
+
+ [ 0x3f ] = KEY_UP,
+ [ 0x3e ] = KEY_DOWN,
+ [ 0x1a ] = KEY_PAUSE,
+
+ [ 0x1d ] = KEY_MENU,
+ [ 0x19 ] = KEY_PLAY,
+ [ 0x16 ] = KEY_REWIND,
+ [ 0x13 ] = KEY_FORWARD,
+ [ 0x15 ] = KEY_PAUSE,
+ [ 0x0e ] = KEY_REWIND,
+ [ 0x0d ] = KEY_PLAY,
+ [ 0x0b ] = KEY_STOP,
+ [ 0x07 ] = KEY_FORWARD,
+ [ 0x27 ] = KEY_RECORD,
+ [ 0x26 ] = KEY_TUNER,
+ [ 0x29 ] = KEY_TEXT,
+ [ 0x2a ] = KEY_MEDIA,
+ [ 0x18 ] = KEY_EPG,
+ [ 0x27 ] = KEY_RECORD,
+};
+
/* ----------------------------------------------------------------------- */
static int get_key_terratec(struct IR_i2c *ir, u32 *ir_key, u32 *ir_raw)
return 1;
}
+static int get_key_pinnacle_usb(struct IR_i2c *ir, u32 *ir_key, u32 *ir_raw)
+{
+ unsigned char buf[3];
+
+ /* poll IR chip */
+
+ if (3 != i2c_master_recv(&ir->c,buf,3)) {
+ dprintk("read error\n");
+ return -EIO;
+ }
+
+ dprintk("key %02x\n", buf[2]&0x3f);
+ if (buf[0]!=0x00){
+ return 0;
+ }
+
+ *ir_key = buf[2]&0x3f;
+ *ir_raw = buf[2]&0x3f;
+
+ return 1;
+}
+
/* ----------------------------------------------------------------------- */
void em28xx_set_ir(struct em28xx * dev,struct IR_i2c *ir)
{
snprintf(ir->c.name, sizeof(ir->c.name), "i2c IR (EM28XX Terratec)");
break;
case (EM2820_BOARD_PINNACLE_USB_2):
+ ir->ir_codes = ir_codes_em_pinnacle_usb;
+ ir->get_key = get_key_pinnacle_usb;
+ snprintf(ir->c.name, sizeof(ir->c.name), "i2c IR (EM28XX Pinnacle PCTV)");
break;
case (EM2820_BOARD_HAUPPAUGE_WINTV_USB_2):
ir->ir_codes = ir_codes_hauppauge_new;
#include <linux/i2c.h>
#include <linux/version.h>
#include <linux/video_decoder.h>
+#include <linux/mutex.h>
#include "em28xx.h"
#include <media/tuner.h>
static struct usb_driver em28xx_usb_driver;
-static DECLARE_MUTEX(em28xx_sysfs_lock);
+static DEFINE_MUTEX(em28xx_sysfs_lock);
static DECLARE_RWSEM(em28xx_disconnect);
/********************* v4l2 interface ******************************************/
*/
static void em28xx_release_resources(struct em28xx *dev)
{
- down(&em28xx_sysfs_lock);
+ mutex_lock(&em28xx_sysfs_lock);
em28xx_info("V4L2 device /dev/video%d deregistered\n",
dev->vdev->minor);
/* video_unregister_device(dev->vbi_dev); */
em28xx_i2c_unregister(dev);
usb_put_dev(dev->udev);
- up(&em28xx_sysfs_lock);
+ mutex_unlock(&em28xx_sysfs_lock);
}
/*
/* module parameters */
static int opmode = OPMODE_AUTO;
-int msp_debug = 0; /* msp_debug output */
-int msp_once = 0; /* no continous stereo monitoring */
-int msp_amsound = 0; /* hard-wire AM sound at 6.5 Hz (france),
- the autoscan seems work well only with FM... */
+int msp_debug; /* msp_debug output */
+int msp_once; /* no continous stereo monitoring */
+int msp_amsound; /* hard-wire AM sound at 6.5 Hz (france),
+ the autoscan seems work well only with FM... */
int msp_standard = 1; /* Override auto detect of audio msp_standard, if needed. */
-int msp_dolby = 0;
+int msp_dolby;
int msp_stereo_thresh = 0x190; /* a2 threshold for stereo/bilingual
(msp34xxg only) 0x00a0-0x03c0 */
}
default:
- /* nothing */
- break;
+ /* unknown */
+ return -EINVAL;
}
return 0;
}
/* ---------------------------------------------------------------------- */
-struct msp_matrix {
- int input;
- int output;
-};
-
-/* ioctl for MSP_SET_MATRIX will have to be registered */
-#define MSP_SET_MATRIX _IOW('m',17,struct msp_matrix)
-
/* This macro is allowed for *constants* only, gcc must calculate it
at compile time. Remember -- no floats in kernel mode */
#define MSP_CARRIER(freq) ((int)((float)(freq / 18.432) * (1 << 24)))
} while (xok != 1 );
t->xogc=xogc;
- t->tv_freq = mt2032_set_tv_freq;
- t->radio_freq = mt2032_set_radio_freq;
+ t->set_tv_freq = mt2032_set_tv_freq;
+ t->set_radio_freq = mt2032_set_radio_freq;
return(1);
}
i2c_master_recv(c,buf,1);
tuner_dbg("mt2050: sro is %x\n",buf[0]);
- t->tv_freq = mt2050_set_tv_freq;
- t->radio_freq = mt2050_set_radio_freq;
+ t->set_tv_freq = mt2050_set_tv_freq;
+ t->set_radio_freq = mt2050_set_radio_freq;
return 0;
}
int company_code;
memset(buf,0,sizeof(buf));
- t->tv_freq = NULL;
- t->radio_freq = NULL;
+ t->set_tv_freq = NULL;
+ t->set_radio_freq = NULL;
t->standby = NULL;
if (t->std & V4L2_STD_525_60) {
tuner_dbg("pinnacle ntsc\n");
static int def_norm = PLANB_DEF_NORM; /* default norm */
static int video_nr = -1;
-MODULE_PARM(def_norm, "i");
+module_param(def_norm, int, 0);
MODULE_PARM_DESC(def_norm, "Default startup norm (0=PAL, 1=NTSC, 2=SECAM)");
-MODULE_PARM(video_nr,"i");
+module_param(video_nr, int, 0);
MODULE_LICENSE("GPL");
static unsigned int plvl = 0;
static unsigned int bufblocks = 100;
-MODULE_PARM(debug, "i");
+module_param(debug, int, 0644);
MODULE_PARM_DESC(debug, "enable debug messages");
-MODULE_PARM(xtal, "i");
+module_param(xtal, int, 0);
MODULE_PARM_DESC(xtal, "select oscillator frequency (0..3), default 0");
-MODULE_PARM(rbds, "i");
+module_param(rbds, int, 0);
MODULE_PARM_DESC(rbds, "select mode, 0=RDS, 1=RBDS, default 0");
-MODULE_PARM(plvl, "i");
+module_param(plvl, int, 0);
MODULE_PARM_DESC(plvl, "select pause level (0..3), default 0");
-MODULE_PARM(bufblocks, "i");
+module_param(bufblocks, int, 0);
MODULE_PARM_DESC(bufblocks, "number of buffered blocks, default 100");
MODULE_DESCRIPTION("v4l2 driver module for SAA6588 RDS decoder");
#include <linux/video_decoder.h>
static int debug = 0;
-MODULE_PARM(debug, "i");
+module_param(debug, int, 0644);
MODULE_PARM_DESC(debug, " Set the default Debug level. Default: 0 (Off) - (0-1)");
.tuner_addr = ADDR_UNSET,
.radio_addr = ADDR_UNSET,
.mpeg = SAA7134_MPEG_DVB,
+ .gpiomask = 1 << 21,
.inputs = {{
.name = name_tv,
.vmux = 1,
.vmux = 8,
.amux = LINE1,
}},
+ .radio = {
+ .name = name_radio,
+ .amux = TV,
+ .gpio = 0x0200000,
+ },
},
[SAA7134_BOARD_MSI_TVATANYWHERE_PLUS] = {
.name = "MSI TV@Anywhere plus",
#include <linux/sound.h>
#include <linux/interrupt.h>
#include <linux/delay.h>
+#include <linux/mutex.h>
#include "saa7134-reg.h"
#include "saa7134.h"
MODULE_PARM_DESC(tuner, "tuner type");
MODULE_PARM_DESC(card, "card type");
-static DECLARE_MUTEX(devlist_lock);
+static DEFINE_MUTEX(devlist_lock);
LIST_HEAD(saa7134_devlist);
static LIST_HEAD(mops_list);
static unsigned int saa7134_devcount;
return NOTIFY_DONE;
}
-static int pending_registered=0;
+static int pending_registered;
static struct notifier_block pending_notifier = {
.notifier_call = pending_call,
};
pci_set_drvdata(pci_dev,dev);
saa7134_devcount++;
- down(&devlist_lock);
+ mutex_lock(&devlist_lock);
list_for_each(item,&mops_list) {
mops = list_entry(item, struct saa7134_mpeg_ops, next);
mpeg_ops_attach(mops, dev);
}
list_add_tail(&dev->devlist,&saa7134_devlist);
- up(&devlist_lock);
+ mutex_unlock(&devlist_lock);
/* check for signal */
saa7134_irq_video_intl(dev);
saa7134_hwfini(dev);
/* unregister */
- down(&devlist_lock);
+ mutex_lock(&devlist_lock);
list_del(&dev->devlist);
list_for_each(item,&mops_list) {
mops = list_entry(item, struct saa7134_mpeg_ops, next);
mpeg_ops_detach(mops, dev);
}
- up(&devlist_lock);
+ mutex_unlock(&devlist_lock);
saa7134_devcount--;
saa7134_i2c_unregister(dev);
struct list_head *item;
struct saa7134_dev *dev;
- down(&devlist_lock);
+ mutex_lock(&devlist_lock);
list_for_each(item,&saa7134_devlist) {
dev = list_entry(item, struct saa7134_dev, devlist);
mpeg_ops_attach(ops, dev);
}
list_add_tail(&ops->next,&mops_list);
- up(&devlist_lock);
+ mutex_unlock(&devlist_lock);
return 0;
}
struct list_head *item;
struct saa7134_dev *dev;
- down(&devlist_lock);
+ mutex_lock(&devlist_lock);
list_del(&ops->next);
list_for_each(item,&saa7134_devlist) {
dev = list_entry(item, struct saa7134_dev, devlist);
mpeg_ops_detach(ops, dev);
}
- up(&devlist_lock);
+ mutex_unlock(&devlist_lock);
}
EXPORT_SYMBOL(saa7134_ts_register);
saa_writeb(SAA7134_AUDIO_CLOCK0, clock & 0xff);
saa_writeb(SAA7134_AUDIO_CLOCK1, (clock >> 8) & 0xff);
saa_writeb(SAA7134_AUDIO_CLOCK2, (clock >> 16) & 0xff);
- // frame locked audio was reported not to be reliable
- saa_writeb(SAA7134_AUDIO_PLL_CTRL, 0x02);
+ /* frame locked audio is mandatory for NICAM */
+ saa_writeb(SAA7134_AUDIO_PLL_CTRL, 0x01);
saa_writeb(SAA7134_NICAM_ERROR_LOW, 0x14);
saa_writeb(SAA7134_NICAM_ERROR_HIGH, 0x50);
dprintk("ddep override: %s\n",stdres[audio_ddep]);
} else if (&card(dev).radio == dev->input) {
dprintk("FM Radio\n");
- norms = (0x0f << 2) | 0x01;
+ if (dev->tuner_type == TUNER_PHILIPS_TDA8290) {
+ norms = (0x11 << 2) | 0x01;
+ saa_dsp_writel(dev, 0x42c >> 2, 0x729555);
+ } else {
+ norms = (0x0f << 2) | 0x01;
+ }
} else {
/* (let chip) scan for sound carrier */
norms = 0;
}
tuner_info("tuner: type set to %s\n", c->name);
- t->tv_freq = set_tv_freq;
- t->radio_freq = set_radio_freq;
+ t->set_tv_freq = set_tv_freq;
+ t->set_radio_freq = set_radio_freq;
t->has_signal = has_signal;
t->standby = standby;
t->tda827x_lpsel = 0;
#define TEA5767_PORT1_HIGH 0x01
-/* Forth register */
+/* Fourth register */
#define TEA5767_PORT2_HIGH 0x80
/* Chips stops working. Only I2C bus remains on */
#define TEA5767_STDBY 0x40
/* If activate PORT 1 indicates SEARCH or else it is used as PORT1 */
#define TEA5767_SRCH_IND 0x01
-/* Fiveth register */
+/* Fifth register */
/* By activating, it will use Xtal at 13 MHz as reference for divider */
#define TEA5767_PLLREF_ENABLE 0x80
#define TEA5767_STEREO_MASK 0x80
#define TEA5767_IF_CNTR_MASK 0x7f
-/* Four register */
+/* Fourth register */
#define TEA5767_ADC_LEVEL_MASK 0xf0
/* should be 0 */
#define TEA5767_CHIP_ID_MASK 0x0f
-/* Fiveth register */
+/* Fifth register */
/* Reserved for future extensions */
#define TEA5767_RESERVED_MASK 0xff
tuner_dbg ("TEA5767 radio HIGH LO inject xtal @ 13 MHz\n");
buffer[2] |= TEA5767_HIGH_LO_INJECT;
buffer[4] |= TEA5767_PLLREF_ENABLE;
- div = (frq * 4000 / 16 + 700000 + 225000 + 25000) / 50000;
+ div = (frq * (4000 / 16) + 700000 + 225000 + 25000) / 50000;
break;
case TEA5767_LOW_LO_13MHz:
tuner_dbg ("TEA5767 radio LOW LO inject xtal @ 13 MHz\n");
buffer[4] |= TEA5767_PLLREF_ENABLE;
- div = (frq * 4000 / 16 - 700000 - 225000 + 25000) / 50000;
+ div = (frq * (4000 / 16) - 700000 - 225000 + 25000) / 50000;
break;
case TEA5767_LOW_LO_32768:
tuner_dbg ("TEA5767 radio LOW LO inject xtal @ 32,768 MHz\n");
buffer[3] |= TEA5767_XTAL_32768;
/* const 700=4000*175 Khz - to adjust freq to right value */
- div = ((frq * 4000 / 16 - 700000 - 225000) + 16384) >> 15;
+ div = ((frq * (4000 / 16) - 700000 - 225000) + 16384) >> 15;
break;
case TEA5767_HIGH_LO_32768:
default:
tuner_info("type set to %d (%s)\n", t->type, "Philips TEA5767HN FM Radio");
strlcpy(c->name, "tea5767", sizeof(c->name));
- t->tv_freq = set_tv_freq;
- t->radio_freq = set_radio_freq;
+ t->set_tv_freq = set_tv_freq;
+ t->set_radio_freq = set_radio_freq;
t->has_signal = tea5767_signal;
t->is_stereo = tea5767_stereo;
t->standby = tea5767_standby;
tuner_warn ("tuner type not set\n");
return;
}
- if (NULL == t->tv_freq) {
+ if (NULL == t->set_tv_freq) {
tuner_warn ("Tuner has no way to set tv freq\n");
return;
}
tuner_dbg ("TV freq (%d.%02d) out of range (%d-%d)\n",
freq / 16, freq % 16 * 100 / 16, tv_range[0],
tv_range[1]);
+ /* V4L2 spec: if the freq is not possible then the closest
+ possible value should be selected */
+ if (freq < tv_range[0] * 16)
+ freq = tv_range[0] * 16;
+ else
+ freq = tv_range[1] * 16;
}
- t->tv_freq(c, freq);
+ t->set_tv_freq(c, freq);
}
static void set_radio_freq(struct i2c_client *c, unsigned int freq)
tuner_warn ("tuner type not set\n");
return;
}
- if (NULL == t->radio_freq) {
+ if (NULL == t->set_radio_freq) {
tuner_warn ("tuner has no way to set radio frequency\n");
return;
}
- if (freq <= radio_range[0] * 16000 || freq >= radio_range[1] * 16000) {
+ if (freq < radio_range[0] * 16000 || freq > radio_range[1] * 16000) {
tuner_dbg ("radio freq (%d.%02d) out of range (%d-%d)\n",
freq / 16000, freq % 16000 * 100 / 16000,
radio_range[0], radio_range[1]);
+ /* V4L2 spec: if the freq is not possible then the closest
+ possible value should be selected */
+ if (freq < radio_range[0] * 16000)
+ freq = radio_range[0] * 16000;
+ else
+ freq = radio_range[1] * 16000;
}
- t->radio_freq(c, freq);
- return;
+ t->set_radio_freq(c, freq);
}
static void set_freq(struct i2c_client *c, unsigned long freq)
tuner_dbg("radio freq set to %lu.%02lu\n",
freq / 16000, freq % 16000 * 100 / 16000);
set_radio_freq(c, freq);
+ t->radio_freq = freq;
break;
case V4L2_TUNER_ANALOG_TV:
case V4L2_TUNER_DIGITAL_TV:
tuner_dbg("tv freq set to %lu.%02lu\n",
freq / 16, freq % 16 * 100 / 16);
set_tv_freq(c, freq);
+ t->tv_freq = freq;
break;
}
- t->freq = freq;
}
static void set_type(struct i2c_client *c, unsigned int type,
if (t->mode_mask == T_UNINITIALIZED)
t->mode_mask = new_mode_mask;
- set_freq(c, t->freq);
+ set_freq(c, (V4L2_TUNER_RADIO == t->mode) ? t->radio_freq : t->tv_freq);
tuner_dbg("%s %s I2C addr 0x%02x with type %d used for 0x%02x\n",
c->adapter->name, c->driver->driver.name, c->addr << 1, type,
t->mode_mask);
default: p = "undefined"; break;
}
if (t->mode == V4L2_TUNER_RADIO) {
- freq = t->freq / 16000;
- freq_fraction = (t->freq % 16000) * 100 / 16000;
+ freq = t->radio_freq / 16000;
+ freq_fraction = (t->radio_freq % 16000) * 100 / 16000;
} else {
- freq = t->freq / 16;
- freq_fraction = (t->freq % 16) * 100 / 16;
+ freq = t->tv_freq / 16;
+ freq_fraction = (t->tv_freq % 16) * 100 / 16;
}
tuner_info("Tuner mode: %s\n", p);
tuner_info("Frequency: %lu.%02lu MHz\n", freq, freq_fraction);
t->type = TUNER_TEA5767;
t->mode_mask = T_RADIO;
t->mode = T_STANDBY;
- t->freq = 87.5 * 16; /* Sets freq to FM range */
+ t->radio_freq = 87.5 * 16000; /* Sets freq to FM range */
default_mode_mask &= ~T_RADIO;
goto register_client;
if (default_mode_mask != T_UNINITIALIZED) {
tuner_dbg ("Setting mode_mask to 0x%02x\n", default_mode_mask);
t->mode_mask = default_mode_mask;
- t->freq = 400 * 16; /* Sets freq to VHF High */
+ t->tv_freq = 400 * 16; /* Sets freq to VHF High */
+ t->radio_freq = 87.5 * 16000; /* Sets freq to FM range */
default_mode_mask = T_UNINITIALIZED;
}
set_addr(client, (struct tuner_setup *)arg);
break;
case AUDC_SET_RADIO:
- set_mode(client,t,V4L2_TUNER_RADIO, "AUDC_SET_RADIO");
+ if (set_mode(client, t, V4L2_TUNER_RADIO, "AUDC_SET_RADIO")
+ == EINVAL)
+ return 0;
+ if (t->radio_freq)
+ set_freq(client, t->radio_freq);
break;
case TUNER_SET_STANDBY:
- {
- if (check_mode(t, "TUNER_SET_STANDBY") == EINVAL)
- return 0;
- if (t->standby)
- t->standby (client);
- break;
- }
+ if (check_mode(t, "TUNER_SET_STANDBY") == EINVAL)
+ return 0;
+ if (t->standby)
+ t->standby (client);
+ break;
case VIDIOCSAUDIO:
if (check_mode(t, "VIDIOCSAUDIO") == EINVAL)
return 0;
/* Should be implemented, since bttv calls it */
tuner_dbg("VIDIOCSAUDIO not implemented.\n");
-
break;
/* --- v4l ioctls --- */
/* take care: bttv does userspace copying, we'll get a
if (vc->norm < ARRAY_SIZE(map))
t->std = map[vc->norm];
tuner_fixup_std(t);
- if (t->freq)
- set_tv_freq(client, t->freq);
+ if (t->tv_freq)
+ set_tv_freq(client, t->tv_freq);
return 0;
}
case VIDIOCSFREQ:
t->std = *id;
tuner_fixup_std(t);
- if (t->freq)
- set_freq(client, t->freq);
+ if (t->tv_freq)
+ set_freq(client, t->tv_freq);
break;
}
case VIDIOC_S_FREQUENCY:
{
struct v4l2_frequency *f = arg;
- t->freq = f->frequency;
switch_v4l2();
if (V4L2_TUNER_RADIO == f->type &&
V4L2_TUNER_RADIO != t->mode) {
== EINVAL)
return 0;
}
- set_freq(client,t->freq);
+ set_freq(client,f->frequency);
break;
}
return 0;
switch_v4l2();
f->type = t->mode;
- f->frequency = t->freq;
+ f->frequency = (V4L2_TUNER_RADIO == t->mode) ?
+ t->radio_freq : t->tv_freq;
break;
}
case VIDIOC_G_TUNER:
if (V4L2_TUNER_RADIO == t->mode) {
t->audmode = tuner->audmode;
- set_radio_freq(client, t->freq);
+ set_radio_freq(client, t->radio_freq);
}
break;
}
struct tuner *t = i2c_get_clientdata (c);
tuner_dbg ("resume\n");
- if (t->freq)
- set_freq(c, t->freq);
+ if (V4L2_TUNER_RADIO == t->mode) {
+ if (t->radio_freq)
+ set_freq(c, t->radio_freq);
+ } else {
+ if (t->tv_freq)
+ set_freq(c, t->tv_freq);
+ }
return 0;
}
#define TUNER_PLL_LOCKED 0x40
#define TUNER_STEREO_MK3 0x04
-#define TUNER_MAX_RANGES 3
-
-/* ---------------------------------------------------------------------- */
-
-struct tunertype
-{
- char *name;
-
- int count;
- struct {
- unsigned short thresh;
- unsigned char cb;
- } ranges[TUNER_MAX_RANGES];
- unsigned char config;
-};
-
-/*
- * The floats in the tuner struct are computed at compile time
- * by gcc and cast back to integers. Thus we don't violate the
- * "no float in kernel" rule.
+#define TUNER_PARAM_ANALOG 0 /* to be removed */
+/* FIXME:
+ * Right now, all tuners are using the first tuner_params[] array element
+ * for analog mode. In the future, we will be merging similar tuner
+ * definitions together, such that each tuner definition will have a
+ * tuner_params struct for each available video standard. At that point,
+ * TUNER_PARAM_ANALOG will be removed, and the tuner_params[] array
+ * element will be chosen based on the video standard in use.
+ *
*/
-static struct tunertype tuners[] = {
- /* 0-9 */
- [TUNER_TEMIC_PAL] = { /* TEMIC PAL */
- .name = "Temic PAL (4002 FH5)",
- .count = 3,
- .ranges = {
- { 16 * 140.25 /*MHz*/, 0x02, },
- { 16 * 463.25 /*MHz*/, 0x04, },
- { 16 * 999.99 , 0x01, },
- },
- .config = 0x8e,
- },
- [TUNER_PHILIPS_PAL_I] = { /* Philips PAL_I */
- .name = "Philips PAL_I (FI1246 and compatibles)",
- .count = 3,
- .ranges = {
- { 16 * 140.25 /*MHz*/, 0xa0, },
- { 16 * 463.25 /*MHz*/, 0x90, },
- { 16 * 999.99 , 0x30, },
- },
- .config = 0x8e,
- },
- [TUNER_PHILIPS_NTSC] = { /* Philips NTSC */
- .name = "Philips NTSC (FI1236,FM1236 and compatibles)",
- .count = 3,
- .ranges = {
- { 16 * 157.25 /*MHz*/, 0xa0, },
- { 16 * 451.25 /*MHz*/, 0x90, },
- { 16 * 999.99 , 0x30, },
- },
- .config = 0x8e,
- },
- [TUNER_PHILIPS_SECAM] = { /* Philips SECAM */
- .name = "Philips (SECAM+PAL_BG) (FI1216MF, FM1216MF, FR1216MF)",
- .count = 3,
- .ranges = {
- { 16 * 168.25 /*MHz*/, 0xa7, },
- { 16 * 447.25 /*MHz*/, 0x97, },
- { 16 * 999.99 , 0x37, },
- },
- .config = 0x8e,
- },
- [TUNER_ABSENT] = { /* Tuner Absent */
- .name = "NoTuner",
- .count = 1,
- .ranges = {
- { 0, 0x00, },
- },
- .config = 0x00,
- },
- [TUNER_PHILIPS_PAL] = { /* Philips PAL */
- .name = "Philips PAL_BG (FI1216 and compatibles)",
- .count = 3,
- .ranges = {
- { 16 * 168.25 /*MHz*/, 0xa0, },
- { 16 * 447.25 /*MHz*/, 0x90, },
- { 16 * 999.99 , 0x30, },
- },
- .config = 0x8e,
- },
- [TUNER_TEMIC_NTSC] = { /* TEMIC NTSC */
- .name = "Temic NTSC (4032 FY5)",
- .count = 3,
- .ranges = {
- { 16 * 157.25 /*MHz*/, 0x02, },
- { 16 * 463.25 /*MHz*/, 0x04, },
- { 16 * 999.99 , 0x01, },
- },
- .config = 0x8e,
- },
- [TUNER_TEMIC_PAL_I] = { /* TEMIC PAL_I */
- .name = "Temic PAL_I (4062 FY5)",
- .count = 3,
- .ranges = {
- { 16 * 170.00 /*MHz*/, 0x02, },
- { 16 * 450.00 /*MHz*/, 0x04, },
- { 16 * 999.99 , 0x01, },
- },
- .config = 0x8e,
- },
- [TUNER_TEMIC_4036FY5_NTSC] = { /* TEMIC NTSC */
- .name = "Temic NTSC (4036 FY5)",
- .count = 3,
- .ranges = {
- { 16 * 157.25 /*MHz*/, 0xa0, },
- { 16 * 463.25 /*MHz*/, 0x90, },
- { 16 * 999.99 , 0x30, },
- },
- .config = 0x8e,
- },
- [TUNER_ALPS_TSBH1_NTSC] = { /* TEMIC NTSC */
- .name = "Alps HSBH1",
- .count = 3,
- .ranges = {
- { 16 * 137.25 /*MHz*/, 0x01, },
- { 16 * 385.25 /*MHz*/, 0x02, },
- { 16 * 999.99 , 0x08, },
- },
- .config = 0x8e,
- },
-
- /* 10-19 */
- [TUNER_ALPS_TSBE1_PAL] = { /* TEMIC PAL */
- .name = "Alps TSBE1",
- .count = 3,
- .ranges = {
- { 16 * 137.25 /*MHz*/, 0x01, },
- { 16 * 385.25 /*MHz*/, 0x02, },
- { 16 * 999.99 , 0x08, },
- },
- .config = 0x8e,
- },
- [TUNER_ALPS_TSBB5_PAL_I] = { /* Alps PAL_I */
- .name = "Alps TSBB5",
- .count = 3,
- .ranges = {
- { 16 * 133.25 /*MHz*/, 0x01, },
- { 16 * 351.25 /*MHz*/, 0x02, },
- { 16 * 999.99 , 0x08, },
- },
- .config = 0x8e,
- },
- [TUNER_ALPS_TSBE5_PAL] = { /* Alps PAL */
- .name = "Alps TSBE5",
- .count = 3,
- .ranges = {
- { 16 * 133.25 /*MHz*/, 0x01, },
- { 16 * 351.25 /*MHz*/, 0x02, },
- { 16 * 999.99 , 0x08, },
- },
- .config = 0x8e,
- },
- [TUNER_ALPS_TSBC5_PAL] = { /* Alps PAL */
- .name = "Alps TSBC5",
- .count = 3,
- .ranges = {
- { 16 * 133.25 /*MHz*/, 0x01, },
- { 16 * 351.25 /*MHz*/, 0x02, },
- { 16 * 999.99 , 0x08, },
- },
- .config = 0x8e,
- },
- [TUNER_TEMIC_4006FH5_PAL] = { /* TEMIC PAL */
- .name = "Temic PAL_BG (4006FH5)",
- .count = 3,
- .ranges = {
- { 16 * 170.00 /*MHz*/, 0xa0, },
- { 16 * 450.00 /*MHz*/, 0x90, },
- { 16 * 999.99 , 0x30, },
- },
- .config = 0x8e,
- },
- [TUNER_ALPS_TSHC6_NTSC] = { /* Alps NTSC */
- .name = "Alps TSCH6",
- .count = 3,
- .ranges = {
- { 16 * 137.25 /*MHz*/, 0x14, },
- { 16 * 385.25 /*MHz*/, 0x12, },
- { 16 * 999.99 , 0x11, },
- },
- .config = 0x8e,
- },
- [TUNER_TEMIC_PAL_DK] = { /* TEMIC PAL */
- .name = "Temic PAL_DK (4016 FY5)",
- .count = 3,
- .ranges = {
- { 16 * 168.25 /*MHz*/, 0xa0, },
- { 16 * 456.25 /*MHz*/, 0x90, },
- { 16 * 999.99 , 0x30, },
- },
- .config = 0x8e,
- },
- [TUNER_PHILIPS_NTSC_M] = { /* Philips NTSC */
- .name = "Philips NTSC_M (MK2)",
- .count = 3,
- .ranges = {
- { 16 * 160.00 /*MHz*/, 0xa0, },
- { 16 * 454.00 /*MHz*/, 0x90, },
- { 16 * 999.99 , 0x30, },
- },
- .config = 0x8e,
- },
- [TUNER_TEMIC_4066FY5_PAL_I] = { /* TEMIC PAL_I */
- .name = "Temic PAL_I (4066 FY5)",
- .count = 3,
- .ranges = {
- { 16 * 169.00 /*MHz*/, 0xa0, },
- { 16 * 454.00 /*MHz*/, 0x90, },
- { 16 * 999.99 , 0x30, },
- },
- .config = 0x8e,
- },
- [TUNER_TEMIC_4006FN5_MULTI_PAL] = { /* TEMIC PAL */
- .name = "Temic PAL* auto (4006 FN5)",
- .count = 3,
- .ranges = {
- { 16 * 169.00 /*MHz*/, 0xa0, },
- { 16 * 454.00 /*MHz*/, 0x90, },
- { 16 * 999.99 , 0x30, },
- },
- .config = 0x8e,
- },
-
- /* 20-29 */
- [TUNER_TEMIC_4009FR5_PAL] = { /* TEMIC PAL */
- .name = "Temic PAL_BG (4009 FR5) or PAL_I (4069 FR5)",
- .count = 3,
- .ranges = {
- { 16 * 141.00 /*MHz*/, 0xa0, },
- { 16 * 464.00 /*MHz*/, 0x90, },
- { 16 * 999.99 , 0x30, },
- },
- .config = 0x8e,
- },
- [TUNER_TEMIC_4039FR5_NTSC] = { /* TEMIC NTSC */
- .name = "Temic NTSC (4039 FR5)",
- .count = 3,
- .ranges = {
- { 16 * 158.00 /*MHz*/, 0xa0, },
- { 16 * 453.00 /*MHz*/, 0x90, },
- { 16 * 999.99 , 0x30, },
- },
- .config = 0x8e,
- },
- [TUNER_TEMIC_4046FM5] = { /* TEMIC PAL */
- .name = "Temic PAL/SECAM multi (4046 FM5)",
- .count = 3,
- .ranges = {
- { 16 * 169.00 /*MHz*/, 0xa0, },
- { 16 * 454.00 /*MHz*/, 0x90, },
- { 16 * 999.99 , 0x30, },
- },
- .config = 0x8e,
- },
- [TUNER_PHILIPS_PAL_DK] = { /* Philips PAL */
- .name = "Philips PAL_DK (FI1256 and compatibles)",
- .count = 3,
- .ranges = {
- { 16 * 170.00 /*MHz*/, 0xa0, },
- { 16 * 450.00 /*MHz*/, 0x90, },
- { 16 * 999.99 , 0x30, },
- },
- .config = 0x8e,
- },
- [TUNER_PHILIPS_FQ1216ME] = { /* Philips PAL */
- .name = "Philips PAL/SECAM multi (FQ1216ME)",
- .count = 3,
- .ranges = {
- { 16 * 170.00 /*MHz*/, 0xa0, },
- { 16 * 450.00 /*MHz*/, 0x90, },
- { 16 * 999.99 , 0x30, },
- },
- .config = 0x8e,
- },
- [TUNER_LG_PAL_I_FM] = { /* LGINNOTEK PAL_I */
- .name = "LG PAL_I+FM (TAPC-I001D)",
- .count = 3,
- .ranges = {
- { 16 * 170.00 /*MHz*/, 0xa0, },
- { 16 * 450.00 /*MHz*/, 0x90, },
- { 16 * 999.99 , 0x30, },
- },
- .config = 0x8e,
- },
- [TUNER_LG_PAL_I] = { /* LGINNOTEK PAL_I */
- .name = "LG PAL_I (TAPC-I701D)",
- .count = 3,
- .ranges = {
- { 16 * 170.00 /*MHz*/, 0xa0, },
- { 16 * 450.00 /*MHz*/, 0x90, },
- { 16 * 999.99 , 0x30, },
- },
- .config = 0x8e,
- },
- [TUNER_LG_NTSC_FM] = { /* LGINNOTEK NTSC */
- .name = "LG NTSC+FM (TPI8NSR01F)",
- .count = 3,
- .ranges = {
- { 16 * 210.00 /*MHz*/, 0xa0, },
- { 16 * 497.00 /*MHz*/, 0x90, },
- { 16 * 999.99 , 0x30, },
- },
- .config = 0x8e,
- },
- [TUNER_LG_PAL_FM] = { /* LGINNOTEK PAL */
- .name = "LG PAL_BG+FM (TPI8PSB01D)",
- .count = 3,
- .ranges = {
- { 16 * 170.00 /*MHz*/, 0xa0, },
- { 16 * 450.00 /*MHz*/, 0x90, },
- { 16 * 999.99 , 0x30, },
- },
- .config = 0x8e,
- },
- [TUNER_LG_PAL] = { /* LGINNOTEK PAL */
- .name = "LG PAL_BG (TPI8PSB11D)",
- .count = 3,
- .ranges = {
- { 16 * 170.00 /*MHz*/, 0xa0, },
- { 16 * 450.00 /*MHz*/, 0x90, },
- { 16 * 999.99 , 0x30, },
- },
- .config = 0x8e,
- },
-
- /* 30-39 */
- [TUNER_TEMIC_4009FN5_MULTI_PAL_FM] = { /* TEMIC PAL */
- .name = "Temic PAL* auto + FM (4009 FN5)",
- .count = 3,
- .ranges = {
- { 16 * 141.00 /*MHz*/, 0xa0, },
- { 16 * 464.00 /*MHz*/, 0x90, },
- { 16 * 999.99 , 0x30, },
- },
- .config = 0x8e,
- },
- [TUNER_SHARP_2U5JF5540_NTSC] = { /* SHARP NTSC */
- .name = "SHARP NTSC_JP (2U5JF5540)",
- .count = 3,
- .ranges = {
- { 16 * 137.25 /*MHz*/, 0x01, },
- { 16 * 317.25 /*MHz*/, 0x02, },
- { 16 * 999.99 , 0x08, },
- },
- .config = 0x8e,
- },
- [TUNER_Samsung_PAL_TCPM9091PD27] = { /* Samsung PAL */
- .name = "Samsung PAL TCPM9091PD27",
- .count = 3,
- .ranges = {
- { 16 * 169 /*MHz*/, 0xa0, },
- { 16 * 464 /*MHz*/, 0x90, },
- { 16 * 999.99 , 0x30, },
- },
- .config = 0x8e,
- },
- [TUNER_MT2032] = { /* Microtune PAL|NTSC */
- .name = "MT20xx universal",
- /* see mt20xx.c for details */ },
- [TUNER_TEMIC_4106FH5] = { /* TEMIC PAL */
- .name = "Temic PAL_BG (4106 FH5)",
- .count = 3,
- .ranges = {
- { 16 * 141.00 /*MHz*/, 0xa0, },
- { 16 * 464.00 /*MHz*/, 0x90, },
- { 16 * 999.99 , 0x30, },
- },
- .config = 0x8e,
- },
- [TUNER_TEMIC_4012FY5] = { /* TEMIC PAL */
- .name = "Temic PAL_DK/SECAM_L (4012 FY5)",
- .count = 3,
- .ranges = {
- { 16 * 140.25 /*MHz*/, 0x02, },
- { 16 * 463.25 /*MHz*/, 0x04, },
- { 16 * 999.99 , 0x01, },
- },
- .config = 0x8e,
- },
- [TUNER_TEMIC_4136FY5] = { /* TEMIC NTSC */
- .name = "Temic NTSC (4136 FY5)",
- .count = 3,
- .ranges = {
- { 16 * 158.00 /*MHz*/, 0xa0, },
- { 16 * 453.00 /*MHz*/, 0x90, },
- { 16 * 999.99 , 0x30, },
- },
- .config = 0x8e,
- },
- [TUNER_LG_PAL_NEW_TAPC] = { /* LGINNOTEK PAL */
- .name = "LG PAL (newer TAPC series)",
- .count = 3,
- .ranges = {
- { 16 * 170.00 /*MHz*/, 0x01, },
- { 16 * 450.00 /*MHz*/, 0x02, },
- { 16 * 999.99 , 0x08, },
- },
- .config = 0x8e,
- },
- [TUNER_PHILIPS_FM1216ME_MK3] = { /* Philips PAL */
- .name = "Philips PAL/SECAM multi (FM1216ME MK3)",
- .count = 3,
- .ranges = {
- { 16 * 158.00 /*MHz*/, 0x01, },
- { 16 * 442.00 /*MHz*/, 0x02, },
- { 16 * 999.99 , 0x04, },
- },
- .config = 0x8e,
- },
- [TUNER_LG_NTSC_NEW_TAPC] = { /* LGINNOTEK NTSC */
- .name = "LG NTSC (newer TAPC series)",
- .count = 3,
- .ranges = {
- { 16 * 170.00 /*MHz*/, 0x01, },
- { 16 * 450.00 /*MHz*/, 0x02, },
- { 16 * 999.99 , 0x08, },
- },
- .config = 0x8e,
- },
-
- /* 40-49 */
- [TUNER_HITACHI_NTSC] = { /* HITACHI NTSC */
- .name = "HITACHI V7-J180AT",
- .count = 3,
- .ranges = {
- { 16 * 170.00 /*MHz*/, 0x01, },
- { 16 * 450.00 /*MHz*/, 0x02, },
- { 16 * 999.99 , 0x08, },
- },
- .config = 0x8e,
- },
- [TUNER_PHILIPS_PAL_MK] = { /* Philips PAL */
- .name = "Philips PAL_MK (FI1216 MK)",
- .count = 3,
- .ranges = {
- { 16 * 140.25 /*MHz*/, 0x01, },
- { 16 * 463.25 /*MHz*/, 0xc2, },
- { 16 * 999.99 , 0xcf, },
- },
- .config = 0x8e,
- },
- [TUNER_PHILIPS_ATSC] = { /* Philips ATSC */
- .name = "Philips 1236D ATSC/NTSC dual in",
- .count = 3,
- .ranges = {
- { 16 * 157.25 /*MHz*/, 0xa0, },
- { 16 * 454.00 /*MHz*/, 0x90, },
- { 16 * 999.99 , 0x30, },
- },
- .config = 0x8e,
- },
- [TUNER_PHILIPS_FM1236_MK3] = { /* Philips NTSC */
- .name = "Philips NTSC MK3 (FM1236MK3 or FM1236/F)",
- .count = 3,
- .ranges = {
- { 16 * 160.00 /*MHz*/, 0x01, },
- { 16 * 442.00 /*MHz*/, 0x02, },
- { 16 * 999.99 , 0x04, },
- },
- .config = 0x8e,
- },
- [TUNER_PHILIPS_4IN1] = { /* Philips NTSC */
- .name = "Philips 4 in 1 (ATI TV Wonder Pro/Conexant)",
- .count = 3,
- .ranges = {
- { 16 * 160.00 /*MHz*/, 0x01, },
- { 16 * 442.00 /*MHz*/, 0x02, },
- { 16 * 999.99 , 0x04, },
- },
- .config = 0x8e,
- },
- [TUNER_MICROTUNE_4049FM5] = { /* Microtune PAL */
- .name = "Microtune 4049 FM5",
- .count = 3,
- .ranges = {
- { 16 * 141.00 /*MHz*/, 0xa0, },
- { 16 * 464.00 /*MHz*/, 0x90, },
- { 16 * 999.99 , 0x30, },
- },
- .config = 0x8e,
- },
- [TUNER_PANASONIC_VP27] = { /* Panasonic NTSC */
- .name = "Panasonic VP27s/ENGE4324D",
- .count = 3,
- .ranges = {
- { 16 * 160.00 /*MHz*/, 0x01, },
- { 16 * 454.00 /*MHz*/, 0x02, },
- { 16 * 999.99 , 0x08, },
- },
- .config = 0xce,
- },
- [TUNER_LG_NTSC_TAPE] = { /* LGINNOTEK NTSC */
- .name = "LG NTSC (TAPE series)",
- .count = 3,
- .ranges = {
- { 16 * 160.00 /*MHz*/, 0x01, },
- { 16 * 442.00 /*MHz*/, 0x02, },
- { 16 * 999.99 , 0x04, },
- },
- .config = 0x8e,
- },
- [TUNER_TNF_8831BGFF] = { /* Philips PAL */
- .name = "Tenna TNF 8831 BGFF)",
- .count = 3,
- .ranges = {
- { 16 * 161.25 /*MHz*/, 0xa0, },
- { 16 * 463.25 /*MHz*/, 0x90, },
- { 16 * 999.99 , 0x30, },
- },
- .config = 0x8e,
- },
- [TUNER_MICROTUNE_4042FI5] = { /* Microtune NTSC */
- .name = "Microtune 4042 FI5 ATSC/NTSC dual in",
- .count = 3,
- .ranges = {
- { 16 * 162.00 /*MHz*/, 0xa2, },
- { 16 * 457.00 /*MHz*/, 0x94, },
- { 16 * 999.99 , 0x31, },
- },
- .config = 0x8e,
- },
-
- /* 50-59 */
- [TUNER_TCL_2002N] = { /* TCL NTSC */
- .name = "TCL 2002N",
- .count = 3,
- .ranges = {
- { 16 * 172.00 /*MHz*/, 0x01, },
- { 16 * 448.00 /*MHz*/, 0x02, },
- { 16 * 999.99 , 0x08, },
- },
- .config = 0x8e,
- },
- [TUNER_PHILIPS_FM1256_IH3] = { /* Philips PAL */
- .name = "Philips PAL/SECAM_D (FM 1256 I-H3)",
- .count = 3,
- .ranges = {
- { 16 * 160.00 /*MHz*/, 0x01, },
- { 16 * 442.00 /*MHz*/, 0x02, },
- { 16 * 999.99 , 0x04, },
- },
- .config = 0x8e,
- },
- [TUNER_THOMSON_DTT7610] = { /* THOMSON ATSC */
- .name = "Thomson DTT 7610 (ATSC/NTSC)",
- .count = 3,
- .ranges = {
- { 16 * 157.25 /*MHz*/, 0x39, },
- { 16 * 454.00 /*MHz*/, 0x3a, },
- { 16 * 999.99 , 0x3c, },
- },
- .config = 0x8e,
- },
- [TUNER_PHILIPS_FQ1286] = { /* Philips NTSC */
- .name = "Philips FQ1286",
- .count = 3,
- .ranges = {
- { 16 * 160.00 /*MHz*/, 0x41, },
- { 16 * 454.00 /*MHz*/, 0x42, },
- { 16 * 999.99 , 0x04, },
- },
- .config = 0x8e,
- },
- [TUNER_PHILIPS_TDA8290] = { /* Philips PAL|NTSC */
- .name = "tda8290+75",
- /* see tda8290.c for details */ },
- [TUNER_TCL_2002MB] = { /* TCL PAL */
- .name = "TCL 2002MB",
- .count = 3,
- .ranges = {
- { 16 * 170.00 /*MHz*/, 0x01, },
- { 16 * 450.00 /*MHz*/, 0x02, },
- { 16 * 999.99 , 0x08, },
- },
- .config = 0xce,
- },
- [TUNER_PHILIPS_FQ1216AME_MK4] = { /* Philips PAL */
- .name = "Philips PAL/SECAM multi (FQ1216AME MK4)",
- .count = 3,
- .ranges = {
- { 16 * 160.00 /*MHz*/, 0x01, },
- { 16 * 442.00 /*MHz*/, 0x02, },
- { 16 * 999.99 , 0x04, },
- },
- .config = 0xce,
- },
- [TUNER_PHILIPS_FQ1236A_MK4] = { /* Philips NTSC */
- .name = "Philips FQ1236A MK4",
- .count = 3,
- .ranges = {
- { 16 * 160.00 /*MHz*/, 0x01, },
- { 16 * 442.00 /*MHz*/, 0x02, },
- { 16 * 999.99 , 0x04, },
- },
- .config = 0x8e,
- },
- [TUNER_YMEC_TVF_8531MF] = { /* Philips NTSC */
- .name = "Ymec TVision TVF-8531MF/8831MF/8731MF",
- .count = 3,
- .ranges = {
- { 16 * 160.00 /*MHz*/, 0xa0, },
- { 16 * 454.00 /*MHz*/, 0x90, },
- { 16 * 999.99 , 0x30, },
- },
- .config = 0x8e,
- },
- [TUNER_YMEC_TVF_5533MF] = { /* Philips NTSC */
- .name = "Ymec TVision TVF-5533MF",
- .count = 3,
- .ranges = {
- { 16 * 160.00 /*MHz*/, 0x01, },
- { 16 * 454.00 /*MHz*/, 0x02, },
- { 16 * 999.99 , 0x04, },
- },
- .config = 0x8e,
- },
-
- /* 60-69 */
- [TUNER_THOMSON_DTT761X] = { /* THOMSON ATSC */
- /* DTT 7611 7611A 7612 7613 7613A 7614 7615 7615A */
- .name = "Thomson DTT 761X (ATSC/NTSC)",
- .count = 3,
- .ranges = {
- { 16 * 145.25 /*MHz*/, 0x39, },
- { 16 * 415.25 /*MHz*/, 0x3a, },
- { 16 * 999.99 , 0x3c, },
- },
- .config = 0x8e,
- },
- [TUNER_TENA_9533_DI] = { /* Philips PAL */
- .name = "Tena TNF9533-D/IF/TNF9533-B/DF",
- .count = 3,
- .ranges = {
- { 16 * 160.25 /*MHz*/, 0x01, },
- { 16 * 464.25 /*MHz*/, 0x02, },
- { 16 * 999.99 , 0x04, },
- },
- .config = 0x8e,
- },
- [TUNER_TEA5767] = { /* Philips RADIO */
- .name = "Philips TEA5767HN FM Radio",
- /* see tea5767.c for details */},
- [TUNER_PHILIPS_FMD1216ME_MK3] = { /* Philips PAL */
- .name = "Philips FMD1216ME MK3 Hybrid Tuner",
- .count = 3,
- .ranges = {
- { 16 * 160.00 /*MHz*/, 0x51, },
- { 16 * 442.00 /*MHz*/, 0x52, },
- { 16 * 999.99 , 0x54, },
- },
- .config = 0x86,
- },
- [TUNER_LG_TDVS_H062F] = { /* LGINNOTEK ATSC */
- .name = "LG TDVS-H062F/TUA6034",
- .count = 3,
- .ranges = {
- { 16 * 160.00 /*MHz*/, 0x01 },
- { 16 * 455.00 /*MHz*/, 0x02 },
- { 16 * 999.99 , 0x04 },
- },
- .config = 0x8e,
- },
- [TUNER_YMEC_TVF66T5_B_DFF] = { /* Philips PAL */
- .name = "Ymec TVF66T5-B/DFF",
- .count = 3,
- .ranges = {
- { 16 * 160.25 /*MHz*/, 0x01, },
- { 16 * 464.25 /*MHz*/, 0x02, },
- { 16 * 999.99 , 0x08, },
- },
- .config = 0x8e,
- },
- [TUNER_LG_NTSC_TALN_MINI] = { /* LGINNOTEK NTSC */
- .name = "LG NTSC (TALN mini series)",
- .count = 3,
- .ranges = {
- { 16 * 137.25 /*MHz*/, 0x01, },
- { 16 * 373.25 /*MHz*/, 0x02, },
- { 16 * 999.99 , 0x08, },
- },
- .config = 0x8e,
- },
- [TUNER_PHILIPS_TD1316] = { /* Philips PAL */
- .name = "Philips TD1316 Hybrid Tuner",
- .count = 3,
- .ranges = {
- { 16 * 160.00 /*MHz*/, 0xa1, },
- { 16 * 442.00 /*MHz*/, 0xa2, },
- { 16 * 999.99 , 0xa4, },
- },
- .config = 0xc8,
- },
- [TUNER_PHILIPS_TUV1236D] = { /* Philips ATSC */
- .name = "Philips TUV1236D ATSC/NTSC dual in",
- .count = 3,
- .ranges = {
- { 16 * 157.25 /*MHz*/, 0x01, },
- { 16 * 454.00 /*MHz*/, 0x02, },
- { 16 * 999.99 , 0x04, },
- },
- .config = 0xce,
- },
- [TUNER_TNF_5335MF] = { /* Philips NTSC */
- .name = "Tena TNF 5335 MF",
- .count = 3,
- .ranges = {
- { 16 * 157.25 /*MHz*/, 0x01, },
- { 16 * 454.00 /*MHz*/, 0x02, },
- { 16 * 999.99 , 0x04, },
- },
- .config = 0x8e,
- },
-};
-
-unsigned const int tuner_count = ARRAY_SIZE(tuners);
/* ---------------------------------------------------------------------- */
u8 config, tuneraddr;
u16 div;
struct tunertype *tun;
- unsigned char buffer[4];
- int rc, IFPCoff, i;
+ u8 buffer[4];
+ int rc, IFPCoff, i, j;
tun = &tuners[t->type];
- for (i = 0; i < tun->count; i++) {
- if (freq > tun->ranges[i].thresh)
+ j = TUNER_PARAM_ANALOG;
+
+ for (i = 0; i < tun->params[j].count; i++) {
+ if (freq > tun->params[j].ranges[i].limit)
continue;
break;
}
- config = tun->ranges[i].cb;
+ if (i == tun->params[j].count) {
+ tuner_dbg("TV frequency out of range (%d > %d)",
+ freq, tun->params[j].ranges[i - 1].limit);
+ freq = tun->params[j].ranges[--i].limit;
+ }
+ config = tun->params[j].ranges[i].cb;
/* i == 0 -> VHF_LO */
/* i == 1 -> VHF_HI */
/* i == 2 -> UHF */
case TUNER_MICROTUNE_4042FI5:
/* Set the charge pump for fast tuning */
- tun->config |= TUNER_CHARGE_PUMP;
+ tun->params[j].config |= TUNER_CHARGE_PUMP;
break;
case TUNER_PHILIPS_TUV1236D:
break;
}
- /*
- * Philips FI1216MK2 remark from specification :
- * for channel selection involving band switching, and to ensure
- * smooth tuning to the desired channel without causing
- * unnecessary charge pump action, it is recommended to consider
- * the difference between wanted channel frequency and the
- * current channel frequency. Unnecessary charge pump action
- * will result in very low tuning voltage which may drive the
- * oscillator to extreme conditions.
- *
- * Progfou: specification says to send config data before
- * frequency in case (wanted frequency < current frequency).
- */
-
/* IFPCoff = Video Intermediate Frequency - Vif:
940 =16*58.75 NTSC/J (Japan)
732 =16*45.75 M/N STD
offset / 16, offset % 16 * 100 / 16,
div);
- if (t->type == TUNER_PHILIPS_SECAM && freq < t->freq) {
- buffer[0] = tun->config;
+ if (tuners[t->type].params->cb_first_if_lower_freq && div < t->last_div) {
+ buffer[0] = tun->params[j].config;
buffer[1] = config;
buffer[2] = (div>>8) & 0x7f;
buffer[3] = div & 0xff;
} else {
buffer[0] = (div>>8) & 0x7f;
buffer[1] = div & 0xff;
- buffer[2] = tun->config;
+ buffer[2] = tun->params[j].config;
buffer[3] = config;
}
+ t->last_div = div;
tuner_dbg("tv 0x%02x 0x%02x 0x%02x 0x%02x\n",
buffer[0],buffer[1],buffer[2],buffer[3]);
}
/* Set the charge pump for optimized phase noise figure */
- tun->config &= ~TUNER_CHARGE_PUMP;
+ tun->params[j].config &= ~TUNER_CHARGE_PUMP;
buffer[0] = (div>>8) & 0x7f;
buffer[1] = div & 0xff;
- buffer[2] = tun->config;
+ buffer[2] = tun->params[j].config;
buffer[3] = config;
tuner_dbg("tv 0x%02x 0x%02x 0x%02x 0x%02x\n",
buffer[0],buffer[1],buffer[2],buffer[3]);
{
struct tunertype *tun;
struct tuner *t = i2c_get_clientdata(c);
- unsigned char buffer[4];
- unsigned div;
- int rc;
+ u8 buffer[4];
+ u16 div;
+ int rc, j;
tun = &tuners[t->type];
+ j = TUNER_PARAM_ANALOG;
+
div = (20 * freq / 16000) + (int)(20*10.7); /* IF 10.7 MHz */
- buffer[2] = (tun->config & ~TUNER_RATIO_MASK) | TUNER_RATIO_SELECT_50; /* 50 kHz step */
+ buffer[2] = (tun->params[j].config & ~TUNER_RATIO_MASK) | TUNER_RATIO_SELECT_50; /* 50 kHz step */
switch (t->type) {
case TUNER_TENA_9533_DI:
}
buffer[0] = (div>>8) & 0x7f;
buffer[1] = div & 0xff;
+ if (tuners[t->type].params->cb_first_if_lower_freq && div < t->last_div) {
+ buffer[0] = buffer[2];
+ buffer[1] = buffer[3];
+ buffer[2] = (div>>8) & 0x7f;
+ buffer[3] = div & 0xff;
+ } else {
+ buffer[0] = (div>>8) & 0x7f;
+ buffer[1] = div & 0xff;
+ }
tuner_dbg("radio 0x%02x 0x%02x 0x%02x 0x%02x\n",
buffer[0],buffer[1],buffer[2],buffer[3]);
+ t->last_div = div;
if (4 != (rc = i2c_master_send(c,buffer,4)))
tuner_warn("i2c i/o error: rc == %d (should be 4)\n",rc);
t->type, tuners[t->type].name);
strlcpy(c->name, tuners[t->type].name, sizeof(c->name));
- t->tv_freq = default_set_tv_freq;
- t->radio_freq = default_set_radio_freq;
+ t->set_tv_freq = default_set_tv_freq;
+ t->set_radio_freq = default_set_radio_freq;
t->has_signal = tuner_signal;
- t->is_stereo = tuner_stereo;
+ t->is_stereo = tuner_stereo;
t->standby = NULL;
return 0;
--- /dev/null
+/*
+ *
+ * i2c tv tuner chip device type database.
+ *
+ */
+
+#include <linux/i2c.h>
+#include <media/tuner.h>
+#include <media/tuner-types.h>
+
+/* ---------------------------------------------------------------------- */
+
+/*
+ * The floats in the tuner struct are computed at compile time
+ * by gcc and cast back to integers. Thus we don't violate the
+ * "no float in kernel" rule.
+ *
+ * A tuner_range may be referenced by multiple tuner_params structs.
+ * There are many duplicates in here. Reusing tuner_range structs,
+ * rather than defining new ones for each tuner, will cut down on
+ * memory usage, and is preferred when possible.
+ *
+ * Each tuner_params array may contain one or more elements, one
+ * for each video standard.
+ *
+ * FIXME: Some tuner_range definitions are duplicated, and
+ * should be eliminated.
+ *
+ * FIXME: tunertype struct contains an element, has_tda988x.
+ * We must set this for all tunertypes that contain a tda988x
+ * chip, and then we can remove this setting from the various
+ * card structs.
+ */
+
+/* 0-9 */
+/* ------------ TUNER_TEMIC_PAL - TEMIC PAL ------------ */
+
+static struct tuner_range tuner_temic_pal_ranges[] = {
+ { 16 * 140.25 /*MHz*/, 0x02, },
+ { 16 * 463.25 /*MHz*/, 0x04, },
+ { 16 * 999.99 , 0x01, },
+};
+
+static struct tuner_params tuner_temic_pal_params[] = {
+ {
+ .type = TUNER_PARAM_TYPE_PAL,
+ .ranges = tuner_temic_pal_ranges,
+ .count = ARRAY_SIZE(tuner_temic_pal_ranges),
+ .config = 0x8e,
+ },
+};
+
+/* ------------ TUNER_PHILIPS_PAL_I - Philips PAL_I ------------ */
+
+static struct tuner_range tuner_philips_pal_i_ranges[] = {
+ { 16 * 140.25 /*MHz*/, 0xa0, },
+ { 16 * 463.25 /*MHz*/, 0x90, },
+ { 16 * 999.99 , 0x30, },
+};
+
+static struct tuner_params tuner_philips_pal_i_params[] = {
+ {
+ .type = TUNER_PARAM_TYPE_PAL,
+ .ranges = tuner_philips_pal_i_ranges,
+ .count = ARRAY_SIZE(tuner_philips_pal_i_ranges),
+ .config = 0x8e,
+ },
+};
+
+/* ------------ TUNER_PHILIPS_NTSC - Philips NTSC ------------ */
+
+static struct tuner_range tuner_philips_ntsc_ranges[] = {
+ { 16 * 157.25 /*MHz*/, 0xa0, },
+ { 16 * 451.25 /*MHz*/, 0x90, },
+ { 16 * 999.99 , 0x30, },
+};
+
+static struct tuner_params tuner_philips_ntsc_params[] = {
+ {
+ .type = TUNER_PARAM_TYPE_NTSC,
+ .ranges = tuner_philips_ntsc_ranges,
+ .count = ARRAY_SIZE(tuner_philips_ntsc_ranges),
+ .config = 0x8e,
+ .cb_first_if_lower_freq = 1,
+ },
+};
+
+/* ------------ TUNER_PHILIPS_SECAM - Philips SECAM ------------ */
+
+static struct tuner_range tuner_philips_secam_ranges[] = {
+ { 16 * 168.25 /*MHz*/, 0xa7, },
+ { 16 * 447.25 /*MHz*/, 0x97, },
+ { 16 * 999.99 , 0x37, },
+};
+
+static struct tuner_params tuner_philips_secam_params[] = {
+ {
+ .type = TUNER_PARAM_TYPE_SECAM,
+ .ranges = tuner_philips_secam_ranges,
+ .count = ARRAY_SIZE(tuner_philips_secam_ranges),
+ .config = 0x8e,
+ .cb_first_if_lower_freq = 1,
+ },
+};
+
+/* ------------ TUNER_PHILIPS_PAL - Philips PAL ------------ */
+
+static struct tuner_range tuner_philips_pal_ranges[] = {
+ { 16 * 168.25 /*MHz*/, 0xa0, },
+ { 16 * 447.25 /*MHz*/, 0x90, },
+ { 16 * 999.99 , 0x30, },
+};
+
+static struct tuner_params tuner_philips_pal_params[] = {
+ {
+ .type = TUNER_PARAM_TYPE_PAL,
+ .ranges = tuner_philips_pal_ranges,
+ .count = ARRAY_SIZE(tuner_philips_pal_ranges),
+ .config = 0x8e,
+ .cb_first_if_lower_freq = 1,
+ },
+};
+
+/* ------------ TUNER_TEMIC_NTSC - TEMIC NTSC ------------ */
+
+static struct tuner_range tuner_temic_ntsc_ranges[] = {
+ { 16 * 157.25 /*MHz*/, 0x02, },
+ { 16 * 463.25 /*MHz*/, 0x04, },
+ { 16 * 999.99 , 0x01, },
+};
+
+static struct tuner_params tuner_temic_ntsc_params[] = {
+ {
+ .type = TUNER_PARAM_TYPE_NTSC,
+ .ranges = tuner_temic_ntsc_ranges,
+ .count = ARRAY_SIZE(tuner_temic_ntsc_ranges),
+ .config = 0x8e,
+ },
+};
+
+/* ------------ TUNER_TEMIC_PAL_I - TEMIC PAL_I ------------ */
+
+static struct tuner_range tuner_temic_pal_i_ranges[] = {
+ { 16 * 170.00 /*MHz*/, 0x02, },
+ { 16 * 450.00 /*MHz*/, 0x04, },
+ { 16 * 999.99 , 0x01, },
+};
+
+static struct tuner_params tuner_temic_pal_i_params[] = {
+ {
+ .type = TUNER_PARAM_TYPE_PAL,
+ .ranges = tuner_temic_pal_i_ranges,
+ .count = ARRAY_SIZE(tuner_temic_pal_i_ranges),
+ .config = 0x8e,
+ },
+};
+
+/* ------------ TUNER_TEMIC_4036FY5_NTSC - TEMIC NTSC ------------ */
+
+static struct tuner_range tuner_temic_4036fy5_ntsc_ranges[] = {
+ { 16 * 157.25 /*MHz*/, 0xa0, },
+ { 16 * 463.25 /*MHz*/, 0x90, },
+ { 16 * 999.99 , 0x30, },
+};
+
+static struct tuner_params tuner_temic_4036fy5_ntsc_params[] = {
+ {
+ .type = TUNER_PARAM_TYPE_NTSC,
+ .ranges = tuner_temic_4036fy5_ntsc_ranges,
+ .count = ARRAY_SIZE(tuner_temic_4036fy5_ntsc_ranges),
+ .config = 0x8e,
+ },
+};
+
+/* ------------ TUNER_ALPS_TSBH1_NTSC - TEMIC NTSC ------------ */
+
+static struct tuner_range tuner_alps_tsb_1_ranges[] = {
+ { 16 * 137.25 /*MHz*/, 0x01, },
+ { 16 * 385.25 /*MHz*/, 0x02, },
+ { 16 * 999.99 , 0x08, },
+};
+
+static struct tuner_params tuner_alps_tsbh1_ntsc_params[] = {
+ {
+ .type = TUNER_PARAM_TYPE_NTSC,
+ .ranges = tuner_alps_tsb_1_ranges,
+ .count = ARRAY_SIZE(tuner_alps_tsb_1_ranges),
+ .config = 0x8e,
+ },
+};
+
+/* 10-19 */
+/* ------------ TUNER_ALPS_TSBE1_PAL - TEMIC PAL ------------ */
+
+static struct tuner_params tuner_alps_tsb_1_params[] = {
+ {
+ .type = TUNER_PARAM_TYPE_PAL,
+ .ranges = tuner_alps_tsb_1_ranges,
+ .count = ARRAY_SIZE(tuner_alps_tsb_1_ranges),
+ .config = 0x8e,
+ },
+};
+
+/* ------------ TUNER_ALPS_TSBB5_PAL_I - Alps PAL_I ------------ */
+
+static struct tuner_range tuner_alps_tsb_5_pal_ranges[] = {
+ { 16 * 133.25 /*MHz*/, 0x01, },
+ { 16 * 351.25 /*MHz*/, 0x02, },
+ { 16 * 999.99 , 0x08, },
+};
+
+static struct tuner_params tuner_alps_tsbb5_params[] = {
+ {
+ .type = TUNER_PARAM_TYPE_PAL,
+ .ranges = tuner_alps_tsb_5_pal_ranges,
+ .count = ARRAY_SIZE(tuner_alps_tsb_5_pal_ranges),
+ .config = 0x8e,
+ },
+};
+
+/* ------------ TUNER_ALPS_TSBE5_PAL - Alps PAL ------------ */
+
+static struct tuner_params tuner_alps_tsbe5_params[] = {
+ {
+ .type = TUNER_PARAM_TYPE_PAL,
+ .ranges = tuner_alps_tsb_5_pal_ranges,
+ .count = ARRAY_SIZE(tuner_alps_tsb_5_pal_ranges),
+ .config = 0x8e,
+ },
+};
+
+/* ------------ TUNER_ALPS_TSBC5_PAL - Alps PAL ------------ */
+
+static struct tuner_params tuner_alps_tsbc5_params[] = {
+ {
+ .type = TUNER_PARAM_TYPE_PAL,
+ .ranges = tuner_alps_tsb_5_pal_ranges,
+ .count = ARRAY_SIZE(tuner_alps_tsb_5_pal_ranges),
+ .config = 0x8e,
+ },
+};
+
+/* ------------ TUNER_TEMIC_4006FH5_PAL - TEMIC PAL ------------ */
+
+static struct tuner_range tuner_temic_4006fh5_pal_ranges[] = {
+ { 16 * 170.00 /*MHz*/, 0xa0, },
+ { 16 * 450.00 /*MHz*/, 0x90, },
+ { 16 * 999.99 , 0x30, },
+};
+
+static struct tuner_params tuner_temic_4006fh5_params[] = {
+ {
+ .type = TUNER_PARAM_TYPE_PAL,
+ .ranges = tuner_temic_4006fh5_pal_ranges,
+ .count = ARRAY_SIZE(tuner_temic_4006fh5_pal_ranges),
+ .config = 0x8e,
+ },
+};
+
+/* ------------ TUNER_ALPS_TSHC6_NTSC - Alps NTSC ------------ */
+
+static struct tuner_range tuner_alps_tshc6_ntsc_ranges[] = {
+ { 16 * 137.25 /*MHz*/, 0x14, },
+ { 16 * 385.25 /*MHz*/, 0x12, },
+ { 16 * 999.99 , 0x11, },
+};
+
+static struct tuner_params tuner_alps_tshc6_params[] = {
+ {
+ .type = TUNER_PARAM_TYPE_NTSC,
+ .ranges = tuner_alps_tshc6_ntsc_ranges,
+ .count = ARRAY_SIZE(tuner_alps_tshc6_ntsc_ranges),
+ .config = 0x8e,
+ },
+};
+
+/* ------------ TUNER_TEMIC_PAL_DK - TEMIC PAL ------------ */
+
+static struct tuner_range tuner_temic_pal_dk_ranges[] = {
+ { 16 * 168.25 /*MHz*/, 0xa0, },
+ { 16 * 456.25 /*MHz*/, 0x90, },
+ { 16 * 999.99 , 0x30, },
+};
+
+static struct tuner_params tuner_temic_pal_dk_params[] = {
+ {
+ .type = TUNER_PARAM_TYPE_PAL,
+ .ranges = tuner_temic_pal_dk_ranges,
+ .count = ARRAY_SIZE(tuner_temic_pal_dk_ranges),
+ .config = 0x8e,
+ },
+};
+
+/* ------------ TUNER_PHILIPS_NTSC_M - Philips NTSC ------------ */
+
+static struct tuner_range tuner_philips_ntsc_m_ranges[] = {
+ { 16 * 160.00 /*MHz*/, 0xa0, },
+ { 16 * 454.00 /*MHz*/, 0x90, },
+ { 16 * 999.99 , 0x30, },
+};
+
+static struct tuner_params tuner_philips_ntsc_m_params[] = {
+ {
+ .type = TUNER_PARAM_TYPE_NTSC,
+ .ranges = tuner_philips_ntsc_m_ranges,
+ .count = ARRAY_SIZE(tuner_philips_ntsc_m_ranges),
+ .config = 0x8e,
+ },
+};
+
+/* ------------ TUNER_TEMIC_4066FY5_PAL_I - TEMIC PAL_I ------------ */
+
+static struct tuner_range tuner_temic_40x6f_5_pal_ranges[] = {
+ { 16 * 169.00 /*MHz*/, 0xa0, },
+ { 16 * 454.00 /*MHz*/, 0x90, },
+ { 16 * 999.99 , 0x30, },
+};
+
+static struct tuner_params tuner_temic_4066fy5_pal_i_params[] = {
+ {
+ .type = TUNER_PARAM_TYPE_PAL,
+ .ranges = tuner_temic_40x6f_5_pal_ranges,
+ .count = ARRAY_SIZE(tuner_temic_40x6f_5_pal_ranges),
+ .config = 0x8e,
+ },
+};
+
+/* ------------ TUNER_TEMIC_4006FN5_MULTI_PAL - TEMIC PAL ------------ */
+
+static struct tuner_params tuner_temic_4006fn5_multi_params[] = {
+ {
+ .type = TUNER_PARAM_TYPE_PAL,
+ .ranges = tuner_temic_40x6f_5_pal_ranges,
+ .count = ARRAY_SIZE(tuner_temic_40x6f_5_pal_ranges),
+ .config = 0x8e,
+ },
+};
+
+/* 20-29 */
+/* ------------ TUNER_TEMIC_4009FR5_PAL - TEMIC PAL ------------ */
+
+static struct tuner_range tuner_temic_4009f_5_pal_ranges[] = {
+ { 16 * 141.00 /*MHz*/, 0xa0, },
+ { 16 * 464.00 /*MHz*/, 0x90, },
+ { 16 * 999.99 , 0x30, },
+};
+
+static struct tuner_params tuner_temic_4009f_5_params[] = {
+ {
+ .type = TUNER_PARAM_TYPE_PAL,
+ .ranges = tuner_temic_4009f_5_pal_ranges,
+ .count = ARRAY_SIZE(tuner_temic_4009f_5_pal_ranges),
+ .config = 0x8e,
+ },
+};
+
+/* ------------ TUNER_TEMIC_4039FR5_NTSC - TEMIC NTSC ------------ */
+
+static struct tuner_range tuner_temic_4039fr5_ntsc_ranges[] = {
+ { 16 * 158.00 /*MHz*/, 0xa0, },
+ { 16 * 453.00 /*MHz*/, 0x90, },
+ { 16 * 999.99 , 0x30, },
+};
+
+static struct tuner_params tuner_temic_4039fr5_params[] = {
+ {
+ .type = TUNER_PARAM_TYPE_NTSC,
+ .ranges = tuner_temic_4039fr5_ntsc_ranges,
+ .count = ARRAY_SIZE(tuner_temic_4039fr5_ntsc_ranges),
+ .config = 0x8e,
+ },
+};
+
+/* ------------ TUNER_TEMIC_4046FM5 - TEMIC PAL ------------ */
+
+static struct tuner_range tuner_temic_4046fm5_pal_ranges[] = {
+ { 16 * 169.00 /*MHz*/, 0xa0, },
+ { 16 * 454.00 /*MHz*/, 0x90, },
+ { 16 * 999.99 , 0x30, },
+};
+
+static struct tuner_params tuner_temic_4046fm5_params[] = {
+ {
+ .type = TUNER_PARAM_TYPE_PAL,
+ .ranges = tuner_temic_4046fm5_pal_ranges,
+ .count = ARRAY_SIZE(tuner_temic_4046fm5_pal_ranges),
+ .config = 0x8e,
+ },
+};
+
+/* ------------ TUNER_PHILIPS_PAL_DK - Philips PAL ------------ */
+
+static struct tuner_range tuner_lg_pal_ranges[] = {
+ { 16 * 170.00 /*MHz*/, 0xa0, },
+ { 16 * 450.00 /*MHz*/, 0x90, },
+ { 16 * 999.99 , 0x30, },
+};
+
+static struct tuner_params tuner_philips_pal_dk_params[] = {
+ {
+ .type = TUNER_PARAM_TYPE_PAL,
+ .ranges = tuner_lg_pal_ranges,
+ .count = ARRAY_SIZE(tuner_lg_pal_ranges),
+ .config = 0x8e,
+ },
+};
+
+/* ------------ TUNER_PHILIPS_FQ1216ME - Philips PAL ------------ */
+
+static struct tuner_params tuner_philips_fq1216me_params[] = {
+ {
+ .type = TUNER_PARAM_TYPE_PAL,
+ .ranges = tuner_lg_pal_ranges,
+ .count = ARRAY_SIZE(tuner_lg_pal_ranges),
+ .config = 0x8e,
+ },
+};
+
+/* ------------ TUNER_LG_PAL_I_FM - LGINNOTEK PAL_I ------------ */
+
+static struct tuner_params tuner_lg_pal_i_fm_params[] = {
+ {
+ .type = TUNER_PARAM_TYPE_PAL,
+ .ranges = tuner_lg_pal_ranges,
+ .count = ARRAY_SIZE(tuner_lg_pal_ranges),
+ .config = 0x8e,
+ },
+};
+
+/* ------------ TUNER_LG_PAL_I - LGINNOTEK PAL_I ------------ */
+
+static struct tuner_params tuner_lg_pal_i_params[] = {
+ {
+ .type = TUNER_PARAM_TYPE_PAL,
+ .ranges = tuner_lg_pal_ranges,
+ .count = ARRAY_SIZE(tuner_lg_pal_ranges),
+ .config = 0x8e,
+ },
+};
+
+/* ------------ TUNER_LG_NTSC_FM - LGINNOTEK NTSC ------------ */
+
+static struct tuner_range tuner_lg_ntsc_fm_ranges[] = {
+ { 16 * 210.00 /*MHz*/, 0xa0, },
+ { 16 * 497.00 /*MHz*/, 0x90, },
+ { 16 * 999.99 , 0x30, },
+};
+
+static struct tuner_params tuner_lg_ntsc_fm_params[] = {
+ {
+ .type = TUNER_PARAM_TYPE_NTSC,
+ .ranges = tuner_lg_ntsc_fm_ranges,
+ .count = ARRAY_SIZE(tuner_lg_ntsc_fm_ranges),
+ .config = 0x8e,
+ },
+};
+
+/* ------------ TUNER_LG_PAL_FM - LGINNOTEK PAL ------------ */
+
+static struct tuner_params tuner_lg_pal_fm_params[] = {
+ {
+ .type = TUNER_PARAM_TYPE_PAL,
+ .ranges = tuner_lg_pal_ranges,
+ .count = ARRAY_SIZE(tuner_lg_pal_ranges),
+ .config = 0x8e,
+ },
+};
+
+/* ------------ TUNER_LG_PAL - LGINNOTEK PAL ------------ */
+
+static struct tuner_params tuner_lg_pal_params[] = {
+ {
+ .type = TUNER_PARAM_TYPE_PAL,
+ .ranges = tuner_lg_pal_ranges,
+ .count = ARRAY_SIZE(tuner_lg_pal_ranges),
+ .config = 0x8e,
+ },
+};
+
+/* 30-39 */
+/* ------------ TUNER_TEMIC_4009FN5_MULTI_PAL_FM - TEMIC PAL ------------ */
+
+static struct tuner_params tuner_temic_4009_fn5_multi_pal_fm_params[] = {
+ {
+ .type = TUNER_PARAM_TYPE_PAL,
+ .ranges = tuner_temic_4009f_5_pal_ranges,
+ .count = ARRAY_SIZE(tuner_temic_4009f_5_pal_ranges),
+ .config = 0x8e,
+ },
+};
+
+/* ------------ TUNER_SHARP_2U5JF5540_NTSC - SHARP NTSC ------------ */
+
+static struct tuner_range tuner_sharp_2u5jf5540_ntsc_ranges[] = {
+ { 16 * 137.25 /*MHz*/, 0x01, },
+ { 16 * 317.25 /*MHz*/, 0x02, },
+ { 16 * 999.99 , 0x08, },
+};
+
+static struct tuner_params tuner_sharp_2u5jf5540_params[] = {
+ {
+ .type = TUNER_PARAM_TYPE_NTSC,
+ .ranges = tuner_sharp_2u5jf5540_ntsc_ranges,
+ .count = ARRAY_SIZE(tuner_sharp_2u5jf5540_ntsc_ranges),
+ .config = 0x8e,
+ },
+};
+
+/* ------------ TUNER_Samsung_PAL_TCPM9091PD27 - Samsung PAL ------------ */
+
+static struct tuner_range tuner_samsung_pal_tcpm9091pd27_ranges[] = {
+ { 16 * 169 /*MHz*/, 0xa0, },
+ { 16 * 464 /*MHz*/, 0x90, },
+ { 16 * 999.99 , 0x30, },
+};
+
+static struct tuner_params tuner_samsung_pal_tcpm9091pd27_params[] = {
+ {
+ .type = TUNER_PARAM_TYPE_PAL,
+ .ranges = tuner_samsung_pal_tcpm9091pd27_ranges,
+ .count = ARRAY_SIZE(tuner_samsung_pal_tcpm9091pd27_ranges),
+ .config = 0x8e,
+ },
+};
+
+/* ------------ TUNER_TEMIC_4106FH5 - TEMIC PAL ------------ */
+
+static struct tuner_params tuner_temic_4106fh5_params[] = {
+ {
+ .type = TUNER_PARAM_TYPE_PAL,
+ .ranges = tuner_temic_4009f_5_pal_ranges,
+ .count = ARRAY_SIZE(tuner_temic_4009f_5_pal_ranges),
+ .config = 0x8e,
+ },
+};
+
+/* ------------ TUNER_TEMIC_4012FY5 - TEMIC PAL ------------ */
+
+static struct tuner_range tuner_temic_4012fy5_pal_ranges[] = {
+ { 16 * 140.25 /*MHz*/, 0x02, },
+ { 16 * 463.25 /*MHz*/, 0x04, },
+ { 16 * 999.99 , 0x01, },
+};
+
+static struct tuner_params tuner_temic_4012fy5_params[] = {
+ {
+ .type = TUNER_PARAM_TYPE_PAL,
+ .ranges = tuner_temic_4012fy5_pal_ranges,
+ .count = ARRAY_SIZE(tuner_temic_4012fy5_pal_ranges),
+ .config = 0x8e,
+ },
+};
+
+/* ------------ TUNER_TEMIC_4136FY5 - TEMIC NTSC ------------ */
+
+static struct tuner_range tuner_temic_4136_fy5_ntsc_ranges[] = {
+ { 16 * 158.00 /*MHz*/, 0xa0, },
+ { 16 * 453.00 /*MHz*/, 0x90, },
+ { 16 * 999.99 , 0x30, },
+};
+
+static struct tuner_params tuner_temic_4136_fy5_params[] = {
+ {
+ .type = TUNER_PARAM_TYPE_NTSC,
+ .ranges = tuner_temic_4136_fy5_ntsc_ranges,
+ .count = ARRAY_SIZE(tuner_temic_4136_fy5_ntsc_ranges),
+ .config = 0x8e,
+ },
+};
+
+/* ------------ TUNER_LG_PAL_NEW_TAPC - LGINNOTEK PAL ------------ */
+
+static struct tuner_range tuner_lg_new_tapc_ranges[] = {
+ { 16 * 170.00 /*MHz*/, 0x01, },
+ { 16 * 450.00 /*MHz*/, 0x02, },
+ { 16 * 999.99 , 0x08, },
+};
+
+static struct tuner_params tuner_lg_pal_new_tapc_params[] = {
+ {
+ .type = TUNER_PARAM_TYPE_PAL,
+ .ranges = tuner_lg_new_tapc_ranges,
+ .count = ARRAY_SIZE(tuner_lg_new_tapc_ranges),
+ .config = 0x8e,
+ },
+};
+
+/* ------------ TUNER_PHILIPS_FM1216ME_MK3 - Philips PAL ------------ */
+
+static struct tuner_range tuner_fm1216me_mk3_pal_ranges[] = {
+ { 16 * 158.00 /*MHz*/, 0x01, },
+ { 16 * 442.00 /*MHz*/, 0x02, },
+ { 16 * 999.99 , 0x04, },
+};
+
+static struct tuner_params tuner_fm1216me_mk3_params[] = {
+ {
+ .type = TUNER_PARAM_TYPE_PAL,
+ .ranges = tuner_fm1216me_mk3_pal_ranges,
+ .count = ARRAY_SIZE(tuner_fm1216me_mk3_pal_ranges),
+ .config = 0x8e,
+ .cb_first_if_lower_freq = 1,
+ },
+};
+
+/* ------------ TUNER_LG_NTSC_NEW_TAPC - LGINNOTEK NTSC ------------ */
+
+static struct tuner_params tuner_lg_ntsc_new_tapc_params[] = {
+ {
+ .type = TUNER_PARAM_TYPE_NTSC,
+ .ranges = tuner_lg_new_tapc_ranges,
+ .count = ARRAY_SIZE(tuner_lg_new_tapc_ranges),
+ .config = 0x8e,
+ },
+};
+
+/* 40-49 */
+/* ------------ TUNER_HITACHI_NTSC - HITACHI NTSC ------------ */
+
+static struct tuner_params tuner_hitachi_ntsc_params[] = {
+ {
+ .type = TUNER_PARAM_TYPE_NTSC,
+ .ranges = tuner_lg_new_tapc_ranges,
+ .count = ARRAY_SIZE(tuner_lg_new_tapc_ranges),
+ .config = 0x8e,
+ },
+};
+
+/* ------------ TUNER_PHILIPS_PAL_MK - Philips PAL ------------ */
+
+static struct tuner_range tuner_philips_pal_mk_pal_ranges[] = {
+ { 16 * 140.25 /*MHz*/, 0x01, },
+ { 16 * 463.25 /*MHz*/, 0xc2, },
+ { 16 * 999.99 , 0xcf, },
+};
+
+static struct tuner_params tuner_philips_pal_mk_params[] = {
+ {
+ .type = TUNER_PARAM_TYPE_PAL,
+ .ranges = tuner_philips_pal_mk_pal_ranges,
+ .count = ARRAY_SIZE(tuner_philips_pal_mk_pal_ranges),
+ .config = 0x8e,
+ },
+};
+
+/* ------------ TUNER_PHILIPS_ATSC - Philips ATSC ------------ */
+
+static struct tuner_range tuner_philips_atsc_ranges[] = {
+ { 16 * 157.25 /*MHz*/, 0xa0, },
+ { 16 * 454.00 /*MHz*/, 0x90, },
+ { 16 * 999.99 , 0x30, },
+};
+
+static struct tuner_params tuner_philips_atsc_params[] = {
+ {
+ .type = TUNER_PARAM_TYPE_NTSC,
+ .ranges = tuner_philips_atsc_ranges,
+ .count = ARRAY_SIZE(tuner_philips_atsc_ranges),
+ .config = 0x8e,
+ },
+};
+
+/* ------------ TUNER_PHILIPS_FM1236_MK3 - Philips NTSC ------------ */
+
+static struct tuner_range tuner_fm1236_mk3_ntsc_ranges[] = {
+ { 16 * 160.00 /*MHz*/, 0x01, },
+ { 16 * 442.00 /*MHz*/, 0x02, },
+ { 16 * 999.99 , 0x04, },
+};
+
+static struct tuner_params tuner_fm1236_mk3_params[] = {
+ {
+ .type = TUNER_PARAM_TYPE_NTSC,
+ .ranges = tuner_fm1236_mk3_ntsc_ranges,
+ .count = ARRAY_SIZE(tuner_fm1236_mk3_ntsc_ranges),
+ .config = 0x8e,
+ .cb_first_if_lower_freq = 1,
+ },
+};
+
+/* ------------ TUNER_PHILIPS_4IN1 - Philips NTSC ------------ */
+
+static struct tuner_range tuner_philips_4in1_ntsc_ranges[] = {
+ { 16 * 160.00 /*MHz*/, 0x01, },
+ { 16 * 442.00 /*MHz*/, 0x02, },
+ { 16 * 999.99 , 0x04, },
+};
+
+static struct tuner_params tuner_philips_4in1_params[] = {
+ {
+ .type = TUNER_PARAM_TYPE_NTSC,
+ .ranges = tuner_philips_4in1_ntsc_ranges,
+ .count = ARRAY_SIZE(tuner_philips_4in1_ntsc_ranges),
+ .config = 0x8e,
+ },
+};
+
+/* ------------ TUNER_MICROTUNE_4049FM5 - Microtune PAL ------------ */
+
+static struct tuner_params tuner_microtune_4049_fm5_params[] = {
+ {
+ .type = TUNER_PARAM_TYPE_PAL,
+ .ranges = tuner_temic_4009f_5_pal_ranges,
+ .count = ARRAY_SIZE(tuner_temic_4009f_5_pal_ranges),
+ .config = 0x8e,
+ },
+};
+
+/* ------------ TUNER_PANASONIC_VP27 - Panasonic NTSC ------------ */
+
+static struct tuner_range tuner_panasonic_vp27_ntsc_ranges[] = {
+ { 16 * 160.00 /*MHz*/, 0x01, },
+ { 16 * 454.00 /*MHz*/, 0x02, },
+ { 16 * 999.99 , 0x08, },
+};
+
+static struct tuner_params tuner_panasonic_vp27_params[] = {
+ {
+ .type = TUNER_PARAM_TYPE_NTSC,
+ .ranges = tuner_panasonic_vp27_ntsc_ranges,
+ .count = ARRAY_SIZE(tuner_panasonic_vp27_ntsc_ranges),
+ .config = 0xce,
+ },
+};
+
+/* ------------ TUNER_LG_NTSC_TAPE - LGINNOTEK NTSC ------------ */
+
+static struct tuner_range tuner_lg_ntsc_tape_ranges[] = {
+ { 16 * 160.00 /*MHz*/, 0x01, },
+ { 16 * 442.00 /*MHz*/, 0x02, },
+ { 16 * 999.99 , 0x04, },
+};
+
+static struct tuner_params tuner_lg_ntsc_tape_params[] = {
+ {
+ .type = TUNER_PARAM_TYPE_NTSC,
+ .ranges = tuner_lg_ntsc_tape_ranges,
+ .count = ARRAY_SIZE(tuner_lg_ntsc_tape_ranges),
+ .config = 0x8e,
+ },
+};
+
+/* ------------ TUNER_TNF_8831BGFF - Philips PAL ------------ */
+
+static struct tuner_range tuner_tnf_8831bgff_pal_ranges[] = {
+ { 16 * 161.25 /*MHz*/, 0xa0, },
+ { 16 * 463.25 /*MHz*/, 0x90, },
+ { 16 * 999.99 , 0x30, },
+};
+
+static struct tuner_params tuner_tnf_8831bgff_params[] = {
+ {
+ .type = TUNER_PARAM_TYPE_PAL,
+ .ranges = tuner_tnf_8831bgff_pal_ranges,
+ .count = ARRAY_SIZE(tuner_tnf_8831bgff_pal_ranges),
+ .config = 0x8e,
+ },
+};
+
+/* ------------ TUNER_MICROTUNE_4042FI5 - Microtune NTSC ------------ */
+
+static struct tuner_range tuner_microtune_4042fi5_ntsc_ranges[] = {
+ { 16 * 162.00 /*MHz*/, 0xa2, },
+ { 16 * 457.00 /*MHz*/, 0x94, },
+ { 16 * 999.99 , 0x31, },
+};
+
+static struct tuner_params tuner_microtune_4042fi5_params[] = {
+ {
+ .type = TUNER_PARAM_TYPE_NTSC,
+ .ranges = tuner_microtune_4042fi5_ntsc_ranges,
+ .count = ARRAY_SIZE(tuner_microtune_4042fi5_ntsc_ranges),
+ .config = 0x8e,
+ },
+};
+
+/* 50-59 */
+/* ------------ TUNER_TCL_2002N - TCL NTSC ------------ */
+
+static struct tuner_range tuner_tcl_2002n_ntsc_ranges[] = {
+ { 16 * 172.00 /*MHz*/, 0x01, },
+ { 16 * 448.00 /*MHz*/, 0x02, },
+ { 16 * 999.99 , 0x08, },
+};
+
+static struct tuner_params tuner_tcl_2002n_params[] = {
+ {
+ .type = TUNER_PARAM_TYPE_NTSC,
+ .ranges = tuner_tcl_2002n_ntsc_ranges,
+ .count = ARRAY_SIZE(tuner_tcl_2002n_ntsc_ranges),
+ .config = 0x8e,
+ .cb_first_if_lower_freq = 1,
+ },
+};
+
+/* ------------ TUNER_PHILIPS_FM1256_IH3 - Philips PAL ------------ */
+
+static struct tuner_range tuner_philips_fm1256_ih3_pal_ranges[] = {
+ { 16 * 160.00 /*MHz*/, 0x01, },
+ { 16 * 442.00 /*MHz*/, 0x02, },
+ { 16 * 999.99 , 0x04, },
+};
+
+static struct tuner_params tuner_philips_fm1256_ih3_params[] = {
+ {
+ .type = TUNER_PARAM_TYPE_PAL,
+ .ranges = tuner_philips_fm1256_ih3_pal_ranges,
+ .count = ARRAY_SIZE(tuner_philips_fm1256_ih3_pal_ranges),
+ .config = 0x8e,
+ },
+};
+
+/* ------------ TUNER_THOMSON_DTT7610 - THOMSON ATSC ------------ */
+
+static struct tuner_range tuner_thomson_dtt7610_ntsc_ranges[] = {
+ { 16 * 157.25 /*MHz*/, 0x39, },
+ { 16 * 454.00 /*MHz*/, 0x3a, },
+ { 16 * 999.99 , 0x3c, },
+};
+
+static struct tuner_params tuner_thomson_dtt7610_params[] = {
+ {
+ .type = TUNER_PARAM_TYPE_NTSC,
+ .ranges = tuner_thomson_dtt7610_ntsc_ranges,
+ .count = ARRAY_SIZE(tuner_thomson_dtt7610_ntsc_ranges),
+ .config = 0x8e,
+ },
+};
+
+/* ------------ TUNER_PHILIPS_FQ1286 - Philips NTSC ------------ */
+
+static struct tuner_range tuner_philips_fq1286_ntsc_ranges[] = {
+ { 16 * 160.00 /*MHz*/, 0x41, },
+ { 16 * 454.00 /*MHz*/, 0x42, },
+ { 16 * 999.99 , 0x04, },
+};
+
+static struct tuner_params tuner_philips_fq1286_params[] = {
+ {
+ .type = TUNER_PARAM_TYPE_NTSC,
+ .ranges = tuner_philips_fq1286_ntsc_ranges,
+ .count = ARRAY_SIZE(tuner_philips_fq1286_ntsc_ranges),
+ .config = 0x8e,
+ },
+};
+
+/* ------------ TUNER_TCL_2002MB - TCL PAL ------------ */
+
+static struct tuner_range tuner_tcl_2002mb_pal_ranges[] = {
+ { 16 * 170.00 /*MHz*/, 0x01, },
+ { 16 * 450.00 /*MHz*/, 0x02, },
+ { 16 * 999.99 , 0x08, },
+};
+
+static struct tuner_params tuner_tcl_2002mb_params[] = {
+ {
+ .type = TUNER_PARAM_TYPE_PAL,
+ .ranges = tuner_tcl_2002mb_pal_ranges,
+ .count = ARRAY_SIZE(tuner_tcl_2002mb_pal_ranges),
+ .config = 0xce,
+ },
+};
+
+/* ------------ TUNER_PHILIPS_FQ1216AME_MK4 - Philips PAL ------------ */
+
+static struct tuner_range tuner_philips_fq12_6a___mk4_ranges[] = {
+ { 16 * 160.00 /*MHz*/, 0x01, },
+ { 16 * 442.00 /*MHz*/, 0x02, },
+ { 16 * 999.99 , 0x04, },
+};
+
+static struct tuner_params tuner_philips_fq1216ame_mk4_params[] = {
+ {
+ .type = TUNER_PARAM_TYPE_PAL,
+ .ranges = tuner_philips_fq12_6a___mk4_ranges,
+ .count = ARRAY_SIZE(tuner_philips_fq12_6a___mk4_ranges),
+ .config = 0xce,
+ },
+};
+
+/* ------------ TUNER_PHILIPS_FQ1236A_MK4 - Philips NTSC ------------ */
+
+static struct tuner_params tuner_philips_fq1236a_mk4_params[] = {
+ {
+ .type = TUNER_PARAM_TYPE_NTSC,
+ .ranges = tuner_philips_fq12_6a___mk4_ranges,
+ .count = ARRAY_SIZE(tuner_philips_fq12_6a___mk4_ranges),
+ .config = 0x8e,
+ },
+};
+
+/* ------------ TUNER_YMEC_TVF_8531MF - Philips NTSC ------------ */
+
+static struct tuner_range tuner_ymec_tvf_8531mf_ntsc_ranges[] = {
+ { 16 * 160.00 /*MHz*/, 0xa0, },
+ { 16 * 454.00 /*MHz*/, 0x90, },
+ { 16 * 999.99 , 0x30, },
+};
+
+static struct tuner_params tuner_ymec_tvf_8531mf_params[] = {
+ {
+ .type = TUNER_PARAM_TYPE_NTSC,
+ .ranges = tuner_ymec_tvf_8531mf_ntsc_ranges,
+ .count = ARRAY_SIZE(tuner_ymec_tvf_8531mf_ntsc_ranges),
+ .config = 0x8e,
+ },
+};
+
+/* ------------ TUNER_YMEC_TVF_5533MF - Philips NTSC ------------ */
+
+static struct tuner_range tuner_ymec_tvf_5533mf_ntsc_ranges[] = {
+ { 16 * 160.00 /*MHz*/, 0x01, },
+ { 16 * 454.00 /*MHz*/, 0x02, },
+ { 16 * 999.99 , 0x04, },
+};
+
+static struct tuner_params tuner_ymec_tvf_5533mf_params[] = {
+ {
+ .type = TUNER_PARAM_TYPE_NTSC,
+ .ranges = tuner_ymec_tvf_5533mf_ntsc_ranges,
+ .count = ARRAY_SIZE(tuner_ymec_tvf_5533mf_ntsc_ranges),
+ .config = 0x8e,
+ },
+};
+
+/* 60-69 */
+/* ------------ TUNER_THOMSON_DTT761X - THOMSON ATSC ------------ */
+/* DTT 7611 7611A 7612 7613 7613A 7614 7615 7615A */
+
+static struct tuner_range tuner_thomson_dtt761x_ntsc_ranges[] = {
+ { 16 * 145.25 /*MHz*/, 0x39, },
+ { 16 * 415.25 /*MHz*/, 0x3a, },
+ { 16 * 999.99 , 0x3c, },
+};
+
+
+static struct tuner_params tuner_thomson_dtt761x_params[] = {
+ {
+ .type = TUNER_PARAM_TYPE_NTSC,
+ .ranges = tuner_thomson_dtt761x_ntsc_ranges,
+ .count = ARRAY_SIZE(tuner_thomson_dtt761x_ntsc_ranges),
+ .config = 0x8e,
+ },
+};
+
+/* ------------ TUNER_TENA_9533_DI - Philips PAL ------------ */
+
+static struct tuner_range tuner_tuner_tena_9533_di_pal_ranges[] = {
+ { 16 * 160.25 /*MHz*/, 0x01, },
+ { 16 * 464.25 /*MHz*/, 0x02, },
+ { 16 * 999.99 , 0x04, },
+};
+
+static struct tuner_params tuner_tena_9533_di_params[] = {
+ {
+ .type = TUNER_PARAM_TYPE_PAL,
+ .ranges = tuner_tuner_tena_9533_di_pal_ranges,
+ .count = ARRAY_SIZE(tuner_tuner_tena_9533_di_pal_ranges),
+ .config = 0x8e,
+ },
+};
+
+/* ------------ TUNER_PHILIPS_FMD1216ME_MK3 - Philips PAL ------------ */
+
+static struct tuner_range tuner_philips_fmd1216me_mk3_pal_ranges[] = {
+ { 16 * 160.00 /*MHz*/, 0x51, },
+ { 16 * 442.00 /*MHz*/, 0x52, },
+ { 16 * 999.99 , 0x54, },
+};
+
+
+static struct tuner_params tuner_tuner_philips_fmd1216me_mk3_params[] = {
+ {
+ .type = TUNER_PARAM_TYPE_PAL,
+ .ranges = tuner_philips_fmd1216me_mk3_pal_ranges,
+ .count = ARRAY_SIZE(tuner_philips_fmd1216me_mk3_pal_ranges),
+ .config = 0x86,
+ },
+};
+
+
+/* ------------ TUNER_LG_TDVS_H062F - INFINEON ATSC ------------ */
+
+static struct tuner_range tuner_tua6034_ntsc_ranges[] = {
+ { 16 * 160.00 /*MHz*/, 0x01 },
+ { 16 * 455.00 /*MHz*/, 0x02 },
+ { 16 * 999.99 , 0x04 },
+};
+
+
+static struct tuner_params tuner_tua6034_params[] = {
+ {
+ .type = TUNER_PARAM_TYPE_NTSC,
+ .ranges = tuner_tua6034_ntsc_ranges,
+ .count = ARRAY_SIZE(tuner_tua6034_ntsc_ranges),
+ .config = 0x8e,
+ },
+};
+
+/* ------------ TUNER_YMEC_TVF66T5_B_DFF - Philips PAL ------------ */
+
+static struct tuner_range tuner_ymec_tvf66t5_b_dff_pal_ranges[] = {
+ { 16 * 160.25 /*MHz*/, 0x01, },
+ { 16 * 464.25 /*MHz*/, 0x02, },
+ { 16 * 999.99 , 0x08, },
+};
+
+static struct tuner_params tuner_ymec_tvf66t5_b_dff_params[] = {
+ {
+ .type = TUNER_PARAM_TYPE_PAL,
+ .ranges = tuner_ymec_tvf66t5_b_dff_pal_ranges,
+ .count = ARRAY_SIZE(tuner_ymec_tvf66t5_b_dff_pal_ranges),
+ .config = 0x8e,
+ },
+};
+
+/* ------------ TUNER_LG_NTSC_TALN_MINI - LGINNOTEK NTSC ------------ */
+
+static struct tuner_range tuner_lg_taln_mini_ntsc_ranges[] = {
+ { 16 * 137.25 /*MHz*/, 0x01, },
+ { 16 * 373.25 /*MHz*/, 0x02, },
+ { 16 * 999.99 , 0x08, },
+};
+
+static struct tuner_params tuner_lg_taln_mini_params[] = {
+ {
+ .type = TUNER_PARAM_TYPE_NTSC,
+ .ranges = tuner_lg_taln_mini_ntsc_ranges,
+ .count = ARRAY_SIZE(tuner_lg_taln_mini_ntsc_ranges),
+ .config = 0x8e,
+ },
+};
+
+/* ------------ TUNER_PHILIPS_TD1316 - Philips PAL ------------ */
+
+static struct tuner_range tuner_philips_td1316_pal_ranges[] = {
+ { 16 * 160.00 /*MHz*/, 0xa1, },
+ { 16 * 442.00 /*MHz*/, 0xa2, },
+ { 16 * 999.99 , 0xa4, },
+};
+
+static struct tuner_params tuner_philips_td1316_params[] = {
+ {
+ .type = TUNER_PARAM_TYPE_PAL,
+ .ranges = tuner_philips_td1316_pal_ranges,
+ .count = ARRAY_SIZE(tuner_philips_td1316_pal_ranges),
+ .config = 0xc8,
+ },
+};
+
+/* ------------ TUNER_PHILIPS_TUV1236D - Philips ATSC ------------ */
+
+static struct tuner_range tuner_tuv1236d_ntsc_ranges[] = {
+ { 16 * 157.25 /*MHz*/, 0x01, },
+ { 16 * 454.00 /*MHz*/, 0x02, },
+ { 16 * 999.99 , 0x04, },
+};
+
+
+static struct tuner_params tuner_tuner_tuv1236d_params[] = {
+ {
+ .type = TUNER_PARAM_TYPE_NTSC,
+ .ranges = tuner_tuv1236d_ntsc_ranges,
+ .count = ARRAY_SIZE(tuner_tuv1236d_ntsc_ranges),
+ .config = 0xce,
+ },
+};
+
+/* ------------ TUNER_TNF_5335MF - Philips NTSC ------------ */
+
+static struct tuner_range tuner_tnf_5335mf_ntsc_ranges[] = {
+ { 16 * 157.25 /*MHz*/, 0x01, },
+ { 16 * 454.00 /*MHz*/, 0x02, },
+ { 16 * 999.99 , 0x04, },
+};
+
+static struct tuner_params tuner_tnf_5335mf_params[] = {
+ {
+ .type = TUNER_PARAM_TYPE_NTSC,
+ .ranges = tuner_tnf_5335mf_ntsc_ranges,
+ .count = ARRAY_SIZE(tuner_tnf_5335mf_ntsc_ranges),
+ .config = 0x8e,
+ },
+};
+
+/* 70-79 */
+/* ------------ TUNER_SAMSUNG_TCPN_2121P30A - Samsung NTSC ------------ */
+
+static struct tuner_range tuner_samsung_tcpn_2121p30a_ntsc_ranges[] = {
+ { 16 * 175.75 /*MHz*/, 0x01, },
+ { 16 * 410.25 /*MHz*/, 0x02, },
+ { 16 * 999.99 , 0x08, },
+};
+
+static struct tuner_params tuner_samsung_tcpn_2121p30a_params[] = {
+ {
+ .type = TUNER_PARAM_TYPE_NTSC,
+ .ranges = tuner_samsung_tcpn_2121p30a_ntsc_ranges,
+ .count = ARRAY_SIZE(tuner_samsung_tcpn_2121p30a_ntsc_ranges),
+ .config = 0xce,
+ },
+};
+
+/* --------------------------------------------------------------------- */
+
+struct tunertype tuners[] = {
+ /* 0-9 */
+ [TUNER_TEMIC_PAL] = { /* TEMIC PAL */
+ .name = "Temic PAL (4002 FH5)",
+ .params = tuner_temic_pal_params,
+ },
+ [TUNER_PHILIPS_PAL_I] = { /* Philips PAL_I */
+ .name = "Philips PAL_I (FI1246 and compatibles)",
+ .params = tuner_philips_pal_i_params,
+ },
+ [TUNER_PHILIPS_NTSC] = { /* Philips NTSC */
+ .name = "Philips NTSC (FI1236,FM1236 and compatibles)",
+ .params = tuner_philips_ntsc_params,
+ },
+ [TUNER_PHILIPS_SECAM] = { /* Philips SECAM */
+ .name = "Philips (SECAM+PAL_BG) (FI1216MF, FM1216MF, FR1216MF)",
+ .params = tuner_philips_secam_params,
+ },
+ [TUNER_ABSENT] = { /* Tuner Absent */
+ .name = "NoTuner",
+ },
+ [TUNER_PHILIPS_PAL] = { /* Philips PAL */
+ .name = "Philips PAL_BG (FI1216 and compatibles)",
+ .params = tuner_philips_pal_params,
+ },
+ [TUNER_TEMIC_NTSC] = { /* TEMIC NTSC */
+ .name = "Temic NTSC (4032 FY5)",
+ .params = tuner_temic_ntsc_params,
+ },
+ [TUNER_TEMIC_PAL_I] = { /* TEMIC PAL_I */
+ .name = "Temic PAL_I (4062 FY5)",
+ .params = tuner_temic_pal_i_params,
+ },
+ [TUNER_TEMIC_4036FY5_NTSC] = { /* TEMIC NTSC */
+ .name = "Temic NTSC (4036 FY5)",
+ .params = tuner_temic_4036fy5_ntsc_params,
+ },
+ [TUNER_ALPS_TSBH1_NTSC] = { /* TEMIC NTSC */
+ .name = "Alps HSBH1",
+ .params = tuner_alps_tsbh1_ntsc_params,
+ },
+
+ /* 10-19 */
+ [TUNER_ALPS_TSBE1_PAL] = { /* TEMIC PAL */
+ .name = "Alps TSBE1",
+ .params = tuner_alps_tsb_1_params,
+ },
+ [TUNER_ALPS_TSBB5_PAL_I] = { /* Alps PAL_I */
+ .name = "Alps TSBB5",
+ .params = tuner_alps_tsbb5_params,
+ },
+ [TUNER_ALPS_TSBE5_PAL] = { /* Alps PAL */
+ .name = "Alps TSBE5",
+ .params = tuner_alps_tsbe5_params,
+ },
+ [TUNER_ALPS_TSBC5_PAL] = { /* Alps PAL */
+ .name = "Alps TSBC5",
+ .params = tuner_alps_tsbc5_params,
+ },
+ [TUNER_TEMIC_4006FH5_PAL] = { /* TEMIC PAL */
+ .name = "Temic PAL_BG (4006FH5)",
+ .params = tuner_temic_4006fh5_params,
+ },
+ [TUNER_ALPS_TSHC6_NTSC] = { /* Alps NTSC */
+ .name = "Alps TSCH6",
+ .params = tuner_alps_tshc6_params,
+ },
+ [TUNER_TEMIC_PAL_DK] = { /* TEMIC PAL */
+ .name = "Temic PAL_DK (4016 FY5)",
+ .params = tuner_temic_pal_dk_params,
+ },
+ [TUNER_PHILIPS_NTSC_M] = { /* Philips NTSC */
+ .name = "Philips NTSC_M (MK2)",
+ .params = tuner_philips_ntsc_m_params,
+ },
+ [TUNER_TEMIC_4066FY5_PAL_I] = { /* TEMIC PAL_I */
+ .name = "Temic PAL_I (4066 FY5)",
+ .params = tuner_temic_4066fy5_pal_i_params,
+ },
+ [TUNER_TEMIC_4006FN5_MULTI_PAL] = { /* TEMIC PAL */
+ .name = "Temic PAL* auto (4006 FN5)",
+ .params = tuner_temic_4006fn5_multi_params,
+ },
+
+ /* 20-29 */
+ [TUNER_TEMIC_4009FR5_PAL] = { /* TEMIC PAL */
+ .name = "Temic PAL_BG (4009 FR5) or PAL_I (4069 FR5)",
+ .params = tuner_temic_4009f_5_params,
+ },
+ [TUNER_TEMIC_4039FR5_NTSC] = { /* TEMIC NTSC */
+ .name = "Temic NTSC (4039 FR5)",
+ .params = tuner_temic_4039fr5_params,
+ },
+ [TUNER_TEMIC_4046FM5] = { /* TEMIC PAL */
+ .name = "Temic PAL/SECAM multi (4046 FM5)",
+ .params = tuner_temic_4046fm5_params,
+ },
+ [TUNER_PHILIPS_PAL_DK] = { /* Philips PAL */
+ .name = "Philips PAL_DK (FI1256 and compatibles)",
+ .params = tuner_philips_pal_dk_params,
+ },
+ [TUNER_PHILIPS_FQ1216ME] = { /* Philips PAL */
+ .name = "Philips PAL/SECAM multi (FQ1216ME)",
+ .params = tuner_philips_fq1216me_params,
+ },
+ [TUNER_LG_PAL_I_FM] = { /* LGINNOTEK PAL_I */
+ .name = "LG PAL_I+FM (TAPC-I001D)",
+ .params = tuner_lg_pal_i_fm_params,
+ },
+ [TUNER_LG_PAL_I] = { /* LGINNOTEK PAL_I */
+ .name = "LG PAL_I (TAPC-I701D)",
+ .params = tuner_lg_pal_i_params,
+ },
+ [TUNER_LG_NTSC_FM] = { /* LGINNOTEK NTSC */
+ .name = "LG NTSC+FM (TPI8NSR01F)",
+ .params = tuner_lg_ntsc_fm_params,
+ },
+ [TUNER_LG_PAL_FM] = { /* LGINNOTEK PAL */
+ .name = "LG PAL_BG+FM (TPI8PSB01D)",
+ .params = tuner_lg_pal_fm_params,
+ },
+ [TUNER_LG_PAL] = { /* LGINNOTEK PAL */
+ .name = "LG PAL_BG (TPI8PSB11D)",
+ .params = tuner_lg_pal_params,
+ },
+
+ /* 30-39 */
+ [TUNER_TEMIC_4009FN5_MULTI_PAL_FM] = { /* TEMIC PAL */
+ .name = "Temic PAL* auto + FM (4009 FN5)",
+ .params = tuner_temic_4009_fn5_multi_pal_fm_params,
+ },
+ [TUNER_SHARP_2U5JF5540_NTSC] = { /* SHARP NTSC */
+ .name = "SHARP NTSC_JP (2U5JF5540)",
+ .params = tuner_sharp_2u5jf5540_params,
+ },
+ [TUNER_Samsung_PAL_TCPM9091PD27] = { /* Samsung PAL */
+ .name = "Samsung PAL TCPM9091PD27",
+ .params = tuner_samsung_pal_tcpm9091pd27_params,
+ },
+ [TUNER_MT2032] = { /* Microtune PAL|NTSC */
+ .name = "MT20xx universal",
+ /* see mt20xx.c for details */ },
+ [TUNER_TEMIC_4106FH5] = { /* TEMIC PAL */
+ .name = "Temic PAL_BG (4106 FH5)",
+ .params = tuner_temic_4106fh5_params,
+ },
+ [TUNER_TEMIC_4012FY5] = { /* TEMIC PAL */
+ .name = "Temic PAL_DK/SECAM_L (4012 FY5)",
+ .params = tuner_temic_4012fy5_params,
+ },
+ [TUNER_TEMIC_4136FY5] = { /* TEMIC NTSC */
+ .name = "Temic NTSC (4136 FY5)",
+ .params = tuner_temic_4136_fy5_params,
+ },
+ [TUNER_LG_PAL_NEW_TAPC] = { /* LGINNOTEK PAL */
+ .name = "LG PAL (newer TAPC series)",
+ .params = tuner_lg_pal_new_tapc_params,
+ },
+ [TUNER_PHILIPS_FM1216ME_MK3] = { /* Philips PAL */
+ .name = "Philips PAL/SECAM multi (FM1216ME MK3)",
+ .params = tuner_fm1216me_mk3_params,
+ },
+ [TUNER_LG_NTSC_NEW_TAPC] = { /* LGINNOTEK NTSC */
+ .name = "LG NTSC (newer TAPC series)",
+ .params = tuner_lg_ntsc_new_tapc_params,
+ },
+
+ /* 40-49 */
+ [TUNER_HITACHI_NTSC] = { /* HITACHI NTSC */
+ .name = "HITACHI V7-J180AT",
+ .params = tuner_hitachi_ntsc_params,
+ },
+ [TUNER_PHILIPS_PAL_MK] = { /* Philips PAL */
+ .name = "Philips PAL_MK (FI1216 MK)",
+ .params = tuner_philips_pal_mk_params,
+ },
+ [TUNER_PHILIPS_ATSC] = { /* Philips ATSC */
+ .name = "Philips 1236D ATSC/NTSC dual in",
+ .params = tuner_philips_atsc_params,
+ },
+ [TUNER_PHILIPS_FM1236_MK3] = { /* Philips NTSC */
+ .name = "Philips NTSC MK3 (FM1236MK3 or FM1236/F)",
+ .params = tuner_fm1236_mk3_params,
+ },
+ [TUNER_PHILIPS_4IN1] = { /* Philips NTSC */
+ .name = "Philips 4 in 1 (ATI TV Wonder Pro/Conexant)",
+ .params = tuner_philips_4in1_params,
+ },
+ [TUNER_MICROTUNE_4049FM5] = { /* Microtune PAL */
+ .name = "Microtune 4049 FM5",
+ .params = tuner_microtune_4049_fm5_params,
+ },
+ [TUNER_PANASONIC_VP27] = { /* Panasonic NTSC */
+ .name = "Panasonic VP27s/ENGE4324D",
+ .params = tuner_panasonic_vp27_params,
+ },
+ [TUNER_LG_NTSC_TAPE] = { /* LGINNOTEK NTSC */
+ .name = "LG NTSC (TAPE series)",
+ .params = tuner_lg_ntsc_tape_params,
+ },
+ [TUNER_TNF_8831BGFF] = { /* Philips PAL */
+ .name = "Tenna TNF 8831 BGFF)",
+ .params = tuner_tnf_8831bgff_params,
+ },
+ [TUNER_MICROTUNE_4042FI5] = { /* Microtune NTSC */
+ .name = "Microtune 4042 FI5 ATSC/NTSC dual in",
+ .params = tuner_microtune_4042fi5_params,
+ },
+
+ /* 50-59 */
+ [TUNER_TCL_2002N] = { /* TCL NTSC */
+ .name = "TCL 2002N",
+ .params = tuner_tcl_2002n_params,
+ },
+ [TUNER_PHILIPS_FM1256_IH3] = { /* Philips PAL */
+ .name = "Philips PAL/SECAM_D (FM 1256 I-H3)",
+ .params = tuner_philips_fm1256_ih3_params,
+ },
+ [TUNER_THOMSON_DTT7610] = { /* THOMSON ATSC */
+ .name = "Thomson DTT 7610 (ATSC/NTSC)",
+ .params = tuner_thomson_dtt7610_params,
+ },
+ [TUNER_PHILIPS_FQ1286] = { /* Philips NTSC */
+ .name = "Philips FQ1286",
+ .params = tuner_philips_fq1286_params,
+ },
+ [TUNER_PHILIPS_TDA8290] = { /* Philips PAL|NTSC */
+ .name = "tda8290+75",
+ /* see tda8290.c for details */ },
+ [TUNER_TCL_2002MB] = { /* TCL PAL */
+ .name = "TCL 2002MB",
+ .params = tuner_tcl_2002mb_params,
+ },
+ [TUNER_PHILIPS_FQ1216AME_MK4] = { /* Philips PAL */
+ .name = "Philips PAL/SECAM multi (FQ1216AME MK4)",
+ .params = tuner_philips_fq1216ame_mk4_params,
+ },
+ [TUNER_PHILIPS_FQ1236A_MK4] = { /* Philips NTSC */
+ .name = "Philips FQ1236A MK4",
+ .params = tuner_philips_fq1236a_mk4_params,
+ },
+ [TUNER_YMEC_TVF_8531MF] = { /* Philips NTSC */
+ .name = "Ymec TVision TVF-8531MF/8831MF/8731MF",
+ .params = tuner_ymec_tvf_8531mf_params,
+ },
+ [TUNER_YMEC_TVF_5533MF] = { /* Philips NTSC */
+ .name = "Ymec TVision TVF-5533MF",
+ .params = tuner_ymec_tvf_5533mf_params,
+ },
+
+ /* 60-69 */
+ [TUNER_THOMSON_DTT761X] = { /* THOMSON ATSC */
+ /* DTT 7611 7611A 7612 7613 7613A 7614 7615 7615A */
+ .name = "Thomson DTT 761X (ATSC/NTSC)",
+ .params = tuner_thomson_dtt761x_params,
+ },
+ [TUNER_TENA_9533_DI] = { /* Philips PAL */
+ .name = "Tena TNF9533-D/IF/TNF9533-B/DF",
+ .params = tuner_tena_9533_di_params,
+ },
+ [TUNER_TEA5767] = { /* Philips RADIO */
+ .name = "Philips TEA5767HN FM Radio",
+ /* see tea5767.c for details */
+ },
+ [TUNER_PHILIPS_FMD1216ME_MK3] = { /* Philips PAL */
+ .name = "Philips FMD1216ME MK3 Hybrid Tuner",
+ .params = tuner_tuner_philips_fmd1216me_mk3_params,
+ },
+ [TUNER_LG_TDVS_H062F] = { /* LGINNOTEK ATSC */
+ .name = "LG TDVS-H062F/TUA6034",
+ .params = tuner_tua6034_params,
+ },
+ [TUNER_YMEC_TVF66T5_B_DFF] = { /* Philips PAL */
+ .name = "Ymec TVF66T5-B/DFF",
+ .params = tuner_ymec_tvf66t5_b_dff_params,
+ },
+ [TUNER_LG_NTSC_TALN_MINI] = { /* LGINNOTEK NTSC */
+ .name = "LG NTSC (TALN mini series)",
+ .params = tuner_lg_taln_mini_params,
+ },
+ [TUNER_PHILIPS_TD1316] = { /* Philips PAL */
+ .name = "Philips TD1316 Hybrid Tuner",
+ .params = tuner_philips_td1316_params,
+ },
+ [TUNER_PHILIPS_TUV1236D] = { /* Philips ATSC */
+ .name = "Philips TUV1236D ATSC/NTSC dual in",
+ .params = tuner_tuner_tuv1236d_params,
+ },
+ [TUNER_TNF_5335MF] = { /* Philips NTSC */
+ .name = "Tena TNF 5335 MF",
+ .params = tuner_tnf_5335mf_params,
+ },
+
+ /* 70-79 */
+ [TUNER_SAMSUNG_TCPN_2121P30A] = { /* Samsung NTSC */
+ .name = "Samsung TCPN 2121P30A",
+ .params = tuner_samsung_tcpn_2121p30a_params,
+ },
+};
+
+unsigned const int tuner_count = ARRAY_SIZE(tuners);
{ TUNER_LG_PAL_NEW_TAPC, "TCL 2002MI 3"},
{ TUNER_TCL_2002N, "TCL 2002N 6A"},
{ TUNER_PHILIPS_FM1236_MK3, "Philips FQ1236 MK3"},
- { TUNER_ABSENT, "Samsung TCPN 2121P30A"},
+ { TUNER_SAMSUNG_TCPN_2121P30A, "Samsung TCPN 2121P30A"},
{ TUNER_ABSENT, "Samsung TCPE 4121P30A"},
{ TUNER_PHILIPS_FM1216ME_MK3, "TCL MFPE05 2"},
/* 90-99 */
unsigned char values[26];
};
-struct i2c_vbi_ram_value vbi_ram_default[] =
+static struct i2c_vbi_ram_value vbi_ram_default[] =
{
{0x010, /* WST SECAM 6 */
{ 0xaa, 0xaa, 0xff, 0xff , 0xe7, 0x2e, 0x20, 0x26, 0xe6, 0xb4, 0x0e, 0x0, 0x0, 0x0, 0x10, 0x0 }
#endif
[_IOC_NR(AUDC_SET_RADIO)] = "AUDC_SET_RADIO",
[_IOC_NR(AUDC_SET_INPUT)] = "AUDC_SET_INPUT",
+ [_IOC_NR(MSP_SET_MATRIX)] = "MSP_SET_MATRIX",
[_IOC_NR(TUNER_SET_TYPE_ADDR)] = "TUNER_SET_TYPE_ADDR",
[_IOC_NR(TUNER_SET_STANDBY)] = "TUNER_SET_STANDBY",
#include <linux/devfs_fs_kernel.h>
#include <asm/uaccess.h>
#include <asm/system.h>
-#include <asm/semaphore.h>
#include <linux/videodev.h>
*/
static struct video_device *video_device[VIDEO_NUM_DEVICES];
-static DECLARE_MUTEX(videodev_lock);
+static DEFINE_MUTEX(videodev_lock);
struct video_device* video_devdata(struct file *file)
{
if(minor>=VIDEO_NUM_DEVICES)
return -ENODEV;
- down(&videodev_lock);
+ mutex_lock(&videodev_lock);
vfl=video_device[minor];
if(vfl==NULL) {
- up(&videodev_lock);
+ mutex_unlock(&videodev_lock);
request_module("char-major-%d-%d", VIDEO_MAJOR, minor);
- down(&videodev_lock);
+ mutex_lock(&videodev_lock);
vfl=video_device[minor];
if (vfl==NULL) {
- up(&videodev_lock);
+ mutex_unlock(&videodev_lock);
return -ENODEV;
}
}
file->f_op = fops_get(old_fops);
}
fops_put(old_fops);
- up(&videodev_lock);
+ mutex_unlock(&videodev_lock);
return err;
}
}
/* pick a minor number */
- down(&videodev_lock);
+ mutex_lock(&videodev_lock);
if (nr >= 0 && nr < end-base) {
/* use the one the driver asked for */
i = base+nr;
if (NULL != video_device[i]) {
- up(&videodev_lock);
+ mutex_unlock(&videodev_lock);
return -ENFILE;
}
} else {
if (NULL == video_device[i])
break;
if (i == end) {
- up(&videodev_lock);
+ mutex_unlock(&videodev_lock);
return -ENFILE;
}
}
video_device[i]=vfd;
vfd->minor=i;
- up(&videodev_lock);
+ mutex_unlock(&videodev_lock);
sprintf(vfd->devfs_name, "v4l/%s%d", name_base, i - base);
devfs_mk_cdev(MKDEV(VIDEO_MAJOR, vfd->minor),
void video_unregister_device(struct video_device *vfd)
{
- down(&videodev_lock);
+ mutex_lock(&videodev_lock);
if(video_device[vfd->minor]!=vfd)
panic("videodev: bad unregister");
devfs_remove(vfd->devfs_name);
video_device[vfd->minor]=NULL;
class_device_unregister(&vfd->class_dev);
- up(&videodev_lock);
+ mutex_unlock(&videodev_lock);
}
# For mptctl:
#CFLAGS_mptctl.o += -DMPT_DEBUG_IOCTL
#
+# For mptfc:
+#CFLAGS_mptfc.o += -DMPT_DEBUG_FC
#=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-} LSI_LOGIC
/*
* cmd line parameters
*/
+static int mpt_msi_enable;
+module_param(mpt_msi_enable, int, 0);
+MODULE_PARM_DESC(mpt_msi_enable, " MSI Support Enable (default=0)");
+
#ifdef MFCNT
static int mfcounter = 0;
#define PRINT_MF_COUNT 20000
static int ProcessEventNotification(MPT_ADAPTER *ioc, EventNotificationReply_t *evReply, int *evHandlers);
static void mpt_sp_ioc_info(MPT_ADAPTER *ioc, u32 ioc_status, MPT_FRAME_HDR *mf);
static void mpt_fc_log_info(MPT_ADAPTER *ioc, u32 log_info);
-static void mpt_sp_log_info(MPT_ADAPTER *ioc, u32 log_info);
+static void mpt_spi_log_info(MPT_ADAPTER *ioc, u32 log_info);
static void mpt_sas_log_info(MPT_ADAPTER *ioc, u32 log_info);
/* module entry point */
if (ioc->bus_type == FC)
mpt_fc_log_info(ioc, log_info);
else if (ioc->bus_type == SPI)
- mpt_sp_log_info(ioc, log_info);
+ mpt_spi_log_info(ioc, log_info);
else if (ioc->bus_type == SAS)
mpt_sas_log_info(ioc, log_info);
}
ioc->pci_irq = -1;
if (pdev->irq) {
+ if (mpt_msi_enable && !pci_enable_msi(pdev))
+ printk(MYIOC_s_INFO_FMT "PCI-MSI enabled\n", ioc->name);
+
r = request_irq(pdev->irq, mpt_interrupt, SA_SHIRQ, ioc->name, ioc);
if (r < 0) {
list_del(&ioc->list);
free_irq(ioc->pci_irq, ioc);
+ if (mpt_msi_enable)
+ pci_disable_msi(pdev);
+ if (ioc->alt_ioc)
+ ioc->alt_ioc->alt_ioc = NULL;
iounmap(mem);
kfree(ioc);
pci_set_drvdata(pdev, NULL);
if (ioc->pci_irq != -1) {
free_irq(ioc->pci_irq, ioc);
+ if (mpt_msi_enable)
+ pci_disable_msi(ioc->pcidev);
ioc->pci_irq = -1;
}
sz_last = ioc->alloc_total;
dprintk((KERN_INFO MYNAM ": %s: free'd %d of %d bytes\n",
ioc->name, sz_first-sz_last+(int)sizeof(*ioc), sz_first));
+
+ if (ioc->alt_ioc)
+ ioc->alt_ioc->alt_ioc = NULL;
+
kfree(ioc);
}
/* RAID FW may take a long time to enable
*/
- if ( (ioc->facts.ProductID & MPI_FW_HEADER_PID_PROD_MASK)
- > MPI_FW_HEADER_PID_PROD_TARGET_SCSI ) {
- rc = mpt_handshake_req_reply_wait(ioc, req_sz, (u32*)&port_enable,
- reply_sz, (u16*)&reply_buf, 300 /*seconds*/, sleepFlag);
+ if (((ioc->facts.ProductID & MPI_FW_HEADER_PID_PROD_MASK)
+ > MPI_FW_HEADER_PID_PROD_TARGET_SCSI) ||
+ (ioc->bus_type == SAS)) {
+ rc = mpt_handshake_req_reply_wait(ioc, req_sz,
+ (u32*)&port_enable, reply_sz, (u16*)&reply_buf,
+ 300 /*seconds*/, sleepFlag);
} else {
- rc = mpt_handshake_req_reply_wait(ioc, req_sz, (u32*)&port_enable,
- reply_sz, (u16*)&reply_buf, 30 /*seconds*/, sleepFlag);
+ rc = mpt_handshake_req_reply_wait(ioc, req_sz,
+ (u32*)&port_enable, reply_sz, (u16*)&reply_buf,
+ 30 /*seconds*/, sleepFlag);
}
return rc;
}
return 0;
}
+/*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
+
+static void
+mptbase_raid_process_event_data(MPT_ADAPTER *ioc,
+ MpiEventDataRaid_t * pRaidEventData)
+{
+ int volume;
+ int reason;
+ int disk;
+ int status;
+ int flags;
+ int state;
+
+ volume = pRaidEventData->VolumeID;
+ reason = pRaidEventData->ReasonCode;
+ disk = pRaidEventData->PhysDiskNum;
+ status = le32_to_cpu(pRaidEventData->SettingsStatus);
+ flags = (status >> 0) & 0xff;
+ state = (status >> 8) & 0xff;
+
+ if (reason == MPI_EVENT_RAID_RC_DOMAIN_VAL_NEEDED) {
+ return;
+ }
+
+ if ((reason >= MPI_EVENT_RAID_RC_PHYSDISK_CREATED &&
+ reason <= MPI_EVENT_RAID_RC_PHYSDISK_STATUS_CHANGED) ||
+ (reason == MPI_EVENT_RAID_RC_SMART_DATA)) {
+ printk(MYIOC_s_INFO_FMT "RAID STATUS CHANGE for PhysDisk %d\n",
+ ioc->name, disk);
+ } else {
+ printk(MYIOC_s_INFO_FMT "RAID STATUS CHANGE for VolumeID %d\n",
+ ioc->name, volume);
+ }
+
+ switch(reason) {
+ case MPI_EVENT_RAID_RC_VOLUME_CREATED:
+ printk(MYIOC_s_INFO_FMT " volume has been created\n",
+ ioc->name);
+ break;
+
+ case MPI_EVENT_RAID_RC_VOLUME_DELETED:
+
+ printk(MYIOC_s_INFO_FMT " volume has been deleted\n",
+ ioc->name);
+ break;
+
+ case MPI_EVENT_RAID_RC_VOLUME_SETTINGS_CHANGED:
+ printk(MYIOC_s_INFO_FMT " volume settings have been changed\n",
+ ioc->name);
+ break;
+
+ case MPI_EVENT_RAID_RC_VOLUME_STATUS_CHANGED:
+ printk(MYIOC_s_INFO_FMT " volume is now %s%s%s%s\n",
+ ioc->name,
+ state == MPI_RAIDVOL0_STATUS_STATE_OPTIMAL
+ ? "optimal"
+ : state == MPI_RAIDVOL0_STATUS_STATE_DEGRADED
+ ? "degraded"
+ : state == MPI_RAIDVOL0_STATUS_STATE_FAILED
+ ? "failed"
+ : "state unknown",
+ flags & MPI_RAIDVOL0_STATUS_FLAG_ENABLED
+ ? ", enabled" : "",
+ flags & MPI_RAIDVOL0_STATUS_FLAG_QUIESCED
+ ? ", quiesced" : "",
+ flags & MPI_RAIDVOL0_STATUS_FLAG_RESYNC_IN_PROGRESS
+ ? ", resync in progress" : "" );
+ break;
+
+ case MPI_EVENT_RAID_RC_VOLUME_PHYSDISK_CHANGED:
+ printk(MYIOC_s_INFO_FMT " volume membership of PhysDisk %d has changed\n",
+ ioc->name, disk);
+ break;
+
+ case MPI_EVENT_RAID_RC_PHYSDISK_CREATED:
+ printk(MYIOC_s_INFO_FMT " PhysDisk has been created\n",
+ ioc->name);
+ break;
+
+ case MPI_EVENT_RAID_RC_PHYSDISK_DELETED:
+ printk(MYIOC_s_INFO_FMT " PhysDisk has been deleted\n",
+ ioc->name);
+ break;
+
+ case MPI_EVENT_RAID_RC_PHYSDISK_SETTINGS_CHANGED:
+ printk(MYIOC_s_INFO_FMT " PhysDisk settings have been changed\n",
+ ioc->name);
+ break;
+
+ case MPI_EVENT_RAID_RC_PHYSDISK_STATUS_CHANGED:
+ printk(MYIOC_s_INFO_FMT " PhysDisk is now %s%s%s\n",
+ ioc->name,
+ state == MPI_PHYSDISK0_STATUS_ONLINE
+ ? "online"
+ : state == MPI_PHYSDISK0_STATUS_MISSING
+ ? "missing"
+ : state == MPI_PHYSDISK0_STATUS_NOT_COMPATIBLE
+ ? "not compatible"
+ : state == MPI_PHYSDISK0_STATUS_FAILED
+ ? "failed"
+ : state == MPI_PHYSDISK0_STATUS_INITIALIZING
+ ? "initializing"
+ : state == MPI_PHYSDISK0_STATUS_OFFLINE_REQUESTED
+ ? "offline requested"
+ : state == MPI_PHYSDISK0_STATUS_FAILED_REQUESTED
+ ? "failed requested"
+ : state == MPI_PHYSDISK0_STATUS_OTHER_OFFLINE
+ ? "offline"
+ : "state unknown",
+ flags & MPI_PHYSDISK0_STATUS_FLAG_OUT_OF_SYNC
+ ? ", out of sync" : "",
+ flags & MPI_PHYSDISK0_STATUS_FLAG_QUIESCED
+ ? ", quiesced" : "" );
+ break;
+
+ case MPI_EVENT_RAID_RC_DOMAIN_VAL_NEEDED:
+ printk(MYIOC_s_INFO_FMT " Domain Validation needed for PhysDisk %d\n",
+ ioc->name, disk);
+ break;
+
+ case MPI_EVENT_RAID_RC_SMART_DATA:
+ printk(MYIOC_s_INFO_FMT " SMART data received, ASC/ASCQ = %02xh/%02xh\n",
+ ioc->name, pRaidEventData->ASC, pRaidEventData->ASCQ);
+ break;
+
+ case MPI_EVENT_RAID_RC_REPLACE_ACTION_STARTED:
+ printk(MYIOC_s_INFO_FMT " replacement of PhysDisk %d has started\n",
+ ioc->name, disk);
+ break;
+ }
+}
+
/*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
/*
* GetIoUnitPage2 - Retrieve BIOS version and boot order information.
SCSIPortPage2_t *pPP2 = (SCSIPortPage2_t *) pbuf;
MpiDeviceInfo_t *pdevice = NULL;
+ /*
+ * Save "Set to Avoid SCSI Bus Resets" flag
+ */
+ ioc->spi_data.bus_reset =
+ (le32_to_cpu(pPP2->PortFlags) &
+ MPI_SCSIPORTPAGE2_PORT_FLAGS_AVOID_SCSI_RESET) ?
+ 0 : 1 ;
+
/* Save the Port Page 2 data
* (reformat into a 32bit quantity)
*/
}
}
break;
+ case MPI_EVENT_INTEGRATED_RAID:
+ mptbase_raid_process_event_data(ioc,
+ (MpiEventDataRaid_t *)pEventReply->Data);
+ break;
default:
break;
}
/*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
/*
- * mpt_sp_log_info - Log information returned from SCSI Parallel IOC.
+ * mpt_spi_log_info - Log information returned from SCSI Parallel IOC.
* @ioc: Pointer to MPT_ADAPTER structure
* @mr: Pointer to MPT reply frame
* @log_info: U32 LogInfo word from the IOC
* Refer to lsi/sp_log.h.
*/
static void
-mpt_sp_log_info(MPT_ADAPTER *ioc, u32 log_info)
+mpt_spi_log_info(MPT_ADAPTER *ioc, u32 log_info)
{
u32 info = log_info & 0x00FF0000;
char *desc = "unknown";
#define COPYRIGHT "Copyright (c) 1999-2005 " MODULEAUTHOR
#endif
-#define MPT_LINUX_VERSION_COMMON "3.03.06"
-#define MPT_LINUX_PACKAGE_NAME "@(#)mptlinux-3.03.06"
+#define MPT_LINUX_VERSION_COMMON "3.03.07"
+#define MPT_LINUX_PACKAGE_NAME "@(#)mptlinux-3.03.07"
#define WHAT_MAGIC_STRING "@" "(" "#" ")"
#define show_mptmod_ver(s,ver) \
#define MPT_MAX_FRAME_SIZE 128
#define MPT_DEFAULT_FRAME_SIZE 128
-#define MPT_REPLY_FRAME_SIZE 0x40 /* Must be a multiple of 8 */
+#define MPT_REPLY_FRAME_SIZE 0x50 /* Must be a multiple of 8 */
#define MPT_SG_REQ_128_SCALE 1
#define MPT_SG_REQ_96_SCALE 2
{
struct list_head list;
struct fc_rport *rport;
- VirtDevice *vdev;
+ struct scsi_target *starget;
FCDevicePage0_t pg0;
u8 flags;
+ u8 remap_needed;
};
/*
struct mutex sas_topology_mutex;
MPT_SAS_MGMT sas_mgmt;
int num_ports;
+ struct work_struct mptscsih_persistTask;
struct list_head fc_rports;
spinlock_t fc_rport_lock; /* list and ri flags */
#define dreplyprintk(x)
#endif
+#ifdef DMPT_DEBUG_FC
+#define dfcprintk(x) printk x
+#else
+#define dfcprintk(x)
+#endif
+
#ifdef MPT_DEBUG_TM
#define dtmprintk(x) printk x
#define DBG_DUMP_TM_REQUEST_FRAME(mfp) \
static int mptfcTaskCtx = -1;
static int mptfcInternalCtx = -1; /* Used only for internal commands */
-int mptfc_slave_alloc(struct scsi_device *device);
+static int mptfc_target_alloc(struct scsi_target *starget);
+static int mptfc_slave_alloc(struct scsi_device *sdev);
static int mptfc_qcmd(struct scsi_cmnd *SCpnt,
- void (*done)(struct scsi_cmnd *));
-
+ void (*done)(struct scsi_cmnd *));
+static void mptfc_target_destroy(struct scsi_target *starget);
static void mptfc_set_rport_loss_tmo(struct fc_rport *rport, uint32_t timeout);
static void __devexit mptfc_remove(struct pci_dev *pdev);
.name = "MPT FC Host",
.info = mptscsih_info,
.queuecommand = mptfc_qcmd,
- .target_alloc = mptscsih_target_alloc,
+ .target_alloc = mptfc_target_alloc,
.slave_alloc = mptfc_slave_alloc,
.slave_configure = mptscsih_slave_configure,
- .target_destroy = mptscsih_target_destroy,
+ .target_destroy = mptfc_target_destroy,
.slave_destroy = mptscsih_slave_destroy,
.change_queue_depth = mptscsih_change_queue_depth,
.eh_abort_handler = mptscsih_abort,
return 0;
}
+static void
+mptfc_remap_sdev(struct scsi_device *sdev, void *arg)
+{
+ VirtDevice *vdev;
+ VirtTarget *vtarget;
+ struct scsi_target *starget;
+
+ starget = scsi_target(sdev);
+ if (starget->hostdata == arg) {
+ vtarget = arg;
+ vdev = sdev->hostdata;
+ if (vdev) {
+ vdev->bus_id = vtarget->bus_id;
+ vdev->target_id = vtarget->target_id;
+ }
+ }
+}
+
static void
mptfc_register_dev(MPT_ADAPTER *ioc, int channel, FCDevicePage0_t *pg0)
{
struct fc_rport_identifiers rport_ids;
struct fc_rport *rport;
struct mptfc_rport_info *ri;
- int match = 0;
- u64 port_name;
+ int new_ri = 1;
+ u64 pn;
unsigned long flags;
+ VirtTarget *vtarget;
if (mptfc_generate_rport_ids(pg0, &rport_ids) < 0)
return;
/* scan list looking for a match */
spin_lock_irqsave(&ioc->fc_rport_lock, flags);
list_for_each_entry(ri, &ioc->fc_rports, list) {
- port_name = (u64)ri->pg0.WWPN.High << 32 | (u64)ri->pg0.WWPN.Low;
- if (port_name == rport_ids.port_name) { /* match */
+ pn = (u64)ri->pg0.WWPN.High << 32 | (u64)ri->pg0.WWPN.Low;
+ if (pn == rport_ids.port_name) { /* match */
list_move_tail(&ri->list, &ioc->fc_rports);
- match = 1;
+ new_ri = 0;
break;
}
}
- if (!match) { /* allocate one */
+ if (new_ri) { /* allocate one */
spin_unlock_irqrestore(&ioc->fc_rport_lock, flags);
ri = kzalloc(sizeof(struct mptfc_rport_info), GFP_KERNEL);
if (!ri)
ri->pg0 = *pg0; /* add/update pg0 data */
ri->flags &= ~MPT_RPORT_INFO_FLAGS_MISSING;
+ /* MPT_RPORT_INFO_FLAGS_REGISTERED - rport not previously deleted */
if (!(ri->flags & MPT_RPORT_INFO_FLAGS_REGISTERED)) {
ri->flags |= MPT_RPORT_INFO_FLAGS_REGISTERED;
spin_unlock_irqrestore(&ioc->fc_rport_lock, flags);
- rport = fc_remote_port_add(ioc->sh,channel, &rport_ids);
+ rport = fc_remote_port_add(ioc->sh, channel, &rport_ids);
spin_lock_irqsave(&ioc->fc_rport_lock, flags);
if (rport) {
- if (*((struct mptfc_rport_info **)rport->dd_data) != ri) {
- ri->flags &= ~MPT_RPORT_INFO_FLAGS_MAPPED_VDEV;
- ri->vdev = NULL;
- ri->rport = rport;
- *((struct mptfc_rport_info **)rport->dd_data) = ri;
- }
- rport->dev_loss_tmo = mptfc_dev_loss_tmo;
+ ri->rport = rport;
+ if (new_ri) /* may have been reset by user */
+ rport->dev_loss_tmo = mptfc_dev_loss_tmo;
+ *((struct mptfc_rport_info **)rport->dd_data) = ri;
/*
* if already mapped, remap here. If not mapped,
- * slave_alloc will allocate vdev and map
+ * target_alloc will allocate vtarget and map,
+ * slave_alloc will fill in vdev from vtarget.
*/
- if (ri->flags & MPT_RPORT_INFO_FLAGS_MAPPED_VDEV) {
- ri->vdev->target_id = ri->pg0.CurrentTargetID;
- ri->vdev->bus_id = ri->pg0.CurrentBus;
- ri->vdev->vtarget->target_id = ri->vdev->target_id;
- ri->vdev->vtarget->bus_id = ri->vdev->bus_id;
+ if (ri->starget) {
+ vtarget = ri->starget->hostdata;
+ if (vtarget) {
+ vtarget->target_id = pg0->CurrentTargetID;
+ vtarget->bus_id = pg0->CurrentBus;
+ starget_for_each_device(ri->starget,
+ vtarget,mptfc_remap_sdev);
+ }
+ ri->remap_needed = 0;
}
- #ifdef MPT_DEBUG
- printk ("mptfc_reg_dev.%d: %x, %llx / %llx, tid %d, "
+ dfcprintk ((MYIOC_s_INFO_FMT
+ "mptfc_reg_dev.%d: %x, %llx / %llx, tid %d, "
"rport tid %d, tmo %d\n",
- ioc->sh->host_no,
+ ioc->name,
+ oc->sh->host_no,
pg0->PortIdentifier,
pg0->WWNN,
pg0->WWPN,
pg0->CurrentTargetID,
ri->rport->scsi_target_id,
- ri->rport->dev_loss_tmo);
- #endif
+ ri->rport->dev_loss_tmo));
} else {
list_del(&ri->list);
kfree(ri);
}
+/*
+ * OS entry point to allow for host driver to free allocated memory
+ * Called if no device present or device being unloaded
+ */
+static void
+mptfc_target_destroy(struct scsi_target *starget)
+{
+ struct fc_rport *rport;
+ struct mptfc_rport_info *ri;
+
+ rport = starget_to_rport(starget);
+ if (rport) {
+ ri = *((struct mptfc_rport_info **)rport->dd_data);
+ if (ri) /* better be! */
+ ri->starget = NULL;
+ }
+ if (starget->hostdata)
+ kfree(starget->hostdata);
+ starget->hostdata = NULL;
+}
+
+/*
+ * OS entry point to allow host driver to alloc memory
+ * for each scsi target. Called once per device the bus scan.
+ * Return non-zero if allocation fails.
+ */
+static int
+mptfc_target_alloc(struct scsi_target *starget)
+{
+ VirtTarget *vtarget;
+ struct fc_rport *rport;
+ struct mptfc_rport_info *ri;
+ int rc;
+
+ vtarget = kzalloc(sizeof(VirtTarget), GFP_KERNEL);
+ if (!vtarget)
+ return -ENOMEM;
+ starget->hostdata = vtarget;
+
+ rc = -ENODEV;
+ rport = starget_to_rport(starget);
+ if (rport) {
+ ri = *((struct mptfc_rport_info **)rport->dd_data);
+ if (ri) { /* better be! */
+ vtarget->target_id = ri->pg0.CurrentTargetID;
+ vtarget->bus_id = ri->pg0.CurrentBus;
+ ri->starget = starget;
+ ri->remap_needed = 0;
+ rc = 0;
+ }
+ }
+ if (rc != 0) {
+ kfree(vtarget);
+ starget->hostdata = NULL;
+ }
+
+ return rc;
+}
+
/*
* OS entry point to allow host driver to alloc memory
* for each scsi device. Called once per device the bus scan.
VirtDevice *vdev;
struct scsi_target *starget;
struct fc_rport *rport;
- struct mptfc_rport_info *ri;
unsigned long flags;
hd = (MPT_SCSI_HOST *)sdev->host->hostdata;
- vdev = kmalloc(sizeof(VirtDevice), GFP_KERNEL);
+ vdev = kzalloc(sizeof(VirtDevice), GFP_KERNEL);
if (!vdev) {
printk(MYIOC_s_ERR_FMT "slave_alloc kmalloc(%zd) FAILED!\n",
hd->ioc->name, sizeof(VirtDevice));
return -ENOMEM;
}
- memset(vdev, 0, sizeof(VirtDevice));
spin_lock_irqsave(&hd->ioc->fc_rport_lock,flags);
- if (!(ri = *((struct mptfc_rport_info **)rport->dd_data))) {
- spin_unlock_irqrestore(&hd->ioc->fc_rport_lock,flags);
- kfree(vdev);
- return -ENODEV;
- }
-
sdev->hostdata = vdev;
starget = scsi_target(sdev);
vtarget = starget->hostdata;
+
if (vtarget->num_luns == 0) {
+ vtarget->ioc_id = hd->ioc->id;
vtarget->tflags = MPT_TARGET_FLAGS_Q_YES |
MPT_TARGET_FLAGS_VALID_INQUIRY;
hd->Targets[sdev->id] = vtarget;
}
- vtarget->target_id = vdev->target_id;
- vtarget->bus_id = vdev->bus_id;
-
vdev->vtarget = vtarget;
vdev->ioc_id = hd->ioc->id;
vdev->lun = sdev->lun;
- vdev->target_id = ri->pg0.CurrentTargetID;
- vdev->bus_id = ri->pg0.CurrentBus;
-
- ri->flags |= MPT_RPORT_INFO_FLAGS_MAPPED_VDEV;
- ri->vdev = vdev;
+ vdev->target_id = vtarget->target_id;
+ vdev->bus_id = vtarget->bus_id;
spin_unlock_irqrestore(&hd->ioc->fc_rport_lock,flags);
vtarget->num_luns++;
-#ifdef MPT_DEBUG
- printk ("mptfc_slv_alloc.%d: num_luns %d, sdev.id %d, "
+ dfcprintk ((MYIOC_s_INFO_FMT
+ "mptfc_slv_alloc.%d: num_luns %d, sdev.id %d, "
"CurrentTargetID %d, %x %llx %llx\n",
- sdev->host->host_no,
- vtarget->num_luns,
- sdev->id, ri->pg0.CurrentTargetID,
- ri->pg0.PortIdentifier, ri->pg0.WWPN, ri->pg0.WWNN);
-#endif
+ ioc->name,
+ sdev->host->host_no,
+ vtarget->num_luns,
+ sdev->id, ri->pg0.CurrentTargetID,
+ ri->pg0.PortIdentifier, ri->pg0.WWPN, ri->pg0.WWNN));
return 0;
}
static int
mptfc_qcmd(struct scsi_cmnd *SCpnt, void (*done)(struct scsi_cmnd *))
{
+ struct mptfc_rport_info *ri;
struct fc_rport *rport = starget_to_rport(scsi_target(SCpnt->device));
int err;
done(SCpnt);
return 0;
}
+ ri = *((struct mptfc_rport_info **)rport->dd_data);
+ if (unlikely(ri->remap_needed))
+ return SCSI_MLQUEUE_HOST_BUSY;
+
return mptscsih_qcmd(SCpnt,done);
}
ri->flags &= ~(MPT_RPORT_INFO_FLAGS_REGISTERED|
MPT_RPORT_INFO_FLAGS_MISSING);
+ ri->remap_needed = 1;
fc_remote_port_delete(ri->rport);
/*
* remote port not really deleted 'cause
* binding is by WWPN and driver only
- * registers FCP_TARGETs
+ * registers FCP_TARGETs but cannot trust
+ * data structures.
*/
- #ifdef MPT_DEBUG
- printk ("mptfc_rescan.%d: %llx deleted\n",
- ioc->sh->host_no, ri->pg0.WWPN);
- #endif
+ ri->rport = NULL;
+ dfcprintk ((MYIOC_s_INFO_FMT
+ "mptfc_rescan.%d: %llx deleted\n",
+ ioc->name,
+ ioc->sh->host_no,
+ ri->pg0.WWPN));
}
}
spin_unlock_irqrestore(&ioc->fc_rport_lock,flags);
}
error = pci_register_driver(&mptfc_driver);
- if (error) {
+ if (error)
fc_release_transport(mptfc_transport_template);
- }
return error;
}
* @pdev: Pointer to pci_dev structure
*
*/
-static void __devexit mptfc_remove(struct pci_dev *pdev)
+static void __devexit
+mptfc_remove(struct pci_dev *pdev)
{
MPT_ADAPTER *ioc = pci_get_drvdata(pdev);
struct mptfc_rport_info *p, *n;
enum mptsas_hotplug_action {
MPTSAS_ADD_DEVICE,
MPTSAS_DEL_DEVICE,
+ MPTSAS_ADD_RAID,
+ MPTSAS_DEL_RAID,
};
struct mptsas_hotplug_event {
struct mptsas_devinfo {
u16 handle; /* unique id to address this device */
+ u16 handle_parent; /* unique id to address parent device */
u8 phy_id; /* phy number of parent device */
u8 port_id; /* sas physical port this device
is assoc'd with */
}
mutex_unlock(&hd->ioc->sas_topology_mutex);
- printk("No matching SAS device found!!\n");
kfree(vdev);
- return -ENODEV;
+ return -ENXIO;
out:
vtarget->ioc_id = vdev->ioc_id;
struct sas_rphy *rphy;
struct mptsas_portinfo *p;
int i;
+ VirtDevice *vdev;
/*
* Handle hotplug removal case.
out:
mutex_unlock(&hd->ioc->sas_topology_mutex);
/*
- * TODO: Issue target reset to flush firmware outstanding commands.
+ * Issue target reset to flush firmware outstanding commands.
*/
+ vdev = sdev->hostdata;
+ if (vdev->configured_lun){
+ if (mptscsih_TMHandler(hd,
+ MPI_SCSITASKMGMT_TASKTYPE_TARGET_RESET,
+ vdev->bus_id,
+ vdev->target_id,
+ 0, 0, 5 /* 5 second timeout */)
+ < 0){
+
+ /* The TM request failed!
+ * Fatal error case.
+ */
+ printk(MYIOC_s_WARN_FMT
+ "Error processing TaskMgmt id=%d TARGET_RESET\n",
+ hd->ioc->name,
+ vdev->target_id);
+
+ hd->tmPending = 0;
+ hd->tmState = TM_STATE_NONE;
+ }
+ }
mptscsih_slave_destroy(sdev);
}
mptsas_print_device_pg0(buffer);
device_info->handle = le16_to_cpu(buffer->DevHandle);
+ device_info->handle_parent = le16_to_cpu(buffer->ParentDevHandle);
device_info->phy_id = buffer->PhyNum;
device_info->port_id = buffer->PhysicalPort;
device_info->id = buffer->TargetID;
return error;
}
+/*
+ * Returns true if there is a scsi end device
+ */
+static inline int
+mptsas_is_end_device(struct mptsas_devinfo * attached)
+{
+ if ((attached->handle) &&
+ (attached->device_info &
+ MPI_SAS_DEVICE_INFO_END_DEVICE) &&
+ ((attached->device_info &
+ MPI_SAS_DEVICE_INFO_SSP_TARGET) |
+ (attached->device_info &
+ MPI_SAS_DEVICE_INFO_STP_TARGET) |
+ (attached->device_info &
+ MPI_SAS_DEVICE_INFO_SATA_DEVICE)))
+ return 1;
+ else
+ return 0;
+}
+
static void
mptsas_parse_device_info(struct sas_identify *identify,
struct mptsas_devinfo *device_info)
}
static struct mptsas_phyinfo *
-mptsas_find_phyinfo_by_handle(MPT_ADAPTER *ioc, u16 handle)
+mptsas_find_phyinfo_by_target(MPT_ADAPTER *ioc, u32 id)
{
struct mptsas_portinfo *port_info;
struct mptsas_phyinfo *phy_info = NULL;
*/
mutex_lock(&ioc->sas_topology_mutex);
list_for_each_entry(port_info, &ioc->sas_topology, list) {
- for (i = 0; i < port_info->num_phys; i++) {
- if (port_info->phy_info[i].attached.handle == handle) {
- phy_info = &port_info->phy_info[i];
- break;
- }
- }
+ for (i = 0; i < port_info->num_phys; i++)
+ if (mptsas_is_end_device(&port_info->phy_info[i].attached))
+ if (port_info->phy_info[i].attached.id == id) {
+ phy_info = &port_info->phy_info[i];
+ break;
+ }
}
mutex_unlock(&ioc->sas_topology_mutex);
MPT_ADAPTER *ioc = ev->ioc;
struct mptsas_phyinfo *phy_info;
struct sas_rphy *rphy;
+ struct scsi_device *sdev;
char *ds = NULL;
-
- if (ev->device_info & MPI_SAS_DEVICE_INFO_SSP_TARGET)
- ds = "ssp";
- if (ev->device_info & MPI_SAS_DEVICE_INFO_STP_TARGET)
- ds = "stp";
- if (ev->device_info & MPI_SAS_DEVICE_INFO_SATA_DEVICE)
- ds = "sata";
+ struct mptsas_devinfo sas_device;
switch (ev->event_type) {
case MPTSAS_DEL_DEVICE:
- printk(MYIOC_s_INFO_FMT
- "removing %s device, channel %d, id %d, phy %d\n",
- ioc->name, ds, ev->channel, ev->id, ev->phy_id);
- phy_info = mptsas_find_phyinfo_by_handle(ioc, ev->handle);
+ phy_info = mptsas_find_phyinfo_by_target(ioc, ev->id);
if (!phy_info) {
printk("mptsas: remove event for non-existant PHY.\n");
break;
}
+ if (phy_info->attached.device_info & MPI_SAS_DEVICE_INFO_SSP_TARGET)
+ ds = "ssp";
+ if (phy_info->attached.device_info & MPI_SAS_DEVICE_INFO_STP_TARGET)
+ ds = "stp";
+ if (phy_info->attached.device_info & MPI_SAS_DEVICE_INFO_SATA_DEVICE)
+ ds = "sata";
+
+ printk(MYIOC_s_INFO_FMT
+ "removing %s device, channel %d, id %d, phy %d\n",
+ ioc->name, ds, ev->channel, ev->id, phy_info->phy_id);
+
if (phy_info->rphy) {
sas_rphy_delete(phy_info->rphy);
phy_info->rphy = NULL;
}
break;
case MPTSAS_ADD_DEVICE:
- printk(MYIOC_s_INFO_FMT
- "attaching %s device, channel %d, id %d, phy %d\n",
- ioc->name, ds, ev->channel, ev->id, ev->phy_id);
+
+ /*
+ * When there is no sas address,
+ * RAID volumes are being deleted,
+ * and hidden phy disk are being added.
+ * We don't know the SAS data yet,
+ * so lookup sas device page to get
+ * pertaining info
+ */
+ if (!ev->sas_address) {
+ if (mptsas_sas_device_pg0(ioc,
+ &sas_device, ev->id,
+ (MPI_SAS_DEVICE_PGAD_FORM_BUS_TARGET_ID <<
+ MPI_SAS_DEVICE_PGAD_FORM_SHIFT)))
+ break;
+ ev->handle = sas_device.handle;
+ ev->parent_handle = sas_device.handle_parent;
+ ev->channel = sas_device.channel;
+ ev->phy_id = sas_device.phy_id;
+ ev->sas_address = sas_device.sas_address;
+ ev->device_info = sas_device.device_info;
+ }
phy_info = mptsas_find_phyinfo_by_parent(ioc,
ev->parent_handle, ev->phy_id);
phy_info->attached.sas_address = ev->sas_address;
phy_info->attached.device_info = ev->device_info;
+ if (phy_info->attached.device_info & MPI_SAS_DEVICE_INFO_SSP_TARGET)
+ ds = "ssp";
+ if (phy_info->attached.device_info & MPI_SAS_DEVICE_INFO_STP_TARGET)
+ ds = "stp";
+ if (phy_info->attached.device_info & MPI_SAS_DEVICE_INFO_SATA_DEVICE)
+ ds = "sata";
+
+ printk(MYIOC_s_INFO_FMT
+ "attaching %s device, channel %d, id %d, phy %d\n",
+ ioc->name, ds, ev->channel, ev->id, ev->phy_id);
+
+
rphy = sas_rphy_alloc(phy_info->phy);
if (!rphy)
break; /* non-fatal: an rphy can be added later */
+ rphy->scsi_target_id = phy_info->attached.id;
mptsas_parse_device_info(&rphy->identify, &phy_info->attached);
if (sas_rphy_add(rphy)) {
sas_rphy_free(rphy);
phy_info->rphy = rphy;
break;
+ case MPTSAS_ADD_RAID:
+ sdev = scsi_device_lookup(
+ ioc->sh,
+ ioc->num_ports,
+ ev->id,
+ 0);
+ if (sdev) {
+ scsi_device_put(sdev);
+ break;
+ }
+ printk(MYIOC_s_INFO_FMT
+ "attaching device, channel %d, id %d\n",
+ ioc->name, ioc->num_ports, ev->id);
+ scsi_add_device(ioc->sh,
+ ioc->num_ports,
+ ev->id,
+ 0);
+ mpt_findImVolumes(ioc);
+ break;
+ case MPTSAS_DEL_RAID:
+ sdev = scsi_device_lookup(
+ ioc->sh,
+ ioc->num_ports,
+ ev->id,
+ 0);
+ if (!sdev)
+ break;
+ printk(MYIOC_s_INFO_FMT
+ "removing device, channel %d, id %d\n",
+ ioc->name, ioc->num_ports, ev->id);
+ scsi_remove_device(sdev);
+ scsi_device_put(sdev);
+ mpt_findImVolumes(ioc);
+ break;
}
kfree(ev);
schedule_work(&ev->work);
}
+static void
+mptscsih_send_raid_event(MPT_ADAPTER *ioc,
+ EVENT_DATA_RAID *raid_event_data)
+{
+ struct mptsas_hotplug_event *ev;
+ RAID_VOL0_STATUS * volumeStatus;
+
+ if (ioc->bus_type != SAS)
+ return;
+
+ ev = kmalloc(sizeof(*ev), GFP_ATOMIC);
+ if (!ev) {
+ printk(KERN_WARNING "mptsas: lost hotplug event\n");
+ return;
+ }
+
+ memset(ev,0,sizeof(struct mptsas_hotplug_event));
+ INIT_WORK(&ev->work, mptsas_hotplug_work, ev);
+ ev->ioc = ioc;
+ ev->id = raid_event_data->VolumeID;
+
+ switch (raid_event_data->ReasonCode) {
+ case MPI_EVENT_RAID_RC_PHYSDISK_DELETED:
+ ev->event_type = MPTSAS_ADD_DEVICE;
+ break;
+ case MPI_EVENT_RAID_RC_PHYSDISK_CREATED:
+ ev->event_type = MPTSAS_DEL_DEVICE;
+ break;
+ case MPI_EVENT_RAID_RC_VOLUME_DELETED:
+ ev->event_type = MPTSAS_DEL_RAID;
+ break;
+ case MPI_EVENT_RAID_RC_VOLUME_CREATED:
+ ev->event_type = MPTSAS_ADD_RAID;
+ break;
+ case MPI_EVENT_RAID_RC_VOLUME_STATUS_CHANGED:
+ volumeStatus = (RAID_VOL0_STATUS *) &
+ raid_event_data->SettingsStatus;
+ ev->event_type = (volumeStatus->State ==
+ MPI_RAIDVOL0_STATUS_STATE_FAILED) ?
+ MPTSAS_DEL_RAID : MPTSAS_ADD_RAID;
+ break;
+ default:
+ break;
+ }
+ schedule_work(&ev->work);
+}
+
+/*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
+/* work queue thread to clear the persitency table */
+static void
+mptscsih_sas_persist_clear_table(void * arg)
+{
+ MPT_ADAPTER *ioc = (MPT_ADAPTER *)arg;
+
+ mptbase_sas_persist_operation(ioc, MPI_SAS_OP_CLEAR_NOT_PRESENT);
+}
+
static int
mptsas_event_process(MPT_ADAPTER *ioc, EventNotificationReply_t *reply)
{
+ int rc=1;
u8 event = le32_to_cpu(reply->Event) & 0xFF;
if (!ioc->sh)
- return 1;
+ goto out;
switch (event) {
case MPI_EVENT_SAS_DEVICE_STATUS_CHANGE:
mptscsih_send_sas_event(ioc,
(EVENT_DATA_SAS_DEVICE_STATUS_CHANGE *)reply->Data);
- return 1; /* currently means nothing really */
-
+ break;
+ case MPI_EVENT_INTEGRATED_RAID:
+ mptscsih_send_raid_event(ioc,
+ (EVENT_DATA_RAID *)reply->Data);
+ break;
+ case MPI_EVENT_PERSISTENT_TABLE_FULL:
+ INIT_WORK(&ioc->mptscsih_persistTask,
+ mptscsih_sas_persist_clear_table,
+ (void *)ioc);
+ schedule_work(&ioc->mptscsih_persistTask);
+ break;
default:
- return mptscsih_event_process(ioc, reply);
+ rc = mptscsih_event_process(ioc, reply);
+ break;
}
+ out:
+
+ return rc;
}
static int
static int mptscsih_tm_wait_for_completion(MPT_SCSI_HOST * hd, ulong timeout );
static u32 SCPNT_TO_LOOKUP_IDX(struct scsi_cmnd *sc);
-static int mptscsih_TMHandler(MPT_SCSI_HOST *hd, u8 type, u8 channel, u8 target, u8 lun, int ctx2abort, ulong timeout);
static int mptscsih_IssueTaskMgmt(MPT_SCSI_HOST *hd, u8 type, u8 channel, u8 target, u8 lun, int ctx2abort, ulong timeout);
int mptscsih_ioc_reset(MPT_ADAPTER *ioc, int post_reset);
int mptscsih_scandv_complete(MPT_ADAPTER *ioc, MPT_FRAME_HDR *mf, MPT_FRAME_HDR *r);
static int mptscsih_do_cmd(MPT_SCSI_HOST *hd, INTERNAL_CMD *iocmd);
static void mptscsih_synchronize_cache(MPT_SCSI_HOST *hd, VirtDevice *vdevice);
-static void mptscsih_negotiate_to_asyn_narrow(MPT_SCSI_HOST *hd, VirtTarget *vtarget);
+static void mptscsih_negotiate_to_asyn_narrow(MPT_SCSI_HOST *hd, VirtDevice *vdevice);
static int mptscsih_is_phys_disk(MPT_ADAPTER *ioc, int id);
-static struct work_struct mptscsih_persistTask;
-
#ifdef MPTSCSIH_ENABLE_DOMAIN_VALIDATION
static int mptscsih_do_raid(MPT_SCSI_HOST *hd, u8 action, INTERNAL_CMD *io);
static void mptscsih_domainValidation(void *hd);
MPT_SCSI_HOST *hd;
SCSIIORequest_t *pScsiReq;
SCSIIOReply_t *pScsiReply;
- u16 req_idx;
+ u16 req_idx, req_idx_MR;
hd = (MPT_SCSI_HOST *) ioc->sh->hostdata;
req_idx = le16_to_cpu(mf->u.frame.hwhdr.msgctxu.fld.req_idx);
+ req_idx_MR = (mr != NULL) ?
+ le16_to_cpu(mr->u.frame.hwhdr.msgctxu.fld.req_idx) : req_idx;
+ if ((req_idx != req_idx_MR) ||
+ (mf->u.frame.linkage.arg1 == 0xdeadbeaf)) {
+ printk(MYIOC_s_ERR_FMT "Received a mf that was already freed\n",
+ ioc->name);
+ printk (MYIOC_s_ERR_FMT
+ "req_idx=%x req_idx_MR=%x mf=%p mr=%p sc=%p\n",
+ ioc->name, req_idx, req_idx_MR, mf, mr,
+ hd->ScsiLookup[req_idx_MR]);
+ return 0;
+ }
+
sc = hd->ScsiLookup[req_idx];
if (sc == NULL) {
MPIHeader_t *hdr = (MPIHeader_t *)mf;
break;
+ case MPI_IOCSTATUS_SCSI_DATA_OVERRUN: /* 0x0044 */
+ sc->resid=0;
case MPI_IOCSTATUS_SCSI_RECOVERED_ERROR: /* 0x0040 */
case MPI_IOCSTATUS_SUCCESS: /* 0x0000 */
if (scsi_status == MPI_SCSI_STATUS_BUSY)
case MPI_IOCSTATUS_INSUFFICIENT_RESOURCES: /* 0x0006 */
case MPI_IOCSTATUS_INVALID_FIELD: /* 0x0007 */
case MPI_IOCSTATUS_INVALID_STATE: /* 0x0008 */
- case MPI_IOCSTATUS_SCSI_DATA_OVERRUN: /* 0x0044 */
case MPI_IOCSTATUS_SCSI_IO_DATA_ERROR: /* 0x0046 */
case MPI_IOCSTATUS_SCSI_TASK_MGMT_FAILED: /* 0x004A */
default:
*
* Returns 0 for SUCCESS or -1 if FAILED.
*/
-static int
+int
mptscsih_TMHandler(MPT_SCSI_HOST *hd, u8 type, u8 channel, u8 target, u8 lun, int ctx2abort, ulong timeout)
{
MPT_ADAPTER *ioc;
return retval;
}
+static int
+mptscsih_get_tm_timeout(MPT_ADAPTER *ioc)
+{
+ switch (ioc->bus_type) {
+ case FC:
+ return 40;
+ case SAS:
+ return 10;
+ case SPI:
+ default:
+ return 2;
+ }
+}
+
/*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
/**
* mptscsih_abort - Abort linux scsi_cmnd routine, new_eh variant
vdev = SCpnt->device->hostdata;
retval = mptscsih_TMHandler(hd, MPI_SCSITASKMGMT_TASKTYPE_ABORT_TASK,
vdev->bus_id, vdev->target_id, vdev->lun,
- ctx2abort, 2 /* 2 second timeout */);
+ ctx2abort, mptscsih_get_tm_timeout(ioc));
printk (KERN_WARNING MYNAM ": %s: task abort: %s (sc=%p)\n",
hd->ioc->name,
vdev = SCpnt->device->hostdata;
retval = mptscsih_TMHandler(hd, MPI_SCSITASKMGMT_TASKTYPE_TARGET_RESET,
vdev->bus_id, vdev->target_id,
- 0, 0, 5 /* 5 second timeout */);
+ 0, 0, mptscsih_get_tm_timeout(hd->ioc));
printk (KERN_WARNING MYNAM ": %s: target reset: %s (sc=%p)\n",
hd->ioc->name,
vdev = SCpnt->device->hostdata;
retval = mptscsih_TMHandler(hd, MPI_SCSITASKMGMT_TASKTYPE_RESET_BUS,
- vdev->bus_id, 0, 0, 0, 5 /* 5 second timeout */);
+ vdev->bus_id, 0, 0, 0, mptscsih_get_tm_timeout(hd->ioc));
printk (KERN_WARNING MYNAM ": %s: bus reset: %s (sc=%p)\n",
hd->ioc->name,
return status;
}
+/*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
+static void
+mptscsih_taskmgmt_response_code(MPT_ADAPTER *ioc, u8 response_code)
+{
+ char *desc;
+
+ switch (response_code) {
+ case MPI_SCSITASKMGMT_RSP_TM_COMPLETE:
+ desc = "The task completed.";
+ break;
+ case MPI_SCSITASKMGMT_RSP_INVALID_FRAME:
+ desc = "The IOC received an invalid frame status.";
+ break;
+ case MPI_SCSITASKMGMT_RSP_TM_NOT_SUPPORTED:
+ desc = "The task type is not supported.";
+ break;
+ case MPI_SCSITASKMGMT_RSP_TM_FAILED:
+ desc = "The requested task failed.";
+ break;
+ case MPI_SCSITASKMGMT_RSP_TM_SUCCEEDED:
+ desc = "The task completed successfully.";
+ break;
+ case MPI_SCSITASKMGMT_RSP_TM_INVALID_LUN:
+ desc = "The LUN request is invalid.";
+ break;
+ case MPI_SCSITASKMGMT_RSP_IO_QUEUED_ON_IOC:
+ desc = "The task is in the IOC queue and has not been sent to target.";
+ break;
+ default:
+ desc = "unknown";
+ break;
+ }
+ printk(MYIOC_s_INFO_FMT "Response Code(0x%08x): F/W: %s\n",
+ ioc->name, response_code, desc);
+}
+
/*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
/**
* mptscsih_taskmgmt_complete - Registered with Fusion MPT base driver
/* Figure out if this was ABORT_TASK, TARGET_RESET, or BUS_RESET! */
tmType = pScsiTmReq->TaskType;
+ if (ioc->facts.MsgVersion >= MPI_VERSION_01_05 &&
+ pScsiTmReply->ResponseCode)
+ mptscsih_taskmgmt_response_code(ioc,
+ pScsiTmReply->ResponseCode);
+
dtmprintk((MYIOC_s_WARN_FMT " TaskType = %d, TerminationCount=%d\n",
ioc->name, tmType, le32_to_cpu(pScsiTmReply->TerminationCount)));
DBG_DUMP_TM_REPLY_FRAME((u32 *)pScsiTmReply);
vtarget->luns[0] &= ~(1 << vdevice->lun);
vtarget->num_luns--;
if (vtarget->num_luns == 0) {
- mptscsih_negotiate_to_asyn_narrow(hd, vtarget);
+ mptscsih_negotiate_to_asyn_narrow(hd, vdevice);
if (hd->ioc->bus_type == SPI) {
if (mptscsih_is_phys_disk(hd->ioc, vtarget->target_id)) {
hd->ioc->spi_data.forceDv |= MPT_SCSICFG_RELOAD_IOC_PG3;
return 1; /* currently means nothing really */
}
-/*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
-/* work queue thread to clear the persitency table */
-static void
-mptscsih_sas_persist_clear_table(void * arg)
-{
- MPT_ADAPTER *ioc = (MPT_ADAPTER *)arg;
-
- mptbase_sas_persist_operation(ioc, MPI_SAS_OP_CLEAR_NOT_PRESENT);
-}
-
/*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
int
mptscsih_event_process(MPT_ADAPTER *ioc, EventNotificationReply_t *pEvReply)
break;
}
- /* Persistent table is full. */
- case MPI_EVENT_PERSISTENT_TABLE_FULL:
- INIT_WORK(&mptscsih_persistTask,
- mptscsih_sas_persist_clear_table,(void *)ioc);
- schedule_work(&mptscsih_persistTask);
- break;
-
case MPI_EVENT_NONE: /* 00 */
case MPI_EVENT_LOG_DATA: /* 01 */
case MPI_EVENT_STATE_CHANGE: /* 02 */
*
*/
static void
-mptscsih_negotiate_to_asyn_narrow(MPT_SCSI_HOST *hd, VirtTarget *vtarget)
+mptscsih_negotiate_to_asyn_narrow(MPT_SCSI_HOST *hd, VirtDevice *vdevice)
{
+ VirtTarget *vtarget = vdevice->vtarget;
MPT_ADAPTER *ioc= hd->ioc;
SCSIDevicePage1_t *pcfg1Data;
CONFIGPARMS cfg;
int requested, configuration, data,i;
u8 flags, factor;
- if (ioc->bus_type != SPI)
+ if ((ioc->bus_type != SPI) ||
+ (!vdevice->configured_lun))
return;
if (!ioc->spi_data.sdp1length)
}
mptscsih_setDevicePage1Flags(0, MPT_ASYNC, 0, &requested,
&configuration, flags);
- dnegoprintk(("syncronize cache: id=%d width=0 factor=MPT_ASYNC "
+ dnegoprintk(("nego asyn narrow: id=%d width=0 factor=MPT_ASYNC "
"offset=0 negoFlags=%x request=%x config=%x\n",
id, flags, requested, configuration));
pcfg1Data->RequestedParameters = cpu_to_le32(requested);
flags = vtarget->negoFlags;
mptscsih_setDevicePage1Flags(0, MPT_ASYNC, 0, &requested,
&configuration, flags);
- dnegoprintk(("syncronize cache: id=%d width=0 factor=MPT_ASYNC "
+ dnegoprintk(("nego asyn narrow: id=%d width=0 factor=MPT_ASYNC "
"offset=0 negoFlags=%x request=%x config=%x\n",
vtarget->target_id, flags, requested, configuration));
pcfg1Data->RequestedParameters = cpu_to_le32(requested);
EXPORT_SYMBOL(mptscsih_ioc_reset);
EXPORT_SYMBOL(mptscsih_change_queue_depth);
EXPORT_SYMBOL(mptscsih_timer_expired);
+EXPORT_SYMBOL(mptscsih_TMHandler);
/*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
extern int mptscsih_ioc_reset(MPT_ADAPTER *ioc, int post_reset);
extern int mptscsih_change_queue_depth(struct scsi_device *sdev, int qdepth);
extern void mptscsih_timer_expired(unsigned long data);
+extern int mptscsih_TMHandler(MPT_SCSI_HOST *hd, u8 type, u8 channel, u8 target, u8 lun, int ctx2abort, ulong timeout);
goto out_mptspi_probe;
}
+ /*
+ * issue internal bus reset
+ */
+ if (ioc->spi_data.bus_reset)
+ mptscsih_TMHandler(hd,
+ MPI_SCSITASKMGMT_TASKTYPE_RESET_BUS,
+ 0, 0, 0, 0, 5);
+
scsi_scan_host(sh);
return 0;
mptspi_exit(void)
{
pci_unregister_driver(&mptspi_driver);
-
+
mpt_reset_deregister(mptspiDoneCtx);
dprintk((KERN_INFO MYNAM
": Deregistered for IOC reset notifications\n"));
memset(&uport, 0, sizeof(struct uart_port));
uport.irq = sp->irq;
uport.uartclk = 3686400;
- uport.flags = UPF_AUTOPROBE | UPF_SHARE_IRQ;
+ uport.flags = UPF_SHARE_IRQ;
uport.iotype = UPIO_MEM;
uport.membase = iomem_base;
config MTD_GEN_PROBE
tristate
+ select OBSOLETE_INTERMODULE
config MTD_CFI_ADV_OPTIONS
bool "Flash chip driver advanced configuration options"
with this driver will return -ENODEV upon access.
config MTD_OBSOLETE_CHIPS
- depends on MTD && BROKEN
+ depends on MTD
bool "Older (theoretically obsoleted now) drivers for non-CFI chips"
help
This option does not enable any code directly, but will allow you to
config MTD_AMDSTD
tristate "AMD compatible flash chip support (non-CFI)"
- depends on MTD && MTD_OBSOLETE_CHIPS
+ depends on MTD && MTD_OBSOLETE_CHIPS && BROKEN
help
This option enables support for flash chips using AMD-compatible
commands, including some which are not CFI-compatible and hence
config MTD_JEDEC
tristate "JEDEC device support"
- depends on MTD && MTD_OBSOLETE_CHIPS
+ depends on MTD && MTD_OBSOLETE_CHIPS && BROKEN
help
Enable older older JEDEC flash interface devices for self
programming flash. It is commonly used in older AMD chips. It is
config MTD_DOCPROBE
tristate
select MTD_DOCECC
+ select OBSOLETE_INTERMODULE
config MTD_DOCECC
tristate
config NETDEVICES
depends on NET
+ default y if UML
bool "Network device support"
---help---
You can say N here if you don't intend to connect your Linux box to
If in doubt, say N.
+config E1000_DISABLE_PACKET_SPLIT
+ bool "Disable Packet Split for PCI express adapters"
+ depends on E1000
+ help
+ Say Y here if you want to use the legacy receive path for PCI express
+ hadware.
+
+ If in doubt, say N.
+
source "drivers/net/ixp2000/Kconfig"
config MYRI_SBUS
It does not support the link failover and network management
features that "portable" vendor supplied sk98lin driver does.
+ This driver supports adapters based on the original Yukon chipset:
+ Marvell 88E8001, Belkin F5D5005, CNet GigaCard, DLink DGE-530T,
+ Linksys EG1032/EG1064, 3Com 3C940/3C940B, SysKonnect SK-9871/9872.
+
+ It does not support the newer Yukon2 chipset: a separate driver,
+ sky2, is provided for Yukon2-based adapters.
+
+ To compile this driver as a module, choose M here: the module
+ will be called skge. This is recommended.
config SKY2
tristate "SysKonnect Yukon2 support (EXPERIMENTAL)"
depends on PCI && EXPERIMENTAL
select CRC32
---help---
- This driver support the Marvell Yukon 2 Gigabit Ethernet adapter.
+ This driver supports Gigabit Ethernet adapters based on the the
+ Marvell Yukon 2 chipset:
+ Marvell 88E8021/88E8022/88E8035/88E8036/88E8038/88E8050/88E8052/
+ 88E8053/88E8055/88E8061/88E8062, SysKonnect SK-9E21D/SK-9S21
+
+ This driver does not support the original Yukon chipset: a seperate
+ driver, skge, is provided for Yukon-based adapters.
To compile this driver as a module, choose M here: the module
will be called sky2. This is recommended.
depends on PCI
---help---
Say Y here if you have a Marvell Yukon or SysKonnect SK-98xx/SK-95xx
- compliant Gigabit Ethernet Adapter. The following adapters are supported
- by this driver:
+ compliant Gigabit Ethernet Adapter.
+
+ This driver supports the original Yukon chipset. A cleaner driver is
+ also available (skge) which seems to work better than this one.
+
+ This driver does not support the newer Yukon2 chipset. A seperate
+ driver, sky2, is provided to support Yukon2-based adapters.
+
+ The following adapters are supported by this driver:
- 3Com 3C940 Gigabit LOM Ethernet Adapter
- 3Com 3C941 Gigabit LOM Ethernet Adapter
- Allied Telesyn AT-2970LX Gigabit Ethernet Adapter
mac1 = 0;
for(i = 0; i < 4; i++) {
+ int tmp;
+
mac1 = mac1 << 8;
tmp = read_eeprom_byte(dev, 0x8c+i);
if (tmp < 0) {
}
mac2 = 0;
for(i = 4; i < 8; i++) {
+ int tmp;
+
mac2 = mac2 << 8;
tmp = read_eeprom_byte(dev, 0x8c+i);
if (tmp < 0) {
b44_init_rings(bp);
b44_init_hw(bp);
- netif_carrier_off(dev);
b44_check_phy(bp);
err = request_irq(dev->irq, b44_interrupt, SA_SHIRQ, dev->name, dev);
#endif
b44_halt(bp);
b44_free_rings(bp);
- netif_carrier_off(bp->dev);
+ netif_carrier_off(dev);
spin_unlock_irq(&bp->lock);
dev->irq = pdev->irq;
SET_ETHTOOL_OPS(dev, &b44_ethtool_ops);
+ netif_carrier_off(dev);
+
err = b44_get_invariants(bp);
if (err) {
printk(KERN_ERR PFX "Problem fetching invariants of chip, "
/* Setup paramaters for syncing RX/TX DMA descriptors */
dma_desc_align_mask = ~(dma_desc_align_size - 1);
- dma_desc_sync_size = max(dma_desc_align_size, sizeof(struct dma_desc));
+ dma_desc_sync_size = max_t(unsigned int, dma_desc_align_size, sizeof(struct dma_desc));
return pci_module_init(&b44_driver);
}
slave->duplex = DUPLEX_FULL;
if (slave_dev->ethtool_ops) {
- u32 res;
+ int res;
if (!slave_dev->ethtool_ops->get_settings) {
return -1;
cas_disable_irq(cp, i);
}
+static inline void cas_buffer_init(cas_page_t *cp)
+{
+ struct page *page = cp->buffer;
+ atomic_set((atomic_t *)&page->lru.next, 1);
+}
+
+static inline int cas_buffer_count(cas_page_t *cp)
+{
+ struct page *page = cp->buffer;
+ return atomic_read((atomic_t *)&page->lru.next);
+}
+
+static inline void cas_buffer_inc(cas_page_t *cp)
+{
+ struct page *page = cp->buffer;
+ atomic_inc((atomic_t *)&page->lru.next);
+}
+
+static inline void cas_buffer_dec(cas_page_t *cp)
+{
+ struct page *page = cp->buffer;
+ atomic_dec((atomic_t *)&page->lru.next);
+}
+
static void cas_enable_irq(struct cas *cp, const int ring)
{
if (ring == 0) { /* all but TX_DONE */
{
pci_unmap_page(cp->pdev, page->dma_addr, cp->page_size,
PCI_DMA_FROMDEVICE);
+ cas_buffer_dec(page);
__free_pages(page->buffer, cp->page_order);
kfree(page);
return 0;
page->buffer = alloc_pages(flags, cp->page_order);
if (!page->buffer)
goto page_err;
+ cas_buffer_init(page);
page->dma_addr = pci_map_page(cp->pdev, page->buffer, 0,
cp->page_size, PCI_DMA_FROMDEVICE);
return page;
list_for_each_safe(elem, tmp, &list) {
cas_page_t *page = list_entry(elem, cas_page_t, list);
- if (page_count(page->buffer) > 1)
+ if (cas_buffer_count(page) > 1)
continue;
list_del(elem);
cas_page_t *page = cp->rx_pages[1][index];
cas_page_t *new;
- if (page_count(page->buffer) == 1)
+ if (cas_buffer_count(page) == 1)
return page;
new = cas_page_dequeue(cp);
cas_page_t **page1 = cp->rx_pages[1];
/* swap if buffer is in use */
- if (page_count(page0[index]->buffer) > 1) {
+ if (cas_buffer_count(page0[index]) > 1) {
cas_page_t *new = cas_page_spare(cp, index);
if (new) {
page1[index] = page0[index];
u64 compwb = le64_to_cpu(cp->init_block->tx_compwb);
#endif
if (netif_msg_intr(cp))
- printk(KERN_DEBUG "%s: tx interrupt, status: 0x%x, %lx\n",
- cp->dev->name, status, compwb);
+ printk(KERN_DEBUG "%s: tx interrupt, status: 0x%x, %llx\n",
+ cp->dev->name, status, (unsigned long long)compwb);
/* process all the rings */
for (ring = 0; ring < N_TX_RINGS; ring++) {
#ifdef USE_TX_COMPWB
skb->len += hlen - swivel;
get_page(page->buffer);
+ cas_buffer_inc(page);
frag->page = page->buffer;
frag->page_offset = off;
frag->size = hlen - swivel;
frag++;
get_page(page->buffer);
+ cas_buffer_inc(page);
frag->page = page->buffer;
frag->page_offset = 0;
frag->size = hlen;
released = 0;
while (entry != last) {
/* make a new buffer if it's still in use */
- if (page_count(page[entry]->buffer) > 1) {
+ if (cas_buffer_count(page[entry]) > 1) {
cas_page_t *new = cas_page_dequeue(cp);
if (!new) {
/* let the timer know that we need to
Deepak Saxena : dsaxena@plexity.net
: Intel IXDP2351 platform support
+ Dmitry Pervushin : dpervushin@ru.mvista.com
+ : PNX010X platform support
+
*/
/* Always include 'config.h' first in case the user wants to turn on
/*******************************************************************************
-
+
Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
-
- This program is free software; you can redistribute it and/or modify it
- under the terms of the GNU General Public License as published by the Free
- Software Foundation; either version 2 of the License, or (at your option)
+
+ This program is free software; you can redistribute it and/or modify it
+ under the terms of the GNU General Public License as published by the Free
+ Software Foundation; either version 2 of the License, or (at your option)
any later version.
-
- This program is distributed in the hope that it will be useful, but WITHOUT
- ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+
+ This program is distributed in the hope that it will be useful, but WITHOUT
+ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
more details.
-
+
You should have received a copy of the GNU General Public License along with
- this program; if not, write to the Free Software Foundation, Inc., 59
+ this program; if not, write to the Free Software Foundation, Inc., 59
Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
+
The full GNU General Public License is included in this distribution in the
file called LICENSE.
-
+
Contact Information:
Linux NICS <linux.nics@intel.com>
Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
#define DRV_NAME "e100"
#define DRV_EXT "-NAPI"
-#define DRV_VERSION "3.4.14-k4"DRV_EXT
+#define DRV_VERSION "3.5.10-k2"DRV_EXT
#define DRV_DESCRIPTION "Intel(R) PRO/100 Network Driver"
#define DRV_COPYRIGHT "Copyright(c) 1999-2005 Intel Corporation"
#define PFX DRV_NAME ": "
cuc_dump_complete = 0x0000A005,
cuc_dump_reset_complete = 0x0000A007,
};
-
+
enum port {
software_reset = 0x0000,
selftest = 0x0001,
ctrl = (cmd_addr_data & (1 << i)) ? eecs | eedi : eecs;
writeb(ctrl, &nic->csr->eeprom_ctrl_lo);
e100_write_flush(nic); udelay(4);
-
+
writeb(ctrl | eesk, &nic->csr->eeprom_ctrl_lo);
e100_write_flush(nic); udelay(4);
-
+
/* Eeprom drives a dummy zero to EEDO after receiving
* complete address. Use this to adjust addr_len. */
ctrl = readb(&nic->csr->eeprom_ctrl_lo);
*addr_len -= (i - 16);
i = 17;
}
-
+
data = (data << 1) | (ctrl & eedo ? 1 : 0);
}
0x00000000, 0x00000000, 0x00000000, 0x00000000, \
}
-static void e100_load_ucode(struct nic *nic, struct cb *cb, struct sk_buff *skb)
+static void e100_setup_ucode(struct nic *nic, struct cb *cb, struct sk_buff *skb)
{
/* *INDENT-OFF* */
static struct {
* driver can change the algorithm.
*
* INTDELAY - This loads the dead-man timer with its inital value.
-* When this timer expires the interrupt is asserted, and the
+* When this timer expires the interrupt is asserted, and the
* timer is reset each time a new packet is received. (see
* BUNDLEMAX below to set the limit on number of chained packets)
* The current default is 0x600 or 1536. Experiments show that
* the value should probably stay within the 0x200 - 0x1000.
*
-* BUNDLEMAX -
+* BUNDLEMAX -
* This sets the maximum number of frames that will be bundled. In
* some situations, such as the TCP windowing algorithm, it may be
* better to limit the growth of the bundle size than let it go as
* an interrupt for every frame received. If you do not want to put
* a limit on the bundle size, set this value to xFFFF.
*
-* BUNDLESMALL -
+* BUNDLESMALL -
* This contains a bit-mask describing the minimum size frame that
* will be bundled. The default masks the lower 7 bits, which means
* that any frame less than 128 bytes in length will not be bundled,
*
* The current default is 0xFF80, which masks out the lower 7 bits.
* This means that any frame which is x7F (127) bytes or smaller
-* will cause an immediate interrupt. Because this value must be a
+* will cause an immediate interrupt. Because this value must be a
* bit mask, there are only a few valid values that can be used. To
* turn this feature off, the driver can write the value xFFFF to the
* lower word of this instruction (in the same way that the other
* standard Ethernet frames are <= 2047 bytes in length.
*************************************************************************/
-/* if you wish to disable the ucode functionality, while maintaining the
+/* if you wish to disable the ucode functionality, while maintaining the
* workarounds it provides, set the following defines to:
* BUNDLESMALL 0
* BUNDLEMAX 1
for (i = 0; i < UCODE_SIZE; i++)
cb->u.ucode[i] = cpu_to_le32(ucode[i]);
- cb->command = cpu_to_le16(cb_ucode);
+ cb->command = cpu_to_le16(cb_ucode | cb_el);
return;
}
noloaducode:
- cb->command = cpu_to_le16(cb_nop);
+ cb->command = cpu_to_le16(cb_nop | cb_el);
+}
+
+static inline int e100_exec_cb_wait(struct nic *nic, struct sk_buff *skb,
+ void (*cb_prepare)(struct nic *, struct cb *, struct sk_buff *))
+{
+ int err = 0, counter = 50;
+ struct cb *cb = nic->cb_to_clean;
+
+ if ((err = e100_exec_cb(nic, NULL, e100_setup_ucode)))
+ DPRINTK(PROBE,ERR, "ucode cmd failed with error %d\n", err);
+
+ /* must restart cuc */
+ nic->cuc_cmd = cuc_start;
+
+ /* wait for completion */
+ e100_write_flush(nic);
+ udelay(10);
+
+ /* wait for possibly (ouch) 500ms */
+ while (!(cb->status & cpu_to_le16(cb_complete))) {
+ msleep(10);
+ if (!--counter) break;
+ }
+
+ /* ack any interupts, something could have been set */
+ writeb(~0, &nic->csr->scb.stat_ack);
+
+ /* if the command failed, or is not OK, notify and return */
+ if (!counter || !(cb->status & cpu_to_le16(cb_ok))) {
+ DPRINTK(PROBE,ERR, "ucode load failed\n");
+ err = -EPERM;
+ }
+
+ return err;
}
static void e100_setup_iaaddr(struct nic *nic, struct cb *cb,
mdio_write(netdev, nic->mii.phy_id, MII_NSC_CONG, cong);
}
- if((nic->mac >= mac_82550_D102) || ((nic->flags & ich) &&
+ if((nic->mac >= mac_82550_D102) || ((nic->flags & ich) &&
(mdio_read(netdev, nic->mii.phy_id, MII_TPISTATUS) & 0x8000))) {
/* enable/disable MDI/MDI-X auto-switching.
MDI/MDI-X auto-switching is disabled for 82551ER/QM chips */
if((nic->mac == mac_82551_E) || (nic->mac == mac_82551_F) ||
- (nic->mac == mac_82551_10) || (nic->mii.force_media) ||
- !(nic->eeprom[eeprom_cnfg_mdix] & eeprom_mdix_enabled))
+ (nic->mac == mac_82551_10) || (nic->mii.force_media) ||
+ !(nic->eeprom[eeprom_cnfg_mdix] & eeprom_mdix_enabled))
mdio_write(netdev, nic->mii.phy_id, MII_NCONFIG, 0);
else
mdio_write(netdev, nic->mii.phy_id, MII_NCONFIG, NCONFIG_AUTO_SWITCH);
return err;
if((err = e100_exec_cmd(nic, ruc_load_base, 0)))
return err;
- if((err = e100_exec_cb(nic, NULL, e100_load_ucode)))
+ if ((err = e100_exec_cb_wait(nic, NULL, e100_setup_ucode)))
return err;
if((err = e100_exec_cb(nic, NULL, e100_configure)))
return err;
}
}
-
+
if(e100_exec_cmd(nic, cuc_dump_reset, 0))
DPRINTK(TX_ERR, DEBUG, "exec cuc_dump_reset failed\n");
}
mii_check_link(&nic->mii);
/* Software generated interrupt to recover from (rare) Rx
- * allocation failure.
- * Unfortunately have to use a spinlock to not re-enable interrupts
- * accidentally, due to hardware that shares a register between the
- * interrupt mask bit and the SW Interrupt generation bit */
+ * allocation failure.
+ * Unfortunately have to use a spinlock to not re-enable interrupts
+ * accidentally, due to hardware that shares a register between the
+ * interrupt mask bit and the SW Interrupt generation bit */
spin_lock_irq(&nic->cmd_lock);
writeb(readb(&nic->csr->scb.cmd_hi) | irq_sw_gen,&nic->csr->scb.cmd_hi);
spin_unlock_irq(&nic->cmd_lock);
struct rx *rx_to_start = NULL;
/* are we already rnr? then pay attention!!! this ensures that
- * the state machine progression never allows a start with a
+ * the state machine progression never allows a start with a
* partially cleaned list, avoiding a race between hardware
* and rx_to_clean when in NAPI mode */
if(RU_SUSPENDED == nic->ru_running)
{
struct nic *nic = netdev_priv(netdev);
- /* Reset outside of interrupt context, to avoid request_irq
+ /* Reset outside of interrupt context, to avoid request_irq
* in interrupt context */
schedule_work(&nic->tx_timeout_task);
}
struct param_range *rfds = &nic->params.rfds;
struct param_range *cbs = &nic->params.cbs;
- if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending))
+ if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending))
return -EINVAL;
if(netif_running(netdev))
nic->flags |= wol_magic;
/* ack any pending wake events, disable PME */
- pci_enable_wake(pdev, 0, 0);
+ err = pci_enable_wake(pdev, 0, 0);
+ if (err)
+ DPRINTK(PROBE, ERR, "Error clearing wake event\n");
strcpy(netdev->name, "eth%d");
if((err = register_netdev(netdev))) {
{
struct net_device *netdev = pci_get_drvdata(pdev);
struct nic *nic = netdev_priv(netdev);
+ int retval;
if(netif_running(netdev))
e100_down(nic);
netif_device_detach(netdev);
pci_save_state(pdev);
- pci_enable_wake(pdev, pci_choose_state(pdev, state), nic->flags & (wol_magic | e100_asf(nic)));
+ retval = pci_enable_wake(pdev, pci_choose_state(pdev, state),
+ nic->flags & (wol_magic | e100_asf(nic)));
+ if (retval)
+ DPRINTK(PROBE,ERR, "Error enabling wake\n");
pci_disable_device(pdev);
- pci_set_power_state(pdev, pci_choose_state(pdev, state));
+ retval = pci_set_power_state(pdev, pci_choose_state(pdev, state));
+ if (retval)
+ DPRINTK(PROBE,ERR, "Error %d setting power state\n", retval);
return 0;
}
{
struct net_device *netdev = pci_get_drvdata(pdev);
struct nic *nic = netdev_priv(netdev);
+ int retval;
- pci_set_power_state(pdev, PCI_D0);
+ retval = pci_set_power_state(pdev, PCI_D0);
+ if (retval)
+ DPRINTK(PROBE,ERR, "Error waking adapter\n");
pci_restore_state(pdev);
/* ack any pending wake events, disable PME */
- pci_enable_wake(pdev, 0, 0);
+ retval = pci_enable_wake(pdev, 0, 0);
+ if (retval)
+ DPRINTK(PROBE,ERR, "Error clearing wake events\n");
if(e100_hw_init(nic))
DPRINTK(HW, ERR, "e100_hw_init failed\n");
{
struct net_device *netdev = pci_get_drvdata(pdev);
struct nic *nic = netdev_priv(netdev);
+ int retval;
#ifdef CONFIG_PM
- pci_enable_wake(pdev, 0, nic->flags & (wol_magic | e100_asf(nic)));
+ retval = pci_enable_wake(pdev, 0, nic->flags & (wol_magic | e100_asf(nic)));
#else
- pci_enable_wake(pdev, 0, nic->flags & (wol_magic));
+ retval = pci_enable_wake(pdev, 0, nic->flags & (wol_magic));
#endif
+ if (retval)
+ DPRINTK(PROBE,ERR, "Error enabling wake\n");
}
.suspend = e100_suspend,
.resume = e100_resume,
#endif
- .shutdown = e100_shutdown,
+ .shutdown = e100_shutdown,
};
static int __init e100_init_module(void)
#include <linux/mii.h>
#include <linux/ethtool.h>
#include <linux/if_vlan.h>
-#ifdef CONFIG_E1000_MQ
-#include <linux/cpu.h>
-#include <linux/smp.h>
-#endif
#define BAR_0 0
#define BAR_1 1
struct e1000_adapter;
#include "e1000_hw.h"
+#ifdef CONFIG_E1000_MQ
+#include <linux/cpu.h>
+#include <linux/smp.h>
+#endif
#ifdef DBG
#define E1000_DBG(args...) printk(KERN_DEBUG "e1000: " args)
uint16_t next_to_watch;
};
+#ifdef CONFIG_E1000_MQ
+struct e1000_queue_stats {
+ uint64_t packets;
+ uint64_t bytes;
+};
+#endif
+
struct e1000_ps_page { struct page *ps_page[PS_PAGE_BUFFERS]; };
struct e1000_ps_page_dma { uint64_t ps_page_dma[PS_PAGE_BUFFERS]; };
spinlock_t tx_lock;
uint16_t tdh;
uint16_t tdt;
- uint64_t pkt;
boolean_t last_tx_tso;
+#ifdef CONFIG_E1000_MQ
+ struct e1000_queue_stats tx_stats;
+#endif
};
struct e1000_rx_ring {
struct e1000_ps_page *ps_page;
struct e1000_ps_page_dma *ps_page_dma;
+ struct sk_buff *rx_skb_top;
+ struct sk_buff *rx_skb_prev;
+
+ /* cpu for rx queue */
+ int cpu;
+
uint16_t rdh;
uint16_t rdt;
- uint64_t pkt;
+#ifdef CONFIG_E1000_MQ
+ struct e1000_queue_stats rx_stats;
+#endif
};
#define E1000_DESC_UNUSED(R) \
uint16_t link_speed;
uint16_t link_duplex;
spinlock_t stats_lock;
+#ifdef CONFIG_E1000_NAPI
+ spinlock_t tx_queue_lock;
+#endif
atomic_t irq_sem;
struct work_struct tx_timeout_task;
struct work_struct watchdog_task;
#ifdef CONFIG_E1000_MQ
struct e1000_tx_ring **cpu_tx_ring; /* per-cpu */
#endif
+ unsigned long tx_queue_len;
uint32_t txd_cmd;
uint32_t tx_int_delay;
uint32_t tx_abs_int_delay;
uint64_t gotcl_old;
uint64_t tpt_old;
uint64_t colc_old;
+ uint32_t tx_timeout_count;
uint32_t tx_fifo_head;
uint32_t tx_head_addr;
uint32_t tx_fifo_size;
+ uint8_t tx_timeout_factor;
atomic_t tx_fifo_stall;
boolean_t pcix_82544;
boolean_t detect_tx_hung;
/* RX */
#ifdef CONFIG_E1000_NAPI
boolean_t (*clean_rx) (struct e1000_adapter *adapter,
- struct e1000_rx_ring *rx_ring,
- int *work_done, int work_to_do);
+ struct e1000_rx_ring *rx_ring,
+ int *work_done, int work_to_do);
#else
boolean_t (*clean_rx) (struct e1000_adapter *adapter,
- struct e1000_rx_ring *rx_ring);
+ struct e1000_rx_ring *rx_ring);
#endif
void (*alloc_rx_buf) (struct e1000_adapter *adapter,
- struct e1000_rx_ring *rx_ring);
+ struct e1000_rx_ring *rx_ring,
+ int cleaned_count);
struct e1000_rx_ring *rx_ring; /* One per active queue */
#ifdef CONFIG_E1000_NAPI
struct net_device *polling_netdev; /* One per active queue */
#ifdef CONFIG_E1000_MQ
struct net_device **cpu_netdev; /* per-cpu */
struct call_async_data_struct rx_sched_call_data;
- int cpu_for_queue[4];
+ cpumask_t cpumask;
#endif
- int num_queues;
+ int num_tx_queues;
+ int num_rx_queues;
uint64_t hw_csum_err;
uint64_t hw_csum_good;
uint64_t rx_hdr_split;
+ uint32_t alloc_rx_buff_failed;
uint32_t rx_int_delay;
uint32_t rx_abs_int_delay;
boolean_t rx_csum;
struct e1000_rx_ring test_rx_ring;
+ u32 *config_space;
int msg_enable;
#ifdef CONFIG_PCI_MSI
boolean_t have_msi;
{ "tx_deferred_ok", E1000_STAT(stats.dc) },
{ "tx_single_coll_ok", E1000_STAT(stats.scc) },
{ "tx_multi_coll_ok", E1000_STAT(stats.mcc) },
+ { "tx_timeout_count", E1000_STAT(tx_timeout_count) },
{ "rx_long_length_errors", E1000_STAT(stats.roc) },
{ "rx_short_length_errors", E1000_STAT(stats.ruc) },
{ "rx_align_errors", E1000_STAT(stats.algnerrc) },
{ "rx_csum_offload_good", E1000_STAT(hw_csum_good) },
{ "rx_csum_offload_errors", E1000_STAT(hw_csum_err) },
{ "rx_header_split", E1000_STAT(rx_hdr_split) },
+ { "alloc_rx_buff_failed", E1000_STAT(alloc_rx_buff_failed) },
};
-#define E1000_STATS_LEN \
+
+#ifdef CONFIG_E1000_MQ
+#define E1000_QUEUE_STATS_LEN \
+ (((struct e1000_adapter *)netdev->priv)->num_tx_queues + \
+ ((struct e1000_adapter *)netdev->priv)->num_rx_queues) \
+ * (sizeof(struct e1000_queue_stats) / sizeof(uint64_t))
+#else
+#define E1000_QUEUE_STATS_LEN 0
+#endif
+#define E1000_GLOBAL_STATS_LEN \
sizeof(e1000_gstrings_stats) / sizeof(struct e1000_stats)
+#define E1000_STATS_LEN (E1000_GLOBAL_STATS_LEN + E1000_QUEUE_STATS_LEN)
static const char e1000_gstrings_test[][ETH_GSTRING_LEN] = {
"Register test (offline)", "Eeprom test (offline)",
"Interrupt test (offline)", "Loopback test (offline)",
struct e1000_adapter *adapter = netdev_priv(netdev);
struct e1000_hw *hw = &adapter->hw;
- if(hw->media_type == e1000_media_type_copper) {
+ if (hw->media_type == e1000_media_type_copper) {
ecmd->supported = (SUPPORTED_10baseT_Half |
SUPPORTED_10baseT_Full |
ecmd->advertising = ADVERTISED_TP;
- if(hw->autoneg == 1) {
+ if (hw->autoneg == 1) {
ecmd->advertising |= ADVERTISED_Autoneg;
/* the e1000 autoneg seems to match ethtool nicely */
ecmd->port = PORT_TP;
ecmd->phy_address = hw->phy_addr;
- if(hw->mac_type == e1000_82543)
+ if (hw->mac_type == e1000_82543)
ecmd->transceiver = XCVR_EXTERNAL;
else
ecmd->transceiver = XCVR_INTERNAL;
ecmd->port = PORT_FIBRE;
- if(hw->mac_type >= e1000_82545)
+ if (hw->mac_type >= e1000_82545)
ecmd->transceiver = XCVR_INTERNAL;
else
ecmd->transceiver = XCVR_EXTERNAL;
}
- if(netif_carrier_ok(adapter->netdev)) {
+ if (netif_carrier_ok(adapter->netdev)) {
e1000_get_speed_and_duplex(hw, &adapter->link_speed,
&adapter->link_duplex);
/* unfortunatly FULL_DUPLEX != DUPLEX_FULL
* and HALF_DUPLEX != DUPLEX_HALF */
- if(adapter->link_duplex == FULL_DUPLEX)
+ if (adapter->link_duplex == FULL_DUPLEX)
ecmd->duplex = DUPLEX_FULL;
else
ecmd->duplex = DUPLEX_HALF;
struct e1000_adapter *adapter = netdev_priv(netdev);
struct e1000_hw *hw = &adapter->hw;
- if(ecmd->autoneg == AUTONEG_ENABLE) {
+ /* When SoL/IDER sessions are active, autoneg/speed/duplex
+ * cannot be changed */
+ if (e1000_check_phy_reset_block(hw)) {
+ DPRINTK(DRV, ERR, "Cannot change link characteristics "
+ "when SoL/IDER is active.\n");
+ return -EINVAL;
+ }
+
+ if (ecmd->autoneg == AUTONEG_ENABLE) {
hw->autoneg = 1;
- if(hw->media_type == e1000_media_type_fiber)
+ if (hw->media_type == e1000_media_type_fiber)
hw->autoneg_advertised = ADVERTISED_1000baseT_Full |
ADVERTISED_FIBRE |
ADVERTISED_Autoneg;
- else
+ else
hw->autoneg_advertised = ADVERTISED_10baseT_Half |
ADVERTISED_10baseT_Full |
ADVERTISED_100baseT_Half |
ADVERTISED_TP;
ecmd->advertising = hw->autoneg_advertised;
} else
- if(e1000_set_spd_dplx(adapter, ecmd->speed + ecmd->duplex))
+ if (e1000_set_spd_dplx(adapter, ecmd->speed + ecmd->duplex))
return -EINVAL;
/* reset the link */
- if(netif_running(adapter->netdev)) {
+ if (netif_running(adapter->netdev)) {
e1000_down(adapter);
e1000_reset(adapter);
e1000_up(adapter);
struct e1000_adapter *adapter = netdev_priv(netdev);
struct e1000_hw *hw = &adapter->hw;
- pause->autoneg =
+ pause->autoneg =
(adapter->fc_autoneg ? AUTONEG_ENABLE : AUTONEG_DISABLE);
-
- if(hw->fc == e1000_fc_rx_pause)
+
+ if (hw->fc == e1000_fc_rx_pause)
pause->rx_pause = 1;
- else if(hw->fc == e1000_fc_tx_pause)
+ else if (hw->fc == e1000_fc_tx_pause)
pause->tx_pause = 1;
- else if(hw->fc == e1000_fc_full) {
+ else if (hw->fc == e1000_fc_full) {
pause->rx_pause = 1;
pause->tx_pause = 1;
}
{
struct e1000_adapter *adapter = netdev_priv(netdev);
struct e1000_hw *hw = &adapter->hw;
-
+
adapter->fc_autoneg = pause->autoneg;
- if(pause->rx_pause && pause->tx_pause)
+ if (pause->rx_pause && pause->tx_pause)
hw->fc = e1000_fc_full;
- else if(pause->rx_pause && !pause->tx_pause)
+ else if (pause->rx_pause && !pause->tx_pause)
hw->fc = e1000_fc_rx_pause;
- else if(!pause->rx_pause && pause->tx_pause)
+ else if (!pause->rx_pause && pause->tx_pause)
hw->fc = e1000_fc_tx_pause;
- else if(!pause->rx_pause && !pause->tx_pause)
+ else if (!pause->rx_pause && !pause->tx_pause)
hw->fc = e1000_fc_none;
hw->original_fc = hw->fc;
- if(adapter->fc_autoneg == AUTONEG_ENABLE) {
- if(netif_running(adapter->netdev)) {
+ if (adapter->fc_autoneg == AUTONEG_ENABLE) {
+ if (netif_running(adapter->netdev)) {
e1000_down(adapter);
e1000_up(adapter);
} else
e1000_reset(adapter);
- }
- else
+ } else
return ((hw->media_type == e1000_media_type_fiber) ?
e1000_setup_link(hw) : e1000_force_mac_fc(hw));
-
+
return 0;
}
struct e1000_adapter *adapter = netdev_priv(netdev);
adapter->rx_csum = data;
- if(netif_running(netdev)) {
+ if (netif_running(netdev)) {
e1000_down(adapter);
e1000_up(adapter);
} else
e1000_reset(adapter);
return 0;
}
-
+
static uint32_t
e1000_get_tx_csum(struct net_device *netdev)
{
{
struct e1000_adapter *adapter = netdev_priv(netdev);
- if(adapter->hw.mac_type < e1000_82543) {
+ if (adapter->hw.mac_type < e1000_82543) {
if (!data)
return -EINVAL;
return 0;
e1000_set_tso(struct net_device *netdev, uint32_t data)
{
struct e1000_adapter *adapter = netdev_priv(netdev);
- if((adapter->hw.mac_type < e1000_82544) ||
- (adapter->hw.mac_type == e1000_82547))
+ if ((adapter->hw.mac_type < e1000_82544) ||
+ (adapter->hw.mac_type == e1000_82547))
return data ? -EINVAL : 0;
if (data)
else
netdev->features &= ~NETIF_F_TSO;
return 0;
-}
+}
#endif /* NETIF_F_TSO */
static uint32_t
adapter->msg_enable = data;
}
-static int
+static int
e1000_get_regs_len(struct net_device *netdev)
{
#define E1000_REGS_LEN 32
regs_buff[11] = E1000_READ_REG(hw, TIDV);
regs_buff[12] = adapter->hw.phy_type; /* PHY type (IGP=1, M88=0) */
- if(hw->phy_type == e1000_phy_igp) {
+ if (hw->phy_type == e1000_phy_igp) {
e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
IGP01E1000_PHY_AGC_A);
e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_A &
e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_data);
regs_buff[24] = (uint32_t)phy_data; /* phy local receiver status */
regs_buff[25] = regs_buff[24]; /* phy remote receiver status */
- if(hw->mac_type >= e1000_82540 &&
+ if (hw->mac_type >= e1000_82540 &&
hw->media_type == e1000_media_type_copper) {
regs_buff[26] = E1000_READ_REG(hw, MANC);
}
int ret_val = 0;
uint16_t i;
- if(eeprom->len == 0)
+ if (eeprom->len == 0)
return -EINVAL;
eeprom->magic = hw->vendor_id | (hw->device_id << 16);
eeprom_buff = kmalloc(sizeof(uint16_t) *
(last_word - first_word + 1), GFP_KERNEL);
- if(!eeprom_buff)
+ if (!eeprom_buff)
return -ENOMEM;
- if(hw->eeprom.type == e1000_eeprom_spi)
+ if (hw->eeprom.type == e1000_eeprom_spi)
ret_val = e1000_read_eeprom(hw, first_word,
last_word - first_word + 1,
eeprom_buff);
else {
for (i = 0; i < last_word - first_word + 1; i++)
- if((ret_val = e1000_read_eeprom(hw, first_word + i, 1,
+ if ((ret_val = e1000_read_eeprom(hw, first_word + i, 1,
&eeprom_buff[i])))
break;
}
int max_len, first_word, last_word, ret_val = 0;
uint16_t i;
- if(eeprom->len == 0)
+ if (eeprom->len == 0)
return -EOPNOTSUPP;
- if(eeprom->magic != (hw->vendor_id | (hw->device_id << 16)))
+ if (eeprom->magic != (hw->vendor_id | (hw->device_id << 16)))
return -EFAULT;
max_len = hw->eeprom.word_size * 2;
first_word = eeprom->offset >> 1;
last_word = (eeprom->offset + eeprom->len - 1) >> 1;
eeprom_buff = kmalloc(max_len, GFP_KERNEL);
- if(!eeprom_buff)
+ if (!eeprom_buff)
return -ENOMEM;
ptr = (void *)eeprom_buff;
- if(eeprom->offset & 1) {
+ if (eeprom->offset & 1) {
/* need read/modify/write of first changed EEPROM word */
/* only the second byte of the word is being modified */
ret_val = e1000_read_eeprom(hw, first_word, 1,
&eeprom_buff[0]);
ptr++;
}
- if(((eeprom->offset + eeprom->len) & 1) && (ret_val == 0)) {
+ if (((eeprom->offset + eeprom->len) & 1) && (ret_val == 0)) {
/* need read/modify/write of last changed EEPROM word */
/* only the first byte of the word is being modified */
ret_val = e1000_read_eeprom(hw, last_word, 1,
ret_val = e1000_write_eeprom(hw, first_word,
last_word - first_word + 1, eeprom_buff);
- /* Update the checksum over the first part of the EEPROM if needed
+ /* Update the checksum over the first part of the EEPROM if needed
* and flush shadow RAM for 82573 conrollers */
- if((ret_val == 0) && ((first_word <= EEPROM_CHECKSUM_REG) ||
+ if ((ret_val == 0) && ((first_word <= EEPROM_CHECKSUM_REG) ||
(hw->mac_type == e1000_82573)))
e1000_update_eeprom_checksum(hw);
strncpy(drvinfo->driver, e1000_driver_name, 32);
strncpy(drvinfo->version, e1000_driver_version, 32);
-
- /* EEPROM image version # is reported as firware version # for
+
+ /* EEPROM image version # is reported as firmware version # for
* 8257{1|2|3} controllers */
e1000_read_eeprom(&adapter->hw, 5, 1, &eeprom_data);
switch (adapter->hw.mac_type) {
case e1000_82571:
case e1000_82572:
case e1000_82573:
- sprintf(firmware_version, "%d.%d-%d",
+ sprintf(firmware_version, "%d.%d-%d",
(eeprom_data & 0xF000) >> 12,
(eeprom_data & 0x0FF0) >> 4,
eeprom_data & 0x000F);
break;
default:
- sprintf(firmware_version, "n/a");
+ sprintf(firmware_version, "N/A");
}
strncpy(drvinfo->fw_version, firmware_version, 32);
ring->rx_jumbo_pending = 0;
}
-static int
+static int
e1000_set_ringparam(struct net_device *netdev,
struct ethtool_ringparam *ring)
{
struct e1000_rx_ring *rxdr, *rx_old, *rx_new;
int i, err, tx_ring_size, rx_ring_size;
- tx_ring_size = sizeof(struct e1000_tx_ring) * adapter->num_queues;
- rx_ring_size = sizeof(struct e1000_rx_ring) * adapter->num_queues;
+ tx_ring_size = sizeof(struct e1000_tx_ring) * adapter->num_tx_queues;
+ rx_ring_size = sizeof(struct e1000_rx_ring) * adapter->num_rx_queues;
if (netif_running(adapter->netdev))
e1000_down(adapter);
txdr = adapter->tx_ring;
rxdr = adapter->rx_ring;
- if((ring->rx_mini_pending) || (ring->rx_jumbo_pending))
+ if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending))
return -EINVAL;
rxdr->count = max(ring->rx_pending,(uint32_t)E1000_MIN_RXD);
rxdr->count = min(rxdr->count,(uint32_t)(mac_type < e1000_82544 ?
E1000_MAX_RXD : E1000_MAX_82544_RXD));
- E1000_ROUNDUP(rxdr->count, REQ_RX_DESCRIPTOR_MULTIPLE);
+ E1000_ROUNDUP(rxdr->count, REQ_RX_DESCRIPTOR_MULTIPLE);
txdr->count = max(ring->tx_pending,(uint32_t)E1000_MIN_TXD);
txdr->count = min(txdr->count,(uint32_t)(mac_type < e1000_82544 ?
E1000_MAX_TXD : E1000_MAX_82544_TXD));
- E1000_ROUNDUP(txdr->count, REQ_TX_DESCRIPTOR_MULTIPLE);
+ E1000_ROUNDUP(txdr->count, REQ_TX_DESCRIPTOR_MULTIPLE);
- for (i = 0; i < adapter->num_queues; i++) {
+ for (i = 0; i < adapter->num_tx_queues; i++)
txdr[i].count = txdr->count;
+ for (i = 0; i < adapter->num_rx_queues; i++)
rxdr[i].count = rxdr->count;
- }
- if(netif_running(adapter->netdev)) {
+ if (netif_running(adapter->netdev)) {
/* Try to get new resources before deleting old */
if ((err = e1000_setup_all_rx_resources(adapter)))
goto err_setup_rx;
kfree(rx_old);
adapter->rx_ring = rx_new;
adapter->tx_ring = tx_new;
- if((err = e1000_up(adapter)))
+ if ((err = e1000_up(adapter)))
return err;
}
uint32_t pat, value; \
uint32_t test[] = \
{0x5A5A5A5A, 0xA5A5A5A5, 0x00000000, 0xFFFFFFFF}; \
- for(pat = 0; pat < sizeof(test)/sizeof(test[0]); pat++) { \
+ for (pat = 0; pat < sizeof(test)/sizeof(test[0]); pat++) { \
E1000_WRITE_REG(&adapter->hw, R, (test[pat] & W)); \
value = E1000_READ_REG(&adapter->hw, R); \
- if(value != (test[pat] & W & M)) { \
+ if (value != (test[pat] & W & M)) { \
DPRINTK(DRV, ERR, "pattern test reg %04X failed: got " \
"0x%08X expected 0x%08X\n", \
E1000_##R, value, (test[pat] & W & M)); \
uint32_t value; \
E1000_WRITE_REG(&adapter->hw, R, W & M); \
value = E1000_READ_REG(&adapter->hw, R); \
- if((W & M) != (value & M)) { \
+ if ((W & M) != (value & M)) { \
DPRINTK(DRV, ERR, "set/check reg %04X test failed: got 0x%08X "\
"expected 0x%08X\n", E1000_##R, (value & M), (W & M)); \
*data = (adapter->hw.mac_type < e1000_82543) ? \
value = (E1000_READ_REG(&adapter->hw, STATUS) & toggle);
E1000_WRITE_REG(&adapter->hw, STATUS, toggle);
after = E1000_READ_REG(&adapter->hw, STATUS) & toggle;
- if(value != after) {
+ if (value != after) {
DPRINTK(DRV, ERR, "failed STATUS register test got: "
"0x%08X expected: 0x%08X\n", after, value);
*data = 1;
REG_SET_AND_CHECK(RCTL, 0x06DFB3FE, 0x003FFFFB);
REG_SET_AND_CHECK(TCTL, 0xFFFFFFFF, 0x00000000);
- if(adapter->hw.mac_type >= e1000_82543) {
+ if (adapter->hw.mac_type >= e1000_82543) {
REG_SET_AND_CHECK(RCTL, 0x06DFB3FE, 0xFFFFFFFF);
REG_PATTERN_TEST(RDBAL, 0xFFFFFFF0, 0xFFFFFFFF);
REG_PATTERN_TEST(TDBAL, 0xFFFFFFF0, 0xFFFFFFFF);
REG_PATTERN_TEST(TIDV, 0x0000FFFF, 0x0000FFFF);
- for(i = 0; i < E1000_RAR_ENTRIES; i++) {
+ for (i = 0; i < E1000_RAR_ENTRIES; i++) {
REG_PATTERN_TEST(RA + ((i << 1) << 2), 0xFFFFFFFF,
0xFFFFFFFF);
REG_PATTERN_TEST(RA + (((i << 1) + 1) << 2), 0x8003FFFF,
}
- for(i = 0; i < E1000_MC_TBL_SIZE; i++)
+ for (i = 0; i < E1000_MC_TBL_SIZE; i++)
REG_PATTERN_TEST(MTA + (i << 2), 0xFFFFFFFF, 0xFFFFFFFF);
*data = 0;
*data = 0;
/* Read and add up the contents of the EEPROM */
- for(i = 0; i < (EEPROM_CHECKSUM_REG + 1); i++) {
- if((e1000_read_eeprom(&adapter->hw, i, 1, &temp)) < 0) {
+ for (i = 0; i < (EEPROM_CHECKSUM_REG + 1); i++) {
+ if ((e1000_read_eeprom(&adapter->hw, i, 1, &temp)) < 0) {
*data = 1;
break;
}
}
/* If Checksum is not Correct return error else test passed */
- if((checksum != (uint16_t) EEPROM_SUM) && !(*data))
+ if ((checksum != (uint16_t) EEPROM_SUM) && !(*data))
*data = 2;
return *data;
*data = 0;
/* Hook up test interrupt handler just for this test */
- if(!request_irq(irq, &e1000_test_intr, 0, netdev->name, netdev)) {
+ if (!request_irq(irq, &e1000_test_intr, 0, netdev->name, netdev)) {
shared_int = FALSE;
- } else if(request_irq(irq, &e1000_test_intr, SA_SHIRQ,
+ } else if (request_irq(irq, &e1000_test_intr, SA_SHIRQ,
netdev->name, netdev)){
*data = 1;
return -1;
msec_delay(10);
/* Test each interrupt */
- for(; i < 10; i++) {
+ for (; i < 10; i++) {
/* Interrupt to test */
mask = 1 << i;
- if(!shared_int) {
+ if (!shared_int) {
/* Disable the interrupt to be reported in
* the cause register and then force the same
* interrupt and see if one gets posted. If
E1000_WRITE_REG(&adapter->hw, IMC, mask);
E1000_WRITE_REG(&adapter->hw, ICS, mask);
msec_delay(10);
-
- if(adapter->test_icr & mask) {
+
+ if (adapter->test_icr & mask) {
*data = 3;
break;
}
E1000_WRITE_REG(&adapter->hw, ICS, mask);
msec_delay(10);
- if(!(adapter->test_icr & mask)) {
+ if (!(adapter->test_icr & mask)) {
*data = 4;
break;
}
- if(!shared_int) {
+ if (!shared_int) {
/* Disable the other interrupts to be reported in
* the cause register and then force the other
* interrupts and see if any get posted. If
E1000_WRITE_REG(&adapter->hw, ICS, ~mask & 0x00007FFF);
msec_delay(10);
- if(adapter->test_icr) {
+ if (adapter->test_icr) {
*data = 5;
break;
}
struct pci_dev *pdev = adapter->pdev;
int i;
- if(txdr->desc && txdr->buffer_info) {
- for(i = 0; i < txdr->count; i++) {
- if(txdr->buffer_info[i].dma)
+ if (txdr->desc && txdr->buffer_info) {
+ for (i = 0; i < txdr->count; i++) {
+ if (txdr->buffer_info[i].dma)
pci_unmap_single(pdev, txdr->buffer_info[i].dma,
txdr->buffer_info[i].length,
PCI_DMA_TODEVICE);
- if(txdr->buffer_info[i].skb)
+ if (txdr->buffer_info[i].skb)
dev_kfree_skb(txdr->buffer_info[i].skb);
}
}
- if(rxdr->desc && rxdr->buffer_info) {
- for(i = 0; i < rxdr->count; i++) {
- if(rxdr->buffer_info[i].dma)
+ if (rxdr->desc && rxdr->buffer_info) {
+ for (i = 0; i < rxdr->count; i++) {
+ if (rxdr->buffer_info[i].dma)
pci_unmap_single(pdev, rxdr->buffer_info[i].dma,
rxdr->buffer_info[i].length,
PCI_DMA_FROMDEVICE);
- if(rxdr->buffer_info[i].skb)
+ if (rxdr->buffer_info[i].skb)
dev_kfree_skb(rxdr->buffer_info[i].skb);
}
}
- if(txdr->desc) {
+ if (txdr->desc) {
pci_free_consistent(pdev, txdr->size, txdr->desc, txdr->dma);
txdr->desc = NULL;
}
- if(rxdr->desc) {
+ if (rxdr->desc) {
pci_free_consistent(pdev, rxdr->size, rxdr->desc, rxdr->dma);
rxdr->desc = NULL;
}
kfree(txdr->buffer_info);
txdr->buffer_info = NULL;
-
kfree(rxdr->buffer_info);
rxdr->buffer_info = NULL;
/* Setup Tx descriptor ring and Tx buffers */
- if(!txdr->count)
- txdr->count = E1000_DEFAULT_TXD;
+ if (!txdr->count)
+ txdr->count = E1000_DEFAULT_TXD;
size = txdr->count * sizeof(struct e1000_buffer);
- if(!(txdr->buffer_info = kmalloc(size, GFP_KERNEL))) {
+ if (!(txdr->buffer_info = kmalloc(size, GFP_KERNEL))) {
ret_val = 1;
goto err_nomem;
}
txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
E1000_ROUNDUP(txdr->size, 4096);
- if(!(txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma))) {
+ if (!(txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma))) {
ret_val = 2;
goto err_nomem;
}
E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT |
E1000_FDX_COLLISION_DISTANCE << E1000_COLD_SHIFT);
- for(i = 0; i < txdr->count; i++) {
+ for (i = 0; i < txdr->count; i++) {
struct e1000_tx_desc *tx_desc = E1000_TX_DESC(*txdr, i);
struct sk_buff *skb;
unsigned int size = 1024;
- if(!(skb = alloc_skb(size, GFP_KERNEL))) {
+ if (!(skb = alloc_skb(size, GFP_KERNEL))) {
ret_val = 3;
goto err_nomem;
}
/* Setup Rx descriptor ring and Rx buffers */
- if(!rxdr->count)
- rxdr->count = E1000_DEFAULT_RXD;
+ if (!rxdr->count)
+ rxdr->count = E1000_DEFAULT_RXD;
size = rxdr->count * sizeof(struct e1000_buffer);
- if(!(rxdr->buffer_info = kmalloc(size, GFP_KERNEL))) {
+ if (!(rxdr->buffer_info = kmalloc(size, GFP_KERNEL))) {
ret_val = 4;
goto err_nomem;
}
memset(rxdr->buffer_info, 0, size);
rxdr->size = rxdr->count * sizeof(struct e1000_rx_desc);
- if(!(rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma))) {
+ if (!(rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma))) {
ret_val = 5;
goto err_nomem;
}
(adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT);
E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
- for(i = 0; i < rxdr->count; i++) {
+ for (i = 0; i < rxdr->count; i++) {
struct e1000_rx_desc *rx_desc = E1000_RX_DESC(*rxdr, i);
struct sk_buff *skb;
- if(!(skb = alloc_skb(E1000_RXBUFFER_2048 + NET_IP_ALIGN,
+ if (!(skb = alloc_skb(E1000_RXBUFFER_2048 + NET_IP_ALIGN,
GFP_KERNEL))) {
ret_val = 6;
goto err_nomem;
/* Check Phy Configuration */
e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_reg);
- if(phy_reg != 0x4100)
+ if (phy_reg != 0x4100)
return 9;
e1000_read_phy_reg(&adapter->hw, M88E1000_EXT_PHY_SPEC_CTRL, &phy_reg);
- if(phy_reg != 0x0070)
+ if (phy_reg != 0x0070)
return 10;
e1000_read_phy_reg(&adapter->hw, 29, &phy_reg);
- if(phy_reg != 0x001A)
+ if (phy_reg != 0x001A)
return 11;
return 0;
adapter->hw.autoneg = FALSE;
- if(adapter->hw.phy_type == e1000_phy_m88) {
+ if (adapter->hw.phy_type == e1000_phy_m88) {
/* Auto-MDI/MDIX Off */
e1000_write_phy_reg(&adapter->hw,
M88E1000_PHY_SPEC_CTRL, 0x0808);
E1000_CTRL_SPD_1000 |/* Force Speed to 1000 */
E1000_CTRL_FD); /* Force Duplex to FULL */
- if(adapter->hw.media_type == e1000_media_type_copper &&
+ if (adapter->hw.media_type == e1000_media_type_copper &&
adapter->hw.phy_type == e1000_phy_m88) {
ctrl_reg |= E1000_CTRL_ILOS; /* Invert Loss of Signal */
} else {
/* Set the ILOS bit on the fiber Nic is half
* duplex link is detected. */
stat_reg = E1000_READ_REG(&adapter->hw, STATUS);
- if((stat_reg & E1000_STATUS_FD) == 0)
+ if ((stat_reg & E1000_STATUS_FD) == 0)
ctrl_reg |= (E1000_CTRL_ILOS | E1000_CTRL_SLU);
}
/* Disable the receiver on the PHY so when a cable is plugged in, the
* PHY does not begin to autoneg when a cable is reconnected to the NIC.
*/
- if(adapter->hw.phy_type == e1000_phy_m88)
+ if (adapter->hw.phy_type == e1000_phy_m88)
e1000_phy_disable_receiver(adapter);
udelay(500);
switch (adapter->hw.mac_type) {
case e1000_82543:
- if(adapter->hw.media_type == e1000_media_type_copper) {
+ if (adapter->hw.media_type == e1000_media_type_copper) {
/* Attempt to setup Loopback mode on Non-integrated PHY.
* Some PHY registers get corrupted at random, so
* attempt this 10 times.
*/
- while(e1000_nonintegrated_phy_loopback(adapter) &&
+ while (e1000_nonintegrated_phy_loopback(adapter) &&
count++ < 10);
- if(count < 11)
+ if (count < 11)
return 0;
}
break;
static int
e1000_setup_loopback_test(struct e1000_adapter *adapter)
{
- uint32_t rctl;
struct e1000_hw *hw = &adapter->hw;
+ uint32_t rctl;
if (hw->media_type == e1000_media_type_fiber ||
- hw->media_type == e1000_media_type_internal_serdes) {
+ hw->media_type == e1000_media_type_internal_serdes) {
switch (hw->mac_type) {
case e1000_82545:
case e1000_82546:
static void
e1000_loopback_cleanup(struct e1000_adapter *adapter)
{
+ struct e1000_hw *hw = &adapter->hw;
uint32_t rctl;
uint16_t phy_reg;
- struct e1000_hw *hw = &adapter->hw;
- rctl = E1000_READ_REG(&adapter->hw, RCTL);
+ rctl = E1000_READ_REG(hw, RCTL);
rctl &= ~(E1000_RCTL_LBM_TCVR | E1000_RCTL_LBM_MAC);
- E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
+ E1000_WRITE_REG(hw, RCTL, rctl);
switch (hw->mac_type) {
case e1000_82571:
case e1000_82572:
if (hw->media_type == e1000_media_type_fiber ||
- hw->media_type == e1000_media_type_internal_serdes){
+ hw->media_type == e1000_media_type_internal_serdes) {
#define E1000_SERDES_LB_OFF 0x400
E1000_WRITE_REG(hw, SCTL, E1000_SERDES_LB_OFF);
msec_delay(10);
break;
}
- /* fall thru for Cu adapters */
+ /* Fall Through */
case e1000_82545:
case e1000_82546:
case e1000_82545_rev_3:
e1000_create_lbtest_frame(struct sk_buff *skb, unsigned int frame_size)
{
memset(skb->data, 0xFF, frame_size);
- frame_size = (frame_size % 2) ? (frame_size - 1) : frame_size;
+ frame_size &= ~1;
memset(&skb->data[frame_size / 2], 0xAA, frame_size / 2 - 1);
memset(&skb->data[frame_size / 2 + 10], 0xBE, 1);
memset(&skb->data[frame_size / 2 + 12], 0xAF, 1);
static int
e1000_check_lbtest_frame(struct sk_buff *skb, unsigned int frame_size)
{
- frame_size = (frame_size % 2) ? (frame_size - 1) : frame_size;
- if(*(skb->data + 3) == 0xFF) {
- if((*(skb->data + frame_size / 2 + 10) == 0xBE) &&
+ frame_size &= ~1;
+ if (*(skb->data + 3) == 0xFF) {
+ if ((*(skb->data + frame_size / 2 + 10) == 0xBE) &&
(*(skb->data + frame_size / 2 + 12) == 0xAF)) {
return 0;
}
E1000_WRITE_REG(&adapter->hw, RDT, rxdr->count - 1);
- /* Calculate the loop count based on the largest descriptor ring
+ /* Calculate the loop count based on the largest descriptor ring
* The idea is to wrap the largest ring a number of times using 64
* send/receive pairs during each loop
*/
- if(rxdr->count <= txdr->count)
+ if (rxdr->count <= txdr->count)
lc = ((txdr->count / 64) * 2) + 1;
else
lc = ((rxdr->count / 64) * 2) + 1;
k = l = 0;
- for(j = 0; j <= lc; j++) { /* loop count loop */
- for(i = 0; i < 64; i++) { /* send the packets */
- e1000_create_lbtest_frame(txdr->buffer_info[i].skb,
+ for (j = 0; j <= lc; j++) { /* loop count loop */
+ for (i = 0; i < 64; i++) { /* send the packets */
+ e1000_create_lbtest_frame(txdr->buffer_info[i].skb,
1024);
- pci_dma_sync_single_for_device(pdev,
+ pci_dma_sync_single_for_device(pdev,
txdr->buffer_info[k].dma,
txdr->buffer_info[k].length,
PCI_DMA_TODEVICE);
- if(unlikely(++k == txdr->count)) k = 0;
+ if (unlikely(++k == txdr->count)) k = 0;
}
E1000_WRITE_REG(&adapter->hw, TDT, k);
msec_delay(200);
time = jiffies; /* set the start time for the receive */
good_cnt = 0;
do { /* receive the sent packets */
- pci_dma_sync_single_for_cpu(pdev,
+ pci_dma_sync_single_for_cpu(pdev,
rxdr->buffer_info[l].dma,
rxdr->buffer_info[l].length,
PCI_DMA_FROMDEVICE);
-
+
ret_val = e1000_check_lbtest_frame(
rxdr->buffer_info[l].skb,
1024);
- if(!ret_val)
+ if (!ret_val)
good_cnt++;
- if(unlikely(++l == rxdr->count)) l = 0;
- /* time + 20 msecs (200 msecs on 2.4) is more than
- * enough time to complete the receives, if it's
+ if (unlikely(++l == rxdr->count)) l = 0;
+ /* time + 20 msecs (200 msecs on 2.4) is more than
+ * enough time to complete the receives, if it's
* exceeded, break and error off
*/
} while (good_cnt < 64 && jiffies < (time + 20));
- if(good_cnt != 64) {
+ if (good_cnt != 64) {
ret_val = 13; /* ret_val is the same as mis-compare */
- break;
+ break;
}
- if(jiffies >= (time + 2)) {
+ if (jiffies >= (time + 2)) {
ret_val = 14; /* error code for time out error */
break;
}
static int
e1000_loopback_test(struct e1000_adapter *adapter, uint64_t *data)
{
- if((*data = e1000_setup_desc_rings(adapter))) goto err_loopback;
- if((*data = e1000_setup_loopback_test(adapter)))
- goto err_loopback_setup;
+ /* PHY loopback cannot be performed if SoL/IDER
+ * sessions are active */
+ if (e1000_check_phy_reset_block(&adapter->hw)) {
+ DPRINTK(DRV, ERR, "Cannot do PHY loopback test "
+ "when SoL/IDER is active.\n");
+ *data = 0;
+ goto out;
+ }
+
+ if ((*data = e1000_setup_desc_rings(adapter)))
+ goto out;
+ if ((*data = e1000_setup_loopback_test(adapter)))
+ goto err_loopback;
*data = e1000_run_loopback_test(adapter);
e1000_loopback_cleanup(adapter);
-err_loopback_setup:
- e1000_free_desc_rings(adapter);
+
err_loopback:
+ e1000_free_desc_rings(adapter);
+out:
return *data;
}
*data = 1;
} else {
e1000_check_for_link(&adapter->hw);
- if(adapter->hw.autoneg) /* if auto_neg is set wait for it */
+ if (adapter->hw.autoneg) /* if auto_neg is set wait for it */
msec_delay(4000);
- if(!(E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU)) {
+ if (!(E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU)) {
*data = 1;
}
}
return *data;
}
-static int
+static int
e1000_diag_test_count(struct net_device *netdev)
{
return E1000_TEST_LEN;
struct e1000_adapter *adapter = netdev_priv(netdev);
boolean_t if_running = netif_running(netdev);
- if(eth_test->flags == ETH_TEST_FL_OFFLINE) {
+ if (eth_test->flags == ETH_TEST_FL_OFFLINE) {
/* Offline tests */
/* save speed, duplex, autoneg settings */
/* Link test performed before hardware reset so autoneg doesn't
* interfere with test result */
- if(e1000_link_test(adapter, &data[4]))
+ if (e1000_link_test(adapter, &data[4]))
eth_test->flags |= ETH_TEST_FL_FAILED;
- if(if_running)
+ if (if_running)
e1000_down(adapter);
else
e1000_reset(adapter);
- if(e1000_reg_test(adapter, &data[0]))
+ if (e1000_reg_test(adapter, &data[0]))
eth_test->flags |= ETH_TEST_FL_FAILED;
e1000_reset(adapter);
- if(e1000_eeprom_test(adapter, &data[1]))
+ if (e1000_eeprom_test(adapter, &data[1]))
eth_test->flags |= ETH_TEST_FL_FAILED;
e1000_reset(adapter);
- if(e1000_intr_test(adapter, &data[2]))
+ if (e1000_intr_test(adapter, &data[2]))
eth_test->flags |= ETH_TEST_FL_FAILED;
e1000_reset(adapter);
- if(e1000_loopback_test(adapter, &data[3]))
+ if (e1000_loopback_test(adapter, &data[3]))
eth_test->flags |= ETH_TEST_FL_FAILED;
/* restore speed, duplex, autoneg settings */
adapter->hw.autoneg = autoneg;
e1000_reset(adapter);
- if(if_running)
+ if (if_running)
e1000_up(adapter);
} else {
/* Online tests */
- if(e1000_link_test(adapter, &data[4]))
+ if (e1000_link_test(adapter, &data[4]))
eth_test->flags |= ETH_TEST_FL_FAILED;
/* Offline tests aren't run; pass by default */
struct e1000_adapter *adapter = netdev_priv(netdev);
struct e1000_hw *hw = &adapter->hw;
- switch(adapter->hw.device_id) {
+ switch (adapter->hw.device_id) {
case E1000_DEV_ID_82542:
case E1000_DEV_ID_82543GC_FIBER:
case E1000_DEV_ID_82543GC_COPPER:
case E1000_DEV_ID_82546EB_FIBER:
case E1000_DEV_ID_82546GB_FIBER:
+ case E1000_DEV_ID_82571EB_FIBER:
/* Wake events only supported on port A for dual fiber */
- if(E1000_READ_REG(hw, STATUS) & E1000_STATUS_FUNC_1) {
+ if (E1000_READ_REG(hw, STATUS) & E1000_STATUS_FUNC_1) {
wol->supported = 0;
wol->wolopts = 0;
return;
WAKE_BCAST | WAKE_MAGIC;
wol->wolopts = 0;
- if(adapter->wol & E1000_WUFC_EX)
+ if (adapter->wol & E1000_WUFC_EX)
wol->wolopts |= WAKE_UCAST;
- if(adapter->wol & E1000_WUFC_MC)
+ if (adapter->wol & E1000_WUFC_MC)
wol->wolopts |= WAKE_MCAST;
- if(adapter->wol & E1000_WUFC_BC)
+ if (adapter->wol & E1000_WUFC_BC)
wol->wolopts |= WAKE_BCAST;
- if(adapter->wol & E1000_WUFC_MAG)
+ if (adapter->wol & E1000_WUFC_MAG)
wol->wolopts |= WAKE_MAGIC;
return;
}
struct e1000_adapter *adapter = netdev_priv(netdev);
struct e1000_hw *hw = &adapter->hw;
- switch(adapter->hw.device_id) {
+ switch (adapter->hw.device_id) {
case E1000_DEV_ID_82542:
case E1000_DEV_ID_82543GC_FIBER:
case E1000_DEV_ID_82543GC_COPPER:
case E1000_DEV_ID_82546EB_FIBER:
case E1000_DEV_ID_82546GB_FIBER:
+ case E1000_DEV_ID_82571EB_FIBER:
/* Wake events only supported on port A for dual fiber */
- if(E1000_READ_REG(hw, STATUS) & E1000_STATUS_FUNC_1)
+ if (E1000_READ_REG(hw, STATUS) & E1000_STATUS_FUNC_1)
return wol->wolopts ? -EOPNOTSUPP : 0;
/* Fall Through */
default:
- if(wol->wolopts & (WAKE_PHY | WAKE_ARP | WAKE_MAGICSECURE))
+ if (wol->wolopts & (WAKE_PHY | WAKE_ARP | WAKE_MAGICSECURE))
return -EOPNOTSUPP;
adapter->wol = 0;
- if(wol->wolopts & WAKE_UCAST)
+ if (wol->wolopts & WAKE_UCAST)
adapter->wol |= E1000_WUFC_EX;
- if(wol->wolopts & WAKE_MCAST)
+ if (wol->wolopts & WAKE_MCAST)
adapter->wol |= E1000_WUFC_MC;
- if(wol->wolopts & WAKE_BCAST)
+ if (wol->wolopts & WAKE_BCAST)
adapter->wol |= E1000_WUFC_BC;
- if(wol->wolopts & WAKE_MAGIC)
+ if (wol->wolopts & WAKE_MAGIC)
adapter->wol |= E1000_WUFC_MAG;
}
{
struct e1000_adapter *adapter = (struct e1000_adapter *) data;
- if(test_and_change_bit(E1000_LED_ON, &adapter->led_status))
+ if (test_and_change_bit(E1000_LED_ON, &adapter->led_status))
e1000_led_off(&adapter->hw);
else
e1000_led_on(&adapter->hw);
{
struct e1000_adapter *adapter = netdev_priv(netdev);
- if(!data || data > (uint32_t)(MAX_SCHEDULE_TIMEOUT / HZ))
+ if (!data || data > (uint32_t)(MAX_SCHEDULE_TIMEOUT / HZ))
data = (uint32_t)(MAX_SCHEDULE_TIMEOUT / HZ);
- if(adapter->hw.mac_type < e1000_82571) {
- if(!adapter->blink_timer.function) {
+ if (adapter->hw.mac_type < e1000_82571) {
+ if (!adapter->blink_timer.function) {
init_timer(&adapter->blink_timer);
adapter->blink_timer.function = e1000_led_blink_callback;
adapter->blink_timer.data = (unsigned long) adapter;
mod_timer(&adapter->blink_timer, jiffies);
msleep_interruptible(data * 1000);
del_timer_sync(&adapter->blink_timer);
- }
- else if(adapter->hw.mac_type < e1000_82573) {
- E1000_WRITE_REG(&adapter->hw, LEDCTL, (E1000_LEDCTL_LED2_BLINK_RATE |
- E1000_LEDCTL_LED0_BLINK | E1000_LEDCTL_LED2_BLINK |
- (E1000_LEDCTL_MODE_LED_ON << E1000_LEDCTL_LED2_MODE_SHIFT) |
- (E1000_LEDCTL_MODE_LINK_ACTIVITY << E1000_LEDCTL_LED0_MODE_SHIFT) |
- (E1000_LEDCTL_MODE_LED_OFF << E1000_LEDCTL_LED1_MODE_SHIFT)));
+ } else if (adapter->hw.mac_type < e1000_82573) {
+ E1000_WRITE_REG(&adapter->hw, LEDCTL,
+ (E1000_LEDCTL_LED2_BLINK_RATE |
+ E1000_LEDCTL_LED0_BLINK | E1000_LEDCTL_LED2_BLINK |
+ (E1000_LEDCTL_MODE_LED_ON << E1000_LEDCTL_LED2_MODE_SHIFT) |
+ (E1000_LEDCTL_MODE_LINK_ACTIVITY << E1000_LEDCTL_LED0_MODE_SHIFT) |
+ (E1000_LEDCTL_MODE_LED_OFF << E1000_LEDCTL_LED1_MODE_SHIFT)));
msleep_interruptible(data * 1000);
- }
- else {
- E1000_WRITE_REG(&adapter->hw, LEDCTL, (E1000_LEDCTL_LED2_BLINK_RATE |
- E1000_LEDCTL_LED1_BLINK | E1000_LEDCTL_LED2_BLINK |
- (E1000_LEDCTL_MODE_LED_ON << E1000_LEDCTL_LED2_MODE_SHIFT) |
- (E1000_LEDCTL_MODE_LINK_ACTIVITY << E1000_LEDCTL_LED1_MODE_SHIFT) |
- (E1000_LEDCTL_MODE_LED_OFF << E1000_LEDCTL_LED0_MODE_SHIFT)));
+ } else {
+ E1000_WRITE_REG(&adapter->hw, LEDCTL,
+ (E1000_LEDCTL_LED2_BLINK_RATE |
+ E1000_LEDCTL_LED1_BLINK | E1000_LEDCTL_LED2_BLINK |
+ (E1000_LEDCTL_MODE_LED_ON << E1000_LEDCTL_LED2_MODE_SHIFT) |
+ (E1000_LEDCTL_MODE_LINK_ACTIVITY << E1000_LEDCTL_LED1_MODE_SHIFT) |
+ (E1000_LEDCTL_MODE_LED_OFF << E1000_LEDCTL_LED0_MODE_SHIFT)));
msleep_interruptible(data * 1000);
}
e1000_nway_reset(struct net_device *netdev)
{
struct e1000_adapter *adapter = netdev_priv(netdev);
- if(netif_running(netdev)) {
+ if (netif_running(netdev)) {
e1000_down(adapter);
e1000_up(adapter);
}
return 0;
}
-static int
+static int
e1000_get_stats_count(struct net_device *netdev)
{
return E1000_STATS_LEN;
}
-static void
-e1000_get_ethtool_stats(struct net_device *netdev,
+static void
+e1000_get_ethtool_stats(struct net_device *netdev,
struct ethtool_stats *stats, uint64_t *data)
{
struct e1000_adapter *adapter = netdev_priv(netdev);
+#ifdef CONFIG_E1000_MQ
+ uint64_t *queue_stat;
+ int stat_count = sizeof(struct e1000_queue_stats) / sizeof(uint64_t);
+ int j, k;
+#endif
int i;
e1000_update_stats(adapter);
- for(i = 0; i < E1000_STATS_LEN; i++) {
- char *p = (char *)adapter+e1000_gstrings_stats[i].stat_offset;
- data[i] = (e1000_gstrings_stats[i].sizeof_stat ==
+ for (i = 0; i < E1000_GLOBAL_STATS_LEN; i++) {
+ char *p = (char *)adapter+e1000_gstrings_stats[i].stat_offset;
+ data[i] = (e1000_gstrings_stats[i].sizeof_stat ==
sizeof(uint64_t)) ? *(uint64_t *)p : *(uint32_t *)p;
}
+#ifdef CONFIG_E1000_MQ
+ for (j = 0; j < adapter->num_tx_queues; j++) {
+ queue_stat = (uint64_t *)&adapter->tx_ring[j].tx_stats;
+ for (k = 0; k < stat_count; k++)
+ data[i + k] = queue_stat[k];
+ i += k;
+ }
+ for (j = 0; j < adapter->num_rx_queues; j++) {
+ queue_stat = (uint64_t *)&adapter->rx_ring[j].rx_stats;
+ for (k = 0; k < stat_count; k++)
+ data[i + k] = queue_stat[k];
+ i += k;
+ }
+#endif
+/* BUG_ON(i != E1000_STATS_LEN); */
}
-static void
+static void
e1000_get_strings(struct net_device *netdev, uint32_t stringset, uint8_t *data)
{
+#ifdef CONFIG_E1000_MQ
+ struct e1000_adapter *adapter = netdev_priv(netdev);
+#endif
+ uint8_t *p = data;
int i;
- switch(stringset) {
+ switch (stringset) {
case ETH_SS_TEST:
- memcpy(data, *e1000_gstrings_test,
+ memcpy(data, *e1000_gstrings_test,
E1000_TEST_LEN*ETH_GSTRING_LEN);
break;
case ETH_SS_STATS:
- for (i=0; i < E1000_STATS_LEN; i++) {
- memcpy(data + i * ETH_GSTRING_LEN,
- e1000_gstrings_stats[i].stat_string,
- ETH_GSTRING_LEN);
+ for (i = 0; i < E1000_GLOBAL_STATS_LEN; i++) {
+ memcpy(p, e1000_gstrings_stats[i].stat_string,
+ ETH_GSTRING_LEN);
+ p += ETH_GSTRING_LEN;
}
+#ifdef CONFIG_E1000_MQ
+ for (i = 0; i < adapter->num_tx_queues; i++) {
+ sprintf(p, "tx_queue_%u_packets", i);
+ p += ETH_GSTRING_LEN;
+ sprintf(p, "tx_queue_%u_bytes", i);
+ p += ETH_GSTRING_LEN;
+ }
+ for (i = 0; i < adapter->num_rx_queues; i++) {
+ sprintf(p, "rx_queue_%u_packets", i);
+ p += ETH_GSTRING_LEN;
+ sprintf(p, "rx_queue_%u_bytes", i);
+ p += ETH_GSTRING_LEN;
+ }
+#endif
+/* BUG_ON(p - data != E1000_STATS_LEN * ETH_GSTRING_LEN); */
break;
}
}
case E1000_DEV_ID_82546GB_FIBER:
case E1000_DEV_ID_82546GB_SERDES:
case E1000_DEV_ID_82546GB_PCIE:
+ case E1000_DEV_ID_82546GB_QUAD_COPPER:
+ case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
hw->mac_type = e1000_82546_rev_3;
break;
case E1000_DEV_ID_82541EI:
uint16_t cmd_mmrbc;
uint16_t stat_mmrbc;
uint32_t mta_size;
+ uint32_t ctrl_ext;
DEBUGFUNC("e1000_init_hw");
break;
case e1000_82571:
case e1000_82572:
- ctrl |= (1 << 22);
case e1000_82573:
ctrl |= E1000_TXDCTL_COUNT_DESC;
break;
*/
e1000_clear_hw_cntrs(hw);
+ if (hw->device_id == E1000_DEV_ID_82546GB_QUAD_COPPER ||
+ hw->device_id == E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3) {
+ ctrl_ext = E1000_READ_REG(hw, CTRL_EXT);
+ /* Relaxed ordering must be disabled to avoid a parity
+ * error crash in a PCI slot. */
+ ctrl_ext |= E1000_CTRL_EXT_RO_DIS;
+ E1000_WRITE_REG(hw, CTRL_EXT, ctrl_ext);
+ }
+
return ret_val;
}
DEBUGFUNC("e1000_setup_link");
+ /* In the case of the phy reset being blocked, we already have a link.
+ * We do not have to set it up again. */
+ if (e1000_check_phy_reset_block(hw))
+ return E1000_SUCCESS;
+
/* Read and store word 0x0F of the EEPROM. This word contains bits
* that determine the hardware's default PAUSE (flow control) mode,
* a bit that determines whether the HW defaults to enabling or
if(ret_val)
return ret_val;
- /* Read the MII 1000Base-T Control Register (Address 9). */
- ret_val = e1000_read_phy_reg(hw, PHY_1000T_CTRL, &mii_1000t_ctrl_reg);
- if(ret_val)
- return ret_val;
+ /* Read the MII 1000Base-T Control Register (Address 9). */
+ ret_val = e1000_read_phy_reg(hw, PHY_1000T_CTRL, &mii_1000t_ctrl_reg);
+ if(ret_val)
+ return ret_val;
/* Need to parse both autoneg_advertised and fc and set up
* the appropriate PHY registers. First we will parse for
void
e1000_config_collision_dist(struct e1000_hw *hw)
{
- uint32_t tctl;
+ uint32_t tctl, coll_dist;
DEBUGFUNC("e1000_config_collision_dist");
+ if (hw->mac_type < e1000_82543)
+ coll_dist = E1000_COLLISION_DISTANCE_82542;
+ else
+ coll_dist = E1000_COLLISION_DISTANCE;
+
tctl = E1000_READ_REG(hw, TCTL);
tctl &= ~E1000_TCTL_COLD;
- tctl |= E1000_COLLISION_DISTANCE << E1000_COLD_SHIFT;
+ tctl |= coll_dist << E1000_COLD_SHIFT;
E1000_WRITE_REG(hw, TCTL, tctl);
E1000_WRITE_FLUSH(hw);
if (hw->mac_type < e1000_82571)
msec_delay(10);
+ else
+ udelay(100);
E1000_WRITE_REG(hw, CTRL, ctrl);
E1000_WRITE_FLUSH(hw);
return -E1000_ERR_EEPROM;
}
- /* FLASH reads without acquiring the semaphore are safe in 82573-based
- * controllers.
- */
- if ((e1000_is_onboard_nvm_eeprom(hw) == TRUE) ||
- (hw->mac_type != e1000_82573)) {
- /* Prepare the EEPROM for reading */
- if(e1000_acquire_eeprom(hw) != E1000_SUCCESS)
- return -E1000_ERR_EEPROM;
+ /* FLASH reads without acquiring the semaphore are safe */
+ if (e1000_is_onboard_nvm_eeprom(hw) == TRUE &&
+ hw->eeprom.use_eerd == FALSE) {
+ switch (hw->mac_type) {
+ default:
+ /* Prepare the EEPROM for reading */
+ if (e1000_acquire_eeprom(hw) != E1000_SUCCESS)
+ return -E1000_ERR_EEPROM;
+ break;
+ }
}
- if(eeprom->use_eerd == TRUE) {
+ if (eeprom->use_eerd == TRUE) {
ret_val = e1000_read_eeprom_eerd(hw, offset, words, data);
if ((e1000_is_onboard_nvm_eeprom(hw) == TRUE) ||
(hw->mac_type != e1000_82573))
return -E1000_ERR_EEPROM;
}
- /* If STM opcode located in bits 15:8 of flop, reset firmware */
+ /* If STM opcode located in bits 15:8 of flop, reset firmware */
if ((flop & 0xFF00) == E1000_STM_OPCODE) {
E1000_WRITE_REG(hw, HICR, E1000_HICR_FW_RESET);
}
/* Perform the flash update */
E1000_WRITE_REG(hw, EECD, eecd | E1000_EECD_FLUPD);
- for (i=0; i < attempts; i++) {
+ for (i=0; i < attempts; i++) {
eecd = E1000_READ_REG(hw, EECD);
if ((eecd & E1000_EECD_FLUPD) == 0) {
break;
hw->perm_mac_addr[i] = (uint8_t) (eeprom_data & 0x00FF);
hw->perm_mac_addr[i+1] = (uint8_t) (eeprom_data >> 8);
}
+
switch (hw->mac_type) {
default:
break;
break;
}
+ /* PHY configuration from NVM just starts after EECD_AUTO_RD sets to high.
+ * Need to wait for PHY configuration completion before accessing NVM
+ * and PHY. */
+ if (hw->mac_type == e1000_82573)
+ msec_delay(25);
+
return E1000_SUCCESS;
}
e1000_check_phy_reset_block(struct e1000_hw *hw)
{
uint32_t manc = 0;
- if(hw->mac_type > e1000_82547_rev_2)
+
+ if (hw->mac_type > e1000_82547_rev_2)
manc = E1000_READ_REG(hw, MANC);
return (manc & E1000_MANC_BLK_PHY_RST_ON_IDE) ?
E1000_BLK_PHY_RESET : E1000_SUCCESS;
void e1000_swfw_sync_release(struct e1000_hw *hw, uint16_t mask);
/* Filters (multicast, vlan, receive) */
+void e1000_mc_addr_list_update(struct e1000_hw *hw, uint8_t * mc_addr_list, uint32_t mc_addr_count, uint32_t pad, uint32_t rar_used_count);
uint32_t e1000_hash_mc_addr(struct e1000_hw *hw, uint8_t * mc_addr);
void e1000_mta_set(struct e1000_hw *hw, uint32_t hash_value);
void e1000_rar_set(struct e1000_hw *hw, uint8_t * mc_addr, uint32_t rar_index);
void e1000_write_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t * value);
/* Port I/O is only supported on 82544 and newer */
uint32_t e1000_io_read(struct e1000_hw *hw, unsigned long port);
+uint32_t e1000_read_reg_io(struct e1000_hw *hw, uint32_t offset);
void e1000_io_write(struct e1000_hw *hw, unsigned long port, uint32_t value);
+void e1000_enable_pciex_master(struct e1000_hw *hw);
int32_t e1000_disable_pciex_master(struct e1000_hw *hw);
int32_t e1000_get_software_semaphore(struct e1000_hw *hw);
void e1000_release_software_semaphore(struct e1000_hw *hw);
#define E1000_DEV_ID_82546GB_FIBER 0x107A
#define E1000_DEV_ID_82546GB_SERDES 0x107B
#define E1000_DEV_ID_82546GB_PCIE 0x108A
+#define E1000_DEV_ID_82546GB_QUAD_COPPER 0x1099
#define E1000_DEV_ID_82547EI 0x1019
#define E1000_DEV_ID_82571EB_COPPER 0x105E
#define E1000_DEV_ID_82571EB_FIBER 0x105F
#define E1000_DEV_ID_82573E 0x108B
#define E1000_DEV_ID_82573E_IAMT 0x108C
#define E1000_DEV_ID_82573L 0x109A
+#define E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3 0x10B5
#define NODE_ADDRESS_SIZE 6
#define E1000_TXDCTL 0x03828 /* TX Descriptor Control - RW */
#define E1000_TADV 0x0382C /* TX Interrupt Absolute Delay Val - RW */
#define E1000_TSPMT 0x03830 /* TCP Segmentation PAD & Min Threshold - RW */
-#define E1000_TARC0 0x03840 /* TX Arbitration Count (0) */
-#define E1000_TDBAL1 0x03900 /* TX Desc Base Address Low (1) - RW */
-#define E1000_TDBAH1 0x03904 /* TX Desc Base Address High (1) - RW */
-#define E1000_TDLEN1 0x03908 /* TX Desc Length (1) - RW */
-#define E1000_TDH1 0x03910 /* TX Desc Head (1) - RW */
-#define E1000_TDT1 0x03918 /* TX Desc Tail (1) - RW */
-#define E1000_TXDCTL1 0x03928 /* TX Descriptor Control (1) - RW */
-#define E1000_TARC1 0x03940 /* TX Arbitration Count (1) */
+#define E1000_TARC0 0x03840 /* TX Arbitration Count (0) */
+#define E1000_TDBAL1 0x03900 /* TX Desc Base Address Low (1) - RW */
+#define E1000_TDBAH1 0x03904 /* TX Desc Base Address High (1) - RW */
+#define E1000_TDLEN1 0x03908 /* TX Desc Length (1) - RW */
+#define E1000_TDH1 0x03910 /* TX Desc Head (1) - RW */
+#define E1000_TDT1 0x03918 /* TX Desc Tail (1) - RW */
+#define E1000_TXDCTL1 0x03928 /* TX Descriptor Control (1) - RW */
+#define E1000_TARC1 0x03940 /* TX Arbitration Count (1) */
#define E1000_CRCERRS 0x04000 /* CRC Error Count - R/clr */
#define E1000_ALGNERRC 0x04004 /* Alignment Error Count - R/clr */
#define E1000_SYMERRS 0x04008 /* Symbol Error Count - R/clr */
#define E1000_CTRL_EXT_EE_RST 0x00002000 /* Reinitialize from EEPROM */
#define E1000_CTRL_EXT_IPS 0x00004000 /* Invert Power State */
#define E1000_CTRL_EXT_SPD_BYPS 0x00008000 /* Speed Select Bypass */
+#define E1000_CTRL_EXT_RO_DIS 0x00020000 /* Relaxed Ordering disable */
#define E1000_CTRL_EXT_LINK_MODE_MASK 0x00C00000
#define E1000_CTRL_EXT_LINK_MODE_GMII 0x00000000
#define E1000_CTRL_EXT_LINK_MODE_TBI 0x00C00000
#define E1000_TXDCTL_FULL_TX_DESC_WB 0x01010000 /* GRAN=1, WTHRESH=1 */
#define E1000_TXDCTL_COUNT_DESC 0x00400000 /* Enable the counting of desc.
still to be processed. */
-
/* Transmit Configuration Word */
#define E1000_TXCW_FD 0x00000020 /* TXCW full duplex */
#define E1000_TXCW_HD 0x00000040 /* TXCW half duplex */
#define E1000_MDALIGN 4096
+/* PCI-Ex registers */
+
+/* PCI-Ex Control Register */
+#define E1000_GCR_RXD_NO_SNOOP 0x00000001
+#define E1000_GCR_RXDSCW_NO_SNOOP 0x00000002
+#define E1000_GCR_RXDSCR_NO_SNOOP 0x00000004
+#define E1000_GCR_TXD_NO_SNOOP 0x00000008
+#define E1000_GCR_TXDSCW_NO_SNOOP 0x00000010
+#define E1000_GCR_TXDSCR_NO_SNOOP 0x00000020
+
+#define PCI_EX_NO_SNOOP_ALL (E1000_GCR_RXD_NO_SNOOP | \
+ E1000_GCR_RXDSCW_NO_SNOOP | \
+ E1000_GCR_RXDSCR_NO_SNOOP | \
+ E1000_GCR TXD_NO_SNOOP | \
+ E1000_GCR_TXDSCW_NO_SNOOP | \
+ E1000_GCR_TXDSCR_NO_SNOOP)
+
#define E1000_GCR_L1_ACT_WITHOUT_L0S_RX 0x08000000
/* Function Active and Power State to MNG */
#define E1000_FACTPS_FUNC0_POWER_STATE_MASK 0x00000003
/* Collision related configuration parameters */
#define E1000_COLLISION_THRESHOLD 15
#define E1000_CT_SHIFT 4
-#define E1000_COLLISION_DISTANCE 64
+/* Collision distance is a 0-based value that applies to
+ * half-duplex-capable hardware only. */
+#define E1000_COLLISION_DISTANCE 63
+#define E1000_COLLISION_DISTANCE_82542 64
#define E1000_FDX_COLLISION_DISTANCE E1000_COLLISION_DISTANCE
#define E1000_HDX_COLLISION_DISTANCE E1000_COLLISION_DISTANCE
#define E1000_COLD_SHIFT 12
#include "e1000.h"
/* Change Log
- * 6.0.58 4/20/05
- * o Accepted ethtool cleanup patch from Stephen Hemminger
- * 6.0.44+ 2/15/05
- * o applied Anton's patch to resolve tx hang in hardware
- * o Applied Andrew Mortons patch - e1000 stops working after resume
+ * 6.3.9 12/16/2005
+ * o incorporate fix for recycled skbs from IBM LTC
+ * 6.3.7 11/18/2005
+ * o Honor eeprom setting for enabling/disabling Wake On Lan
+ * 6.3.5 11/17/2005
+ * o Fix memory leak in rx ring handling for PCI Express adapters
+ * 6.3.4 11/8/05
+ * o Patch from Jesper Juhl to remove redundant NULL checks for kfree
+ * 6.3.2 9/20/05
+ * o Render logic that sets/resets DRV_LOAD as inline functions to
+ * avoid code replication. If f/w is AMT then set DRV_LOAD only when
+ * network interface is open.
+ * o Handle DRV_LOAD set/reset in cases where AMT uses VLANs.
+ * o Adjust PBA partioning for Jumbo frames using MTU size and not
+ * rx_buffer_len
+ * 6.3.1 9/19/05
+ * o Use adapter->tx_timeout_factor in Tx Hung Detect logic
+ (e1000_clean_tx_irq)
+ * o Support for 8086:10B5 device (Quad Port)
+ * 6.2.14 9/15/05
+ * o In AMT enabled configurations, set/reset DRV_LOAD bit on interface
+ * open/close
+ * 6.2.13 9/14/05
+ * o Invoke e1000_check_mng_mode only for 8257x controllers since it
+ * accesses the FWSM that is not supported in other controllers
+ * 6.2.12 9/9/05
+ * o Add support for device id E1000_DEV_ID_82546GB_QUAD_COPPER
+ * o set RCTL:SECRC only for controllers newer than 82543.
+ * o When the n/w interface comes down reset DRV_LOAD bit to notify f/w.
+ * This code was moved from e1000_remove to e1000_close
+ * 6.2.10 9/6/05
+ * o Fix error in updating RDT in el1000_alloc_rx_buffers[_ps] -- one off.
+ * o Enable fc by default on 82573 controllers (do not read eeprom)
+ * o Fix rx_errors statistic not to include missed_packet_count
+ * o Fix rx_dropped statistic not to include missed_packet_count
+ (Padraig Brady)
+ * 6.2.9 8/30/05
+ * o Remove call to update statistics from the controller ib e1000_get_stats
+ * 6.2.8 8/30/05
+ * o Improved algorithm for rx buffer allocation/rdt update
+ * o Flow control watermarks relative to rx PBA size
+ * o Simplified 'Tx Hung' detect logic
+ * 6.2.7 8/17/05
+ * o Report rx buffer allocation failures and tx timeout counts in stats
+ * 6.2.6 8/16/05
+ * o Implement workaround for controller erratum -- linear non-tso packet
+ * following a TSO gets written back prematurely
+ * 6.2.5 8/15/05
+ * o Set netdev->tx_queue_len based on link speed/duplex settings.
+ * o Fix net_stats.rx_fifo_errors <p@draigBrady.com>
+ * o Do not power off PHY if SoL/IDER session is active
+ * 6.2.4 8/10/05
+ * o Fix loopback test setup/cleanup for 82571/3 controllers
+ * o Fix parsing of outgoing packets (e1000_transfer_dhcp_info) to treat
+ * all packets as raw
+ * o Prevent operations that will cause the PHY to be reset if SoL/IDER
+ * sessions are active and log a message
+ * 6.2.2 7/21/05
+ * o used fixed size descriptors for all MTU sizes, reduces memory load
+ * 6.1.2 4/13/05
+ * o Fixed ethtool diagnostics
+ * o Enabled flow control to take default eeprom settings
+ * o Added stats_lock around e1000_read_phy_reg commands to avoid concurrent
+ * calls, one from mii_ioctl and other from within update_stats while
+ * processing MIIREG ioctl.
*/
char e1000_driver_name[] = "e1000";
#else
#define DRIVERNAPI "-NAPI"
#endif
-#define DRV_VERSION "6.1.16-k2"DRIVERNAPI
+#define DRV_VERSION "6.3.9-k2"DRIVERNAPI
char e1000_driver_version[] = DRV_VERSION;
static char e1000_copyright[] = "Copyright (c) 1999-2005 Intel Corporation.";
INTEL_E1000_ETHERNET_DEVICE(0x108A),
INTEL_E1000_ETHERNET_DEVICE(0x108B),
INTEL_E1000_ETHERNET_DEVICE(0x108C),
+ INTEL_E1000_ETHERNET_DEVICE(0x1099),
INTEL_E1000_ETHERNET_DEVICE(0x109A),
+ INTEL_E1000_ETHERNET_DEVICE(0x10B5),
/* required last entry */
{0,}
};
struct e1000_rx_ring *rx_ring);
#endif
static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
- struct e1000_rx_ring *rx_ring);
+ struct e1000_rx_ring *rx_ring,
+ int cleaned_count);
static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
- struct e1000_rx_ring *rx_ring);
+ struct e1000_rx_ring *rx_ring,
+ int cleaned_count);
static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
int cmd);
static inline void
e1000_irq_enable(struct e1000_adapter *adapter)
{
- if(likely(atomic_dec_and_test(&adapter->irq_sem))) {
+ if (likely(atomic_dec_and_test(&adapter->irq_sem))) {
E1000_WRITE_REG(&adapter->hw, IMS, IMS_ENABLE_MASK);
E1000_WRITE_FLUSH(&adapter->hw);
}
struct net_device *netdev = adapter->netdev;
uint16_t vid = adapter->hw.mng_cookie.vlan_id;
uint16_t old_vid = adapter->mng_vlan_id;
- if(adapter->vlgrp) {
- if(!adapter->vlgrp->vlan_devices[vid]) {
- if(adapter->hw.mng_cookie.status &
+ if (adapter->vlgrp) {
+ if (!adapter->vlgrp->vlan_devices[vid]) {
+ if (adapter->hw.mng_cookie.status &
E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) {
e1000_vlan_rx_add_vid(netdev, vid);
adapter->mng_vlan_id = vid;
} else
adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
-
- if((old_vid != (uint16_t)E1000_MNG_VLAN_NONE) &&
- (vid != old_vid) &&
+
+ if ((old_vid != (uint16_t)E1000_MNG_VLAN_NONE) &&
+ (vid != old_vid) &&
!adapter->vlgrp->vlan_devices[old_vid])
e1000_vlan_rx_kill_vid(netdev, old_vid);
}
}
}
-
+
+/**
+ * e1000_release_hw_control - release control of the h/w to f/w
+ * @adapter: address of board private structure
+ *
+ * e1000_release_hw_control resets {CTRL_EXT|FWSM}:DRV_LOAD bit.
+ * For ASF and Pass Through versions of f/w this means that the
+ * driver is no longer loaded. For AMT version (only with 82573) i
+ * of the f/w this means that the netowrk i/f is closed.
+ *
+ **/
+
+static inline void
+e1000_release_hw_control(struct e1000_adapter *adapter)
+{
+ uint32_t ctrl_ext;
+ uint32_t swsm;
+
+ /* Let firmware taken over control of h/w */
+ switch (adapter->hw.mac_type) {
+ case e1000_82571:
+ case e1000_82572:
+ ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
+ E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
+ ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
+ break;
+ case e1000_82573:
+ swsm = E1000_READ_REG(&adapter->hw, SWSM);
+ E1000_WRITE_REG(&adapter->hw, SWSM,
+ swsm & ~E1000_SWSM_DRV_LOAD);
+ default:
+ break;
+ }
+}
+
+/**
+ * e1000_get_hw_control - get control of the h/w from f/w
+ * @adapter: address of board private structure
+ *
+ * e1000_get_hw_control sets {CTRL_EXT|FWSM}:DRV_LOAD bit.
+ * For ASF and Pass Through versions of f/w this means that
+ * the driver is loaded. For AMT version (only with 82573)
+ * of the f/w this means that the netowrk i/f is open.
+ *
+ **/
+
+static inline void
+e1000_get_hw_control(struct e1000_adapter *adapter)
+{
+ uint32_t ctrl_ext;
+ uint32_t swsm;
+ /* Let firmware know the driver has taken over */
+ switch (adapter->hw.mac_type) {
+ case e1000_82571:
+ case e1000_82572:
+ ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
+ E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
+ ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
+ break;
+ case e1000_82573:
+ swsm = E1000_READ_REG(&adapter->hw, SWSM);
+ E1000_WRITE_REG(&adapter->hw, SWSM,
+ swsm | E1000_SWSM_DRV_LOAD);
+ break;
+ default:
+ break;
+ }
+}
+
int
e1000_up(struct e1000_adapter *adapter)
{
/* hardware has been reset, we need to reload some things */
/* Reset the PHY if it was previously powered down */
- if(adapter->hw.media_type == e1000_media_type_copper) {
+ if (adapter->hw.media_type == e1000_media_type_copper) {
uint16_t mii_reg;
e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
- if(mii_reg & MII_CR_POWER_DOWN)
+ if (mii_reg & MII_CR_POWER_DOWN)
e1000_phy_reset(&adapter->hw);
}
e1000_configure_tx(adapter);
e1000_setup_rctl(adapter);
e1000_configure_rx(adapter);
- for (i = 0; i < adapter->num_queues; i++)
- adapter->alloc_rx_buf(adapter, &adapter->rx_ring[i]);
+ /* call E1000_DESC_UNUSED which always leaves
+ * at least 1 descriptor unused to make sure
+ * next_to_use != next_to_clean */
+ for (i = 0; i < adapter->num_rx_queues; i++) {
+ struct e1000_rx_ring *ring = &adapter->rx_ring[i];
+ adapter->alloc_rx_buf(adapter, ring,
+ E1000_DESC_UNUSED(ring));
+ }
#ifdef CONFIG_PCI_MSI
- if(adapter->hw.mac_type > e1000_82547_rev_2) {
+ if (adapter->hw.mac_type > e1000_82547_rev_2) {
adapter->have_msi = TRUE;
- if((err = pci_enable_msi(adapter->pdev))) {
+ if ((err = pci_enable_msi(adapter->pdev))) {
DPRINTK(PROBE, ERR,
"Unable to allocate MSI interrupt Error: %d\n", err);
adapter->have_msi = FALSE;
}
}
#endif
- if((err = request_irq(adapter->pdev->irq, &e1000_intr,
+ if ((err = request_irq(adapter->pdev->irq, &e1000_intr,
SA_SHIRQ | SA_SAMPLE_RANDOM,
netdev->name, netdev))) {
DPRINTK(PROBE, ERR,
return err;
}
+#ifdef CONFIG_E1000_MQ
+ e1000_setup_queue_mapping(adapter);
+#endif
+
+ adapter->tx_queue_len = netdev->tx_queue_len;
+
mod_timer(&adapter->watchdog_timer, jiffies);
#ifdef CONFIG_E1000_NAPI
e1000_down(struct e1000_adapter *adapter)
{
struct net_device *netdev = adapter->netdev;
+ boolean_t mng_mode_enabled = (adapter->hw.mac_type >= e1000_82571) &&
+ e1000_check_mng_mode(&adapter->hw);
e1000_irq_disable(adapter);
#ifdef CONFIG_E1000_MQ
#endif
free_irq(adapter->pdev->irq, netdev);
#ifdef CONFIG_PCI_MSI
- if(adapter->hw.mac_type > e1000_82547_rev_2 &&
+ if (adapter->hw.mac_type > e1000_82547_rev_2 &&
adapter->have_msi == TRUE)
pci_disable_msi(adapter->pdev);
#endif
#ifdef CONFIG_E1000_NAPI
netif_poll_disable(netdev);
#endif
+ netdev->tx_queue_len = adapter->tx_queue_len;
adapter->link_speed = 0;
adapter->link_duplex = 0;
netif_carrier_off(netdev);
e1000_clean_all_tx_rings(adapter);
e1000_clean_all_rx_rings(adapter);
- /* If WoL is not enabled and management mode is not IAMT
- * Power down the PHY so no link is implied when interface is down */
- if(!adapter->wol && adapter->hw.mac_type >= e1000_82540 &&
+ /* Power down the PHY so no link is implied when interface is down *
+ * The PHY cannot be powered down if any of the following is TRUE *
+ * (a) WoL is enabled
+ * (b) AMT is active
+ * (c) SoL/IDER session is active */
+ if (!adapter->wol && adapter->hw.mac_type >= e1000_82540 &&
adapter->hw.media_type == e1000_media_type_copper &&
- !e1000_check_mng_mode(&adapter->hw) &&
- !(E1000_READ_REG(&adapter->hw, MANC) & E1000_MANC_SMBUS_EN)) {
+ !(E1000_READ_REG(&adapter->hw, MANC) & E1000_MANC_SMBUS_EN) &&
+ !mng_mode_enabled &&
+ !e1000_check_phy_reset_block(&adapter->hw)) {
uint16_t mii_reg;
e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
mii_reg |= MII_CR_POWER_DOWN;
void
e1000_reset(struct e1000_adapter *adapter)
{
- struct net_device *netdev = adapter->netdev;
uint32_t pba, manc;
uint16_t fc_high_water_mark = E1000_FC_HIGH_DIFF;
- uint16_t fc_low_water_mark = E1000_FC_LOW_DIFF;
/* Repartition Pba for greater than 9k mtu
* To take effect CTRL.RST is required.
break;
}
- if((adapter->hw.mac_type != e1000_82573) &&
- (adapter->rx_buffer_len > E1000_RXBUFFER_8192)) {
+ if ((adapter->hw.mac_type != e1000_82573) &&
+ (adapter->netdev->mtu > E1000_RXBUFFER_8192))
pba -= 8; /* allocate more FIFO for Tx */
- /* send an XOFF when there is enough space in the
- * Rx FIFO to hold one extra full size Rx packet
- */
- fc_high_water_mark = netdev->mtu + ENET_HEADER_SIZE +
- ETHERNET_FCS_SIZE + 1;
- fc_low_water_mark = fc_high_water_mark + 8;
- }
- if(adapter->hw.mac_type == e1000_82547) {
+ if (adapter->hw.mac_type == e1000_82547) {
adapter->tx_fifo_head = 0;
adapter->tx_head_addr = pba << E1000_TX_HEAD_ADDR_SHIFT;
adapter->tx_fifo_size =
E1000_WRITE_REG(&adapter->hw, PBA, pba);
/* flow control settings */
- adapter->hw.fc_high_water = (pba << E1000_PBA_BYTES_SHIFT) -
- fc_high_water_mark;
- adapter->hw.fc_low_water = (pba << E1000_PBA_BYTES_SHIFT) -
- fc_low_water_mark;
+ /* Set the FC high water mark to 90% of the FIFO size.
+ * Required to clear last 3 LSB */
+ fc_high_water_mark = ((pba * 9216)/10) & 0xFFF8;
+
+ adapter->hw.fc_high_water = fc_high_water_mark;
+ adapter->hw.fc_low_water = fc_high_water_mark - 8;
adapter->hw.fc_pause_time = E1000_FC_PAUSE_TIME;
adapter->hw.fc_send_xon = 1;
adapter->hw.fc = adapter->hw.original_fc;
/* Allow time for pending master requests to run */
e1000_reset_hw(&adapter->hw);
- if(adapter->hw.mac_type >= e1000_82544)
+ if (adapter->hw.mac_type >= e1000_82544)
E1000_WRITE_REG(&adapter->hw, WUC, 0);
- if(e1000_init_hw(&adapter->hw))
+ if (e1000_init_hw(&adapter->hw))
DPRINTK(PROBE, ERR, "Hardware Error\n");
e1000_update_mng_vlan(adapter);
/* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
struct net_device *netdev;
struct e1000_adapter *adapter;
unsigned long mmio_start, mmio_len;
- uint32_t ctrl_ext;
- uint32_t swsm;
static int cards_found = 0;
int i, err, pci_using_dac;
uint16_t eeprom_data;
uint16_t eeprom_apme_mask = E1000_EEPROM_APME;
- if((err = pci_enable_device(pdev)))
+ if ((err = pci_enable_device(pdev)))
return err;
- if(!(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK))) {
+ if (!(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK))) {
pci_using_dac = 1;
} else {
- if((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK))) {
+ if ((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK))) {
E1000_ERR("No usable DMA configuration, aborting\n");
return err;
}
pci_using_dac = 0;
}
- if((err = pci_request_regions(pdev, e1000_driver_name)))
+ if ((err = pci_request_regions(pdev, e1000_driver_name)))
return err;
pci_set_master(pdev);
netdev = alloc_etherdev(sizeof(struct e1000_adapter));
- if(!netdev) {
+ if (!netdev) {
err = -ENOMEM;
goto err_alloc_etherdev;
}
mmio_len = pci_resource_len(pdev, BAR_0);
adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
- if(!adapter->hw.hw_addr) {
+ if (!adapter->hw.hw_addr) {
err = -EIO;
goto err_ioremap;
}
- for(i = BAR_1; i <= BAR_5; i++) {
- if(pci_resource_len(pdev, i) == 0)
+ for (i = BAR_1; i <= BAR_5; i++) {
+ if (pci_resource_len(pdev, i) == 0)
continue;
- if(pci_resource_flags(pdev, i) & IORESOURCE_IO) {
+ if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
adapter->hw.io_base = pci_resource_start(pdev, i);
break;
}
/* setup the private structure */
- if((err = e1000_sw_init(adapter)))
+ if ((err = e1000_sw_init(adapter)))
goto err_sw_init;
- if((err = e1000_check_phy_reset_block(&adapter->hw)))
+ if ((err = e1000_check_phy_reset_block(&adapter->hw)))
DPRINTK(PROBE, INFO, "PHY reset is blocked due to SOL/IDER session.\n");
- if(adapter->hw.mac_type >= e1000_82543) {
+ if (adapter->hw.mac_type >= e1000_82543) {
netdev->features = NETIF_F_SG |
NETIF_F_HW_CSUM |
NETIF_F_HW_VLAN_TX |
}
#ifdef NETIF_F_TSO
- if((adapter->hw.mac_type >= e1000_82544) &&
+ if ((adapter->hw.mac_type >= e1000_82544) &&
(adapter->hw.mac_type != e1000_82547))
netdev->features |= NETIF_F_TSO;
#ifdef NETIF_F_TSO_IPV6
- if(adapter->hw.mac_type > e1000_82547_rev_2)
+ if (adapter->hw.mac_type > e1000_82547_rev_2)
netdev->features |= NETIF_F_TSO_IPV6;
#endif
#endif
- if(pci_using_dac)
+ if (pci_using_dac)
netdev->features |= NETIF_F_HIGHDMA;
/* hard_start_xmit is safe against parallel locking */
adapter->en_mng_pt = e1000_enable_mng_pass_thru(&adapter->hw);
- /* before reading the EEPROM, reset the controller to
+ /* before reading the EEPROM, reset the controller to
* put the device in a known good starting state */
-
+
e1000_reset_hw(&adapter->hw);
/* make sure the EEPROM is good */
- if(e1000_validate_eeprom_checksum(&adapter->hw) < 0) {
+ if (e1000_validate_eeprom_checksum(&adapter->hw) < 0) {
DPRINTK(PROBE, ERR, "The EEPROM Checksum Is Not Valid\n");
err = -EIO;
goto err_eeprom;
/* copy the MAC address out of the EEPROM */
- if(e1000_read_mac_addr(&adapter->hw))
+ if (e1000_read_mac_addr(&adapter->hw))
DPRINTK(PROBE, ERR, "EEPROM Read Error\n");
memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
memcpy(netdev->perm_addr, adapter->hw.mac_addr, netdev->addr_len);
- if(!is_valid_ether_addr(netdev->perm_addr)) {
+ if (!is_valid_ether_addr(netdev->perm_addr)) {
DPRINTK(PROBE, ERR, "Invalid MAC Address\n");
err = -EIO;
goto err_eeprom;
* enable the ACPI Magic Packet filter
*/
- switch(adapter->hw.mac_type) {
+ switch (adapter->hw.mac_type) {
case e1000_82542_rev2_0:
case e1000_82542_rev2_1:
case e1000_82543:
case e1000_82546:
case e1000_82546_rev_3:
case e1000_82571:
- if((E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1)
- && (adapter->hw.media_type == e1000_media_type_copper)) {
+ if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1){
e1000_read_eeprom(&adapter->hw,
EEPROM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
break;
EEPROM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
break;
}
- if(eeprom_data & eeprom_apme_mask)
+ if (eeprom_data & eeprom_apme_mask)
adapter->wol |= E1000_WUFC_MAG;
+ /* print bus type/speed/width info */
+ {
+ struct e1000_hw *hw = &adapter->hw;
+ DPRINTK(PROBE, INFO, "(PCI%s:%s:%s) ",
+ ((hw->bus_type == e1000_bus_type_pcix) ? "-X" :
+ (hw->bus_type == e1000_bus_type_pci_express ? " Express":"")),
+ ((hw->bus_speed == e1000_bus_speed_2500) ? "2.5Gb/s" :
+ (hw->bus_speed == e1000_bus_speed_133) ? "133MHz" :
+ (hw->bus_speed == e1000_bus_speed_120) ? "120MHz" :
+ (hw->bus_speed == e1000_bus_speed_100) ? "100MHz" :
+ (hw->bus_speed == e1000_bus_speed_66) ? "66MHz" : "33MHz"),
+ ((hw->bus_width == e1000_bus_width_64) ? "64-bit" :
+ (hw->bus_width == e1000_bus_width_pciex_4) ? "Width x4" :
+ (hw->bus_width == e1000_bus_width_pciex_1) ? "Width x1" :
+ "32-bit"));
+ }
+
+ for (i = 0; i < 6; i++)
+ printk("%2.2x%c", netdev->dev_addr[i], i == 5 ? '\n' : ':');
+
/* reset the hardware with the new settings */
e1000_reset(adapter);
- /* Let firmware know the driver has taken over */
- switch(adapter->hw.mac_type) {
- case e1000_82571:
- case e1000_82572:
- ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
- E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
- ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
- break;
- case e1000_82573:
- swsm = E1000_READ_REG(&adapter->hw, SWSM);
- E1000_WRITE_REG(&adapter->hw, SWSM,
- swsm | E1000_SWSM_DRV_LOAD);
- break;
- default:
- break;
- }
+ /* If the controller is 82573 and f/w is AMT, do not set
+ * DRV_LOAD until the interface is up. For all other cases,
+ * let the f/w know that the h/w is now under the control
+ * of the driver. */
+ if (adapter->hw.mac_type != e1000_82573 ||
+ !e1000_check_mng_mode(&adapter->hw))
+ e1000_get_hw_control(adapter);
strcpy(netdev->name, "eth%d");
- if((err = register_netdev(netdev)))
+ if ((err = register_netdev(netdev)))
goto err_register;
DPRINTK(PROBE, INFO, "Intel(R) PRO/1000 Network Connection\n");
{
struct net_device *netdev = pci_get_drvdata(pdev);
struct e1000_adapter *adapter = netdev_priv(netdev);
- uint32_t ctrl_ext;
- uint32_t manc, swsm;
+ uint32_t manc;
#ifdef CONFIG_E1000_NAPI
int i;
#endif
flush_scheduled_work();
- if(adapter->hw.mac_type >= e1000_82540 &&
+ if (adapter->hw.mac_type >= e1000_82540 &&
adapter->hw.media_type == e1000_media_type_copper) {
manc = E1000_READ_REG(&adapter->hw, MANC);
- if(manc & E1000_MANC_SMBUS_EN) {
+ if (manc & E1000_MANC_SMBUS_EN) {
manc |= E1000_MANC_ARP_EN;
E1000_WRITE_REG(&adapter->hw, MANC, manc);
}
}
- switch(adapter->hw.mac_type) {
- case e1000_82571:
- case e1000_82572:
- ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
- E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
- ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
- break;
- case e1000_82573:
- swsm = E1000_READ_REG(&adapter->hw, SWSM);
- E1000_WRITE_REG(&adapter->hw, SWSM,
- swsm & ~E1000_SWSM_DRV_LOAD);
- break;
-
- default:
- break;
- }
+ /* Release control of h/w to f/w. If f/w is AMT enabled, this
+ * would have already happened in close and is redundant. */
+ e1000_release_hw_control(adapter);
unregister_netdev(netdev);
#ifdef CONFIG_E1000_NAPI
- for (i = 0; i < adapter->num_queues; i++)
+ for (i = 0; i < adapter->num_rx_queues; i++)
__dev_put(&adapter->polling_netdev[i]);
#endif
- if(!e1000_check_phy_reset_block(&adapter->hw))
+ if (!e1000_check_phy_reset_block(&adapter->hw))
e1000_phy_hw_reset(&adapter->hw);
kfree(adapter->tx_ring);
/* identify the MAC */
- if(e1000_set_mac_type(hw)) {
+ if (e1000_set_mac_type(hw)) {
DPRINTK(PROBE, ERR, "Unknown MAC Type\n");
return -EIO;
}
/* initialize eeprom parameters */
- if(e1000_init_eeprom_params(hw)) {
+ if (e1000_init_eeprom_params(hw)) {
E1000_ERR("EEPROM initialization failed\n");
return -EIO;
}
- switch(hw->mac_type) {
+ switch (hw->mac_type) {
default:
break;
case e1000_82541:
/* Copper options */
- if(hw->media_type == e1000_media_type_copper) {
+ if (hw->media_type == e1000_media_type_copper) {
hw->mdix = AUTO_ALL_MODES;
hw->disable_polarity_correction = FALSE;
hw->master_slave = E1000_MASTER_SLAVE;
switch (hw->mac_type) {
case e1000_82571:
case e1000_82572:
- adapter->num_queues = 2;
+ /* These controllers support 2 tx queues, but with a single
+ * qdisc implementation, multiple tx queues aren't quite as
+ * interesting. If we can find a logical way of mapping
+ * flows to a queue, then perhaps we can up the num_tx_queue
+ * count back to its default. Until then, we run the risk of
+ * terrible performance due to SACK overload. */
+ adapter->num_tx_queues = 1;
+ adapter->num_rx_queues = 2;
break;
default:
- adapter->num_queues = 1;
+ adapter->num_tx_queues = 1;
+ adapter->num_rx_queues = 1;
break;
}
- adapter->num_queues = min(adapter->num_queues, num_online_cpus());
+ adapter->num_rx_queues = min(adapter->num_rx_queues, num_online_cpus());
+ adapter->num_tx_queues = min(adapter->num_tx_queues, num_online_cpus());
+ DPRINTK(DRV, INFO, "Multiqueue Enabled: Rx Queue count = %u %s\n",
+ adapter->num_rx_queues,
+ ((adapter->num_rx_queues == 1)
+ ? ((num_online_cpus() > 1)
+ ? "(due to unsupported feature in current adapter)"
+ : "(due to unsupported system configuration)")
+ : ""));
+ DPRINTK(DRV, INFO, "Multiqueue Enabled: Tx Queue count = %u\n",
+ adapter->num_tx_queues);
#else
- adapter->num_queues = 1;
+ adapter->num_tx_queues = 1;
+ adapter->num_rx_queues = 1;
#endif
if (e1000_alloc_queues(adapter)) {
}
#ifdef CONFIG_E1000_NAPI
- for (i = 0; i < adapter->num_queues; i++) {
+ for (i = 0; i < adapter->num_rx_queues; i++) {
adapter->polling_netdev[i].priv = adapter;
adapter->polling_netdev[i].poll = &e1000_clean;
adapter->polling_netdev[i].weight = 64;
dev_hold(&adapter->polling_netdev[i]);
set_bit(__LINK_STATE_START, &adapter->polling_netdev[i].state);
}
-#endif
-
-#ifdef CONFIG_E1000_MQ
- e1000_setup_queue_mapping(adapter);
+ spin_lock_init(&adapter->tx_queue_lock);
#endif
atomic_set(&adapter->irq_sem, 1);
{
int size;
- size = sizeof(struct e1000_tx_ring) * adapter->num_queues;
+ size = sizeof(struct e1000_tx_ring) * adapter->num_tx_queues;
adapter->tx_ring = kmalloc(size, GFP_KERNEL);
if (!adapter->tx_ring)
return -ENOMEM;
memset(adapter->tx_ring, 0, size);
- size = sizeof(struct e1000_rx_ring) * adapter->num_queues;
+ size = sizeof(struct e1000_rx_ring) * adapter->num_rx_queues;
adapter->rx_ring = kmalloc(size, GFP_KERNEL);
if (!adapter->rx_ring) {
kfree(adapter->tx_ring);
memset(adapter->rx_ring, 0, size);
#ifdef CONFIG_E1000_NAPI
- size = sizeof(struct net_device) * adapter->num_queues;
+ size = sizeof(struct net_device) * adapter->num_rx_queues;
adapter->polling_netdev = kmalloc(size, GFP_KERNEL);
if (!adapter->polling_netdev) {
kfree(adapter->tx_ring);
memset(adapter->polling_netdev, 0, size);
#endif
+#ifdef CONFIG_E1000_MQ
+ adapter->rx_sched_call_data.func = e1000_rx_schedule;
+ adapter->rx_sched_call_data.info = adapter->netdev;
+
+ adapter->cpu_netdev = alloc_percpu(struct net_device *);
+ adapter->cpu_tx_ring = alloc_percpu(struct e1000_tx_ring *);
+#endif
+
return E1000_SUCCESS;
}
lock_cpu_hotplug();
i = 0;
for_each_online_cpu(cpu) {
- *per_cpu_ptr(adapter->cpu_tx_ring, cpu) = &adapter->tx_ring[i % adapter->num_queues];
+ *per_cpu_ptr(adapter->cpu_tx_ring, cpu) = &adapter->tx_ring[i % adapter->num_tx_queues];
/* This is incomplete because we'd like to assign separate
* physical cpus to these netdev polling structures and
* avoid saturating a subset of cpus.
*/
- if (i < adapter->num_queues) {
+ if (i < adapter->num_rx_queues) {
*per_cpu_ptr(adapter->cpu_netdev, cpu) = &adapter->polling_netdev[i];
- adapter->cpu_for_queue[i] = cpu;
+ adapter->rx_ring[i].cpu = cpu;
+ cpu_set(cpu, adapter->cpumask);
} else
*per_cpu_ptr(adapter->cpu_netdev, cpu) = NULL;
if ((err = e1000_setup_all_rx_resources(adapter)))
goto err_setup_rx;
- if((err = e1000_up(adapter)))
+ if ((err = e1000_up(adapter)))
goto err_up;
adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
- if((adapter->hw.mng_cookie.status &
+ if ((adapter->hw.mng_cookie.status &
E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
e1000_update_mng_vlan(adapter);
}
+ /* If AMT is enabled, let the firmware know that the network
+ * interface is now open */
+ if (adapter->hw.mac_type == e1000_82573 &&
+ e1000_check_mng_mode(&adapter->hw))
+ e1000_get_hw_control(adapter);
+
return E1000_SUCCESS;
err_up:
e1000_free_all_tx_resources(adapter);
e1000_free_all_rx_resources(adapter);
- if((adapter->hw.mng_cookie.status &
+ if ((adapter->hw.mng_cookie.status &
E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
}
+
+ /* If AMT is enabled, let the firmware know that the network
+ * interface is now closed */
+ if (adapter->hw.mac_type == e1000_82573 &&
+ e1000_check_mng_mode(&adapter->hw))
+ e1000_release_hw_control(adapter);
+
return 0;
}
size = sizeof(struct e1000_buffer) * txdr->count;
txdr->buffer_info = vmalloc_node(size, pcibus_to_node(pdev->bus));
- if(!txdr->buffer_info) {
+ if (!txdr->buffer_info) {
DPRINTK(PROBE, ERR,
"Unable to allocate memory for the transmit descriptor ring\n");
return -ENOMEM;
E1000_ROUNDUP(txdr->size, 4096);
txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
- if(!txdr->desc) {
+ if (!txdr->desc) {
setup_tx_desc_die:
vfree(txdr->buffer_info);
DPRINTK(PROBE, ERR,
"at %p\n", txdr->size, txdr->desc);
/* Try again, without freeing the previous */
txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
- if(!txdr->desc) {
/* Failed allocation, critical failure */
+ if (!txdr->desc) {
pci_free_consistent(pdev, txdr->size, olddesc, olddma);
goto setup_tx_desc_die;
}
{
int i, err = 0;
- for (i = 0; i < adapter->num_queues; i++) {
+ for (i = 0; i < adapter->num_tx_queues; i++) {
err = e1000_setup_tx_resources(adapter, &adapter->tx_ring[i]);
if (err) {
DPRINTK(PROBE, ERR,
uint64_t tdba;
struct e1000_hw *hw = &adapter->hw;
uint32_t tdlen, tctl, tipg, tarc;
+ uint32_t ipgr1, ipgr2;
/* Setup the HW Tx Head and Tail descriptor pointers */
- switch (adapter->num_queues) {
+ switch (adapter->num_tx_queues) {
case 2:
tdba = adapter->tx_ring[1].dma;
tdlen = adapter->tx_ring[1].count *
/* Set the default values for the Tx Inter Packet Gap timer */
+ if (hw->media_type == e1000_media_type_fiber ||
+ hw->media_type == e1000_media_type_internal_serdes)
+ tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
+ else
+ tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
+
switch (hw->mac_type) {
case e1000_82542_rev2_0:
case e1000_82542_rev2_1:
tipg = DEFAULT_82542_TIPG_IPGT;
- tipg |= DEFAULT_82542_TIPG_IPGR1 << E1000_TIPG_IPGR1_SHIFT;
- tipg |= DEFAULT_82542_TIPG_IPGR2 << E1000_TIPG_IPGR2_SHIFT;
+ ipgr1 = DEFAULT_82542_TIPG_IPGR1;
+ ipgr2 = DEFAULT_82542_TIPG_IPGR2;
break;
default:
- if (hw->media_type == e1000_media_type_fiber ||
- hw->media_type == e1000_media_type_internal_serdes)
- tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
- else
- tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
- tipg |= DEFAULT_82543_TIPG_IPGR1 << E1000_TIPG_IPGR1_SHIFT;
- tipg |= DEFAULT_82543_TIPG_IPGR2 << E1000_TIPG_IPGR2_SHIFT;
+ ipgr1 = DEFAULT_82543_TIPG_IPGR1;
+ ipgr2 = DEFAULT_82543_TIPG_IPGR2;
+ break;
}
+ tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
+ tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
E1000_WRITE_REG(hw, TIPG, tipg);
/* Set the Tx Interrupt Delay register */
size = sizeof(struct e1000_ps_page) * rxdr->count;
rxdr->ps_page = kmalloc(size, GFP_KERNEL);
- if(!rxdr->ps_page) {
+ if (!rxdr->ps_page) {
vfree(rxdr->buffer_info);
DPRINTK(PROBE, ERR,
"Unable to allocate memory for the receive descriptor ring\n");
size = sizeof(struct e1000_ps_page_dma) * rxdr->count;
rxdr->ps_page_dma = kmalloc(size, GFP_KERNEL);
- if(!rxdr->ps_page_dma) {
+ if (!rxdr->ps_page_dma) {
vfree(rxdr->buffer_info);
kfree(rxdr->ps_page);
DPRINTK(PROBE, ERR,
}
memset(rxdr->ps_page_dma, 0, size);
- if(adapter->hw.mac_type <= e1000_82547_rev_2)
+ if (adapter->hw.mac_type <= e1000_82547_rev_2)
desc_len = sizeof(struct e1000_rx_desc);
else
desc_len = sizeof(union e1000_rx_desc_packet_split);
rxdr->next_to_clean = 0;
rxdr->next_to_use = 0;
+ rxdr->rx_skb_top = NULL;
+ rxdr->rx_skb_prev = NULL;
return 0;
}
{
int i, err = 0;
- for (i = 0; i < adapter->num_queues; i++) {
+ for (i = 0; i < adapter->num_rx_queues; i++) {
err = e1000_setup_rx_resources(adapter, &adapter->rx_ring[i]);
if (err) {
DPRINTK(PROBE, ERR,
{
uint32_t rctl, rfctl;
uint32_t psrctl = 0;
-#ifdef CONFIG_E1000_PACKET_SPLIT
+#ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
uint32_t pages = 0;
#endif
E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
(adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT);
- if(adapter->hw.tbi_compatibility_on == 1)
+ if (adapter->hw.mac_type > e1000_82543)
+ rctl |= E1000_RCTL_SECRC;
+
+ if (adapter->hw.tbi_compatibility_on == 1)
rctl |= E1000_RCTL_SBP;
else
rctl &= ~E1000_RCTL_SBP;
rctl |= E1000_RCTL_LPE;
/* Setup buffer sizes */
- if(adapter->hw.mac_type >= e1000_82571) {
+ if (adapter->hw.mac_type >= e1000_82571) {
/* We can now specify buffers in 1K increments.
* BSIZE and BSEX are ignored in this case. */
rctl |= adapter->rx_buffer_len << 0x11;
} else {
rctl &= ~E1000_RCTL_SZ_4096;
- rctl |= E1000_RCTL_BSEX;
- switch (adapter->rx_buffer_len) {
- case E1000_RXBUFFER_2048:
- default:
- rctl |= E1000_RCTL_SZ_2048;
- rctl &= ~E1000_RCTL_BSEX;
- break;
- case E1000_RXBUFFER_4096:
- rctl |= E1000_RCTL_SZ_4096;
- break;
- case E1000_RXBUFFER_8192:
- rctl |= E1000_RCTL_SZ_8192;
- break;
- case E1000_RXBUFFER_16384:
- rctl |= E1000_RCTL_SZ_16384;
- break;
- }
+ rctl &= ~E1000_RCTL_BSEX;
+ rctl |= E1000_RCTL_SZ_2048;
}
-#ifdef CONFIG_E1000_PACKET_SPLIT
+#ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
/* 82571 and greater support packet-split where the protocol
* header is placed in skb->data and the packet data is
* placed in pages hanging off of skb_shinfo(skb)->nr_frags.
E1000_WRITE_REG(&adapter->hw, RFCTL, rfctl);
rctl |= E1000_RCTL_DTYP_PS | E1000_RCTL_SECRC;
-
+
psrctl |= adapter->rx_ps_bsize0 >>
E1000_PSRCTL_BSIZE0_SHIFT;
if (hw->mac_type >= e1000_82540) {
E1000_WRITE_REG(hw, RADV, adapter->rx_abs_int_delay);
- if(adapter->itr > 1)
+ if (adapter->itr > 1)
E1000_WRITE_REG(hw, ITR,
1000000000 / (adapter->itr * 256));
}
if (hw->mac_type >= e1000_82571) {
- /* Reset delay timers after every interrupt */
ctrl_ext = E1000_READ_REG(hw, CTRL_EXT);
+ /* Reset delay timers after every interrupt */
ctrl_ext |= E1000_CTRL_EXT_CANC;
+#ifdef CONFIG_E1000_NAPI
+ /* Auto-Mask interrupts upon ICR read. */
+ ctrl_ext |= E1000_CTRL_EXT_IAME;
+#endif
E1000_WRITE_REG(hw, CTRL_EXT, ctrl_ext);
+ E1000_WRITE_REG(hw, IAM, ~0);
E1000_WRITE_FLUSH(hw);
}
/* Setup the HW Rx Head and Tail Descriptor Pointers and
* the Base and Length of the Rx Descriptor Ring */
- switch (adapter->num_queues) {
+ switch (adapter->num_rx_queues) {
#ifdef CONFIG_E1000_MQ
case 2:
rdba = adapter->rx_ring[1].dma;
}
#ifdef CONFIG_E1000_MQ
- if (adapter->num_queues > 1) {
+ if (adapter->num_rx_queues > 1) {
uint32_t random[10];
get_random_bytes(&random[0], 40);
E1000_WRITE_REG(hw, RSSIM, 0);
}
- switch (adapter->num_queues) {
+ switch (adapter->num_rx_queues) {
case 2:
default:
reta = 0x00800080;
/* Enable 82543 Receive Checksum Offload for TCP and UDP */
if (hw->mac_type >= e1000_82543) {
rxcsum = E1000_READ_REG(hw, RXCSUM);
- if(adapter->rx_csum == TRUE) {
+ if (adapter->rx_csum == TRUE) {
rxcsum |= E1000_RXCSUM_TUOFL;
/* Enable 82571 IPv4 payload checksum for UDP fragments
* Must be used in conjunction with packet-split. */
- if ((hw->mac_type >= e1000_82571) &&
- (adapter->rx_ps_pages)) {
+ if ((hw->mac_type >= e1000_82571) &&
+ (adapter->rx_ps_pages)) {
rxcsum |= E1000_RXCSUM_IPPCSE;
}
} else {
{
int i;
- for (i = 0; i < adapter->num_queues; i++)
+ for (i = 0; i < adapter->num_tx_queues; i++)
e1000_free_tx_resources(adapter, &adapter->tx_ring[i]);
}
e1000_unmap_and_free_tx_resource(struct e1000_adapter *adapter,
struct e1000_buffer *buffer_info)
{
- if(buffer_info->dma) {
+ if (buffer_info->dma) {
pci_unmap_page(adapter->pdev,
buffer_info->dma,
buffer_info->length,
PCI_DMA_TODEVICE);
- buffer_info->dma = 0;
}
- if(buffer_info->skb) {
+ if (buffer_info->skb)
dev_kfree_skb_any(buffer_info->skb);
- buffer_info->skb = NULL;
- }
+ memset(buffer_info, 0, sizeof(struct e1000_buffer));
}
/**
/* Free all the Tx ring sk_buffs */
- for(i = 0; i < tx_ring->count; i++) {
+ for (i = 0; i < tx_ring->count; i++) {
buffer_info = &tx_ring->buffer_info[i];
e1000_unmap_and_free_tx_resource(adapter, buffer_info);
}
{
int i;
- for (i = 0; i < adapter->num_queues; i++)
+ for (i = 0; i < adapter->num_tx_queues; i++)
e1000_clean_tx_ring(adapter, &adapter->tx_ring[i]);
}
{
int i;
- for (i = 0; i < adapter->num_queues; i++)
+ for (i = 0; i < adapter->num_rx_queues; i++)
e1000_free_rx_resources(adapter, &adapter->rx_ring[i]);
}
unsigned int i, j;
/* Free all the Rx ring sk_buffs */
-
- for(i = 0; i < rx_ring->count; i++) {
+ for (i = 0; i < rx_ring->count; i++) {
buffer_info = &rx_ring->buffer_info[i];
- if(buffer_info->skb) {
- ps_page = &rx_ring->ps_page[i];
- ps_page_dma = &rx_ring->ps_page_dma[i];
+ if (buffer_info->skb) {
pci_unmap_single(pdev,
buffer_info->dma,
buffer_info->length,
dev_kfree_skb(buffer_info->skb);
buffer_info->skb = NULL;
-
- for(j = 0; j < adapter->rx_ps_pages; j++) {
- if(!ps_page->ps_page[j]) break;
- pci_unmap_single(pdev,
- ps_page_dma->ps_page_dma[j],
- PAGE_SIZE, PCI_DMA_FROMDEVICE);
- ps_page_dma->ps_page_dma[j] = 0;
- put_page(ps_page->ps_page[j]);
- ps_page->ps_page[j] = NULL;
- }
}
+ ps_page = &rx_ring->ps_page[i];
+ ps_page_dma = &rx_ring->ps_page_dma[i];
+ for (j = 0; j < adapter->rx_ps_pages; j++) {
+ if (!ps_page->ps_page[j]) break;
+ pci_unmap_page(pdev,
+ ps_page_dma->ps_page_dma[j],
+ PAGE_SIZE, PCI_DMA_FROMDEVICE);
+ ps_page_dma->ps_page_dma[j] = 0;
+ put_page(ps_page->ps_page[j]);
+ ps_page->ps_page[j] = NULL;
+ }
+ }
+
+ /* there also may be some cached data in our adapter */
+ if (rx_ring->rx_skb_top) {
+ dev_kfree_skb(rx_ring->rx_skb_top);
+
+ /* rx_skb_prev will be wiped out by rx_skb_top */
+ rx_ring->rx_skb_top = NULL;
+ rx_ring->rx_skb_prev = NULL;
}
+
size = sizeof(struct e1000_buffer) * rx_ring->count;
memset(rx_ring->buffer_info, 0, size);
size = sizeof(struct e1000_ps_page) * rx_ring->count;
{
int i;
- for (i = 0; i < adapter->num_queues; i++)
+ for (i = 0; i < adapter->num_rx_queues; i++)
e1000_clean_rx_ring(adapter, &adapter->rx_ring[i]);
}
E1000_WRITE_FLUSH(&adapter->hw);
mdelay(5);
- if(netif_running(netdev))
+ if (netif_running(netdev))
e1000_clean_all_rx_rings(adapter);
}
E1000_WRITE_FLUSH(&adapter->hw);
mdelay(5);
- if(adapter->hw.pci_cmd_word & PCI_COMMAND_INVALIDATE)
+ if (adapter->hw.pci_cmd_word & PCI_COMMAND_INVALIDATE)
e1000_pci_set_mwi(&adapter->hw);
- if(netif_running(netdev)) {
+ if (netif_running(netdev)) {
+ /* No need to loop, because 82542 supports only 1 queue */
+ struct e1000_rx_ring *ring = &adapter->rx_ring[0];
e1000_configure_rx(adapter);
- e1000_alloc_rx_buffers(adapter, &adapter->rx_ring[0]);
+ adapter->alloc_rx_buf(adapter, ring, E1000_DESC_UNUSED(ring));
}
}
struct e1000_adapter *adapter = netdev_priv(netdev);
struct sockaddr *addr = p;
- if(!is_valid_ether_addr(addr->sa_data))
+ if (!is_valid_ether_addr(addr->sa_data))
return -EADDRNOTAVAIL;
/* 82542 2.0 needs to be in reset to write receive address registers */
- if(adapter->hw.mac_type == e1000_82542_rev2_0)
+ if (adapter->hw.mac_type == e1000_82542_rev2_0)
e1000_enter_82542_rst(adapter);
memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
/* activate the work around */
adapter->hw.laa_is_present = 1;
- /* Hold a copy of the LAA in RAR[14] This is done so that
- * between the time RAR[0] gets clobbered and the time it
- * gets fixed (in e1000_watchdog), the actual LAA is in one
+ /* Hold a copy of the LAA in RAR[14] This is done so that
+ * between the time RAR[0] gets clobbered and the time it
+ * gets fixed (in e1000_watchdog), the actual LAA is in one
* of the RARs and no incoming packets directed to this port
- * are dropped. Eventaully the LAA will be in RAR[0] and
+ * are dropped. Eventaully the LAA will be in RAR[0] and
* RAR[14] */
- e1000_rar_set(&adapter->hw, adapter->hw.mac_addr,
+ e1000_rar_set(&adapter->hw, adapter->hw.mac_addr,
E1000_RAR_ENTRIES - 1);
}
- if(adapter->hw.mac_type == e1000_82542_rev2_0)
+ if (adapter->hw.mac_type == e1000_82542_rev2_0)
e1000_leave_82542_rst(adapter);
return 0;
rctl = E1000_READ_REG(hw, RCTL);
- if(netdev->flags & IFF_PROMISC) {
+ if (netdev->flags & IFF_PROMISC) {
rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
- } else if(netdev->flags & IFF_ALLMULTI) {
+ } else if (netdev->flags & IFF_ALLMULTI) {
rctl |= E1000_RCTL_MPE;
rctl &= ~E1000_RCTL_UPE;
} else {
/* 82542 2.0 needs to be in reset to write receive address registers */
- if(hw->mac_type == e1000_82542_rev2_0)
+ if (hw->mac_type == e1000_82542_rev2_0)
e1000_enter_82542_rst(adapter);
/* load the first 14 multicast address into the exact filters 1-14
*/
mc_ptr = netdev->mc_list;
- for(i = 1; i < rar_entries; i++) {
+ for (i = 1; i < rar_entries; i++) {
if (mc_ptr) {
e1000_rar_set(hw, mc_ptr->dmi_addr, i);
mc_ptr = mc_ptr->next;
/* clear the old settings from the multicast hash table */
- for(i = 0; i < E1000_NUM_MTA_REGISTERS; i++)
+ for (i = 0; i < E1000_NUM_MTA_REGISTERS; i++)
E1000_WRITE_REG_ARRAY(hw, MTA, i, 0);
/* load any remaining addresses into the hash table */
- for(; mc_ptr; mc_ptr = mc_ptr->next) {
+ for (; mc_ptr; mc_ptr = mc_ptr->next) {
hash_value = e1000_hash_mc_addr(hw, mc_ptr->dmi_addr);
e1000_mta_set(hw, hash_value);
}
- if(hw->mac_type == e1000_82542_rev2_0)
+ if (hw->mac_type == e1000_82542_rev2_0)
e1000_leave_82542_rst(adapter);
}
struct net_device *netdev = adapter->netdev;
uint32_t tctl;
- if(atomic_read(&adapter->tx_fifo_stall)) {
- if((E1000_READ_REG(&adapter->hw, TDT) ==
+ if (atomic_read(&adapter->tx_fifo_stall)) {
+ if ((E1000_READ_REG(&adapter->hw, TDT) ==
E1000_READ_REG(&adapter->hw, TDH)) &&
(E1000_READ_REG(&adapter->hw, TDFT) ==
E1000_READ_REG(&adapter->hw, TDFH)) &&
e1000_watchdog_task(struct e1000_adapter *adapter)
{
struct net_device *netdev = adapter->netdev;
- struct e1000_tx_ring *txdr = &adapter->tx_ring[0];
+ struct e1000_tx_ring *txdr = adapter->tx_ring;
uint32_t link;
e1000_check_for_link(&adapter->hw);
if (adapter->hw.mac_type == e1000_82573) {
e1000_enable_tx_pkt_filtering(&adapter->hw);
- if(adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id)
+ if (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id)
e1000_update_mng_vlan(adapter);
- }
+ }
- if((adapter->hw.media_type == e1000_media_type_internal_serdes) &&
+ if ((adapter->hw.media_type == e1000_media_type_internal_serdes) &&
!(E1000_READ_REG(&adapter->hw, TXCW) & E1000_TXCW_ANE))
link = !adapter->hw.serdes_link_down;
else
link = E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU;
- if(link) {
- if(!netif_carrier_ok(netdev)) {
+ if (link) {
+ if (!netif_carrier_ok(netdev)) {
e1000_get_speed_and_duplex(&adapter->hw,
&adapter->link_speed,
&adapter->link_duplex);
adapter->link_duplex == FULL_DUPLEX ?
"Full Duplex" : "Half Duplex");
+ /* tweak tx_queue_len according to speed/duplex */
+ netdev->tx_queue_len = adapter->tx_queue_len;
+ adapter->tx_timeout_factor = 1;
+ if (adapter->link_duplex == HALF_DUPLEX) {
+ switch (adapter->link_speed) {
+ case SPEED_10:
+ netdev->tx_queue_len = 10;
+ adapter->tx_timeout_factor = 8;
+ break;
+ case SPEED_100:
+ netdev->tx_queue_len = 100;
+ break;
+ }
+ }
+
netif_carrier_on(netdev);
netif_wake_queue(netdev);
mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
adapter->smartspeed = 0;
}
} else {
- if(netif_carrier_ok(netdev)) {
+ if (netif_carrier_ok(netdev)) {
adapter->link_speed = 0;
adapter->link_duplex = 0;
DPRINTK(LINK, INFO, "NIC Link is Down\n");
e1000_update_adaptive(&adapter->hw);
- if (adapter->num_queues == 1 && !netif_carrier_ok(netdev)) {
+#ifdef CONFIG_E1000_MQ
+ txdr = *per_cpu_ptr(adapter->cpu_tx_ring, smp_processor_id());
+#endif
+ if (!netif_carrier_ok(netdev)) {
if (E1000_DESC_UNUSED(txdr) + 1 < txdr->count) {
/* We've lost link, so the controller stops DMA,
* but we've got queued Tx work that's never going
}
/* Dynamic mode for Interrupt Throttle Rate (ITR) */
- if(adapter->hw.mac_type >= e1000_82540 && adapter->itr == 1) {
+ if (adapter->hw.mac_type >= e1000_82540 && adapter->itr == 1) {
/* Symmetric Tx/Rx gets a reduced ITR=2000; Total
* asymmetrical Tx or Rx gets ITR=8000; everyone
* else is between 2000-8000. */
uint32_t goc = (adapter->gotcl + adapter->gorcl) / 10000;
- uint32_t dif = (adapter->gotcl > adapter->gorcl ?
+ uint32_t dif = (adapter->gotcl > adapter->gorcl ?
adapter->gotcl - adapter->gorcl :
adapter->gorcl - adapter->gotcl) / 10000;
uint32_t itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000;
/* Force detection of hung controller every watchdog period */
adapter->detect_tx_hung = TRUE;
- /* With 82571 controllers, LAA may be overwritten due to controller
+ /* With 82571 controllers, LAA may be overwritten due to controller
* reset from the other port. Set the appropriate LAA in RAR[0] */
if (adapter->hw.mac_type == e1000_82571 && adapter->hw.laa_is_present)
e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
{
#ifdef NETIF_F_TSO
struct e1000_context_desc *context_desc;
+ struct e1000_buffer *buffer_info;
unsigned int i;
uint32_t cmd_length = 0;
uint16_t ipcse = 0, tucse, mss;
uint8_t ipcss, ipcso, tucss, tucso, hdr_len;
int err;
- if(skb_shinfo(skb)->tso_size) {
+ if (skb_shinfo(skb)->tso_size) {
if (skb_header_cloned(skb)) {
err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
if (err)
hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
mss = skb_shinfo(skb)->tso_size;
- if(skb->protocol == ntohs(ETH_P_IP)) {
+ if (skb->protocol == ntohs(ETH_P_IP)) {
skb->nh.iph->tot_len = 0;
skb->nh.iph->check = 0;
skb->h.th->check =
cmd_length = E1000_TXD_CMD_IP;
ipcse = skb->h.raw - skb->data - 1;
#ifdef NETIF_F_TSO_IPV6
- } else if(skb->protocol == ntohs(ETH_P_IPV6)) {
+ } else if (skb->protocol == ntohs(ETH_P_IPV6)) {
skb->nh.ipv6h->payload_len = 0;
skb->h.th->check =
~csum_ipv6_magic(&skb->nh.ipv6h->saddr,
i = tx_ring->next_to_use;
context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
+ buffer_info = &tx_ring->buffer_info[i];
context_desc->lower_setup.ip_fields.ipcss = ipcss;
context_desc->lower_setup.ip_fields.ipcso = ipcso;
context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
context_desc->cmd_and_length = cpu_to_le32(cmd_length);
+ buffer_info->time_stamp = jiffies;
+
if (++i == tx_ring->count) i = 0;
tx_ring->next_to_use = i;
- return 1;
+ return TRUE;
}
#endif
- return 0;
+ return FALSE;
}
static inline boolean_t
struct sk_buff *skb)
{
struct e1000_context_desc *context_desc;
+ struct e1000_buffer *buffer_info;
unsigned int i;
uint8_t css;
- if(likely(skb->ip_summed == CHECKSUM_HW)) {
+ if (likely(skb->ip_summed == CHECKSUM_HW)) {
css = skb->h.raw - skb->data;
i = tx_ring->next_to_use;
+ buffer_info = &tx_ring->buffer_info[i];
context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
context_desc->upper_setup.tcp_fields.tucss = css;
context_desc->tcp_seg_setup.data = 0;
context_desc->cmd_and_length = cpu_to_le32(E1000_TXD_CMD_DEXT);
+ buffer_info->time_stamp = jiffies;
+
if (unlikely(++i == tx_ring->count)) i = 0;
tx_ring->next_to_use = i;
i = tx_ring->next_to_use;
- while(len) {
+ while (len) {
buffer_info = &tx_ring->buffer_info[i];
size = min(len, max_per_txd);
#ifdef NETIF_F_TSO
/* Workaround for premature desc write-backs
* in TSO mode. Append 4-byte sentinel desc */
- if(unlikely(mss && !nr_frags && size == len && size > 8))
+ if (unlikely(mss && !nr_frags && size == len && size > 8))
size -= 4;
#endif
/* work-around for errata 10 and it applies
* The fix is to make sure that the first descriptor of a
* packet is smaller than 2048 - 16 - 16 (or 2016) bytes
*/
- if(unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
+ if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
(size > 2015) && count == 0))
size = 2015;
-
+
/* Workaround for potential 82544 hang in PCI-X. Avoid
* terminating buffers within evenly-aligned dwords. */
- if(unlikely(adapter->pcix_82544 &&
+ if (unlikely(adapter->pcix_82544 &&
!((unsigned long)(skb->data + offset + size - 1) & 4) &&
size > 4))
size -= 4;
len -= size;
offset += size;
count++;
- if(unlikely(++i == tx_ring->count)) i = 0;
+ if (unlikely(++i == tx_ring->count)) i = 0;
}
- for(f = 0; f < nr_frags; f++) {
+ for (f = 0; f < nr_frags; f++) {
struct skb_frag_struct *frag;
frag = &skb_shinfo(skb)->frags[f];
len = frag->size;
offset = frag->page_offset;
- while(len) {
+ while (len) {
buffer_info = &tx_ring->buffer_info[i];
size = min(len, max_per_txd);
#ifdef NETIF_F_TSO
/* Workaround for premature desc write-backs
* in TSO mode. Append 4-byte sentinel desc */
- if(unlikely(mss && f == (nr_frags-1) && size == len && size > 8))
+ if (unlikely(mss && f == (nr_frags-1) && size == len && size > 8))
size -= 4;
#endif
/* Workaround for potential 82544 hang in PCI-X.
* Avoid terminating buffers within evenly-aligned
* dwords. */
- if(unlikely(adapter->pcix_82544 &&
+ if (unlikely(adapter->pcix_82544 &&
!((unsigned long)(frag->page+offset+size-1) & 4) &&
size > 4))
size -= 4;
len -= size;
offset += size;
count++;
- if(unlikely(++i == tx_ring->count)) i = 0;
+ if (unlikely(++i == tx_ring->count)) i = 0;
}
}
uint32_t txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
unsigned int i;
- if(likely(tx_flags & E1000_TX_FLAGS_TSO)) {
+ if (likely(tx_flags & E1000_TX_FLAGS_TSO)) {
txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
E1000_TXD_CMD_TSE;
txd_upper |= E1000_TXD_POPTS_TXSM << 8;
- if(likely(tx_flags & E1000_TX_FLAGS_IPV4))
+ if (likely(tx_flags & E1000_TX_FLAGS_IPV4))
txd_upper |= E1000_TXD_POPTS_IXSM << 8;
}
- if(likely(tx_flags & E1000_TX_FLAGS_CSUM)) {
+ if (likely(tx_flags & E1000_TX_FLAGS_CSUM)) {
txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
txd_upper |= E1000_TXD_POPTS_TXSM << 8;
}
- if(unlikely(tx_flags & E1000_TX_FLAGS_VLAN)) {
+ if (unlikely(tx_flags & E1000_TX_FLAGS_VLAN)) {
txd_lower |= E1000_TXD_CMD_VLE;
txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
}
i = tx_ring->next_to_use;
- while(count--) {
+ while (count--) {
buffer_info = &tx_ring->buffer_info[i];
tx_desc = E1000_TX_DESC(*tx_ring, i);
tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
tx_desc->lower.data =
cpu_to_le32(txd_lower | buffer_info->length);
tx_desc->upper.data = cpu_to_le32(txd_upper);
- if(unlikely(++i == tx_ring->count)) i = 0;
+ if (unlikely(++i == tx_ring->count)) i = 0;
}
tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
E1000_ROUNDUP(skb_fifo_len, E1000_FIFO_HDR);
- if(adapter->link_duplex != HALF_DUPLEX)
+ if (adapter->link_duplex != HALF_DUPLEX)
goto no_fifo_stall_required;
- if(atomic_read(&adapter->tx_fifo_stall))
+ if (atomic_read(&adapter->tx_fifo_stall))
return 1;
- if(skb_fifo_len >= (E1000_82547_PAD_LEN + fifo_space)) {
+ if (skb_fifo_len >= (E1000_82547_PAD_LEN + fifo_space)) {
atomic_set(&adapter->tx_fifo_stall, 1);
return 1;
}
no_fifo_stall_required:
adapter->tx_fifo_head += skb_fifo_len;
- if(adapter->tx_fifo_head >= adapter->tx_fifo_size)
+ if (adapter->tx_fifo_head >= adapter->tx_fifo_size)
adapter->tx_fifo_head -= adapter->tx_fifo_size;
return 0;
}
{
struct e1000_hw *hw = &adapter->hw;
uint16_t length, offset;
- if(vlan_tx_tag_present(skb)) {
- if(!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
+ if (vlan_tx_tag_present(skb)) {
+ if (!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
( adapter->hw.mng_cookie.status &
E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) )
return 0;
}
- if ((skb->len > MINIMUM_DHCP_PACKET_SIZE) && (!skb->protocol)) {
+ if ((skb->len > MINIMUM_DHCP_PACKET_SIZE) && (!skb->protocol)) {
struct ethhdr *eth = (struct ethhdr *) skb->data;
- if((htons(ETH_P_IP) == eth->h_proto)) {
- const struct iphdr *ip =
+ if ((htons(ETH_P_IP) == eth->h_proto)) {
+ const struct iphdr *ip =
(struct iphdr *)((uint8_t *)skb->data+14);
- if(IPPROTO_UDP == ip->protocol) {
- struct udphdr *udp =
- (struct udphdr *)((uint8_t *)ip +
+ if (IPPROTO_UDP == ip->protocol) {
+ struct udphdr *udp =
+ (struct udphdr *)((uint8_t *)ip +
(ip->ihl << 2));
- if(ntohs(udp->dest) == 67) {
+ if (ntohs(udp->dest) == 67) {
offset = (uint8_t *)udp + 8 - skb->data;
length = skb->len - offset;
return e1000_mng_write_dhcp_info(hw,
- (uint8_t *)udp + 8,
+ (uint8_t *)udp + 8,
length);
}
}
unsigned int nr_frags = 0;
unsigned int mss = 0;
int count = 0;
- int tso;
+ int tso;
unsigned int f;
len -= skb->data_len;
* 4 = ceil(buffer len/mss). To make sure we don't
* overrun the FIFO, adjust the max buffer len if mss
* drops. */
- if(mss) {
+ if (mss) {
+ uint8_t hdr_len;
max_per_txd = min(mss << 2, max_per_txd);
max_txd_pwr = fls(max_per_txd) - 1;
+
+ /* TSO Workaround for 82571/2 Controllers -- if skb->data
+ * points to just header, pull a few bytes of payload from
+ * frags into skb->data */
+ hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
+ if (skb->data_len && (hdr_len == (skb->len - skb->data_len)) &&
+ (adapter->hw.mac_type == e1000_82571 ||
+ adapter->hw.mac_type == e1000_82572)) {
+ unsigned int pull_size;
+ pull_size = min((unsigned int)4, skb->data_len);
+ if (!__pskb_pull_tail(skb, pull_size)) {
+ printk(KERN_ERR "__pskb_pull_tail failed.\n");
+ dev_kfree_skb_any(skb);
+ return -EFAULT;
+ }
+ len = skb->len - skb->data_len;
+ }
}
- if((mss) || (skb->ip_summed == CHECKSUM_HW))
+ /* reserve a descriptor for the offload context */
+ if ((mss) || (skb->ip_summed == CHECKSUM_HW))
count++;
count++;
#else
- if(skb->ip_summed == CHECKSUM_HW)
+ if (skb->ip_summed == CHECKSUM_HW)
count++;
#endif
count += TXD_USE_COUNT(len, max_txd_pwr);
- if(adapter->pcix_82544)
+ if (adapter->pcix_82544)
count++;
- /* work-around for errata 10 and it applies to all controllers
+ /* work-around for errata 10 and it applies to all controllers
* in PCI-X mode, so add one more descriptor to the count
*/
- if(unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
+ if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
(len > 2015)))
count++;
nr_frags = skb_shinfo(skb)->nr_frags;
- for(f = 0; f < nr_frags; f++)
+ for (f = 0; f < nr_frags; f++)
count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
max_txd_pwr);
- if(adapter->pcix_82544)
+ if (adapter->pcix_82544)
count += nr_frags;
-#ifdef NETIF_F_TSO
- /* TSO Workaround for 82571/2 Controllers -- if skb->data
- * points to just header, pull a few bytes of payload from
- * frags into skb->data */
- if (skb_shinfo(skb)->tso_size) {
- uint8_t hdr_len;
- hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
- if (skb->data_len && (hdr_len < (skb->len - skb->data_len)) &&
- (adapter->hw.mac_type == e1000_82571 ||
- adapter->hw.mac_type == e1000_82572)) {
- unsigned int pull_size;
- pull_size = min((unsigned int)4, skb->data_len);
- if (!__pskb_pull_tail(skb, pull_size)) {
- printk(KERN_ERR "__pskb_pull_tail failed.\n");
- dev_kfree_skb_any(skb);
- return -EFAULT;
- }
- }
- }
-#endif
-
- if(adapter->hw.tx_pkt_filtering && (adapter->hw.mac_type == e1000_82573) )
+ if (adapter->hw.tx_pkt_filtering && (adapter->hw.mac_type == e1000_82573) )
e1000_transfer_dhcp_info(adapter, skb);
local_irq_save(flags);
return NETDEV_TX_BUSY;
}
- if(unlikely(adapter->hw.mac_type == e1000_82547)) {
- if(unlikely(e1000_82547_fifo_workaround(adapter, skb))) {
+ if (unlikely(adapter->hw.mac_type == e1000_82547)) {
+ if (unlikely(e1000_82547_fifo_workaround(adapter, skb))) {
netif_stop_queue(netdev);
mod_timer(&adapter->tx_fifo_stall_timer, jiffies);
spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
}
}
- if(unlikely(adapter->vlgrp && vlan_tx_tag_present(skb))) {
+ if (unlikely(adapter->vlgrp && vlan_tx_tag_present(skb))) {
tx_flags |= E1000_TX_FLAGS_VLAN;
tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
}
first = tx_ring->next_to_use;
-
+
tso = e1000_tso(adapter, tx_ring, skb);
if (tso < 0) {
dev_kfree_skb_any(skb);
{
struct e1000_adapter *adapter = netdev_priv(netdev);
+ adapter->tx_timeout_count++;
e1000_down(adapter);
e1000_up(adapter);
}
{
struct e1000_adapter *adapter = netdev_priv(netdev);
- e1000_update_stats(adapter);
+ /* only return the current stats */
return &adapter->net_stats;
}
struct e1000_adapter *adapter = netdev_priv(netdev);
int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
- if((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) ||
- (max_frame > MAX_JUMBO_FRAME_SIZE)) {
- DPRINTK(PROBE, ERR, "Invalid MTU setting\n");
- return -EINVAL;
- }
-
-#define MAX_STD_JUMBO_FRAME_SIZE 9234
- /* might want this to be bigger enum check... */
- /* 82571 controllers limit jumbo frame size to 10500 bytes */
- if ((adapter->hw.mac_type == e1000_82571 ||
- adapter->hw.mac_type == e1000_82572) &&
- max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
- DPRINTK(PROBE, ERR, "MTU > 9216 bytes not supported "
- "on 82571 and 82572 controllers.\n");
- return -EINVAL;
- }
-
- if(adapter->hw.mac_type == e1000_82573 &&
- max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
- DPRINTK(PROBE, ERR, "Jumbo Frames not supported "
- "on 82573\n");
+ if ((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) ||
+ (max_frame > MAX_JUMBO_FRAME_SIZE)) {
+ DPRINTK(PROBE, ERR, "Invalid MTU setting\n");
return -EINVAL;
}
- if(adapter->hw.mac_type > e1000_82547_rev_2) {
- adapter->rx_buffer_len = max_frame;
- E1000_ROUNDUP(adapter->rx_buffer_len, 1024);
- } else {
- if(unlikely((adapter->hw.mac_type < e1000_82543) &&
- (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE))) {
- DPRINTK(PROBE, ERR, "Jumbo Frames not supported "
- "on 82542\n");
+ /* Adapter-specific max frame size limits. */
+ switch (adapter->hw.mac_type) {
+ case e1000_82542_rev2_0:
+ case e1000_82542_rev2_1:
+ case e1000_82573:
+ if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
+ DPRINTK(PROBE, ERR, "Jumbo Frames not supported.\n");
+ return -EINVAL;
+ }
+ break;
+ case e1000_82571:
+ case e1000_82572:
+#define MAX_STD_JUMBO_FRAME_SIZE 9234
+ if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
+ DPRINTK(PROBE, ERR, "MTU > 9216 not supported.\n");
return -EINVAL;
-
- } else {
- if(max_frame <= E1000_RXBUFFER_2048) {
- adapter->rx_buffer_len = E1000_RXBUFFER_2048;
- } else if(max_frame <= E1000_RXBUFFER_4096) {
- adapter->rx_buffer_len = E1000_RXBUFFER_4096;
- } else if(max_frame <= E1000_RXBUFFER_8192) {
- adapter->rx_buffer_len = E1000_RXBUFFER_8192;
- } else if(max_frame <= E1000_RXBUFFER_16384) {
- adapter->rx_buffer_len = E1000_RXBUFFER_16384;
- }
}
+ break;
+ default:
+ /* Capable of supporting up to MAX_JUMBO_FRAME_SIZE limit. */
+ break;
}
+ /* since the driver code now supports splitting a packet across
+ * multiple descriptors, most of the fifo related limitations on
+ * jumbo frame traffic have gone away.
+ * simply use 2k descriptors for everything.
+ *
+ * NOTE: dev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
+ * means we reserve 2 more, this pushes us to allocate from the next
+ * larger slab size
+ * i.e. RXBUFFER_2048 --> size-4096 slab */
+
+ /* recent hardware supports 1KB granularity */
+ if (adapter->hw.mac_type > e1000_82547_rev_2) {
+ adapter->rx_buffer_len =
+ ((max_frame < E1000_RXBUFFER_2048) ?
+ max_frame : E1000_RXBUFFER_2048);
+ E1000_ROUNDUP(adapter->rx_buffer_len, 1024);
+ } else
+ adapter->rx_buffer_len = E1000_RXBUFFER_2048;
+
netdev->mtu = new_mtu;
- if(netif_running(netdev)) {
+ if (netif_running(netdev)) {
e1000_down(adapter);
e1000_up(adapter);
}
hw->collision_delta = E1000_READ_REG(hw, COLC);
adapter->stats.colc += hw->collision_delta;
- if(hw->mac_type >= e1000_82543) {
+ if (hw->mac_type >= e1000_82543) {
adapter->stats.algnerrc += E1000_READ_REG(hw, ALGNERRC);
adapter->stats.rxerrc += E1000_READ_REG(hw, RXERRC);
adapter->stats.tncrs += E1000_READ_REG(hw, TNCRS);
adapter->stats.tsctc += E1000_READ_REG(hw, TSCTC);
adapter->stats.tsctfc += E1000_READ_REG(hw, TSCTFC);
}
- if(hw->mac_type > e1000_82547_rev_2) {
+ if (hw->mac_type > e1000_82547_rev_2) {
adapter->stats.iac += E1000_READ_REG(hw, IAC);
adapter->stats.icrxoc += E1000_READ_REG(hw, ICRXOC);
adapter->stats.icrxptc += E1000_READ_REG(hw, ICRXPTC);
adapter->net_stats.rx_errors = adapter->stats.rxerrc +
adapter->stats.crcerrs + adapter->stats.algnerrc +
- adapter->stats.rlec + adapter->stats.mpc +
- adapter->stats.cexterr;
+ adapter->stats.rlec + adapter->stats.cexterr;
+ adapter->net_stats.rx_dropped = 0;
adapter->net_stats.rx_length_errors = adapter->stats.rlec;
adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc;
- adapter->net_stats.rx_fifo_errors = adapter->stats.mpc;
adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
/* Tx Errors */
/* Phy Stats */
- if(hw->media_type == e1000_media_type_copper) {
- if((adapter->link_speed == SPEED_1000) &&
+ if (hw->media_type == e1000_media_type_copper) {
+ if ((adapter->link_speed == SPEED_1000) &&
(!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
adapter->phy_stats.idle_errors += phy_tmp;
}
- if((hw->mac_type <= e1000_82546) &&
+ if ((hw->mac_type <= e1000_82546) &&
(hw->phy_type == e1000_phy_m88) &&
!e1000_read_phy_reg(hw, M88E1000_RX_ERR_CNTR, &phy_tmp))
adapter->phy_stats.receive_errors += phy_tmp;
struct e1000_adapter *adapter = netdev_priv(netdev);
struct e1000_hw *hw = &adapter->hw;
uint32_t icr = E1000_READ_REG(hw, ICR);
-#if defined(CONFIG_E1000_NAPI) && defined(CONFIG_E1000_MQ) || !defined(CONFIG_E1000_NAPI)
+#ifndef CONFIG_E1000_NAPI
int i;
+#else
+ /* Interrupt Auto-Mask...upon reading ICR,
+ * interrupts are masked. No need for the
+ * IMC write, but it does mean we should
+ * account for it ASAP. */
+ if (likely(hw->mac_type >= e1000_82571))
+ atomic_inc(&adapter->irq_sem);
#endif
- if(unlikely(!icr))
+ if (unlikely(!icr)) {
+#ifdef CONFIG_E1000_NAPI
+ if (hw->mac_type >= e1000_82571)
+ e1000_irq_enable(adapter);
+#endif
return IRQ_NONE; /* Not our interrupt */
+ }
- if(unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) {
+ if (unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) {
hw->get_link_status = 1;
mod_timer(&adapter->watchdog_timer, jiffies);
}
#ifdef CONFIG_E1000_NAPI
- atomic_inc(&adapter->irq_sem);
- E1000_WRITE_REG(hw, IMC, ~0);
- E1000_WRITE_FLUSH(hw);
+ if (unlikely(hw->mac_type < e1000_82571)) {
+ atomic_inc(&adapter->irq_sem);
+ E1000_WRITE_REG(hw, IMC, ~0);
+ E1000_WRITE_FLUSH(hw);
+ }
#ifdef CONFIG_E1000_MQ
if (atomic_read(&adapter->rx_sched_call_data.count) == 0) {
- cpu_set(adapter->cpu_for_queue[0],
- adapter->rx_sched_call_data.cpumask);
- for (i = 1; i < adapter->num_queues; i++) {
- cpu_set(adapter->cpu_for_queue[i],
- adapter->rx_sched_call_data.cpumask);
- atomic_inc(&adapter->irq_sem);
- }
- atomic_set(&adapter->rx_sched_call_data.count, i);
+ /* We must setup the cpumask once count == 0 since
+ * each cpu bit is cleared when the work is done. */
+ adapter->rx_sched_call_data.cpumask = adapter->cpumask;
+ atomic_add(adapter->num_rx_queues - 1, &adapter->irq_sem);
+ atomic_set(&adapter->rx_sched_call_data.count,
+ adapter->num_rx_queues);
smp_call_async_mask(&adapter->rx_sched_call_data);
} else {
printk("call_data.count == %u\n", atomic_read(&adapter->rx_sched_call_data.count));
#else /* if !CONFIG_E1000_NAPI */
/* Writing IMC and IMS is needed for 82547.
- Due to Hub Link bus being occupied, an interrupt
- de-assertion message is not able to be sent.
- When an interrupt assertion message is generated later,
- two messages are re-ordered and sent out.
- That causes APIC to think 82547 is in de-assertion
- state, while 82547 is in assertion state, resulting
- in dead lock. Writing IMC forces 82547 into
- de-assertion state.
- */
- if(hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2){
+ * Due to Hub Link bus being occupied, an interrupt
+ * de-assertion message is not able to be sent.
+ * When an interrupt assertion message is generated later,
+ * two messages are re-ordered and sent out.
+ * That causes APIC to think 82547 is in de-assertion
+ * state, while 82547 is in assertion state, resulting
+ * in dead lock. Writing IMC forces 82547 into
+ * de-assertion state.
+ */
+ if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2) {
atomic_inc(&adapter->irq_sem);
E1000_WRITE_REG(hw, IMC, ~0);
}
- for(i = 0; i < E1000_MAX_INTR; i++)
- if(unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) &
+ for (i = 0; i < E1000_MAX_INTR; i++)
+ if (unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) &
!e1000_clean_tx_irq(adapter, adapter->tx_ring)))
break;
- if(hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2)
+ if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2)
e1000_irq_enable(adapter);
#endif /* CONFIG_E1000_NAPI */
{
struct e1000_adapter *adapter;
int work_to_do = min(*budget, poll_dev->quota);
- int tx_cleaned, i = 0, work_done = 0;
+ int tx_cleaned = 0, i = 0, work_done = 0;
/* Must NOT use netdev_priv macro here. */
adapter = poll_dev->priv;
while (poll_dev != &adapter->polling_netdev[i]) {
i++;
- if (unlikely(i == adapter->num_queues))
+ if (unlikely(i == adapter->num_rx_queues))
BUG();
}
- tx_cleaned = e1000_clean_tx_irq(adapter, &adapter->tx_ring[i]);
+ if (likely(adapter->num_tx_queues == 1)) {
+ /* e1000_clean is called per-cpu. This lock protects
+ * tx_ring[0] from being cleaned by multiple cpus
+ * simultaneously. A failure obtaining the lock means
+ * tx_ring[0] is currently being cleaned anyway. */
+ if (spin_trylock(&adapter->tx_queue_lock)) {
+ tx_cleaned = e1000_clean_tx_irq(adapter,
+ &adapter->tx_ring[0]);
+ spin_unlock(&adapter->tx_queue_lock);
+ }
+ } else
+ tx_cleaned = e1000_clean_tx_irq(adapter, &adapter->tx_ring[i]);
+
adapter->clean_rx(adapter, &adapter->rx_ring[i],
&work_done, work_to_do);
*budget -= work_done;
poll_dev->quota -= work_done;
-
+
/* If no Tx and not enough Rx work done, exit the polling mode */
- if((!tx_cleaned && (work_done == 0)) ||
+ if ((!tx_cleaned && (work_done == 0)) ||
!netif_running(adapter->netdev)) {
quit_polling:
netif_rx_complete(poll_dev);
eop_desc = E1000_TX_DESC(*tx_ring, eop);
while (eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) {
- for(cleaned = FALSE; !cleaned; ) {
+ for (cleaned = FALSE; !cleaned; ) {
tx_desc = E1000_TX_DESC(*tx_ring, i);
buffer_info = &tx_ring->buffer_info[i];
cleaned = (i == eop);
+#ifdef CONFIG_E1000_MQ
+ tx_ring->tx_stats.bytes += buffer_info->length;
+#endif
e1000_unmap_and_free_tx_resource(adapter, buffer_info);
+ memset(tx_desc, 0, sizeof(struct e1000_tx_desc));
- tx_desc->buffer_addr = 0;
- tx_desc->lower.data = 0;
- tx_desc->upper.data = 0;
-
- if(unlikely(++i == tx_ring->count)) i = 0;
+ if (unlikely(++i == tx_ring->count)) i = 0;
}
- tx_ring->pkt++;
-
+#ifdef CONFIG_E1000_MQ
+ tx_ring->tx_stats.packets++;
+#endif
+
eop = tx_ring->buffer_info[i].next_to_watch;
eop_desc = E1000_TX_DESC(*tx_ring, eop);
}
spin_lock(&tx_ring->tx_lock);
- if(unlikely(cleaned && netif_queue_stopped(netdev) &&
+ if (unlikely(cleaned && netif_queue_stopped(netdev) &&
netif_carrier_ok(netdev)))
netif_wake_queue(netdev);
/* Detect a transmit hang in hardware, this serializes the
* check with the clearing of time_stamp and movement of i */
adapter->detect_tx_hung = FALSE;
- if (tx_ring->buffer_info[i].dma &&
- time_after(jiffies, tx_ring->buffer_info[i].time_stamp + HZ)
+ if (tx_ring->buffer_info[eop].dma &&
+ time_after(jiffies, tx_ring->buffer_info[eop].time_stamp +
+ adapter->tx_timeout_factor * HZ)
&& !(E1000_READ_REG(&adapter->hw, STATUS) &
- E1000_STATUS_TXOFF)) {
+ E1000_STATUS_TXOFF)) {
/* detected Tx unit hang */
- i = tx_ring->next_to_clean;
- eop = tx_ring->buffer_info[i].next_to_watch;
- eop_desc = E1000_TX_DESC(*tx_ring, eop);
DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
+ " Tx Queue <%lu>\n"
" TDH <%x>\n"
" TDT <%x>\n"
" next_to_use <%x>\n"
" next_to_clean <%x>\n"
"buffer_info[next_to_clean]\n"
- " dma <%llx>\n"
" time_stamp <%lx>\n"
" next_to_watch <%x>\n"
" jiffies <%lx>\n"
" next_to_watch.status <%x>\n",
+ (unsigned long)((tx_ring - adapter->tx_ring) /
+ sizeof(struct e1000_tx_ring)),
readl(adapter->hw.hw_addr + tx_ring->tdh),
readl(adapter->hw.hw_addr + tx_ring->tdt),
tx_ring->next_to_use,
- i,
- (unsigned long long)tx_ring->buffer_info[i].dma,
- tx_ring->buffer_info[i].time_stamp,
+ tx_ring->next_to_clean,
+ tx_ring->buffer_info[eop].time_stamp,
eop,
jiffies,
eop_desc->upper.fields.status);
skb->ip_summed = CHECKSUM_NONE;
/* 82543 or newer only */
- if(unlikely(adapter->hw.mac_type < e1000_82543)) return;
+ if (unlikely(adapter->hw.mac_type < e1000_82543)) return;
/* Ignore Checksum bit is set */
- if(unlikely(status & E1000_RXD_STAT_IXSM)) return;
+ if (unlikely(status & E1000_RXD_STAT_IXSM)) return;
/* TCP/UDP checksum error bit is set */
- if(unlikely(errors & E1000_RXD_ERR_TCPE)) {
+ if (unlikely(errors & E1000_RXD_ERR_TCPE)) {
/* let the stack verify checksum errors */
adapter->hw_csum_err++;
return;
}
/* TCP/UDP Checksum has not been calculated */
- if(adapter->hw.mac_type <= e1000_82547_rev_2) {
- if(!(status & E1000_RXD_STAT_TCPCS))
+ if (adapter->hw.mac_type <= e1000_82547_rev_2) {
+ if (!(status & E1000_RXD_STAT_TCPCS))
return;
} else {
- if(!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
+ if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
return;
}
/* It must be a TCP or UDP packet with a valid checksum */
{
struct net_device *netdev = adapter->netdev;
struct pci_dev *pdev = adapter->pdev;
- struct e1000_rx_desc *rx_desc;
- struct e1000_buffer *buffer_info;
- struct sk_buff *skb;
+ struct e1000_rx_desc *rx_desc, *next_rxd;
+ struct e1000_buffer *buffer_info, *next_buffer;
unsigned long flags;
uint32_t length;
uint8_t last_byte;
unsigned int i;
- boolean_t cleaned = FALSE;
+ int cleaned_count = 0;
+ boolean_t cleaned = FALSE, multi_descriptor = FALSE;
i = rx_ring->next_to_clean;
rx_desc = E1000_RX_DESC(*rx_ring, i);
+ buffer_info = &rx_ring->buffer_info[i];
- while(rx_desc->status & E1000_RXD_STAT_DD) {
- buffer_info = &rx_ring->buffer_info[i];
+ while (rx_desc->status & E1000_RXD_STAT_DD) {
+ struct sk_buff *skb, *next_skb;
+ u8 status;
#ifdef CONFIG_E1000_NAPI
- if(*work_done >= work_to_do)
+ if (*work_done >= work_to_do)
break;
(*work_done)++;
#endif
- cleaned = TRUE;
+ status = rx_desc->status;
+ skb = buffer_info->skb;
+ buffer_info->skb = NULL;
+
+ if (++i == rx_ring->count) i = 0;
+ next_rxd = E1000_RX_DESC(*rx_ring, i);
+ next_buffer = &rx_ring->buffer_info[i];
+ next_skb = next_buffer->skb;
+ cleaned = TRUE;
+ cleaned_count++;
pci_unmap_single(pdev,
buffer_info->dma,
buffer_info->length,
PCI_DMA_FROMDEVICE);
- skb = buffer_info->skb;
length = le16_to_cpu(rx_desc->length);
- if(unlikely(!(rx_desc->status & E1000_RXD_STAT_EOP))) {
- /* All receives must fit into a single buffer */
- E1000_DBG("%s: Receive packet consumed multiple"
- " buffers\n", netdev->name);
- dev_kfree_skb_irq(skb);
+ skb_put(skb, length);
+
+ if (!(status & E1000_RXD_STAT_EOP)) {
+ if (!rx_ring->rx_skb_top) {
+ rx_ring->rx_skb_top = skb;
+ rx_ring->rx_skb_top->len = length;
+ rx_ring->rx_skb_prev = skb;
+ } else {
+ if (skb_shinfo(rx_ring->rx_skb_top)->frag_list) {
+ rx_ring->rx_skb_prev->next = skb;
+ skb->prev = rx_ring->rx_skb_prev;
+ } else {
+ skb_shinfo(rx_ring->rx_skb_top)->frag_list = skb;
+ }
+ rx_ring->rx_skb_prev = skb;
+ rx_ring->rx_skb_top->data_len += length;
+ }
goto next_desc;
+ } else {
+ if (rx_ring->rx_skb_top) {
+ if (skb_shinfo(rx_ring->rx_skb_top)
+ ->frag_list) {
+ rx_ring->rx_skb_prev->next = skb;
+ skb->prev = rx_ring->rx_skb_prev;
+ } else
+ skb_shinfo(rx_ring->rx_skb_top)
+ ->frag_list = skb;
+
+ rx_ring->rx_skb_top->data_len += length;
+ rx_ring->rx_skb_top->len +=
+ rx_ring->rx_skb_top->data_len;
+
+ skb = rx_ring->rx_skb_top;
+ multi_descriptor = TRUE;
+ rx_ring->rx_skb_top = NULL;
+ rx_ring->rx_skb_prev = NULL;
+ }
}
- if(unlikely(rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK)) {
+ if (unlikely(rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK)) {
last_byte = *(skb->data + length - 1);
- if(TBI_ACCEPT(&adapter->hw, rx_desc->status,
+ if (TBI_ACCEPT(&adapter->hw, status,
rx_desc->errors, length, last_byte)) {
spin_lock_irqsave(&adapter->stats_lock, flags);
e1000_tbi_adjust_stats(&adapter->hw,
}
}
- /* Good Receive */
- skb_put(skb, length - ETHERNET_FCS_SIZE);
+ /* code added for copybreak, this should improve
+ * performance for small packets with large amounts
+ * of reassembly being done in the stack */
+#define E1000_CB_LENGTH 256
+ if ((length < E1000_CB_LENGTH) &&
+ !rx_ring->rx_skb_top &&
+ /* or maybe (status & E1000_RXD_STAT_EOP) && */
+ !multi_descriptor) {
+ struct sk_buff *new_skb =
+ dev_alloc_skb(length + NET_IP_ALIGN);
+ if (new_skb) {
+ skb_reserve(new_skb, NET_IP_ALIGN);
+ new_skb->dev = netdev;
+ memcpy(new_skb->data - NET_IP_ALIGN,
+ skb->data - NET_IP_ALIGN,
+ length + NET_IP_ALIGN);
+ /* save the skb in buffer_info as good */
+ buffer_info->skb = skb;
+ skb = new_skb;
+ skb_put(skb, length);
+ }
+ }
+
+ /* end copybreak code */
/* Receive Checksum Offload */
e1000_rx_checksum(adapter,
- (uint32_t)(rx_desc->status) |
+ (uint32_t)(status) |
((uint32_t)(rx_desc->errors) << 24),
rx_desc->csum, skb);
+
skb->protocol = eth_type_trans(skb, netdev);
#ifdef CONFIG_E1000_NAPI
- if(unlikely(adapter->vlgrp &&
- (rx_desc->status & E1000_RXD_STAT_VP))) {
+ if (unlikely(adapter->vlgrp &&
+ (status & E1000_RXD_STAT_VP))) {
vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
le16_to_cpu(rx_desc->special) &
E1000_RXD_SPC_VLAN_MASK);
netif_receive_skb(skb);
}
#else /* CONFIG_E1000_NAPI */
- if(unlikely(adapter->vlgrp &&
- (rx_desc->status & E1000_RXD_STAT_VP))) {
+ if (unlikely(adapter->vlgrp &&
+ (status & E1000_RXD_STAT_VP))) {
vlan_hwaccel_rx(skb, adapter->vlgrp,
le16_to_cpu(rx_desc->special) &
E1000_RXD_SPC_VLAN_MASK);
}
#endif /* CONFIG_E1000_NAPI */
netdev->last_rx = jiffies;
- rx_ring->pkt++;
+#ifdef CONFIG_E1000_MQ
+ rx_ring->rx_stats.packets++;
+ rx_ring->rx_stats.bytes += length;
+#endif
next_desc:
rx_desc->status = 0;
- buffer_info->skb = NULL;
- if(unlikely(++i == rx_ring->count)) i = 0;
- rx_desc = E1000_RX_DESC(*rx_ring, i);
+ /* return some buffers to hardware, one at a time is too slow */
+ if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
+ adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
+ cleaned_count = 0;
+ }
+
+ rx_desc = next_rxd;
+ buffer_info = next_buffer;
}
rx_ring->next_to_clean = i;
- adapter->alloc_rx_buf(adapter, rx_ring);
+
+ cleaned_count = E1000_DESC_UNUSED(rx_ring);
+ if (cleaned_count)
+ adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
return cleaned;
}
struct e1000_rx_ring *rx_ring)
#endif
{
- union e1000_rx_desc_packet_split *rx_desc;
+ union e1000_rx_desc_packet_split *rx_desc, *next_rxd;
struct net_device *netdev = adapter->netdev;
struct pci_dev *pdev = adapter->pdev;
- struct e1000_buffer *buffer_info;
+ struct e1000_buffer *buffer_info, *next_buffer;
struct e1000_ps_page *ps_page;
struct e1000_ps_page_dma *ps_page_dma;
- struct sk_buff *skb;
+ struct sk_buff *skb, *next_skb;
unsigned int i, j;
uint32_t length, staterr;
+ int cleaned_count = 0;
boolean_t cleaned = FALSE;
i = rx_ring->next_to_clean;
rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
+ buffer_info = &rx_ring->buffer_info[i];
- while(staterr & E1000_RXD_STAT_DD) {
- buffer_info = &rx_ring->buffer_info[i];
+ while (staterr & E1000_RXD_STAT_DD) {
ps_page = &rx_ring->ps_page[i];
ps_page_dma = &rx_ring->ps_page_dma[i];
#ifdef CONFIG_E1000_NAPI
- if(unlikely(*work_done >= work_to_do))
+ if (unlikely(*work_done >= work_to_do))
break;
(*work_done)++;
#endif
+ skb = buffer_info->skb;
+
+ if (++i == rx_ring->count) i = 0;
+ next_rxd = E1000_RX_DESC_PS(*rx_ring, i);
+ next_buffer = &rx_ring->buffer_info[i];
+ next_skb = next_buffer->skb;
+
cleaned = TRUE;
+ cleaned_count++;
pci_unmap_single(pdev, buffer_info->dma,
buffer_info->length,
PCI_DMA_FROMDEVICE);
- skb = buffer_info->skb;
-
- if(unlikely(!(staterr & E1000_RXD_STAT_EOP))) {
+ if (unlikely(!(staterr & E1000_RXD_STAT_EOP))) {
E1000_DBG("%s: Packet Split buffers didn't pick up"
" the full packet\n", netdev->name);
dev_kfree_skb_irq(skb);
goto next_desc;
}
- if(unlikely(staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK)) {
+ if (unlikely(staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK)) {
dev_kfree_skb_irq(skb);
goto next_desc;
}
length = le16_to_cpu(rx_desc->wb.middle.length0);
- if(unlikely(!length)) {
+ if (unlikely(!length)) {
E1000_DBG("%s: Last part of the packet spanning"
" multiple descriptors\n", netdev->name);
dev_kfree_skb_irq(skb);
/* Good Receive */
skb_put(skb, length);
- for(j = 0; j < adapter->rx_ps_pages; j++) {
- if(!(length = le16_to_cpu(rx_desc->wb.upper.length[j])))
+ for (j = 0; j < adapter->rx_ps_pages; j++) {
+ if (!(length = le16_to_cpu(rx_desc->wb.upper.length[j])))
break;
pci_unmap_page(pdev, ps_page_dma->ps_page_dma[j],
rx_desc->wb.lower.hi_dword.csum_ip.csum, skb);
skb->protocol = eth_type_trans(skb, netdev);
- if(likely(rx_desc->wb.upper.header_status &
- E1000_RXDPS_HDRSTAT_HDRSP)) {
+ if (likely(rx_desc->wb.upper.header_status &
+ E1000_RXDPS_HDRSTAT_HDRSP))
adapter->rx_hdr_split++;
-#ifdef HAVE_RX_ZERO_COPY
- skb_shinfo(skb)->zero_copy = TRUE;
-#endif
- }
#ifdef CONFIG_E1000_NAPI
- if(unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
+ if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
le16_to_cpu(rx_desc->wb.middle.vlan) &
E1000_RXD_SPC_VLAN_MASK);
netif_receive_skb(skb);
}
#else /* CONFIG_E1000_NAPI */
- if(unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
+ if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
vlan_hwaccel_rx(skb, adapter->vlgrp,
le16_to_cpu(rx_desc->wb.middle.vlan) &
E1000_RXD_SPC_VLAN_MASK);
}
#endif /* CONFIG_E1000_NAPI */
netdev->last_rx = jiffies;
- rx_ring->pkt++;
+#ifdef CONFIG_E1000_MQ
+ rx_ring->rx_stats.packets++;
+ rx_ring->rx_stats.bytes += length;
+#endif
next_desc:
rx_desc->wb.middle.status_error &= ~0xFF;
buffer_info->skb = NULL;
- if(unlikely(++i == rx_ring->count)) i = 0;
- rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
+ /* return some buffers to hardware, one at a time is too slow */
+ if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
+ adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
+ cleaned_count = 0;
+ }
+
+ rx_desc = next_rxd;
+ buffer_info = next_buffer;
+
staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
}
rx_ring->next_to_clean = i;
- adapter->alloc_rx_buf(adapter, rx_ring);
+
+ cleaned_count = E1000_DESC_UNUSED(rx_ring);
+ if (cleaned_count)
+ adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
return cleaned;
}
static void
e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
- struct e1000_rx_ring *rx_ring)
+ struct e1000_rx_ring *rx_ring,
+ int cleaned_count)
{
struct net_device *netdev = adapter->netdev;
struct pci_dev *pdev = adapter->pdev;
i = rx_ring->next_to_use;
buffer_info = &rx_ring->buffer_info[i];
- while(!buffer_info->skb) {
- skb = dev_alloc_skb(bufsz);
+ while (cleaned_count--) {
+ if (!(skb = buffer_info->skb))
+ skb = dev_alloc_skb(bufsz);
+ else {
+ skb_trim(skb, 0);
+ goto map_skb;
+ }
+
- if(unlikely(!skb)) {
+ if (unlikely(!skb)) {
/* Better luck next round */
+ adapter->alloc_rx_buff_failed++;
break;
}
buffer_info->skb = skb;
buffer_info->length = adapter->rx_buffer_len;
+map_skb:
buffer_info->dma = pci_map_single(pdev,
skb->data,
adapter->rx_buffer_len,
rx_desc = E1000_RX_DESC(*rx_ring, i);
rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
- if(unlikely((i & ~(E1000_RX_BUFFER_WRITE - 1)) == i)) {
- /* Force memory writes to complete before letting h/w
- * know there are new descriptors to fetch. (Only
- * applicable for weak-ordered memory model archs,
- * such as IA-64). */
- wmb();
- writel(i, adapter->hw.hw_addr + rx_ring->rdt);
- }
-
- if(unlikely(++i == rx_ring->count)) i = 0;
+ if (unlikely(++i == rx_ring->count))
+ i = 0;
buffer_info = &rx_ring->buffer_info[i];
}
- rx_ring->next_to_use = i;
+ if (likely(rx_ring->next_to_use != i)) {
+ rx_ring->next_to_use = i;
+ if (unlikely(i-- == 0))
+ i = (rx_ring->count - 1);
+
+ /* Force memory writes to complete before letting h/w
+ * know there are new descriptors to fetch. (Only
+ * applicable for weak-ordered memory model archs,
+ * such as IA-64). */
+ wmb();
+ writel(i, adapter->hw.hw_addr + rx_ring->rdt);
+ }
}
/**
static void
e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
- struct e1000_rx_ring *rx_ring)
+ struct e1000_rx_ring *rx_ring,
+ int cleaned_count)
{
struct net_device *netdev = adapter->netdev;
struct pci_dev *pdev = adapter->pdev;
ps_page = &rx_ring->ps_page[i];
ps_page_dma = &rx_ring->ps_page_dma[i];
- while(!buffer_info->skb) {
+ while (cleaned_count--) {
rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
- for(j = 0; j < PS_PAGE_BUFFERS; j++) {
+ for (j = 0; j < PS_PAGE_BUFFERS; j++) {
if (j < adapter->rx_ps_pages) {
if (likely(!ps_page->ps_page[j])) {
ps_page->ps_page[j] =
alloc_page(GFP_ATOMIC);
- if (unlikely(!ps_page->ps_page[j]))
+ if (unlikely(!ps_page->ps_page[j])) {
+ adapter->alloc_rx_buff_failed++;
goto no_buffers;
+ }
ps_page_dma->ps_page_dma[j] =
pci_map_page(pdev,
ps_page->ps_page[j],
PCI_DMA_FROMDEVICE);
}
/* Refresh the desc even if buffer_addrs didn't
- * change because each write-back erases
+ * change because each write-back erases
* this info.
*/
rx_desc->read.buffer_addr[j+1] =
skb = dev_alloc_skb(adapter->rx_ps_bsize0 + NET_IP_ALIGN);
- if(unlikely(!skb))
+ if (unlikely(!skb)) {
+ adapter->alloc_rx_buff_failed++;
break;
+ }
/* Make buffer alignment 2 beyond a 16 byte boundary
* this will result in a 16 byte aligned IP header after
rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
- if(unlikely((i & ~(E1000_RX_BUFFER_WRITE - 1)) == i)) {
- /* Force memory writes to complete before letting h/w
- * know there are new descriptors to fetch. (Only
- * applicable for weak-ordered memory model archs,
- * such as IA-64). */
- wmb();
- /* Hardware increments by 16 bytes, but packet split
- * descriptors are 32 bytes...so we increment tail
- * twice as much.
- */
- writel(i<<1, adapter->hw.hw_addr + rx_ring->rdt);
- }
-
- if(unlikely(++i == rx_ring->count)) i = 0;
+ if (unlikely(++i == rx_ring->count)) i = 0;
buffer_info = &rx_ring->buffer_info[i];
ps_page = &rx_ring->ps_page[i];
ps_page_dma = &rx_ring->ps_page_dma[i];
}
no_buffers:
- rx_ring->next_to_use = i;
+ if (likely(rx_ring->next_to_use != i)) {
+ rx_ring->next_to_use = i;
+ if (unlikely(i-- == 0)) i = (rx_ring->count - 1);
+
+ /* Force memory writes to complete before letting h/w
+ * know there are new descriptors to fetch. (Only
+ * applicable for weak-ordered memory model archs,
+ * such as IA-64). */
+ wmb();
+ /* Hardware increments by 16 bytes, but packet split
+ * descriptors are 32 bytes...so we increment tail
+ * twice as much.
+ */
+ writel(i<<1, adapter->hw.hw_addr + rx_ring->rdt);
+ }
}
/**
uint16_t phy_status;
uint16_t phy_ctrl;
- if((adapter->hw.phy_type != e1000_phy_igp) || !adapter->hw.autoneg ||
+ if ((adapter->hw.phy_type != e1000_phy_igp) || !adapter->hw.autoneg ||
!(adapter->hw.autoneg_advertised & ADVERTISE_1000_FULL))
return;
- if(adapter->smartspeed == 0) {
+ if (adapter->smartspeed == 0) {
/* If Master/Slave config fault is asserted twice,
* we assume back-to-back */
e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
- if(!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
+ if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
- if(!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
+ if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
- if(phy_ctrl & CR_1000T_MS_ENABLE) {
+ if (phy_ctrl & CR_1000T_MS_ENABLE) {
phy_ctrl &= ~CR_1000T_MS_ENABLE;
e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL,
phy_ctrl);
adapter->smartspeed++;
- if(!e1000_phy_setup_autoneg(&adapter->hw) &&
+ if (!e1000_phy_setup_autoneg(&adapter->hw) &&
!e1000_read_phy_reg(&adapter->hw, PHY_CTRL,
&phy_ctrl)) {
phy_ctrl |= (MII_CR_AUTO_NEG_EN |
}
}
return;
- } else if(adapter->smartspeed == E1000_SMARTSPEED_DOWNSHIFT) {
+ } else if (adapter->smartspeed == E1000_SMARTSPEED_DOWNSHIFT) {
/* If still no link, perhaps using 2/3 pair cable */
e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
phy_ctrl |= CR_1000T_MS_ENABLE;
e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, phy_ctrl);
- if(!e1000_phy_setup_autoneg(&adapter->hw) &&
+ if (!e1000_phy_setup_autoneg(&adapter->hw) &&
!e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_ctrl)) {
phy_ctrl |= (MII_CR_AUTO_NEG_EN |
MII_CR_RESTART_AUTO_NEG);
}
}
/* Restart process after E1000_SMARTSPEED_MAX iterations */
- if(adapter->smartspeed++ == E1000_SMARTSPEED_MAX)
+ if (adapter->smartspeed++ == E1000_SMARTSPEED_MAX)
adapter->smartspeed = 0;
}
uint16_t spddplx;
unsigned long flags;
- if(adapter->hw.media_type != e1000_media_type_copper)
+ if (adapter->hw.media_type != e1000_media_type_copper)
return -EOPNOTSUPP;
switch (cmd) {
data->phy_id = adapter->hw.phy_addr;
break;
case SIOCGMIIREG:
- if(!capable(CAP_NET_ADMIN))
+ if (!capable(CAP_NET_ADMIN))
return -EPERM;
spin_lock_irqsave(&adapter->stats_lock, flags);
- if(e1000_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
+ if (e1000_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
&data->val_out)) {
spin_unlock_irqrestore(&adapter->stats_lock, flags);
return -EIO;
spin_unlock_irqrestore(&adapter->stats_lock, flags);
break;
case SIOCSMIIREG:
- if(!capable(CAP_NET_ADMIN))
+ if (!capable(CAP_NET_ADMIN))
return -EPERM;
- if(data->reg_num & ~(0x1F))
+ if (data->reg_num & ~(0x1F))
return -EFAULT;
mii_reg = data->val_in;
spin_lock_irqsave(&adapter->stats_lock, flags);
- if(e1000_write_phy_reg(&adapter->hw, data->reg_num,
+ if (e1000_write_phy_reg(&adapter->hw, data->reg_num,
mii_reg)) {
spin_unlock_irqrestore(&adapter->stats_lock, flags);
return -EIO;
}
- if(adapter->hw.phy_type == e1000_phy_m88) {
+ if (adapter->hw.phy_type == e1000_phy_m88) {
switch (data->reg_num) {
case PHY_CTRL:
- if(mii_reg & MII_CR_POWER_DOWN)
+ if (mii_reg & MII_CR_POWER_DOWN)
break;
- if(mii_reg & MII_CR_AUTO_NEG_EN) {
+ if (mii_reg & MII_CR_AUTO_NEG_EN) {
adapter->hw.autoneg = 1;
adapter->hw.autoneg_advertised = 0x2F;
} else {
HALF_DUPLEX;
retval = e1000_set_spd_dplx(adapter,
spddplx);
- if(retval) {
+ if (retval) {
spin_unlock_irqrestore(
- &adapter->stats_lock,
+ &adapter->stats_lock,
flags);
return retval;
}
}
- if(netif_running(adapter->netdev)) {
+ if (netif_running(adapter->netdev)) {
e1000_down(adapter);
e1000_up(adapter);
} else
break;
case M88E1000_PHY_SPEC_CTRL:
case M88E1000_EXT_PHY_SPEC_CTRL:
- if(e1000_phy_reset(&adapter->hw)) {
+ if (e1000_phy_reset(&adapter->hw)) {
spin_unlock_irqrestore(
&adapter->stats_lock, flags);
return -EIO;
} else {
switch (data->reg_num) {
case PHY_CTRL:
- if(mii_reg & MII_CR_POWER_DOWN)
+ if (mii_reg & MII_CR_POWER_DOWN)
break;
- if(netif_running(adapter->netdev)) {
+ if (netif_running(adapter->netdev)) {
e1000_down(adapter);
e1000_up(adapter);
} else
struct e1000_adapter *adapter = hw->back;
int ret_val = pci_set_mwi(adapter->pdev);
- if(ret_val)
+ if (ret_val)
DPRINTK(PROBE, ERR, "Error in setting MWI\n");
}
e1000_irq_disable(adapter);
adapter->vlgrp = grp;
- if(grp) {
+ if (grp) {
/* enable VLAN tag insert/strip */
ctrl = E1000_READ_REG(&adapter->hw, CTRL);
ctrl |= E1000_CTRL_VME;
rctl = E1000_READ_REG(&adapter->hw, RCTL);
rctl &= ~E1000_RCTL_VFE;
E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
- if(adapter->mng_vlan_id != (uint16_t)E1000_MNG_VLAN_NONE) {
+ if (adapter->mng_vlan_id != (uint16_t)E1000_MNG_VLAN_NONE) {
e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
}
{
struct e1000_adapter *adapter = netdev_priv(netdev);
uint32_t vfta, index;
- if((adapter->hw.mng_cookie.status &
- E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
- (vid == adapter->mng_vlan_id))
+
+ if ((adapter->hw.mng_cookie.status &
+ E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
+ (vid == adapter->mng_vlan_id))
return;
/* add VID to filter table */
index = (vid >> 5) & 0x7F;
e1000_irq_disable(adapter);
- if(adapter->vlgrp)
+ if (adapter->vlgrp)
adapter->vlgrp->vlan_devices[vid] = NULL;
e1000_irq_enable(adapter);
- if((adapter->hw.mng_cookie.status &
- E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
- (vid == adapter->mng_vlan_id))
+ if ((adapter->hw.mng_cookie.status &
+ E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
+ (vid == adapter->mng_vlan_id)) {
+ /* release control to f/w */
+ e1000_release_hw_control(adapter);
return;
+ }
+
/* remove VID from filter table */
index = (vid >> 5) & 0x7F;
vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
{
e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
- if(adapter->vlgrp) {
+ if (adapter->vlgrp) {
uint16_t vid;
- for(vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
- if(!adapter->vlgrp->vlan_devices[vid])
+ for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
+ if (!adapter->vlgrp->vlan_devices[vid])
continue;
e1000_vlan_rx_add_vid(adapter->netdev, vid);
}
adapter->hw.autoneg = 0;
/* Fiber NICs only allow 1000 gbps Full duplex */
- if((adapter->hw.media_type == e1000_media_type_fiber) &&
+ if ((adapter->hw.media_type == e1000_media_type_fiber) &&
spddplx != (SPEED_1000 + DUPLEX_FULL)) {
DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
return -EINVAL;
}
- switch(spddplx) {
+ switch (spddplx) {
case SPEED_10 + DUPLEX_HALF:
adapter->hw.forced_speed_duplex = e1000_10_half;
break;
}
#ifdef CONFIG_PM
+/* these functions save and restore 16 or 64 dwords (64-256 bytes) of config
+ * space versus the 64 bytes that pci_[save|restore]_state handle
+ */
+#define PCIE_CONFIG_SPACE_LEN 256
+#define PCI_CONFIG_SPACE_LEN 64
+static int
+e1000_pci_save_state(struct e1000_adapter *adapter)
+{
+ struct pci_dev *dev = adapter->pdev;
+ int size;
+ int i;
+ if (adapter->hw.mac_type >= e1000_82571)
+ size = PCIE_CONFIG_SPACE_LEN;
+ else
+ size = PCI_CONFIG_SPACE_LEN;
+
+ WARN_ON(adapter->config_space != NULL);
+
+ adapter->config_space = kmalloc(size, GFP_KERNEL);
+ if (!adapter->config_space) {
+ DPRINTK(PROBE, ERR, "unable to allocate %d bytes\n", size);
+ return -ENOMEM;
+ }
+ for (i = 0; i < (size / 4); i++)
+ pci_read_config_dword(dev, i * 4, &adapter->config_space[i]);
+ return 0;
+}
+
+static void
+e1000_pci_restore_state(struct e1000_adapter *adapter)
+{
+ struct pci_dev *dev = adapter->pdev;
+ int size;
+ int i;
+ if (adapter->config_space == NULL)
+ return;
+ if (adapter->hw.mac_type >= e1000_82571)
+ size = PCIE_CONFIG_SPACE_LEN;
+ else
+ size = PCI_CONFIG_SPACE_LEN;
+ for (i = 0; i < (size / 4); i++)
+ pci_write_config_dword(dev, i * 4, adapter->config_space[i]);
+ kfree(adapter->config_space);
+ adapter->config_space = NULL;
+ return;
+}
+#endif /* CONFIG_PM */
+
static int
e1000_suspend(struct pci_dev *pdev, pm_message_t state)
{
struct net_device *netdev = pci_get_drvdata(pdev);
struct e1000_adapter *adapter = netdev_priv(netdev);
- uint32_t ctrl, ctrl_ext, rctl, manc, status, swsm;
+ uint32_t ctrl, ctrl_ext, rctl, manc, status;
uint32_t wufc = adapter->wol;
+ int retval = 0;
netif_device_detach(netdev);
- if(netif_running(netdev))
+ if (netif_running(netdev))
e1000_down(adapter);
+#ifdef CONFIG_PM
+ /* implement our own version of pci_save_state(pdev) because pci
+ * express adapters have larger 256 byte config spaces */
+ retval = e1000_pci_save_state(adapter);
+ if (retval)
+ return retval;
+#endif
+
status = E1000_READ_REG(&adapter->hw, STATUS);
- if(status & E1000_STATUS_LU)
+ if (status & E1000_STATUS_LU)
wufc &= ~E1000_WUFC_LNKC;
- if(wufc) {
+ if (wufc) {
e1000_setup_rctl(adapter);
e1000_set_multi(netdev);
/* turn on all-multi mode if wake on multicast is enabled */
- if(adapter->wol & E1000_WUFC_MC) {
+ if (adapter->wol & E1000_WUFC_MC) {
rctl = E1000_READ_REG(&adapter->hw, RCTL);
rctl |= E1000_RCTL_MPE;
E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
}
- if(adapter->hw.mac_type >= e1000_82540) {
+ if (adapter->hw.mac_type >= e1000_82540) {
ctrl = E1000_READ_REG(&adapter->hw, CTRL);
/* advertise wake from D3Cold */
#define E1000_CTRL_ADVD3WUC 0x00100000
E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
}
- if(adapter->hw.media_type == e1000_media_type_fiber ||
+ if (adapter->hw.media_type == e1000_media_type_fiber ||
adapter->hw.media_type == e1000_media_type_internal_serdes) {
/* keep the laser running in D3 */
ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
E1000_WRITE_REG(&adapter->hw, WUC, E1000_WUC_PME_EN);
E1000_WRITE_REG(&adapter->hw, WUFC, wufc);
- pci_enable_wake(pdev, 3, 1);
- pci_enable_wake(pdev, 4, 1); /* 4 == D3 cold */
+ retval = pci_enable_wake(pdev, PCI_D3hot, 1);
+ if (retval)
+ DPRINTK(PROBE, ERR, "Error enabling D3 wake\n");
+ retval = pci_enable_wake(pdev, PCI_D3cold, 1);
+ if (retval)
+ DPRINTK(PROBE, ERR, "Error enabling D3 cold wake\n");
} else {
E1000_WRITE_REG(&adapter->hw, WUC, 0);
E1000_WRITE_REG(&adapter->hw, WUFC, 0);
- pci_enable_wake(pdev, 3, 0);
- pci_enable_wake(pdev, 4, 0); /* 4 == D3 cold */
+ retval = pci_enable_wake(pdev, PCI_D3hot, 0);
+ if (retval)
+ DPRINTK(PROBE, ERR, "Error enabling D3 wake\n");
+ retval = pci_enable_wake(pdev, PCI_D3cold, 0); /* 4 == D3 cold */
+ if (retval)
+ DPRINTK(PROBE, ERR, "Error enabling D3 cold wake\n");
}
- pci_save_state(pdev);
-
- if(adapter->hw.mac_type >= e1000_82540 &&
+ if (adapter->hw.mac_type >= e1000_82540 &&
adapter->hw.media_type == e1000_media_type_copper) {
manc = E1000_READ_REG(&adapter->hw, MANC);
- if(manc & E1000_MANC_SMBUS_EN) {
+ if (manc & E1000_MANC_SMBUS_EN) {
manc |= E1000_MANC_ARP_EN;
E1000_WRITE_REG(&adapter->hw, MANC, manc);
- pci_enable_wake(pdev, 3, 1);
- pci_enable_wake(pdev, 4, 1); /* 4 == D3 cold */
+ retval = pci_enable_wake(pdev, PCI_D3hot, 1);
+ if (retval)
+ DPRINTK(PROBE, ERR, "Error enabling D3 wake\n");
+ retval = pci_enable_wake(pdev, PCI_D3cold, 1);
+ if (retval)
+ DPRINTK(PROBE, ERR, "Error enabling D3 cold wake\n");
}
}
- switch(adapter->hw.mac_type) {
- case e1000_82571:
- case e1000_82572:
- ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
- E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
- ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
- break;
- case e1000_82573:
- swsm = E1000_READ_REG(&adapter->hw, SWSM);
- E1000_WRITE_REG(&adapter->hw, SWSM,
- swsm & ~E1000_SWSM_DRV_LOAD);
- break;
- default:
- break;
- }
+ /* Release control of h/w to f/w. If f/w is AMT enabled, this
+ * would have already happened in close and is redundant. */
+ e1000_release_hw_control(adapter);
pci_disable_device(pdev);
- pci_set_power_state(pdev, pci_choose_state(pdev, state));
+
+ retval = pci_set_power_state(pdev, pci_choose_state(pdev, state));
+ if (retval)
+ DPRINTK(PROBE, ERR, "Error in setting power state\n");
return 0;
}
+#ifdef CONFIG_PM
static int
e1000_resume(struct pci_dev *pdev)
{
struct net_device *netdev = pci_get_drvdata(pdev);
struct e1000_adapter *adapter = netdev_priv(netdev);
- uint32_t manc, ret_val, swsm;
- uint32_t ctrl_ext;
+ int retval;
+ uint32_t manc, ret_val;
- pci_set_power_state(pdev, PCI_D0);
- pci_restore_state(pdev);
+ retval = pci_set_power_state(pdev, PCI_D0);
+ if (retval)
+ DPRINTK(PROBE, ERR, "Error in setting power state\n");
+ e1000_pci_restore_state(adapter);
ret_val = pci_enable_device(pdev);
pci_set_master(pdev);
- pci_enable_wake(pdev, PCI_D3hot, 0);
- pci_enable_wake(pdev, PCI_D3cold, 0);
+ retval = pci_enable_wake(pdev, PCI_D3hot, 0);
+ if (retval)
+ DPRINTK(PROBE, ERR, "Error enabling D3 wake\n");
+ retval = pci_enable_wake(pdev, PCI_D3cold, 0);
+ if (retval)
+ DPRINTK(PROBE, ERR, "Error enabling D3 cold wake\n");
e1000_reset(adapter);
E1000_WRITE_REG(&adapter->hw, WUS, ~0);
- if(netif_running(netdev))
+ if (netif_running(netdev))
e1000_up(adapter);
netif_device_attach(netdev);
- if(adapter->hw.mac_type >= e1000_82540 &&
+ if (adapter->hw.mac_type >= e1000_82540 &&
adapter->hw.media_type == e1000_media_type_copper) {
manc = E1000_READ_REG(&adapter->hw, MANC);
manc &= ~(E1000_MANC_ARP_EN);
E1000_WRITE_REG(&adapter->hw, MANC, manc);
}
- switch(adapter->hw.mac_type) {
- case e1000_82571:
- case e1000_82572:
- ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
- E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
- ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
- break;
- case e1000_82573:
- swsm = E1000_READ_REG(&adapter->hw, SWSM);
- E1000_WRITE_REG(&adapter->hw, SWSM,
- swsm | E1000_SWSM_DRV_LOAD);
- break;
- default:
- break;
- }
+ /* If the controller is 82573 and f/w is AMT, do not set
+ * DRV_LOAD until the interface is up. For all other cases,
+ * let the f/w know that the h/w is now under the control
+ * of the driver. */
+ if (adapter->hw.mac_type != e1000_82573 ||
+ !e1000_check_mng_mode(&adapter->hw))
+ e1000_get_hw_control(adapter);
return 0;
}
disable_irq(adapter->pdev->irq);
e1000_intr(adapter->pdev->irq, netdev, NULL);
e1000_clean_tx_irq(adapter, adapter->tx_ring);
+#ifndef CONFIG_E1000_NAPI
+ adapter->clean_rx(adapter, adapter->rx_ring);
+#endif
enable_irq(adapter->pdev->irq);
}
#endif
BUG(); \
} else { \
msleep(x); \
- } } while(0)
+ } } while (0)
/* Some workarounds require millisecond delays and are run during interrupt
* context. Most notably, when establishing link, the phy may need tweaking
*
* Valid Range: 100-100000 (0=off, 1=dynamic)
*
- * Default Value: 1
+ * Default Value: 8000
*/
E1000_PARAM(InterruptThrottleRate, "Interrupt Throttling Rate");
e1000_validate_option(int *value, struct e1000_option *opt,
struct e1000_adapter *adapter)
{
- if(*value == OPTION_UNSET) {
+ if (*value == OPTION_UNSET) {
*value = opt->def;
return 0;
}
}
break;
case range_option:
- if(*value >= opt->arg.r.min && *value <= opt->arg.r.max) {
+ if (*value >= opt->arg.r.min && *value <= opt->arg.r.max) {
DPRINTK(PROBE, INFO,
"%s set to %i\n", opt->name, *value);
return 0;
int i;
struct e1000_opt_list *ent;
- for(i = 0; i < opt->arg.l.nr; i++) {
+ for (i = 0; i < opt->arg.l.nr; i++) {
ent = &opt->arg.l.p[i];
- if(*value == ent->i) {
- if(ent->str[0] != '\0')
+ if (*value == ent->i) {
+ if (ent->str[0] != '\0')
DPRINTK(PROBE, INFO, "%s\n", ent->str);
return 0;
}
e1000_check_options(struct e1000_adapter *adapter)
{
int bd = adapter->bd_number;
- if(bd >= E1000_MAX_NIC) {
+ if (bd >= E1000_MAX_NIC) {
DPRINTK(PROBE, NOTICE,
"Warning: no configuration for board #%i\n", bd);
DPRINTK(PROBE, NOTICE, "Using defaults for all values\n");
if (num_TxDescriptors > bd) {
tx_ring->count = TxDescriptors[bd];
e1000_validate_option(&tx_ring->count, &opt, adapter);
- E1000_ROUNDUP(tx_ring->count,
+ E1000_ROUNDUP(tx_ring->count,
REQ_TX_DESCRIPTOR_MULTIPLE);
} else {
tx_ring->count = opt.def;
}
- for (i = 0; i < adapter->num_queues; i++)
+ for (i = 0; i < adapter->num_tx_queues; i++)
tx_ring[i].count = tx_ring->count;
}
{ /* Receive Descriptor Count */
if (num_RxDescriptors > bd) {
rx_ring->count = RxDescriptors[bd];
e1000_validate_option(&rx_ring->count, &opt, adapter);
- E1000_ROUNDUP(rx_ring->count,
+ E1000_ROUNDUP(rx_ring->count,
REQ_RX_DESCRIPTOR_MULTIPLE);
} else {
rx_ring->count = opt.def;
}
- for (i = 0; i < adapter->num_queues; i++)
+ for (i = 0; i < adapter->num_rx_queues; i++)
rx_ring[i].count = rx_ring->count;
}
{ /* Checksum Offload Enable/Disable */
e1000_validate_option(&fc, &opt, adapter);
adapter->hw.fc = adapter->hw.original_fc = fc;
} else {
- adapter->hw.fc = opt.def;
+ adapter->hw.fc = adapter->hw.original_fc = opt.def;
}
}
{ /* Transmit Interrupt Delay */
if (num_TxIntDelay > bd) {
adapter->tx_int_delay = TxIntDelay[bd];
- e1000_validate_option(&adapter->tx_int_delay, &opt,
+ e1000_validate_option(&adapter->tx_int_delay, &opt,
adapter);
} else {
adapter->tx_int_delay = opt.def;
if (num_TxAbsIntDelay > bd) {
adapter->tx_abs_int_delay = TxAbsIntDelay[bd];
- e1000_validate_option(&adapter->tx_abs_int_delay, &opt,
+ e1000_validate_option(&adapter->tx_abs_int_delay, &opt,
adapter);
} else {
adapter->tx_abs_int_delay = opt.def;
if (num_RxIntDelay > bd) {
adapter->rx_int_delay = RxIntDelay[bd];
- e1000_validate_option(&adapter->rx_int_delay, &opt,
+ e1000_validate_option(&adapter->rx_int_delay, &opt,
adapter);
} else {
adapter->rx_int_delay = opt.def;
if (num_RxAbsIntDelay > bd) {
adapter->rx_abs_int_delay = RxAbsIntDelay[bd];
- e1000_validate_option(&adapter->rx_abs_int_delay, &opt,
+ e1000_validate_option(&adapter->rx_abs_int_delay, &opt,
adapter);
} else {
adapter->rx_abs_int_delay = opt.def;
if (num_InterruptThrottleRate > bd) {
adapter->itr = InterruptThrottleRate[bd];
- switch(adapter->itr) {
+ switch (adapter->itr) {
case 0:
- DPRINTK(PROBE, INFO, "%s turned off\n",
+ DPRINTK(PROBE, INFO, "%s turned off\n",
opt.name);
break;
case 1:
- DPRINTK(PROBE, INFO, "%s set to dynamic mode\n",
+ DPRINTK(PROBE, INFO, "%s set to dynamic mode\n",
opt.name);
break;
default:
- e1000_validate_option(&adapter->itr, &opt,
+ e1000_validate_option(&adapter->itr, &opt,
adapter);
break;
}
}
}
- switch(adapter->hw.media_type) {
+ switch (adapter->hw.media_type) {
case e1000_media_type_fiber:
case e1000_media_type_internal_serdes:
e1000_check_fiber_options(adapter);
e1000_check_fiber_options(struct e1000_adapter *adapter)
{
int bd = adapter->bd_number;
- if(num_Speed > bd) {
+ if (num_Speed > bd) {
DPRINTK(PROBE, INFO, "Speed not valid for fiber adapters, "
"parameter ignored\n");
}
- if(num_Duplex > bd) {
+ if (num_Duplex > bd) {
DPRINTK(PROBE, INFO, "Duplex not valid for fiber adapters, "
"parameter ignored\n");
}
- if((num_AutoNeg > bd) && (AutoNeg[bd] != 0x20)) {
+ if ((num_AutoNeg > bd) && (AutoNeg[bd] != 0x20)) {
DPRINTK(PROBE, INFO, "AutoNeg other than 1000/Full is "
"not valid for fiber adapters, "
"parameter ignored\n");
.p = dplx_list }}
};
+ if (e1000_check_phy_reset_block(&adapter->hw)) {
+ DPRINTK(PROBE, INFO,
+ "Link active due to SoL/IDER Session. "
+ "Speed/Duplex/AutoNeg parameter ignored.\n");
+ return;
+ }
if (num_Duplex > bd) {
dplx = Duplex[bd];
e1000_validate_option(&dplx, &opt, adapter);
}
}
- if((num_AutoNeg > bd) && (speed != 0 || dplx != 0)) {
+ if ((num_AutoNeg > bd) && (speed != 0 || dplx != 0)) {
DPRINTK(PROBE, INFO,
"AutoNeg specified along with Speed or Duplex, "
"parameter ignored\n");
switch (speed + dplx) {
case 0:
adapter->hw.autoneg = adapter->fc_autoneg = 1;
- if((num_Speed > bd) && (speed != 0 || dplx != 0))
+ if ((num_Speed > bd) && (speed != 0 || dplx != 0))
DPRINTK(PROBE, INFO,
"Speed and duplex autonegotiation enabled\n");
break;
#include <linux/tcp.h>
#include <linux/udp.h>
#include <linux/etherdevice.h>
+#include <linux/in.h>
+#include <linux/ip.h>
#include <linux/bitops.h>
#include <linux/delay.h>
/* Constants */
#define VLAN_HLEN 4
#define FCS_LEN 4
-#define WRAP NET_IP_ALIGN + ETH_HLEN + VLAN_HLEN + FCS_LEN
+#define DMA_ALIGN 8 /* hw requires 8-byte alignment */
+#define HW_IP_ALIGN 2 /* hw aligns IP header */
+#define WRAP HW_IP_ALIGN + ETH_HLEN + VLAN_HLEN + FCS_LEN
#define RX_SKB_SIZE ((dev->mtu + WRAP + 7) & ~0x7)
-#define INT_CAUSE_UNMASK_ALL 0x0007ffff
-#define INT_CAUSE_UNMASK_ALL_EXT 0x0011ffff
-#define INT_CAUSE_MASK_ALL 0x00000000
-#define INT_CAUSE_MASK_ALL_EXT 0x00000000
+#define INT_UNMASK_ALL 0x0007ffff
+#define INT_UNMASK_ALL_EXT 0x0011ffff
+#define INT_MASK_ALL 0x00000000
+#define INT_MASK_ALL_EXT 0x00000000
#define INT_CAUSE_CHECK_BITS INT_CAUSE_UNMASK_ALL
#define INT_CAUSE_CHECK_BITS_EXT INT_CAUSE_UNMASK_ALL_EXT
static int eth_port_link_is_up(unsigned int eth_port_num);
static void eth_port_uc_addr_get(struct net_device *dev,
unsigned char *MacAddr);
-static int mv643xx_eth_real_open(struct net_device *);
-static int mv643xx_eth_real_stop(struct net_device *);
+static void eth_port_set_multicast_list(struct net_device *);
+static int mv643xx_eth_open(struct net_device *);
+static int mv643xx_eth_stop(struct net_device *);
static int mv643xx_eth_change_mtu(struct net_device *, int);
static struct net_device_stats *mv643xx_eth_get_stats(struct net_device *);
static void eth_port_init_mac_tables(unsigned int eth_port_num);
*/
static int mv643xx_eth_change_mtu(struct net_device *dev, int new_mtu)
{
- struct mv643xx_private *mp = netdev_priv(dev);
- unsigned long flags;
-
- spin_lock_irqsave(&mp->lock, flags);
-
- if ((new_mtu > 9500) || (new_mtu < 64)) {
- spin_unlock_irqrestore(&mp->lock, flags);
+ if ((new_mtu > 9500) || (new_mtu < 64))
return -EINVAL;
- }
dev->mtu = new_mtu;
/*
* to memory is full, which might fail the open function.
*/
if (netif_running(dev)) {
- if (mv643xx_eth_real_stop(dev))
- printk(KERN_ERR
- "%s: Fatal error on stopping device\n",
- dev->name);
- if (mv643xx_eth_real_open(dev))
+ mv643xx_eth_stop(dev);
+ if (mv643xx_eth_open(dev))
printk(KERN_ERR
"%s: Fatal error on opening device\n",
dev->name);
}
- spin_unlock_irqrestore(&mp->lock, flags);
return 0;
}
struct mv643xx_private *mp = netdev_priv(dev);
struct pkt_info pkt_info;
struct sk_buff *skb;
+ int unaligned;
if (test_and_set_bit(0, &mp->rx_task_busy))
panic("%s: Error in test_set_bit / clear_bit", dev->name);
while (mp->rx_ring_skbs < (mp->rx_ring_size - 5)) {
- skb = dev_alloc_skb(RX_SKB_SIZE);
+ skb = dev_alloc_skb(RX_SKB_SIZE + DMA_ALIGN);
if (!skb)
break;
mp->rx_ring_skbs++;
+ unaligned = (u32)skb->data & (DMA_ALIGN - 1);
+ if (unaligned)
+ skb_reserve(skb, DMA_ALIGN - unaligned);
pkt_info.cmd_sts = ETH_RX_ENABLE_INTERRUPT;
pkt_info.byte_cnt = RX_SKB_SIZE;
pkt_info.buf_ptr = dma_map_single(NULL, skb->data, RX_SKB_SIZE,
"%s: Error allocating RX Ring\n", dev->name);
break;
}
- skb_reserve(skb, 2);
+ skb_reserve(skb, HW_IP_ALIGN);
}
clear_bit(0, &mp->rx_task_busy);
/*
else {
/* Return interrupts */
mv_write(MV643XX_ETH_INTERRUPT_MASK_REG(mp->port_num),
- INT_CAUSE_UNMASK_ALL);
+ INT_UNMASK_ALL);
}
#endif
}
mp->port_config &= ~(u32) MV643XX_ETH_UNICAST_PROMISCUOUS_MODE;
mv_write(MV643XX_ETH_PORT_CONFIG_REG(mp->port_num), mp->port_config);
+
+ eth_port_set_multicast_list(dev);
}
/*
if (!(eth_int_cause_ext & (BIT0 | BIT8)))
return released;
- spin_lock(&mp->lock);
-
/* Check only queue 0 */
while (eth_tx_return_desc(mp, &pkt_info) == ETH_OK) {
if (pkt_info.cmd_sts & BIT0) {
stats->tx_errors++;
}
- /*
- * If return_info is different than 0, release the skb.
- * The case where return_info is not 0 is only in case
- * when transmitted a scatter/gather packet, where only
- * last skb releases the whole chain.
- */
- if (pkt_info.return_info) {
- if (skb_shinfo(pkt_info.return_info)->nr_frags)
- dma_unmap_page(NULL, pkt_info.buf_ptr,
- pkt_info.byte_cnt,
- DMA_TO_DEVICE);
- else
- dma_unmap_single(NULL, pkt_info.buf_ptr,
- pkt_info.byte_cnt,
- DMA_TO_DEVICE);
+ if (pkt_info.cmd_sts & ETH_TX_FIRST_DESC)
+ dma_unmap_single(NULL, pkt_info.buf_ptr,
+ pkt_info.byte_cnt,
+ DMA_TO_DEVICE);
+ else
+ dma_unmap_page(NULL, pkt_info.buf_ptr,
+ pkt_info.byte_cnt,
+ DMA_TO_DEVICE);
+ if (pkt_info.return_info) {
dev_kfree_skb_irq(pkt_info.return_info);
released = 0;
- } else
- dma_unmap_page(NULL, pkt_info.buf_ptr,
- pkt_info.byte_cnt, DMA_TO_DEVICE);
+ }
}
- spin_unlock(&mp->lock);
-
return released;
}
netif_rx(skb);
#endif
}
+ dev->last_rx = jiffies;
}
return received_packets;
*/
static irqreturn_t mv643xx_eth_int_handler(int irq, void *dev_id,
- struct pt_regs *regs)
+ struct pt_regs *regs)
{
struct net_device *dev = (struct net_device *)dev_id;
struct mv643xx_private *mp = netdev_priv(dev);
/* Read interrupt cause registers */
eth_int_cause = mv_read(MV643XX_ETH_INTERRUPT_CAUSE_REG(port_num)) &
- INT_CAUSE_UNMASK_ALL;
+ INT_UNMASK_ALL;
if (eth_int_cause & BIT1)
eth_int_cause_ext = mv_read(
MV643XX_ETH_INTERRUPT_CAUSE_EXTEND_REG(port_num)) &
- INT_CAUSE_UNMASK_ALL_EXT;
+ INT_UNMASK_ALL_EXT;
#ifdef MV643XX_NAPI
if (!(eth_int_cause & 0x0007fffd)) {
} else {
if (netif_rx_schedule_prep(dev)) {
/* Mask all the interrupts */
- mv_write(MV643XX_ETH_INTERRUPT_MASK_REG(port_num), 0);
- mv_write(MV643XX_ETH_INTERRUPT_EXTEND_MASK_REG
- (port_num), 0);
+ mv_write(MV643XX_ETH_INTERRUPT_MASK_REG(port_num),
+ INT_MASK_ALL);
+ /* wait for previous write to complete */
+ mv_read(MV643XX_ETH_INTERRUPT_MASK_REG(port_num));
__netif_rx_schedule(dev);
}
#else
* with skb's.
*/
#ifdef MV643XX_RX_QUEUE_FILL_ON_TASK
- /* Unmask all interrupts on ethernet port */
+ /* Mask all interrupts on ethernet port */
mv_write(MV643XX_ETH_INTERRUPT_MASK_REG(port_num),
- INT_CAUSE_MASK_ALL);
+ INT_MASK_ALL);
+ /* wait for previous write to take effect */
+ mv_read(MV643XX_ETH_INTERRUPT_MASK_REG(port_num));
+
queue_task(&mp->rx_task, &tq_immediate);
mark_bh(IMMEDIATE_BH);
#else
return coal;
}
-/*
- * mv643xx_eth_open
- *
- * This function is called when openning the network device. The function
- * should initialize all the hardware, initialize cyclic Rx/Tx
- * descriptors chain and buffers and allocate an IRQ to the network
- * device.
- *
- * Input : a pointer to the network device structure
- *
- * Output : zero of success , nonzero if fails.
- */
-
-static int mv643xx_eth_open(struct net_device *dev)
-{
- struct mv643xx_private *mp = netdev_priv(dev);
- unsigned int port_num = mp->port_num;
- int err;
-
- spin_lock_irq(&mp->lock);
-
- err = request_irq(dev->irq, mv643xx_eth_int_handler,
- SA_SHIRQ | SA_SAMPLE_RANDOM, dev->name, dev);
-
- if (err) {
- printk(KERN_ERR "Can not assign IRQ number to MV643XX_eth%d\n",
- port_num);
- err = -EAGAIN;
- goto out;
- }
-
- if (mv643xx_eth_real_open(dev)) {
- printk("%s: Error opening interface\n", dev->name);
- err = -EBUSY;
- goto out_free;
- }
-
- spin_unlock_irq(&mp->lock);
-
- return 0;
-
-out_free:
- free_irq(dev->irq, dev);
-
-out:
- spin_unlock_irq(&mp->lock);
-
- return err;
-}
-
/*
* ether_init_rx_desc_ring - Curve a Rx chain desc list and buffer in memory.
*
mp->port_tx_queue_command |= 1;
}
-/* Helper function for mv643xx_eth_open */
-static int mv643xx_eth_real_open(struct net_device *dev)
+/*
+ * mv643xx_eth_open
+ *
+ * This function is called when openning the network device. The function
+ * should initialize all the hardware, initialize cyclic Rx/Tx
+ * descriptors chain and buffers and allocate an IRQ to the network
+ * device.
+ *
+ * Input : a pointer to the network device structure
+ *
+ * Output : zero of success , nonzero if fails.
+ */
+
+static int mv643xx_eth_open(struct net_device *dev)
{
struct mv643xx_private *mp = netdev_priv(dev);
unsigned int port_num = mp->port_num;
unsigned int size;
+ int err;
+
+ err = request_irq(dev->irq, mv643xx_eth_int_handler,
+ SA_SHIRQ | SA_SAMPLE_RANDOM, dev->name, dev);
+ if (err) {
+ printk(KERN_ERR "Can not assign IRQ number to MV643XX_eth%d\n",
+ port_num);
+ return -EAGAIN;
+ }
/* Stop RX Queues */
mv_write(MV643XX_ETH_RECEIVE_QUEUE_COMMAND_REG(port_num), 0x0000ff00);
- /* Clear the ethernet port interrupts */
- mv_write(MV643XX_ETH_INTERRUPT_CAUSE_REG(port_num), 0);
- mv_write(MV643XX_ETH_INTERRUPT_CAUSE_EXTEND_REG(port_num), 0);
-
- /* Unmask RX buffer and TX end interrupt */
- mv_write(MV643XX_ETH_INTERRUPT_MASK_REG(port_num),
- INT_CAUSE_UNMASK_ALL);
-
- /* Unmask phy and link status changes interrupts */
- mv_write(MV643XX_ETH_INTERRUPT_EXTEND_MASK_REG(port_num),
- INT_CAUSE_UNMASK_ALL_EXT);
-
/* Set the MAC Address */
memcpy(mp->port_mac_addr, dev->dev_addr, 6);
GFP_KERNEL);
if (!mp->rx_skb) {
printk(KERN_ERR "%s: Cannot allocate Rx skb ring\n", dev->name);
- return -ENOMEM;
+ err = -ENOMEM;
+ goto out_free_irq;
}
mp->tx_skb = kmalloc(sizeof(*mp->tx_skb) * mp->tx_ring_size,
GFP_KERNEL);
if (!mp->tx_skb) {
printk(KERN_ERR "%s: Cannot allocate Tx skb ring\n", dev->name);
- kfree(mp->rx_skb);
- return -ENOMEM;
+ err = -ENOMEM;
+ goto out_free_rx_skb;
}
/* Allocate TX ring */
if (!mp->p_tx_desc_area) {
printk(KERN_ERR "%s: Cannot allocate Tx Ring (size %d bytes)\n",
dev->name, size);
- kfree(mp->rx_skb);
- kfree(mp->tx_skb);
- return -ENOMEM;
+ err = -ENOMEM;
+ goto out_free_tx_skb;
}
BUG_ON((u32) mp->p_tx_desc_area & 0xf); /* check 16-byte alignment */
memset((void *)mp->p_tx_desc_area, 0, mp->tx_desc_area_size);
printk(KERN_ERR "%s: Freeing previously allocated TX queues...",
dev->name);
if (mp->rx_sram_size)
- iounmap(mp->p_rx_desc_area);
+ iounmap(mp->p_tx_desc_area);
else
dma_free_coherent(NULL, mp->tx_desc_area_size,
mp->p_tx_desc_area, mp->tx_desc_dma);
- kfree(mp->rx_skb);
- kfree(mp->tx_skb);
- return -ENOMEM;
+ err = -ENOMEM;
+ goto out_free_tx_skb;
}
memset((void *)mp->p_rx_desc_area, 0, size);
mp->tx_int_coal =
eth_port_set_tx_coal(port_num, 133000000, MV643XX_TX_COAL);
- netif_start_queue(dev);
+ /* Clear any pending ethernet port interrupts */
+ mv_write(MV643XX_ETH_INTERRUPT_CAUSE_REG(port_num), 0);
+ mv_write(MV643XX_ETH_INTERRUPT_CAUSE_EXTEND_REG(port_num), 0);
+
+ /* Unmask phy and link status changes interrupts */
+ mv_write(MV643XX_ETH_INTERRUPT_EXTEND_MASK_REG(port_num),
+ INT_UNMASK_ALL_EXT);
+ /* Unmask RX buffer and TX end interrupt */
+ mv_write(MV643XX_ETH_INTERRUPT_MASK_REG(port_num), INT_UNMASK_ALL);
return 0;
+
+out_free_tx_skb:
+ kfree(mp->tx_skb);
+out_free_rx_skb:
+ kfree(mp->rx_skb);
+out_free_irq:
+ free_irq(dev->irq, dev);
+
+ return err;
}
static void mv643xx_eth_free_tx_rings(struct net_device *dev)
struct mv643xx_private *mp = netdev_priv(dev);
unsigned int port_num = mp->port_num;
unsigned int curr;
+ struct sk_buff *skb;
/* Stop Tx Queues */
mv_write(MV643XX_ETH_TRANSMIT_QUEUE_COMMAND_REG(port_num), 0x0000ff00);
/* Free outstanding skb's on TX rings */
for (curr = 0; mp->tx_ring_skbs && curr < mp->tx_ring_size; curr++) {
- if (mp->tx_skb[curr]) {
- dev_kfree_skb(mp->tx_skb[curr]);
+ skb = mp->tx_skb[curr];
+ if (skb) {
+ mp->tx_ring_skbs -= skb_shinfo(skb)->nr_frags;
+ dev_kfree_skb(skb);
mp->tx_ring_skbs--;
}
}
* Output : zero if success , nonzero if fails
*/
-/* Helper function for mv643xx_eth_stop */
-
-static int mv643xx_eth_real_stop(struct net_device *dev)
+static int mv643xx_eth_stop(struct net_device *dev)
{
struct mv643xx_private *mp = netdev_priv(dev);
unsigned int port_num = mp->port_num;
+ /* Mask all interrupts on ethernet port */
+ mv_write(MV643XX_ETH_INTERRUPT_MASK_REG(port_num), INT_MASK_ALL);
+ /* wait for previous write to complete */
+ mv_read(MV643XX_ETH_INTERRUPT_MASK_REG(port_num));
+
+#ifdef MV643XX_NAPI
+ netif_poll_disable(dev);
+#endif
netif_carrier_off(dev);
netif_stop_queue(dev);
- mv643xx_eth_free_tx_rings(dev);
- mv643xx_eth_free_rx_rings(dev);
-
eth_port_reset(mp->port_num);
- /* Disable ethernet port interrupts */
- mv_write(MV643XX_ETH_INTERRUPT_CAUSE_REG(port_num), 0);
- mv_write(MV643XX_ETH_INTERRUPT_CAUSE_EXTEND_REG(port_num), 0);
-
- /* Mask RX buffer and TX end interrupt */
- mv_write(MV643XX_ETH_INTERRUPT_MASK_REG(port_num), 0);
-
- /* Mask phy and link status changes interrupts */
- mv_write(MV643XX_ETH_INTERRUPT_EXTEND_MASK_REG(port_num), 0);
-
- return 0;
-}
-
-static int mv643xx_eth_stop(struct net_device *dev)
-{
- struct mv643xx_private *mp = netdev_priv(dev);
-
- spin_lock_irq(&mp->lock);
+ mv643xx_eth_free_tx_rings(dev);
+ mv643xx_eth_free_rx_rings(dev);
- mv643xx_eth_real_stop(dev);
+#ifdef MV643XX_NAPI
+ netif_poll_enable(dev);
+#endif
free_irq(dev->irq, dev);
- spin_unlock_irq(&mp->lock);
return 0;
}
struct pkt_info pkt_info;
while (eth_tx_return_desc(mp, &pkt_info) == ETH_OK) {
- if (pkt_info.return_info) {
- if (skb_shinfo(pkt_info.return_info)->nr_frags)
- dma_unmap_page(NULL, pkt_info.buf_ptr,
- pkt_info.byte_cnt,
- DMA_TO_DEVICE);
- else
- dma_unmap_single(NULL, pkt_info.buf_ptr,
- pkt_info.byte_cnt,
- DMA_TO_DEVICE);
+ if (pkt_info.cmd_sts & ETH_TX_FIRST_DESC)
+ dma_unmap_single(NULL, pkt_info.buf_ptr,
+ pkt_info.byte_cnt,
+ DMA_TO_DEVICE);
+ else
+ dma_unmap_page(NULL, pkt_info.buf_ptr,
+ pkt_info.byte_cnt,
+ DMA_TO_DEVICE);
+ if (pkt_info.return_info)
dev_kfree_skb_irq(pkt_info.return_info);
- } else
- dma_unmap_page(NULL, pkt_info.buf_ptr,
- pkt_info.byte_cnt, DMA_TO_DEVICE);
}
if (netif_queue_stopped(dev) &&
struct mv643xx_private *mp = netdev_priv(dev);
int done = 1, orig_budget, work_done;
unsigned int port_num = mp->port_num;
- unsigned long flags;
#ifdef MV643XX_TX_FAST_REFILL
if (++mp->tx_clean_threshold > 5) {
- spin_lock_irqsave(&mp->lock, flags);
mv643xx_tx(dev);
mp->tx_clean_threshold = 0;
- spin_unlock_irqrestore(&mp->lock, flags);
}
#endif
}
if (done) {
- spin_lock_irqsave(&mp->lock, flags);
- __netif_rx_complete(dev);
+ netif_rx_complete(dev);
mv_write(MV643XX_ETH_INTERRUPT_CAUSE_REG(port_num), 0);
mv_write(MV643XX_ETH_INTERRUPT_CAUSE_EXTEND_REG(port_num), 0);
mv_write(MV643XX_ETH_INTERRUPT_MASK_REG(port_num),
- INT_CAUSE_UNMASK_ALL);
- mv_write(MV643XX_ETH_INTERRUPT_EXTEND_MASK_REG(port_num),
- INT_CAUSE_UNMASK_ALL_EXT);
- spin_unlock_irqrestore(&mp->lock, flags);
+ INT_UNMASK_ALL);
}
return done ? 0 : 1;
}
#endif
+/* Hardware can't handle unaligned fragments smaller than 9 bytes.
+ * This helper function detects that case.
+ */
+
+static inline unsigned int has_tiny_unaligned_frags(struct sk_buff *skb)
+{
+ unsigned int frag;
+ skb_frag_t *fragp;
+
+ for (frag = 0; frag < skb_shinfo(skb)->nr_frags; frag++) {
+ fragp = &skb_shinfo(skb)->frags[frag];
+ if (fragp->size <= 8 && fragp->page_offset & 0x7)
+ return 1;
+ }
+ return 0;
+}
+
+
/*
* mv643xx_eth_start_xmit
*
return 1;
}
+#ifdef MV643XX_CHECKSUM_OFFLOAD_TX
+ if (has_tiny_unaligned_frags(skb)) {
+ if ((skb_linearize(skb, GFP_ATOMIC) != 0)) {
+ stats->tx_dropped++;
+ printk(KERN_DEBUG "%s: failed to linearize tiny "
+ "unaligned fragment\n", dev->name);
+ return 1;
+ }
+ }
+
spin_lock_irqsave(&mp->lock, flags);
- /* Update packet info data structure -- DMA owned, first last */
-#ifdef MV643XX_CHECKSUM_OFFLOAD_TX
if (!skb_shinfo(skb)->nr_frags) {
-linear:
if (skb->ip_summed != CHECKSUM_HW) {
/* Errata BTS #50, IHL must be 5 if no HW checksum */
pkt_info.cmd_sts = ETH_TX_ENABLE_INTERRUPT |
5 << ETH_TX_IHL_SHIFT;
pkt_info.l4i_chk = 0;
} else {
-
pkt_info.cmd_sts = ETH_TX_ENABLE_INTERRUPT |
ETH_TX_FIRST_DESC |
ETH_TX_LAST_DESC |
ETH_GEN_IP_V_4_CHECKSUM |
skb->nh.iph->ihl << ETH_TX_IHL_SHIFT;
/* CPU already calculated pseudo header checksum. */
- if (skb->nh.iph->protocol == IPPROTO_UDP) {
+ if ((skb->protocol == ETH_P_IP) &&
+ (skb->nh.iph->protocol == IPPROTO_UDP) ) {
pkt_info.cmd_sts |= ETH_UDP_FRAME;
pkt_info.l4i_chk = skb->h.uh->check;
- } else if (skb->nh.iph->protocol == IPPROTO_TCP)
+ } else if ((skb->protocol == ETH_P_IP) &&
+ (skb->nh.iph->protocol == IPPROTO_TCP))
pkt_info.l4i_chk = skb->h.th->check;
else {
printk(KERN_ERR
- "%s: chksum proto != TCP or UDP\n",
+ "%s: chksum proto != IPv4 TCP or UDP\n",
dev->name);
spin_unlock_irqrestore(&mp->lock, flags);
return 1;
} else {
unsigned int frag;
- /* Since hardware can't handle unaligned fragments smaller
- * than 9 bytes, if we find any, we linearize the skb
- * and start again. When I've seen it, it's always been
- * the first frag (probably near the end of the page),
- * but we check all frags to be safe.
- */
- for (frag = 0; frag < skb_shinfo(skb)->nr_frags; frag++) {
- skb_frag_t *fragp;
-
- fragp = &skb_shinfo(skb)->frags[frag];
- if (fragp->size <= 8 && fragp->page_offset & 0x7) {
- skb_linearize(skb, GFP_ATOMIC);
- printk(KERN_DEBUG "%s: unaligned tiny fragment"
- "%d of %d, fixed\n",
- dev->name, frag,
- skb_shinfo(skb)->nr_frags);
- goto linear;
- }
- }
-
/* first frag which is skb header */
pkt_info.byte_cnt = skb_headlen(skb);
pkt_info.buf_ptr = dma_map_single(NULL, skb->data,
ETH_GEN_IP_V_4_CHECKSUM |
skb->nh.iph->ihl << ETH_TX_IHL_SHIFT;
/* CPU already calculated pseudo header checksum. */
- if (skb->nh.iph->protocol == IPPROTO_UDP) {
+ if ((skb->protocol == ETH_P_IP) &&
+ (skb->nh.iph->protocol == IPPROTO_UDP)) {
pkt_info.cmd_sts |= ETH_UDP_FRAME;
pkt_info.l4i_chk = skb->h.uh->check;
- } else if (skb->nh.iph->protocol == IPPROTO_TCP)
+ } else if ((skb->protocol == ETH_P_IP) &&
+ (skb->nh.iph->protocol == IPPROTO_TCP))
pkt_info.l4i_chk = skb->h.th->check;
else {
printk(KERN_ERR
- "%s: chksum proto != TCP or UDP\n",
+ "%s: chksum proto != IPv4 TCP or UDP\n",
dev->name);
spin_unlock_irqrestore(&mp->lock, flags);
return 1;
}
}
#else
+ spin_lock_irqsave(&mp->lock, flags);
+
pkt_info.cmd_sts = ETH_TX_ENABLE_INTERRUPT | ETH_TX_FIRST_DESC |
ETH_TX_LAST_DESC;
pkt_info.l4i_chk = 0;
}
#ifdef CONFIG_NET_POLL_CONTROLLER
-static inline void mv643xx_enable_irq(struct mv643xx_private *mp)
-{
- int port_num = mp->port_num;
- unsigned long flags;
-
- spin_lock_irqsave(&mp->lock, flags);
- mv_write(MV643XX_ETH_INTERRUPT_MASK_REG(port_num),
- INT_CAUSE_UNMASK_ALL);
- mv_write(MV643XX_ETH_INTERRUPT_EXTEND_MASK_REG(port_num),
- INT_CAUSE_UNMASK_ALL_EXT);
- spin_unlock_irqrestore(&mp->lock, flags);
-}
-
-static inline void mv643xx_disable_irq(struct mv643xx_private *mp)
-{
- int port_num = mp->port_num;
- unsigned long flags;
-
- spin_lock_irqsave(&mp->lock, flags);
- mv_write(MV643XX_ETH_INTERRUPT_MASK_REG(port_num),
- INT_CAUSE_MASK_ALL);
- mv_write(MV643XX_ETH_INTERRUPT_EXTEND_MASK_REG(port_num),
- INT_CAUSE_MASK_ALL_EXT);
- spin_unlock_irqrestore(&mp->lock, flags);
-}
-
static void mv643xx_netpoll(struct net_device *netdev)
{
struct mv643xx_private *mp = netdev_priv(netdev);
+ int port_num = mp->port_num;
+
+ mv_write(MV643XX_ETH_INTERRUPT_MASK_REG(port_num), INT_MASK_ALL);
+ /* wait for previous write to complete */
+ mv_read(MV643XX_ETH_INTERRUPT_MASK_REG(port_num));
- mv643xx_disable_irq(mp);
mv643xx_eth_int_handler(netdev->irq, netdev, NULL);
- mv643xx_enable_irq(mp);
+
+ mv_write(MV643XX_ETH_INTERRUPT_MASK_REG(port_num), INT_UNMASK_ALL);
}
#endif
* Zero copy can only work if we use Discovery II memory. Else, we will
* have to map the buffers to ISA memory which is only 16 MB
*/
- dev->features = NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_HW_CSUM;
+ dev->features = NETIF_F_SG | NETIF_F_IP_CSUM;
#endif
#endif
return 1;
}
+/*
+ * The entries in each table are indexed by a hash of a packet's MAC
+ * address. One bit in each entry determines whether the packet is
+ * accepted. There are 4 entries (each 8 bits wide) in each register
+ * of the table. The bits in each entry are defined as follows:
+ * 0 Accept=1, Drop=0
+ * 3-1 Queue (ETH_Q0=0)
+ * 7-4 Reserved = 0;
+ */
+static void eth_port_set_filter_table_entry(int table, unsigned char entry)
+{
+ unsigned int table_reg;
+ unsigned int tbl_offset;
+ unsigned int reg_offset;
+
+ tbl_offset = (entry / 4) * 4; /* Register offset of DA table entry */
+ reg_offset = entry % 4; /* Entry offset within the register */
+
+ /* Set "accepts frame bit" at specified table entry */
+ table_reg = mv_read(table + tbl_offset);
+ table_reg |= 0x01 << (8 * reg_offset);
+ mv_write(table + tbl_offset, table_reg);
+}
+
+/*
+ * eth_port_mc_addr - Multicast address settings.
+ *
+ * The MV device supports multicast using two tables:
+ * 1) Special Multicast Table for MAC addresses of the form
+ * 0x01-00-5E-00-00-XX (where XX is between 0x00 and 0x_FF).
+ * The MAC DA[7:0] bits are used as a pointer to the Special Multicast
+ * Table entries in the DA-Filter table.
+ * 2) Other Multicast Table for multicast of another type. A CRC-8bit
+ * is used as an index to the Other Multicast Table entries in the
+ * DA-Filter table. This function calculates the CRC-8bit value.
+ * In either case, eth_port_set_filter_table_entry() is then called
+ * to set to set the actual table entry.
+ */
+static void eth_port_mc_addr(unsigned int eth_port_num, unsigned char *p_addr)
+{
+ unsigned int mac_h;
+ unsigned int mac_l;
+ unsigned char crc_result = 0;
+ int table;
+ int mac_array[48];
+ int crc[8];
+ int i;
+
+ if ((p_addr[0] == 0x01) && (p_addr[1] == 0x00) &&
+ (p_addr[2] == 0x5E) && (p_addr[3] == 0x00) && (p_addr[4] == 0x00)) {
+ table = MV643XX_ETH_DA_FILTER_SPECIAL_MULTICAST_TABLE_BASE
+ (eth_port_num);
+ eth_port_set_filter_table_entry(table, p_addr[5]);
+ return;
+ }
+
+ /* Calculate CRC-8 out of the given address */
+ mac_h = (p_addr[0] << 8) | (p_addr[1]);
+ mac_l = (p_addr[2] << 24) | (p_addr[3] << 16) |
+ (p_addr[4] << 8) | (p_addr[5] << 0);
+
+ for (i = 0; i < 32; i++)
+ mac_array[i] = (mac_l >> i) & 0x1;
+ for (i = 32; i < 48; i++)
+ mac_array[i] = (mac_h >> (i - 32)) & 0x1;
+
+ crc[0] = mac_array[45] ^ mac_array[43] ^ mac_array[40] ^ mac_array[39] ^
+ mac_array[35] ^ mac_array[34] ^ mac_array[31] ^ mac_array[30] ^
+ mac_array[28] ^ mac_array[23] ^ mac_array[21] ^ mac_array[19] ^
+ mac_array[18] ^ mac_array[16] ^ mac_array[14] ^ mac_array[12] ^
+ mac_array[8] ^ mac_array[7] ^ mac_array[6] ^ mac_array[0];
+
+ crc[1] = mac_array[46] ^ mac_array[45] ^ mac_array[44] ^ mac_array[43] ^
+ mac_array[41] ^ mac_array[39] ^ mac_array[36] ^ mac_array[34] ^
+ mac_array[32] ^ mac_array[30] ^ mac_array[29] ^ mac_array[28] ^
+ mac_array[24] ^ mac_array[23] ^ mac_array[22] ^ mac_array[21] ^
+ mac_array[20] ^ mac_array[18] ^ mac_array[17] ^ mac_array[16] ^
+ mac_array[15] ^ mac_array[14] ^ mac_array[13] ^ mac_array[12] ^
+ mac_array[9] ^ mac_array[6] ^ mac_array[1] ^ mac_array[0];
+
+ crc[2] = mac_array[47] ^ mac_array[46] ^ mac_array[44] ^ mac_array[43] ^
+ mac_array[42] ^ mac_array[39] ^ mac_array[37] ^ mac_array[34] ^
+ mac_array[33] ^ mac_array[29] ^ mac_array[28] ^ mac_array[25] ^
+ mac_array[24] ^ mac_array[22] ^ mac_array[17] ^ mac_array[15] ^
+ mac_array[13] ^ mac_array[12] ^ mac_array[10] ^ mac_array[8] ^
+ mac_array[6] ^ mac_array[2] ^ mac_array[1] ^ mac_array[0];
+
+ crc[3] = mac_array[47] ^ mac_array[45] ^ mac_array[44] ^ mac_array[43] ^
+ mac_array[40] ^ mac_array[38] ^ mac_array[35] ^ mac_array[34] ^
+ mac_array[30] ^ mac_array[29] ^ mac_array[26] ^ mac_array[25] ^
+ mac_array[23] ^ mac_array[18] ^ mac_array[16] ^ mac_array[14] ^
+ mac_array[13] ^ mac_array[11] ^ mac_array[9] ^ mac_array[7] ^
+ mac_array[3] ^ mac_array[2] ^ mac_array[1];
+
+ crc[4] = mac_array[46] ^ mac_array[45] ^ mac_array[44] ^ mac_array[41] ^
+ mac_array[39] ^ mac_array[36] ^ mac_array[35] ^ mac_array[31] ^
+ mac_array[30] ^ mac_array[27] ^ mac_array[26] ^ mac_array[24] ^
+ mac_array[19] ^ mac_array[17] ^ mac_array[15] ^ mac_array[14] ^
+ mac_array[12] ^ mac_array[10] ^ mac_array[8] ^ mac_array[4] ^
+ mac_array[3] ^ mac_array[2];
+
+ crc[5] = mac_array[47] ^ mac_array[46] ^ mac_array[45] ^ mac_array[42] ^
+ mac_array[40] ^ mac_array[37] ^ mac_array[36] ^ mac_array[32] ^
+ mac_array[31] ^ mac_array[28] ^ mac_array[27] ^ mac_array[25] ^
+ mac_array[20] ^ mac_array[18] ^ mac_array[16] ^ mac_array[15] ^
+ mac_array[13] ^ mac_array[11] ^ mac_array[9] ^ mac_array[5] ^
+ mac_array[4] ^ mac_array[3];
+
+ crc[6] = mac_array[47] ^ mac_array[46] ^ mac_array[43] ^ mac_array[41] ^
+ mac_array[38] ^ mac_array[37] ^ mac_array[33] ^ mac_array[32] ^
+ mac_array[29] ^ mac_array[28] ^ mac_array[26] ^ mac_array[21] ^
+ mac_array[19] ^ mac_array[17] ^ mac_array[16] ^ mac_array[14] ^
+ mac_array[12] ^ mac_array[10] ^ mac_array[6] ^ mac_array[5] ^
+ mac_array[4];
+
+ crc[7] = mac_array[47] ^ mac_array[44] ^ mac_array[42] ^ mac_array[39] ^
+ mac_array[38] ^ mac_array[34] ^ mac_array[33] ^ mac_array[30] ^
+ mac_array[29] ^ mac_array[27] ^ mac_array[22] ^ mac_array[20] ^
+ mac_array[18] ^ mac_array[17] ^ mac_array[15] ^ mac_array[13] ^
+ mac_array[11] ^ mac_array[7] ^ mac_array[6] ^ mac_array[5];
+
+ for (i = 0; i < 8; i++)
+ crc_result = crc_result | (crc[i] << i);
+
+ table = MV643XX_ETH_DA_FILTER_OTHER_MULTICAST_TABLE_BASE(eth_port_num);
+ eth_port_set_filter_table_entry(table, crc_result);
+}
+
+/*
+ * Set the entire multicast list based on dev->mc_list.
+ */
+static void eth_port_set_multicast_list(struct net_device *dev)
+{
+
+ struct dev_mc_list *mc_list;
+ int i;
+ int table_index;
+ struct mv643xx_private *mp = netdev_priv(dev);
+ unsigned int eth_port_num = mp->port_num;
+
+ /* If the device is in promiscuous mode or in all multicast mode,
+ * we will fully populate both multicast tables with accept.
+ * This is guaranteed to yield a match on all multicast addresses...
+ */
+ if ((dev->flags & IFF_PROMISC) || (dev->flags & IFF_ALLMULTI)) {
+ for (table_index = 0; table_index <= 0xFC; table_index += 4) {
+ /* Set all entries in DA filter special multicast
+ * table (Ex_dFSMT)
+ * Set for ETH_Q0 for now
+ * Bits
+ * 0 Accept=1, Drop=0
+ * 3-1 Queue ETH_Q0=0
+ * 7-4 Reserved = 0;
+ */
+ mv_write(MV643XX_ETH_DA_FILTER_SPECIAL_MULTICAST_TABLE_BASE(eth_port_num) + table_index, 0x01010101);
+
+ /* Set all entries in DA filter other multicast
+ * table (Ex_dFOMT)
+ * Set for ETH_Q0 for now
+ * Bits
+ * 0 Accept=1, Drop=0
+ * 3-1 Queue ETH_Q0=0
+ * 7-4 Reserved = 0;
+ */
+ mv_write(MV643XX_ETH_DA_FILTER_OTHER_MULTICAST_TABLE_BASE(eth_port_num) + table_index, 0x01010101);
+ }
+ return;
+ }
+
+ /* We will clear out multicast tables every time we get the list.
+ * Then add the entire new list...
+ */
+ for (table_index = 0; table_index <= 0xFC; table_index += 4) {
+ /* Clear DA filter special multicast table (Ex_dFSMT) */
+ mv_write(MV643XX_ETH_DA_FILTER_SPECIAL_MULTICAST_TABLE_BASE
+ (eth_port_num) + table_index, 0);
+
+ /* Clear DA filter other multicast table (Ex_dFOMT) */
+ mv_write(MV643XX_ETH_DA_FILTER_OTHER_MULTICAST_TABLE_BASE
+ (eth_port_num) + table_index, 0);
+ }
+
+ /* Get pointer to net_device multicast list and add each one... */
+ for (i = 0, mc_list = dev->mc_list;
+ (i < 256) && (mc_list != NULL) && (i < dev->mc_count);
+ i++, mc_list = mc_list->next)
+ if (mc_list->dmi_addrlen == 6)
+ eth_port_mc_addr(eth_port_num, mc_list->dmi_addr);
+}
+
/*
* eth_port_init_mac_tables - Clear all entrance in the UC, SMC and OMC tables
*
for (table_index = 0; table_index <= 0xFC; table_index += 4) {
/* Clear DA filter special multicast table (Ex_dFSMT) */
- mv_write((MV643XX_ETH_DA_FILTER_SPECIAL_MULTICAST_TABLE_BASE
- (eth_port_num) + table_index), 0);
+ mv_write(MV643XX_ETH_DA_FILTER_SPECIAL_MULTICAST_TABLE_BASE
+ (eth_port_num) + table_index, 0);
/* Clear DA filter other multicast table (Ex_dFOMT) */
- mv_write((MV643XX_ETH_DA_FILTER_OTHER_MULTICAST_TABLE_BASE
- (eth_port_num) + table_index), 0);
+ mv_write(MV643XX_ETH_DA_FILTER_OTHER_MULTICAST_TABLE_BASE
+ (eth_port_num) + table_index, 0);
}
}
* Tx ring 'first' and 'used' indexes are updated.
*
* RETURN:
- * ETH_ERROR in case the routine can not access Tx desc ring.
- * ETH_RETRY in case there is transmission in process.
- * ETH_END_OF_JOB if the routine has nothing to release.
- * ETH_OK otherwise.
+ * ETH_OK on success
+ * ETH_ERROR otherwise.
*
*/
static ETH_FUNC_RET_STATUS eth_tx_return_desc(struct mv643xx_private *mp,
struct pkt_info *p_pkt_info)
{
int tx_desc_used;
+ int tx_busy_desc;
+ struct eth_tx_desc *p_tx_desc_used;
+ unsigned int command_status;
+ unsigned long flags;
+ int err = ETH_OK;
+
+ spin_lock_irqsave(&mp->lock, flags);
+
#ifdef MV643XX_CHECKSUM_OFFLOAD_TX
- int tx_busy_desc = mp->tx_first_desc_q;
+ tx_busy_desc = mp->tx_first_desc_q;
#else
- int tx_busy_desc = mp->tx_curr_desc_q;
+ tx_busy_desc = mp->tx_curr_desc_q;
#endif
- struct eth_tx_desc *p_tx_desc_used;
- unsigned int command_status;
/* Get the Tx Desc ring indexes */
tx_desc_used = mp->tx_used_desc_q;
p_tx_desc_used = &mp->p_tx_desc_area[tx_desc_used];
/* Sanity check */
- if (p_tx_desc_used == NULL)
- return ETH_ERROR;
+ if (p_tx_desc_used == NULL) {
+ err = ETH_ERROR;
+ goto out;
+ }
/* Stop release. About to overlap the current available Tx descriptor */
- if (tx_desc_used == tx_busy_desc && !mp->tx_resource_err)
- return ETH_END_OF_JOB;
+ if (tx_desc_used == tx_busy_desc && !mp->tx_resource_err) {
+ err = ETH_ERROR;
+ goto out;
+ }
command_status = p_tx_desc_used->cmd_sts;
/* Still transmitting... */
- if (command_status & (ETH_BUFFER_OWNED_BY_DMA))
- return ETH_RETRY;
+ if (command_status & (ETH_BUFFER_OWNED_BY_DMA)) {
+ err = ETH_ERROR;
+ goto out;
+ }
/* Pass the packet information to the caller */
p_pkt_info->cmd_sts = command_status;
p_pkt_info->return_info = mp->tx_skb[tx_desc_used];
+ p_pkt_info->buf_ptr = p_tx_desc_used->buf_ptr;
+ p_pkt_info->byte_cnt = p_tx_desc_used->byte_cnt;
mp->tx_skb[tx_desc_used] = NULL;
/* Update the next descriptor to release. */
BUG_ON(mp->tx_ring_skbs == 0);
mp->tx_ring_skbs--;
- return ETH_OK;
+out:
+ spin_unlock_irqrestore(&mp->lock, flags);
+
+ return err;
}
/*
int rx_next_curr_desc, rx_curr_desc, rx_used_desc;
volatile struct eth_rx_desc *p_rx_desc;
unsigned int command_status;
+ unsigned long flags;
/* Do not process Rx ring in case of Rx ring resource error */
if (mp->rx_resource_err)
return ETH_QUEUE_FULL;
+ spin_lock_irqsave(&mp->lock, flags);
+
/* Get the Rx Desc ring 'curr and 'used' indexes */
rx_curr_desc = mp->rx_curr_desc_q;
rx_used_desc = mp->rx_used_desc_q;
rmb();
/* Nothing to receive... */
- if (command_status & (ETH_BUFFER_OWNED_BY_DMA))
+ if (command_status & (ETH_BUFFER_OWNED_BY_DMA)) {
+ spin_unlock_irqrestore(&mp->lock, flags);
return ETH_END_OF_JOB;
+ }
p_pkt_info->byte_cnt = (p_rx_desc->byte_cnt) - RX_BUF_OFFSET;
p_pkt_info->cmd_sts = command_status;
p_pkt_info->return_info = mp->rx_skb[rx_curr_desc];
p_pkt_info->l4i_chk = p_rx_desc->buf_size;
- /* Clean the return info field to indicate that the packet has been */
- /* moved to the upper layers */
+ /*
+ * Clean the return info field to indicate that the
+ * packet has been moved to the upper layers
+ */
mp->rx_skb[rx_curr_desc] = NULL;
/* Update current index in data structure */
if (rx_next_curr_desc == rx_used_desc)
mp->rx_resource_err = 1;
+ spin_unlock_irqrestore(&mp->lock, flags);
+
return ETH_OK;
}
{
int used_rx_desc; /* Where to return Rx resource */
volatile struct eth_rx_desc *p_used_rx_desc;
+ unsigned long flags;
+
+ spin_lock_irqsave(&mp->lock, flags);
/* Get 'used' Rx descriptor */
used_rx_desc = mp->rx_used_desc_q;
/* Any Rx return cancels the Rx resource error status */
mp->rx_resource_err = 0;
+ spin_unlock_irqrestore(&mp->lock, flags);
+
return ETH_OK;
}
};
#define MV643XX_STAT(m) sizeof(((struct mv643xx_private *)0)->m), \
- offsetof(struct mv643xx_private, m)
+ offsetof(struct mv643xx_private, m)
static const struct mv643xx_stats mv643xx_gstrings_stats[] = {
{ "rx_packets", MV643XX_STAT(stats.rx_packets) },
return 0;
}
-static void
-mv643xx_get_drvinfo(struct net_device *netdev,
- struct ethtool_drvinfo *drvinfo)
+static void mv643xx_get_drvinfo(struct net_device *netdev,
+ struct ethtool_drvinfo *drvinfo)
{
strncpy(drvinfo->driver, mv643xx_driver_name, 32);
strncpy(drvinfo->version, mv643xx_driver_version, 32);
drvinfo->n_stats = MV643XX_STATS_LEN;
}
-static int
-mv643xx_get_stats_count(struct net_device *netdev)
+static int mv643xx_get_stats_count(struct net_device *netdev)
{
return MV643XX_STATS_LEN;
}
-static void
-mv643xx_get_ethtool_stats(struct net_device *netdev,
- struct ethtool_stats *stats, uint64_t *data)
+static void mv643xx_get_ethtool_stats(struct net_device *netdev,
+ struct ethtool_stats *stats, uint64_t *data)
{
struct mv643xx_private *mp = netdev->priv;
int i;
eth_update_mib_counters(mp);
- for(i = 0; i < MV643XX_STATS_LEN; i++) {
+ for (i = 0; i < MV643XX_STATS_LEN; i++) {
char *p = (char *)mp+mv643xx_gstrings_stats[i].stat_offset;
- data[i] = (mv643xx_gstrings_stats[i].sizeof_stat ==
+ data[i] = (mv643xx_gstrings_stats[i].sizeof_stat ==
sizeof(uint64_t)) ? *(uint64_t *)p : *(uint32_t *)p;
}
}
-static void
-mv643xx_get_strings(struct net_device *netdev, uint32_t stringset, uint8_t *data)
+static void mv643xx_get_strings(struct net_device *netdev, uint32_t stringset,
+ uint8_t *data)
{
int i;
switch(stringset) {
case ETH_SS_STATS:
for (i=0; i < MV643XX_STATS_LEN; i++) {
- memcpy(data + i * ETH_GSTRING_LEN,
- mv643xx_gstrings_stats[i].stat_string,
- ETH_GSTRING_LEN);
+ memcpy(data + i * ETH_GSTRING_LEN,
+ mv643xx_gstrings_stats[i].stat_string,
+ ETH_GSTRING_LEN);
}
break;
}
txdp->Buffer_Pointer = (u64) pci_map_page
(sp->pdev, frag->page, frag->page_offset,
frag->size, PCI_DMA_TODEVICE);
- txdp->Control_1 |= TXD_BUFFER0_SIZE(frag->size);
+ txdp->Control_1 = TXD_BUFFER0_SIZE(frag->size);
if (skb_shinfo(skb)->ufo_size)
txdp->Control_1 |= TXD_UFO_EN;
}
pci_set_master(pdev);
- if (!(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK)))
+ if (sizeof(dma_addr_t) > sizeof(u32) &&
+ !(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK))) {
using_dac = 1;
- else if (!(err = pci_set_dma_mask(pdev, DMA_32BIT_MASK))) {
- printk(KERN_ERR PFX "%s no usable DMA configuration\n",
- pci_name(pdev));
- goto err_out_free_regions;
+ err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK);
+ if (err < 0) {
+ printk(KERN_ERR PFX "%s unable to obtain 64 bit DMA "
+ "for consistent allocations\n", pci_name(pdev));
+ goto err_out_free_regions;
+ }
+ } else {
+ err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
+ if (err) {
+ printk(KERN_ERR PFX "%s no usable DMA configuration\n",
+ pci_name(pdev));
+ goto err_out_free_regions;
+ }
}
#ifdef __BIG_ENDIAN
#include "sky2.h"
#define DRV_NAME "sky2"
-#define DRV_VERSION "0.11"
+#define DRV_VERSION "0.13"
#define PFX DRV_NAME " "
/*
#define RX_LE_BYTES (RX_LE_SIZE*sizeof(struct sky2_rx_le))
#define RX_MAX_PENDING (RX_LE_SIZE/2 - 2)
#define RX_DEF_PENDING RX_MAX_PENDING
+#define RX_SKB_ALIGN 8
#define TX_RING_SIZE 512
#define TX_DEF_PENDING (TX_RING_SIZE - 1)
static const u32 default_msg =
NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_LINK
| NETIF_MSG_TIMER | NETIF_MSG_TX_ERR | NETIF_MSG_RX_ERR
- | NETIF_MSG_IFUP | NETIF_MSG_IFDOWN | NETIF_MSG_INTR;
+ | NETIF_MSG_IFUP | NETIF_MSG_IFDOWN;
static int debug = -1; /* defaults above */
module_param(debug, int, 0);
}
-static void sky2_ramset(struct sky2_hw *hw, u16 q, u32 start, size_t len)
+/* Assign Ram Buffer allocation.
+ * start and end are in units of 4k bytes
+ * ram registers are in units of 64bit words
+ */
+static void sky2_ramset(struct sky2_hw *hw, u16 q, u8 startk, u8 endk)
{
- u32 end;
+ u32 start, end;
- start /= 8;
- len /= 8;
- end = start + len - 1;
+ start = startk * 4096/8;
+ end = (endk * 4096/8) - 1;
sky2_write8(hw, RB_ADDR(q, RB_CTRL), RB_RST_CLR);
sky2_write32(hw, RB_ADDR(q, RB_START), start);
sky2_write32(hw, RB_ADDR(q, RB_RP), start);
if (q == Q_R1 || q == Q_R2) {
- u32 rxup, rxlo;
+ u32 space = (endk - startk) * 4096/8;
+ u32 tp = space - space/4;
- rxlo = len/2;
- rxup = rxlo + len/4;
+ /* On receive queue's set the thresholds
+ * give receiver priority when > 3/4 full
+ * send pause when down to 2K
+ */
+ sky2_write32(hw, RB_ADDR(q, RB_RX_UTHP), tp);
+ sky2_write32(hw, RB_ADDR(q, RB_RX_LTHP), space/2);
- /* Set thresholds on receive queue's */
- sky2_write32(hw, RB_ADDR(q, RB_RX_UTPP), rxup);
- sky2_write32(hw, RB_ADDR(q, RB_RX_LTPP), rxlo);
+ tp = space - 2048/8;
+ sky2_write32(hw, RB_ADDR(q, RB_RX_UTPP), tp);
+ sky2_write32(hw, RB_ADDR(q, RB_RX_LTPP), space/4);
} else {
/* Enable store & forward on Tx queue's because
* Tx FIFO is only 1K on Yukon
* This is a workaround code taken from SysKonnect sk98lin driver
* to deal with chip bug on Yukon EC rev 0 in the wraparound case.
*/
-static inline void sky2_put_idx(struct sky2_hw *hw, unsigned q,
+static void sky2_put_idx(struct sky2_hw *hw, unsigned q,
u16 idx, u16 *last, u16 size)
{
+ wmb();
if (is_ec_a1(hw) && idx < *last) {
u16 hwget = sky2_read16(hw, Y2_QADDR(q, PREF_UNIT_GET_IDX));
sky2_write16(hw, Y2_QADDR(q, PREF_UNIT_PUT_IDX), idx);
}
*last = idx;
+ mmiowb();
}
/* Return high part of DMA address (could be 32 or 64 bit) */
static inline u32 high32(dma_addr_t a)
{
- return (a >> 16) >> 16;
+ return sizeof(a) > sizeof(u32) ? (a >> 16) >> 16 : 0;
}
/* Build description to hardware about buffer */
-static inline void sky2_rx_add(struct sky2_port *sky2, dma_addr_t map)
+static void sky2_rx_add(struct sky2_port *sky2, dma_addr_t map)
{
struct sky2_rx_le *le;
u32 hi = high32(map);
struct sky2_hw *hw = sky2->hw;
u16 port = sky2->port;
- spin_lock(&sky2->tx_lock);
+ spin_lock_bh(&sky2->tx_lock);
sky2_write32(hw, SK_REG(port, RX_GMF_CTRL_T), RX_VLAN_STRIP_ON);
sky2_write32(hw, SK_REG(port, TX_GMF_CTRL_T), TX_VLAN_TAG_ON);
sky2->vlgrp = grp;
- spin_unlock(&sky2->tx_lock);
+ spin_unlock_bh(&sky2->tx_lock);
}
static void sky2_vlan_rx_kill_vid(struct net_device *dev, unsigned short vid)
struct sky2_hw *hw = sky2->hw;
u16 port = sky2->port;
- spin_lock(&sky2->tx_lock);
+ spin_lock_bh(&sky2->tx_lock);
sky2_write32(hw, SK_REG(port, RX_GMF_CTRL_T), RX_VLAN_STRIP_OFF);
sky2_write32(hw, SK_REG(port, TX_GMF_CTRL_T), TX_VLAN_TAG_OFF);
if (sky2->vlgrp)
sky2->vlgrp->vlan_devices[vid] = NULL;
- spin_unlock(&sky2->tx_lock);
+ spin_unlock_bh(&sky2->tx_lock);
}
#endif
+/*
+ * It appears the hardware has a bug in the FIFO logic that
+ * cause it to hang if the FIFO gets overrun and the receive buffer
+ * is not aligned. ALso alloc_skb() won't align properly if slab
+ * debugging is enabled.
+ */
+static inline struct sk_buff *sky2_alloc_skb(unsigned int size, gfp_t gfp_mask)
+{
+ struct sk_buff *skb;
+
+ skb = alloc_skb(size + RX_SKB_ALIGN, gfp_mask);
+ if (likely(skb)) {
+ unsigned long p = (unsigned long) skb->data;
+ skb_reserve(skb,
+ ((p + RX_SKB_ALIGN - 1) & ~(RX_SKB_ALIGN - 1)) - p);
+ }
+
+ return skb;
+}
+
/*
* Allocate and setup receiver buffer pool.
* In case of 64 bit dma, there are 2X as many list elements
* available as ring entries
* and need to reserve one list element so we don't wrap around.
- *
- * It appears the hardware has a bug in the FIFO logic that
- * cause it to hang if the FIFO gets overrun and the receive buffer
- * is not aligned. This means we can't use skb_reserve to align
- * the IP header.
*/
static int sky2_rx_start(struct sky2_port *sky2)
{
for (i = 0; i < sky2->rx_pending; i++) {
struct ring_info *re = sky2->rx_ring + i;
- re->skb = dev_alloc_skb(sky2->rx_bufsize);
+ re->skb = sky2_alloc_skb(sky2->rx_bufsize, GFP_KERNEL);
if (!re->skb)
goto nomem;
sky2_mac_init(hw, port);
- /* Configure RAM buffers */
- if (hw->chip_id == CHIP_ID_YUKON_FE ||
- (hw->chip_id == CHIP_ID_YUKON_EC && hw->chip_rev == 2))
- ramsize = 4096;
- else {
- u8 e0 = sky2_read8(hw, B2_E_0);
- ramsize = (e0 == 0) ? (128 * 1024) : (e0 * 4096);
- }
+ /* Determine available ram buffer space (in 4K blocks).
+ * Note: not sure about the FE setting below yet
+ */
+ if (hw->chip_id == CHIP_ID_YUKON_FE)
+ ramsize = 4;
+ else
+ ramsize = sky2_read8(hw, B2_E_0);
+
+ /* Give transmitter one third (rounded up) */
+ rxspace = ramsize - (ramsize + 2) / 3;
- /* 2/3 for Rx */
- rxspace = (2 * ramsize) / 3;
sky2_ramset(hw, rxqaddr[port], 0, rxspace);
- sky2_ramset(hw, txqaddr[port], rxspace, ramsize - rxspace);
+ sky2_ramset(hw, txqaddr[port], rxspace, ramsize);
/* Make sure SyncQ is disabled */
sky2_write8(hw, RB_ADDR(port == 0 ? Q_XS1 : Q_XS2, RB_CTRL),
}
/* Estimate of number of transmit list elements required */
-static inline unsigned tx_le_req(const struct sk_buff *skb)
+static unsigned tx_le_req(const struct sk_buff *skb)
{
unsigned count;
u16 mss;
u8 ctrl;
+ /* No BH disabling for tx_lock here. We are running in BH disabled
+ * context and TX reclaim runs via poll inside of a software
+ * interrupt, and no related locks in IRQ processing.
+ */
if (!spin_trylock(&sky2->tx_lock))
return NETDEV_TX_LOCKED;
*/
if (!netif_queue_stopped(dev)) {
netif_stop_queue(dev);
- printk(KERN_WARNING PFX "%s: ring full when queue awake!\n",
- dev->name);
+ if (net_ratelimit())
+ printk(KERN_WARNING PFX "%s: ring full when queue awake!\n",
+ dev->name);
}
spin_unlock(&sky2->tx_lock);
mapping = pci_map_page(hw->pdev, frag->page, frag->page_offset,
frag->size, PCI_DMA_TODEVICE);
- addr64 = (mapping >> 16) >> 16;
+ addr64 = high32(mapping);
if (addr64 != sky2->tx_addr64) {
le = get_tx_le(sky2);
le->tx.addr = cpu_to_le32(addr64);
netif_stop_queue(dev);
out_unlock:
- mmiowb();
spin_unlock(&sky2->tx_lock);
dev->trans_start = jiffies;
dev_kfree_skb_any(skb);
}
- spin_lock(&sky2->tx_lock);
sky2->tx_cons = put;
if (netif_queue_stopped(dev) && tx_avail(sky2) > MAX_SKB_TX_LE)
netif_wake_queue(dev);
- spin_unlock(&sky2->tx_lock);
}
/* Cleanup all untransmitted buffers, assume transmitter not running */
static void sky2_tx_clean(struct sky2_port *sky2)
{
+ spin_lock_bh(&sky2->tx_lock);
sky2_tx_complete(sky2, sky2->tx_prod);
+ spin_unlock_bh(&sky2->tx_lock);
}
/* Network shutdown */
local_irq_enable();
}
+
+/* Transmit timeout is only called if we are running, carries is up
+ * and tx queue is full (stopped).
+ */
static void sky2_tx_timeout(struct net_device *dev)
{
struct sky2_port *sky2 = netdev_priv(dev);
struct sky2_hw *hw = sky2->hw;
unsigned txq = txqaddr[sky2->port];
+ u16 ridx;
+
+ /* Maybe we just missed an status interrupt */
+ spin_lock(&sky2->tx_lock);
+ ridx = sky2_read16(hw,
+ sky2->port == 0 ? STAT_TXA1_RIDX : STAT_TXA2_RIDX);
+ sky2_tx_complete(sky2, ridx);
+ spin_unlock(&sky2->tx_lock);
+
+ if (!netif_queue_stopped(dev)) {
+ if (net_ratelimit())
+ pr_info(PFX "transmit interrupt missed? recovered\n");
+ return;
+ }
if (netif_msg_timer(sky2))
printk(KERN_ERR PFX "%s: tx timeout\n", dev->name);
- netif_stop_queue(dev);
-
sky2_write32(hw, Q_ADDR(txq, Q_CSR), BMU_STOP);
- sky2_read32(hw, Q_ADDR(txq, Q_CSR));
-
sky2_write32(hw, Y2_QADDR(txq, PREF_UNIT_CTRL), PREF_UNIT_RST_SET);
sky2_tx_clean(sky2);
sky2_qset(hw, txq);
sky2_prefetch_init(hw, txq, sky2->tx_le_map, TX_RING_SIZE - 1);
-
- netif_wake_queue(dev);
}
} else {
struct sk_buff *nskb;
- nskb = dev_alloc_skb(sky2->rx_bufsize);
+ nskb = sky2_alloc_skb(sky2->rx_bufsize, GFP_ATOMIC);
if (!nskb)
goto resubmit;
error:
++sky2->net_stats.rx_errors;
- if (netif_msg_rx_err(sky2))
+ if (netif_msg_rx_err(sky2) && net_ratelimit())
printk(KERN_INFO PFX "%s: rx error, status 0x%x length %d\n",
sky2->netdev->name, status, length);
*/
#define TX_NO_STATUS 0xffff
-static inline void sky2_tx_check(struct sky2_hw *hw, int port, u16 last)
+static void sky2_tx_check(struct sky2_hw *hw, int port, u16 last)
{
if (last != TX_NO_STATUS) {
struct net_device *dev = hw->dev[port];
if (dev && netif_running(dev)) {
struct sky2_port *sky2 = netdev_priv(dev);
+
+ spin_lock(&sky2->tx_lock);
sky2_tx_complete(sky2, last);
+ spin_unlock(&sky2->tx_lock);
}
}
}
struct sk_buff *skb;
u32 status;
u16 length;
- u8 op;
le = hw->st_le + hw->st_idx;
hw->st_idx = (hw->st_idx + 1) % STATUS_RING_SIZE;
sky2 = netdev_priv(dev);
status = le32_to_cpu(le->status);
length = le16_to_cpu(le->length);
- op = le->opcode & ~HW_OWNER;
- le->opcode = 0;
- switch (op) {
+ switch (le->opcode & ~HW_OWNER) {
case OP_RXSTAT:
skb = sky2_receive(sky2, length, status);
if (!skb)
default:
if (net_ratelimit())
printk(KERN_WARNING PFX
- "unknown status opcode 0x%x\n", op);
+ "unknown status opcode 0x%x\n", le->opcode);
break;
}
}
exit_loop:
sky2_write32(hw, STAT_CTRL, SC_STAT_CLR_IRQ);
- mmiowb();
sky2_tx_check(hw, 0, tx_done[0]);
sky2_tx_check(hw, 1, tx_done[1]);
netif_rx_complete(dev0);
hw->intr_mask |= Y2_IS_STAT_BMU;
sky2_write32(hw, B0_IMSK, hw->intr_mask);
- mmiowb();
return 0;
} else {
*budget -= work_done;
{
struct net_device *dev = hw->dev[port];
- printk(KERN_INFO PFX "%s: hw error interrupt status 0x%x\n",
- dev->name, status);
+ if (net_ratelimit())
+ printk(KERN_INFO PFX "%s: hw error interrupt status 0x%x\n",
+ dev->name, status);
if (status & Y2_IS_PAR_RD1) {
- printk(KERN_ERR PFX "%s: ram data read parity error\n",
- dev->name);
+ if (net_ratelimit())
+ printk(KERN_ERR PFX "%s: ram data read parity error\n",
+ dev->name);
/* Clear IRQ */
sky2_write16(hw, RAM_BUFFER(port, B3_RI_CTRL), RI_CLR_RD_PERR);
}
if (status & Y2_IS_PAR_WR1) {
- printk(KERN_ERR PFX "%s: ram data write parity error\n",
- dev->name);
+ if (net_ratelimit())
+ printk(KERN_ERR PFX "%s: ram data write parity error\n",
+ dev->name);
sky2_write16(hw, RAM_BUFFER(port, B3_RI_CTRL), RI_CLR_WR_PERR);
}
if (status & Y2_IS_PAR_MAC1) {
- printk(KERN_ERR PFX "%s: MAC parity error\n", dev->name);
+ if (net_ratelimit())
+ printk(KERN_ERR PFX "%s: MAC parity error\n", dev->name);
sky2_write8(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_CLI_TX_PE);
}
if (status & Y2_IS_PAR_RX1) {
- printk(KERN_ERR PFX "%s: RX parity error\n", dev->name);
+ if (net_ratelimit())
+ printk(KERN_ERR PFX "%s: RX parity error\n", dev->name);
sky2_write32(hw, Q_ADDR(rxqaddr[port], Q_CSR), BMU_CLR_IRQ_PAR);
}
if (status & Y2_IS_TCP_TXA1) {
- printk(KERN_ERR PFX "%s: TCP segmentation error\n", dev->name);
+ if (net_ratelimit())
+ printk(KERN_ERR PFX "%s: TCP segmentation error\n",
+ dev->name);
sky2_write32(hw, Q_ADDR(txqaddr[port], Q_CSR), BMU_CLR_IRQ_TCP);
}
}
u16 pci_err;
pci_read_config_word(hw->pdev, PCI_STATUS, &pci_err);
- printk(KERN_ERR PFX "%s: pci hw error (0x%x)\n",
- pci_name(hw->pdev), pci_err);
+ if (net_ratelimit())
+ printk(KERN_ERR PFX "%s: pci hw error (0x%x)\n",
+ pci_name(hw->pdev), pci_err);
sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON);
pci_write_config_word(hw->pdev, PCI_STATUS,
pci_read_config_dword(hw->pdev, PEX_UNC_ERR_STAT, &pex_err);
- printk(KERN_ERR PFX "%s: pci express error (0x%x)\n",
- pci_name(hw->pdev), pex_err);
+ if (net_ratelimit())
+ printk(KERN_ERR PFX "%s: pci express error (0x%x)\n",
+ pci_name(hw->pdev), pex_err);
/* clear the interrupt */
sky2_write32(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON);
return 0;
}
-static inline u32 sky2_supported_modes(const struct sky2_hw *hw)
+static u32 sky2_supported_modes(const struct sky2_hw *hw)
{
u32 modes;
if (hw->copper) {
return dev;
}
-static inline void sky2_show_addr(struct net_device *dev)
+static void __devinit sky2_show_addr(struct net_device *dev)
{
const struct sky2_port *sky2 = netdev_priv(dev);
goto err_out_free_regions;
}
- if (sizeof(dma_addr_t) > sizeof(u32)) {
- err = pci_set_dma_mask(pdev, DMA_64BIT_MASK);
- if (!err)
- using_dac = 1;
- }
+ if (sizeof(dma_addr_t) > sizeof(u32) &&
+ !(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK))) {
+ using_dac = 1;
+ err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK);
+ if (err < 0) {
+ printk(KERN_ERR PFX "%s unable to obtain 64 bit DMA "
+ "for consistent allocations\n", pci_name(pdev));
+ goto err_out_free_regions;
+ }
- if (!using_dac) {
+ } else {
err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
if (err) {
printk(KERN_ERR PFX "%s no usable DMA configuration\n",
goto err_out_free_regions;
}
}
+
#ifdef __BIG_ENDIAN
/* byte swap descriptors in hardware */
{
#endif
err = -ENOMEM;
- hw = kmalloc(sizeof(*hw), GFP_KERNEL);
+ hw = kzalloc(sizeof(*hw), GFP_KERNEL);
if (!hw) {
printk(KERN_ERR PFX "%s: cannot allocate hardware struct\n",
pci_name(pdev));
goto err_out_free_regions;
}
- memset(hw, 0, sizeof(*hw));
hw->pdev = pdev;
hw->regs = ioremap_nocache(pci_resource_start(pdev, 0), 0x4000);
*/
#include <linux/config.h>
-
#include <linux/compiler.h>
#include <linux/crc32.h>
#include <linux/delay.h>
#include <linux/ethtool.h>
#include <linux/firmware.h>
#include <linux/if_vlan.h>
+#include <linux/in.h>
#include <linux/init.h>
#include <linux/ioport.h>
#include <linux/ip.h>
#include <linux/slab.h>
#include <linux/tcp.h>
#include <linux/types.h>
+#include <linux/vmalloc.h>
#include <linux/wait.h>
#include <linux/workqueue.h>
#include <asm/bitops.h>
writel(value, card->regs + reg);
}
-/**
- * spider_net_write_reg_sync - writes to an SMMIO register of a card
- * @card: device structure
- * @reg: register to write to
- * @value: value to write into the specified SMMIO register
- *
- * Unlike spider_net_write_reg, this will also make sure the
- * data arrives on the card by reading the reg again.
- */
-static void
-spider_net_write_reg_sync(struct spider_net_card *card, u32 reg, u32 value)
-{
- value = cpu_to_le32(value);
- writel(value, card->regs + reg);
- (void)readl(card->regs + reg);
-}
-
-/**
- * spider_net_rx_irq_off - switch off rx irq on this spider card
- * @card: device structure
- *
- * switches off rx irq by masking them out in the GHIINTnMSK register
- */
-static void
-spider_net_rx_irq_off(struct spider_net_card *card)
-{
- u32 regvalue;
- unsigned long flags;
-
- spin_lock_irqsave(&card->intmask_lock, flags);
- regvalue = spider_net_read_reg(card, SPIDER_NET_GHIINT0MSK);
- regvalue &= ~SPIDER_NET_RXINT;
- spider_net_write_reg_sync(card, SPIDER_NET_GHIINT0MSK, regvalue);
- spin_unlock_irqrestore(&card->intmask_lock, flags);
-}
-
/** spider_net_write_phy - write to phy register
* @netdev: adapter to be written to
* @mii_id: id of MII
}
/**
- * spider_net_rx_irq_on - switch on rx irq on this spider card
- * @card: device structure
- *
- * switches on rx irq by enabling them in the GHIINTnMSK register
- */
-static void
-spider_net_rx_irq_on(struct spider_net_card *card)
-{
- u32 regvalue;
- unsigned long flags;
-
- spin_lock_irqsave(&card->intmask_lock, flags);
- regvalue = spider_net_read_reg(card, SPIDER_NET_GHIINT0MSK);
- regvalue |= SPIDER_NET_RXINT;
- spider_net_write_reg_sync(card, SPIDER_NET_GHIINT0MSK, regvalue);
- spin_unlock_irqrestore(&card->intmask_lock, flags);
-}
-
-/**
- * spider_net_tx_irq_off - switch off tx irq on this spider card
+ * spider_net_rx_irq_off - switch off rx irq on this spider card
* @card: device structure
*
- * switches off tx irq by masking them out in the GHIINTnMSK register
+ * switches off rx irq by masking them out in the GHIINTnMSK register
*/
static void
-spider_net_tx_irq_off(struct spider_net_card *card)
+spider_net_rx_irq_off(struct spider_net_card *card)
{
u32 regvalue;
- unsigned long flags;
- spin_lock_irqsave(&card->intmask_lock, flags);
- regvalue = spider_net_read_reg(card, SPIDER_NET_GHIINT0MSK);
- regvalue &= ~SPIDER_NET_TXINT;
- spider_net_write_reg_sync(card, SPIDER_NET_GHIINT0MSK, regvalue);
- spin_unlock_irqrestore(&card->intmask_lock, flags);
+ regvalue = SPIDER_NET_INT0_MASK_VALUE & (~SPIDER_NET_RXINT);
+ spider_net_write_reg(card, SPIDER_NET_GHIINT0MSK, regvalue);
}
/**
- * spider_net_tx_irq_on - switch on tx irq on this spider card
+ * spider_net_rx_irq_on - switch on rx irq on this spider card
* @card: device structure
*
- * switches on tx irq by enabling them in the GHIINTnMSK register
+ * switches on rx irq by enabling them in the GHIINTnMSK register
*/
static void
-spider_net_tx_irq_on(struct spider_net_card *card)
+spider_net_rx_irq_on(struct spider_net_card *card)
{
u32 regvalue;
- unsigned long flags;
- spin_lock_irqsave(&card->intmask_lock, flags);
- regvalue = spider_net_read_reg(card, SPIDER_NET_GHIINT0MSK);
- regvalue |= SPIDER_NET_TXINT;
- spider_net_write_reg_sync(card, SPIDER_NET_GHIINT0MSK, regvalue);
- spin_unlock_irqrestore(&card->intmask_lock, flags);
+ regvalue = SPIDER_NET_INT0_MASK_VALUE | SPIDER_NET_RXINT;
+ spider_net_write_reg(card, SPIDER_NET_GHIINT0MSK, regvalue);
}
/**
spider_net_get_descr_status(struct spider_net_descr *descr)
{
u32 cmd_status;
- rmb();
+
cmd_status = descr->dmac_cmd_status;
- rmb();
cmd_status >>= SPIDER_NET_DESCR_IND_PROC_SHIFT;
/* no need to mask out any bits, as cmd_status is 32 bits wide only
* (and unsigned) */
{
u32 cmd_status;
/* read the status */
- mb();
cmd_status = descr->dmac_cmd_status;
/* clean the upper 4 bits */
cmd_status &= SPIDER_NET_DESCR_IND_PROC_MASKO;
cmd_status |= ((u32)status)<<SPIDER_NET_DESCR_IND_PROC_SHIFT;
/* and write it back */
descr->dmac_cmd_status = cmd_status;
- wmb();
}
/**
{
int i;
struct spider_net_descr *descr;
+ dma_addr_t buf;
- spin_lock_init(&card->chain_lock);
+ atomic_set(&card->rx_chain_refill,0);
descr = start_descr;
memset(descr, 0, sizeof(*descr) * no);
for (i=0; i<no; i++, descr++) {
spider_net_set_descr_status(descr, SPIDER_NET_DESCR_NOT_IN_USE);
- descr->bus_addr =
- pci_map_single(card->pdev, descr,
- SPIDER_NET_DESCR_SIZE,
- PCI_DMA_BIDIRECTIONAL);
+ buf = pci_map_single(card->pdev, descr,
+ SPIDER_NET_DESCR_SIZE,
+ PCI_DMA_BIDIRECTIONAL);
- if (descr->bus_addr == DMA_ERROR_CODE)
+ if (buf == DMA_ERROR_CODE)
goto iommu_error;
+ descr->bus_addr = buf;
descr->next = descr + 1;
descr->prev = descr - 1;
for (i=0; i < no; i++, descr++)
if (descr->bus_addr)
pci_unmap_single(card->pdev, descr->bus_addr,
- SPIDER_NET_DESCR_SIZE, PCI_DMA_BIDIRECTIONAL);
+ SPIDER_NET_DESCR_SIZE,
+ PCI_DMA_BIDIRECTIONAL);
return -ENOMEM;
}
if (descr->skb) {
dev_kfree_skb(descr->skb);
pci_unmap_single(card->pdev, descr->buf_addr,
- SPIDER_NET_MAX_MTU,
+ SPIDER_NET_MAX_FRAME,
PCI_DMA_BIDIRECTIONAL);
}
descr = descr->next;
spider_net_prepare_rx_descr(struct spider_net_card *card,
struct spider_net_descr *descr)
{
+ dma_addr_t buf;
int error = 0;
int offset;
int bufsize;
/* we need to round up the buffer size to a multiple of 128 */
- bufsize = (SPIDER_NET_MAX_MTU + SPIDER_NET_RXBUF_ALIGN - 1) &
+ bufsize = (SPIDER_NET_MAX_FRAME + SPIDER_NET_RXBUF_ALIGN - 1) &
(~(SPIDER_NET_RXBUF_ALIGN - 1));
/* and we need to have it 128 byte aligned, therefore we allocate a
/* allocate an skb */
descr->skb = dev_alloc_skb(bufsize + SPIDER_NET_RXBUF_ALIGN - 1);
if (!descr->skb) {
- if (net_ratelimit())
- if (netif_msg_rx_err(card))
- pr_err("Not enough memory to allocate "
- "rx buffer\n");
+ if (netif_msg_rx_err(card) && net_ratelimit())
+ pr_err("Not enough memory to allocate rx buffer\n");
return -ENOMEM;
}
descr->buf_size = bufsize;
if (offset)
skb_reserve(descr->skb, SPIDER_NET_RXBUF_ALIGN - offset);
/* io-mmu-map the skb */
- descr->buf_addr = pci_map_single(card->pdev, descr->skb->data,
- SPIDER_NET_MAX_MTU,
- PCI_DMA_BIDIRECTIONAL);
- if (descr->buf_addr == DMA_ERROR_CODE) {
+ buf = pci_map_single(card->pdev, descr->skb->data,
+ SPIDER_NET_MAX_FRAME, PCI_DMA_BIDIRECTIONAL);
+ descr->buf_addr = buf;
+ if (buf == DMA_ERROR_CODE) {
dev_kfree_skb_any(descr->skb);
- if (netif_msg_rx_err(card))
+ if (netif_msg_rx_err(card) && net_ratelimit())
pr_err("Could not iommu-map rx buffer\n");
spider_net_set_descr_status(descr, SPIDER_NET_DESCR_NOT_IN_USE);
} else {
}
/**
- * spider_net_enable_rxctails - sets RX dmac chain tail addresses
+ * spider_net_enable_rxchtails - sets RX dmac chain tail addresses
* @card: card structure
*
- * spider_net_enable_rxctails sets the RX DMAC chain tail adresses in the
+ * spider_net_enable_rxchtails sets the RX DMAC chain tail adresses in the
* chip by writing to the appropriate register. DMA is enabled in
* spider_net_enable_rxdmac.
*/
static void
spider_net_enable_rxdmac(struct spider_net_card *card)
{
+ wmb();
spider_net_write_reg(card, SPIDER_NET_GDADMACCNTR,
SPIDER_NET_DMA_RX_VALUE);
}
* spider_net_refill_rx_chain - refills descriptors/skbs in the rx chains
* @card: card structure
*
- * refills descriptors in all chains (last used chain first): allocates skbs
- * and iommu-maps them.
+ * refills descriptors in the rx chain: allocates skbs and iommu-maps them.
*/
static void
spider_net_refill_rx_chain(struct spider_net_card *card)
{
struct spider_net_descr_chain *chain;
- int count = 0;
- unsigned long flags;
chain = &card->rx_chain;
- spin_lock_irqsave(&card->chain_lock, flags);
- while (spider_net_get_descr_status(chain->head) ==
- SPIDER_NET_DESCR_NOT_IN_USE) {
- if (spider_net_prepare_rx_descr(card, chain->head))
- break;
- count++;
- chain->head = chain->head->next;
- }
- spin_unlock_irqrestore(&card->chain_lock, flags);
+ /* one context doing the refill (and a second context seeing that
+ * and omitting it) is ok. If called by NAPI, we'll be called again
+ * as spider_net_decode_one_descr is called several times. If some
+ * interrupt calls us, the NAPI is about to clean up anyway. */
+ if (atomic_inc_return(&card->rx_chain_refill) == 1)
+ while (spider_net_get_descr_status(chain->head) ==
+ SPIDER_NET_DESCR_NOT_IN_USE) {
+ if (spider_net_prepare_rx_descr(card, chain->head))
+ break;
+ chain->head = chain->head->next;
+ }
- /* could be optimized, only do that, if we know the DMA processing
- * has terminated */
- if (count)
- spider_net_enable_rxdmac(card);
+ atomic_dec(&card->rx_chain_refill);
}
/**
/* this will allocate the rest of the rx buffers; if not, it's
* business as usual later on */
spider_net_refill_rx_chain(card);
+ spider_net_enable_rxdmac(card);
return 0;
error:
* @card: adapter structure
* @brutal: if set, don't care about whether descriptor seems to be in use
*
- * releases the tx descriptors that spider has finished with (if non-brutal)
- * or simply release tx descriptors (if brutal)
+ * returns 0 if the tx ring is empty, otherwise 1.
+ *
+ * spider_net_release_tx_chain releases the tx descriptors that spider has
+ * finished with (if non-brutal) or simply release tx descriptors (if brutal).
+ * If some other context is calling this function, we return 1 so that we're
+ * scheduled again (if we were scheduled) and will not loose initiative.
*/
-static void
+static int
spider_net_release_tx_chain(struct spider_net_card *card, int brutal)
{
struct spider_net_descr_chain *tx_chain = &card->tx_chain;
enum spider_net_descr_status status;
- spider_net_tx_irq_off(card);
+ if (atomic_inc_return(&card->tx_chain_release) != 1) {
+ atomic_dec(&card->tx_chain_release);
+ return 1;
+ }
- /* no lock for chain needed, if this is only executed once at a time */
-again:
for (;;) {
status = spider_net_get_descr_status(tx_chain->tail);
switch (status) {
case SPIDER_NET_DESCR_CARDOWNED:
- if (!brutal) goto out;
+ if (!brutal)
+ goto out;
/* fallthrough, if we release the descriptors
* brutally (then we don't care about
* SPIDER_NET_DESCR_CARDOWNED) */
tx_chain->tail = tx_chain->tail->next;
}
out:
+ atomic_dec(&card->tx_chain_release);
+
netif_wake_queue(card->netdev);
- if (!brutal) {
- /* switch on tx irqs (while we are still in the interrupt
- * handler, so we don't get an interrupt), check again
- * for done descriptors. This results in fewer interrupts */
- spider_net_tx_irq_on(card);
- status = spider_net_get_descr_status(tx_chain->tail);
- switch (status) {
- case SPIDER_NET_DESCR_RESPONSE_ERROR:
- case SPIDER_NET_DESCR_PROTECTION_ERROR:
- case SPIDER_NET_DESCR_FORCE_END:
- case SPIDER_NET_DESCR_COMPLETE:
- goto again;
- default:
- break;
- }
- }
+ if (status == SPIDER_NET_DESCR_CARDOWNED)
+ return 1;
+ return 0;
+}
+/**
+ * spider_net_cleanup_tx_ring - cleans up the TX ring
+ * @card: card structure
+ *
+ * spider_net_cleanup_tx_ring is called by the tx_timer (as we don't use
+ * interrupts to cleanup our TX ring) and returns sent packets to the stack
+ * by freeing them
+ */
+static void
+spider_net_cleanup_tx_ring(struct spider_net_card *card)
+{
+ if ( (spider_net_release_tx_chain(card, 0)) &&
+ (card->netdev->flags & IFF_UP) ) {
+ mod_timer(&card->tx_timer, jiffies + SPIDER_NET_TX_TIMER);
+ }
}
/**
static u8
spider_net_get_multicast_hash(struct net_device *netdev, __u8 *addr)
{
- /* FIXME: an addr of 01:00:5e:00:00:01 must result in 0xa9,
- * ff:ff:ff:ff:ff:ff must result in 0xfd */
u32 crc;
u8 hash;
+ char addr_for_crc[ETH_ALEN] = { 0, };
+ int i, bit;
- crc = crc32_be(~0, addr, netdev->addr_len);
+ for (i = 0; i < ETH_ALEN * 8; i++) {
+ bit = (addr[i / 8] >> (i % 8)) & 1;
+ addr_for_crc[ETH_ALEN - 1 - i / 8] += bit << (7 - (i % 8));
+ }
+
+ crc = crc32_be(~0, addr_for_crc, netdev->addr_len);
hash = (crc >> 27);
hash <<= 3;
hash |= crc & 7;
+ hash &= 0xff;
return hash;
}
{
struct spider_net_card *card = netdev_priv(netdev);
+ tasklet_kill(&card->rxram_full_tl);
netif_poll_disable(netdev);
netif_carrier_off(netdev);
netif_stop_queue(netdev);
+ del_timer_sync(&card->tx_timer);
/* disable/mask all interrupts */
spider_net_write_reg(card, SPIDER_NET_GHIINT0MSK, 0);
* @skb: packet to consider
*
* fills out the command and status field of the descriptor structure,
- * depending on hardware checksum settings. This function assumes a wmb()
- * has executed before.
+ * depending on hardware checksum settings.
*/
static void
spider_net_set_txdescr_cmdstat(struct spider_net_descr *descr,
struct sk_buff *skb)
{
+ /* make sure the other fields in the descriptor are written */
+ wmb();
+
if (skb->ip_summed != CHECKSUM_HW) {
descr->dmac_cmd_status = SPIDER_NET_DMAC_CMDSTAT_NOCS;
return;
/* is packet ip?
* if yes: tcp? udp? */
if (skb->protocol == htons(ETH_P_IP)) {
- if (skb->nh.iph->protocol == IPPROTO_TCP) {
+ if (skb->nh.iph->protocol == IPPROTO_TCP)
descr->dmac_cmd_status = SPIDER_NET_DMAC_CMDSTAT_TCPCS;
- } else if (skb->nh.iph->protocol == IPPROTO_UDP) {
+ else if (skb->nh.iph->protocol == IPPROTO_UDP)
descr->dmac_cmd_status = SPIDER_NET_DMAC_CMDSTAT_UDPCS;
- } else { /* the stack should checksum non-tcp and non-udp
- packets on his own: NETIF_F_IP_CSUM */
+ else /* the stack should checksum non-tcp and non-udp
+ packets on his own: NETIF_F_IP_CSUM */
descr->dmac_cmd_status = SPIDER_NET_DMAC_CMDSTAT_NOCS;
- }
}
}
struct spider_net_descr *descr,
struct sk_buff *skb)
{
- descr->buf_addr = pci_map_single(card->pdev, skb->data,
- skb->len, PCI_DMA_BIDIRECTIONAL);
- if (descr->buf_addr == DMA_ERROR_CODE) {
- if (netif_msg_tx_err(card))
+ dma_addr_t buf;
+
+ buf = pci_map_single(card->pdev, skb->data,
+ skb->len, PCI_DMA_BIDIRECTIONAL);
+ if (buf == DMA_ERROR_CODE) {
+ if (netif_msg_tx_err(card) && net_ratelimit())
pr_err("could not iommu-map packet (%p, %i). "
"Dropping packet\n", skb->data, skb->len);
return -ENOMEM;
}
+ descr->buf_addr = buf;
descr->buf_size = skb->len;
descr->skb = skb;
descr->data_status = 0;
- /* make sure the above values are in memory before we change the
- * status */
- wmb();
-
spider_net_set_txdescr_cmdstat(descr,skb);
return 0;
struct spider_net_descr *descr;
int result;
- descr = spider_net_get_next_tx_descr(card);
+ spider_net_release_tx_chain(card, 0);
- if (!descr) {
- netif_stop_queue(netdev);
+ descr = spider_net_get_next_tx_descr(card);
- descr = spider_net_get_next_tx_descr(card);
- if (!descr)
- goto error;
- else
- netif_start_queue(netdev);
- }
+ if (!descr)
+ goto error;
result = spider_net_prepare_tx_descr(card, descr, skb);
if (result)
card->tx_chain.head = card->tx_chain.head->next;
- /* make sure the status from spider_net_prepare_tx_descr is in
- * memory before we check out the previous descriptor */
- wmb();
-
if (spider_net_get_descr_status(descr->prev) !=
- SPIDER_NET_DESCR_CARDOWNED)
- spider_net_kick_tx_dma(card, descr);
+ SPIDER_NET_DESCR_CARDOWNED) {
+ /* make sure the current descriptor is in memory. Then
+ * kicking it on again makes sense, if the previous is not
+ * card-owned anymore. Check the previous descriptor twice
+ * to omit an mb() in heavy traffic cases */
+ mb();
+ if (spider_net_get_descr_status(descr->prev) !=
+ SPIDER_NET_DESCR_CARDOWNED)
+ spider_net_kick_tx_dma(card, descr);
+ }
+
+ mod_timer(&card->tx_timer, jiffies + SPIDER_NET_TX_TIMER);
return NETDEV_TX_OK;
error:
card->netdev_stats.tx_dropped++;
- return NETDEV_TX_LOCKED;
+ return NETDEV_TX_BUSY;
}
/**
* spider_net_pass_skb_up - takes an skb from a descriptor and passes it on
* @descr: descriptor to process
* @card: card structure
+ * @napi: whether caller is in NAPI context
*
* returns 1 on success, 0 if no packet was passed to the stack
*
*/
static int
spider_net_pass_skb_up(struct spider_net_descr *descr,
- struct spider_net_card *card)
+ struct spider_net_card *card, int napi)
{
struct sk_buff *skb;
struct net_device *netdev;
netdev = card->netdev;
- /* check for errors in the data_error flag */
- if ((data_error & SPIDER_NET_DATA_ERROR_MASK) &&
- netif_msg_rx_err(card))
- pr_err("error in received descriptor found, "
- "data_status=x%08x, data_error=x%08x\n",
- data_status, data_error);
-
- /* prepare skb, unmap descriptor */
- skb = descr->skb;
- pci_unmap_single(card->pdev, descr->buf_addr, SPIDER_NET_MAX_MTU,
+ /* unmap descriptor */
+ pci_unmap_single(card->pdev, descr->buf_addr, SPIDER_NET_MAX_FRAME,
PCI_DMA_BIDIRECTIONAL);
/* the cases we'll throw away the packet immediately */
- if (data_error & SPIDER_NET_DESTROY_RX_FLAGS)
+ if (data_error & SPIDER_NET_DESTROY_RX_FLAGS) {
+ if (netif_msg_rx_err(card))
+ pr_err("error in received descriptor found, "
+ "data_status=x%08x, data_error=x%08x\n",
+ data_status, data_error);
return 0;
+ }
+ skb = descr->skb;
skb->dev = netdev;
skb_put(skb, descr->valid_size);
/* checksum offload */
if (card->options.rx_csum) {
- if ( (data_status & SPIDER_NET_DATA_STATUS_CHK_MASK) &&
- (!(data_error & SPIDER_NET_DATA_ERROR_CHK_MASK)) )
+ if ( ( (data_status & SPIDER_NET_DATA_STATUS_CKSUM_MASK) ==
+ SPIDER_NET_DATA_STATUS_CKSUM_MASK) &&
+ !(data_error & SPIDER_NET_DATA_ERR_CKSUM_MASK))
skb->ip_summed = CHECKSUM_UNNECESSARY;
else
skb->ip_summed = CHECKSUM_NONE;
- } else {
+ } else
skb->ip_summed = CHECKSUM_NONE;
- }
if (data_status & SPIDER_NET_VLAN_PACKET) {
/* further enhancements: HW-accel VLAN
}
/* pass skb up to stack */
- netif_receive_skb(skb);
+ if (napi)
+ netif_receive_skb(skb);
+ else
+ netif_rx_ni(skb);
/* update netdevice statistics */
card->netdev_stats.rx_packets++;
}
/**
- * spider_net_decode_descr - processes an rx descriptor
+ * spider_net_decode_one_descr - processes an rx descriptor
* @card: card structure
+ * @napi: whether caller is in NAPI context
*
* returns 1 if a packet has been sent to the stack, otherwise 0
*
* processes an rx descriptor by iommu-unmapping the data buffer and passing
- * the packet up to the stack
+ * the packet up to the stack. This function is called in softirq
+ * context, e.g. either bottom half from interrupt or NAPI polling context
*/
static int
-spider_net_decode_one_descr(struct spider_net_card *card)
+spider_net_decode_one_descr(struct spider_net_card *card, int napi)
{
enum spider_net_descr_status status;
struct spider_net_descr *descr;
if (status == SPIDER_NET_DESCR_CARDOWNED) {
/* nothing in the descriptor yet */
- return 0;
+ result=0;
+ goto out;
}
if (status == SPIDER_NET_DESCR_NOT_IN_USE) {
- /* not initialized yet, I bet chain->tail == chain->head
- * and the ring is empty */
+ /* not initialized yet, the ring must be empty */
spider_net_refill_rx_chain(card);
- return 0;
+ spider_net_enable_rxdmac(card);
+ result=0;
+ goto out;
}
- /* descriptor definitively used -- move on head */
+ /* descriptor definitively used -- move on tail */
chain->tail = descr->next;
result = 0;
pr_err("%s: dropping RX descriptor with state %d\n",
card->netdev->name, status);
card->netdev_stats.rx_dropped++;
+ pci_unmap_single(card->pdev, descr->buf_addr,
+ SPIDER_NET_MAX_FRAME, PCI_DMA_BIDIRECTIONAL);
+ dev_kfree_skb_irq(descr->skb);
goto refill;
}
}
/* ok, we've got a packet in descr */
- result = spider_net_pass_skb_up(descr, card);
+ result = spider_net_pass_skb_up(descr, card, napi);
refill:
spider_net_set_descr_status(descr, SPIDER_NET_DESCR_NOT_IN_USE);
/* change the descriptor state: */
- spider_net_refill_rx_chain(card);
-
+ if (!napi)
+ spider_net_refill_rx_chain(card);
+out:
return result;
}
packets_to_do = min(*budget, netdev->quota);
while (packets_to_do) {
- if (spider_net_decode_one_descr(card)) {
+ if (spider_net_decode_one_descr(card, 1)) {
packets_done++;
packets_to_do--;
} else {
netdev->quota -= packets_done;
*budget -= packets_done;
+ spider_net_refill_rx_chain(card);
/* if all packets are in the stack, enable interrupts and return 0 */
/* if not, return 1 */
card->tx_chain.tail->bus_addr);
}
+/**
+ * spider_net_handle_rxram_full - cleans up RX ring upon RX RAM full interrupt
+ * @card: card structure
+ *
+ * spider_net_handle_rxram_full empties the RX ring so that spider can put
+ * more packets in it and empty its RX RAM. This is called in bottom half
+ * context
+ */
+static void
+spider_net_handle_rxram_full(struct spider_net_card *card)
+{
+ while (spider_net_decode_one_descr(card, 0))
+ ;
+ spider_net_enable_rxchtails(card);
+ spider_net_enable_rxdmac(card);
+ netif_rx_schedule(card->netdev);
+}
+
/**
* spider_net_handle_error_irq - handles errors raised by an interrupt
* @card: card structure
switch (i)
{
case SPIDER_NET_GTMFLLINT:
- if (netif_msg_intr(card))
+ if (netif_msg_intr(card) && net_ratelimit())
pr_err("Spider TX RAM full\n");
show_error = 0;
break;
+ case SPIDER_NET_GRFDFLLINT: /* fallthrough */
+ case SPIDER_NET_GRFCFLLINT: /* fallthrough */
+ case SPIDER_NET_GRFBFLLINT: /* fallthrough */
+ case SPIDER_NET_GRFAFLLINT: /* fallthrough */
case SPIDER_NET_GRMFLLINT:
- if (netif_msg_intr(card))
+ if (netif_msg_intr(card) && net_ratelimit())
pr_err("Spider RX RAM full, incoming packets "
- "might be discarded !\n");
- netif_rx_schedule(card->netdev);
- spider_net_enable_rxchtails(card);
- spider_net_enable_rxdmac(card);
+ "might be discarded!\n");
+ spider_net_rx_irq_off(card);
+ tasklet_schedule(&card->rxram_full_tl);
+ show_error = 0;
break;
/* case SPIDER_NET_GTMSHTINT: problem, print a message */
/* allrighty. tx from previous descr ok */
show_error = 0;
break;
- /* case SPIDER_NET_GRFDFLLINT: print a message down there */
- /* case SPIDER_NET_GRFCFLLINT: print a message down there */
- /* case SPIDER_NET_GRFBFLLINT: print a message down there */
- /* case SPIDER_NET_GRFAFLLINT: print a message down there */
/* chain end */
case SPIDER_NET_GDDDCEINT: /* fallthrough */
"restarting DMAC %c.\n",
'D'+i-SPIDER_NET_GDDDCEINT);
spider_net_refill_rx_chain(card);
+ spider_net_enable_rxdmac(card);
show_error = 0;
break;
case SPIDER_NET_GDAINVDINT:
/* could happen when rx chain is full */
spider_net_refill_rx_chain(card);
+ spider_net_enable_rxdmac(card);
show_error = 0;
break;
if (!status_reg)
return IRQ_NONE;
- if (status_reg & SPIDER_NET_TXINT)
- spider_net_release_tx_chain(card, 0);
-
if (status_reg & SPIDER_NET_RXINT ) {
spider_net_rx_irq_off(card);
netif_rx_schedule(netdev);
}
- /* we do this after rx and tx processing, as we want the tx chain
- * processed to see, whether we should restart tx dma processing */
- spider_net_handle_error_irq(card, status_reg);
+ if (status_reg & SPIDER_NET_ERRINT )
+ spider_net_handle_error_irq(card, status_reg);
/* clear interrupt sources */
spider_net_write_reg(card, SPIDER_NET_GHIINT0STS, status_reg);
/**
* spider_net_download_firmware - loads firmware into the adapter
* @card: card structure
- * @firmware: firmware pointer
+ * @firmware_ptr: pointer to firmware data
*
- * spider_net_download_firmware loads the firmware opened by
- * spider_net_init_firmware into the adapter.
+ * spider_net_download_firmware loads the firmware data into the
+ * adapter. It assumes the length etc. to be allright.
*/
-static void
+static int
spider_net_download_firmware(struct spider_net_card *card,
- const struct firmware *firmware)
+ u8 *firmware_ptr)
{
int sequencer, i;
- u32 *fw_ptr = (u32 *)firmware->data;
+ u32 *fw_ptr = (u32 *)firmware_ptr;
/* stop sequencers */
spider_net_write_reg(card, SPIDER_NET_GSINIT,
SPIDER_NET_STOP_SEQ_VALUE);
- for (sequencer = 0; sequencer < 6; sequencer++) {
+ for (sequencer = 0; sequencer < SPIDER_NET_FIRMWARE_SEQS;
+ sequencer++) {
spider_net_write_reg(card,
SPIDER_NET_GSnPRGADR + sequencer * 8, 0);
- for (i = 0; i < SPIDER_NET_FIRMWARE_LEN; i++) {
+ for (i = 0; i < SPIDER_NET_FIRMWARE_SEQWORDS; i++) {
spider_net_write_reg(card, SPIDER_NET_GSnPRGDAT +
sequencer * 8, *fw_ptr);
fw_ptr++;
}
}
+ if (spider_net_read_reg(card, SPIDER_NET_GSINIT))
+ return -EIO;
+
spider_net_write_reg(card, SPIDER_NET_GSINIT,
SPIDER_NET_RUN_SEQ_VALUE);
+
+ return 0;
}
/**
static int
spider_net_init_firmware(struct spider_net_card *card)
{
- const struct firmware *firmware;
- int err = -EIO;
+ struct firmware *firmware = NULL;
+ struct device_node *dn;
+ u8 *fw_prop = NULL;
+ int err = -ENOENT;
+ int fw_size;
+
+ if (request_firmware((const struct firmware **)&firmware,
+ SPIDER_NET_FIRMWARE_NAME, &card->pdev->dev) == 0) {
+ if ( (firmware->size != SPIDER_NET_FIRMWARE_LEN) &&
+ netif_msg_probe(card) ) {
+ pr_err("Incorrect size of spidernet firmware in " \
+ "filesystem. Looking in host firmware...\n");
+ goto try_host_fw;
+ }
+ err = spider_net_download_firmware(card, firmware->data);
- if (request_firmware(&firmware,
- SPIDER_NET_FIRMWARE_NAME, &card->pdev->dev) < 0) {
- if (netif_msg_probe(card))
- pr_err("Couldn't read in sequencer data file %s.\n",
- SPIDER_NET_FIRMWARE_NAME);
- firmware = NULL;
- goto out;
- }
+ release_firmware(firmware);
+ if (err)
+ goto try_host_fw;
- if (firmware->size != 6 * SPIDER_NET_FIRMWARE_LEN * sizeof(u32)) {
- if (netif_msg_probe(card))
- pr_err("Invalid size of sequencer data file %s.\n",
- SPIDER_NET_FIRMWARE_NAME);
- goto out;
+ goto done;
}
- spider_net_download_firmware(card, firmware);
+try_host_fw:
+ dn = pci_device_to_OF_node(card->pdev);
+ if (!dn)
+ goto out_err;
- err = 0;
-out:
- release_firmware(firmware);
+ fw_prop = (u8 *)get_property(dn, "firmware", &fw_size);
+ if (!fw_prop)
+ goto out_err;
+
+ if ( (fw_size != SPIDER_NET_FIRMWARE_LEN) &&
+ netif_msg_probe(card) ) {
+ pr_err("Incorrect size of spidernet firmware in " \
+ "host firmware\n");
+ goto done;
+ }
+ err = spider_net_download_firmware(card, fw_prop);
+
+done:
+ return err;
+out_err:
+ if (netif_msg_probe(card))
+ pr_err("Couldn't find spidernet firmware in filesystem " \
+ "or host firmware\n");
return err;
}
SPIDER_NET_CKRCTRL_RUN_VALUE);
/* empty sequencer data */
- for (sequencer = 0; sequencer < 6; sequencer++) {
+ for (sequencer = 0; sequencer < SPIDER_NET_FIRMWARE_SEQS;
+ sequencer++) {
spider_net_write_reg(card, SPIDER_NET_GSnPRGDAT +
sequencer * 8, 0x0);
- for (i = 0; i < SPIDER_NET_FIRMWARE_LEN; i++) {
+ for (i = 0; i < SPIDER_NET_FIRMWARE_SEQWORDS; i++) {
spider_net_write_reg(card, SPIDER_NET_GSnPRGDAT +
sequencer * 8, 0x0);
}
SET_NETDEV_DEV(netdev, &card->pdev->dev);
pci_set_drvdata(card->pdev, netdev);
- spin_lock_init(&card->intmask_lock);
+
+ atomic_set(&card->tx_chain_release,0);
+ card->rxram_full_tl.data = (unsigned long) card;
+ card->rxram_full_tl.func =
+ (void (*)(unsigned long)) spider_net_handle_rxram_full;
+ init_timer(&card->tx_timer);
+ card->tx_timer.function =
+ (void (*)(unsigned long)) spider_net_cleanup_tx_ring;
+ card->tx_timer.data = (unsigned long) card;
netdev->irq = card->pdev->irq;
card->options.rx_csum = SPIDER_NET_RX_CSUM_DEFAULT;
extern char spider_net_driver_name[];
-#define SPIDER_NET_MAX_MTU 2308
+#define SPIDER_NET_MAX_FRAME 2312
+#define SPIDER_NET_MAX_MTU 2294
#define SPIDER_NET_MIN_MTU 64
#define SPIDER_NET_RXBUF_ALIGN 128
-#define SPIDER_NET_RX_DESCRIPTORS_DEFAULT 64
+#define SPIDER_NET_RX_DESCRIPTORS_DEFAULT 256
#define SPIDER_NET_RX_DESCRIPTORS_MIN 16
-#define SPIDER_NET_RX_DESCRIPTORS_MAX 256
+#define SPIDER_NET_RX_DESCRIPTORS_MAX 512
-#define SPIDER_NET_TX_DESCRIPTORS_DEFAULT 64
+#define SPIDER_NET_TX_DESCRIPTORS_DEFAULT 256
#define SPIDER_NET_TX_DESCRIPTORS_MIN 16
-#define SPIDER_NET_TX_DESCRIPTORS_MAX 256
+#define SPIDER_NET_TX_DESCRIPTORS_MAX 512
+
+#define SPIDER_NET_TX_TIMER 20
#define SPIDER_NET_RX_CSUM_DEFAULT 1
-#define SPIDER_NET_WATCHDOG_TIMEOUT 5*HZ
-#define SPIDER_NET_NAPI_WEIGHT 64
+#define SPIDER_NET_WATCHDOG_TIMEOUT 50*HZ
+#define SPIDER_NET_NAPI_WEIGHT 64
-#define SPIDER_NET_FIRMWARE_LEN 1024
+#define SPIDER_NET_FIRMWARE_SEQS 6
+#define SPIDER_NET_FIRMWARE_SEQWORDS 1024
+#define SPIDER_NET_FIRMWARE_LEN (SPIDER_NET_FIRMWARE_SEQS * \
+ SPIDER_NET_FIRMWARE_SEQWORDS * \
+ sizeof(u32))
#define SPIDER_NET_FIRMWARE_NAME "spider_fw.bin"
/** spider_net SMMIO registers */
/** SCONFIG registers */
#define SPIDER_NET_SCONFIG_IOACTE 0x00002810
-/** hardcoded register values */
-#define SPIDER_NET_INT0_MASK_VALUE 0x3f7fe3ff
-#define SPIDER_NET_INT1_MASK_VALUE 0xffffffff
+/** interrupt mask registers */
+#define SPIDER_NET_INT0_MASK_VALUE 0x3f7fe2c7
+#define SPIDER_NET_INT1_MASK_VALUE 0xffff7ff7
/* no MAC aborts -> auto retransmission */
-#define SPIDER_NET_INT2_MASK_VALUE 0xfffffff1
+#define SPIDER_NET_INT2_MASK_VALUE 0xffef7ff1
-/* clear counter when interrupt sources are cleared
-#define SPIDER_NET_FRAMENUM_VALUE 0x0001f001 */
/* we rely on flagged descriptor interrupts */
#define SPIDER_NET_FRAMENUM_VALUE 0x00000000
/* set this first, then the FRAMENUM_VALUE */
#if 0
#define SPIDER_NET_WOL_VALUE 0x00000000
#endif
-#define SPIDER_NET_IPSECINIT_VALUE 0x00f000f8
+#define SPIDER_NET_IPSECINIT_VALUE 0x6f716f71
/* pause frames: automatic, no upper retransmission count */
/* outside loopback mode: ETOMOD signal dont matter, not connected */
#define SPIDER_NET_RXINT ( (1 << SPIDER_NET_GDAFDCINT) | \
(1 << SPIDER_NET_GRMFLLINT) )
+#define SPIDER_NET_ERRINT ( 0xffffffff & \
+ (~SPIDER_NET_TXINT) & \
+ (~SPIDER_NET_RXINT) )
+
#define SPIDER_NET_GPREXEC 0x80000000
#define SPIDER_NET_GPRDAT_MASK 0x0000ffff
/* descr ready, descr is in middle of chain, get interrupt on completion */
#define SPIDER_NET_DMAC_RX_CARDOWNED 0xa0800000
-/* multicast is no problem */
-#define SPIDER_NET_DATA_ERROR_MASK 0xffffbfff
-
enum spider_net_descr_status {
SPIDER_NET_DESCR_COMPLETE = 0x00, /* used in rx and tx */
SPIDER_NET_DESCR_RESPONSE_ERROR = 0x01, /* used in rx and tx */
struct spider_net_descr {
/* as defined by the hardware */
- dma_addr_t buf_addr;
+ u32 buf_addr;
u32 buf_size;
- dma_addr_t next_descr_addr;
+ u32 next_descr_addr;
u32 dmac_cmd_status;
u32 result_size;
u32 valid_size; /* all zeroes for tx */
/* used in the driver */
struct sk_buff *skb;
- dma_addr_t bus_addr;
+ u32 bus_addr;
struct spider_net_descr *next;
struct spider_net_descr *prev;
} __attribute__((aligned(32)));
};
/* descriptor data_status bits */
-#define SPIDER_NET_RXIPCHK 29
-#define SPIDER_NET_TCPUDPIPCHK 28
-#define SPIDER_NET_DATA_STATUS_CHK_MASK (1 << SPIDER_NET_RXIPCHK | \
- 1 << SPIDER_NET_TCPUDPIPCHK)
-
+#define SPIDER_NET_RX_IPCHK 29
+#define SPIDER_NET_RX_TCPCHK 28
#define SPIDER_NET_VLAN_PACKET 21
+#define SPIDER_NET_DATA_STATUS_CKSUM_MASK ( (1 << SPIDER_NET_RX_IPCHK) | \
+ (1 << SPIDER_NET_RX_TCPCHK) )
/* descriptor data_error bits */
-#define SPIDER_NET_RXIPCHKERR 27
-#define SPIDER_NET_RXTCPCHKERR 26
-#define SPIDER_NET_DATA_ERROR_CHK_MASK (1 << SPIDER_NET_RXIPCHKERR | \
- 1 << SPIDER_NET_RXTCPCHKERR)
+#define SPIDER_NET_RX_IPCHKERR 27
+#define SPIDER_NET_RX_RXTCPCHKERR 28
+
+#define SPIDER_NET_DATA_ERR_CKSUM_MASK (1 << SPIDER_NET_RX_IPCHKERR)
-/* the cases we don't pass the packet to the stack */
-#define SPIDER_NET_DESTROY_RX_FLAGS 0x70138000
+/* the cases we don't pass the packet to the stack.
+ * 701b8000 would be correct, but every packets gets that flag */
+#define SPIDER_NET_DESTROY_RX_FLAGS 0x700b8000
#define SPIDER_NET_DESCR_SIZE 32
struct spider_net_descr_chain tx_chain;
struct spider_net_descr_chain rx_chain;
- spinlock_t chain_lock;
+ atomic_t rx_chain_refill;
+ atomic_t tx_chain_release;
struct net_device_stats netdev_stats;
struct spider_net_options options;
spinlock_t intmask_lock;
+ struct tasklet_struct rxram_full_tl;
+ struct timer_list tx_timer;
struct work_struct tx_timeout_task;
atomic_t tx_timeout_task_counter;
return 0;
}
+static uint32_t
+spider_net_ethtool_get_tx_csum(struct net_device *netdev)
+{
+ return (netdev->features & NETIF_F_HW_CSUM) != 0;
+}
+
+static int
+spider_net_ethtool_set_tx_csum(struct net_device *netdev, uint32_t data)
+{
+ if (data)
+ netdev->features |= NETIF_F_HW_CSUM;
+ else
+ netdev->features &= ~NETIF_F_HW_CSUM;
+
+ return 0;
+}
+
struct ethtool_ops spider_net_ethtool_ops = {
.get_settings = spider_net_ethtool_get_settings,
.get_drvinfo = spider_net_ethtool_get_drvinfo,
.nway_reset = spider_net_ethtool_nway_reset,
.get_rx_csum = spider_net_ethtool_get_rx_csum,
.set_rx_csum = spider_net_ethtool_set_rx_csum,
+ .get_tx_csum = spider_net_ethtool_get_tx_csum,
+ .set_tx_csum = spider_net_ethtool_set_tx_csum,
};
/* Init PHY interface and start link poll state machine */
static void gem_init_phy(struct gem *gp)
{
- u32 mifcfg;
+ u32 mif_cfg;
/* Revert MIF CFG setting done on stop_phy */
- mifcfg = readl(gp->regs + MIF_CFG);
- mifcfg &= ~MIF_CFG_BBMODE;
- writel(mifcfg, gp->regs + MIF_CFG);
+ mif_cfg = readl(gp->regs + MIF_CFG);
+ mif_cfg &= ~(MIF_CFG_PSELECT|MIF_CFG_POLL|MIF_CFG_BBMODE|MIF_CFG_MDI1);
+ mif_cfg |= MIF_CFG_MDI0;
+ writel(mif_cfg, gp->regs + MIF_CFG);
+ writel(PCS_DMODE_MGM, gp->regs + PCS_DMODE);
+ writel(MAC_XIFCFG_OE, gp->regs + MAC_XIFCFG);
if (gp->pdev->vendor == PCI_VENDOR_ID_APPLE) {
int i;
+ u16 ctrl;
- /* Those delay sucks, the HW seem to love them though, I'll
- * serisouly consider breaking some locks here to be able
- * to schedule instead
- */
- for (i = 0; i < 3; i++) {
#ifdef CONFIG_PPC_PMAC
- pmac_call_feature(PMAC_FTR_GMAC_PHY_RESET, gp->of_node, 0, 0);
- msleep(20);
+ pmac_call_feature(PMAC_FTR_GMAC_PHY_RESET, gp->of_node, 0, 0);
#endif
- /* Some PHYs used by apple have problem getting back to us,
- * we do an additional reset here
- */
- phy_write(gp, MII_BMCR, BMCR_RESET);
- msleep(20);
- if (phy_read(gp, MII_BMCR) != 0xffff)
+
+ /* Some PHYs used by apple have problem getting back
+ * to us, we do an additional reset here
+ */
+ phy_write(gp, MII_BMCR, BMCR_RESET);
+ for (i = 0; i < 50; i++) {
+ if ((phy_read(gp, MII_BMCR) & BMCR_RESET) == 0)
break;
- if (i == 2)
- printk(KERN_WARNING "%s: GMAC PHY not responding !\n",
- gp->dev->name);
+ msleep(10);
}
+ if (i == 50)
+ printk(KERN_WARNING "%s: GMAC PHY not responding !\n",
+ gp->dev->name);
+ /* Make sure isolate is off */
+ ctrl = phy_read(gp, MII_BMCR);
+ if (ctrl & BMCR_ISOLATE)
+ phy_write(gp, MII_BMCR, ctrl & ~BMCR_ISOLATE);
}
if (gp->pdev->vendor == PCI_VENDOR_ID_SUN &&
/* Must be invoked with no lock held. */
static void gem_stop_phy(struct gem *gp, int wol)
{
- u32 mifcfg;
+ u32 mif_cfg;
unsigned long flags;
/* Let the chip settle down a bit, it seems that helps
/* Make sure we aren't polling PHY status change. We
* don't currently use that feature though
*/
- mifcfg = readl(gp->regs + MIF_CFG);
- mifcfg &= ~MIF_CFG_POLL;
- writel(mifcfg, gp->regs + MIF_CFG);
+ mif_cfg = readl(gp->regs + MIF_CFG);
+ mif_cfg &= ~MIF_CFG_POLL;
+ writel(mif_cfg, gp->regs + MIF_CFG);
if (wol && gp->has_wol) {
unsigned char *e = &gp->dev->dev_addr[0];
/* According to Apple, we must set the MDIO pins to this begnign
* state or we may 1) eat more current, 2) damage some PHYs
*/
- writel(mifcfg | MIF_CFG_BBMODE, gp->regs + MIF_CFG);
+ mif_cfg = 0;
+ writel(mif_cfg | MIF_CFG_BBMODE, gp->regs + MIF_CFG);
writel(0, gp->regs + MIF_BBCLK);
writel(0, gp->regs + MIF_BBDATA);
writel(0, gp->regs + MIF_BBOENAB);
#define DRV_MODULE_NAME "tg3"
#define PFX DRV_MODULE_NAME ": "
-#define DRV_MODULE_VERSION "3.47"
-#define DRV_MODULE_RELDATE "Dec 28, 2005"
+#define DRV_MODULE_VERSION "3.48"
+#define DRV_MODULE_RELDATE "Jan 16, 2006"
#define TG3_DEF_MAC_MODE 0
#define TG3_DEF_RX_MODE 0
val &= ~((1 << 16) | (1 << 4) | (1 << 2) | (1 << 1) | 1);
tw32(0x7d00, val);
if (!(tp->tg3_flags & TG3_FLAG_ENABLE_ASF)) {
- tg3_nvram_lock(tp);
+ int err;
+
+ err = tg3_nvram_lock(tp);
tg3_halt_cpu(tp, RX_CPU_BASE);
- tw32_f(NVRAM_SWARB, SWARB_REQ_CLR0);
- tg3_nvram_unlock(tp);
+ if (!err)
+ tg3_nvram_unlock(tp);
}
}
if (tp->tg3_flags & TG3_FLAG_NVRAM) {
int i;
- tw32(NVRAM_SWARB, SWARB_REQ_SET1);
- for (i = 0; i < 8000; i++) {
- if (tr32(NVRAM_SWARB) & SWARB_GNT1)
- break;
- udelay(20);
+ if (tp->nvram_lock_cnt == 0) {
+ tw32(NVRAM_SWARB, SWARB_REQ_SET1);
+ for (i = 0; i < 8000; i++) {
+ if (tr32(NVRAM_SWARB) & SWARB_GNT1)
+ break;
+ udelay(20);
+ }
+ if (i == 8000) {
+ tw32(NVRAM_SWARB, SWARB_REQ_CLR1);
+ return -ENODEV;
+ }
}
- if (i == 8000)
- return -ENODEV;
+ tp->nvram_lock_cnt++;
}
return 0;
}
/* tp->lock is held. */
static void tg3_nvram_unlock(struct tg3 *tp)
{
- if (tp->tg3_flags & TG3_FLAG_NVRAM)
- tw32_f(NVRAM_SWARB, SWARB_REQ_CLR1);
+ if (tp->tg3_flags & TG3_FLAG_NVRAM) {
+ if (tp->nvram_lock_cnt > 0)
+ tp->nvram_lock_cnt--;
+ if (tp->nvram_lock_cnt == 0)
+ tw32_f(NVRAM_SWARB, SWARB_REQ_CLR1);
+ }
}
/* tp->lock is held. */
void (*write_op)(struct tg3 *, u32, u32);
int i;
- if (!(tp->tg3_flags2 & TG3_FLG2_SUN_570X))
+ if (!(tp->tg3_flags2 & TG3_FLG2_SUN_570X)) {
tg3_nvram_lock(tp);
+ /* No matching tg3_nvram_unlock() after this because
+ * chip reset below will undo the nvram lock.
+ */
+ tp->nvram_lock_cnt = 0;
+ }
/*
* We must avoid the readl() that normally takes place.
(offset == RX_CPU_BASE ? "RX" : "TX"));
return -ENODEV;
}
+
+ /* Clear firmware's nvram arbitration. */
+ if (tp->tg3_flags & TG3_FLAG_NVRAM)
+ tw32(NVRAM_SWARB, SWARB_REQ_CLR0);
return 0;
}
static int tg3_load_firmware_cpu(struct tg3 *tp, u32 cpu_base, u32 cpu_scratch_base,
int cpu_scratch_size, struct fw_info *info)
{
- int err, i;
+ int err, lock_err, i;
void (*write_op)(struct tg3 *, u32, u32);
if (cpu_base == TX_CPU_BASE &&
/* It is possible that bootcode is still loading at this point.
* Get the nvram lock first before halting the cpu.
*/
- tg3_nvram_lock(tp);
+ lock_err = tg3_nvram_lock(tp);
err = tg3_halt_cpu(tp, cpu_base);
- tg3_nvram_unlock(tp);
+ if (!lock_err)
+ tg3_nvram_unlock(tp);
if (err)
goto out;
data[1] = 1;
}
if (etest->flags & ETH_TEST_FL_OFFLINE) {
- int irq_sync = 0;
+ int err, irq_sync = 0;
if (netif_running(dev)) {
tg3_netif_stop(tp);
tg3_full_lock(tp, irq_sync);
tg3_halt(tp, RESET_KIND_SUSPEND, 1);
- tg3_nvram_lock(tp);
+ err = tg3_nvram_lock(tp);
tg3_halt_cpu(tp, RX_CPU_BASE);
if (!(tp->tg3_flags2 & TG3_FLG2_5705_PLUS))
tg3_halt_cpu(tp, TX_CPU_BASE);
- tg3_nvram_unlock(tp);
+ if (!err)
+ tg3_nvram_unlock(tp);
if (tg3_test_registers(tp) != 0) {
etest->flags |= ETH_TEST_FL_FAILED;
GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5701) {
tp->tg3_flags |= TG3_FLAG_NVRAM;
- tg3_nvram_lock(tp);
+ if (tg3_nvram_lock(tp)) {
+ printk(KERN_WARNING PFX "%s: Cannot get nvarm lock, "
+ "tg3_nvram_init failed.\n", tp->dev->name);
+ return;
+ }
tg3_enable_nvram_access(tp);
if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5752)
if (offset > NVRAM_ADDR_MSK)
return -EINVAL;
- tg3_nvram_lock(tp);
+ ret = tg3_nvram_lock(tp);
+ if (ret)
+ return ret;
tg3_enable_nvram_access(tp);
offset = offset + (pagesize - page_off);
- /* Nvram lock released by tg3_nvram_read() above,
- * so need to get it again.
- */
- tg3_nvram_lock(tp);
tg3_enable_nvram_access(tp);
/*
else {
u32 grc_mode;
- tg3_nvram_lock(tp);
+ ret = tg3_nvram_lock(tp);
+ if (ret)
+ return ret;
tg3_enable_nvram_access(tp);
if ((tp->tg3_flags2 & TG3_FLG2_5750_PLUS) &&
dma_addr_t stats_mapping;
struct work_struct reset_task;
+ int nvram_lock_cnt;
u32 nvram_size;
u32 nvram_pagesize;
u32 nvram_jedecnum;
int channel = fwrq->m;
/* We should do a better check than that,
* based on the card capability !!! */
- if((channel < 1) || (channel > 16)) {
+ if((channel < 1) || (channel > 14)) {
printk(KERN_DEBUG "%s: New channel value of %d is invalid!\n", dev->name, fwrq->m);
rc = -EINVAL;
} else {
readConfigRid(local, 1);
/* Yes ! We can set it !!! */
- local->config.channelSet = (u16)(channel - 1);
+ local->config.channelSet = (u16) channel;
set_bit (FLAG_COMMIT, &local->flags);
}
}
{
struct airo_info *local = dev->priv;
StatusRid status_rid; /* Card status info */
+ int ch;
readConfigRid(local, 1);
if ((local->config.opmode & 0xFF) == MODE_STA_ESS)
else
readStatusRid(local, &status_rid, 1);
-#ifdef WEXT_USECHANNELS
- fwrq->m = ((int)status_rid.channel) + 1;
- fwrq->e = 0;
-#else
- {
- int f = (int)status_rid.channel;
- fwrq->m = frequency_list[f] * 100000;
+ ch = (int)status_rid.channel;
+ if((ch > 0) && (ch < 15)) {
+ fwrq->m = frequency_list[ch - 1] * 100000;
fwrq->e = 1;
+ } else {
+ fwrq->m = ch;
+ fwrq->e = 0;
}
-#endif
return 0;
}
/* If none, we may want to get the one that was set */
/* Push it out ! */
- dwrq->length = status_rid.SSIDlen + 1;
+ dwrq->length = status_rid.SSIDlen;
dwrq->flags = 1; /* active */
return 0;
if (priv->new_SSID_size != 0) {
memcpy(extra, priv->new_SSID, priv->new_SSID_size);
extra[priv->new_SSID_size] = '\0';
- dwrq->length = priv->new_SSID_size + 1;
+ dwrq->length = priv->new_SSID_size;
} else {
memcpy(extra, priv->SSID, priv->SSID_size);
extra[priv->SSID_size] = '\0';
- dwrq->length = priv->SSID_size + 1;
+ dwrq->length = priv->SSID_size;
}
dwrq->flags = !priv->connect_to_any_BSS; /* active */
depends on HOSTAP
---help---
Configure Host AP driver to include support for firmware image
- download. Current version supports only downloading to volatile, i.e.,
- RAM memory. Flash upgrade is not yet supported.
+ download. This option by itself only enables downloading to the
+ volatile memory, i.e. the card RAM. This option is required to
+ support cards that don't have firmware in flash, such as D-Link
+ DWL-520 rev E and D-Link DWL-650 rev P.
- Firmware image downloading needs user space tool, prism2_srec. It is
- available from http://hostap.epitest.fi/.
+ Firmware image downloading needs a user space tool, prism2_srec.
+ It is available from http://hostap.epitest.fi/.
+
+config HOSTAP_FIRMWARE_NVRAM
+ bool "Support for non-volatile firmware download"
+ depends on HOSTAP_FIRMWARE
+ ---help---
+ Allow Host AP driver to write firmware images to the non-volatile
+ card memory, i.e. flash memory that survives power cycling.
+ Enable this option if you want to be able to change card firmware
+ permanently.
+
+ Firmware image downloading needs a user space tool, prism2_srec.
+ It is available from http://hostap.epitest.fi/.
config HOSTAP_PLX
tristate "Host AP driver for Prism2/2.5/3 in PLX9052 PCI adaptors"
config HOSTAP_CS
tristate "Host AP driver for Prism2/2.5/3 PC Cards"
- depends on PCMCIA!=n && HOSTAP
+ depends on PCMCIA && HOSTAP
---help---
Host AP driver's version for Prism2/2.5/3 PC Cards.
-hostap-y := hostap_main.o
+hostap-y := hostap_80211_rx.o hostap_80211_tx.o hostap_ap.o hostap_info.o \
+ hostap_ioctl.o hostap_main.o hostap_proc.o
obj-$(CONFIG_HOSTAP) += hostap.o
obj-$(CONFIG_HOSTAP_CS) += hostap_cs.o
#ifndef HOSTAP_H
#define HOSTAP_H
+#include <linux/ethtool.h>
+
+#include "hostap_wlan.h"
+#include "hostap_ap.h"
+
+static const long freq_list[] = { 2412, 2417, 2422, 2427, 2432, 2437, 2442,
+ 2447, 2452, 2457, 2462, 2467, 2472, 2484 };
+#define FREQ_COUNT (sizeof(freq_list) / sizeof(freq_list[0]))
+
/* hostap.c */
extern struct proc_dir_entry *hostap_proc;
int prism2_sta_send_mgmt(local_info_t *local, u8 *dst, u16 stype,
u8 *body, size_t bodylen);
int prism2_sta_deauth(local_info_t *local, u16 reason);
+int prism2_wds_add(local_info_t *local, u8 *remote_addr,
+ int rtnl_locked);
+int prism2_wds_del(local_info_t *local, u8 *remote_addr,
+ int rtnl_locked, int do_not_remove);
+
+
+/* hostap_ap.c */
+
+int ap_control_add_mac(struct mac_restrictions *mac_restrictions, u8 *mac);
+int ap_control_del_mac(struct mac_restrictions *mac_restrictions, u8 *mac);
+void ap_control_flush_macs(struct mac_restrictions *mac_restrictions);
+int ap_control_kick_mac(struct ap_data *ap, struct net_device *dev, u8 *mac);
+void ap_control_kickall(struct ap_data *ap);
+void * ap_crypt_get_ptrs(struct ap_data *ap, u8 *addr, int permanent,
+ struct ieee80211_crypt_data ***crypt);
+int prism2_ap_get_sta_qual(local_info_t *local, struct sockaddr addr[],
+ struct iw_quality qual[], int buf_size,
+ int aplist);
+int prism2_ap_translate_scan(struct net_device *dev, char *buffer);
+int prism2_hostapd(struct ap_data *ap, struct prism2_hostapd_param *param);
/* hostap_proc.c */
void hostap_info_process(local_info_t *local, struct sk_buff *skb);
+/* hostap_ioctl.c */
+
+extern const struct iw_handler_def hostap_iw_handler_def;
+extern struct ethtool_ops prism2_ethtool_ops;
+
+int hostap_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd);
+
+
#endif /* HOSTAP_H */
#ifndef HOSTAP_80211_H
#define HOSTAP_80211_H
+#include <linux/types.h>
+#include <net/ieee80211_crypt.h>
+
struct hostap_ieee80211_mgmt {
u16 frame_control;
u16 duration;
#include <linux/etherdevice.h>
+#include <net/ieee80211_crypt.h>
#include "hostap_80211.h"
#include "hostap.h"
+#include "hostap_ap.h"
+
+/* See IEEE 802.1H for LLC/SNAP encapsulation/decapsulation */
+/* Ethernet-II snap header (RFC1042 for most EtherTypes) */
+static unsigned char rfc1042_header[] =
+{ 0xaa, 0xaa, 0x03, 0x00, 0x00, 0x00 };
+/* Bridge-Tunnel header (for EtherTypes ETH_P_AARP and ETH_P_IPX) */
+static unsigned char bridge_tunnel_header[] =
+{ 0xaa, 0xaa, 0x03, 0x00, 0x00, 0xf8 };
+/* No encapsulation header if EtherType < 0x600 (=length) */
void hostap_dump_rx_80211(const char *name, struct sk_buff *skb,
struct hostap_80211_rx_status *rx_stats)
+#include "hostap_80211.h"
+#include "hostap_common.h"
+#include "hostap_wlan.h"
+#include "hostap.h"
+#include "hostap_ap.h"
+
+/* See IEEE 802.1H for LLC/SNAP encapsulation/decapsulation */
+/* Ethernet-II snap header (RFC1042 for most EtherTypes) */
+static unsigned char rfc1042_header[] =
+{ 0xaa, 0xaa, 0x03, 0x00, 0x00, 0x00 };
+/* Bridge-Tunnel header (for EtherTypes ETH_P_AARP and ETH_P_IPX) */
+static unsigned char bridge_tunnel_header[] =
+{ 0xaa, 0xaa, 0x03, 0x00, 0x00, 0xf8 };
+/* No encapsulation header if EtherType < 0x600 (=length) */
+
void hostap_dump_tx_80211(const char *name, struct sk_buff *skb)
{
struct ieee80211_hdr_4addr *hdr;
* (8802.11: 5.5)
*/
+#include <linux/proc_fs.h>
+#include <linux/delay.h>
+#include <linux/random.h>
+
+#include "hostap_wlan.h"
+#include "hostap.h"
+#include "hostap_ap.h"
+
static int other_ap_policy[MAX_PARM_DEVICES] = { AP_OTHER_AP_SKIP_ALL,
DEF_INTS };
module_param_array(other_ap_policy, int, NULL, 0444);
}
-static int ap_control_add_mac(struct mac_restrictions *mac_restrictions,
- u8 *mac)
+int ap_control_add_mac(struct mac_restrictions *mac_restrictions, u8 *mac)
{
struct mac_entry *entry;
}
-static int ap_control_del_mac(struct mac_restrictions *mac_restrictions,
- u8 *mac)
+int ap_control_del_mac(struct mac_restrictions *mac_restrictions, u8 *mac)
{
struct list_head *ptr;
struct mac_entry *entry;
}
-static void ap_control_flush_macs(struct mac_restrictions *mac_restrictions)
+void ap_control_flush_macs(struct mac_restrictions *mac_restrictions)
{
struct list_head *ptr, *n;
struct mac_entry *entry;
}
-static int ap_control_kick_mac(struct ap_data *ap, struct net_device *dev,
- u8 *mac)
+int ap_control_kick_mac(struct ap_data *ap, struct net_device *dev, u8 *mac)
{
struct sta_info *sta;
u16 resp;
#endif /* PRISM2_NO_KERNEL_IEEE80211_MGMT */
-static void ap_control_kickall(struct ap_data *ap)
+void ap_control_kickall(struct ap_data *ap)
{
struct list_head *ptr, *n;
struct sta_info *sta;
}
-static int prism2_ap_get_sta_qual(local_info_t *local, struct sockaddr addr[],
- struct iw_quality qual[], int buf_size,
- int aplist)
+int prism2_ap_get_sta_qual(local_info_t *local, struct sockaddr addr[],
+ struct iw_quality qual[], int buf_size,
+ int aplist)
{
struct ap_data *ap = local->ap;
struct list_head *ptr;
/* Translate our list of Access Points & Stations to a card independant
* format that the Wireless Tools will understand - Jean II */
-static int prism2_ap_translate_scan(struct net_device *dev, char *buffer)
+int prism2_ap_translate_scan(struct net_device *dev, char *buffer)
{
struct hostap_interface *iface;
local_info_t *local;
}
-static int prism2_hostapd(struct ap_data *ap,
- struct prism2_hostapd_param *param)
+int prism2_hostapd(struct ap_data *ap, struct prism2_hostapd_param *param)
{
switch (param->cmd) {
case PRISM2_HOSTAPD_FLUSH:
}
-static void * ap_crypt_get_ptrs(struct ap_data *ap, u8 *addr, int permanent,
- struct ieee80211_crypt_data ***crypt)
+void * ap_crypt_get_ptrs(struct ap_data *ap, u8 *addr, int permanent,
+ struct ieee80211_crypt_data ***crypt)
{
struct sta_info *sta;
#ifndef HOSTAP_AP_H
#define HOSTAP_AP_H
+#include "hostap_80211.h"
+
/* AP data structures for STAs */
/* maximum number of frames to buffer per STA */
#ifndef HOSTAP_COMMON_H
#define HOSTAP_COMMON_H
+#include <linux/types.h>
+#include <linux/if_ether.h>
+
#define BIT(x) (1 << (x))
#define MAC2STR(a) (a)[0], (a)[1], (a)[2], (a)[3], (a)[4], (a)[5]
#define PRISM2_DOWNLOAD_SUPPORT
#endif
-#ifdef PRISM2_DOWNLOAD_SUPPORT
-/* Allow writing firmware images into flash, i.e., to non-volatile storage.
- * Before you enable this option, you should make absolutely sure that you are
- * using prism2_srec utility that comes with THIS version of the driver!
- * In addition, please note that it is possible to kill your card with
- * non-volatile download if you are using incorrect image. This feature has not
- * been fully tested, so please be careful with it. */
-/* #define PRISM2_NON_VOLATILE_DOWNLOAD */
-#endif /* PRISM2_DOWNLOAD_SUPPORT */
+/* Allow kernel configuration to enable non-volatile download support. */
+#ifdef CONFIG_HOSTAP_FIRMWARE_NVRAM
+#define PRISM2_NON_VOLATILE_DOWNLOAD
+#endif
/* Save low-level I/O for debugging. This should not be enabled in normal use.
*/
/* Host AP driver Info Frame processing (part of hostap.o module) */
+#include "hostap_wlan.h"
+#include "hostap.h"
+#include "hostap_ap.h"
/* Called only as a tasklet (software IRQ) */
static void prism2_info_commtallies16(local_info_t *local, unsigned char *buf,
/* ioctl() (mostly Linux Wireless Extensions) routines for Host AP driver */
-#ifdef in_atomic
-/* Get kernel_locked() for in_atomic() */
+#include <linux/types.h>
#include <linux/smp_lock.h>
-#endif
#include <linux/ethtool.h>
+#include <net/ieee80211_crypt.h>
+#include "hostap_wlan.h"
+#include "hostap.h"
+#include "hostap_ap.h"
static struct iw_statistics *hostap_get_wireless_stats(struct net_device *dev)
{
local->sta_fw_ver & 0xff);
}
-static struct ethtool_ops prism2_ethtool_ops = {
+struct ethtool_ops prism2_ethtool_ops = {
.get_drvinfo = prism2_get_drvinfo
};
(iw_handler) prism2_ioctl_priv_readmif, /* 3 */
};
-static const struct iw_handler_def hostap_iw_handler_def =
+const struct iw_handler_def hostap_iw_handler_def =
{
.num_standard = sizeof(prism2_handler) / sizeof(iw_handler),
.num_private = sizeof(prism2_private_handler) / sizeof(iw_handler),
#include <linux/kmod.h>
#include <linux/rtnetlink.h>
#include <linux/wireless.h>
+#include <linux/etherdevice.h>
#include <net/iw_handler.h>
#include <net/ieee80211.h>
#include <net/ieee80211_crypt.h>
#define PRISM2_MAX_MTU (PRISM2_MAX_FRAME_SIZE - (6 /* LLC */ + 8 /* WEP */))
-/* hostap.c */
-static int prism2_wds_add(local_info_t *local, u8 *remote_addr,
- int rtnl_locked);
-static int prism2_wds_del(local_info_t *local, u8 *remote_addr,
- int rtnl_locked, int do_not_remove);
-
-/* hostap_ap.c */
-static int prism2_ap_get_sta_qual(local_info_t *local, struct sockaddr addr[],
- struct iw_quality qual[], int buf_size,
- int aplist);
-static int prism2_ap_translate_scan(struct net_device *dev, char *buffer);
-static int prism2_hostapd(struct ap_data *ap,
- struct prism2_hostapd_param *param);
-static void * ap_crypt_get_ptrs(struct ap_data *ap, u8 *addr, int permanent,
- struct ieee80211_crypt_data ***crypt);
-static void ap_control_kickall(struct ap_data *ap);
-#ifndef PRISM2_NO_KERNEL_IEEE80211_MGMT
-static int ap_control_add_mac(struct mac_restrictions *mac_restrictions,
- u8 *mac);
-static int ap_control_del_mac(struct mac_restrictions *mac_restrictions,
- u8 *mac);
-static void ap_control_flush_macs(struct mac_restrictions *mac_restrictions);
-static int ap_control_kick_mac(struct ap_data *ap, struct net_device *dev,
- u8 *mac);
-#endif /* !PRISM2_NO_KERNEL_IEEE80211_MGMT */
-
-
-static const long freq_list[] = { 2412, 2417, 2422, 2427, 2432, 2437, 2442,
- 2447, 2452, 2457, 2462, 2467, 2472, 2484 };
-#define FREQ_COUNT (sizeof(freq_list) / sizeof(freq_list[0]))
-
-
-/* See IEEE 802.1H for LLC/SNAP encapsulation/decapsulation */
-/* Ethernet-II snap header (RFC1042 for most EtherTypes) */
-static unsigned char rfc1042_header[] =
-{ 0xaa, 0xaa, 0x03, 0x00, 0x00, 0x00 };
-/* Bridge-Tunnel header (for EtherTypes ETH_P_AARP and ETH_P_IPX) */
-static unsigned char bridge_tunnel_header[] =
-{ 0xaa, 0xaa, 0x03, 0x00, 0x00, 0xf8 };
-/* No encapsulation header if EtherType < 0x600 (=length) */
-
-
-/* FIX: these could be compiled separately and linked together to hostap.o */
-#include "hostap_ap.c"
-#include "hostap_info.c"
-#include "hostap_ioctl.c"
-#include "hostap_proc.c"
-#include "hostap_80211_rx.c"
-#include "hostap_80211_tx.c"
-
-
struct net_device * hostap_add_interface(struct local_info *local,
int type, int rtnl_locked,
const char *prefix,
}
-static int prism2_wds_add(local_info_t *local, u8 *remote_addr,
- int rtnl_locked)
+int prism2_wds_add(local_info_t *local, u8 *remote_addr,
+ int rtnl_locked)
{
struct net_device *dev;
struct list_head *ptr;
}
-static int prism2_wds_del(local_info_t *local, u8 *remote_addr,
- int rtnl_locked, int do_not_remove)
+int prism2_wds_del(local_info_t *local, u8 *remote_addr,
+ int rtnl_locked, int do_not_remove)
{
unsigned long flags;
struct list_head *ptr;
/* /proc routines for Host AP driver */
+#include <linux/types.h>
+#include <linux/proc_fs.h>
+#include <net/ieee80211_crypt.h>
+
+#include "hostap_wlan.h"
+#include "hostap.h"
+
#define PROC_LIMIT (PAGE_SIZE - 80)
#ifndef HOSTAP_WLAN_H
#define HOSTAP_WLAN_H
+#include <linux/wireless.h>
+#include <linux/netdevice.h>
+#include <net/iw_handler.h>
+
#include "hostap_config.h"
#include "hostap_common.h"
#define SEARCH_SNAPSHOT 1
#define SNAPSHOT_ADDR(ofs) (priv->snapshot[((ofs) >> 12) & 0xff] + ((ofs) & 0xfff))
+static void ipw2100_snapshot_free(struct ipw2100_priv *priv)
+{
+ int i;
+ if (!priv->snapshot[0])
+ return;
+ for (i = 0; i < 0x30; i++)
+ kfree(priv->snapshot[i]);
+ priv->snapshot[0] = NULL;
+}
+
+#ifdef CONFIG_IPW2100_DEBUG_C3
static int ipw2100_snapshot_alloc(struct ipw2100_priv *priv)
{
int i;
return 1;
}
-static void ipw2100_snapshot_free(struct ipw2100_priv *priv)
-{
- int i;
- if (!priv->snapshot[0])
- return;
- for (i = 0; i < 0x30; i++)
- kfree(priv->snapshot[i]);
- priv->snapshot[0] = NULL;
-}
-
static u32 ipw2100_match_buf(struct ipw2100_priv *priv, u8 * in_buf,
size_t len, int mode)
{
return ret;
}
+#endif
/*
*
return &priv->ieee->stats;
}
-#if WIRELESS_EXT < 18
-/* Support for wpa_supplicant before WE-18, deprecated. */
-
-/* following definitions must match definitions in driver_ipw.c */
-
-#define IPW2100_IOCTL_WPA_SUPPLICANT SIOCIWFIRSTPRIV+30
-
-#define IPW2100_CMD_SET_WPA_PARAM 1
-#define IPW2100_CMD_SET_WPA_IE 2
-#define IPW2100_CMD_SET_ENCRYPTION 3
-#define IPW2100_CMD_MLME 4
-
-#define IPW2100_PARAM_WPA_ENABLED 1
-#define IPW2100_PARAM_TKIP_COUNTERMEASURES 2
-#define IPW2100_PARAM_DROP_UNENCRYPTED 3
-#define IPW2100_PARAM_PRIVACY_INVOKED 4
-#define IPW2100_PARAM_AUTH_ALGS 5
-#define IPW2100_PARAM_IEEE_802_1X 6
-
-#define IPW2100_MLME_STA_DEAUTH 1
-#define IPW2100_MLME_STA_DISASSOC 2
-
-#define IPW2100_CRYPT_ERR_UNKNOWN_ALG 2
-#define IPW2100_CRYPT_ERR_UNKNOWN_ADDR 3
-#define IPW2100_CRYPT_ERR_CRYPT_INIT_FAILED 4
-#define IPW2100_CRYPT_ERR_KEY_SET_FAILED 5
-#define IPW2100_CRYPT_ERR_TX_KEY_SET_FAILED 6
-#define IPW2100_CRYPT_ERR_CARD_CONF_FAILED 7
-
-#define IPW2100_CRYPT_ALG_NAME_LEN 16
-
-struct ipw2100_param {
- u32 cmd;
- u8 sta_addr[ETH_ALEN];
- union {
- struct {
- u8 name;
- u32 value;
- } wpa_param;
- struct {
- u32 len;
- u8 reserved[32];
- u8 data[0];
- } wpa_ie;
- struct {
- u32 command;
- u32 reason_code;
- } mlme;
- struct {
- u8 alg[IPW2100_CRYPT_ALG_NAME_LEN];
- u8 set_tx;
- u32 err;
- u8 idx;
- u8 seq[8]; /* sequence counter (set: RX, get: TX) */
- u16 key_len;
- u8 key[0];
- } crypt;
-
- } u;
-};
-
-/* end of driver_ipw.c code */
-#endif /* WIRELESS_EXT < 18 */
-
static int ipw2100_wpa_enable(struct ipw2100_priv *priv, int value)
{
/* This is called when wpa_supplicant loads and closes the driver
return 0;
}
-#if WIRELESS_EXT < 18
-#define IW_AUTH_ALG_OPEN_SYSTEM 0x1
-#define IW_AUTH_ALG_SHARED_KEY 0x2
-#endif
-
static int ipw2100_wpa_set_auth_algs(struct ipw2100_priv *priv, int value)
{
ipw2100_set_wpa_ie(priv, &frame, 0);
}
-#if WIRELESS_EXT < 18
-static int ipw2100_wpa_set_param(struct net_device *dev, u8 name, u32 value)
-{
- struct ipw2100_priv *priv = ieee80211_priv(dev);
- struct ieee80211_crypt_data *crypt;
- unsigned long flags;
- int ret = 0;
-
- switch (name) {
- case IPW2100_PARAM_WPA_ENABLED:
- ret = ipw2100_wpa_enable(priv, value);
- break;
-
- case IPW2100_PARAM_TKIP_COUNTERMEASURES:
- crypt = priv->ieee->crypt[priv->ieee->tx_keyidx];
- if (!crypt || !crypt->ops->set_flags || !crypt->ops->get_flags)
- break;
-
- flags = crypt->ops->get_flags(crypt->priv);
-
- if (value)
- flags |= IEEE80211_CRYPTO_TKIP_COUNTERMEASURES;
- else
- flags &= ~IEEE80211_CRYPTO_TKIP_COUNTERMEASURES;
-
- crypt->ops->set_flags(flags, crypt->priv);
-
- break;
-
- case IPW2100_PARAM_DROP_UNENCRYPTED:{
- /* See IW_AUTH_DROP_UNENCRYPTED handling for details */
- struct ieee80211_security sec = {
- .flags = SEC_ENABLED,
- .enabled = value,
- };
- priv->ieee->drop_unencrypted = value;
- /* We only change SEC_LEVEL for open mode. Others
- * are set by ipw_wpa_set_encryption.
- */
- if (!value) {
- sec.flags |= SEC_LEVEL;
- sec.level = SEC_LEVEL_0;
- } else {
- sec.flags |= SEC_LEVEL;
- sec.level = SEC_LEVEL_1;
- }
- if (priv->ieee->set_security)
- priv->ieee->set_security(priv->ieee->dev, &sec);
- break;
- }
-
- case IPW2100_PARAM_PRIVACY_INVOKED:
- priv->ieee->privacy_invoked = value;
- break;
-
- case IPW2100_PARAM_AUTH_ALGS:
- ret = ipw2100_wpa_set_auth_algs(priv, value);
- break;
-
- case IPW2100_PARAM_IEEE_802_1X:
- priv->ieee->ieee802_1x = value;
- break;
-
- default:
- printk(KERN_ERR DRV_NAME ": %s: Unknown WPA param: %d\n",
- dev->name, name);
- ret = -EOPNOTSUPP;
- }
-
- return ret;
-}
-
-static int ipw2100_wpa_mlme(struct net_device *dev, int command, int reason)
-{
-
- struct ipw2100_priv *priv = ieee80211_priv(dev);
- int ret = 0;
-
- switch (command) {
- case IPW2100_MLME_STA_DEAUTH:
- // silently ignore
- break;
-
- case IPW2100_MLME_STA_DISASSOC:
- ipw2100_disassociate_bssid(priv);
- break;
-
- default:
- printk(KERN_ERR DRV_NAME ": %s: Unknown MLME request: %d\n",
- dev->name, command);
- ret = -EOPNOTSUPP;
- }
-
- return ret;
-}
-
-static int ipw2100_wpa_set_wpa_ie(struct net_device *dev,
- struct ipw2100_param *param, int plen)
-{
-
- struct ipw2100_priv *priv = ieee80211_priv(dev);
- struct ieee80211_device *ieee = priv->ieee;
- u8 *buf;
-
- if (!ieee->wpa_enabled)
- return -EOPNOTSUPP;
-
- if (param->u.wpa_ie.len > MAX_WPA_IE_LEN ||
- (param->u.wpa_ie.len && param->u.wpa_ie.data == NULL))
- return -EINVAL;
-
- if (param->u.wpa_ie.len) {
- buf = kmalloc(param->u.wpa_ie.len, GFP_KERNEL);
- if (buf == NULL)
- return -ENOMEM;
-
- memcpy(buf, param->u.wpa_ie.data, param->u.wpa_ie.len);
-
- kfree(ieee->wpa_ie);
- ieee->wpa_ie = buf;
- ieee->wpa_ie_len = param->u.wpa_ie.len;
-
- } else {
- kfree(ieee->wpa_ie);
- ieee->wpa_ie = NULL;
- ieee->wpa_ie_len = 0;
- }
-
- ipw2100_wpa_assoc_frame(priv, ieee->wpa_ie, ieee->wpa_ie_len);
-
- return 0;
-}
-
-/* implementation borrowed from hostap driver */
-
-static int ipw2100_wpa_set_encryption(struct net_device *dev,
- struct ipw2100_param *param,
- int param_len)
-{
- int ret = 0;
- struct ipw2100_priv *priv = ieee80211_priv(dev);
- struct ieee80211_device *ieee = priv->ieee;
- struct ieee80211_crypto_ops *ops;
- struct ieee80211_crypt_data **crypt;
-
- struct ieee80211_security sec = {
- .flags = 0,
- };
-
- param->u.crypt.err = 0;
- param->u.crypt.alg[IPW2100_CRYPT_ALG_NAME_LEN - 1] = '\0';
-
- if (param_len !=
- (int)((char *)param->u.crypt.key - (char *)param) +
- param->u.crypt.key_len) {
- IPW_DEBUG_INFO("Len mismatch %d, %d\n", param_len,
- param->u.crypt.key_len);
- return -EINVAL;
- }
- if (param->sta_addr[0] == 0xff && param->sta_addr[1] == 0xff &&
- param->sta_addr[2] == 0xff && param->sta_addr[3] == 0xff &&
- param->sta_addr[4] == 0xff && param->sta_addr[5] == 0xff) {
- if (param->u.crypt.idx >= WEP_KEYS)
- return -EINVAL;
- crypt = &ieee->crypt[param->u.crypt.idx];
- } else {
- return -EINVAL;
- }
-
- sec.flags |= SEC_ENABLED | SEC_ENCRYPT;
- if (strcmp(param->u.crypt.alg, "none") == 0) {
- if (crypt) {
- sec.enabled = 0;
- sec.encrypt = 0;
- sec.level = SEC_LEVEL_0;
- sec.flags |= SEC_LEVEL;
- ieee80211_crypt_delayed_deinit(ieee, crypt);
- }
- goto done;
- }
- sec.enabled = 1;
- sec.encrypt = 1;
-
- ops = ieee80211_get_crypto_ops(param->u.crypt.alg);
- if (ops == NULL && strcmp(param->u.crypt.alg, "WEP") == 0) {
- request_module("ieee80211_crypt_wep");
- ops = ieee80211_get_crypto_ops(param->u.crypt.alg);
- } else if (ops == NULL && strcmp(param->u.crypt.alg, "TKIP") == 0) {
- request_module("ieee80211_crypt_tkip");
- ops = ieee80211_get_crypto_ops(param->u.crypt.alg);
- } else if (ops == NULL && strcmp(param->u.crypt.alg, "CCMP") == 0) {
- request_module("ieee80211_crypt_ccmp");
- ops = ieee80211_get_crypto_ops(param->u.crypt.alg);
- }
- if (ops == NULL) {
- IPW_DEBUG_INFO("%s: unknown crypto alg '%s'\n",
- dev->name, param->u.crypt.alg);
- param->u.crypt.err = IPW2100_CRYPT_ERR_UNKNOWN_ALG;
- ret = -EINVAL;
- goto done;
- }
-
- if (*crypt == NULL || (*crypt)->ops != ops) {
- struct ieee80211_crypt_data *new_crypt;
-
- ieee80211_crypt_delayed_deinit(ieee, crypt);
-
- new_crypt = kzalloc(sizeof(struct ieee80211_crypt_data), GFP_KERNEL);
- if (new_crypt == NULL) {
- ret = -ENOMEM;
- goto done;
- }
- new_crypt->ops = ops;
- if (new_crypt->ops && try_module_get(new_crypt->ops->owner))
- new_crypt->priv =
- new_crypt->ops->init(param->u.crypt.idx);
-
- if (new_crypt->priv == NULL) {
- kfree(new_crypt);
- param->u.crypt.err =
- IPW2100_CRYPT_ERR_CRYPT_INIT_FAILED;
- ret = -EINVAL;
- goto done;
- }
-
- *crypt = new_crypt;
- }
-
- if (param->u.crypt.key_len > 0 && (*crypt)->ops->set_key &&
- (*crypt)->ops->set_key(param->u.crypt.key,
- param->u.crypt.key_len, param->u.crypt.seq,
- (*crypt)->priv) < 0) {
- IPW_DEBUG_INFO("%s: key setting failed\n", dev->name);
- param->u.crypt.err = IPW2100_CRYPT_ERR_KEY_SET_FAILED;
- ret = -EINVAL;
- goto done;
- }
-
- if (param->u.crypt.set_tx) {
- ieee->tx_keyidx = param->u.crypt.idx;
- sec.active_key = param->u.crypt.idx;
- sec.flags |= SEC_ACTIVE_KEY;
- }
-
- if (ops->name != NULL) {
-
- if (strcmp(ops->name, "WEP") == 0) {
- memcpy(sec.keys[param->u.crypt.idx],
- param->u.crypt.key, param->u.crypt.key_len);
- sec.key_sizes[param->u.crypt.idx] =
- param->u.crypt.key_len;
- sec.flags |= (1 << param->u.crypt.idx);
- sec.flags |= SEC_LEVEL;
- sec.level = SEC_LEVEL_1;
- } else if (strcmp(ops->name, "TKIP") == 0) {
- sec.flags |= SEC_LEVEL;
- sec.level = SEC_LEVEL_2;
- } else if (strcmp(ops->name, "CCMP") == 0) {
- sec.flags |= SEC_LEVEL;
- sec.level = SEC_LEVEL_3;
- }
- }
- done:
- if (ieee->set_security)
- ieee->set_security(ieee->dev, &sec);
-
- /* Do not reset port if card is in Managed mode since resetting will
- * generate new IEEE 802.11 authentication which may end up in looping
- * with IEEE 802.1X. If your hardware requires a reset after WEP
- * configuration (for example... Prism2), implement the reset_port in
- * the callbacks structures used to initialize the 802.11 stack. */
- if (ieee->reset_on_keychange &&
- ieee->iw_mode != IW_MODE_INFRA &&
- ieee->reset_port && ieee->reset_port(dev)) {
- IPW_DEBUG_INFO("%s: reset_port failed\n", dev->name);
- param->u.crypt.err = IPW2100_CRYPT_ERR_CARD_CONF_FAILED;
- return -EINVAL;
- }
-
- return ret;
-}
-
-static int ipw2100_wpa_supplicant(struct net_device *dev, struct iw_point *p)
-{
-
- struct ipw2100_param *param;
- int ret = 0;
-
- IPW_DEBUG_IOCTL("wpa_supplicant: len=%d\n", p->length);
-
- if (p->length < sizeof(struct ipw2100_param) || !p->pointer)
- return -EINVAL;
-
- param = (struct ipw2100_param *)kmalloc(p->length, GFP_KERNEL);
- if (param == NULL)
- return -ENOMEM;
-
- if (copy_from_user(param, p->pointer, p->length)) {
- kfree(param);
- return -EFAULT;
- }
-
- switch (param->cmd) {
-
- case IPW2100_CMD_SET_WPA_PARAM:
- ret = ipw2100_wpa_set_param(dev, param->u.wpa_param.name,
- param->u.wpa_param.value);
- break;
-
- case IPW2100_CMD_SET_WPA_IE:
- ret = ipw2100_wpa_set_wpa_ie(dev, param, p->length);
- break;
-
- case IPW2100_CMD_SET_ENCRYPTION:
- ret = ipw2100_wpa_set_encryption(dev, param, p->length);
- break;
-
- case IPW2100_CMD_MLME:
- ret = ipw2100_wpa_mlme(dev, param->u.mlme.command,
- param->u.mlme.reason_code);
- break;
-
- default:
- printk(KERN_ERR DRV_NAME
- ": %s: Unknown WPA supplicant request: %d\n", dev->name,
- param->cmd);
- ret = -EOPNOTSUPP;
-
- }
-
- if (ret == 0 && copy_to_user(p->pointer, param, p->length))
- ret = -EFAULT;
-
- kfree(param);
- return ret;
-}
-
-static int ipw2100_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
-{
- struct iwreq *wrq = (struct iwreq *)rq;
- int ret = -1;
- switch (cmd) {
- case IPW2100_IOCTL_WPA_SUPPLICANT:
- ret = ipw2100_wpa_supplicant(dev, &wrq->u.data);
- return ret;
-
- default:
- return -EOPNOTSUPP;
- }
-
- return -EOPNOTSUPP;
-}
-#endif /* WIRELESS_EXT < 18 */
-
static void ipw_ethtool_get_drvinfo(struct net_device *dev,
struct ethtool_drvinfo *info)
{
dev->open = ipw2100_open;
dev->stop = ipw2100_close;
dev->init = ipw2100_net_init;
-#if WIRELESS_EXT < 18
- dev->do_ioctl = ipw2100_ioctl;
-#endif
dev->get_stats = ipw2100_stats;
dev->ethtool_ops = &ipw2100_ethtool_ops;
dev->tx_timeout = ipw2100_tx_timeout;
{
struct ipw2100_priv *priv = ieee80211_priv(dev);
int err = 0, value;
+
+ if (ipw_radio_kill_sw(priv, wrqu->txpower.disabled))
+ return -EINPROGRESS;
if (priv->ieee->iw_mode != IW_MODE_ADHOC)
+ return 0;
+
+ if ((wrqu->txpower.flags & IW_TXPOW_TYPE) != IW_TXPOW_DBM)
return -EINVAL;
- if (wrqu->txpower.disabled == 1 || wrqu->txpower.fixed == 0)
+ if (wrqu->txpower.fixed == 0)
value = IPW_TX_POWER_DEFAULT;
else {
if (wrqu->txpower.value < IPW_TX_POWER_MIN_DBM ||
struct ipw2100_priv *priv = ieee80211_priv(dev);
- if (priv->ieee->iw_mode != IW_MODE_ADHOC) {
- wrqu->power.disabled = 1;
- return 0;
- }
+ wrqu->txpower.disabled = (priv->status & STATUS_RF_KILL_MASK) ? 1 : 0;
if (priv->tx_power == IPW_TX_POWER_DEFAULT) {
- wrqu->power.fixed = 0;
- wrqu->power.value = IPW_TX_POWER_MAX_DBM;
- wrqu->power.disabled = 1;
+ wrqu->txpower.fixed = 0;
+ wrqu->txpower.value = IPW_TX_POWER_MAX_DBM;
} else {
- wrqu->power.disabled = 0;
- wrqu->power.fixed = 1;
- wrqu->power.value = priv->tx_power;
+ wrqu->txpower.fixed = 1;
+ wrqu->txpower.value = priv->tx_power;
}
- wrqu->power.flags = IW_TXPOW_DBM;
+ wrqu->txpower.flags = IW_TXPOW_DBM;
- IPW_DEBUG_WX("GET TX Power -> %d \n", wrqu->power.value);
+ IPW_DEBUG_WX("GET TX Power -> %d \n", wrqu->txpower.value);
return 0;
}
return 0;
}
-#if WIRELESS_EXT > 17
/*
* WE-18 WPA support
*/
}
return 0;
}
-#endif /* WIRELESS_EXT > 17 */
/*
*
NULL, /* SIOCWIWTHRSPY */
ipw2100_wx_set_wap, /* SIOCSIWAP */
ipw2100_wx_get_wap, /* SIOCGIWAP */
-#if WIRELESS_EXT > 17
ipw2100_wx_set_mlme, /* SIOCSIWMLME */
-#else
- NULL, /* -- hole -- */
-#endif
NULL, /* SIOCGIWAPLIST -- deprecated */
ipw2100_wx_set_scan, /* SIOCSIWSCAN */
ipw2100_wx_get_scan, /* SIOCGIWSCAN */
ipw2100_wx_get_encode, /* SIOCGIWENCODE */
ipw2100_wx_set_power, /* SIOCSIWPOWER */
ipw2100_wx_get_power, /* SIOCGIWPOWER */
-#if WIRELESS_EXT > 17
NULL, /* -- hole -- */
NULL, /* -- hole -- */
ipw2100_wx_set_genie, /* SIOCSIWGENIE */
ipw2100_wx_set_encodeext, /* SIOCSIWENCODEEXT */
ipw2100_wx_get_encodeext, /* SIOCGIWENCODEEXT */
NULL, /* SIOCSIWPMKSA */
-#endif
};
#define IPW2100_PRIV_SET_MONITOR SIOCIWFIRSTPRIV
else
IPW_DEBUG_INFO("Auto adhoc creation disabled.\n");
+ priv->config &= ~CFG_STATIC_ESSID;
+ priv->essid_len = 0;
+ memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
+
if (disable) {
priv->status |= STATUS_RF_KILL_SW;
IPW_DEBUG_INFO("Radio disabled.\n");
IPW_DEBUG_HC("starting request direct scan!\n");
if (priv->status & (STATUS_SCANNING | STATUS_SCAN_ABORTING)) {
- err = wait_event_interruptible(priv->wait_state,
- !(priv->
- status & (STATUS_SCANNING |
- STATUS_SCAN_ABORTING)));
- if (err) {
- IPW_DEBUG_HC("aborting direct scan");
- goto done;
- }
+ /* We should not sleep here; otherwise we will block most
+ * of the system (for instance, we hold rtnl_lock when we
+ * get here).
+ */
+ err = -EAGAIN;
+ goto done;
}
memset(&scan, 0, sizeof(scan));
net_dev->set_multicast_list = ipw_net_set_multicast_list;
net_dev->set_mac_address = ipw_net_set_mac_address;
priv->wireless_data.spy_data = &priv->ieee->spy_data;
- priv->wireless_data.ieee80211 = priv->ieee;
net_dev->wireless_data = &priv->wireless_data;
net_dev->wireless_handlers = &ipw_wx_handler_def;
net_dev->ethtool_ops = &ipw_ethtool_ops;
/* Free MAC hash list for ADHOC */
for (i = 0; i < IPW_IBSS_MAC_HASH_SIZE; i++) {
list_for_each_safe(p, q, &priv->ibss_mac_hash[i]) {
- kfree(list_entry(p, struct ipw_ibss_seq, list));
list_del(p);
+ kfree(list_entry(p, struct ipw_ibss_seq, list));
}
}
/* Note that the CIS values need to be rescaled */
if (cfg->vcc.present & (1 << CISTPL_POWER_VNOM)) {
if (conf.Vcc != cfg->vcc.param[CISTPL_POWER_VNOM] / 10000) {
- DEBUG(2, "orinoco_cs_config: Vcc mismatch (conf.Vcc = %d, CIS = %d)\n", conf.Vcc, cfg->vcc.param[CISTPL_POWER_VNOM] / 10000);
+ DEBUG(2, "orinoco_cs_config: Vcc mismatch (conf.Vcc = %d, cfg CIS = %d)\n", conf.Vcc, cfg->vcc.param[CISTPL_POWER_VNOM] / 10000);
if (!ignore_cis_vcc)
goto next_entry;
}
} else if (dflt.vcc.present & (1 << CISTPL_POWER_VNOM)) {
if (conf.Vcc != dflt.vcc.param[CISTPL_POWER_VNOM] / 10000) {
- DEBUG(2, "orinoco_cs_config: Vcc mismatch (conf.Vcc = %d, CIS = %d)\n", conf.Vcc, dflt.vcc.param[CISTPL_POWER_VNOM] / 10000);
+ DEBUG(2, "orinoco_cs_config: Vcc mismatch (conf.Vcc = %d, dflt CIS = %d)\n", conf.Vcc, dflt.vcc.param[CISTPL_POWER_VNOM] / 10000);
if(!ignore_cis_vcc)
goto next_entry;
}
if (essid->length) {
dwrq->flags = 1; /* set ESSID to ON for Wireless Extensions */
/* if it is to big, trunk it */
- dwrq->length = min(IW_ESSID_MAX_SIZE, essid->length + 1);
+ dwrq->length = min(IW_ESSID_MAX_SIZE, essid->length);
} else {
dwrq->flags = 0;
dwrq->length = 0;
#endif
newskb->dev = skb->dev;
- dev_kfree_skb(skb);
+ dev_kfree_skb_irq(skb);
skb = newskb;
}
}
extra[IW_ESSID_MAX_SIZE] = '\0';
/* Push it out ! */
- dwrq->length = strlen(extra) + 1;
+ dwrq->length = strlen(extra);
dwrq->flags = 1; /* active */
return 0;
extra[IW_ESSID_MAX_SIZE] = '\0';
/* Set the length */
- wrqu->data.length = strlen(extra) + 1;
+ wrqu->data.length = strlen(extra);
return 0;
}
static void irq_handler_init(int cap_id, int pos, int mask)
{
- spin_lock(&irq_desc[pos].lock);
+ unsigned long flags;
+
+ spin_lock_irqsave(&irq_desc[pos].lock, flags);
if (cap_id == PCI_CAP_ID_MSIX)
irq_desc[pos].handler = &msix_irq_type;
else {
else
irq_desc[pos].handler = &msi_irq_w_maskbit_type;
}
- spin_unlock(&irq_desc[pos].lock);
+ spin_unlock_irqrestore(&irq_desc[pos].lock, flags);
}
static void enable_msi_mode(struct pci_dev *dev, int pos, int type)
case 0x27c4:
ich = 7;
break;
+ case 0x2828: /* ICH8M */
+ ich = 8;
+ break;
default:
/* we do not handle this PCI device */
return;
else
return; /* not in combined mode */
} else {
- WARN_ON((ich != 6) && (ich != 7));
+ WARN_ON((ich != 6) && (ich != 7) && (ich != 8));
tmp &= 0x3; /* interesting bits 1:0 */
if (tmp & (1 << 0))
comb = (1 << 2); /* PATA port 0, SATA port 1 */
board_ahci }, /* ESB2 */
{ PCI_VENDOR_ID_INTEL, 0x27c6, PCI_ANY_ID, PCI_ANY_ID, 0, 0,
board_ahci }, /* ICH7-M DH */
+ { PCI_VENDOR_ID_INTEL, 0x2821, PCI_ANY_ID, PCI_ANY_ID, 0, 0,
+ board_ahci }, /* ICH8 */
+ { PCI_VENDOR_ID_INTEL, 0x2822, PCI_ANY_ID, PCI_ANY_ID, 0, 0,
+ board_ahci }, /* ICH8 */
+ { PCI_VENDOR_ID_INTEL, 0x2824, PCI_ANY_ID, PCI_ANY_ID, 0, 0,
+ board_ahci }, /* ICH8 */
+ { PCI_VENDOR_ID_INTEL, 0x2829, PCI_ANY_ID, PCI_ANY_ID, 0, 0,
+ board_ahci }, /* ICH8M */
+ { PCI_VENDOR_ID_INTEL, 0x282a, PCI_ANY_ID, PCI_ANY_ID, 0, 0,
+ board_ahci }, /* ICH8M */
{ } /* terminate list */
};
config AIC79XX_RESET_DELAY_MS
int "Initial bus reset delay in milli-seconds"
depends on SCSI_AIC79XX
- default "15000"
+ default "5000"
---help---
The number of milliseconds to delay after an initial bus reset.
The bus settle delay following all error recovery actions is
dictated by the SCSI layer and is not affected by this value.
- Default: 15000 (15 seconds)
+ Default: 5000 (5 seconds)
config AIC79XX_BUILD_FIRMWARE
bool "Build Adapter Firmware with Kernel Build"
* IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGES.
*
- * $Id: //depot/aic7xxx/aic7xxx/aic79xx.h#108 $
+ * $Id: //depot/aic7xxx/aic7xxx/aic79xx.h#109 $
*
* $FreeBSD$
*/
typedef enum {
AHD_FENONE = 0x00000,
AHD_WIDE = 0x00001,/* Wide Channel */
+ AHD_AIC79XXB_SLOWCRC = 0x00002,/* SLOWCRC bit should be set */
AHD_MULTI_FUNC = 0x00100,/* Multi-Function/Channel Device */
AHD_TARGETMODE = 0x01000,/* Has tested target mode support */
AHD_MULTIROLE = 0x02000,/* Space for two roles at a time */
/*
* Aic79xx register and scratch ram definitions.
*
- * Copyright (c) 1994-2001 Justin T. Gibbs.
+ * Copyright (c) 1994-2001, 2004 Justin T. Gibbs.
* Copyright (c) 2000-2002 Adaptec Inc.
* All rights reserved.
*
*
* $FreeBSD$
*/
-VERSION = "$Id: //depot/aic7xxx/aic7xxx/aic79xx.reg#76 $"
+VERSION = "$Id: //depot/aic7xxx/aic7xxx/aic79xx.reg#77 $"
/*
* This file is processed by the aic7xxx_asm utility for use in assembling
SEQ_FLAGS2 {
size 1
- field TARGET_MSG_PENDING 0x02
- field SELECTOUT_QFROZEN 0x04
+ field PENDING_MK_MESSAGE 0x01
+ field TARGET_MSG_PENDING 0x02
+ field SELECTOUT_QFROZEN 0x04
}
ALLOCFIFO_SCBPTR {
CMDSIZE_TABLE {
size 8
}
+ /*
+ * When an SCB with the MK_MESSAGE flag is
+ * queued to the controller, it cannot enter
+ * the waiting for selection list until the
+ * selections for any previously queued
+ * commands to that target complete. During
+ * the wait, the MK_MESSAGE SCB is queued
+ * here.
+ */
+ MK_MESSAGE_SCB {
+ size 2
+ }
+ /*
+ * Saved SCSIID of MK_MESSAGE_SCB to avoid
+ * an extra SCBPTR operation when deciding
+ * if the MK_MESSAGE_SCB can be run.
+ */
+ MK_MESSAGE_SCSIID {
+ size 1
+ }
}
/************************* Hardware SCB Definition ****************************/
/*
* Adaptec U320 device driver firmware for Linux and FreeBSD.
*
- * Copyright (c) 1994-2001 Justin T. Gibbs.
+ * Copyright (c) 1994-2001, 2004 Justin T. Gibbs.
* Copyright (c) 2000-2002 Adaptec Inc.
* All rights reserved.
*
* $FreeBSD$
*/
-VERSION = "$Id: //depot/aic7xxx/aic7xxx/aic79xx.seq#119 $"
+VERSION = "$Id: //depot/aic7xxx/aic7xxx/aic79xx.seq#120 $"
PATCH_ARG_LIST = "struct ahd_softc *ahd"
PREFIX = "ahd_"
* one last time.
*/
test SSTAT0, SELDO jnz select_out;
-END_CRITICAL;
call start_selection;
idle_loop_checkbus:
-BEGIN_CRITICAL;
test SSTAT0, SELDO jnz select_out;
END_CRITICAL;
test SSTAT0, SELDI jnz select_in;
test CCSCBCTL, ARRDONE jz return;
fetch_new_scb_done:
and CCSCBCTL, ~(CCARREN|CCSCBEN);
- bmov REG0, SCBPTR, 2;
clr A;
add CMDS_PENDING, 1;
adc CMDS_PENDING[1], A;
clr SCB_FIFO_USE_COUNT;
/* Update the next SCB address to download. */
bmov NEXT_QUEUED_SCB_ADDR, SCB_NEXT_SCB_BUSADDR, 4;
+ /*
+ * NULL out the SCB links since these fields
+ * occupy the same location as SCB_NEXT_SCB_BUSADDR.
+ */
mvi SCB_NEXT[1], SCB_LIST_NULL;
mvi SCB_NEXT2[1], SCB_LIST_NULL;
/* Increment our position in the QINFIFO. */
mov NONE, SNSCB_QOFF;
+
/*
- * SCBs that want to send messages are always
- * queued independently. This ensures that they
- * are at the head of the SCB list to select out
- * to a target and we will see the MK_MESSAGE flag.
+ * Save SCBID of this SCB in REG0 since
+ * SCBPTR will be clobbered during target
+ * list updates. We also record the SCB's
+ * flags so that we can refer to them even
+ * after SCBPTR has been changed.
+ */
+ bmov REG0, SCBPTR, 2;
+ mov A, SCB_CONTROL;
+
+ /*
+ * Find the tail SCB of the execution queue
+ * for this target.
*/
- test SCB_CONTROL, MK_MESSAGE jnz first_new_target_scb;
shr SINDEX, 3, SCB_SCSIID;
and SINDEX, ~0x1;
mvi SINDEX[1], (WAITING_SCB_TAILS >> 8);
bmov DINDEX, SINDEX, 2;
bmov SCBPTR, SINDIR, 2;
+
+ /*
+ * Update the tail to point to the new SCB.
+ */
bmov DINDIR, REG0, 2;
+
+ /*
+ * If the queue was empty, queue this SCB as
+ * the first for this target.
+ */
cmp SCBPTR[1], SCB_LIST_NULL je first_new_target_scb;
+
+ /*
+ * SCBs that want to send messages must always be
+ * at the head of their per-target queue so that
+ * ATN can be asserted even if the current
+ * negotiation agreement is packetized. If the
+ * target queue is empty, the SCB can be queued
+ * immediately. If the queue is not empty, we must
+ * wait for it to empty before entering this SCB
+ * into the waiting for selection queue. Otherwise
+ * our batching and round-robin selection scheme
+ * could allow commands to be queued out of order.
+ * To simplify the implementation, we stop pulling
+ * new commands from the host until the MK_MESSAGE
+ * SCB can be queued to the waiting for selection
+ * list.
+ */
+ test A, MK_MESSAGE jz batch_scb;
+
+ /*
+ * If the last SCB is also a MK_MESSAGE SCB, then
+ * order is preserved even if we batch.
+ */
+ test SCB_CONTROL, MK_MESSAGE jz batch_scb;
+
+ /*
+ * Defer this SCB and stop fetching new SCBs until
+ * it can be queued. Since the SCB_SCSIID of the
+ * tail SCB must be the same as that of the newly
+ * queued SCB, there is no need to restore the SCBID
+ * here.
+ */
+ or SEQ_FLAGS2, PENDING_MK_MESSAGE;
+ bmov MK_MESSAGE_SCB, REG0, 2;
+ mov MK_MESSAGE_SCSIID, SCB_SCSIID ret;
+
+batch_scb:
+ /*
+ * Otherwise just update the previous tail SCB to
+ * point to the new tail.
+ */
bmov SCB_NEXT, REG0, 2 ret;
+
first_new_target_scb:
+ /*
+ * Append SCB to the tail of the waiting for
+ * selection list.
+ */
cmp WAITING_TID_HEAD[1], SCB_LIST_NULL je first_new_scb;
bmov SCBPTR, WAITING_TID_TAIL, 2;
bmov SCB_NEXT2, REG0, 2;
bmov WAITING_TID_TAIL, REG0, 2 ret;
first_new_scb:
+ /*
+ * Whole list is empty, so the head of
+ * the list must be initialized too.
+ */
bmov WAITING_TID_HEAD, REG0, 2;
bmov WAITING_TID_TAIL, REG0, 2 ret;
END_CRITICAL;
scbdma_idle:
/*
- * Give precedence to downloading new SCBs to execute
- * unless select-outs are currently frozen.
+ * Don't bother downloading new SCBs to execute
+ * if select-outs are currently frozen or we have
+ * a MK_MESSAGE SCB waiting to enter the queue.
*/
- test SEQ_FLAGS2, SELECTOUT_QFROZEN jnz . + 2;
+ test SEQ_FLAGS2, SELECTOUT_QFROZEN|PENDING_MK_MESSAGE
+ jnz scbdma_no_new_scbs;
BEGIN_CRITICAL;
test QOFF_CTLSTA, NEW_SCB_AVAIL jnz fetch_new_scb;
+scbdma_no_new_scbs:
cmp COMPLETE_DMA_SCB_HEAD[1], SCB_LIST_NULL jne dma_complete_scb;
cmp COMPLETE_SCB_HEAD[1], SCB_LIST_NULL je return;
/* FALLTHROUGH */
}
/*
- * Requeue any SCBs not sent, to the tail of the waiting Q.
+ * The whole list made it. Clear our tail pointer to indicate
+ * that the per-target selection queue is now empty.
*/
- cmp SCB_NEXT[1], SCB_LIST_NULL je select_out_list_done;
+ cmp SCB_NEXT[1], SCB_LIST_NULL je select_out_clear_tail;
/*
+ * Requeue any SCBs not sent, to the tail of the waiting Q.
* We know that neither the per-TID list nor the list of
- * TIDs is empty. Use this knowledge to our advantage.
+ * TIDs is empty. Use this knowledge to our advantage and
+ * queue the remainder to the tail of the global execution
+ * queue.
*/
bmov REG0, SCB_NEXT, 2;
+select_out_queue_remainder:
bmov SCBPTR, WAITING_TID_TAIL, 2;
bmov SCB_NEXT2, REG0, 2;
bmov WAITING_TID_TAIL, REG0, 2;
jmp select_out_inc_tid_q;
-select_out_list_done:
+select_out_clear_tail:
+ /*
+ * Queue any pending MK_MESSAGE SCB for this target now
+ * that the queue is empty.
+ */
+ test SEQ_FLAGS2, PENDING_MK_MESSAGE jz select_out_no_mk_message_scb;
+ mov A, MK_MESSAGE_SCSIID;
+ cmp SCB_SCSIID, A jne select_out_no_mk_message_scb;
+ and SEQ_FLAGS2, ~PENDING_MK_MESSAGE;
+ bmov REG0, MK_MESSAGE_SCB, 2;
+ jmp select_out_queue_remainder;
+
+select_out_no_mk_message_scb:
/*
- * The whole list made it. Just clear our TID's tail pointer
- * unless we were queued independently due to our need to
- * send a message.
+ * Clear this target's execution tail and increment the queue.
*/
- test SCB_CONTROL, MK_MESSAGE jnz select_out_inc_tid_q;
shr DINDEX, 3, SCB_SCSIID;
or DINDEX, 1; /* Want only the second byte */
mvi DINDEX[1], ((WAITING_SCB_TAILS) >> 8);
mvi WAITING_TID_TAIL[1], SCB_LIST_NULL;
bmov SCBPTR, CURRSCB, 2;
mvi CLRSINT0, CLRSELDO;
- test LQOSTAT2, LQOPHACHGOUTPKT jnz unexpected_nonpkt_phase;
- test LQOSTAT1, LQOPHACHGINPKT jnz unexpected_nonpkt_phase;
+ test LQOSTAT2, LQOPHACHGOUTPKT jnz unexpected_nonpkt_mode_cleared;
+ test LQOSTAT1, LQOPHACHGINPKT jnz unexpected_nonpkt_mode_cleared;
/*
* If this is a packetized connection, return to our
mvi DFFSXFRCTL, CLRCHN;
unexpected_nonpkt_mode_cleared:
mvi CLRSINT2, CLRNONPACKREQ;
+ if ((ahd->bugs & AHD_BUSFREEREV_BUG) != 0) {
+ /*
+ * Test to ensure that the bus has not
+ * already gone free prior to clearing
+ * any stale busfree status. This avoids
+ * a window whereby a busfree just after
+ * a selection could be missed.
+ */
+ test SCSISIGI, BSYI jz . + 2;
+ mvi CLRSINT1,CLRBUSFREE;
+ or SIMODE1, ENBUSFREE;
+ }
test SCSIPHASE, ~(MSG_IN_PHASE|MSG_OUT_PHASE) jnz illegal_phase;
SET_SEQINTCODE(ENTERING_NONPACK)
jmp ITloop;
* IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGES.
*
- * $Id: //depot/aic7xxx/aic7xxx/aic79xx.c#247 $
+ * $Id: //depot/aic7xxx/aic7xxx/aic79xx.c#250 $
*/
#ifdef __linux__
char channel, int lun, u_int tag,
role_t role, uint32_t status,
ahd_search_action action,
- u_int *list_head, u_int tid);
+ u_int *list_head, u_int *list_tail,
+ u_int tid);
static void ahd_stitch_tid_list(struct ahd_softc *ahd,
u_int tid_prev, u_int tid_cur,
u_int tid_next);
* so just clear the error.
*/
ahd_outb(ahd, CLRLQIINT1, CLRLQICRCI_NLQ);
- } else if ((status & BUSFREE) != 0) {
+ } else if ((status & BUSFREE) != 0
+ || (lqistat1 & LQOBUSFREE) != 0) {
u_int lqostat1;
int restart;
int clear_fifo;
u_int waiting_t;
u_int next;
- if ((busfreetime & BUSFREE_LQO) == 0)
- printf("%s: Warning, BUSFREE time is 0x%x. "
- "Expected BUSFREE_LQO.\n",
- ahd_name(ahd), busfreetime);
/*
* The LQO manager detected an unexpected busfree
* either:
struct ahd_tmode_tstate *tstate;
/*
- * PPR Rejected. Try non-ppr negotiation
- * and retry command.
+ * PPR Rejected.
+ *
+ * If the previous negotiation was packetized,
+ * this could be because the device has been
+ * reset without our knowledge. Force our
+ * current negotiation to async and retry the
+ * negotiation. Otherwise retry the command
+ * with non-ppr negotiation.
*/
#ifdef AHD_DEBUG
if ((ahd_debug & AHD_SHOW_MESSAGES) != 0)
tinfo = ahd_fetch_transinfo(ahd, devinfo.channel,
devinfo.our_scsiid,
devinfo.target, &tstate);
- tinfo->curr.transport_version = 2;
- tinfo->goal.transport_version = 2;
- tinfo->goal.ppr_options = 0;
- ahd_qinfifo_requeue_tail(ahd, scb);
- printerror = 0;
+ if ((tinfo->curr.ppr_options & MSG_EXT_PPR_IU_REQ)!=0) {
+ ahd_set_width(ahd, &devinfo,
+ MSG_EXT_WDTR_BUS_8_BIT,
+ AHD_TRANS_CUR,
+ /*paused*/TRUE);
+ ahd_set_syncrate(ahd, &devinfo,
+ /*period*/0, /*offset*/0,
+ /*ppr_options*/0,
+ AHD_TRANS_CUR,
+ /*paused*/TRUE);
+ /*
+ * The expect PPR busfree handler below
+ * will effect the retry and necessary
+ * abort.
+ */
+ } else {
+ tinfo->curr.transport_version = 2;
+ tinfo->goal.transport_version = 2;
+ tinfo->goal.ppr_options = 0;
+ /*
+ * Remove any SCBs in the waiting for selection
+ * queue that may also be for this target so
+ * that command ordering is preserved.
+ */
+ ahd_freeze_devq(ahd, scb);
+ ahd_qinfifo_requeue_tail(ahd, scb);
+ printerror = 0;
+ }
} else if (ahd_sent_msg(ahd, AHDMSG_EXT, MSG_EXT_WDTR, FALSE)
&& ppr_busfree == 0) {
/*
MSG_EXT_WDTR_BUS_8_BIT,
AHD_TRANS_CUR|AHD_TRANS_GOAL,
/*paused*/TRUE);
+ /*
+ * Remove any SCBs in the waiting for selection
+ * queue that may also be for this target so that
+ * command ordering is preserved.
+ */
+ ahd_freeze_devq(ahd, scb);
ahd_qinfifo_requeue_tail(ahd, scb);
printerror = 0;
} else if (ahd_sent_msg(ahd, AHDMSG_EXT, MSG_EXT_SDTR, FALSE)
/*ppr_options*/0,
AHD_TRANS_CUR|AHD_TRANS_GOAL,
/*paused*/TRUE);
+ /*
+ * Remove any SCBs in the waiting for selection
+ * queue that may also be for this target so that
+ * command ordering is preserved.
+ */
+ ahd_freeze_devq(ahd, scb);
ahd_qinfifo_requeue_tail(ahd, scb);
printerror = 0;
} else if ((ahd->msg_flags & MSG_FLAG_EXPECT_IDE_BUSFREE) != 0
*/
printf("%s: ", ahd_name(ahd));
}
- if (lastphase != P_BUSFREE)
- ahd_force_renegotiation(ahd, &devinfo);
printf("Unexpected busfree %s, %d SCBs aborted, "
"PRGMCNT == 0x%x\n",
ahd_lookup_phase_entry(lastphase)->phasemsg,
aborted,
ahd_inw(ahd, PRGMCNT));
ahd_dump_card_state(ahd);
+ if (lastphase != P_BUSFREE)
+ ahd_force_renegotiation(ahd, &devinfo);
}
/* Always restart the sequencer. */
return (1);
if (tinfo->width == MSG_EXT_WDTR_BUS_16_BIT)
con_opts |= WIDEXFER;
+ /*
+ * Slow down our CRC interval to be
+ * compatible with packetized U320 devices
+ * that can't handle a CRC at full speed
+ */
+ if (ahd->features & AHD_AIC79XXB_SLOWCRC) {
+ con_opts |= ENSLOWCRC;
+ }
+
/*
* During packetized transfers, the target will
* give us the oportunity to send command packets
{
struct scb *pending_scb;
int pending_scb_count;
- u_int scb_tag;
int paused;
u_int saved_scbptr;
ahd_mode_state saved_modes;
pending_scb_count = 0;
LIST_FOREACH(pending_scb, &ahd->pending_scbs, pending_links) {
struct ahd_devinfo devinfo;
- struct hardware_scb *pending_hscb;
struct ahd_initiator_tinfo *tinfo;
struct ahd_tmode_tstate *tstate;
tinfo = ahd_fetch_transinfo(ahd, devinfo.channel,
devinfo.our_scsiid,
devinfo.target, &tstate);
- pending_hscb = pending_scb->hscb;
if ((tstate->auto_negotiate & devinfo.target_mask) == 0
&& (pending_scb->flags & SCB_AUTO_NEGOTIATE) != 0) {
pending_scb->flags &= ~SCB_AUTO_NEGOTIATE;
- pending_hscb->control &= ~MK_MESSAGE;
+ pending_scb->hscb->control &= ~MK_MESSAGE;
}
ahd_sync_scb(ahd, pending_scb,
BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
ahd_outb(ahd, SCSISEQ0, ahd_inb(ahd, SCSISEQ0) & ~ENSELO);
saved_scbptr = ahd_get_scbptr(ahd);
/* Ensure that the hscbs down on the card match the new information */
- for (scb_tag = 0; scb_tag < ahd->scb_data.maxhscbs; scb_tag++) {
- struct hardware_scb *pending_hscb;
+ LIST_FOREACH(pending_scb, &ahd->pending_scbs, pending_links) {
+ u_int scb_tag;
u_int control;
- pending_scb = ahd_lookup_scb(ahd, scb_tag);
- if (pending_scb == NULL)
- continue;
+ scb_tag = SCB_GET_TAG(pending_scb);
ahd_set_scbptr(ahd, scb_tag);
- pending_hscb = pending_scb->hscb;
control = ahd_inb_scbram(ahd, SCB_CONTROL);
control &= ~MK_MESSAGE;
- control |= pending_hscb->control & MK_MESSAGE;
+ control |= pending_scb->hscb->control & MK_MESSAGE;
ahd_outb(ahd, SCB_CONTROL, control);
}
ahd_set_scbptr(ahd, saved_scbptr);
| ENLQIOVERI_LQ|ENLQIOVERI_NLQ);
ahd_outb(ahd, LQOMODE0, ENLQOATNLQ|ENLQOATNPKT|ENLQOTCRC);
/*
- * An interrupt from LQOBUSFREE is made redundant by the
- * BUSFREE interrupt. We choose to have the sequencer catch
- * LQOPHCHGINPKT errors manually for the command phase at the
- * start of a packetized selection case.
- ahd_outb(ahd, LQOMODE1, ENLQOBUSFREE|ENLQOPHACHGINPKT);
+ * We choose to have the sequencer catch LQOPHCHGINPKT errors
+ * manually for the command phase at the start of a packetized
+ * selection case. ENLQOBUSFREE should be made redundant by
+ * the BUSFREE interrupt, but it seems that some LQOBUSFREE
+ * events fail to assert the BUSFREE interrupt so we must
+ * also enable LQOBUSFREE interrupts.
*/
- ahd_outb(ahd, LQOMODE1, 0);
+ ahd_outb(ahd, LQOMODE1, ENLQOBUSFREE);
/*
* Setup sequencer interrupt handlers.
/* We don't have any waiting selections */
ahd_outw(ahd, WAITING_TID_HEAD, SCB_LIST_NULL);
ahd_outw(ahd, WAITING_TID_TAIL, SCB_LIST_NULL);
+ ahd_outw(ahd, MK_MESSAGE_SCB, SCB_LIST_NULL);
+ ahd_outw(ahd, MK_MESSAGE_SCSIID, 0xFF);
for (i = 0; i < AHD_NUM_TARGETS; i++)
ahd_outw(ahd, WAITING_SCB_TAILS + (2 * i), SCB_LIST_NULL);
ahd_loadseq(ahd);
ahd_set_modes(ahd, AHD_MODE_SCSI, AHD_MODE_SCSI);
+
+ if (ahd->features & AHD_AIC79XXB_SLOWCRC) {
+ u_int negodat3 = ahd_inb(ahd, NEGCONOPTS);
+
+ negodat3 |= ENSLOWCRC;
+ ahd_outb(ahd, NEGCONOPTS, negodat3);
+ negodat3 = ahd_inb(ahd, NEGCONOPTS);
+ if (!(negodat3 & ENSLOWCRC))
+ printf("aic79xx: failed to set the SLOWCRC bit\n");
+ else
+ printf("aic79xx: SLOWCRC bit set\n");
+ }
}
/*
ahd->flags &= ~AHD_UPDATE_PEND_CMDS;
}
+void
+ahd_done_with_status(struct ahd_softc *ahd, struct scb *scb, uint32_t status)
+{
+ cam_status ostat;
+ cam_status cstat;
+
+ ostat = ahd_get_transaction_status(scb);
+ if (ostat == CAM_REQ_INPROG)
+ ahd_set_transaction_status(scb, status);
+ cstat = ahd_get_transaction_status(scb);
+ if (cstat != CAM_REQ_CMP)
+ ahd_freeze_scb(scb);
+ ahd_done(ahd, scb);
+}
+
int
ahd_search_qinfifo(struct ahd_softc *ahd, int target, char channel,
int lun, u_int tag, role_t role, uint32_t status,
ahd_search_action action)
{
struct scb *scb;
+ struct scb *mk_msg_scb;
struct scb *prev_scb;
ahd_mode_state saved_modes;
u_int qinstart;
u_int tid_next;
u_int tid_prev;
u_int scbid;
+ u_int seq_flags2;
u_int savedscbptr;
uint32_t busaddr;
int found;
found++;
switch (action) {
case SEARCH_COMPLETE:
- {
- cam_status ostat;
- cam_status cstat;
-
- ostat = ahd_get_transaction_status(scb);
- if (ostat == CAM_REQ_INPROG)
- ahd_set_transaction_status(scb,
- status);
- cstat = ahd_get_transaction_status(scb);
- if (cstat != CAM_REQ_CMP)
- ahd_freeze_scb(scb);
if ((scb->flags & SCB_ACTIVE) == 0)
printf("Inactive SCB in qinfifo\n");
- ahd_done(ahd, scb);
-
+ ahd_done_with_status(ahd, scb, status);
/* FALLTHROUGH */
- }
case SEARCH_REMOVE:
break;
case SEARCH_PRINT:
* looking for matches.
*/
ahd_set_modes(ahd, AHD_MODE_SCSI, AHD_MODE_SCSI);
+ seq_flags2 = ahd_inb(ahd, SEQ_FLAGS2);
+ if ((seq_flags2 & PENDING_MK_MESSAGE) != 0) {
+ scbid = ahd_inw(ahd, MK_MESSAGE_SCB);
+ mk_msg_scb = ahd_lookup_scb(ahd, scbid);
+ } else
+ mk_msg_scb = NULL;
savedscbptr = ahd_get_scbptr(ahd);
tid_next = ahd_inw(ahd, WAITING_TID_HEAD);
tid_prev = SCB_LIST_NULL;
targets = 0;
for (scbid = tid_next; !SCBID_IS_NULL(scbid); scbid = tid_next) {
u_int tid_head;
+ u_int tid_tail;
- /*
- * We limit based on the number of SCBs since
- * MK_MESSAGE SCBs are not in the per-tid lists.
- */
targets++;
- if (targets > AHD_SCB_MAX) {
+ if (targets > AHD_NUM_TARGETS)
panic("TID LIST LOOP");
- }
+
if (scbid >= ahd->scb_data.numscbs) {
printf("%s: Waiting TID List inconsistency. "
"SCB index == 0x%x, yet numscbs == 0x%x.",
tid_head = scbid;
found += ahd_search_scb_list(ahd, target, channel,
lun, tag, role, status,
- action, &tid_head,
+ action, &tid_head, &tid_tail,
SCB_GET_TARGET(ahd, scb));
+ /*
+ * Check any MK_MESSAGE SCB that is still waiting to
+ * enter this target's waiting for selection queue.
+ */
+ if (mk_msg_scb != NULL
+ && ahd_match_scb(ahd, mk_msg_scb, target, channel,
+ lun, tag, role)) {
+
+ /*
+ * We found an scb that needs to be acted on.
+ */
+ found++;
+ switch (action) {
+ case SEARCH_COMPLETE:
+ if ((mk_msg_scb->flags & SCB_ACTIVE) == 0)
+ printf("Inactive SCB pending MK_MSG\n");
+ ahd_done_with_status(ahd, mk_msg_scb, status);
+ /* FALLTHROUGH */
+ case SEARCH_REMOVE:
+ {
+ u_int tail_offset;
+
+ printf("Removing MK_MSG scb\n");
+
+ /*
+ * Reset our tail to the tail of the
+ * main per-target list.
+ */
+ tail_offset = WAITING_SCB_TAILS
+ + (2 * SCB_GET_TARGET(ahd, mk_msg_scb));
+ ahd_outw(ahd, tail_offset, tid_tail);
+
+ seq_flags2 &= ~PENDING_MK_MESSAGE;
+ ahd_outb(ahd, SEQ_FLAGS2, seq_flags2);
+ ahd_outw(ahd, CMDS_PENDING,
+ ahd_inw(ahd, CMDS_PENDING)-1);
+ mk_msg_scb = NULL;
+ break;
+ }
+ case SEARCH_PRINT:
+ printf(" 0x%x", SCB_GET_TAG(scb));
+ /* FALLTHROUGH */
+ case SEARCH_COUNT:
+ break;
+ }
+ }
+
+ if (mk_msg_scb != NULL
+ && SCBID_IS_NULL(tid_head)
+ && ahd_match_scb(ahd, scb, target, channel, CAM_LUN_WILDCARD,
+ SCB_LIST_NULL, ROLE_UNKNOWN)) {
+
+ /*
+ * When removing the last SCB for a target
+ * queue with a pending MK_MESSAGE scb, we
+ * must queue the MK_MESSAGE scb.
+ */
+ printf("Queueing mk_msg_scb\n");
+ tid_head = ahd_inw(ahd, MK_MESSAGE_SCB);
+ seq_flags2 &= ~PENDING_MK_MESSAGE;
+ ahd_outb(ahd, SEQ_FLAGS2, seq_flags2);
+ mk_msg_scb = NULL;
+ }
if (tid_head != scbid)
ahd_stitch_tid_list(ahd, tid_prev, tid_head, tid_next);
if (!SCBID_IS_NULL(tid_head))
if (action == SEARCH_PRINT)
printf(")\n");
}
+
+ /* Restore saved state. */
ahd_set_scbptr(ahd, savedscbptr);
ahd_restore_modes(ahd, saved_modes);
return (found);
static int
ahd_search_scb_list(struct ahd_softc *ahd, int target, char channel,
int lun, u_int tag, role_t role, uint32_t status,
- ahd_search_action action, u_int *list_head, u_int tid)
+ ahd_search_action action, u_int *list_head,
+ u_int *list_tail, u_int tid)
{
struct scb *scb;
u_int scbid;
found = 0;
prev = SCB_LIST_NULL;
next = *list_head;
+ *list_tail = SCB_LIST_NULL;
for (scbid = next; !SCBID_IS_NULL(scbid); scbid = next) {
if (scbid >= ahd->scb_data.numscbs) {
printf("%s:SCB List inconsistency. "
panic("Waiting List traversal\n");
}
ahd_set_scbptr(ahd, scbid);
+ *list_tail = scbid;
next = ahd_inw_scbram(ahd, SCB_NEXT);
if (ahd_match_scb(ahd, scb, target, channel,
lun, SCB_LIST_NULL, role) == 0) {
found++;
switch (action) {
case SEARCH_COMPLETE:
- {
- cam_status ostat;
- cam_status cstat;
-
- ostat = ahd_get_transaction_status(scb);
- if (ostat == CAM_REQ_INPROG)
- ahd_set_transaction_status(scb, status);
- cstat = ahd_get_transaction_status(scb);
- if (cstat != CAM_REQ_CMP)
- ahd_freeze_scb(scb);
if ((scb->flags & SCB_ACTIVE) == 0)
printf("Inactive SCB in Waiting List\n");
- ahd_done(ahd, scb);
+ ahd_done_with_status(ahd, scb, status);
/* FALLTHROUGH */
- }
case SEARCH_REMOVE:
ahd_rem_wscb(ahd, scbid, prev, next, tid);
- if (prev == SCB_LIST_NULL)
+ *list_tail = prev;
+ if (SCBID_IS_NULL(prev))
*list_head = next;
break;
case SEARCH_PRINT:
}
/*
- * SCBs that had MK_MESSAGE set in them will not
- * be queued to the per-target lists, so don't
- * blindly clear the tail pointer.
+ * SCBs that have MK_MESSAGE set in them may
+ * cause the tail pointer to be updated without
+ * setting the next pointer of the previous tail.
+ * Only clear the tail if the removed SCB was
+ * the tail.
*/
tail_offset = WAITING_SCB_TAILS + (2 * tid);
if (SCBID_IS_NULL(next)
&& ahd_inw(ahd, tail_offset) == scbid)
ahd_outw(ahd, tail_offset, prev);
+
ahd_add_scb_to_free_list(ahd, scbid);
return (next);
}
ahd_setup_data_scb(ahd, scb);
scb->flags |= SCB_SENSE;
ahd_queue_scb(ahd, scb);
- /*
- * Ensure we have enough time to actually
- * retrieve the sense.
- */
- ahd_scb_timer_reset(scb, 5 * 1000000);
break;
}
case SCSI_STATUS_OK:
* Mode independent registers.
*/
cur_col = 0;
+ ahd_intstat_print(ahd_inb(ahd, INTSTAT), &cur_col, 50);
+ ahd_seloid_print(ahd_inb(ahd, SELOID), &cur_col, 50);
+ ahd_selid_print(ahd_inb(ahd, SELID), &cur_col, 50);
ahd_hs_mailbox_print(ahd_inb(ahd, LOCAL_HS_MAILBOX), &cur_col, 50);
ahd_intctl_print(ahd_inb(ahd, INTCTL), &cur_col, 50);
ahd_seqintstat_print(ahd_inb(ahd, SEQINTSTAT), &cur_col, 50);
ahd_seqintctl_print(ahd_inb(ahd, SEQINTCTL), &cur_col, 50);
ahd_seq_flags_print(ahd_inb(ahd, SEQ_FLAGS), &cur_col, 50);
ahd_seq_flags2_print(ahd_inb(ahd, SEQ_FLAGS2), &cur_col, 50);
+ ahd_qfreeze_count_print(ahd_inw(ahd, QFREEZE_COUNT), &cur_col, 50);
+ ahd_kernel_qfreeze_count_print(ahd_inw(ahd, KERNEL_QFREEZE_COUNT),
+ &cur_col, 50);
+ ahd_mk_message_scb_print(ahd_inw(ahd, MK_MESSAGE_SCB), &cur_col, 50);
+ ahd_mk_message_scsiid_print(ahd_inb(ahd, MK_MESSAGE_SCSIID),
+ &cur_col, 50);
ahd_sstat0_print(ahd_inb(ahd, SSTAT0), &cur_col, 50);
ahd_sstat1_print(ahd_inb(ahd, SSTAT1), &cur_col, 50);
ahd_sstat2_print(ahd_inb(ahd, SSTAT2), &cur_col, 50);
ahd_set_modes(ahd, AHD_MODE_DFF0 + i, AHD_MODE_DFF0 + i);
fifo_scbptr = ahd_get_scbptr(ahd);
- printf("\n%s: FIFO%d %s, LONGJMP == 0x%x, SCB 0x%x\n",
+ printf("\n\n%s: FIFO%d %s, LONGJMP == 0x%x, SCB 0x%x\n",
ahd_name(ahd), i,
(dffstat & (FIFO0FREE << i)) ? "Free" : "Active",
ahd_inw(ahd, LONGJMP_ADDR), fifo_scbptr);
printf("%s: OS_SPACE_CNT = 0x%x MAXCMDCNT = 0x%x\n",
ahd_name(ahd), ahd_inb(ahd, OS_SPACE_CNT),
ahd_inb(ahd, MAXCMDCNT));
+ printf("%s: SAVED_SCSIID = 0x%x SAVED_LUN = 0x%x\n",
+ ahd_name(ahd), ahd_inb(ahd, SAVED_SCSIID),
+ ahd_inb(ahd, SAVED_LUN));
ahd_simode0_print(ahd_inb(ahd, SIMODE0), &cur_col, 50);
printf("\n");
ahd_set_modes(ahd, AHD_MODE_CCHAN, AHD_MODE_CCHAN);
* IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGES.
*
- * $Id: //depot/aic7xxx/aic7xxx/aic79xx_inline.h#58 $
+ * $Id: //depot/aic7xxx/aic7xxx/aic79xx_inline.h#59 $
*
* $FreeBSD$
*/
uint64_t host_dataptr;
host_dataptr = ahd_le64toh(scb->hscb->dataptr);
- printf("%s: Queueing SCB 0x%x bus addr 0x%x - 0x%x%x/0x%x\n",
+ printf("%s: Queueing SCB %d:0x%x bus addr 0x%x - 0x%x%x/0x%x\n",
ahd_name(ahd),
- SCB_GET_TAG(scb), ahd_le32toh(scb->hscb->hscb_busaddr),
+ SCB_GET_TAG(scb), scb->hscb->scsiid,
+ ahd_le32toh(scb->hscb->hscb_busaddr),
(u_int)((host_dataptr >> 32) & 0xFFFFFFFF),
(u_int)(host_dataptr & 0xFFFFFFFF),
ahd_le32toh(scb->hscb->datacnt));
*/
uint32_t aic79xx_periodic_otag;
+/* Some storage boxes are using an LSI chip which has a bug making it
+ * impossible to use aic79xx Rev B chip in 320 speeds. The following
+ * storage boxes have been reported to be buggy:
+ * EonStor 3U 16-Bay: U16U-G3A3
+ * EonStor 2U 12-Bay: U12U-G3A3
+ * SentinelRAID: 2500F R5 / R6
+ * SentinelRAID: 2500F R1
+ * SentinelRAID: 2500F/1500F
+ * SentinelRAID: 150F
+ *
+ * To get around this LSI bug, you can set your board to 160 mode
+ * or you can enable the SLOWCRC bit.
+ */
+uint32_t aic79xx_slowcrc;
+
/*
* Module information and settable options.
*/
" amplitude:<int> Set the signal amplitude (0-7).\n"
" seltime:<int> Selection Timeout:\n"
" (0/256ms,1/128ms,2/64ms,3/32ms)\n"
+" slowcrc Turn on the SLOWCRC bit (Rev B only)\n"
"\n"
" Sample /etc/modprobe.conf line:\n"
" Enable verbose logging\n"
{ "slewrate", NULL },
{ "precomp", NULL },
{ "amplitude", NULL },
+ { "slowcrc", &aic79xx_slowcrc },
};
end = strchr(s, '\0');
return (ENOMEM);
*((struct ahd_softc **)host->hostdata) = ahd;
- ahd_lock(ahd, &s);
ahd->platform_data->host = host;
host->can_queue = AHD_MAX_QUEUE;
host->cmd_per_lun = 2;
host->max_lun = AHD_NUM_LUNS;
host->max_channel = 0;
host->sg_tablesize = AHD_NSEG;
+ ahd_lock(ahd, &s);
ahd_set_unit(ahd, ahd_linux_unit++);
+ ahd_unlock(ahd, &s);
sprintf(buf, "scsi%d", host->host_no);
new_name = malloc(strlen(buf) + 1, M_DEVBUF, M_NOWAIT);
if (new_name != NULL) {
host->unique_id = ahd->unit;
ahd_linux_initialize_scsi_bus(ahd);
ahd_intr_enable(ahd, TRUE);
- ahd_unlock(ahd, &s);
host->transportt = ahd_linux_transport_template;
{
u_int target_id;
u_int numtarg;
+ unsigned long s;
target_id = 0;
numtarg = 0;
else
numtarg = (ahd->features & AHD_WIDE) ? 16 : 8;
+ ahd_lock(ahd, &s);
+
/*
* Force negotiation to async for all targets that
* will not see an initial bus reset.
ahd_update_neg_request(ahd, &devinfo, tstate,
tinfo, AHD_NEG_ALWAYS);
}
+ ahd_unlock(ahd, &s);
/* Give the bus some time to recover */
if ((ahd->flags & AHD_RESET_BUS_A) != 0) {
ahd_freeze_simq(ahd);
- init_timer(&ahd->platform_data->reset_timer);
- ahd->platform_data->reset_timer.data = (u_long)ahd;
- ahd->platform_data->reset_timer.expires =
- jiffies + (AIC79XX_RESET_DELAY * HZ)/1000;
- ahd->platform_data->reset_timer.function =
- (ahd_linux_callback_t *)ahd_release_simq;
- add_timer(&ahd->platform_data->reset_timer);
+ msleep(AIC79XX_RESET_DELAY);
+ ahd_release_simq(ahd);
}
}
void
ahd_freeze_simq(struct ahd_softc *ahd)
{
+ unsigned long s;
+
+ ahd_lock(ahd, &s);
ahd->platform_data->qfrozen++;
if (ahd->platform_data->qfrozen == 1) {
scsi_block_requests(ahd->platform_data->host);
CAM_LUN_WILDCARD, SCB_LIST_NULL,
ROLE_INITIATOR, CAM_REQUEUE_REQ);
}
+ ahd_unlock(ahd, &s);
}
void
ahd_name(ahd), dev->active);
retval = FAILED;
}
- }
- ahd_unlock(ahd, &flags);
+ } else
+ ahd_unlock(ahd, &flags);
+
return (retval);
}
* IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGES.
*
- * $Id: //depot/aic7xxx/linux/drivers/scsi/aic7xxx/aic79xx_osm.h#137 $
+ * $Id: //depot/aic7xxx/linux/drivers/scsi/aic7xxx/aic79xx_osm.h#166 $
*
*/
#ifndef _AIC79XX_LINUX_H_
typedef void ahd_linux_callback_t (u_long);
static __inline void ahd_timer_reset(ahd_timer_t *timer, int usec,
ahd_callback_t *func, void *arg);
-static __inline void ahd_scb_timer_reset(struct scb *scb, u_int usec);
static __inline void
ahd_timer_reset(ahd_timer_t *timer, int usec, ahd_callback_t *func, void *arg)
add_timer(timer);
}
-static __inline void
-ahd_scb_timer_reset(struct scb *scb, u_int usec)
-{
- mod_timer(&scb->io_ctx->eh_timeout, jiffies + (usec * HZ)/1000000);
-}
-
/***************************** SMP support ************************************/
#include <linux/spinlock.h>
spinlock_t spin_lock;
u_int qfrozen;
- struct timer_list reset_timer;
struct semaphore eh_sem;
struct Scsi_Host *host; /* pointer to scsi host */
#define AHD_LINUX_NOIRQ ((uint32_t)~0)
*base2 = pci_resource_start(ahd->dev_softc, 3);
if (*base == 0 || *base2 == 0)
return (ENOMEM);
- if (request_region(*base, 256, "aic79xx") == 0)
+ if (!request_region(*base, 256, "aic79xx"))
return (ENOMEM);
- if (request_region(*base2, 256, "aic79xx") == 0) {
- release_region(*base2, 256);
+ if (!request_region(*base2, 256, "aic79xx")) {
+ release_region(*base, 256);
return (ENOMEM);
}
return (0);
u_long start;
u_long base_page;
u_long base_offset;
- int error;
+ int error = 0;
if (aic79xx_allow_memio == 0)
return (ENOMEM);
if ((ahd->bugs & AHD_PCIX_MMAPIO_BUG) != 0)
return (ENOMEM);
- error = 0;
start = pci_resource_start(ahd->dev_softc, 1);
base_page = start & PAGE_MASK;
base_offset = start - base_page;
if (start != 0) {
*bus_addr = start;
- if (request_mem_region(start, 0x1000, "aic79xx") == 0)
+ if (!request_mem_region(start, 0x1000, "aic79xx"))
error = ENOMEM;
- if (error == 0) {
- *maddr = ioremap_nocache(base_page, base_offset + 256);
+ if (!error) {
+ *maddr = ioremap_nocache(base_page, base_offset + 512);
if (*maddr == NULL) {
error = ENOMEM;
release_mem_region(start, 0x1000);
error = request_irq(ahd->dev_softc->irq, ahd_linux_isr,
SA_SHIRQ, "aic79xx", ahd);
- if (error == 0)
+ if (!error)
ahd->platform_data->irq = ahd->dev_softc->irq;
return (-error);
* IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGES.
*
- * $Id: //depot/aic7xxx/aic7xxx/aic79xx_pci.c#89 $
+ * $Id: //depot/aic7xxx/aic7xxx/aic79xx_pci.c#92 $
*/
#ifdef __linux__
if ((ahd->flags & AHD_HP_BOARD) == 0)
AHD_SET_SLEWRATE(ahd, AHD_SLEWRATE_DEF_REVA);
} else {
+ /* This is revision B and newer. */
+ extern uint32_t aic79xx_slowcrc;
u_int devconfig1;
ahd->features |= AHD_RTI|AHD_NEW_IOCELL_OPTS
- | AHD_NEW_DFCNTRL_OPTS|AHD_FAST_CDB_DELIVERY;
+ | AHD_NEW_DFCNTRL_OPTS|AHD_FAST_CDB_DELIVERY
+ | AHD_BUSFREEREV_BUG;
ahd->bugs |= AHD_LQOOVERRUN_BUG|AHD_EARLY_REQ_BUG;
+ /* If the user requested the the SLOWCRC bit to be set. */
+ if (aic79xx_slowcrc)
+ ahd->features |= AHD_AIC79XXB_SLOWCRC;
+
/*
* Some issues have been resolved in the 7901B.
*/
* DO NOT EDIT - This file is automatically generated
* from the following source files:
*
- * $Id: //depot/aic7xxx/aic7xxx/aic79xx.seq#119 $
- * $Id: //depot/aic7xxx/aic7xxx/aic79xx.reg#76 $
+ * $Id: //depot/aic7xxx/aic7xxx/aic79xx.seq#120 $
+ * $Id: //depot/aic7xxx/aic7xxx/aic79xx.reg#77 $
*/
typedef int (ahd_reg_print_t)(u_int, u_int *, u_int);
typedef struct ahd_reg_parse_entry {
ahd_print_register(NULL, 0, "CMDSIZE_TABLE", 0x158, regvalue, cur_col, wrap)
#endif
+#if AIC_DEBUG_REGISTERS
+ahd_reg_print_t ahd_mk_message_scb_print;
+#else
+#define ahd_mk_message_scb_print(regvalue, cur_col, wrap) \
+ ahd_print_register(NULL, 0, "MK_MESSAGE_SCB", 0x160, regvalue, cur_col, wrap)
+#endif
+
+#if AIC_DEBUG_REGISTERS
+ahd_reg_print_t ahd_mk_message_scsiid_print;
+#else
+#define ahd_mk_message_scsiid_print(regvalue, cur_col, wrap) \
+ ahd_print_register(NULL, 0, "MK_MESSAGE_SCSIID", 0x162, regvalue, cur_col, wrap)
+#endif
+
#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_scb_base_print;
#else
#define SEQ_FLAGS2 0x14d
#define SELECTOUT_QFROZEN 0x04
#define TARGET_MSG_PENDING 0x02
+#define PENDING_MK_MESSAGE 0x01
#define ALLOCFIFO_SCBPTR 0x14e
#define CMDSIZE_TABLE 0x158
+#define MK_MESSAGE_SCB 0x160
+
+#define MK_MESSAGE_SCSIID 0x162
+
#define SCB_BASE 0x180
#define SCB_RESIDUAL_DATACNT 0x180
/* Exported Labels */
-#define LABEL_seq_isr 0x285
-#define LABEL_timer_isr 0x281
+#define LABEL_seq_isr 0x28f
+#define LABEL_timer_isr 0x28b
* DO NOT EDIT - This file is automatically generated
* from the following source files:
*
- * $Id: //depot/aic7xxx/aic7xxx/aic79xx.seq#118 $
- * $Id: //depot/aic7xxx/aic7xxx/aic79xx.reg#75 $
+ * $Id: //depot/aic7xxx/aic7xxx/aic79xx.seq#120 $
+ * $Id: //depot/aic7xxx/aic7xxx/aic79xx.reg#77 $
*/
#include "aic79xx_osm.h"
}
static ahd_reg_parse_entry_t SEQ_FLAGS2_parse_table[] = {
+ { "PENDING_MK_MESSAGE", 0x01, 0x01 },
{ "TARGET_MSG_PENDING", 0x02, 0x02 },
{ "SELECTOUT_QFROZEN", 0x04, 0x04 }
};
int
ahd_seq_flags2_print(u_int regvalue, u_int *cur_col, u_int wrap)
{
- return (ahd_print_register(SEQ_FLAGS2_parse_table, 2, "SEQ_FLAGS2",
+ return (ahd_print_register(SEQ_FLAGS2_parse_table, 3, "SEQ_FLAGS2",
0x14d, regvalue, cur_col, wrap));
}
0x158, regvalue, cur_col, wrap));
}
+int
+ahd_mk_message_scb_print(u_int regvalue, u_int *cur_col, u_int wrap)
+{
+ return (ahd_print_register(NULL, 0, "MK_MESSAGE_SCB",
+ 0x160, regvalue, cur_col, wrap));
+}
+
+int
+ahd_mk_message_scsiid_print(u_int regvalue, u_int *cur_col, u_int wrap)
+{
+ return (ahd_print_register(NULL, 0, "MK_MESSAGE_SCSIID",
+ 0x162, regvalue, cur_col, wrap));
+}
+
int
ahd_scb_base_print(u_int regvalue, u_int *cur_col, u_int wrap)
{
* DO NOT EDIT - This file is automatically generated
* from the following source files:
*
- * $Id: //depot/aic7xxx/aic7xxx/aic79xx.seq#119 $
- * $Id: //depot/aic7xxx/aic7xxx/aic79xx.reg#76 $
+ * $Id: //depot/aic7xxx/aic7xxx/aic79xx.seq#120 $
+ * $Id: //depot/aic7xxx/aic7xxx/aic79xx.reg#77 $
*/
static uint8_t seqprog[] = {
0xff, 0x02, 0x06, 0x78,
- 0x00, 0xea, 0x64, 0x59,
+ 0x00, 0xea, 0x6e, 0x59,
0x01, 0xea, 0x04, 0x30,
0xff, 0x04, 0x0c, 0x78,
- 0x19, 0xea, 0x64, 0x59,
+ 0x19, 0xea, 0x6e, 0x59,
0x19, 0xea, 0x04, 0x00,
- 0x33, 0xea, 0x5e, 0x59,
+ 0x33, 0xea, 0x68, 0x59,
0x33, 0xea, 0x00, 0x00,
0x60, 0x3a, 0x3a, 0x68,
0x04, 0x4d, 0x35, 0x78,
0xff, 0xea, 0x62, 0x02,
0x00, 0xe2, 0x3a, 0x40,
0xff, 0x21, 0x3b, 0x70,
- 0x40, 0x4b, 0xaa, 0x69,
- 0x00, 0xe2, 0x68, 0x59,
- 0x40, 0x4b, 0xaa, 0x69,
- 0x20, 0x4b, 0x96, 0x69,
+ 0x40, 0x4b, 0xb4, 0x69,
+ 0x00, 0xe2, 0x72, 0x59,
+ 0x40, 0x4b, 0xb4, 0x69,
+ 0x20, 0x4b, 0xa0, 0x69,
0xfc, 0x42, 0x44, 0x78,
0x10, 0x40, 0x44, 0x78,
- 0x00, 0xe2, 0xfc, 0x5d,
+ 0x00, 0xe2, 0x10, 0x5e,
0x20, 0x4d, 0x48, 0x78,
- 0x00, 0xe2, 0xfc, 0x5d,
+ 0x00, 0xe2, 0x10, 0x5e,
0x30, 0x3f, 0xc0, 0x09,
0x30, 0xe0, 0x50, 0x60,
0x7f, 0x4a, 0x94, 0x08,
0x00, 0xe2, 0x76, 0x58,
0x00, 0xe2, 0x86, 0x58,
0x00, 0xe2, 0x06, 0x40,
- 0x33, 0xea, 0x5e, 0x59,
+ 0x33, 0xea, 0x68, 0x59,
0x33, 0xea, 0x00, 0x00,
0x01, 0x52, 0x84, 0x78,
0x02, 0x58, 0x50, 0x31,
0xff, 0x97, 0x6f, 0x78,
0x50, 0x4b, 0x6a, 0x68,
0xbf, 0x3a, 0x74, 0x08,
- 0x14, 0xea, 0x64, 0x59,
+ 0x14, 0xea, 0x6e, 0x59,
0x14, 0xea, 0x04, 0x00,
0x08, 0x92, 0x25, 0x03,
0xff, 0x90, 0x5f, 0x68,
- 0x00, 0xe2, 0x76, 0x5b,
+ 0x00, 0xe2, 0x8a, 0x5b,
0x00, 0xe2, 0x5e, 0x40,
- 0x00, 0xea, 0x5e, 0x59,
+ 0x00, 0xea, 0x68, 0x59,
0x01, 0xea, 0x00, 0x30,
0x80, 0xf9, 0x7e, 0x68,
- 0x00, 0xe2, 0x5c, 0x59,
- 0x11, 0xea, 0x5e, 0x59,
+ 0x00, 0xe2, 0x66, 0x59,
+ 0x11, 0xea, 0x68, 0x59,
0x11, 0xea, 0x00, 0x00,
- 0x80, 0xf9, 0x5c, 0x79,
+ 0x80, 0xf9, 0x66, 0x79,
0xff, 0xea, 0xd4, 0x0d,
- 0x22, 0xea, 0x5e, 0x59,
+ 0x22, 0xea, 0x68, 0x59,
0x22, 0xea, 0x00, 0x00,
0x10, 0x16, 0x90, 0x78,
0x10, 0x16, 0x2c, 0x00,
0x01, 0x0b, 0xae, 0x32,
- 0x18, 0xad, 0x12, 0x79,
+ 0x18, 0xad, 0x1c, 0x79,
0x04, 0xad, 0xdc, 0x68,
0x80, 0xad, 0x84, 0x78,
0x10, 0xad, 0xaa, 0x78,
0x80, 0x18, 0x30, 0x04,
0x40, 0xad, 0x84, 0x78,
0xe7, 0xad, 0x5a, 0x09,
- 0x02, 0xa8, 0x40, 0x31,
0xff, 0xea, 0xc0, 0x09,
0x01, 0x54, 0xa9, 0x1a,
0x00, 0x55, 0xab, 0x22,
0xff, 0xea, 0x5a, 0x03,
0xff, 0xea, 0x5e, 0x03,
0x01, 0x10, 0xd4, 0x31,
- 0x10, 0x92, 0x07, 0x69,
+ 0x02, 0xa8, 0x40, 0x31,
+ 0x01, 0x92, 0xc1, 0x31,
0x3d, 0x93, 0xc5, 0x29,
0xfe, 0xe2, 0xc4, 0x09,
0x01, 0xea, 0xc6, 0x01,
0x02, 0xe2, 0xc8, 0x31,
0x02, 0xec, 0x50, 0x31,
0x02, 0xa0, 0xda, 0x31,
- 0xff, 0xa9, 0x06, 0x71,
+ 0xff, 0xa9, 0x10, 0x71,
+ 0x10, 0xe0, 0x0e, 0x79,
+ 0x10, 0x92, 0x0f, 0x79,
+ 0x01, 0x4d, 0x9b, 0x02,
+ 0x02, 0xa0, 0xc0, 0x32,
+ 0x01, 0x93, 0xc5, 0x36,
0x02, 0xa0, 0x58, 0x37,
- 0xff, 0x21, 0x0f, 0x71,
+ 0xff, 0x21, 0x19, 0x71,
0x02, 0x22, 0x51, 0x31,
0x02, 0xa0, 0x5c, 0x33,
0x02, 0xa0, 0x44, 0x36,
0x02, 0xa0, 0x40, 0x32,
0x02, 0xa0, 0x44, 0x36,
- 0x04, 0x4d, 0x17, 0x69,
- 0x40, 0x16, 0x48, 0x69,
- 0xff, 0x2d, 0x4d, 0x61,
+ 0x05, 0x4d, 0x21, 0x69,
+ 0x40, 0x16, 0x52, 0x69,
+ 0xff, 0x2d, 0x57, 0x61,
0xff, 0x29, 0x85, 0x70,
0x02, 0x28, 0x55, 0x32,
0x01, 0xea, 0x5a, 0x01,
0x01, 0x56, 0xad, 0x1a,
0xff, 0x54, 0xa9, 0x1a,
0xff, 0x55, 0xab, 0x22,
- 0xff, 0x8d, 0x41, 0x71,
- 0x80, 0xac, 0x40, 0x71,
- 0x20, 0x16, 0x40, 0x69,
+ 0xff, 0x8d, 0x4b, 0x71,
+ 0x80, 0xac, 0x4a, 0x71,
+ 0x20, 0x16, 0x4a, 0x69,
0x00, 0xac, 0xc4, 0x19,
- 0x07, 0xe2, 0x40, 0xf9,
+ 0x07, 0xe2, 0x4a, 0xf9,
0x02, 0x8c, 0x51, 0x31,
- 0x00, 0xe2, 0x24, 0x41,
+ 0x00, 0xe2, 0x2e, 0x41,
0x01, 0xac, 0x08, 0x31,
0x09, 0xea, 0x5a, 0x01,
0x02, 0x8c, 0x51, 0x32,
0xff, 0xea, 0x1a, 0x07,
0x04, 0x24, 0xf9, 0x30,
- 0x1d, 0xea, 0x52, 0x41,
+ 0x1d, 0xea, 0x5c, 0x41,
0x02, 0x2c, 0x51, 0x31,
0x04, 0xa8, 0xf9, 0x30,
- 0x19, 0xea, 0x52, 0x41,
+ 0x19, 0xea, 0x5c, 0x41,
0x06, 0xea, 0x08, 0x81,
0x01, 0xe2, 0x5a, 0x35,
0x02, 0xf2, 0xf0, 0x31,
0x02, 0x20, 0xb9, 0x30,
0x02, 0x20, 0x51, 0x31,
0x4c, 0x93, 0xd7, 0x28,
- 0x10, 0x92, 0x77, 0x79,
+ 0x10, 0x92, 0x81, 0x79,
0x01, 0x6b, 0xc0, 0x30,
0x02, 0x64, 0xc8, 0x00,
0x40, 0x3a, 0x74, 0x04,
0x00, 0xe2, 0x76, 0x58,
- 0x33, 0xea, 0x5e, 0x59,
+ 0x33, 0xea, 0x68, 0x59,
0x33, 0xea, 0x00, 0x00,
0x30, 0x3f, 0xc0, 0x09,
- 0x30, 0xe0, 0x78, 0x61,
- 0x20, 0x3f, 0x8e, 0x69,
- 0x10, 0x3f, 0x78, 0x79,
+ 0x30, 0xe0, 0x82, 0x61,
+ 0x20, 0x3f, 0x98, 0x69,
+ 0x10, 0x3f, 0x82, 0x79,
0x02, 0xea, 0x7e, 0x00,
- 0x00, 0xea, 0x5e, 0x59,
+ 0x00, 0xea, 0x68, 0x59,
0x01, 0xea, 0x00, 0x30,
0x02, 0x4e, 0x51, 0x35,
0x01, 0xea, 0x7e, 0x00,
- 0x11, 0xea, 0x5e, 0x59,
+ 0x11, 0xea, 0x68, 0x59,
0x11, 0xea, 0x00, 0x00,
0x02, 0x4e, 0x51, 0x35,
0xc0, 0x4a, 0x94, 0x00,
- 0x04, 0x41, 0x9c, 0x79,
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0x08, 0xea, 0x98, 0x00,
0x08, 0x57, 0xae, 0x00,
0x08, 0x3c, 0x78, 0x00,
0x0f, 0x67, 0xc0, 0x09,
0x00, 0x3a, 0x75, 0x02,
0x20, 0xea, 0x96, 0x00,
- 0x00, 0xe2, 0x14, 0x42,
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0xc0, 0x4a, 0x94, 0x00,
- 0x40, 0x3a, 0xc8, 0x69,
+ 0x40, 0x3a, 0xd2, 0x69,
0x02, 0x55, 0x06, 0x68,
- 0x02, 0x56, 0xc8, 0x69,
- 0xff, 0x5b, 0xc8, 0x61,
+ 0x02, 0x56, 0xd2, 0x69,
+ 0xff, 0x5b, 0xd2, 0x61,
0x02, 0x20, 0x51, 0x31,
0x80, 0xea, 0xb2, 0x01,
0x44, 0xea, 0x00, 0x00,
0x33, 0xea, 0x00, 0x00,
0xff, 0xea, 0xb2, 0x09,
0xff, 0xe0, 0xc0, 0x19,
- 0xff, 0xe0, 0xca, 0x79,
+ 0xff, 0xe0, 0xd4, 0x79,
0x02, 0xac, 0x51, 0x31,
- 0x00, 0xe2, 0xc0, 0x41,
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0x02, 0x5e, 0x50, 0x31,
0x02, 0xa8, 0xb8, 0x30,
0x02, 0x5c, 0x50, 0x31,
- 0xff, 0xad, 0xdb, 0x71,
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0x02, 0xac, 0x41, 0x31,
0x02, 0x22, 0x51, 0x31,
0x02, 0xa0, 0x5c, 0x33,
0x02, 0xa0, 0x44, 0x32,
- 0x00, 0xe2, 0xe4, 0x41,
- 0x10, 0x92, 0xe5, 0x69,
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+ 0x01, 0x4d, 0xf1, 0x79,
+ 0x01, 0x62, 0xc1, 0x31,
+ 0x00, 0x93, 0xf1, 0x61,
+ 0xfe, 0x4d, 0x9b, 0x0a,
+ 0x02, 0x60, 0x41, 0x31,
+ 0x00, 0xe2, 0xdc, 0x41,
0x3d, 0x93, 0xc9, 0x29,
0x01, 0xe4, 0xc8, 0x01,
0x01, 0xea, 0xca, 0x01,
0xff, 0xea, 0xda, 0x01,
0x02, 0x20, 0x51, 0x31,
0x02, 0xae, 0x41, 0x32,
- 0xff, 0x21, 0xed, 0x61,
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0xff, 0xea, 0x46, 0x02,
0x02, 0x5c, 0x50, 0x31,
0x40, 0xea, 0x96, 0x00,
- 0x02, 0x56, 0x04, 0x6e,
- 0x01, 0x55, 0x04, 0x6e,
- 0x10, 0x92, 0xf9, 0x79,
- 0x10, 0x40, 0x02, 0x6a,
- 0x01, 0x56, 0x02, 0x7a,
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+ 0x01, 0x55, 0x20, 0x6e,
+ 0x10, 0x92, 0x0d, 0x7a,
+ 0x10, 0x40, 0x16, 0x6a,
+ 0x01, 0x56, 0x16, 0x7a,
0xff, 0x97, 0x07, 0x78,
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0x13, 0xea, 0x04, 0x00,
0x00, 0xe2, 0x06, 0x40,
0xbf, 0x3a, 0x74, 0x08,
- 0x04, 0x41, 0x08, 0x7a,
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0x08, 0xea, 0x98, 0x00,
0x08, 0x57, 0xae, 0x00,
0x01, 0x93, 0x75, 0x32,
0x40, 0xea, 0x72, 0x02,
0x08, 0x3c, 0x78, 0x00,
0x80, 0xea, 0x6e, 0x02,
- 0x00, 0xe2, 0xe2, 0x5b,
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0x01, 0x3c, 0xc1, 0x31,
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- 0xa0, 0xe0, 0x64, 0x72,
- 0xc0, 0xe0, 0x5a, 0x72,
- 0xe0, 0xe0, 0x94, 0x72,
- 0x01, 0xea, 0x64, 0x59,
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0x01, 0xea, 0x04, 0x00,
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- 0x03, 0xea, 0x64, 0x59,
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0x03, 0xea, 0x04, 0x00,
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0x05, 0xea, 0xb4, 0x00,
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0x33, 0xea, 0x00, 0x00,
0x02, 0xa8, 0x9c, 0x32,
- 0x00, 0xe2, 0x7e, 0x59,
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0xef, 0x96, 0xd5, 0x19,
- 0x00, 0xe2, 0x46, 0x52,
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0x09, 0x80, 0xe1, 0x30,
0x02, 0xea, 0x36, 0x00,
0xa8, 0xea, 0x32, 0x00,
- 0x00, 0xe2, 0x4c, 0x42,
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0x01, 0x96, 0xd1, 0x30,
0x10, 0x80, 0x89, 0x31,
0x20, 0xea, 0x32, 0x00,
0xbf, 0x39, 0x73, 0x0a,
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- 0x20, 0x19, 0x4e, 0x6a,
- 0x20, 0x19, 0x52, 0x6a,
- 0x02, 0x4d, 0x14, 0x6a,
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+ 0x20, 0x19, 0x62, 0x6a,
+ 0x20, 0x19, 0x66, 0x6a,
+ 0x02, 0x4d, 0x28, 0x6a,
0x40, 0x39, 0x73, 0x02,
- 0x00, 0xe2, 0x14, 0x42,
- 0x80, 0x39, 0xd5, 0x6a,
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+ 0x80, 0x39, 0xe9, 0x6a,
0x01, 0x44, 0x10, 0x33,
0x08, 0x92, 0x25, 0x03,
- 0x00, 0xe2, 0x14, 0x42,
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0x10, 0xea, 0x80, 0x00,
0x01, 0x37, 0xc5, 0x31,
- 0x80, 0xe2, 0x80, 0x62,
- 0x10, 0x92, 0xa5, 0x6a,
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+ 0x10, 0x92, 0xb9, 0x6a,
0xc0, 0x94, 0xc5, 0x01,
- 0x40, 0x92, 0x71, 0x6a,
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0xbf, 0xe2, 0xc4, 0x09,
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0x01, 0xe2, 0x88, 0x30,
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- 0xa0, 0x3c, 0x8d, 0x62,
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+ 0xa0, 0x3c, 0xa1, 0x62,
0x23, 0x92, 0x89, 0x08,
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- 0xa0, 0x3c, 0x8d, 0x62,
- 0x00, 0xa8, 0x84, 0x42,
- 0xff, 0xe2, 0x84, 0x62,
- 0x00, 0xe2, 0xa4, 0x42,
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+ 0xa0, 0x3c, 0xa1, 0x62,
+ 0x00, 0xa8, 0x98, 0x42,
+ 0xff, 0xe2, 0x98, 0x62,
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0x40, 0xea, 0x98, 0x00,
0x01, 0xe2, 0x88, 0x30,
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- 0xa0, 0x3c, 0x63, 0x72,
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+ 0xa0, 0x3c, 0x77, 0x72,
0x40, 0xea, 0x98, 0x00,
0x01, 0x37, 0x95, 0x32,
0x08, 0xea, 0x6e, 0x02,
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- 0xe0, 0xea, 0xfe, 0x5b,
- 0x80, 0xe0, 0xe0, 0x6a,
- 0x04, 0xe0, 0x92, 0x73,
- 0x02, 0xe0, 0xc4, 0x73,
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- 0x23, 0xe0, 0xb6, 0x72,
- 0x08, 0xe0, 0xdc, 0x72,
- 0x00, 0xe2, 0xe2, 0x5b,
- 0x07, 0xea, 0x64, 0x59,
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+ 0xe0, 0xea, 0x12, 0x5c,
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+ 0x02, 0xe0, 0xd8, 0x73,
+ 0x00, 0xea, 0x52, 0x73,
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+ 0x07, 0xea, 0x6e, 0x59,
0x07, 0xea, 0x04, 0x00,
- 0x08, 0x48, 0x15, 0x72,
- 0x04, 0x48, 0xb3, 0x62,
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+ 0x04, 0x48, 0xc7, 0x62,
0x01, 0x49, 0x89, 0x30,
- 0x00, 0xe2, 0xa4, 0x42,
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0x01, 0x44, 0xd4, 0x31,
- 0x00, 0xe2, 0xa4, 0x42,
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0x01, 0x00, 0x6c, 0x32,
- 0x33, 0xea, 0x5e, 0x59,
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0x33, 0xea, 0x00, 0x00,
0x4c, 0x3a, 0xc1, 0x28,
0x01, 0x64, 0xc0, 0x31,
- 0x00, 0x36, 0x5f, 0x59,
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0x01, 0x36, 0x01, 0x30,
- 0x01, 0xe0, 0xda, 0x7a,
- 0xa0, 0xea, 0xf4, 0x5b,
- 0x01, 0xa0, 0xda, 0x62,
- 0x01, 0x84, 0xcf, 0x7a,
- 0x01, 0x95, 0xdd, 0x6a,
- 0x05, 0xea, 0x64, 0x59,
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+ 0xa0, 0xea, 0x08, 0x5c,
+ 0x01, 0xa0, 0xee, 0x62,
+ 0x01, 0x84, 0xe3, 0x7a,
+ 0x01, 0x95, 0xf1, 0x6a,
+ 0x05, 0xea, 0x6e, 0x59,
0x05, 0xea, 0x04, 0x00,
- 0x00, 0xe2, 0xdc, 0x42,
- 0x03, 0xea, 0x64, 0x59,
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+ 0x03, 0xea, 0x6e, 0x59,
0x03, 0xea, 0x04, 0x00,
- 0x00, 0xe2, 0xdc, 0x42,
- 0x07, 0xea, 0x06, 0x5c,
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+ 0x07, 0xea, 0x1a, 0x5c,
0x01, 0x44, 0xd4, 0x31,
- 0x00, 0xe2, 0x14, 0x42,
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0x3f, 0xe0, 0x76, 0x0a,
0xc0, 0x3a, 0xc1, 0x09,
0x00, 0x3b, 0x51, 0x01,
0x01, 0xea, 0xc6, 0x01,
0x02, 0xe2, 0xc8, 0x31,
0x02, 0xec, 0x40, 0x31,
- 0xff, 0xa1, 0xfc, 0x72,
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0x02, 0xe8, 0xda, 0x31,
0x02, 0xa0, 0x50, 0x31,
- 0x00, 0xe2, 0x1e, 0x43,
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0x80, 0x39, 0x73, 0x02,
0x01, 0x44, 0xd4, 0x31,
- 0x00, 0xe2, 0xe2, 0x5b,
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0x01, 0x39, 0x73, 0x02,
- 0xe0, 0x3c, 0x39, 0x63,
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0x02, 0x39, 0x73, 0x02,
- 0x20, 0x46, 0x32, 0x63,
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0xff, 0xea, 0x52, 0x09,
- 0xa8, 0xea, 0xf4, 0x5b,
- 0x04, 0x92, 0x19, 0x7b,
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+ 0x04, 0x92, 0x2d, 0x7b,
0x01, 0x3a, 0xc1, 0x31,
- 0x00, 0x93, 0x19, 0x63,
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0x01, 0x3b, 0xc1, 0x31,
- 0x00, 0x94, 0x23, 0x73,
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0x01, 0xa9, 0x52, 0x11,
- 0xff, 0xa9, 0x0e, 0x6b,
- 0x00, 0xe2, 0x32, 0x43,
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0x10, 0x39, 0x73, 0x02,
- 0x04, 0x92, 0x33, 0x7b,
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0xfb, 0x92, 0x25, 0x0b,
0xff, 0xea, 0x72, 0x0a,
- 0x01, 0xa4, 0x2d, 0x6b,
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0x02, 0xa8, 0x9c, 0x32,
- 0x00, 0xe2, 0x7e, 0x59,
- 0x10, 0x92, 0xdd, 0x7a,
- 0xff, 0xea, 0x06, 0x5c,
- 0x00, 0xe2, 0xdc, 0x42,
- 0x04, 0xea, 0x64, 0x59,
+ 0x00, 0xe2, 0x88, 0x59,
+ 0x10, 0x92, 0xf1, 0x7a,
+ 0xff, 0xea, 0x1a, 0x5c,
+ 0x00, 0xe2, 0xf0, 0x42,
+ 0x04, 0xea, 0x6e, 0x59,
0x04, 0xea, 0x04, 0x00,
- 0x00, 0xe2, 0xdc, 0x42,
- 0x04, 0xea, 0x64, 0x59,
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+ 0x04, 0xea, 0x6e, 0x59,
0x04, 0xea, 0x04, 0x00,
- 0x00, 0xe2, 0x14, 0x42,
- 0x08, 0x92, 0xd5, 0x7a,
- 0xc0, 0x39, 0x49, 0x7b,
- 0x80, 0x39, 0xd5, 0x6a,
- 0xff, 0x88, 0x49, 0x6b,
- 0x40, 0x39, 0xd5, 0x6a,
- 0x10, 0x92, 0x4f, 0x7b,
- 0x0a, 0xea, 0x64, 0x59,
+ 0x00, 0xe2, 0x28, 0x42,
+ 0x08, 0x92, 0xe9, 0x7a,
+ 0xc0, 0x39, 0x5d, 0x7b,
+ 0x80, 0x39, 0xe9, 0x6a,
+ 0xff, 0x88, 0x5d, 0x6b,
+ 0x40, 0x39, 0xe9, 0x6a,
+ 0x10, 0x92, 0x63, 0x7b,
+ 0x0a, 0xea, 0x6e, 0x59,
0x0a, 0xea, 0x04, 0x00,
- 0x00, 0xe2, 0x6e, 0x5b,
- 0x00, 0xe2, 0xae, 0x43,
- 0x50, 0x4b, 0x56, 0x6b,
+ 0x00, 0xe2, 0x82, 0x5b,
+ 0x00, 0xe2, 0xc2, 0x43,
+ 0x50, 0x4b, 0x6a, 0x6b,
0xbf, 0x3a, 0x74, 0x08,
0x01, 0xe0, 0xf4, 0x31,
0xff, 0xea, 0xc0, 0x09,
0x01, 0xfa, 0xc0, 0x35,
0x02, 0xa8, 0x90, 0x32,
0x02, 0xea, 0xb4, 0x00,
- 0x33, 0xea, 0x5e, 0x59,
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0x33, 0xea, 0x00, 0x00,
0x02, 0x48, 0x51, 0x31,
0xff, 0x90, 0x85, 0x68,
- 0xff, 0x88, 0x7b, 0x6b,
- 0x01, 0xa4, 0x77, 0x6b,
- 0x02, 0xa4, 0x7f, 0x6b,
- 0x01, 0x84, 0x7f, 0x7b,
+ 0xff, 0x88, 0x8f, 0x6b,
+ 0x01, 0xa4, 0x8b, 0x6b,
+ 0x02, 0xa4, 0x93, 0x6b,
+ 0x01, 0x84, 0x93, 0x7b,
0x02, 0x28, 0x19, 0x33,
0x02, 0xa8, 0x50, 0x36,
- 0xff, 0x88, 0x7f, 0x73,
- 0x00, 0xe2, 0x52, 0x5b,
+ 0xff, 0x88, 0x93, 0x73,
+ 0x00, 0xe2, 0x66, 0x5b,
0x02, 0xa8, 0x20, 0x33,
0x04, 0xa4, 0x49, 0x03,
0xff, 0xea, 0x1a, 0x03,
- 0xff, 0x2d, 0x8b, 0x63,
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0x02, 0xa8, 0x58, 0x32,
0x02, 0xa8, 0x5c, 0x36,
0x02, 0xa8, 0x40, 0x31,
0x02, 0x2e, 0x51, 0x31,
0x02, 0xa0, 0x18, 0x33,
0x02, 0xa0, 0x5c, 0x36,
- 0xc0, 0x39, 0xd5, 0x6a,
+ 0xc0, 0x39, 0xe9, 0x6a,
0x04, 0x92, 0x25, 0x03,
- 0x20, 0x92, 0xaf, 0x6b,
+ 0x20, 0x92, 0xc3, 0x6b,
0x02, 0xa8, 0x40, 0x31,
0xc0, 0x3a, 0xc1, 0x09,
0x00, 0x3b, 0x51, 0x01,
0xf7, 0x57, 0xae, 0x08,
0x08, 0xea, 0x98, 0x00,
0x01, 0x44, 0xd4, 0x31,
- 0xee, 0x00, 0xb8, 0x6b,
+ 0xee, 0x00, 0xcc, 0x6b,
0x02, 0xea, 0xb4, 0x00,
0xc0, 0xea, 0x72, 0x02,
- 0x09, 0x4c, 0xba, 0x7b,
+ 0x09, 0x4c, 0xce, 0x7b,
0x01, 0xea, 0x78, 0x02,
0x08, 0x4c, 0x06, 0x68,
- 0x0b, 0xea, 0x64, 0x59,
+ 0x0b, 0xea, 0x6e, 0x59,
0x0b, 0xea, 0x04, 0x00,
0x01, 0x44, 0xd4, 0x31,
- 0x20, 0x39, 0x15, 0x7a,
- 0x00, 0xe2, 0xcc, 0x5b,
- 0x00, 0xe2, 0x14, 0x42,
- 0x01, 0x84, 0xd1, 0x7b,
+ 0x20, 0x39, 0x29, 0x7a,
+ 0x00, 0xe2, 0xe0, 0x5b,
+ 0x00, 0xe2, 0x28, 0x42,
+ 0x01, 0x84, 0xe5, 0x7b,
0x01, 0xa4, 0x49, 0x07,
0x08, 0x60, 0x30, 0x33,
0x08, 0x80, 0x41, 0x37,
0xdf, 0x39, 0x73, 0x0a,
- 0xee, 0x00, 0xde, 0x6b,
+ 0xee, 0x00, 0xf2, 0x6b,
0x05, 0xea, 0xb4, 0x00,
- 0x33, 0xea, 0x5e, 0x59,
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0x33, 0xea, 0x00, 0x00,
- 0x00, 0xe2, 0x7e, 0x59,
- 0x00, 0xe2, 0xdc, 0x42,
- 0xff, 0x42, 0xee, 0x6b,
- 0x01, 0x41, 0xe2, 0x6b,
- 0x02, 0x41, 0xe2, 0x7b,
- 0xff, 0x42, 0xee, 0x6b,
- 0x01, 0x41, 0xe2, 0x6b,
- 0x02, 0x41, 0xe2, 0x7b,
- 0xff, 0x42, 0xee, 0x7b,
- 0x04, 0x4c, 0xe2, 0x6b,
+ 0x00, 0xe2, 0x88, 0x59,
+ 0x00, 0xe2, 0xf0, 0x42,
+ 0xff, 0x42, 0x02, 0x6c,
+ 0x01, 0x41, 0xf6, 0x6b,
+ 0x02, 0x41, 0xf6, 0x7b,
+ 0xff, 0x42, 0x02, 0x6c,
+ 0x01, 0x41, 0xf6, 0x6b,
+ 0x02, 0x41, 0xf6, 0x7b,
+ 0xff, 0x42, 0x02, 0x7c,
+ 0x04, 0x4c, 0xf6, 0x6b,
0xe0, 0x41, 0x78, 0x0e,
0x01, 0x44, 0xd4, 0x31,
- 0xff, 0x42, 0xf6, 0x7b,
- 0x04, 0x4c, 0xf6, 0x6b,
+ 0xff, 0x42, 0x0a, 0x7c,
+ 0x04, 0x4c, 0x0a, 0x6c,
0xe0, 0x41, 0x78, 0x0a,
- 0xe0, 0x3c, 0x15, 0x62,
+ 0xe0, 0x3c, 0x29, 0x62,
0xff, 0xea, 0xca, 0x09,
0x01, 0xe2, 0xc8, 0x31,
0x01, 0x46, 0xda, 0x35,
0x01, 0x44, 0xd4, 0x35,
0x10, 0xea, 0x80, 0x00,
0x01, 0xe2, 0x6e, 0x36,
- 0x04, 0xa6, 0x0e, 0x7c,
+ 0x04, 0xa6, 0x22, 0x7c,
0xff, 0xea, 0x5a, 0x09,
0xff, 0xea, 0x4c, 0x0d,
- 0x01, 0xa6, 0x3a, 0x6c,
+ 0x01, 0xa6, 0x4e, 0x6c,
0x10, 0xad, 0x84, 0x78,
- 0x80, 0xad, 0x32, 0x6c,
+ 0x80, 0xad, 0x46, 0x6c,
0x08, 0xad, 0x84, 0x68,
- 0x20, 0x19, 0x26, 0x7c,
+ 0x20, 0x19, 0x3a, 0x7c,
0x80, 0xea, 0xb2, 0x01,
0x11, 0x00, 0x00, 0x10,
- 0x02, 0xa6, 0x22, 0x7c,
+ 0x02, 0xa6, 0x36, 0x7c,
0xff, 0xea, 0xb2, 0x0d,
0x11, 0x00, 0x00, 0x10,
0xff, 0xea, 0xb2, 0x09,
0x00, 0x86, 0x0d, 0x23,
0x00, 0x87, 0x0f, 0x23,
0x01, 0x84, 0xc5, 0x31,
- 0x80, 0x83, 0x5d, 0x7c,
+ 0x80, 0x83, 0x71, 0x7c,
0x02, 0xe2, 0xc4, 0x01,
0xff, 0xea, 0x4c, 0x09,
0x01, 0xe2, 0x36, 0x30,
0xfe, 0xa6, 0x4c, 0x0d,
0x0b, 0x98, 0xe1, 0x30,
0xfd, 0xa4, 0x49, 0x09,
- 0x80, 0xa3, 0x71, 0x7c,
+ 0x80, 0xa3, 0x85, 0x7c,
0x02, 0xa4, 0x48, 0x01,
0x01, 0xa4, 0x36, 0x30,
0xa8, 0xea, 0x32, 0x00,
0xfd, 0xa4, 0x49, 0x0b,
0x05, 0xa3, 0x07, 0x33,
- 0x80, 0x83, 0x7d, 0x6c,
+ 0x80, 0x83, 0x91, 0x6c,
0x02, 0xea, 0x4c, 0x05,
0xff, 0xea, 0x4c, 0x0d,
- 0x00, 0xe2, 0x56, 0x59,
- 0x02, 0xa6, 0x10, 0x6c,
+ 0x00, 0xe2, 0x60, 0x59,
+ 0x02, 0xa6, 0x24, 0x6c,
0x80, 0xf9, 0xf2, 0x05,
- 0xc0, 0x39, 0x8b, 0x7c,
- 0x03, 0xea, 0x64, 0x59,
+ 0xc0, 0x39, 0x9f, 0x7c,
+ 0x03, 0xea, 0x6e, 0x59,
0x03, 0xea, 0x04, 0x00,
- 0x20, 0x39, 0xaf, 0x7c,
- 0x01, 0x84, 0x95, 0x6c,
- 0x06, 0xea, 0x64, 0x59,
+ 0x20, 0x39, 0xc3, 0x7c,
+ 0x01, 0x84, 0xa9, 0x6c,
+ 0x06, 0xea, 0x6e, 0x59,
0x06, 0xea, 0x04, 0x00,
- 0x00, 0xe2, 0xb2, 0x44,
+ 0x00, 0xe2, 0xc6, 0x44,
0x01, 0x00, 0x6c, 0x32,
- 0xee, 0x00, 0x9e, 0x6c,
+ 0xee, 0x00, 0xb2, 0x6c,
0x05, 0xea, 0xb4, 0x00,
- 0x33, 0xea, 0x5e, 0x59,
+ 0x33, 0xea, 0x68, 0x59,
0x33, 0xea, 0x00, 0x00,
0x80, 0x3d, 0x7a, 0x00,
- 0xfc, 0x42, 0xa0, 0x7c,
+ 0xfc, 0x42, 0xb4, 0x7c,
0x7f, 0x3d, 0x7a, 0x08,
- 0x00, 0x36, 0x5f, 0x59,
+ 0x00, 0x36, 0x69, 0x59,
0x01, 0x36, 0x01, 0x30,
- 0x09, 0xea, 0x64, 0x59,
+ 0x09, 0xea, 0x6e, 0x59,
0x09, 0xea, 0x04, 0x00,
- 0x00, 0xe2, 0x14, 0x42,
- 0x01, 0xa4, 0x95, 0x6c,
- 0x00, 0xe2, 0x68, 0x5c,
+ 0x00, 0xe2, 0x28, 0x42,
+ 0x01, 0xa4, 0xa9, 0x6c,
+ 0x00, 0xe2, 0x7c, 0x5c,
0x20, 0x39, 0x73, 0x02,
0x01, 0x00, 0x6c, 0x32,
- 0x02, 0xa6, 0xba, 0x7c,
- 0x00, 0xe2, 0x7e, 0x5c,
+ 0x02, 0xa6, 0xce, 0x7c,
+ 0x00, 0xe2, 0x92, 0x5c,
0x00, 0xe2, 0x76, 0x58,
0x00, 0xe2, 0x86, 0x58,
0x00, 0xe2, 0x5a, 0x58,
- 0x00, 0x36, 0x5f, 0x59,
+ 0x00, 0x36, 0x69, 0x59,
0x01, 0x36, 0x01, 0x30,
- 0x20, 0x19, 0xba, 0x6c,
- 0x00, 0xe2, 0xea, 0x5c,
- 0x04, 0x19, 0xd4, 0x6c,
+ 0x20, 0x19, 0xce, 0x6c,
+ 0x00, 0xe2, 0xfe, 0x5c,
+ 0x04, 0x19, 0xe8, 0x6c,
0x02, 0x19, 0x32, 0x00,
- 0x01, 0x84, 0xd5, 0x7c,
- 0x01, 0x1b, 0xce, 0x7c,
- 0x01, 0x1a, 0xd4, 0x6c,
- 0x00, 0xe2, 0x84, 0x44,
- 0x80, 0x4b, 0xda, 0x6c,
- 0x01, 0x4c, 0xd6, 0x7c,
- 0x03, 0x42, 0x84, 0x6c,
- 0x00, 0xe2, 0x0a, 0x5c,
+ 0x01, 0x84, 0xe9, 0x7c,
+ 0x01, 0x1b, 0xe2, 0x7c,
+ 0x01, 0x1a, 0xe8, 0x6c,
+ 0x00, 0xe2, 0x98, 0x44,
+ 0x80, 0x4b, 0xee, 0x6c,
+ 0x01, 0x4c, 0xea, 0x7c,
+ 0x03, 0x42, 0x98, 0x6c,
+ 0x00, 0xe2, 0x1e, 0x5c,
0x80, 0xf9, 0xf2, 0x01,
- 0x04, 0x39, 0x15, 0x7a,
- 0x00, 0xe2, 0x14, 0x42,
- 0x08, 0x5d, 0xf2, 0x6c,
+ 0x04, 0x39, 0x29, 0x7a,
+ 0x00, 0xe2, 0x28, 0x42,
+ 0x08, 0x5d, 0x06, 0x6d,
0x00, 0xe2, 0x76, 0x58,
- 0x00, 0x36, 0x5f, 0x59,
+ 0x00, 0x36, 0x69, 0x59,
0x01, 0x36, 0x01, 0x30,
- 0x02, 0x1b, 0xe2, 0x7c,
- 0x08, 0x5d, 0xf0, 0x7c,
+ 0x02, 0x1b, 0xf6, 0x7c,
+ 0x08, 0x5d, 0x04, 0x7d,
0x03, 0x68, 0x00, 0x37,
0x01, 0x84, 0x09, 0x07,
- 0x80, 0x1b, 0xfc, 0x7c,
- 0x80, 0x84, 0xfd, 0x6c,
+ 0x80, 0x1b, 0x10, 0x7d,
+ 0x80, 0x84, 0x11, 0x6d,
0xff, 0x85, 0x0b, 0x1b,
0xff, 0x86, 0x0d, 0x23,
0xff, 0x87, 0x0f, 0x23,
0xf9, 0xd9, 0xb2, 0x0d,
0x01, 0xd9, 0xb2, 0x05,
0x01, 0x52, 0x48, 0x31,
- 0x20, 0xa4, 0x26, 0x7d,
- 0x20, 0x5b, 0x26, 0x7d,
- 0x80, 0xf9, 0x34, 0x7d,
+ 0x20, 0xa4, 0x3a, 0x7d,
+ 0x20, 0x5b, 0x3a, 0x7d,
+ 0x80, 0xf9, 0x48, 0x7d,
0x02, 0xea, 0xb4, 0x00,
0x11, 0x00, 0x00, 0x10,
- 0x04, 0x19, 0x40, 0x7d,
+ 0x04, 0x19, 0x54, 0x7d,
0xdf, 0x19, 0x32, 0x08,
- 0x60, 0x5b, 0x40, 0x6d,
- 0x01, 0x4c, 0x1a, 0x7d,
+ 0x60, 0x5b, 0x54, 0x6d,
+ 0x01, 0x4c, 0x2e, 0x7d,
0x20, 0x19, 0x32, 0x00,
0x01, 0xd9, 0xb2, 0x05,
0x02, 0xea, 0xb4, 0x00,
0x01, 0xd9, 0xb2, 0x05,
- 0x10, 0x5b, 0x38, 0x6d,
- 0x08, 0x5b, 0x42, 0x6d,
- 0x20, 0x5b, 0x32, 0x6d,
- 0x02, 0x5b, 0x62, 0x6d,
- 0x0e, 0xea, 0x64, 0x59,
+ 0x10, 0x5b, 0x4c, 0x6d,
+ 0x08, 0x5b, 0x56, 0x6d,
+ 0x20, 0x5b, 0x46, 0x6d,
+ 0x02, 0x5b, 0x76, 0x6d,
+ 0x0e, 0xea, 0x6e, 0x59,
0x0e, 0xea, 0x04, 0x00,
- 0x80, 0xf9, 0x22, 0x6d,
+ 0x80, 0xf9, 0x36, 0x6d,
0xdf, 0x5c, 0xb8, 0x08,
0x01, 0xd9, 0xb2, 0x05,
- 0x01, 0xa4, 0x1d, 0x6e,
- 0x00, 0xe2, 0x68, 0x5c,
- 0x00, 0xe2, 0x6c, 0x5d,
+ 0x01, 0xa4, 0x37, 0x6e,
+ 0x00, 0xe2, 0x7c, 0x5c,
+ 0x00, 0xe2, 0x80, 0x5d,
0x01, 0x90, 0x21, 0x1b,
0x01, 0xd9, 0xb2, 0x05,
- 0x00, 0xe2, 0x52, 0x5b,
+ 0x00, 0xe2, 0x66, 0x5b,
0xf3, 0x96, 0xd5, 0x19,
- 0x00, 0xe2, 0x50, 0x55,
- 0x80, 0x96, 0x51, 0x6d,
- 0x0f, 0xea, 0x64, 0x59,
+ 0x00, 0xe2, 0x64, 0x55,
+ 0x80, 0x96, 0x65, 0x6d,
+ 0x0f, 0xea, 0x6e, 0x59,
0x0f, 0xea, 0x04, 0x00,
- 0x00, 0xe2, 0x58, 0x45,
+ 0x00, 0xe2, 0x6c, 0x45,
0x04, 0x8c, 0xe1, 0x30,
0x01, 0xea, 0xf2, 0x00,
0x02, 0xea, 0x36, 0x00,
0xa8, 0xea, 0x32, 0x00,
- 0xff, 0x97, 0x5f, 0x7d,
- 0x14, 0xea, 0x64, 0x59,
+ 0xff, 0x97, 0x73, 0x7d,
+ 0x14, 0xea, 0x6e, 0x59,
0x14, 0xea, 0x04, 0x00,
- 0x00, 0xe2, 0xce, 0x5d,
+ 0x00, 0xe2, 0xe2, 0x5d,
0x01, 0xd9, 0xb2, 0x05,
0x09, 0x80, 0xe1, 0x30,
0x02, 0xea, 0x36, 0x00,
0xa8, 0xea, 0x32, 0x00,
- 0x00, 0xe2, 0xc6, 0x5d,
+ 0x00, 0xe2, 0xda, 0x5d,
0x01, 0xd9, 0xb2, 0x05,
- 0x02, 0xa6, 0x7c, 0x7d,
- 0x00, 0xe2, 0x56, 0x59,
- 0x20, 0x5b, 0x8a, 0x6d,
- 0xfc, 0x42, 0x76, 0x7d,
- 0x10, 0x40, 0x78, 0x6d,
- 0x20, 0x4d, 0x7a, 0x7d,
- 0x08, 0x5d, 0x8a, 0x6d,
- 0x02, 0xa6, 0x10, 0x6c,
- 0x00, 0xe2, 0x56, 0x59,
- 0x20, 0x5b, 0x8a, 0x6d,
- 0x01, 0x1b, 0xaa, 0x6d,
- 0xfc, 0x42, 0x86, 0x7d,
- 0x10, 0x40, 0x88, 0x6d,
+ 0x02, 0xa6, 0x90, 0x7d,
+ 0x00, 0xe2, 0x60, 0x59,
+ 0x20, 0x5b, 0x9e, 0x6d,
+ 0xfc, 0x42, 0x8a, 0x7d,
+ 0x10, 0x40, 0x8c, 0x6d,
+ 0x20, 0x4d, 0x8e, 0x7d,
+ 0x08, 0x5d, 0x9e, 0x6d,
+ 0x02, 0xa6, 0x24, 0x6c,
+ 0x00, 0xe2, 0x60, 0x59,
+ 0x20, 0x5b, 0x9e, 0x6d,
+ 0x01, 0x1b, 0xbe, 0x6d,
+ 0xfc, 0x42, 0x9a, 0x7d,
+ 0x10, 0x40, 0x9c, 0x6d,
0x20, 0x4d, 0x84, 0x78,
0x08, 0x5d, 0x84, 0x78,
0x02, 0x19, 0x32, 0x00,
0x01, 0x5b, 0x40, 0x31,
- 0x00, 0xe2, 0xea, 0x5c,
- 0x00, 0xe2, 0xcc, 0x5b,
+ 0x00, 0xe2, 0xfe, 0x5c,
+ 0x00, 0xe2, 0xe0, 0x5b,
0x20, 0xea, 0xb6, 0x00,
- 0x00, 0xe2, 0x0a, 0x5c,
+ 0x00, 0xe2, 0x1e, 0x5c,
0x20, 0x5c, 0xb8, 0x00,
- 0x04, 0x19, 0xa0, 0x6d,
- 0x01, 0x1a, 0xa0, 0x6d,
- 0x00, 0xe2, 0x56, 0x59,
+ 0x04, 0x19, 0xb4, 0x6d,
+ 0x01, 0x1a, 0xb4, 0x6d,
+ 0x00, 0xe2, 0x60, 0x59,
0x01, 0x1a, 0x84, 0x78,
0x80, 0xf9, 0xf2, 0x01,
- 0x20, 0xa0, 0x04, 0x7e,
+ 0x20, 0xa0, 0x18, 0x7e,
0xff, 0x90, 0x21, 0x1b,
- 0x08, 0x92, 0x63, 0x6b,
+ 0x08, 0x92, 0x77, 0x6b,
0x02, 0xea, 0xb4, 0x04,
0x01, 0xa4, 0x49, 0x03,
- 0x40, 0x5b, 0xba, 0x6d,
- 0x00, 0xe2, 0x56, 0x59,
- 0x40, 0x5b, 0xba, 0x6d,
- 0x04, 0x5d, 0x1e, 0x7e,
- 0x01, 0x1a, 0x1e, 0x7e,
+ 0x40, 0x5b, 0xce, 0x6d,
+ 0x00, 0xe2, 0x60, 0x59,
+ 0x40, 0x5b, 0xce, 0x6d,
+ 0x04, 0x5d, 0x38, 0x7e,
+ 0x01, 0x1a, 0x38, 0x7e,
0x20, 0x4d, 0x84, 0x78,
- 0x40, 0x5b, 0x04, 0x7e,
- 0x04, 0x5d, 0x1e, 0x7e,
- 0x01, 0x1a, 0x1e, 0x7e,
+ 0x40, 0x5b, 0x18, 0x7e,
+ 0x04, 0x5d, 0x38, 0x7e,
+ 0x01, 0x1a, 0x38, 0x7e,
0x80, 0xf9, 0xf2, 0x01,
0xff, 0x90, 0x21, 0x1b,
- 0x08, 0x92, 0x63, 0x6b,
+ 0x08, 0x92, 0x77, 0x6b,
0x02, 0xea, 0xb4, 0x04,
- 0x00, 0xe2, 0x56, 0x59,
+ 0x00, 0xe2, 0x60, 0x59,
0x01, 0x1b, 0x84, 0x78,
0x80, 0xf9, 0xf2, 0x01,
0x02, 0xea, 0xb4, 0x04,
- 0x00, 0xe2, 0x56, 0x59,
- 0x01, 0x1b, 0xe2, 0x6d,
- 0x40, 0x5b, 0xf0, 0x7d,
- 0x01, 0x1b, 0xe2, 0x6d,
+ 0x00, 0xe2, 0x60, 0x59,
+ 0x01, 0x1b, 0xf6, 0x6d,
+ 0x40, 0x5b, 0x04, 0x7e,
+ 0x01, 0x1b, 0xf6, 0x6d,
0x02, 0x19, 0x32, 0x00,
0x01, 0x1a, 0x84, 0x78,
0x80, 0xf9, 0xf2, 0x01,
0xff, 0xea, 0x10, 0x03,
0x08, 0x92, 0x25, 0x03,
- 0x00, 0xe2, 0x62, 0x43,
- 0x01, 0x1a, 0xec, 0x7d,
- 0x40, 0x5b, 0xe8, 0x7d,
- 0x01, 0x1a, 0xd6, 0x6d,
+ 0x00, 0xe2, 0x76, 0x43,
+ 0x01, 0x1a, 0x00, 0x7e,
+ 0x40, 0x5b, 0xfc, 0x7d,
+ 0x01, 0x1a, 0xea, 0x6d,
0xfc, 0x42, 0x84, 0x78,
- 0x01, 0x1a, 0xf0, 0x6d,
- 0x10, 0xea, 0x64, 0x59,
+ 0x01, 0x1a, 0x04, 0x6e,
+ 0x10, 0xea, 0x6e, 0x59,
0x10, 0xea, 0x04, 0x00,
0xfc, 0x42, 0x84, 0x78,
- 0x10, 0x40, 0xf6, 0x6d,
+ 0x10, 0x40, 0x0a, 0x6e,
0x20, 0x4d, 0x84, 0x78,
- 0x40, 0x5b, 0xd6, 0x6d,
+ 0x40, 0x5b, 0xea, 0x6d,
0x01, 0x1a, 0x84, 0x78,
0x01, 0x90, 0x21, 0x1b,
0x30, 0x3f, 0xc0, 0x09,
0x30, 0xe0, 0x84, 0x60,
0x40, 0x4b, 0x84, 0x68,
0xff, 0xea, 0x52, 0x01,
- 0xee, 0x00, 0x0c, 0x6e,
+ 0xee, 0x00, 0x20, 0x6e,
0x80, 0xf9, 0xf2, 0x01,
0xff, 0x90, 0x21, 0x1b,
0x02, 0xea, 0xb4, 0x00,
0x20, 0xea, 0x9a, 0x00,
- 0xf3, 0x42, 0x16, 0x6e,
- 0x12, 0xea, 0x64, 0x59,
+ 0x04, 0x41, 0x26, 0x7e,
+ 0x08, 0xea, 0x98, 0x00,
+ 0x08, 0x57, 0xae, 0x00,
+ 0xf3, 0x42, 0x30, 0x6e,
+ 0x12, 0xea, 0x6e, 0x59,
0x12, 0xea, 0x04, 0x00,
- 0x00, 0xe2, 0x14, 0x42,
- 0x0d, 0xea, 0x64, 0x59,
+ 0x00, 0xe2, 0x28, 0x42,
+ 0x0d, 0xea, 0x6e, 0x59,
0x0d, 0xea, 0x04, 0x00,
- 0x00, 0xe2, 0x14, 0x42,
+ 0x00, 0xe2, 0x28, 0x42,
0x01, 0x90, 0x21, 0x1b,
- 0x11, 0xea, 0x64, 0x59,
+ 0x11, 0xea, 0x6e, 0x59,
0x11, 0xea, 0x04, 0x00,
- 0x00, 0xe2, 0x52, 0x5b,
+ 0x00, 0xe2, 0x66, 0x5b,
0x08, 0x5a, 0xb4, 0x00,
- 0x00, 0xe2, 0x44, 0x5e,
+ 0x00, 0xe2, 0x5e, 0x5e,
0xa8, 0xea, 0x32, 0x00,
- 0x00, 0xe2, 0x56, 0x59,
- 0x80, 0x1a, 0x32, 0x7e,
- 0x00, 0xe2, 0x44, 0x5e,
+ 0x00, 0xe2, 0x60, 0x59,
+ 0x80, 0x1a, 0x4c, 0x7e,
+ 0x00, 0xe2, 0x5e, 0x5e,
0x80, 0x19, 0x32, 0x00,
- 0x40, 0x5b, 0x38, 0x6e,
- 0x08, 0x5a, 0x38, 0x7e,
+ 0x40, 0x5b, 0x52, 0x6e,
+ 0x08, 0x5a, 0x52, 0x7e,
0x20, 0x4d, 0x84, 0x78,
0x02, 0x84, 0x09, 0x03,
- 0x40, 0x5b, 0x04, 0x7e,
+ 0x40, 0x5b, 0x18, 0x7e,
0xff, 0x90, 0x21, 0x1b,
0x80, 0xf9, 0xf2, 0x01,
- 0x08, 0x92, 0x63, 0x6b,
+ 0x08, 0x92, 0x77, 0x6b,
0x02, 0xea, 0xb4, 0x04,
0x01, 0x40, 0xe1, 0x30,
0x05, 0x41, 0xe3, 0x98,
{ ahd_patch0_func, 64, 1, 1 },
{ ahd_patch2_func, 67, 1, 2 },
{ ahd_patch0_func, 68, 1, 1 },
- { ahd_patch4_func, 116, 1, 1 },
- { ahd_patch2_func, 175, 3, 1 },
- { ahd_patch1_func, 178, 2, 1 },
- { ahd_patch5_func, 180, 1, 1 },
- { ahd_patch2_func, 189, 1, 2 },
- { ahd_patch0_func, 190, 1, 1 },
- { ahd_patch6_func, 191, 2, 2 },
- { ahd_patch0_func, 193, 6, 3 },
- { ahd_patch2_func, 196, 1, 2 },
- { ahd_patch0_func, 197, 1, 1 },
- { ahd_patch2_func, 200, 1, 2 },
- { ahd_patch0_func, 201, 1, 1 },
- { ahd_patch3_func, 203, 1, 1 },
- { ahd_patch7_func, 204, 3, 1 },
- { ahd_patch3_func, 213, 1, 1 },
- { ahd_patch5_func, 214, 16, 2 },
- { ahd_patch0_func, 230, 1, 1 },
- { ahd_patch8_func, 250, 2, 1 },
- { ahd_patch1_func, 254, 1, 2 },
- { ahd_patch0_func, 255, 1, 1 },
- { ahd_patch7_func, 258, 3, 1 },
- { ahd_patch1_func, 273, 1, 2 },
- { ahd_patch0_func, 274, 1, 1 },
- { ahd_patch1_func, 277, 1, 2 },
- { ahd_patch0_func, 278, 1, 1 },
- { ahd_patch2_func, 281, 1, 2 },
- { ahd_patch0_func, 282, 1, 1 },
- { ahd_patch9_func, 295, 2, 2 },
- { ahd_patch0_func, 297, 1, 1 },
- { ahd_patch1_func, 339, 1, 2 },
- { ahd_patch0_func, 340, 1, 1 },
- { ahd_patch2_func, 348, 1, 2 },
- { ahd_patch0_func, 349, 1, 1 },
- { ahd_patch2_func, 352, 1, 2 },
- { ahd_patch0_func, 353, 1, 1 },
- { ahd_patch1_func, 359, 1, 2 },
- { ahd_patch0_func, 360, 1, 1 },
- { ahd_patch1_func, 362, 1, 2 },
+ { ahd_patch4_func, 115, 1, 1 },
+ { ahd_patch2_func, 180, 3, 1 },
+ { ahd_patch1_func, 183, 2, 1 },
+ { ahd_patch5_func, 185, 1, 1 },
+ { ahd_patch2_func, 194, 1, 2 },
+ { ahd_patch0_func, 195, 1, 1 },
+ { ahd_patch6_func, 196, 2, 2 },
+ { ahd_patch0_func, 198, 6, 3 },
+ { ahd_patch2_func, 201, 1, 2 },
+ { ahd_patch0_func, 202, 1, 1 },
+ { ahd_patch2_func, 205, 1, 2 },
+ { ahd_patch0_func, 206, 1, 1 },
+ { ahd_patch3_func, 208, 1, 1 },
+ { ahd_patch7_func, 209, 3, 1 },
+ { ahd_patch3_func, 218, 1, 1 },
+ { ahd_patch5_func, 219, 16, 2 },
+ { ahd_patch0_func, 235, 1, 1 },
+ { ahd_patch8_func, 260, 2, 1 },
+ { ahd_patch1_func, 264, 1, 2 },
+ { ahd_patch0_func, 265, 1, 1 },
+ { ahd_patch7_func, 268, 3, 1 },
+ { ahd_patch1_func, 283, 1, 2 },
+ { ahd_patch0_func, 284, 1, 1 },
+ { ahd_patch1_func, 287, 1, 2 },
+ { ahd_patch0_func, 288, 1, 1 },
+ { ahd_patch2_func, 291, 1, 2 },
+ { ahd_patch0_func, 292, 1, 1 },
+ { ahd_patch9_func, 305, 2, 2 },
+ { ahd_patch0_func, 307, 1, 1 },
+ { ahd_patch1_func, 349, 1, 2 },
+ { ahd_patch0_func, 350, 1, 1 },
+ { ahd_patch2_func, 358, 1, 2 },
+ { ahd_patch0_func, 359, 1, 1 },
+ { ahd_patch2_func, 362, 1, 2 },
{ ahd_patch0_func, 363, 1, 1 },
- { ahd_patch10_func, 382, 1, 1 },
- { ahd_patch10_func, 385, 1, 1 },
- { ahd_patch10_func, 387, 1, 1 },
- { ahd_patch10_func, 399, 1, 1 },
- { ahd_patch1_func, 409, 1, 2 },
- { ahd_patch0_func, 410, 1, 1 },
- { ahd_patch1_func, 412, 1, 2 },
- { ahd_patch0_func, 413, 1, 1 },
- { ahd_patch1_func, 421, 1, 2 },
- { ahd_patch0_func, 422, 1, 1 },
- { ahd_patch2_func, 435, 1, 2 },
- { ahd_patch0_func, 436, 1, 1 },
- { ahd_patch11_func, 472, 1, 1 },
- { ahd_patch1_func, 480, 1, 2 },
- { ahd_patch0_func, 481, 1, 1 },
- { ahd_patch2_func, 493, 1, 2 },
- { ahd_patch0_func, 494, 1, 1 },
- { ahd_patch12_func, 497, 6, 2 },
- { ahd_patch0_func, 503, 1, 1 },
- { ahd_patch13_func, 524, 7, 1 },
- { ahd_patch14_func, 533, 1, 1 },
- { ahd_patch15_func, 542, 1, 1 },
- { ahd_patch16_func, 543, 1, 2 },
- { ahd_patch0_func, 544, 1, 1 },
- { ahd_patch17_func, 547, 1, 1 },
- { ahd_patch16_func, 548, 1, 1 },
- { ahd_patch18_func, 559, 1, 2 },
- { ahd_patch0_func, 560, 1, 1 },
- { ahd_patch1_func, 579, 1, 2 },
- { ahd_patch0_func, 580, 1, 1 },
- { ahd_patch1_func, 583, 1, 2 },
- { ahd_patch0_func, 584, 1, 1 },
- { ahd_patch2_func, 589, 1, 2 },
+ { ahd_patch1_func, 369, 1, 2 },
+ { ahd_patch0_func, 370, 1, 1 },
+ { ahd_patch1_func, 372, 1, 2 },
+ { ahd_patch0_func, 373, 1, 1 },
+ { ahd_patch10_func, 392, 1, 1 },
+ { ahd_patch10_func, 395, 1, 1 },
+ { ahd_patch10_func, 397, 1, 1 },
+ { ahd_patch10_func, 409, 1, 1 },
+ { ahd_patch1_func, 419, 1, 2 },
+ { ahd_patch0_func, 420, 1, 1 },
+ { ahd_patch1_func, 422, 1, 2 },
+ { ahd_patch0_func, 423, 1, 1 },
+ { ahd_patch1_func, 431, 1, 2 },
+ { ahd_patch0_func, 432, 1, 1 },
+ { ahd_patch2_func, 445, 1, 2 },
+ { ahd_patch0_func, 446, 1, 1 },
+ { ahd_patch11_func, 482, 1, 1 },
+ { ahd_patch1_func, 490, 1, 2 },
+ { ahd_patch0_func, 491, 1, 1 },
+ { ahd_patch2_func, 503, 1, 2 },
+ { ahd_patch0_func, 504, 1, 1 },
+ { ahd_patch12_func, 507, 6, 2 },
+ { ahd_patch0_func, 513, 1, 1 },
+ { ahd_patch13_func, 534, 7, 1 },
+ { ahd_patch14_func, 543, 1, 1 },
+ { ahd_patch15_func, 552, 1, 1 },
+ { ahd_patch16_func, 553, 1, 2 },
+ { ahd_patch0_func, 554, 1, 1 },
+ { ahd_patch17_func, 557, 1, 1 },
+ { ahd_patch16_func, 558, 1, 1 },
+ { ahd_patch18_func, 569, 1, 2 },
+ { ahd_patch0_func, 570, 1, 1 },
+ { ahd_patch1_func, 589, 1, 2 },
{ ahd_patch0_func, 590, 1, 1 },
- { ahd_patch2_func, 594, 1, 2 },
- { ahd_patch0_func, 595, 1, 1 },
- { ahd_patch1_func, 596, 1, 2 },
- { ahd_patch0_func, 597, 1, 1 },
- { ahd_patch2_func, 608, 1, 2 },
- { ahd_patch0_func, 609, 1, 1 },
- { ahd_patch19_func, 613, 1, 1 },
- { ahd_patch20_func, 618, 1, 1 },
- { ahd_patch21_func, 619, 2, 1 },
- { ahd_patch20_func, 623, 1, 2 },
- { ahd_patch0_func, 624, 1, 1 },
- { ahd_patch2_func, 627, 1, 2 },
- { ahd_patch0_func, 628, 1, 1 },
- { ahd_patch2_func, 643, 1, 2 },
- { ahd_patch0_func, 644, 1, 1 },
- { ahd_patch13_func, 645, 14, 1 },
- { ahd_patch1_func, 663, 1, 2 },
- { ahd_patch0_func, 664, 1, 1 },
- { ahd_patch13_func, 665, 1, 1 },
- { ahd_patch1_func, 677, 1, 2 },
- { ahd_patch0_func, 678, 1, 1 },
- { ahd_patch1_func, 685, 1, 2 },
- { ahd_patch0_func, 686, 1, 1 },
- { ahd_patch19_func, 709, 1, 1 },
- { ahd_patch19_func, 747, 1, 1 },
- { ahd_patch1_func, 758, 1, 2 },
- { ahd_patch0_func, 759, 1, 1 },
- { ahd_patch1_func, 776, 1, 2 },
- { ahd_patch0_func, 777, 1, 1 },
- { ahd_patch1_func, 779, 1, 2 },
- { ahd_patch0_func, 780, 1, 1 },
- { ahd_patch1_func, 783, 1, 2 },
- { ahd_patch0_func, 784, 1, 1 },
- { ahd_patch22_func, 786, 1, 2 },
- { ahd_patch0_func, 787, 2, 1 },
- { ahd_patch23_func, 790, 4, 2 },
- { ahd_patch0_func, 794, 1, 1 },
- { ahd_patch23_func, 802, 11, 1 }
+ { ahd_patch1_func, 593, 1, 2 },
+ { ahd_patch0_func, 594, 1, 1 },
+ { ahd_patch2_func, 599, 1, 2 },
+ { ahd_patch0_func, 600, 1, 1 },
+ { ahd_patch2_func, 604, 1, 2 },
+ { ahd_patch0_func, 605, 1, 1 },
+ { ahd_patch1_func, 606, 1, 2 },
+ { ahd_patch0_func, 607, 1, 1 },
+ { ahd_patch2_func, 618, 1, 2 },
+ { ahd_patch0_func, 619, 1, 1 },
+ { ahd_patch19_func, 623, 1, 1 },
+ { ahd_patch20_func, 628, 1, 1 },
+ { ahd_patch21_func, 629, 2, 1 },
+ { ahd_patch20_func, 633, 1, 2 },
+ { ahd_patch0_func, 634, 1, 1 },
+ { ahd_patch2_func, 637, 1, 2 },
+ { ahd_patch0_func, 638, 1, 1 },
+ { ahd_patch2_func, 653, 1, 2 },
+ { ahd_patch0_func, 654, 1, 1 },
+ { ahd_patch13_func, 655, 14, 1 },
+ { ahd_patch1_func, 673, 1, 2 },
+ { ahd_patch0_func, 674, 1, 1 },
+ { ahd_patch13_func, 675, 1, 1 },
+ { ahd_patch1_func, 687, 1, 2 },
+ { ahd_patch0_func, 688, 1, 1 },
+ { ahd_patch1_func, 695, 1, 2 },
+ { ahd_patch0_func, 696, 1, 1 },
+ { ahd_patch19_func, 719, 1, 1 },
+ { ahd_patch19_func, 757, 1, 1 },
+ { ahd_patch1_func, 768, 1, 2 },
+ { ahd_patch0_func, 769, 1, 1 },
+ { ahd_patch7_func, 785, 3, 1 },
+ { ahd_patch1_func, 789, 1, 2 },
+ { ahd_patch0_func, 790, 1, 1 },
+ { ahd_patch1_func, 792, 1, 2 },
+ { ahd_patch0_func, 793, 1, 1 },
+ { ahd_patch1_func, 796, 1, 2 },
+ { ahd_patch0_func, 797, 1, 1 },
+ { ahd_patch22_func, 799, 1, 2 },
+ { ahd_patch0_func, 800, 2, 1 },
+ { ahd_patch23_func, 803, 4, 2 },
+ { ahd_patch0_func, 807, 1, 1 },
+ { ahd_patch23_func, 815, 11, 1 }
};
static struct cs {
uint16_t begin;
uint16_t end;
} critical_sections[] = {
- { 17, 28 },
- { 29, 30 },
+ { 17, 30 },
{ 47, 58 },
{ 61, 63 },
{ 65, 66 },
{ 72, 92 },
- { 110, 137 },
- { 138, 175 },
- { 180, 188 },
- { 213, 264 },
- { 425, 433 },
- { 443, 445 },
- { 448, 457 },
- { 709, 739 },
- { 749, 753 }
+ { 110, 142 },
+ { 143, 180 },
+ { 185, 193 },
+ { 218, 274 },
+ { 435, 443 },
+ { 453, 455 },
+ { 458, 467 },
+ { 719, 749 },
+ { 759, 763 }
};
static const int num_critical_sections = sizeof(critical_sections)
* IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGES.
*
- * $Id: //depot/aic7xxx/aic7xxx/aicasm/aicasm.c#22 $
+ * $Id: //depot/aic7xxx/aic7xxx/aicasm/aicasm.c#23 $
*
* $FreeBSD$
*/
while (line < cur_instr->srcline) {
fgets(buf, sizeof(buf), ifile);
- fprintf(listfile, "\t\t%s", buf);
+ fprintf(listfile, " \t%s", buf);
line++;
}
- fprintf(listfile, "%03x %02x%02x%02x%02x", instrptr,
+ fprintf(listfile, "%04x %02x%02x%02x%02x", instrptr,
#ifdef __LITTLE_ENDIAN
cur_instr->format.bytes[0],
cur_instr->format.bytes[1],
cur_instr->format.bytes[1],
cur_instr->format.bytes[0]);
#endif
- fgets(buf, sizeof(buf), ifile);
- fprintf(listfile, "\t%s", buf);
- line++;
+ /*
+ * Macro expansions can cause several instructions
+ * to be output for a single source line. Only
+ * advance the line once in these cases.
+ */
+ if (line == cur_instr->srcline) {
+ fgets(buf, sizeof(buf), ifile);
+ fprintf(listfile, "\t%s", buf);
+ line++;
+ } else {
+ fprintf(listfile, "\n");
+ }
instrptr++;
}
/* Dump the remainder of the file */
while(fgets(buf, sizeof(buf), ifile) != NULL)
- fprintf(listfile, "\t\t%s", buf);
+ fprintf(listfile, " %s", buf);
fclose(ifile);
}
* IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGES.
*
- * $Id: //depot/aic7xxx/aic7xxx/aicasm/aicasm_gram.y#29 $
+ * $Id: //depot/aic7xxx/aic7xxx/aicasm/aicasm_gram.y#30 $
*
* $FreeBSD$
*/
%token T_END_CS
+%token T_PAD_PAGE
+
%token T_FIELD
%token T_ENUM
%token <value> T_OR
+/* 16 bit extensions */
+%token <value> T_OR16 T_AND16 T_XOR16 T_ADD16
+%token <value> T_ADC16 T_MVI16 T_TEST16 T_CMP16 T_CMPXCHG
+
%token T_RET
%token T_NOP
%type <expression> expression immediate immediate_or_a
-%type <value> export ret f1_opcode f2_opcode jmp_jc_jnc_call jz_jnz je_jne
+%type <value> export ret f1_opcode f2_opcode f4_opcode jmp_jc_jnc_call jz_jnz je_jne
%type <value> mode_value mode_list macro_arglist
| T_ROR { $$ = AIC_OP_ROR; }
;
+f4_opcode:
+ T_OR16 { $$ = AIC_OP_OR16; }
+| T_AND16 { $$ = AIC_OP_AND16; }
+| T_XOR16 { $$ = AIC_OP_XOR16; }
+| T_ADD16 { $$ = AIC_OP_ADD16; }
+| T_ADC16 { $$ = AIC_OP_ADC16; }
+| T_MVI16 { $$ = AIC_OP_MVI16; }
+;
+
code:
f2_opcode destination ',' expression opt_source ret ';'
{
* IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGES.
*
- * $Id: //depot/aic7xxx/aic7xxx/aicasm/aicasm_insformat.h#11 $
+ * $Id: //depot/aic7xxx/aic7xxx/aicasm/aicasm_insformat.h#12 $
*
* $FreeBSD$
*/
#include <asm/byteorder.h>
+/* 8bit ALU logic operations */
struct ins_format1 {
#ifdef __LITTLE_ENDIAN
uint32_t immediate : 8,
#endif
};
+/* 8bit ALU shift/rotate operations */
struct ins_format2 {
#ifdef __LITTLE_ENDIAN
uint32_t shift_control : 8,
#endif
};
+/* 8bit branch control operations */
struct ins_format3 {
#ifdef __LITTLE_ENDIAN
uint32_t immediate : 8,
#endif
};
+/* 16bit ALU logic operations */
+struct ins_format4 {
+#ifdef __LITTLE_ENDIAN
+ uint32_t opcode_ext : 8,
+ source : 9,
+ destination : 9,
+ ret : 1,
+ opcode : 4,
+ parity : 1;
+#else
+ uint32_t parity : 1,
+ opcode : 4,
+ ret : 1,
+ destination : 9,
+ source : 9,
+ opcode_ext : 8;
+#endif
+};
+
+/* 16bit branch control operations */
+struct ins_format5 {
+#ifdef __LITTLE_ENDIAN
+ uint32_t opcode_ext : 8,
+ source : 9,
+ address : 10,
+ opcode : 4,
+ parity : 1;
+#else
+ uint32_t parity : 1,
+ opcode : 4,
+ address : 10,
+ source : 9,
+ opcode_ext : 8;
+#endif
+};
+
+/* Far branch operations */
+struct ins_format6 {
+#ifdef __LITTLE_ENDIAN
+ uint32_t page : 3,
+ opcode_ext : 5,
+ source : 9,
+ address : 10,
+ opcode : 4,
+ parity : 1;
+#else
+ uint32_t parity : 1,
+ opcode : 4,
+ address : 10,
+ source : 9,
+ opcode_ext : 5,
+ page : 3;
+#endif
+};
+
union ins_formats {
struct ins_format1 format1;
struct ins_format2 format2;
struct ins_format3 format3;
+ struct ins_format4 format4;
+ struct ins_format5 format5;
+ struct ins_format6 format6;
uint8_t bytes[4];
uint32_t integer;
};
#define AIC_OP_ROL 0x5
#define AIC_OP_BMOV 0x6
+#define AIC_OP_MVI16 0x7
+
#define AIC_OP_JMP 0x8
#define AIC_OP_JC 0x9
#define AIC_OP_JNC 0xa
#define AIC_OP_SHL 0x10
#define AIC_OP_SHR 0x20
#define AIC_OP_ROR 0x30
+
+/* 16bit Ops. Low byte main opcode. High byte extended opcode. */
+#define AIC_OP_OR16 0x8005
+#define AIC_OP_AND16 0x8105
+#define AIC_OP_XOR16 0x8205
+#define AIC_OP_ADD16 0x8305
+#define AIC_OP_ADC16 0x8405
+#define AIC_OP_JNE16 0x8805
+#define AIC_OP_JNZ16 0x8905
+#define AIC_OP_JE16 0x8C05
+#define AIC_OP_JZ16 0x8B05
+#define AIC_OP_JMP16 0x9005
+#define AIC_OP_JC16 0x9105
+#define AIC_OP_JNC16 0x9205
+#define AIC_OP_CALL16 0x9305
+#define AIC_OP_CALL16 0x9305
+
+/* Page extension is low three bits of second opcode byte. */
+#define AIC_OP_JMPF 0xA005
+#define AIC_OP_CALLF 0xB005
+#define AIC_OP_JCF 0xC005
+#define AIC_OP_JNCF 0xD005
+#define AIC_OP_CMPXCHG 0xE005
* IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGES.
*
- * $Id: //depot/aic7xxx/aic7xxx/aicasm/aicasm_scan.l#19 $
+ * $Id: //depot/aic7xxx/aic7xxx/aicasm/aicasm_scan.l#20 $
*
* $FreeBSD$
*/
*string_buf_ptr++ = *yptr++;
}
}
-
+else { return T_ELSE; }
VERSION { return T_VERSION; }
PREFIX { return T_PREFIX; }
PATCH_ARG_LIST { return T_PATCH_ARG_LIST; }
yylval.value = WO;
return T_MODE;
}
-BEGIN_CRITICAL { return T_BEGIN_CS; }
-END_CRITICAL { return T_END_CS; }
-SET_SRC_MODE { return T_SET_SRC_MODE; }
-SET_DST_MODE { return T_SET_DST_MODE; }
field { return T_FIELD; }
enum { return T_ENUM; }
mask { return T_MASK; }
sindex { return T_SINDEX; }
A { return T_A; }
+ /* Instruction Formatting */
+PAD_PAGE { return T_PAD_PAGE; }
+BEGIN_CRITICAL { return T_BEGIN_CS; }
+END_CRITICAL { return T_END_CS; }
+SET_SRC_MODE { return T_SET_SRC_MODE; }
+SET_DST_MODE { return T_SET_DST_MODE; }
+
/* Opcodes */
shl { return T_SHL; }
shr { return T_SHR; }
or { return T_OR; }
ret { return T_RET; }
nop { return T_NOP; }
-else { return T_ELSE; }
+
+ /* ARP2 16bit extensions */
+or16 { return T_OR16; }
+and16 { return T_AND16; }
+xor16 { return T_XOR16; }
+add16 { return T_ADD16; }
+adc16 { return T_ADC16; }
+mvi16 { return T_MVI16; }
+test16 { return T_TEST16; }
+cmp16 { return T_CMP16; }
+cmpxchg { return T_CMPXCHG; }
/* Allowed Symbols */
\<\< { return T_EXPR_LSHIFT; }
{ 0x8086, 0x27c0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich6_sata_ahci },
{ 0x8086, 0x27c4, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich6_sata_ahci },
{ 0x8086, 0x2680, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich6_sata_ahci },
+ { 0x8086, 0x2820, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich6_sata_ahci },
+ { 0x8086, 0x2825, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich6_sata_ahci },
+ { 0x8086, 0x2828, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich6_sata_ahci },
{ } /* terminate list */
};
* total_xfer_length in xferred. These values are restored in
* pci_unmap_srb_sense. This is the only place xferred is used.
*/
+ unsigned char *virt_addr_req; /* Saved virtual address of the request buffer */
u32 xferred; /* Saved copy of total_xfer_length */
u16 state;
sg_verify_length(srb);
/* we need the corresponding virtual address */
- if (!segment) {
+ if (!segment || (srb->flag & AUTO_REQSENSE)) {
srb->virt_addr += xferred;
return;
}
srb->segment_x[DC395x_MAX_SG_LISTENTRY - 1].address;
srb->segment_x[0].length =
srb->segment_x[DC395x_MAX_SG_LISTENTRY - 1].length;
+ srb->virt_addr = srb->virt_addr_req;
}
srb->xferred = srb->total_xfer_length;
/* srb->segment_x : a one entry of S/G list table */
srb->total_xfer_length = sizeof(cmd->sense_buffer);
+ srb->virt_addr_req = srb->virt_addr;
+ srb->virt_addr = cmd->sense_buffer;
srb->segment_x[0].length = sizeof(cmd->sense_buffer);
/* Map sense buffer */
srb->segment_x[0].address =
static int init_timeout = 5;
static int max_requests = 50;
-#define IBMVSCSI_VERSION "1.5.7"
+#define IBMVSCSI_VERSION "1.5.8"
MODULE_DESCRIPTION("IBM Virtual SCSI");
MODULE_AUTHOR("Dave Boutcher");
static int ibmvscsi_send_srp_event(struct srp_event_struct *evt_struct,
struct ibmvscsi_host_data *hostdata)
{
- struct scsi_cmnd *cmnd;
u64 *crq_as_u64 = (u64 *) &evt_struct->crq;
int rc;
* can handle more requests (can_queue) when we actually can't
*/
if ((evt_struct->crq.format == VIOSRP_SRP_FORMAT) &&
- (atomic_dec_if_positive(&hostdata->request_limit) < 0)) {
- /* See if the adapter is disabled */
- if (atomic_read(&hostdata->request_limit) < 0)
- goto send_error;
-
- printk(KERN_WARNING
- "ibmvscsi: Warning, request_limit exceeded\n");
- unmap_cmd_data(&evt_struct->iu.srp.cmd,
- evt_struct,
- hostdata->dev);
- free_event_struct(&hostdata->pool, evt_struct);
- return SCSI_MLQUEUE_HOST_BUSY;
- }
+ (atomic_dec_if_positive(&hostdata->request_limit) < 0))
+ goto send_error;
/* Copy the IU into the transfer area */
*evt_struct->xfer_iu = evt_struct->iu;
ibmvscsi_send_crq(hostdata, crq_as_u64[0], crq_as_u64[1])) != 0) {
list_del(&evt_struct->list);
- printk(KERN_ERR "ibmvscsi: failed to send event struct rc %d\n",
+ printk(KERN_ERR "ibmvscsi: send error %d\n",
rc);
goto send_error;
}
send_error:
unmap_cmd_data(&evt_struct->iu.srp.cmd, evt_struct, hostdata->dev);
- if ((cmnd = evt_struct->cmnd) != NULL) {
- cmnd->result = DID_ERROR << 16;
- evt_struct->cmnd_done(cmnd);
- } else if (evt_struct->done)
- evt_struct->done(evt_struct);
-
free_event_struct(&hostdata->pool, evt_struct);
- return 0;
+ return SCSI_MLQUEUE_HOST_BUSY;
}
/**
case SRP_LOGIN_RSP_TYPE: /* it worked! */
break;
case SRP_LOGIN_REJ_TYPE: /* refused! */
- printk(KERN_INFO "ibmvscsi: SRP_LOGIN_REQ rejected\n");
+ printk(KERN_INFO "ibmvscsi: SRP_LOGIN_REJ reason %u\n",
+ evt_struct->xfer_iu->srp.login_rej.reason);
/* Login failed. */
atomic_set(&hostdata->request_limit, -1);
return;
return;
}
+ /* If we had any pending I/Os, kick them */
+ scsi_unblock_requests(hostdata->host);
+
send_mad_adapter_info(hostdata);
return;
}
init_timeout * HZ);
login = &evt_struct->iu.srp.login_req;
+ memset(login, 0x00, sizeof(struct srp_login_req));
login->type = SRP_LOGIN_REQ_TYPE;
login->max_requested_initiator_to_target_iulen = sizeof(union srp_iu);
login->required_buffer_formats = 0x0006;
* purge_requests: Our virtual adapter just shut down. purge any sent requests
* @hostdata: the adapter
*/
-static void purge_requests(struct ibmvscsi_host_data *hostdata)
+static void purge_requests(struct ibmvscsi_host_data *hostdata, int error_code)
{
struct srp_event_struct *tmp_evt, *pos;
unsigned long flags;
list_for_each_entry_safe(tmp_evt, pos, &hostdata->sent, list) {
list_del(&tmp_evt->list);
if (tmp_evt->cmnd) {
- tmp_evt->cmnd->result = (DID_ERROR << 16);
+ tmp_evt->cmnd->result = (error_code << 16);
unmap_cmd_data(&tmp_evt->iu.srp.cmd,
tmp_evt,
tmp_evt->hostdata->dev);
printk(KERN_ERR "ibmvscsi: unknown crq message type\n");
}
return;
- case 0xFF: /* Hypervisor telling us the connection is closed */
- printk(KERN_INFO "ibmvscsi: Virtual adapter failed!\n");
+ case 0xFF: /* Hypervisor telling us the connection is closed */
+ scsi_block_requests(hostdata->host);
+ if (crq->format == 0x06) {
+ /* We need to re-setup the interpartition connection */
+ printk(KERN_INFO
+ "ibmvscsi: Re-enabling adapter!\n");
+ purge_requests(hostdata, DID_REQUEUE);
+ if (ibmvscsi_reenable_crq_queue(&hostdata->queue,
+ hostdata) == 0)
+ if (ibmvscsi_send_crq(hostdata,
+ 0xC001000000000000LL, 0))
+ printk(KERN_ERR
+ "ibmvscsi: transmit error after"
+ " enable\n");
+ } else {
+ printk(KERN_INFO
+ "ibmvscsi: Virtual adapter failed rc %d!\n",
+ crq->format);
- atomic_set(&hostdata->request_limit, -1);
- purge_requests(hostdata);
- ibmvscsi_reset_crq_queue(&hostdata->queue, hostdata);
+ atomic_set(&hostdata->request_limit, -1);
+ purge_requests(hostdata, DID_ERROR);
+ ibmvscsi_reset_crq_queue(&hostdata->queue, hostdata);
+ }
+ scsi_unblock_requests(hostdata->host);
return;
case 0x80: /* real payload */
break;
int ibmvscsi_reset_crq_queue(struct crq_queue *queue,
struct ibmvscsi_host_data *hostdata);
+int ibmvscsi_reenable_crq_queue(struct crq_queue *queue,
+ struct ibmvscsi_host_data *hostdata);
+
void ibmvscsi_handle_crq(struct viosrp_crq *crq,
struct ibmvscsi_host_data *hostdata);
int ibmvscsi_send_crq(struct ibmvscsi_host_data *hostdata,
return 0;
}
+/**
+ * reenable_crq_queue: - reenables a crq after a failure
+ * @queue: crq_queue to initialize and register
+ * @hostdata: ibmvscsi_host_data of host
+ *
+ * no-op for iSeries
+ */
+int ibmvscsi_reenable_crq_queue(struct crq_queue *queue,
+ struct ibmvscsi_host_data *hostdata)
+{
+ return 0;
+}
+
/**
* ibmvscsi_send_crq: - Send a CRQ
* @hostdata: the adapter
return -1;
}
+/**
+ * reenable_crq_queue: - reenables a crq after
+ * @queue: crq_queue to initialize and register
+ * @hostdata: ibmvscsi_host_data of host
+ *
+ */
+int ibmvscsi_reenable_crq_queue(struct crq_queue *queue,
+ struct ibmvscsi_host_data *hostdata)
+{
+ int rc;
+ struct vio_dev *vdev = to_vio_dev(hostdata->dev);
+
+ /* Re-enable the CRQ */
+ do {
+ rc = plpar_hcall_norets(H_ENABLE_CRQ, vdev->unit_address);
+ } while ((rc == H_InProgress) || (rc == H_Busy) || (H_isLongBusy(rc)));
+
+ if (rc)
+ printk(KERN_ERR "ibmvscsi: Error %d enabling adapter\n", rc);
+ return rc;
+}
+
/**
* reset_crq_queue: - resets a crq after a failure
* @queue: crq_queue to initialize and register
int device_error;
uint32_t transfer_len;
IPS_DCDB_TABLE_TAPE *tapeDCDB;
+ IPS_SCSI_INQ_DATA inquiryData;
METHOD_TRACE("ips_map_status", 1);
errcode = DID_OK;
/* Restrict access to physical DASD */
- if ((scb->scsi_cmd->cmnd[0] == INQUIRY) &&
- ((((char *) scb->scsi_cmd->
- buffer)[0] & 0x1f) == TYPE_DISK)) {
- /* underflow -- no error */
- /* restrict access to physical DASD */
- errcode = DID_TIME_OUT;
- break;
+ if (scb->scsi_cmd->cmnd[0] == INQUIRY) {
+ ips_scmd_buf_read(scb->scsi_cmd,
+ &inquiryData, sizeof (inquiryData));
+ if ((inquiryData.DeviceType & 0x1f) == TYPE_DISK) {
+ errcode = DID_TIME_OUT;
+ break;
+ }
}
} else
errcode = DID_ERROR;
uint8_t basic_status;
uint8_t ext_status;
int errcode;
+ IPS_SCSI_INQ_DATA inquiryData;
METHOD_TRACE("ips_chkstatus", 1);
scb->scsi_cmd->result = errcode << 16;
} else { /* bus == 0 */
/* restrict access to physical drives */
- if ((scb->scsi_cmd->cmnd[0] == INQUIRY) &&
- ((((char *) scb->scsi_cmd->buffer)[0] & 0x1f) ==
- TYPE_DISK)) {
-
- scb->scsi_cmd->result = DID_TIME_OUT << 16;
+ if (scb->scsi_cmd->cmnd[0] == INQUIRY) {
+ ips_scmd_buf_read(scb->scsi_cmd,
+ &inquiryData, sizeof (inquiryData));
+ if ((inquiryData.DeviceType & 0x1f) == TYPE_DISK)
+ scb->scsi_cmd->result = DID_TIME_OUT << 16;
}
} /* else */
} else { /* recovered error / success */
break;
/* Delay for 1 Second */
- MDELAY(IPS_ONE_SEC);
+ msleep(IPS_ONE_SEC);
}
if (j >= 45)
break;
/* Delay for 1 Second */
- MDELAY(IPS_ONE_SEC);
+ msleep(IPS_ONE_SEC);
}
if (j >= 240)
break;
/* Delay for 1 Second */
- MDELAY(IPS_ONE_SEC);
+ msleep(IPS_ONE_SEC);
}
if (i >= 240)
break;
/* Delay for 1 Second */
- MDELAY(IPS_ONE_SEC);
+ msleep(IPS_ONE_SEC);
}
if (j >= 45)
break;
/* Delay for 1 Second */
- MDELAY(IPS_ONE_SEC);
+ msleep(IPS_ONE_SEC);
}
if (j >= 240)
break;
/* Delay for 1 Second */
- MDELAY(IPS_ONE_SEC);
+ msleep(IPS_ONE_SEC);
}
if (i >= 240)
break;
/* Delay for 1 Second */
- MDELAY(IPS_ONE_SEC);
+ msleep(IPS_ONE_SEC);
}
if (i >= 45) {
if (Post != 0x4F00)
break;
/* Delay for 1 Second */
- MDELAY(IPS_ONE_SEC);
+ msleep(IPS_ONE_SEC);
}
if (i >= 120) {
break;
/* Delay for 1 Second */
- MDELAY(IPS_ONE_SEC);
+ msleep(IPS_ONE_SEC);
}
if (i >= 240) {
outb(IPS_BIT_RST, ha->io_addr + IPS_REG_SCPR);
/* Delay for 1 Second */
- MDELAY(IPS_ONE_SEC);
+ msleep(IPS_ONE_SEC);
outb(0, ha->io_addr + IPS_REG_SCPR);
/* Delay for 1 Second */
- MDELAY(IPS_ONE_SEC);
+ msleep(IPS_ONE_SEC);
if ((*ha->func.init) (ha))
break;
writeb(IPS_BIT_RST, ha->mem_ptr + IPS_REG_SCPR);
/* Delay for 1 Second */
- MDELAY(IPS_ONE_SEC);
+ msleep(IPS_ONE_SEC);
writeb(0, ha->mem_ptr + IPS_REG_SCPR);
/* Delay for 1 Second */
- MDELAY(IPS_ONE_SEC);
+ msleep(IPS_ONE_SEC);
if ((*ha->func.init) (ha))
break;
writel(0x80000000, ha->mem_ptr + IPS_REG_I960_IDR);
/* Delay for 5 Seconds */
- MDELAY(5 * IPS_ONE_SEC);
+ msleep(5 * IPS_ONE_SEC);
/* Do a PCI config read to wait for adapter */
pci_read_config_byte(ha->pcidev, 4, &junk);
if (dev->flags & ATA_DFLAG_PIO) {
tf->protocol = ATA_PROT_PIO;
index = dev->multi_count ? 0 : 8;
+ } else if (lba48 && (qc->ap->flags & ATA_FLAG_PIO_LBA48)) {
+ /* Unable to use DMA due to host limitation */
+ tf->protocol = ATA_PROT_PIO;
+ index = dev->multi_count ? 0 : 4;
} else {
tf->protocol = ATA_PROT_DMA;
index = 16;
{
u16 modes;
- /* Usual case. Word 53 indicates word 88 is valid */
- if (adev->id[ATA_ID_FIELD_VALID] & (1 << 2)) {
+ /* Usual case. Word 53 indicates word 64 is valid */
+ if (adev->id[ATA_ID_FIELD_VALID] & (1 << 1)) {
modes = adev->id[ATA_ID_PIO_MODES] & 0x03;
modes <<= 3;
modes |= 0x7;
return modes;
}
- /* If word 88 isn't valid then Word 51 holds the PIO timing number
- for the maximum. Turn it into a mask and return it */
- modes = (2 << (adev->id[ATA_ID_OLD_PIO_MODES] & 0xFF)) - 1 ;
+ /* If word 64 isn't valid then Word 51 high byte holds the PIO timing
+ number for the maximum. Turn it into a mask and return it */
+ modes = (2 << ((adev->id[ATA_ID_OLD_PIO_MODES] >> 8) & 0xFF)) - 1 ;
return modes;
+ /* But wait.. there's more. Design your standards by committee and
+ you too can get a free iordy field to process. However its the
+ speeds not the modes that are supported... Note drivers using the
+ timing API will get this right anyway */
}
struct ata_exec_internal_arg {
return AC_ERR_OTHER;
}
+/**
+ * ata_pio_need_iordy - check if iordy needed
+ * @adev: ATA device
+ *
+ * Check if the current speed of the device requires IORDY. Used
+ * by various controllers for chip configuration.
+ */
+
+unsigned int ata_pio_need_iordy(const struct ata_device *adev)
+{
+ int pio;
+ int speed = adev->pio_mode - XFER_PIO_0;
+
+ if (speed < 2)
+ return 0;
+ if (speed > 2)
+ return 1;
+
+ /* If we have no drive specific rule, then PIO 2 is non IORDY */
+
+ if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE */
+ pio = adev->id[ATA_ID_EIDE_PIO];
+ /* Is the speed faster than the drive allows non IORDY ? */
+ if (pio) {
+ /* This is cycle times not frequency - watch the logic! */
+ if (pio > 240) /* PIO2 is 240nS per cycle */
+ return 1;
+ return 0;
+ }
+ }
+ return 0;
+}
+
/**
* ata_dev_identify - obtain IDENTIFY x DEVICE page
* @ap: port on which device we wish to probe resides
ap->udma_mask &= ATA_UDMA5;
ap->host->max_sectors = ATA_MAX_SECTORS;
ap->host->hostt->max_sectors = ATA_MAX_SECTORS;
- ap->device->flags |= ATA_DFLAG_LOCK_SECTORS;
+ ap->device[i].flags |= ATA_DFLAG_LOCK_SECTORS;
}
if (ap->ops->dev_config)
static void ata_data_xfer(struct ata_port *ap, unsigned char *buf,
unsigned int buflen, int do_write)
{
- if (ap->flags & ATA_FLAG_MMIO)
- ata_mmio_data_xfer(ap, buf, buflen, do_write);
- else
- ata_pio_data_xfer(ap, buf, buflen, do_write);
+ /* Make the crap hardware pay the costs not the good stuff */
+ if (unlikely(ap->flags & ATA_FLAG_IRQ_MASK)) {
+ unsigned long flags;
+ local_irq_save(flags);
+ if (ap->flags & ATA_FLAG_MMIO)
+ ata_mmio_data_xfer(ap, buf, buflen, do_write);
+ else
+ ata_pio_data_xfer(ap, buf, buflen, do_write);
+ local_irq_restore(flags);
+ } else {
+ if (ap->flags & ATA_FLAG_MMIO)
+ ata_mmio_data_xfer(ap, buf, buflen, do_write);
+ else
+ ata_pio_data_xfer(ap, buf, buflen, do_write);
+ }
}
/**
EXPORT_SYMBOL_GPL(ata_dev_config);
EXPORT_SYMBOL_GPL(ata_scsi_simulate);
+EXPORT_SYMBOL_GPL(ata_pio_need_iordy);
EXPORT_SYMBOL_GPL(ata_timing_compute);
EXPORT_SYMBOL_GPL(ata_timing_merge);
return sizeof(def_rw_recovery_mpage);
}
+/*
+ * We can turn this into a real blacklist if it's needed, for now just
+ * blacklist any Maxtor BANC1G10 revision firmware
+ */
+static int ata_dev_supports_fua(u16 *id)
+{
+ unsigned char model[41], fw[9];
+
+ if (!ata_id_has_fua(id))
+ return 0;
+
+ model[40] = '\0';
+ fw[8] = '\0';
+
+ ata_dev_id_string(id, model, ATA_ID_PROD_OFS, sizeof(model) - 1);
+ ata_dev_id_string(id, fw, ATA_ID_FW_REV_OFS, sizeof(fw) - 1);
+
+ if (strncmp(model, "Maxtor", 6))
+ return 1;
+ if (strncmp(fw, "BANC1G10", 8))
+ return 1;
+
+ return 0; /* blacklisted */
+}
+
/**
* ata_scsiop_mode_sense - Simulate MODE SENSE 6, 10 commands
* @args: device IDENTIFY data / SCSI command of interest.
return 0;
dpofua = 0;
- if (ata_id_has_fua(args->id) && dev->flags & ATA_DFLAG_LBA48 &&
+ if (ata_dev_supports_fua(args->id) && dev->flags & ATA_DFLAG_LBA48 &&
(!(dev->flags & ATA_DFLAG_PIO) || dev->multi_count))
dpofua = 1 << 4;
* 2 of the License, or (at your option) any later version.
*
* FILE : megaraid_sas.c
- * Version : v00.00.02.00-rc4
+ * Version : v00.00.02.02
*
* Authors:
* Sreenivas Bagalkote <Sreenivas.Bagalkote@lsil.com>
{
PCI_VENDOR_ID_LSI_LOGIC,
- PCI_DEVICE_ID_LSI_SAS1064R,
+ PCI_DEVICE_ID_LSI_SAS1064R, // xscale IOP
PCI_ANY_ID,
PCI_ANY_ID,
},
{
PCI_VENDOR_ID_DELL,
- PCI_DEVICE_ID_DELL_PERC5,
+ PCI_DEVICE_ID_DELL_PERC5, // xscale IOP
PCI_ANY_ID,
PCI_ANY_ID,
},
spin_unlock_irqrestore(&instance->cmd_pool_lock, flags);
}
+
+/**
+* The following functions are defined for xscale
+* (deviceid : 1064R, PERC5) controllers
+*/
+
/**
- * megasas_enable_intr - Enables interrupts
+ * megasas_enable_intr_xscale - Enables interrupts
* @regs: MFI register set
*/
static inline void
-megasas_enable_intr(struct megasas_register_set __iomem * regs)
+megasas_enable_intr_xscale(struct megasas_register_set __iomem * regs)
{
writel(1, &(regs)->outbound_intr_mask);
readl(®s->outbound_intr_mask);
}
+/**
+ * megasas_read_fw_status_reg_xscale - returns the current FW status value
+ * @regs: MFI register set
+ */
+static u32
+megasas_read_fw_status_reg_xscale(struct megasas_register_set __iomem * regs)
+{
+ return readl(&(regs)->outbound_msg_0);
+}
+/**
+ * megasas_clear_interrupt_xscale - Check & clear interrupt
+ * @regs: MFI register set
+ */
+static int
+megasas_clear_intr_xscale(struct megasas_register_set __iomem * regs)
+{
+ u32 status;
+ /*
+ * Check if it is our interrupt
+ */
+ status = readl(®s->outbound_intr_status);
+
+ if (!(status & MFI_OB_INTR_STATUS_MASK)) {
+ return 1;
+ }
+
+ /*
+ * Clear the interrupt by writing back the same value
+ */
+ writel(status, ®s->outbound_intr_status);
+
+ return 0;
+}
+
+/**
+ * megasas_fire_cmd_xscale - Sends command to the FW
+ * @frame_phys_addr : Physical address of cmd
+ * @frame_count : Number of frames for the command
+ * @regs : MFI register set
+ */
+static inline void
+megasas_fire_cmd_xscale(dma_addr_t frame_phys_addr,u32 frame_count, struct megasas_register_set __iomem *regs)
+{
+ writel((frame_phys_addr >> 3)|(frame_count),
+ &(regs)->inbound_queue_port);
+}
+
+static struct megasas_instance_template megasas_instance_template_xscale = {
+
+ .fire_cmd = megasas_fire_cmd_xscale,
+ .enable_intr = megasas_enable_intr_xscale,
+ .clear_intr = megasas_clear_intr_xscale,
+ .read_fw_status_reg = megasas_read_fw_status_reg_xscale,
+};
+
+/**
+* This is the end of set of functions & definitions specific
+* to xscale (deviceid : 1064R, PERC5) controllers
+*/
+
/**
* megasas_disable_intr - Disables interrupts
* @regs: MFI register set
static inline void
megasas_disable_intr(struct megasas_register_set __iomem * regs)
{
- u32 mask = readl(®s->outbound_intr_mask) & (~0x00000001);
+ u32 mask = 0x1f;
writel(mask, ®s->outbound_intr_mask);
/* Dummy readl to force pci flush */
/*
* Issue the frame using inbound queue port
*/
- writel(cmd->frame_phys_addr >> 3,
- &instance->reg_set->inbound_queue_port);
+ instance->instancet->fire_cmd(cmd->frame_phys_addr ,0,instance->reg_set);
/*
* Wait for cmd_status to change
{
cmd->cmd_status = ENODATA;
- writel(cmd->frame_phys_addr >> 3,
- &instance->reg_set->inbound_queue_port);
+ instance->instancet->fire_cmd(cmd->frame_phys_addr ,0,instance->reg_set);
wait_event(instance->int_cmd_wait_q, (cmd->cmd_status != ENODATA));
cmd->sync_cmd = 1;
cmd->cmd_status = 0xFF;
- writel(cmd->frame_phys_addr >> 3,
- &instance->reg_set->inbound_queue_port);
+ instance->instancet->fire_cmd(cmd->frame_phys_addr ,0,instance->reg_set);
/*
* Wait for this cmd to complete
}
/**
- * megasas_build_cmd - Prepares a command packet
- * @instance: Adapter soft state
- * @scp: SCSI command
- * @frame_count: [OUT] Number of frames used to prepare this command
+ * megasas_is_ldio - Checks if the cmd is for logical drive
+ * @scmd: SCSI command
+ *
+ * Called by megasas_queue_command to find out if the command to be queued
+ * is a logical drive command
*/
-static struct megasas_cmd *megasas_build_cmd(struct megasas_instance
- *instance,
- struct scsi_cmnd *scp,
- int *frame_count)
+static inline int megasas_is_ldio(struct scsi_cmnd *cmd)
{
- u32 logical_cmd;
- struct megasas_cmd *cmd;
-
- /*
- * Find out if this is logical or physical drive command.
- */
- logical_cmd = MEGASAS_IS_LOGICAL(scp);
-
- /*
- * Logical drive command
- */
- if (logical_cmd) {
-
- if (scp->device->id >= MEGASAS_MAX_LD) {
- scp->result = DID_BAD_TARGET << 16;
- return NULL;
- }
-
- switch (scp->cmnd[0]) {
-
- case READ_10:
- case WRITE_10:
- case READ_12:
- case WRITE_12:
- case READ_6:
- case WRITE_6:
- case READ_16:
- case WRITE_16:
- /*
- * Fail for LUN > 0
- */
- if (scp->device->lun) {
- scp->result = DID_BAD_TARGET << 16;
- return NULL;
- }
-
- cmd = megasas_get_cmd(instance);
-
- if (!cmd) {
- scp->result = DID_IMM_RETRY << 16;
- return NULL;
- }
-
- *frame_count = megasas_build_ldio(instance, scp, cmd);
-
- if (!(*frame_count)) {
- megasas_return_cmd(instance, cmd);
- return NULL;
- }
-
- return cmd;
-
- default:
- /*
- * Fail for LUN > 0
- */
- if (scp->device->lun) {
- scp->result = DID_BAD_TARGET << 16;
- return NULL;
- }
-
- cmd = megasas_get_cmd(instance);
-
- if (!cmd) {
- scp->result = DID_IMM_RETRY << 16;
- return NULL;
- }
-
- *frame_count = megasas_build_dcdb(instance, scp, cmd);
-
- if (!(*frame_count)) {
- megasas_return_cmd(instance, cmd);
- return NULL;
- }
-
- return cmd;
- }
- } else {
- cmd = megasas_get_cmd(instance);
-
- if (!cmd) {
- scp->result = DID_IMM_RETRY << 16;
- return NULL;
- }
-
- *frame_count = megasas_build_dcdb(instance, scp, cmd);
-
- if (!(*frame_count)) {
- megasas_return_cmd(instance, cmd);
- return NULL;
- }
-
- return cmd;
+ if (!MEGASAS_IS_LOGICAL(cmd))
+ return 0;
+ switch (cmd->cmnd[0]) {
+ case READ_10:
+ case WRITE_10:
+ case READ_12:
+ case WRITE_12:
+ case READ_6:
+ case WRITE_6:
+ case READ_16:
+ case WRITE_16:
+ return 1;
+ default:
+ return 0;
}
-
- return NULL;
}
/**
scmd->scsi_done = done;
scmd->result = 0;
- cmd = megasas_build_cmd(instance, scmd, &frame_count);
-
- if (!cmd) {
- done(scmd);
- return 0;
+ if (MEGASAS_IS_LOGICAL(scmd) &&
+ (scmd->device->id >= MEGASAS_MAX_LD || scmd->device->lun)) {
+ scmd->result = DID_BAD_TARGET << 16;
+ goto out_done;
}
+ cmd = megasas_get_cmd(instance);
+ if (!cmd)
+ return SCSI_MLQUEUE_HOST_BUSY;
+
+ /*
+ * Logical drive command
+ */
+ if (megasas_is_ldio(scmd))
+ frame_count = megasas_build_ldio(instance, scmd, cmd);
+ else
+ frame_count = megasas_build_dcdb(instance, scmd, cmd);
+
+ if (!frame_count)
+ goto out_return_cmd;
+
cmd->scmd = scmd;
scmd->SCp.ptr = (char *)cmd;
scmd->SCp.sent_command = jiffies;
instance->fw_outstanding++;
spin_unlock_irqrestore(&instance->instance_lock, flags);
- writel(((cmd->frame_phys_addr >> 3) | (cmd->frame_count - 1)),
- &instance->reg_set->inbound_queue_port);
+ instance->instancet->fire_cmd(cmd->frame_phys_addr ,cmd->frame_count-1,instance->reg_set);
return 0;
+
+ out_return_cmd:
+ megasas_return_cmd(instance, cmd);
+ out_done:
+ done(scmd);
+ return 0;
}
/**
static int
megasas_deplete_reply_queue(struct megasas_instance *instance, u8 alt_status)
{
- u32 status;
u32 producer;
u32 consumer;
u32 context;
/*
* Check if it is our interrupt
+ * Clear the interrupt
*/
- status = readl(&instance->reg_set->outbound_intr_status);
-
- if (!(status & MFI_OB_INTR_STATUS_MASK)) {
+ if(instance->instancet->clear_intr(instance->reg_set))
return IRQ_NONE;
- }
-
- /*
- * Clear the interrupt by writing back the same value
- */
- writel(status, &instance->reg_set->outbound_intr_status);
producer = *instance->producer;
consumer = *instance->consumer;
/**
* megasas_transition_to_ready - Move the FW to READY state
- * @reg_set: MFI register set
+ * @instance: Adapter soft state
*
* During the initialization, FW passes can potentially be in any one of
* several possible states. If the FW in operational, waiting-for-handshake
* has to wait for the ready state.
*/
static int
-megasas_transition_to_ready(struct megasas_register_set __iomem * reg_set)
+megasas_transition_to_ready(struct megasas_instance* instance)
{
int i;
u8 max_wait;
u32 fw_state;
u32 cur_state;
- fw_state = readl(®_set->outbound_msg_0) & MFI_STATE_MASK;
+ fw_state = instance->instancet->read_fw_status_reg(instance->reg_set) & MFI_STATE_MASK;
while (fw_state != MFI_STATE_READY) {
* Set the CLR bit in inbound doorbell
*/
writel(MFI_INIT_CLEAR_HANDSHAKE,
- ®_set->inbound_doorbell);
+ &instance->reg_set->inbound_doorbell);
max_wait = 2;
cur_state = MFI_STATE_WAIT_HANDSHAKE;
/*
* Bring it to READY state; assuming max wait 2 secs
*/
- megasas_disable_intr(reg_set);
- writel(MFI_INIT_READY, ®_set->inbound_doorbell);
+ megasas_disable_intr(instance->reg_set);
+ writel(MFI_INIT_READY, &instance->reg_set->inbound_doorbell);
max_wait = 10;
cur_state = MFI_STATE_OPERATIONAL;
* The cur_state should not last for more than max_wait secs
*/
for (i = 0; i < (max_wait * 1000); i++) {
- fw_state = MFI_STATE_MASK &
- readl(®_set->outbound_msg_0);
+ fw_state = instance->instancet->read_fw_status_reg(instance->reg_set) &
+ MFI_STATE_MASK ;
if (fw_state == cur_state) {
msleep(1);
reg_set = instance->reg_set;
+ instance->instancet = &megasas_instance_template_xscale;
+
/*
* We expect the FW state to be READY
*/
- if (megasas_transition_to_ready(instance->reg_set))
+ if (megasas_transition_to_ready(instance))
goto fail_ready_state;
/*
* Get various operational parameters from status register
*/
- instance->max_fw_cmds = readl(®_set->outbound_msg_0) & 0x00FFFF;
- instance->max_num_sge = (readl(®_set->outbound_msg_0) & 0xFF0000) >>
- 0x10;
+ instance->max_fw_cmds = instance->instancet->read_fw_status_reg(reg_set) & 0x00FFFF;
+ instance->max_num_sge = (instance->instancet->read_fw_status_reg(reg_set) & 0xFF0000) >>
+ 0x10;
/*
* Create a pool of commands
*/
/*
* Issue the aen registration frame
*/
- writel(cmd->frame_phys_addr >> 3,
- &instance->reg_set->inbound_queue_port);
+ instance->instancet->fire_cmd(cmd->frame_phys_addr ,0,instance->reg_set);
return 0;
}
goto fail_irq;
}
- megasas_enable_intr(instance->reg_set);
+ instance->instancet->enable_intr(instance->reg_set);
/*
* Store instance in PCI softstate
unsigned long arg)
{
switch (cmd) {
- case MEGASAS_IOC_FIRMWARE:{
- return megasas_mgmt_compat_ioctl_fw(file, arg);
- }
+ case MEGASAS_IOC_FIRMWARE32:
+ return megasas_mgmt_compat_ioctl_fw(file, arg);
case MEGASAS_IOC_GET_AEN:
return megasas_mgmt_ioctl_aen(file, arg);
}
/**
* MegaRAID SAS Driver meta data
*/
-#define MEGASAS_VERSION "00.00.02.00-rc4"
-#define MEGASAS_RELDATE "Sep 16, 2005"
-#define MEGASAS_EXT_VERSION "Fri Sep 16 12:37:08 EDT 2005"
-
+#define MEGASAS_VERSION "00.00.02.02"
+#define MEGASAS_RELDATE "Jan 23, 2006"
+#define MEGASAS_EXT_VERSION "Mon Jan 23 14:09:01 PST 2006"
/*
* =====================================
* MegaRAID SAS MFI firmware definitions
} __attribute__ ((packed));
+ struct megasas_instance_template {
+ void (*fire_cmd)(dma_addr_t ,u32 ,struct megasas_register_set __iomem *);
+
+ void (*enable_intr)(struct megasas_register_set __iomem *) ;
+
+ int (*clear_intr)(struct megasas_register_set __iomem *);
+
+ u32 (*read_fw_status_reg)(struct megasas_register_set __iomem *);
+ };
+
struct megasas_instance {
u32 *producer;
u32 fw_outstanding;
u32 hw_crit_error;
spinlock_t instance_lock;
+
+ struct megasas_instance_template *instancet;
};
#define MEGASAS_IS_LOGICAL(scp) \
struct compat_iovec sgl[MAX_IOCTL_SGE];
} __attribute__ ((packed));
-#define MEGASAS_IOC_FIRMWARE _IOWR('M', 1, struct compat_megasas_iocpacket)
-#else
-#define MEGASAS_IOC_FIRMWARE _IOWR('M', 1, struct megasas_iocpacket)
#endif
+#define MEGASAS_IOC_FIRMWARE _IOWR('M', 1, struct megasas_iocpacket)
+#define MEGASAS_IOC_FIRMWARE32 _IOWR('M', 1, struct compat_megasas_iocpacket)
#define MEGASAS_IOC_GET_AEN _IOW('M', 3, struct megasas_aen)
struct megasas_mgmt_info {
* General Public License for more details.
*
******************************************************************************/
-#define QLA1280_VERSION "3.25"
+#define QLA1280_VERSION "3.26"
/*****************************************************************************
Revision History:
+ Rev 3.26, January 16, 2006 Jes Sorensen
+ - Ditch all < 2.6 support
Rev 3.25.1, February 10, 2005 Christoph Hellwig
- use pci_map_single to map non-S/G requests
- remove qla1280_proc_info
#include <asm/types.h>
#include <asm/system.h>
-#if LINUX_VERSION_CODE >= 0x020545
#include <scsi/scsi.h>
#include <scsi/scsi_cmnd.h>
#include <scsi/scsi_device.h>
#include <scsi/scsi_host.h>
#include <scsi/scsi_tcq.h>
-#else
-#include <linux/blk.h>
-#include "scsi.h"
-#include <scsi/scsi_host.h>
-#include "sd.h"
-#endif
#if defined(CONFIG_IA64_GENERIC) || defined(CONFIG_IA64_SGI_SN2)
#include <asm/sn/io.h>
#endif
-#if LINUX_VERSION_CODE < 0x020407
-#error "Kernels older than 2.4.7 are no longer supported"
+#if LINUX_VERSION_CODE < 0x020600
+#error "Kernels older than 2.6.0 are no longer supported"
#endif
#define NVRAM_DELAY() udelay(500) /* 2 microseconds */
-#if LINUX_VERSION_CODE < 0x020500
-#define HOST_LOCK &io_request_lock
-#define irqreturn_t void
-#define IRQ_RETVAL(foo)
-#define MSG_ORDERED_TAG 1
-
-#define DMA_BIDIRECTIONAL SCSI_DATA_UNKNOWN
-#define DMA_TO_DEVICE SCSI_DATA_WRITE
-#define DMA_FROM_DEVICE SCSI_DATA_READ
-#define DMA_NONE SCSI_DATA_NONE
-
-#ifndef HAVE_SECTOR_T
-typedef unsigned int sector_t;
-#endif
-
-static inline void
-scsi_adjust_queue_depth(struct scsi_device *device, int tag, int depth)
-{
- if (tag) {
- device->tagged_queue = tag;
- device->current_tag = 0;
- }
- device->queue_depth = depth;
-}
-static inline struct Scsi_Host *scsi_host_alloc(struct scsi_host_template *t, size_t s)
-{
- return scsi_register(t, s);
-}
-static inline void scsi_host_put(struct Scsi_Host *h)
-{
- scsi_unregister(h);
-}
-#else
-#define HOST_LOCK ha->host->host_lock
-#endif
-#if LINUX_VERSION_CODE < 0x020600
-#define DEV_SIMPLE_TAGS(device) device->tagged_queue
-/*
- * Hack around that qla1280_remove_one is called from
- * qla1280_release in 2.4
- */
-#undef __devexit
-#define __devexit
-#else
-#define DEV_SIMPLE_TAGS(device) device->simple_tags
-#endif
#if defined(__ia64__) && !defined(ia64_platform_is)
#define ia64_platform_is(foo) (!strcmp(x, platform_name))
#endif
* QLogic Driver Support Function Prototypes.
*/
static void qla1280_done(struct scsi_qla_host *);
-#if LINUX_VERSION_CODE < 0x020545
-static void qla1280_get_target_options(struct scsi_cmnd *, struct scsi_qla_host *);
-#endif
static int qla1280_get_token(char *);
static int qla1280_setup(char *s) __init;
#define CMD_SNSLEN(Cmnd) sizeof(Cmnd->sense_buffer)
#define CMD_RESULT(Cmnd) Cmnd->result
#define CMD_HANDLE(Cmnd) Cmnd->host_scribble
-#if LINUX_VERSION_CODE < 0x020545
-#define CMD_REQUEST(Cmnd) Cmnd->request.cmd
-#else
#define CMD_REQUEST(Cmnd) Cmnd->request->cmd
-#endif
#define CMD_HOST(Cmnd) Cmnd->device->host
#define SCSI_BUS_32(Cmnd) Cmnd->device->channel
add_timer(&timer);
/* wait for the action to complete (or the timer to expire) */
- spin_unlock_irq(HOST_LOCK);
+ spin_unlock_irq(ha->host->host_lock);
wait_for_completion(&wait);
del_timer_sync(&timer);
- spin_lock_irq(HOST_LOCK);
+ spin_lock_irq(ha->host->host_lock);
sp->wait = NULL;
/* the only action we might get a fail for is abort */
return 0;
}
-#if LINUX_VERSION_CODE < 0x020600
-static int
-qla1280_detect(struct scsi_host_template *template)
-{
- struct pci_device_id *id = &qla1280_pci_tbl[0];
- struct pci_dev *pdev = NULL;
- int num_hosts = 0;
-
- if (sizeof(struct srb) > sizeof(Scsi_Pointer)) {
- printk(KERN_WARNING
- "qla1280: struct srb too big, aborting\n");
- return 0;
- }
-
- if ((DMA_BIDIRECTIONAL != PCI_DMA_BIDIRECTIONAL) ||
- (DMA_TO_DEVICE != PCI_DMA_TODEVICE) ||
- (DMA_FROM_DEVICE != PCI_DMA_FROMDEVICE) ||
- (DMA_NONE != PCI_DMA_NONE)) {
- printk(KERN_WARNING
- "qla1280: dma direction bits don't match\n");
- return 0;
- }
-
-#ifdef MODULE
- /*
- * If we are called as a module, the qla1280 pointer may not be null
- * and it would point to our bootup string, just like on the lilo
- * command line. IF not NULL, then process this config string with
- * qla1280_setup
- *
- * Boot time Options
- * To add options at boot time add a line to your lilo.conf file like:
- * append="qla1280=verbose,max_tags:{{255,255,255,255},{255,255,255,255}}"
- * which will result in the first four devices on the first two
- * controllers being set to a tagged queue depth of 32.
- */
- if (qla1280)
- qla1280_setup(qla1280);
-#endif
-
- /* First Initialize QLA12160 on PCI Bus 1 Dev 2 */
- while ((pdev = pci_find_device(id->vendor, id->device, pdev))) {
- if (pdev->bus->number == 1 && PCI_SLOT(pdev->devfn) == 2) {
- if (!qla1280_probe_one(pdev, id))
- num_hosts++;
- }
- }
-
- pdev = NULL;
- /* Try and find each different type of adapter we support */
- for (id = &qla1280_pci_tbl[0]; id->device; id++) {
- while ((pdev = pci_find_device(id->vendor, id->device, pdev))) {
- /*
- * skip QLA12160 already initialized on
- * PCI Bus 1 Dev 2 since we already initialized
- * and presented it
- */
- if (id->device == PCI_DEVICE_ID_QLOGIC_ISP12160 &&
- pdev->bus->number == 1 &&
- PCI_SLOT(pdev->devfn) == 2)
- continue;
-
- if (!qla1280_probe_one(pdev, id))
- num_hosts++;
- }
- }
-
- return num_hosts;
-}
-
-/*
- * This looks a bit ugly as we could just pass down host to
- * qla1280_remove_one, but I want to keep qla1280_release purely a wrapper
- * around pci_driver::remove as used from 2.6 onwards.
- */
-static int
-qla1280_release(struct Scsi_Host *host)
-{
- struct scsi_qla_host *ha = (struct scsi_qla_host *)host->hostdata;
-
- qla1280_remove_one(ha->pdev);
- return 0;
-}
-
-static int
-qla1280_biosparam_old(Disk * disk, kdev_t dev, int geom[])
-{
- return qla1280_biosparam(disk->device, NULL, disk->capacity, geom);
-}
-#endif
/* disable risc and host interrupts */
static inline void
ENTER_INTR ("qla1280_intr_handler");
ha = (struct scsi_qla_host *)dev_id;
- spin_lock(HOST_LOCK);
+ spin_lock(ha->host->host_lock);
ha->isr_count++;
reg = ha->iobase;
if (!list_empty(&ha->done_q))
qla1280_done(ha);
- spin_unlock(HOST_LOCK);
+ spin_unlock(ha->host->host_lock);
qla1280_enable_intrs(ha);
scsi_adjust_queue_depth(device, 0, default_depth);
}
-#if LINUX_VERSION_CODE > 0x020500
nv->bus[bus].target[target].parameter.enable_sync = device->sdtr;
nv->bus[bus].target[target].parameter.enable_wide = device->wdtr;
nv->bus[bus].target[target].ppr_1x160.flags.enable_ppr = device->ppr;
-#endif
if (driver_setup.no_sync ||
(driver_setup.sync_mask &&
nv->bus[bus].target[target].ppr_1x160.flags.enable_ppr = 0;
}
- spin_lock_irqsave(HOST_LOCK, flags);
+ spin_lock_irqsave(ha->host->host_lock, flags);
if (nv->bus[bus].target[target].parameter.enable_sync)
status = qla1280_set_target_parameters(ha, bus, target);
qla1280_get_target_parameters(ha, device);
- spin_unlock_irqrestore(HOST_LOCK, flags);
+ spin_unlock_irqrestore(ha->host->host_lock, flags);
return status;
}
-#if LINUX_VERSION_CODE < 0x020545
-/**************************************************************************
- * qla1280_select_queue_depth
- *
- * Sets the queue depth for each SCSI device hanging off the input
- * host adapter. We use a queue depth of 2 for devices that do not
- * support tagged queueing.
- **************************************************************************/
-static void
-qla1280_select_queue_depth(struct Scsi_Host *host, struct scsi_device *sdev_q)
-{
- struct scsi_qla_host *ha = (struct scsi_qla_host *)host->hostdata;
- struct scsi_device *sdev;
-
- ENTER("qla1280_select_queue_depth");
- for (sdev = sdev_q; sdev; sdev = sdev->next)
- if (sdev->host == host)
- qla1280_slave_configure(sdev);
-
- if (sdev_q)
- qla1280_check_for_dead_scsi_bus(ha, sdev_q->channel);
- LEAVE("qla1280_select_queue_depth");
-}
-#endif
/*
* qla1280_done
CMD_HANDLE(sp->cmd) = (unsigned char *)INVALID_HANDLE;
ha->actthreads--;
-#if LINUX_VERSION_CODE < 0x020500
- if (cmd->cmnd[0] == INQUIRY)
- qla1280_get_target_options(cmd, ha);
-#endif
(*(cmd)->scsi_done)(cmd);
if(sp->wait != NULL)
struct device_reg __iomem *reg;
int status;
int bus;
-#if LINUX_VERSION_CODE > 0x020500
unsigned long flags;
-#endif
ENTER("qla1280_initialize_adapter");
"NVRAM\n");
}
-#if LINUX_VERSION_CODE >= 0x020500
/*
* It's necessary to grab the spin here as qla1280_mailbox_command
* needs to be able to drop the lock unconditionally to wait
* for completion.
- * In 2.4 ->detect is called with the io_request_lock held.
*/
- spin_lock_irqsave(HOST_LOCK, flags);
-#endif
+ spin_lock_irqsave(ha->host->host_lock, flags);
status = qla1280_load_firmware(ha);
if (status) {
ha->flags.online = 1;
out:
-#if LINUX_VERSION_CODE >= 0x020500
- spin_unlock_irqrestore(HOST_LOCK, flags);
-#endif
+ spin_unlock_irqrestore(ha->host->host_lock, flags);
+
if (status)
dprintk(2, "qla1280_initialize_adapter: **** FAILED ****\n");
timer.function = qla1280_mailbox_timeout;
add_timer(&timer);
- spin_unlock_irq(HOST_LOCK);
+ spin_unlock_irq(ha->host->host_lock);
WRT_REG_WORD(®->host_cmd, HC_SET_HOST_INT);
data = qla1280_debounce_register(®->istatus);
wait_for_completion(&wait);
del_timer_sync(&timer);
- spin_lock_irq(HOST_LOCK);
+ spin_lock_irq(ha->host->host_lock);
ha->mailbox_wait = NULL;
ha->bus_settings[bus].scsi_bus_dead = 1;
ha->bus_settings[bus].failed_reset_count++;
} else {
- spin_unlock_irq(HOST_LOCK);
+ spin_unlock_irq(ha->host->host_lock);
ssleep(reset_delay);
- spin_lock_irq(HOST_LOCK);
+ spin_lock_irq(ha->host->host_lock);
ha->bus_settings[bus].scsi_bus_dead = 0;
ha->bus_settings[bus].failed_reset_count = 0;
(SCSI_TCN_32(cmd) | BIT_7) : SCSI_TCN_32(cmd);
/* Enable simple tag queuing if device supports it. */
- if (DEV_SIMPLE_TAGS(cmd->device))
+ if (cmd->device->simple_tags)
pkt->control_flags |= cpu_to_le16(BIT_3);
/* Load SCSI command packet. */
(SCSI_TCN_32(cmd) | BIT_7) : SCSI_TCN_32(cmd);
/* Enable simple tag queuing if device supports it. */
- if (DEV_SIMPLE_TAGS(cmd->device))
+ if (cmd->device->simple_tags)
pkt->control_flags |= cpu_to_le16(BIT_3);
/* Load SCSI command packet. */
}
-#if LINUX_VERSION_CODE < 0x020500
-/*
- *
- */
-static void
-qla1280_get_target_options(struct scsi_cmnd *cmd, struct scsi_qla_host *ha)
-{
- unsigned char *result;
- struct nvram *n;
- int bus, target, lun;
-
- bus = SCSI_BUS_32(cmd);
- target = SCSI_TCN_32(cmd);
- lun = SCSI_LUN_32(cmd);
-
- /*
- * Make sure to not touch anything if someone is using the
- * sg interface.
- */
- if (cmd->use_sg || (CMD_RESULT(cmd) >> 16) != DID_OK || lun)
- return;
-
- result = cmd->request_buffer;
- n = &ha->nvram;
-
- n->bus[bus].target[target].parameter.enable_wide = 0;
- n->bus[bus].target[target].parameter.enable_sync = 0;
- n->bus[bus].target[target].ppr_1x160.flags.enable_ppr = 0;
-
- if (result[7] & 0x60)
- n->bus[bus].target[target].parameter.enable_wide = 1;
- if (result[7] & 0x10)
- n->bus[bus].target[target].parameter.enable_sync = 1;
- if ((result[2] >= 3) && (result[4] + 5 > 56) &&
- (result[56] & 0x4))
- n->bus[bus].target[target].ppr_1x160.flags.enable_ppr = 1;
-
- dprintk(2, "get_target_options(): wide %i, sync %i, ppr %i\n",
- n->bus[bus].target[target].parameter.enable_wide,
- n->bus[bus].target[target].parameter.enable_sync,
- n->bus[bus].target[target].ppr_1x160.flags.enable_ppr);
-}
-#endif
-
/*
* qla1280_status_entry
* Processes received ISP status entry.
} else
printk(" Async");
- if (DEV_SIMPLE_TAGS(device))
+ if (device->simple_tags)
printk(", Tagged queuing: depth %d", device->queue_depth);
printk("\n");
}
return ret;
}
-#if LINUX_VERSION_CODE >= 0x020600
+
static struct scsi_host_template qla1280_driver_template = {
.module = THIS_MODULE,
.proc_name = "qla1280",
.cmd_per_lun = 1,
.use_clustering = ENABLE_CLUSTERING,
};
-#else
-static struct scsi_host_template qla1280_driver_template = {
- .proc_name = "qla1280",
- .name = "Qlogic ISP 1280/12160",
- .detect = qla1280_detect,
- .release = qla1280_release,
- .info = qla1280_info,
- .queuecommand = qla1280_queuecommand,
- .eh_abort_handler = qla1280_eh_abort,
- .eh_device_reset_handler= qla1280_eh_device_reset,
- .eh_bus_reset_handler = qla1280_eh_bus_reset,
- .eh_host_reset_handler = qla1280_eh_adapter_reset,
- .bios_param = qla1280_biosparam_old,
- .can_queue = 0xfffff,
- .this_id = -1,
- .sg_tablesize = SG_ALL,
- .cmd_per_lun = 1,
- .use_clustering = ENABLE_CLUSTERING,
- .use_new_eh_code = 1,
-};
-#endif
+
static int __devinit
qla1280_probe_one(struct pci_dev *pdev, const struct pci_device_id *id)
host->max_sectors = 1024;
host->unique_id = host->host_no;
-#if LINUX_VERSION_CODE < 0x020545
- host->select_queue_depths = qla1280_select_queue_depth;
-#endif
-
error = -ENODEV;
#if MEMORY_MAPPED_IO
pci_set_drvdata(pdev, host);
-#if LINUX_VERSION_CODE >= 0x020600
error = scsi_add_host(host, &pdev->dev);
if (error)
goto error_disable_adapter;
scsi_scan_host(host);
-#else
- scsi_set_pci_device(host, pdev);
-#endif
return 0;
-#if LINUX_VERSION_CODE >= 0x020600
error_disable_adapter:
qla1280_disable_intrs(ha);
-#endif
error_free_irq:
free_irq(pdev->irq, ha);
error_release_region:
struct Scsi_Host *host = pci_get_drvdata(pdev);
struct scsi_qla_host *ha = (struct scsi_qla_host *)host->hostdata;
-#if LINUX_VERSION_CODE >= 0x020600
scsi_remove_host(host);
-#endif
qla1280_disable_intrs(ha);
scsi_host_put(host);
}
-#if LINUX_VERSION_CODE >= 0x020600
static struct pci_driver qla1280_pci_driver = {
.name = "qla1280",
.id_table = qla1280_pci_tbl,
module_init(qla1280_init);
module_exit(qla1280_exit);
-#else
-# define driver_template qla1280_driver_template
-# include "scsi_module.c"
-#endif
MODULE_AUTHOR("Qlogic & Jes Sorensen");
MODULE_DESCRIPTION("Qlogic ISP SCSI (qla1x80/qla1x160) driver");
uint8_t mp_byte; /* multi-path byte (not used) */
uint8_t cur_path; /* current path id */
- struct fc_rport *rport;
+ spinlock_t rport_lock;
+ struct fc_rport *rport, *drport;
u32 supported_classes;
struct work_struct rport_add_work;
struct work_struct rport_del_work;
#define LOOP_RESET_NEEDED 24
#define BEACON_BLINK_NEEDED 25
#define REGISTER_FDMI_NEEDED 26
+#define FCPORT_UPDATE_NEEDED 27
uint32_t device_flags;
#define DFLG_LOCAL_DEVICES BIT_0
extern void qla2x00_restart_queues(scsi_qla_host_t *, uint8_t);
extern void qla2x00_rescan_fcports(scsi_qla_host_t *);
+extern void qla2x00_update_fcports(scsi_qla_host_t *);
extern int qla2x00_abort_isp(scsi_qla_host_t *);
+extern void qla2x00_update_fcport(scsi_qla_host_t *, fc_port_t *);
extern void qla2x00_reg_remote_port(scsi_qla_host_t *, fc_port_t *);
/*
extern void qla2x00_cmd_timeout(srb_t *);
-extern void qla2x00_mark_device_lost(scsi_qla_host_t *, fc_port_t *, int);
-extern void qla2x00_mark_all_devices_lost(scsi_qla_host_t *);
+extern void qla2x00_mark_device_lost(scsi_qla_host_t *, fc_port_t *, int, int);
+extern void qla2x00_mark_all_devices_lost(scsi_qla_host_t *, int);
extern void qla2x00_blink_led(scsi_qla_host_t *);
static int qla2x00_configure_hba(scsi_qla_host_t *);
static int qla2x00_configure_loop(scsi_qla_host_t *);
static int qla2x00_configure_local_loop(scsi_qla_host_t *);
-static void qla2x00_update_fcport(scsi_qla_host_t *, fc_port_t *);
static int qla2x00_configure_fabric(scsi_qla_host_t *);
static int qla2x00_find_all_fabric_devs(scsi_qla_host_t *, struct list_head *);
static int qla2x00_device_resync(scsi_qla_host_t *);
qla2x00_rport_del(void *data)
{
fc_port_t *fcport = data;
+ struct fc_rport *rport;
+ unsigned long flags;
+
+ spin_lock_irqsave(&fcport->rport_lock, flags);
+ rport = fcport->drport;
+ fcport->drport = NULL;
+ spin_unlock_irqrestore(&fcport->rport_lock, flags);
+ if (rport)
+ fc_remote_port_delete(rport);
- if (fcport->rport)
- fc_remote_port_delete(fcport->rport);
- fcport->rport = NULL;
}
/**
atomic_set(&fcport->state, FCS_UNCONFIGURED);
fcport->flags = FCF_RLC_SUPPORT;
fcport->supported_classes = FC_COS_UNSPECIFIED;
+ spin_lock_init(&fcport->rport_lock);
INIT_WORK(&fcport->rport_add_work, qla2x00_rport_add, fcport);
INIT_WORK(&fcport->rport_del_work, qla2x00_rport_del, fcport);
{
fc_port_t *fcport;
- qla2x00_mark_all_devices_lost(ha);
+ qla2x00_mark_all_devices_lost(ha, 0);
list_for_each_entry(fcport, &ha->fcports, list) {
if (fcport->port_type != FCT_TARGET)
continue;
* Context:
* Kernel context.
*/
-static void
+void
qla2x00_update_fcport(scsi_qla_host_t *ha, fc_port_t *fcport)
{
- uint16_t index;
- unsigned long flags;
- srb_t *sp;
-
fcport->ha = ha;
fcport->login_retry = 0;
fcport->port_login_retry_count = ha->port_down_retry_count *
PORT_RETRY_TIME);
fcport->flags &= ~FCF_LOGIN_NEEDED;
- /*
- * Check for outstanding cmd on tape Bypass LUN discovery if active
- * command on tape.
- */
- if (fcport->flags & FCF_TAPE_PRESENT) {
- spin_lock_irqsave(&ha->hardware_lock, flags);
- for (index = 1; index < MAX_OUTSTANDING_COMMANDS; index++) {
- fc_port_t *sfcp;
-
- if ((sp = ha->outstanding_cmds[index]) != 0) {
- sfcp = sp->fcport;
- if (sfcp == fcport) {
- atomic_set(&fcport->state, FCS_ONLINE);
- spin_unlock_irqrestore(
- &ha->hardware_lock, flags);
- return;
- }
- }
- }
- spin_unlock_irqrestore(&ha->hardware_lock, flags);
- }
-
if (fcport->port_type == FCT_INITIATOR ||
fcport->port_type == FCT_BROADCAST)
fcport->device_type = TYPE_PROCESSOR;
{
struct fc_rport_identifiers rport_ids;
struct fc_rport *rport;
+ unsigned long flags;
- if (fcport->rport) {
- fc_remote_port_delete(fcport->rport);
- fcport->rport = NULL;
- }
+ if (fcport->drport)
+ qla2x00_rport_del(fcport);
+ if (fcport->rport)
+ return;
rport_ids.node_name = wwn_to_u64(fcport->node_name);
rport_ids.port_name = wwn_to_u64(fcport->port_name);
rport_ids.port_id = fcport->d_id.b.domain << 16 |
fcport->d_id.b.area << 8 | fcport->d_id.b.al_pa;
rport_ids.roles = FC_RPORT_ROLE_UNKNOWN;
- fcport->rport = rport = fc_remote_port_add(ha->host, 0, &rport_ids);
+ rport = fc_remote_port_add(ha->host, 0, &rport_ids);
if (!rport) {
qla_printk(KERN_WARNING, ha,
"Unable to allocate fc remote port!\n");
return;
}
+ spin_lock_irqsave(&fcport->rport_lock, flags);
+ fcport->rport = rport;
*((fc_port_t **)rport->dd_data) = fcport;
+ spin_unlock_irqrestore(&fcport->rport_lock, flags);
+
rport->supported_classes = fcport->supported_classes;
rport_ids.roles = FC_RPORT_ROLE_UNKNOWN;
if (atomic_read(&fcport->state) == FCS_DEVICE_LOST) {
qla2x00_mark_device_lost(ha, fcport,
- ql2xplogiabsentdevice);
+ ql2xplogiabsentdevice, 0);
if (fcport->loop_id != FC_NO_LOOP_ID &&
(fcport->flags & FCF_TAPE_PRESENT) == 0 &&
fcport->port_type != FCT_INITIATOR &&
fcport->port_type != FCT_BROADCAST) {
-
ha->isp_ops.fabric_logout(ha,
fcport->loop_id,
fcport->d_id.b.domain,
if (atomic_read(&fcport->state) == FCS_ONLINE) {
if (format != 3 ||
fcport->port_type != FCT_INITIATOR) {
- qla2x00_mark_device_lost(ha, fcport, 0);
+ qla2x00_mark_device_lost(ha, fcport,
+ 0, 0);
}
}
fcport->flags &= ~FCF_FARP_DONE;
ha->isp_ops.fabric_logout(ha, fcport->loop_id,
fcport->d_id.b.domain, fcport->d_id.b.area,
fcport->d_id.b.al_pa);
- qla2x00_mark_device_lost(ha, fcport, 1);
-
+ qla2x00_mark_device_lost(ha, fcport, 1, 0);
} else {
qla2x00_update_fcport(ha, fcport);
}
ha->isp_ops.fabric_logout(ha, fcport->loop_id,
fcport->d_id.b.domain, fcport->d_id.b.area,
fcport->d_id.b.al_pa);
- qla2x00_mark_device_lost(ha, fcport, 1);
+ qla2x00_mark_device_lost(ha, fcport, 1, 0);
rval = 1;
break;
qla2x00_probe_for_all_luns(ha);
}
+void
+qla2x00_update_fcports(scsi_qla_host_t *ha)
+{
+ fc_port_t *fcport;
+
+ /* Go with deferred removal of rport references. */
+ list_for_each_entry(fcport, &ha->fcports, list)
+ if (fcport->drport)
+ qla2x00_rport_del(fcport);
+}
+
/*
* qla2x00_abort_isp
* Resets ISP and aborts all outstanding commands.
atomic_set(&ha->loop_down_timer, LOOP_DOWN_TIME);
if (atomic_read(&ha->loop_state) != LOOP_DOWN) {
atomic_set(&ha->loop_state, LOOP_DOWN);
- qla2x00_mark_all_devices_lost(ha);
+ qla2x00_mark_all_devices_lost(ha, 0);
} else {
if (!atomic_read(&ha->loop_down_timer))
atomic_set(&ha->loop_down_timer,
if (atomic_read(&ha->loop_state) != LOOP_DOWN) {
atomic_set(&ha->loop_state, LOOP_DOWN);
atomic_set(&ha->loop_down_timer, LOOP_DOWN_TIME);
- qla2x00_mark_all_devices_lost(ha);
+ qla2x00_mark_all_devices_lost(ha, 1);
}
set_bit(REGISTER_FC4_NEEDED, &ha->dpc_flags);
atomic_set(&ha->loop_state, LOOP_DOWN);
atomic_set(&ha->loop_down_timer, LOOP_DOWN_TIME);
ha->device_flags |= DFLG_NO_CABLE;
- qla2x00_mark_all_devices_lost(ha);
+ qla2x00_mark_all_devices_lost(ha, 1);
}
ha->flags.management_server_logged_in = 0;
if (atomic_read(&ha->loop_state) != LOOP_DOWN) {
atomic_set(&ha->loop_state, LOOP_DOWN);
atomic_set(&ha->loop_down_timer, LOOP_DOWN_TIME);
- qla2x00_mark_all_devices_lost(ha);
+ qla2x00_mark_all_devices_lost(ha, 1);
}
set_bit(RESET_MARKER_NEEDED, &ha->dpc_flags);
if (!atomic_read(&ha->loop_down_timer))
atomic_set(&ha->loop_down_timer,
LOOP_DOWN_TIME);
- qla2x00_mark_all_devices_lost(ha);
+ qla2x00_mark_all_devices_lost(ha, 1);
}
if (!(test_bit(ABORT_ISP_ACTIVE, &ha->dpc_flags))) {
if (!atomic_read(&ha->loop_down_timer))
atomic_set(&ha->loop_down_timer,
LOOP_DOWN_TIME);
- qla2x00_mark_all_devices_lost(ha);
+ qla2x00_mark_all_devices_lost(ha, 1);
}
set_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags);
*/
atomic_set(&ha->loop_state, LOOP_UP);
- qla2x00_mark_all_devices_lost(ha);
+ qla2x00_mark_all_devices_lost(ha, 1);
ha->flags.rscn_queue_overflow = 1;
cp->result = DID_BUS_BUSY << 16;
if (atomic_read(&fcport->state) == FCS_ONLINE) {
- qla2x00_mark_device_lost(ha, fcport, 1);
+ qla2x00_mark_device_lost(ha, fcport, 1, 1);
}
break;
/* Check to see if logout occurred. */
if ((le16_to_cpu(sts->status_flags) & SF_LOGOUT_SENT))
- qla2x00_mark_device_lost(ha, fcport, 1);
+ qla2x00_mark_device_lost(ha, fcport, 1, 1);
break;
case CS_QUEUE_FULL:
if (ret == SUCCESS) {
if (fcport->flags & FC_FABRIC_DEVICE) {
ha->isp_ops.fabric_logout(ha, fcport->loop_id);
- qla2x00_mark_device_lost(ha, fcport);
+ qla2x00_mark_device_lost(ha, fcport, 0, 0);
}
}
#endif
pci_disable_device(ha->pdev);
}
+static inline void
+qla2x00_schedule_rport_del(struct scsi_qla_host *ha, fc_port_t *fcport,
+ int defer)
+{
+ unsigned long flags;
+ struct fc_rport *rport;
+
+ if (!fcport->rport)
+ return;
+
+ rport = fcport->rport;
+ if (defer) {
+ spin_lock_irqsave(&fcport->rport_lock, flags);
+ fcport->drport = rport;
+ fcport->rport = NULL;
+ spin_unlock_irqrestore(&fcport->rport_lock, flags);
+ set_bit(FCPORT_UPDATE_NEEDED, &ha->dpc_flags);
+ } else {
+ spin_lock_irqsave(&fcport->rport_lock, flags);
+ fcport->rport = NULL;
+ spin_unlock_irqrestore(&fcport->rport_lock, flags);
+ fc_remote_port_delete(rport);
+ }
+}
+
/*
* qla2x00_mark_device_lost Updates fcport state when device goes offline.
*
* Context:
*/
void qla2x00_mark_device_lost(scsi_qla_host_t *ha, fc_port_t *fcport,
- int do_login)
+ int do_login, int defer)
{
- if (atomic_read(&fcport->state) == FCS_ONLINE && fcport->rport)
- schedule_work(&fcport->rport_del_work);
+ if (atomic_read(&fcport->state) == FCS_ONLINE)
+ qla2x00_schedule_rport_del(ha, fcport, defer);
/*
* We may need to retry the login, so don't change the state of the
* Context:
*/
void
-qla2x00_mark_all_devices_lost(scsi_qla_host_t *ha)
+qla2x00_mark_all_devices_lost(scsi_qla_host_t *ha, int defer)
{
fc_port_t *fcport;
*/
if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD)
continue;
- if (atomic_read(&fcport->state) == FCS_ONLINE && fcport->rport)
- schedule_work(&fcport->rport_del_work);
+ if (atomic_read(&fcport->state) == FCS_ONLINE)
+ qla2x00_schedule_rport_del(ha, fcport, defer);
atomic_set(&fcport->state, FCS_DEVICE_LOST);
}
+
+ if (defer && ha->dpc_wait && !ha->dpc_active)
+ up(ha->dpc_wait);
}
/*
ha->host_no));
}
+ if (test_and_clear_bit(FCPORT_UPDATE_NEEDED, &ha->dpc_flags))
+ qla2x00_update_fcports(ha);
+
if (test_and_clear_bit(LOOP_RESET_NEEDED, &ha->dpc_flags)) {
DEBUG(printk("scsi(%ld): dpc: sched loop_reset()\n",
ha->host_no));
DEBUG(printk("scsi(%ld): port login OK: logged in ID 0x%x\n",
ha->host_no, fcport->loop_id));
- fcport->port_login_retry_count =
- ha->port_down_retry_count * PORT_RETRY_TIME;
- atomic_set(&fcport->state, FCS_ONLINE);
- atomic_set(&fcport->port_down_timer,
- ha->port_down_retry_count * PORT_RETRY_TIME);
-
- fcport->login_retry = 0;
+ qla2x00_update_fcport(ha,
+ fcport);
} else if (status == 1) {
set_bit(RELOGIN_NEEDED, &ha->dpc_flags);
/* retry the login again */
if ((test_bit(ISP_ABORT_NEEDED, &ha->dpc_flags) ||
test_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags) ||
test_bit(LOOP_RESET_NEEDED, &ha->dpc_flags) ||
+ test_bit(FCPORT_UPDATE_NEEDED, &ha->dpc_flags) ||
start_dpc ||
test_bit(LOGIN_RETRY_NEEDED, &ha->dpc_flags) ||
test_bit(RESET_MARKER_NEEDED, &ha->dpc_flags) ||
board_2037x = 0, /* FastTrak S150 TX2plus */
board_20319 = 1, /* FastTrak S150 TX4 */
board_20619 = 2, /* FastTrak TX4000 */
+ board_20771 = 3, /* FastTrak TX2300 */
PDC_HAS_PATA = (1 << 1), /* PDC20375 has PATA */
.udma_mask = 0x7f, /* udma0-6 ; FIXME */
.port_ops = &pdc_pata_ops,
},
+
+ /* board_20771 */
+ {
+ .sht = &pdc_ata_sht,
+ .host_flags = PDC_COMMON_FLAGS | ATA_FLAG_SATA,
+ .pio_mask = 0x1f, /* pio0-4 */
+ .mwdma_mask = 0x07, /* mwdma0-2 */
+ .udma_mask = 0x7f, /* udma0-6 ; FIXME */
+ .port_ops = &pdc_sata_ops,
+ },
};
static const struct pci_device_id pdc_ata_pci_tbl[] = {
{ PCI_VENDOR_ID_PROMISE, 0x6629, PCI_ANY_ID, PCI_ANY_ID, 0, 0,
board_20619 },
+ { PCI_VENDOR_ID_PROMISE, 0x3570, PCI_ANY_ID, PCI_ANY_ID, 0, 0,
+ board_20771 },
{ } /* terminate list */
};
case board_2037x:
probe_ent->n_ports = 2;
break;
+ case board_20771:
+ probe_ent->n_ports = 2;
+ break;
case board_20619:
probe_ent->n_ports = 4;
{ 0x1166, 0x0241, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 4 },
{ 0x1166, 0x0242, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 8 },
{ 0x1166, 0x024a, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 4 },
+ { 0x1166, 0x024b, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 4 },
{ }
};
cmnd[4] = SCSI_REMOVAL_PREVENT;
cmnd[5] = 0;
- scsi_execute_async(sdev, cmnd, DMA_NONE, NULL, 0, 0, 10 * HZ,
+ scsi_execute_async(sdev, cmnd, 6, DMA_NONE, NULL, 0, 0, 10 * HZ,
5, NULL, NULL, GFP_KERNEL);
}
* scsi_execute_async - insert request
* @sdev: scsi device
* @cmd: scsi command
+ * @cmd_len: length of scsi cdb
* @data_direction: data direction
* @buffer: data buffer (this can be a kernel buffer or scatterlist)
* @bufflen: len of buffer
* @flags: or into request flags
**/
int scsi_execute_async(struct scsi_device *sdev, const unsigned char *cmd,
- int data_direction, void *buffer, unsigned bufflen,
+ int cmd_len, int data_direction, void *buffer, unsigned bufflen,
int use_sg, int timeout, int retries, void *privdata,
void (*done)(void *, char *, int, int), gfp_t gfp)
{
if (err)
goto free_req;
- req->cmd_len = COMMAND_SIZE(cmd[0]);
+ req->cmd_len = cmd_len;
memcpy(req->cmd, cmd, req->cmd_len);
req->sense = sioc->sense;
req->sense_len = 0;
/**
* sas_phy_alloc -- allocates and initialize a SAS PHY structure
* @parent: Parent device
- * @number: Port number
+ * @number: Phy index
*
* Allocates an SAS PHY structure. It will be added in the device tree
* below the device specified by @parent, which has to be either a Scsi_Host
device_initialize(&rphy->dev);
rphy->dev.parent = get_device(&parent->dev);
rphy->dev.release = sas_rphy_release;
- sprintf(rphy->dev.bus_id, "rphy-%d:%d",
- shost->host_no, parent->number);
+ sprintf(rphy->dev.bus_id, "rphy-%d:%d-%d",
+ shost->host_no, parent->port_identifier, parent->number);
transport_setup_device(&rphy->dev);
return rphy;
hp->duration = jiffies_to_msecs(jiffies);
/* Now send everything of to mid-level. The next time we hear about this
packet is when sg_cmd_done() is called (i.e. a callback). */
- if (scsi_execute_async(sdp->device, cmnd, data_dir, srp->data.buffer,
+ if (scsi_execute_async(sdp->device, cmnd, hp->cmd_len, data_dir, srp->data.buffer,
hp->dxfer_len, srp->data.k_use_sg, timeout,
SG_DEFAULT_RETRIES, srp, sg_cmd_done,
GFP_ATOMIC)) {
STp->buffer->cmdstat.have_sense = 0;
STp->buffer->syscall_result = 0;
- if (scsi_execute_async(STp->device, cmd, direction,
+ if (scsi_execute_async(STp->device, cmd, COMMAND_SIZE(cmd[0]), direction,
&((STp->buffer)->sg[0]), bytes, (STp->buffer)->sg_segs,
timeout, retries, SRpnt, st_sleep_done, GFP_KERNEL)) {
/* could not allocate the buffer or request was too large */
.irq = NO_IRQ,
.fifosize = 16,
.ops = &serial21285_ops,
- .flags = ASYNC_BOOT_AUTOCONF,
+ .flags = UPF_BOOT_AUTOCONF,
};
static void serial21285_setup_ports(void)
#include <linux/init.h>
#include <linux/console.h>
#include <linux/sysrq.h>
-#include <linux/mca.h>
#include <linux/delay.h>
#include <linux/platform_device.h>
#include <linux/tty.h>
int probeflags = PROBE_ANY;
int ret;
- /*
- * Don't probe for MCA ports on non-MCA machines.
- */
- if (up->port.flags & UPF_BOOT_ONLYMCA && !MCA_bus)
- return;
-
/*
* Find the region that we can probe for. This in turn
* tells us whether we can probe for the type of port.
/*
* Wait for transmitter & holding register to empty
*/
-static inline void wait_for_xmitr(struct uart_8250_port *up)
+static inline void wait_for_xmitr(struct uart_8250_port *up, int bits)
{
unsigned int status, tmout = 10000;
if (--tmout == 0)
break;
udelay(1);
- } while ((status & BOTH_EMPTY) != BOTH_EMPTY);
+ } while ((status & bits) != bits);
/* Wait up to 1s for flow control if necessary */
if (up->port.flags & UPF_CONS_FLOW) {
* Now, do each character
*/
for (i = 0; i < count; i++, s++) {
- wait_for_xmitr(up);
+ wait_for_xmitr(up, UART_LSR_THRE);
/*
* Send the character out.
*/
serial_out(up, UART_TX, *s);
if (*s == 10) {
- wait_for_xmitr(up);
+ wait_for_xmitr(up, UART_LSR_THRE);
serial_out(up, UART_TX, 13);
}
}
* Finally, wait for transmitter to become empty
* and restore the IER
*/
- wait_for_xmitr(up);
- serial_out(up, UART_IER, ier);
+ wait_for_xmitr(up, BOTH_EMPTY);
+ serial_out(up, UART_IER, ier | UART_IER_THRI);
}
static int serial8250_console_setup(struct console *co, char *options)
if (ret)
goto out;
- ret = platform_driver_register(&serial8250_isa_driver);
- if (ret)
- goto unreg_uart_drv;
-
serial8250_isa_devs = platform_device_alloc("serial8250",
PLAT8250_DEV_LEGACY);
if (!serial8250_isa_devs) {
ret = -ENOMEM;
- goto unreg_plat_drv;
+ goto unreg_uart_drv;
}
ret = platform_device_add(serial8250_isa_devs);
serial8250_register_ports(&serial8250_reg, &serial8250_isa_devs->dev);
- goto out;
+ ret = platform_driver_register(&serial8250_isa_driver);
+ if (ret == 0)
+ goto out;
+ platform_device_del(serial8250_isa_devs);
put_dev:
platform_device_put(serial8250_isa_devs);
- unreg_plat_drv:
- platform_driver_unregister(&serial8250_isa_driver);
unreg_uart_drv:
uart_unregister_driver(&serial8250_reg);
out:
pbn_b2_bt_2_921600,
pbn_b2_bt_4_921600,
+ pbn_b3_2_115200,
pbn_b3_4_115200,
pbn_b3_8_115200,
.uart_offset = 8,
},
+ [pbn_b3_2_115200] = {
+ .flags = FL_BASE3,
+ .num_ports = 2,
+ .base_baud = 115200,
+ .uart_offset = 8,
+ },
[pbn_b3_4_115200] = {
.flags = FL_BASE3,
.num_ports = 4,
PCI_ANY_ID, PCI_ANY_ID, 0, 0,
pbn_nec_nile4 },
+ { PCI_VENDOR_ID_DCI, PCI_DEVICE_ID_DCI_PCCOM2,
+ PCI_ANY_ID, PCI_ANY_ID, 0, 0,
+ pbn_b3_2_115200 },
{ PCI_VENDOR_ID_DCI, PCI_DEVICE_ID_DCI_PCCOM4,
PCI_ANY_ID, PCI_ANY_ID, 0, 0,
pbn_b3_4_115200 },
work.)
To compile this driver as a module, choose M here: the
- module will be called serial.
+ module will be called 8250.
[WARNING: Do not compile this driver as a module if you are using
non-standard serial ports, since the configuration information will
be lost when the driver is unloaded. This limitation may be lifted
depends on SERIAL_AT91=y
help
Say Y here if you wish to have the five internal AT91RM9200 UARTs
- appear as /dev/ttyAT0-4 (major 240, minor 0-4) instead of the
+ appear as /dev/ttyAT0-4 (major 204, minor 154-158) instead of the
normal /dev/ttyS0-4 (major 4, minor 64-68). This is necessary if
you also want other UARTs, such as external 8250/16C550 compatible
UARTs.
.uartclk = 14745600,
.fifosize = 16,
.ops = &amba_pl010_pops,
- .flags = ASYNC_BOOT_AUTOCONF,
+ .flags = UPF_BOOT_AUTOCONF,
.line = 0,
},
.dtr_mask = 1 << 5,
.uartclk = 14745600,
.fifosize = 16,
.ops = &amba_pl010_pops,
- .flags = ASYNC_BOOT_AUTOCONF,
+ .flags = UPF_BOOT_AUTOCONF,
.line = 1,
},
.dtr_mask = 1 << 7,
while (status & (AT91_US_RXRDY)) {
ch = UART_GET_CHAR(port);
- if (tty->flip.count >= TTY_FLIPBUF_SIZE)
- goto ignore_char;
port->icount.rx++;
flg = TTY_NORMAL;
.fifosize = 16,
.ops = &clps711x_pops,
.line = 0,
- .flags = ASYNC_BOOT_AUTOCONF,
+ .flags = UPF_BOOT_AUTOCONF,
},
{
.iobase = SYSCON2,
.fifosize = 16,
.ops = &clps711x_pops,
.line = 1,
- .flags = ASYNC_BOOT_AUTOCONF,
+ .flags = UPF_BOOT_AUTOCONF,
}
};
DRIVER_NAME, sport);
if (retval) goto error_out2;
- retval = request_irq(sport->rtsirq, imx_rtsint, 0,
+ retval = request_irq(sport->rtsirq, imx_rtsint,
+ SA_TRIGGER_FALLING | SA_TRIGGER_RISING,
DRIVER_NAME, sport);
if (retval) goto error_out3;
- set_irq_type(sport->rtsirq, IRQT_BOTHEDGE);
/*
* Finally, clear and enable interrupts
.irq = UART1_MINT_RX,
.uartclk = 16000000,
.fifosize = 8,
- .flags = ASYNC_BOOT_AUTOCONF,
+ .flags = UPF_BOOT_AUTOCONF,
.ops = &imx_pops,
.line = 0,
},
.irq = UART2_MINT_RX,
.uartclk = 16000000,
.fifosize = 8,
- .flags = ASYNC_BOOT_AUTOCONF,
+ .flags = UPF_BOOT_AUTOCONF,
.ops = &imx_pops,
.line = 1,
},
dbg("resource %p (%lx..%lx)\n", res, res->start, res->end);
port->mapbase = res->start;
- port->membase = S3C24XX_VA_UART + (res->start - S3C2410_PA_UART);
+ port->membase = S3C24XX_VA_UART + (res->start - S3C24XX_PA_UART);
port->irq = platform_get_irq(platdev, 0);
ourport->clk = clk_get(&platdev->dev, "uart");
sa1100_ports[idx].port.membase = (void __iomem *)&Ser1UTCR0;
sa1100_ports[idx].port.mapbase = _Ser1UTCR0;
sa1100_ports[idx].port.irq = IRQ_Ser1UART;
- sa1100_ports[idx].port.flags = ASYNC_BOOT_AUTOCONF;
+ sa1100_ports[idx].port.flags = UPF_BOOT_AUTOCONF;
break;
case 2:
sa1100_ports[idx].port.membase = (void __iomem *)&Ser2UTCR0;
sa1100_ports[idx].port.mapbase = _Ser2UTCR0;
sa1100_ports[idx].port.irq = IRQ_Ser2ICP;
- sa1100_ports[idx].port.flags = ASYNC_BOOT_AUTOCONF;
+ sa1100_ports[idx].port.flags = UPF_BOOT_AUTOCONF;
break;
case 3:
sa1100_ports[idx].port.membase = (void __iomem *)&Ser3UTCR0;
sa1100_ports[idx].port.mapbase = _Ser3UTCR0;
sa1100_ports[idx].port.irq = IRQ_Ser3UART;
- sa1100_ports[idx].port.flags = ASYNC_BOOT_AUTOCONF;
+ sa1100_ports[idx].port.flags = UPF_BOOT_AUTOCONF;
break;
default:
struct termios *old, unsigned int min, unsigned int max)
{
unsigned int try, baud, altbaud = 38400;
- unsigned int flags = port->flags & UPF_SPD_MASK;
+ upf_t flags = port->flags & UPF_SPD_MASK;
if (flags == UPF_SPD_HI)
altbaud = 57600;
struct serial_struct new_serial;
struct uart_port *port = state->port;
unsigned long new_port;
- unsigned int change_irq, change_port, old_flags, closing_wait;
+ unsigned int change_irq, change_port, closing_wait;
unsigned int old_custom_divisor, close_delay;
+ upf_t old_flags, new_flags;
int retval = 0;
if (copy_from_user(&new_serial, newinfo, sizeof(new_serial)))
new_serial.type != port->type;
old_flags = port->flags;
+ new_flags = new_serial.flags;
old_custom_divisor = port->custom_divisor;
if (!capable(CAP_SYS_ADMIN)) {
(close_delay != state->close_delay) ||
(closing_wait != state->closing_wait) ||
(new_serial.xmit_fifo_size != port->fifosize) ||
- (((new_serial.flags ^ old_flags) & ~UPF_USR_MASK) != 0))
+ (((new_flags ^ old_flags) & ~UPF_USR_MASK) != 0))
goto exit;
port->flags = ((port->flags & ~UPF_USR_MASK) |
- (new_serial.flags & UPF_USR_MASK));
+ (new_flags & UPF_USR_MASK));
port->custom_divisor = new_serial.custom_divisor;
goto check_and_exit;
}
port->irq = new_serial.irq;
port->uartclk = new_serial.baud_base * 16;
port->flags = (port->flags & ~UPF_CHANGE_MASK) |
- (new_serial.flags & UPF_CHANGE_MASK);
+ (new_flags & UPF_CHANGE_MASK);
port->custom_divisor = new_serial.custom_divisor;
state->close_delay = close_delay;
state->closing_wait = closing_wait;
mutex_lock(&state->mutex);
if (state->info && state->info->flags & UIF_INITIALIZED) {
- struct uart_ops *ops = port->ops;
+ const struct uart_ops *ops = port->ops;
spin_lock_irq(&port->lock);
ops->stop_tx(port);
}
if (state->info && state->info->flags & UIF_INITIALIZED) {
- struct uart_ops *ops = port->ops;
+ const struct uart_ops *ops = port->ops;
int ret;
ops->set_mctrl(port, 0);
.uartclk = 14745600/2,
.fifosize = 16,
.ops = &lh7a40x_uart_ops,
- .flags = ASYNC_BOOT_AUTOCONF,
+ .flags = UPF_BOOT_AUTOCONF,
.line = 0,
},
},
.uartclk = 14745600/2,
.fifosize = 16,
.ops = &lh7a40x_uart_ops,
- .flags = ASYNC_BOOT_AUTOCONF,
+ .flags = UPF_BOOT_AUTOCONF,
.line = 1,
},
},
.uartclk = 14745600/2,
.fifosize = 16,
.ops = &lh7a40x_uart_ops,
- .flags = ASYNC_BOOT_AUTOCONF,
+ .flags = UPF_BOOT_AUTOCONF,
.line = 2,
},
},
.port = {
.membase = (void *)0xfffffe80,
.mapbase = 0xfffffe80,
- .iotype = SERIAL_IO_MEM,
+ .iotype = UPIO_MEM,
.irq = 25,
.ops = &sci_uart_ops,
- .flags = ASYNC_BOOT_AUTOCONF,
+ .flags = UPF_BOOT_AUTOCONF,
.line = 0,
},
.type = PORT_SCI,
.port = {
.membase = (void *)SCIF0,
.mapbase = SCIF0,
- .iotype = SERIAL_IO_MEM,
+ .iotype = UPIO_MEM,
.irq = 55,
.ops = &sci_uart_ops,
- .flags = ASYNC_BOOT_AUTOCONF,
+ .flags = UPF_BOOT_AUTOCONF,
.line = 0,
},
.type = PORT_SCIF,
.port = {
.membase = (void *)SCIF2,
.mapbase = SCIF2,
- .iotype = SERIAL_IO_MEM,
+ .iotype = UPIO_MEM,
.irq = 59,
.ops = &sci_uart_ops,
- .flags = ASYNC_BOOT_AUTOCONF,
+ .flags = UPF_BOOT_AUTOCONF,
.line = 1,
},
.type = PORT_SCIF,
.port = {
.membase = (void *)0xfffffe80,
.mapbase = 0xfffffe80,
- .iotype = SERIAL_IO_MEM,
+ .iotype = UPIO_MEM,
.irq = 25,
.ops = &sci_uart_ops,
- .flags = ASYNC_BOOT_AUTOCONF,
+ .flags = UPF_BOOT_AUTOCONF,
.line = 0,
},
.type = PORT_SCI,
.port = {
.membase = (void *)0xa4000150,
.mapbase = 0xa4000150,
- .iotype = SERIAL_IO_MEM,
+ .iotype = UPIO_MEM,
.irq = 59,
.ops = &sci_uart_ops,
- .flags = ASYNC_BOOT_AUTOCONF,
+ .flags = UPF_BOOT_AUTOCONF,
.line = 1,
},
.type = PORT_SCIF,
.port = {
.membase = (void *)0xa4000140,
.mapbase = 0xa4000140,
- .iotype = SERIAL_IO_MEM,
+ .iotype = UPIO_MEM,
.irq = 55,
.ops = &sci_uart_ops,
- .flags = ASYNC_BOOT_AUTOCONF,
+ .flags = UPF_BOOT_AUTOCONF,
.line = 2,
},
.type = PORT_IRDA,
.port = {
.membase = (void *)0xA4430000,
.mapbase = 0xA4430000,
- .iotype = SERIAL_IO_MEM,
+ .iotype = UPIO_MEM,
.irq = 25,
.ops = &sci_uart_ops,
- .flags = ASYNC_BOOT_AUTOCONF,
+ .flags = UPF_BOOT_AUTOCONF,
.line = 0,
},
.type = PORT_SCIF,
.port = {
.membase = (void *)0xffe00000,
.mapbase = 0xffe00000,
- .iotype = SERIAL_IO_MEM,
+ .iotype = UPIO_MEM,
.irq = 25,
.ops = &sci_uart_ops,
- .flags = ASYNC_BOOT_AUTOCONF,
+ .flags = UPF_BOOT_AUTOCONF,
.line = 0,
},
.type = PORT_SCIF,
.port = {
.membase = (void *)0xffe80000,
.mapbase = 0xffe80000,
- .iotype = SERIAL_IO_MEM,
+ .iotype = UPIO_MEM,
.irq = 43,
.ops = &sci_uart_ops,
- .flags = ASYNC_BOOT_AUTOCONF,
+ .flags = UPF_BOOT_AUTOCONF,
.line = 0,
},
.type = PORT_SCIF,
.port = {
.membase = (void *)0xffe00000,
.mapbase = 0xffe00000,
- .iotype = SERIAL_IO_MEM,
+ .iotype = UPIO_MEM,
.irq = 25,
.ops = &sci_uart_ops,
- .flags = ASYNC_BOOT_AUTOCONF,
+ .flags = UPF_BOOT_AUTOCONF,
.line = 0,
},
.type = PORT_SCI,
.port = {
.membase = (void *)0xffe80000,
.mapbase = 0xffe80000,
- .iotype = SERIAL_IO_MEM,
+ .iotype = UPIO_MEM,
.irq = 43,
.ops = &sci_uart_ops,
- .flags = ASYNC_BOOT_AUTOCONF,
+ .flags = UPF_BOOT_AUTOCONF,
.line = 1,
},
.type = PORT_SCIF,
.port = {
.membase = (void *)0xfe600000,
.mapbase = 0xfe600000,
- .iotype = SERIAL_IO_MEM,
+ .iotype = UPIO_MEM,
.irq = 55,
.ops = &sci_uart_ops,
- .flags = ASYNC_BOOT_AUTOCONF,
+ .flags = UPF_BOOT_AUTOCONF,
.line = 0,
},
.type = PORT_SCIF,
.port = {
.membase = (void *)0xfe610000,
.mapbase = 0xfe610000,
- .iotype = SERIAL_IO_MEM,
+ .iotype = UPIO_MEM,
.irq = 75,
.ops = &sci_uart_ops,
- .flags = ASYNC_BOOT_AUTOCONF,
+ .flags = UPF_BOOT_AUTOCONF,
.line = 1,
},
.type = PORT_SCIF,
.port = {
.membase = (void *)0xfe620000,
.mapbase = 0xfe620000,
- .iotype = SERIAL_IO_MEM,
+ .iotype = UPIO_MEM,
.irq = 79,
.ops = &sci_uart_ops,
- .flags = ASYNC_BOOT_AUTOCONF,
+ .flags = UPF_BOOT_AUTOCONF,
.line = 2,
},
.type = PORT_SCIF,
.port = {
.membase = (void *)0xffe80000,
.mapbase = 0xffe80000,
- .iotype = SERIAL_IO_MEM,
+ .iotype = UPIO_MEM,
.irq = 43,
.ops = &sci_uart_ops,
- .flags = ASYNC_BOOT_AUTOCONF,
+ .flags = UPF_BOOT_AUTOCONF,
.line = 0,
},
.type = PORT_SCIF,
.port = {
.membase = (void *)0xffe00000,
.mapbase = 0xffe00000,
- .iotype = SERIAL_IO_MEM,
+ .iotype = UPIO_MEM,
.irq = 26,
.ops = &sci_uart_ops,
- .flags = ASYNC_BOOT_AUTOCONF,
+ .flags = UPF_BOOT_AUTOCONF,
.line = 0,
},
.type = PORT_SCIF,
.port = {
.membase = (void *)0xffe80000,
.mapbase = 0xffe80000,
- .iotype = SERIAL_IO_MEM,
+ .iotype = UPIO_MEM,
.irq = 43,
.ops = &sci_uart_ops,
- .flags = ASYNC_BOOT_AUTOCONF,
+ .flags = UPF_BOOT_AUTOCONF,
.line = 1,
},
.type = PORT_SCIF,
#elif defined(CONFIG_CPU_SUBTYPE_SH5_101) || defined(CONFIG_CPU_SUBTYPE_SH5_103)
{
.port = {
- .iotype = SERIAL_IO_MEM,
+ .iotype = UPIO_MEM,
.irq = 42,
.ops = &sci_uart_ops,
- .flags = ASYNC_BOOT_AUTOCONF,
+ .flags = UPF_BOOT_AUTOCONF,
.line = 0,
},
.type = PORT_SCIF,
.port = {
.membase = (void *)0x00ffffb0,
.mapbase = 0x00ffffb0,
- .iotype = SERIAL_IO_MEM,
+ .iotype = UPIO_MEM,
.irq = 54,
.ops = &sci_uart_ops,
- .flags = ASYNC_BOOT_AUTOCONF,
+ .flags = UPF_BOOT_AUTOCONF,
.line = 0,
},
.type = PORT_SCI,
.port = {
.membase = (void *)0x00ffffb8,
.mapbase = 0x00ffffb8,
- .iotype = SERIAL_IO_MEM,
+ .iotype = UPIO_MEM,
.irq = 58,
.ops = &sci_uart_ops,
- .flags = ASYNC_BOOT_AUTOCONF,
+ .flags = UPF_BOOT_AUTOCONF,
.line = 1,
},
.type = PORT_SCI,
.port = {
.membase = (void *)0x00ffffc0,
.mapbase = 0x00ffffc0,
- .iotype = SERIAL_IO_MEM,
+ .iotype = UPIO_MEM,
.irq = 62,
.ops = &sci_uart_ops,
- .flags = ASYNC_BOOT_AUTOCONF,
+ .flags = UPF_BOOT_AUTOCONF,
.line = 2,
},
.type = PORT_SCI,
.port = {
.membase = (void *)0x00ffff78,
.mapbase = 0x00ffff78,
- .iotype = SERIAL_IO_MEM,
+ .iotype = UPIO_MEM,
.irq = 90,
.ops = &sci_uart_ops,
- .flags = ASYNC_BOOT_AUTOCONF,
+ .flags = UPF_BOOT_AUTOCONF,
.line = 0,
},
.type = PORT_SCI,
.port = {
.membase = (void *)0x00ffff80,
.mapbase = 0x00ffff80,
- .iotype = SERIAL_IO_MEM,
+ .iotype = UPIO_MEM,
.irq = 94,
.ops = &sci_uart_ops,
- .flags = ASYNC_BOOT_AUTOCONF,
+ .flags = UPF_BOOT_AUTOCONF,
.line = 1,
},
.type = PORT_SCI,
.port = {
.membase = (void *)0x00ffff88,
.mapbase = 0x00ffff88,
- .iotype = SERIAL_IO_MEM,
+ .iotype = UPIO_MEM,
.irq = 98,
.ops = &sci_uart_ops,
- .flags = ASYNC_BOOT_AUTOCONF,
+ .flags = UPF_BOOT_AUTOCONF,
.line = 2,
},
.type = PORT_SCI,
* driver for that.
*
*
- * Copyright (c) 2004-2005 Silicon Graphics, Inc. All Rights Reserved.
+ * Copyright (c) 2004-2006 Silicon Graphics, Inc. All Rights Reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License
misc.name = DEVICE_NAME_DYNAMIC;
retval = misc_register(&misc);
if (retval != 0) {
- printk
- ("Failed to register console device using misc_register.\n");
+ printk(KERN_WARNING "Failed to register console "
+ "device using misc_register.\n");
return -ENODEV;
}
sal_console_uart.major = MISC_MAJOR;
{
unsigned long flags = 0;
struct sn_cons_port *port = &sal_console_port;
-#if defined(CONFIG_SMP) || defined(CONFIG_PREEMPT)
static int stole_lock = 0;
-#endif
BUG_ON(!port->sc_is_asynch);
/* We can't look at the xmit buffer if we're not registered with serial core
* yet. So only do the fancy recovery after registering
*/
- if (port->sc_port.info) {
-
- /* somebody really wants this output, might be an
- * oops, kdb, panic, etc. make sure they get it. */
-#if defined(CONFIG_SMP) || defined(CONFIG_PREEMPT)
- if (spin_is_locked(&port->sc_port.lock)) {
- int lhead = port->sc_port.info->xmit.head;
- int ltail = port->sc_port.info->xmit.tail;
- int counter, got_lock = 0;
+ if (!port->sc_port.info) {
+ /* Not yet registered with serial core - simple case */
+ puts_raw_fixed(port->sc_ops->sal_puts_raw, s, count);
+ return;
+ }
- /*
- * We attempt to determine if someone has died with the
- * lock. We wait ~20 secs after the head and tail ptrs
- * stop moving and assume the lock holder is not functional
- * and plow ahead. If the lock is freed within the time out
- * period we re-get the lock and go ahead normally. We also
- * remember if we have plowed ahead so that we don't have
- * to wait out the time out period again - the asumption
- * is that we will time out again.
- */
+ /* somebody really wants this output, might be an
+ * oops, kdb, panic, etc. make sure they get it. */
+ if (spin_is_locked(&port->sc_port.lock)) {
+ int lhead = port->sc_port.info->xmit.head;
+ int ltail = port->sc_port.info->xmit.tail;
+ int counter, got_lock = 0;
+
+ /*
+ * We attempt to determine if someone has died with the
+ * lock. We wait ~20 secs after the head and tail ptrs
+ * stop moving and assume the lock holder is not functional
+ * and plow ahead. If the lock is freed within the time out
+ * period we re-get the lock and go ahead normally. We also
+ * remember if we have plowed ahead so that we don't have
+ * to wait out the time out period again - the asumption
+ * is that we will time out again.
+ */
- for (counter = 0; counter < 150; mdelay(125), counter++) {
- if (!spin_is_locked(&port->sc_port.lock)
- || stole_lock) {
- if (!stole_lock) {
- spin_lock_irqsave(&port->
- sc_port.lock,
- flags);
- got_lock = 1;
- }
- break;
- } else {
- /* still locked */
- if ((lhead !=
- port->sc_port.info->xmit.head)
- || (ltail !=
- port->sc_port.info->xmit.
- tail)) {
- lhead =
- port->sc_port.info->xmit.
- head;
- ltail =
- port->sc_port.info->xmit.
- tail;
- counter = 0;
- }
+ for (counter = 0; counter < 150; mdelay(125), counter++) {
+ if (!spin_is_locked(&port->sc_port.lock)
+ || stole_lock) {
+ if (!stole_lock) {
+ spin_lock_irqsave(&port->sc_port.lock,
+ flags);
+ got_lock = 1;
}
- }
- /* flush anything in the serial core xmit buffer, raw */
- sn_transmit_chars(port, 1);
- if (got_lock) {
- spin_unlock_irqrestore(&port->sc_port.lock,
- flags);
- stole_lock = 0;
+ break;
} else {
- /* fell thru */
- stole_lock = 1;
+ /* still locked */
+ if ((lhead != port->sc_port.info->xmit.head)
+ || (ltail !=
+ port->sc_port.info->xmit.tail)) {
+ lhead =
+ port->sc_port.info->xmit.head;
+ ltail =
+ port->sc_port.info->xmit.tail;
+ counter = 0;
+ }
}
- puts_raw_fixed(port->sc_ops->sal_puts_raw, s, count);
- } else {
- stole_lock = 0;
-#endif
- spin_lock_irqsave(&port->sc_port.lock, flags);
- sn_transmit_chars(port, 1);
+ }
+ /* flush anything in the serial core xmit buffer, raw */
+ sn_transmit_chars(port, 1);
+ if (got_lock) {
spin_unlock_irqrestore(&port->sc_port.lock, flags);
-
- puts_raw_fixed(port->sc_ops->sal_puts_raw, s, count);
-#if defined(CONFIG_SMP) || defined(CONFIG_PREEMPT)
+ stole_lock = 0;
+ } else {
+ /* fell thru */
+ stole_lock = 1;
}
-#endif
- }
- else {
- /* Not yet registered with serial core - simple case */
+ puts_raw_fixed(port->sc_ops->sal_puts_raw, s, count);
+ } else {
+ stole_lock = 0;
+ spin_lock_irqsave(&port->sc_port.lock, flags);
+ sn_transmit_chars(port, 1);
+ spin_unlock_irqrestore(&port->sc_port.lock, flags);
+
puts_raw_fixed(port->sc_ops->sal_puts_raw, s, count);
}
}
char *mode_prop = "ttyX-mode";
char *cd_prop = "ttyX-ignore-cd";
char *dtr_prop = "ttyX-rts-dtr-off";
+ char *ssp_console_modes_prop = "ssp-console-modes";
int baud, bits, stop, cflag;
char parity;
int carrier = 0;
if (!serial_console)
return;
- if (serial_console == 1) {
+ switch (serial_console) {
+ case PROMDEV_OTTYA:
mode_prop[3] = 'a';
cd_prop[3] = 'a';
dtr_prop[3] = 'a';
- } else {
+ break;
+
+ case PROMDEV_OTTYB:
mode_prop[3] = 'b';
cd_prop[3] = 'b';
dtr_prop[3] = 'b';
+ break;
+
+ case PROMDEV_ORSC:
+
+ nd = prom_pathtoinode("rsc");
+ if (!nd) {
+ strcpy(mode, "115200,8,n,1,-");
+ goto no_options;
+ }
+
+ if (!prom_node_has_property(nd, ssp_console_modes_prop)) {
+ strcpy(mode, "115200,8,n,1,-");
+ goto no_options;
+ }
+
+ memset(mode, 0, sizeof(mode));
+ prom_getstring(nd, ssp_console_modes_prop, mode, sizeof(mode));
+ goto no_options;
+
+ default:
+ strcpy(mode, "9600,8,n,1,-");
+ goto no_options;
}
topnd = prom_getchild(prom_root_node);
case 9600: cflag |= B9600; break;
case 19200: cflag |= B19200; break;
case 38400: cflag |= B38400; break;
+ case 57600: cflag |= B57600; break;
+ case 115200: cflag |= B115200; break;
+ case 230400: cflag |= B230400; break;
+ case 460800: cflag |= B460800; break;
default: baud = 9600; cflag |= B9600; break;
}
sunserial_console_termios(con);
- /* Firmware console speed is limited to 150-->38400 baud so
- * this hackish cflag thing is OK.
- */
switch (con->cflag & CBAUD) {
case B150: baud = 150; break;
case B300: baud = 300; break;
default: case B9600: baud = 9600; break;
case B19200: baud = 19200; break;
case B38400: baud = 38400; break;
+ case B57600: baud = 57600; break;
+ case B115200: baud = 115200; break;
+ case B230400: baud = 230400; break;
+ case B460800: baud = 460800; break;
};
/*
* if it is, then bail out, because there's likely no UART
* here.
*/
- if (!(up->port.flags & ASYNC_BUGGY_UART) &&
+ if (!(up->port.flags & UPF_BUGGY_UART) &&
(serial_inp(up, UART_LSR) == 0xff)) {
printk("ttyS%d: LSR safety check engaged!\n", up->port.line);
return -ENODEV;
up->ier = UART_IER_RLSI | UART_IER_RDI;
serial_outp(up, UART_IER, up->ier);
- if (up->port.flags & ASYNC_FOURPORT) {
+ if (up->port.flags & UPF_FOURPORT) {
unsigned int icp;
/*
* Enable interrupts on the AST Fourport board
serial_outp(up, UART_IER, 0);
spin_lock_irqsave(&up->port.lock, flags);
- if (up->port.flags & ASYNC_FOURPORT) {
+ if (up->port.flags & UPF_FOURPORT) {
/* reset interrupts on the AST Fourport board */
inb((up->port.iobase & 0xfe0) | 0x1f);
up->port.mctrl |= TIOCM_OUT1;
spin_lock_irqsave(&up->port.lock, flags);
- if (!(up->port.flags & ASYNC_BUGGY_UART)) {
+ if (!(up->port.flags & UPF_BUGGY_UART)) {
/*
* Do a simple existence test first; if we fail this, there's
* no point trying anything else.
* manufacturer would be stupid enough to design a board
* that conflicts with COM 1-4 --- we hope!
*/
- if (!(up->port.flags & ASYNC_SKIP_TEST)) {
+ if (!(up->port.flags & UPF_SKIP_TEST)) {
serial_outp(up, UART_MCR, UART_MCR_LOOP | 0x0A);
status1 = serial_inp(up, UART_MSR) & 0xF0;
serial_outp(up, UART_MCR, save_mcr);
} while ((status & BOTH_EMPTY) != BOTH_EMPTY);
/* Wait up to 1s for flow control if necessary */
- if (up->port.flags & ASYNC_CONS_FLOW) {
+ if (up->port.flags & UPF_CONS_FLOW) {
tmout = 1000000;
while (--tmout &&
((serial_in(up, UART_MSR) & UART_MSR_CTS) == 0))
up->su_type == SU_PORT_KBD)
continue;
- up->port.flags |= ASYNC_BOOT_AUTOCONF;
+ up->port.flags |= UPF_BOOT_AUTOCONF;
up->port.type = PORT_UNKNOWN;
up->port.uartclk = (SU_BASE_BAUD * 16);
int ret = 0;
memset(&var->transp, 0, sizeof(var->transp));
- memset(&var->red, 0, sizeof(var->red));
- memset(&var->green, 0, sizeof(var->green));
- memset(&var->blue, 0, sizeof(var->blue));
+
+ var->red.msb_right = 0;
+ var->green.msb_right = 0;
+ var->blue.msb_right = 0;
switch (var->bits_per_pixel) {
case 1:
var->blue.offset = 0;
break;
case 16:
- var->red.length = 5;
- var->green.length = 6;
- var->blue.length = 5;
- if (fb->panel->cntl & CNTL_BGR) {
- var->red.offset = 11;
- var->green.offset = 5;
- var->blue.offset = 0;
- } else {
- var->red.offset = 0;
- var->green.offset = 5;
- var->blue.offset = 11;
- }
+ var->red.length = 5;
+ var->blue.length = 5;
+ /*
+ * Green length can be 5 or 6 depending whether
+ * we're operating in RGB555 or RGB565 mode.
+ */
+ if (var->green.length != 5 && var->green.length != 6)
+ var->green.length = 6;
break;
case 32:
if (fb->panel->cntl & CNTL_LCDTFT) {
var->red.length = 8;
var->green.length = 8;
var->blue.length = 8;
-
- if (fb->panel->cntl & CNTL_BGR) {
- var->red.offset = 16;
- var->green.offset = 8;
- var->blue.offset = 0;
- } else {
- var->red.offset = 0;
- var->green.offset = 8;
- var->blue.offset = 16;
- }
break;
}
default:
break;
}
+ /*
+ * >= 16bpp displays have separate colour component bitfields
+ * encoded in the pixel data. Calculate their position from
+ * the bitfield length defined above.
+ */
+ if (ret == 0 && var->bits_per_pixel >= 16) {
+ if (fb->panel->cntl & CNTL_BGR) {
+ var->blue.offset = 0;
+ var->green.offset = var->blue.offset + var->blue.length;
+ var->red.offset = var->green.offset + var->green.length;
+ } else {
+ var->red.offset = 0;
+ var->green.offset = var->red.offset + var->red.length;
+ var->blue.offset = var->green.offset + var->green.length;
+ }
+ }
+
return ret;
}
#define FBIOPUTCMAP32 _IOW('F', 3, struct fbcmap32)
#define FBIOGETCMAP32 _IOW('F', 4, struct fbcmap32)
-static int fbiogetputcmap(struct file *file, struct fb_info *info,
- unsigned int cmd, unsigned long arg)
+static int fbiogetputcmap(struct fb_info *info, unsigned int cmd, unsigned long arg)
{
struct fbcmap32 __user *argp = (void __user *)arg;
struct fbcmap __user *p = compat_alloc_user_space(sizeof(*p));
ret |= put_user(compat_ptr(addr), &p->blue);
if (ret)
return -EFAULT;
- return info->fbops->fb_ioctl(file->f_dentry->d_inode, file,
+ return info->fbops->fb_ioctl(info,
(cmd == FBIOPUTCMAP32) ?
FBIOPUTCMAP_SPARC : FBIOGETCMAP_SPARC,
- (unsigned long)p, info);
+ (unsigned long)p);
}
struct fbcursor32 {
#define FBIOSCURSOR32 _IOW('F', 24, struct fbcursor32)
#define FBIOGCURSOR32 _IOW('F', 25, struct fbcursor32)
-static int fbiogscursor(struct file *file, struct fb_info *info,
- unsigned long arg)
+static int fbiogscursor(struct fb_info *info, unsigned long arg)
{
struct fbcursor __user *p = compat_alloc_user_space(sizeof(*p));
struct fbcursor32 __user *argp = (void __user *)arg;
ret |= put_user(compat_ptr(addr), &p->image);
if (ret)
return -EFAULT;
- return info->fbops->fb_ioctl(file->f_dentry->d_inode, file,
- FBIOSCURSOR, (unsigned long)p, info);
+ return info->fbops->fb_ioctl(info, FBIOSCURSOR, (unsigned long)p);
}
-long sbusfb_compat_ioctl(struct file *file, unsigned int cmd,
- unsigned long arg, struct fb_info *info)
+int sbusfb_compat_ioctl(struct fb_info *info, unsigned int cmd, unsigned long arg)
{
switch (cmd) {
case FBIOGTYPE:
case FBIOSCURPOS:
case FBIOGCURPOS:
case FBIOGCURMAX:
- return info->fbops->fb_ioctl(file->f_dentry->d_inode,
- file, cmd, arg, info);
+ return info->fbops->fb_ioctl(info, cmd, arg);
case FBIOPUTCMAP32:
- return fbiogetputcmap(file, info, cmd, arg);
+ return fbiogetputcmap(info, cmd, arg);
case FBIOGETCMAP32:
- return fbiogetputcmap(file, info, cmd, arg);
+ return fbiogetputcmap(info, cmd, arg);
case FBIOSCURSOR32:
- return fbiogscursor(file, info, arg);
+ return fbiogscursor(info, arg);
default:
return -ENOIOCTLCMD;
}
int sbusfb_ioctl_helper(unsigned long cmd, unsigned long arg,
struct fb_info *info,
int type, int fb_depth, unsigned long fb_size);
-long sbusfb_compat_ioctl(struct file *file, unsigned int cmd,
- unsigned long arg, struct fb_info *info);
+int sbusfb_compat_ioctl(struct fb_info *info, unsigned int cmd,
+ unsigned long arg);
#endif /* _SBUSLIB_H */
conv.o \
vfs_super.o \
vfs_inode.o \
+ vfs_addr.o \
vfs_file.o \
vfs_dir.o \
vfs_dentry.o \
*/
extern struct file_system_type v9fs_fs_type;
+extern struct address_space_operations v9fs_addr_operations;
extern struct file_operations v9fs_file_operations;
extern struct file_operations v9fs_dir_operations;
extern struct dentry_operations v9fs_dentry_operations;
--- /dev/null
+/*
+ * linux/fs/9p/vfs_addr.c
+ *
+ * This file contians vfs address (mmap) ops for 9P2000.
+ *
+ * Copyright (C) 2005 by Eric Van Hensbergen <ericvh@gmail.com>
+ * Copyright (C) 2002 by Ron Minnich <rminnich@lanl.gov>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to:
+ * Free Software Foundation
+ * 51 Franklin Street, Fifth Floor
+ * Boston, MA 02111-1301 USA
+ *
+ */
+
+#include <linux/module.h>
+#include <linux/errno.h>
+#include <linux/fs.h>
+#include <linux/file.h>
+#include <linux/stat.h>
+#include <linux/string.h>
+#include <linux/smp_lock.h>
+#include <linux/inet.h>
+#include <linux/version.h>
+#include <linux/pagemap.h>
+#include <linux/idr.h>
+
+#include "debug.h"
+#include "v9fs.h"
+#include "9p.h"
+#include "v9fs_vfs.h"
+#include "fid.h"
+
+/**
+ * v9fs_vfs_readpage - read an entire page in from 9P
+ *
+ * @file: file being read
+ * @page: structure to page
+ *
+ */
+
+static int v9fs_vfs_readpage(struct file *filp, struct page *page)
+{
+ char *buffer = NULL;
+ int retval = -EIO;
+ loff_t offset = page_offset(page);
+ int count = PAGE_CACHE_SIZE;
+ struct inode *inode = filp->f_dentry->d_inode;
+ struct v9fs_session_info *v9ses = v9fs_inode2v9ses(inode);
+ int rsize = v9ses->maxdata - V9FS_IOHDRSZ;
+ struct v9fs_fid *v9f = filp->private_data;
+ struct v9fs_fcall *fcall = NULL;
+ int fid = v9f->fid;
+ int total = 0;
+ int result = 0;
+
+ buffer = kmap(page);
+ do {
+ if (count < rsize)
+ rsize = count;
+
+ result = v9fs_t_read(v9ses, fid, offset, rsize, &fcall);
+
+ if (result < 0) {
+ printk(KERN_ERR "v9fs_t_read returned %d\n",
+ result);
+
+ kfree(fcall);
+ goto UnmapAndUnlock;
+ } else
+ offset += result;
+
+ memcpy(buffer, fcall->params.rread.data, result);
+
+ count -= result;
+ buffer += result;
+ total += result;
+
+ kfree(fcall);
+
+ if (result < rsize)
+ break;
+ } while (count);
+
+ memset(buffer, 0, count);
+ flush_dcache_page(page);
+ SetPageUptodate(page);
+ retval = 0;
+
+UnmapAndUnlock:
+ kunmap(page);
+ unlock_page(page);
+ return retval;
+}
+
+struct address_space_operations v9fs_addr_operations = {
+ .readpage = v9fs_vfs_readpage,
+};
total += result;
} while (count);
+ if(inode->i_mapping->nrpages)
+ invalidate_inode_pages2(inode->i_mapping);
+
return total;
}
.open = v9fs_file_open,
.release = v9fs_dir_release,
.lock = v9fs_file_lock,
+ .mmap = generic_file_mmap,
};
inode->i_blocks = 0;
inode->i_rdev = 0;
inode->i_atime = inode->i_mtime = inode->i_ctime = CURRENT_TIME;
+ inode->i_mapping->a_ops = &v9fs_addr_operations;
switch (mode & S_IFMT) {
case S_IFIFO:
/**
* bio_add_pc_page - attempt to add page to bio
+ * @q: the target queue
* @bio: destination bio
* @page: page to add
* @len: vec entry length
+Version 1.40
+------------
+Use fsuid (fsgid) more consistently instead of uid (gid). Improve performance
+of readpages by eliminating one extra memcpy. Allow update of file size
+from remote server even if file is open for write as long as mount is
+directio. Recognize share mode security and send NTLM encrypted password
+on tree connect if share mode negotiated.
+
Version 1.39
------------
Defer close of a file handle slightly if pending writes depend on that handle
CIFS Unix Extensions. Fix setfacl/getfacl on bigendian. Timeout negative
dentries so files that the client sees as deleted but that later get created
on the server will be recognized. Add client side permission check on setattr.
+Timeout stuck requests better (where server has never responded or sent corrupt
+responses)
Version 1.38
------------
SFU does). In the future the bottom 9 bits of the mode
mode also will be emulated using queries of the security
descriptor (ACL).
-
+sec Security mode. Allowed values are:
+ none attempt to connection as a null user (no name)
+ krb5 Use Kerberos version 5 authentication
+ krb5i Use Kerberos authentication and packet signing
+ ntlm Use NTLM password hashing (default)
+ ntlmi Use NTLM password hashing with signing (if
+ /proc/fs/cifs/PacketSigningEnabled on or if
+ server requires signing also can be the default)
+ ntlmv2 Use NTLMv2 password hashing
+ ntlmv2i Use NTLMv2 password hashing with packet signing
+
The mount.cifs mount helper also accepts a few mount options before -o
including:
if (c == '1' || c == 'y' || c == 'Y' || c == '0') {
read_lock(&GlobalSMBSeslock);
+#ifdef CONFIG_CIFS_STATS2
+ atomic_set(&totBufAllocCount, 0);
+ atomic_set(&totSmBufAllocCount, 0);
+#endif /* CONFIG_CIFS_STATS2 */
list_for_each(tmp, &GlobalTreeConnectionList) {
tcon = list_entry(tmp, struct cifsTconInfo,
cifsConnectionList);
smBufAllocCount.counter,cifs_min_small);
length += item_length;
buf += item_length;
+#ifdef CONFIG_CIFS_STATS2
+ item_length = sprintf(buf, "Total Large %d Small %d Allocations\n",
+ atomic_read(&totBufAllocCount),
+ atomic_read(&totSmBufAllocCount));
+ length += item_length;
+ buf += item_length;
+#endif /* CONFIG_CIFS_STATS2 */
+
item_length =
sprintf(buf,"Operations (MIDs): %d\n",
midCount.counter);
static write_proc_t ntlmv2_enabled_write;
static read_proc_t packet_signing_enabled_read;
static write_proc_t packet_signing_enabled_write;
-static read_proc_t quotaEnabled_read;
-static write_proc_t quotaEnabled_write;
+static read_proc_t experimEnabled_read;
+static write_proc_t experimEnabled_write;
static read_proc_t linuxExtensionsEnabled_read;
static write_proc_t linuxExtensionsEnabled_write;
pde->write_proc = oplockEnabled_write;
pde = create_proc_read_entry("Experimental", 0, proc_fs_cifs,
- quotaEnabled_read, NULL);
+ experimEnabled_read, NULL);
if (pde)
- pde->write_proc = quotaEnabled_write;
+ pde->write_proc = experimEnabled_write;
pde = create_proc_read_entry("LinuxExtensionsEnabled", 0, proc_fs_cifs,
linuxExtensionsEnabled_read, NULL);
}
static int
-quotaEnabled_read(char *page, char **start, off_t off,
+experimEnabled_read(char *page, char **start, off_t off,
int count, int *eof, void *data)
{
int len;
len = sprintf(page, "%d\n", experimEnabled);
-/* could also check if quotas are enabled in kernel
- as a whole first */
+
len -= off;
*start = page + off;
return len;
}
static int
-quotaEnabled_write(struct file *file, const char __user *buffer,
+experimEnabled_write(struct file *file, const char __user *buffer,
unsigned long count, void *data)
{
- char c;
- int rc;
+ char c;
+ int rc;
- rc = get_user(c, buffer);
- if (rc)
- return rc;
- if (c == '0' || c == 'n' || c == 'N')
- experimEnabled = 0;
- else if (c == '1' || c == 'y' || c == 'Y')
- experimEnabled = 1;
+ rc = get_user(c, buffer);
+ if (rc)
+ return rc;
+ if (c == '0' || c == 'n' || c == 'N')
+ experimEnabled = 0;
+ else if (c == '1' || c == 'y' || c == 'Y')
+ experimEnabled = 1;
+ else if (c == '2')
+ experimEnabled = 2;
- return count;
+ return count;
}
static int
int len;
len = sprintf(page, "%d\n", linuxExtEnabled);
-/* could also check if quotas are enabled in kernel
- as a whole first */
len -= off;
*start = page + off;
#define CIFS_MOUNT_DIRECT_IO 8 /* do not write nor read through page cache */
#define CIFS_MOUNT_NO_XATTR 0x10 /* if set - disable xattr support */
#define CIFS_MOUNT_MAP_SPECIAL_CHR 0x20 /* remap illegal chars in filenames */
-#define CIFS_MOUNT_POSIX_PATHS 0x40 /* Negotiate posix pathnames if possible. */
-#define CIFS_MOUNT_UNX_EMUL 0x80 /* Network compat with SFUnix emulation */
+#define CIFS_MOUNT_POSIX_PATHS 0x40 /* Negotiate posix pathnames if possible. */
+#define CIFS_MOUNT_UNX_EMUL 0x80 /* Network compat with SFUnix emulation */
#define CIFS_MOUNT_NO_BRL 0x100 /* No sending byte range locks to srv */
+#define CIFS_MOUNT_CIFS_ACL 0x200 /* send ACL requests to non-POSIX srv */
struct cifs_sb_info {
struct cifsTconInfo *tcon; /* primary mount */
--- /dev/null
+/*
+ * fs/cifs/cifsacl.h
+ *
+ * Copyright (c) International Business Machines Corp., 2005
+ * Author(s): Steve French (sfrench@us.ibm.com)
+ *
+ * This library is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published
+ * by the Free Software Foundation; either version 2.1 of the License, or
+ * (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See
+ * the GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this library; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+
+#ifndef _CIFSACL_H
+#define _CIFSACL_H
+
+struct cifs_sid {
+ __u8 revision; /* revision level */
+ __u8 num_subauths;
+ __u8 authority[6];
+ __u32 sub_auth[4];
+ /* next sub_auth if any ... */
+} __attribute__((packed));
+
+/* everyone */
+extern const struct cifs_sid sid_everyone;
+/* group users */
+extern const struct cifs_sid sid_user;
+
+#endif /* _CIFSACL_H */
/*
* fs/cifs/cifsencrypt.c
*
- * Copyright (C) International Business Machines Corp., 2003
+ * Copyright (C) International Business Machines Corp., 2005
* Author(s): Steve French (sfrench@us.ibm.com)
*
* This library is free software; you can redistribute it and/or modify
return rc;
}
+static int cifs_calc_signature2(const struct kvec * iov, int n_vec,
+ const char * key, char * signature)
+{
+ struct MD5Context context;
+
+ if((iov == NULL) || (signature == NULL))
+ return -EINVAL;
+
+ MD5Init(&context);
+ MD5Update(&context,key,CIFS_SESSION_KEY_SIZE+16);
+
+/* MD5Update(&context,cifs_pdu->Protocol,cifs_pdu->smb_buf_length); */ /* BB FIXME BB */
+
+ MD5Final(signature,&context);
+
+ return -EOPNOTSUPP;
+/* return 0; */
+}
+
+
+int cifs_sign_smb2(struct kvec * iov, int n_vec, struct TCP_Server_Info *server,
+ __u32 * pexpected_response_sequence_number)
+{
+ int rc = 0;
+ char smb_signature[20];
+ struct smb_hdr * cifs_pdu = iov[0].iov_base;
+
+ if((cifs_pdu == NULL) || (server == NULL))
+ return -EINVAL;
+
+ if((cifs_pdu->Flags2 & SMBFLG2_SECURITY_SIGNATURE) == 0)
+ return rc;
+
+ spin_lock(&GlobalMid_Lock);
+ cifs_pdu->Signature.Sequence.SequenceNumber =
+ cpu_to_le32(server->sequence_number);
+ cifs_pdu->Signature.Sequence.Reserved = 0;
+
+ *pexpected_response_sequence_number = server->sequence_number++;
+ server->sequence_number++;
+ spin_unlock(&GlobalMid_Lock);
+
+ rc = cifs_calc_signature2(iov, n_vec, server->mac_signing_key,
+ smb_signature);
+ if(rc)
+ memset(cifs_pdu->Signature.SecuritySignature, 0, 8);
+ else
+ memcpy(cifs_pdu->Signature.SecuritySignature, smb_signature, 8);
+
+ return rc;
+
+}
+
int cifs_verify_signature(struct smb_hdr * cifs_pdu, const char * mac_key,
__u32 expected_sequence_number)
{
return written;
}
+static loff_t cifs_llseek(struct file *file, loff_t offset, int origin)
+{
+ /* origin == SEEK_END => we must revalidate the cached file length */
+ if (origin == 2) {
+ int retval = cifs_revalidate(file->f_dentry);
+ if (retval < 0)
+ return (loff_t)retval;
+ }
+ return remote_llseek(file, offset, origin);
+}
+
static struct file_system_type cifs_fs_type = {
.owner = THIS_MODULE,
.name = "cifs",
.flush = cifs_flush,
.mmap = cifs_file_mmap,
.sendfile = generic_file_sendfile,
+ .llseek = cifs_llseek,
#ifdef CONFIG_CIFS_POSIX
.ioctl = cifs_ioctl,
#endif /* CONFIG_CIFS_POSIX */
#ifdef CONFIG_CIFS_POSIX
.ioctl = cifs_ioctl,
#endif /* CONFIG_CIFS_POSIX */
-
+ .llseek = cifs_llseek,
#ifdef CONFIG_CIFS_EXPERIMENTAL
.dir_notify = cifs_dir_notify,
#endif /* CONFIG_CIFS_EXPERIMENTAL */
.flush = cifs_flush,
.mmap = cifs_file_mmap,
.sendfile = generic_file_sendfile,
+ .llseek = cifs_llseek,
#ifdef CONFIG_CIFS_POSIX
.ioctl = cifs_ioctl,
#endif /* CONFIG_CIFS_POSIX */
#ifdef CONFIG_CIFS_POSIX
.ioctl = cifs_ioctl,
#endif /* CONFIG_CIFS_POSIX */
-
+ .llseek = cifs_llseek,
#ifdef CONFIG_CIFS_EXPERIMENTAL
.dir_notify = cifs_dir_notify,
#endif /* CONFIG_CIFS_EXPERIMENTAL */
kmem_cache_destroy(cifs_req_cachep);
return -ENOMEM;
}
- /* 256 (MAX_CIFS_HDR_SIZE bytes is enough for most SMB responses and
+ /* MAX_CIFS_SMALL_BUFFER_SIZE bytes is enough for most SMB responses and
almost all handle based requests (but not write response, nor is it
sufficient for path based requests). A smaller size would have
been more efficient (compacting multiple slab items on one 4k page)
efficient to alloc 1 per page off the slab compared to 17K (5page)
alloc of large cifs buffers even when page debugging is on */
cifs_sm_req_cachep = kmem_cache_create("cifs_small_rq",
- MAX_CIFS_HDR_SIZE, 0, SLAB_HWCACHE_ALIGN, NULL, NULL);
+ MAX_CIFS_SMALL_BUFFER_SIZE, 0, SLAB_HWCACHE_ALIGN,
+ NULL, NULL);
if (cifs_sm_req_cachep == NULL) {
mempool_destroy(cifs_req_poolp);
kmem_cache_destroy(cifs_req_cachep);
atomic_set(&tconInfoReconnectCount, 0);
atomic_set(&bufAllocCount, 0);
+ atomic_set(&smBufAllocCount, 0);
+#ifdef CONFIG_CIFS_STATS2
+ atomic_set(&totBufAllocCount, 0);
+ atomic_set(&totSmBufAllocCount, 0);
+#endif /* CONFIG_CIFS_STATS2 */
+
atomic_set(&midCount, 0);
GlobalCurrentXid = 0;
GlobalTotalActiveXid = 0;
extern ssize_t cifs_listxattr(struct dentry *, char *, size_t);
extern int cifs_ioctl (struct inode * inode, struct file * filep,
unsigned int command, unsigned long arg);
-#define CIFS_VERSION "1.39"
+#define CIFS_VERSION "1.40"
#endif /* _CIFSFS_H */
atomic_t num_hardlinks;
atomic_t num_symlinks;
atomic_t num_locks;
+ atomic_t num_acl_get;
+ atomic_t num_acl_set;
#ifdef CONFIG_CIFS_STATS2
unsigned long long time_writes;
unsigned long long time_reads;
unsigned endOfSearch:1;
unsigned emptyDir:1;
unsigned unicode:1;
+ unsigned smallBuf:1; /* so we know which buf_release function to call */
};
struct cifsFileInfo {
#define MID_RESPONSE_RECEIVED 4
#define MID_RETRY_NEEDED 8 /* session closed while this request out */
#define MID_NO_RESP_NEEDED 0x10
-#define MID_SMALL_BUFFER 0x20 /* 112 byte response buffer instead of 4K */
+
+/* Types of response buffer returned from SendReceive2 */
+#define CIFS_NO_BUFFER 0 /* Response buffer not returned */
+#define CIFS_SMALL_BUFFER 1
+#define CIFS_LARGE_BUFFER 2
+#define CIFS_IOVEC 4 /* array of response buffers */
/*
*****************************************************************
GLOBAL_EXTERN atomic_t tconInfoReconnectCount;
/* Various Debug counters to remove someday (BB) */
-GLOBAL_EXTERN atomic_t bufAllocCount;
-GLOBAL_EXTERN atomic_t smBufAllocCount;
+GLOBAL_EXTERN atomic_t bufAllocCount; /* current number allocated */
+#ifdef CONFIG_CIFS_STATS2
+GLOBAL_EXTERN atomic_t totBufAllocCount; /* total allocated over all time */
+GLOBAL_EXTERN atomic_t totSmBufAllocCount;
+#endif
+GLOBAL_EXTERN atomic_t smBufAllocCount;
GLOBAL_EXTERN atomic_t midCount;
/* Misc globals */
/*
* fs/cifs/cifspdu.h
*
- * Copyright (c) International Business Machines Corp., 2002
+ * Copyright (c) International Business Machines Corp., 2002,2005
* Author(s): Steve French (sfrench@us.ibm.com)
*
* This library is free software; you can redistribute it and/or modify
#define NT_TRANSACT_GET_USER_QUOTA 0x07
#define NT_TRANSACT_SET_USER_QUOTA 0x08
-#define MAX_CIFS_HDR_SIZE 256 /* is future chained NTCreateXReadX bigger? */
+#define MAX_CIFS_SMALL_BUFFER_SIZE 448 /* big enough for most */
+/* future chained NTCreateXReadX bigger, but for time being NTCreateX biggest */
+/* among the requests (NTCreateX response is bigger with wct of 34) */
+#define MAX_CIFS_HDR_SIZE 0x58 /* 4 len + 32 hdr + (2*24 wct) + 2 bct + 2 pad */
+#define CIFS_SMALL_PATH 120 /* allows for (448-88)/3 */
/* internal cifs vfs structures */
/*****************************************************************
/* STRING PrimaryDomain */
/* STRING NativeOS */
/* STRING NativeLanMan */
- } __attribute__((packed)) old_req; /* pre-NTLM (LANMAN2.1) request format */
+ } __attribute__((packed)) old_req; /* pre-NTLM (LANMAN2.1) req format */
struct { /* default (NTLM) response format */
struct smb_hdr hdr; /* wct = 3 */
unsigned char NativeOS[1]; /* followed by */
/* unsigned char * NativeLanMan; */
/* unsigned char * PrimaryDomain; */
- } __attribute__((packed)) old_resp; /* pre-NTLM (LANMAN2.1) response format */
+ } __attribute__((packed)) old_resp; /* pre-NTLM (LANMAN2.1) response */
} __attribute__((packed)) SESSION_SETUP_ANDX;
#define CIFS_NETWORK_OPSYS "CIFS VFS Client for Linux"
/* empty wct response to setattr */
-/***************************************************/
-/* NT Transact structure defintions follow */
-/* Currently only ioctl and notify are implemented */
-/***************************************************/
+/*******************************************************/
+/* NT Transact structure defintions follow */
+/* Currently only ioctl, acl (get security descriptor) */
+/* and notify are implemented */
+/*******************************************************/
+typedef struct smb_com_ntransact_req {
+ struct smb_hdr hdr; /* wct >= 19 */
+ __u8 MaxSetupCount;
+ __u16 Reserved;
+ __le32 TotalParameterCount;
+ __le32 TotalDataCount;
+ __le32 MaxParameterCount;
+ __le32 MaxDataCount;
+ __le32 ParameterCount;
+ __le32 ParameterOffset;
+ __le32 DataCount;
+ __le32 DataOffset;
+ __u8 SetupCount; /* four setup words follow subcommand */
+ /* SNIA spec incorrectly included spurious pad here */
+ __le16 SubCommand; /* 2 = IOCTL/FSCTL */
+ /* SetupCount words follow then */
+ __le16 ByteCount;
+ __u8 Pad[3];
+ __u8 Parms[0];
+} __attribute__((packed)) NTRANSACT_REQ;
+
+typedef struct smb_com_ntransact_rsp {
+ struct smb_hdr hdr; /* wct = 18 */
+ __u8 Reserved[3];
+ __le32 TotalParameterCount;
+ __le32 TotalDataCount;
+ __le32 ParameterCount;
+ __le32 ParameterOffset;
+ __le32 ParameterDisplacement;
+ __le32 DataCount;
+ __le32 DataOffset;
+ __le32 DataDisplacement;
+ __u8 SetupCount; /* 0 */
+ __u16 ByteCount;
+ /* __u8 Pad[3]; */
+ /* parms and data follow */
+} __attribute__((packed)) NTRANSACT_RSP;
+
typedef struct smb_com_transaction_ioctl_req {
struct smb_hdr hdr; /* wct = 23 */
__u8 MaxSetupCount;
__le32 DataOffset;
__u8 SetupCount; /* four setup words follow subcommand */
/* SNIA spec incorrectly included spurious pad here */
- __le16 SubCommand;/* 2 = IOCTL/FSCTL */
+ __le16 SubCommand; /* 2 = IOCTL/FSCTL */
__le32 FunctionCode;
__u16 Fid;
- __u8 IsFsctl; /* 1 = File System Control, 0 = device control (IOCTL)*/
- __u8 IsRootFlag; /* 1 = apply command to root of share (must be DFS share)*/
+ __u8 IsFsctl; /* 1 = File System Control 0 = device control (IOCTL) */
+ __u8 IsRootFlag; /* 1 = apply command to root of share (must be DFS) */
__le16 ByteCount;
__u8 Pad[3];
__u8 Data[1];
__u8 SetupCount; /* 1 */
__le16 ReturnedDataLen;
__u16 ByteCount;
- __u8 Pad[3];
} __attribute__((packed)) TRANSACT_IOCTL_RSP;
+#define CIFS_ACL_OWNER 1
+#define CIFS_ACL_GROUP 2
+#define CIFS_ACL_DACL 4
+#define CIFS_ACL_SACL 8
+
+typedef struct smb_com_transaction_qsec_req {
+ struct smb_hdr hdr; /* wct = 19 */
+ __u8 MaxSetupCount;
+ __u16 Reserved;
+ __le32 TotalParameterCount;
+ __le32 TotalDataCount;
+ __le32 MaxParameterCount;
+ __le32 MaxDataCount;
+ __le32 ParameterCount;
+ __le32 ParameterOffset;
+ __le32 DataCount;
+ __le32 DataOffset;
+ __u8 SetupCount; /* no setup words follow subcommand */
+ /* SNIA spec incorrectly included spurious pad here */
+ __le16 SubCommand; /* 6 = QUERY_SECURITY_DESC */
+ __le16 ByteCount; /* bcc = 3 + 8 */
+ __u8 Pad[3];
+ __u16 Fid;
+ __u16 Reserved2;
+ __le32 AclFlags;
+} __attribute__((packed)) QUERY_SEC_DESC_REQ;
+
typedef struct smb_com_transaction_change_notify_req {
struct smb_hdr hdr; /* wct = 23 */
__u8 MaxSetupCount;
__u8 WatchTree; /* 1 = Monitor subdirectories */
__u8 Reserved2;
__le16 ByteCount;
-/* __u8 Pad[3];*/
+/* __u8 Pad[3];*/
/* __u8 Data[1];*/
} __attribute__((packed)) TRANSACT_CHANGE_NOTIFY_REQ;
+/* BB eventually change to use generic ntransact rsp struct
+ and validation routine */
typedef struct smb_com_transaction_change_notify_rsp {
struct smb_hdr hdr; /* wct = 18 */
__u8 Reserved[3];
struct smb_hdr * /* out */ ,
int * /* bytes returned */ , const int long_op);
extern int SendReceive2(const unsigned int /* xid */ , struct cifsSesInfo *,
- struct kvec *, int /* nvec */,
- int * /* bytes returned */ , const int long_op);
+ struct kvec *, int /* nvec to send */,
+ int * /* type of buf returned */ , const int long_op);
extern int checkSMBhdr(struct smb_hdr *smb, __u16 mid);
extern int checkSMB(struct smb_hdr *smb, __u16 mid, int length);
extern int is_valid_oplock_break(struct smb_hdr *smb);
const struct nls_table *);
extern int CIFSFindFirst(const int xid, struct cifsTconInfo *tcon,
- const char *searchName, const struct nls_table *nls_codepage,
- __u16 *searchHandle, struct cifs_search_info * psrch_inf, int map, const char dirsep);
+ const char *searchName, const struct nls_table *nls_codepage,
+ __u16 *searchHandle, struct cifs_search_info * psrch_inf,
+ int map, const char dirsep);
extern int CIFSFindNext(const int xid, struct cifsTconInfo *tcon,
- __u16 searchHandle, struct cifs_search_info * psrch_inf);
+ __u16 searchHandle, struct cifs_search_info * psrch_inf);
extern int CIFSFindClose(const int, struct cifsTconInfo *tcon,
const __u16 search_handle);
const int smb_file_id);
extern int CIFSSMBRead(const int xid, struct cifsTconInfo *tcon,
- const int netfid, unsigned int count,
- const __u64 lseek, unsigned int *nbytes, char **buf);
+ const int netfid, unsigned int count,
+ const __u64 lseek, unsigned int *nbytes, char **buf,
+ int * return_buf_type);
extern int CIFSSMBWrite(const int xid, struct cifsTconInfo *tcon,
const int netfid, const unsigned int count,
const __u64 lseek, unsigned int *nbytes,
const char *buf, const char __user *ubuf,
const int long_op);
-#ifdef CONFIG_CIFS_EXPERIMENTAL
extern int CIFSSMBWrite2(const int xid, struct cifsTconInfo *tcon,
const int netfid, const unsigned int count,
const __u64 offset, unsigned int *nbytes,
struct kvec *iov, const int nvec, const int long_op);
-#endif /* CONFIG_CIFS_EXPERIMENTAL */
extern int CIFSGetSrvInodeNumber(const int xid, struct cifsTconInfo *tcon,
const unsigned char *searchName, __u64 * inode_number,
const struct nls_table *nls_codepage,
extern int cifs_reconnect(struct TCP_Server_Info *server);
extern int cifs_sign_smb(struct smb_hdr *, struct TCP_Server_Info *,__u32 *);
+extern int cifs_sign_smb2(struct kvec *iov, int n_vec, struct TCP_Server_Info *,
+ __u32 *);
extern int cifs_verify_signature(struct smb_hdr *, const char * mac_key,
__u32 expected_sequence_number);
extern int cifs_calculate_mac_key(char * key,const char * rn,const char * pass);
const char *fileName, const char * ea_name,
const void * ea_value, const __u16 ea_value_len,
const struct nls_table *nls_codepage, int remap_special_chars);
+extern int CIFSSMBGetCIFSACL(const int xid, struct cifsTconInfo *tcon,
+ __u16 fid, char *acl_inf, const int buflen,
+ const int acl_type /* ACCESS vs. DEFAULT */);
extern int CIFSSMBGetPosixACL(const int xid, struct cifsTconInfo *tcon,
const unsigned char *searchName,
char *acl_inf, const int buflen,const int acl_type,
#include "cifsproto.h"
#include "cifs_unicode.h"
#include "cifs_debug.h"
+#include "cifsacl.h"
#ifdef CONFIG_CIFS_POSIX
static struct {
rc = SendReceive(xid, ses, (struct smb_hdr *) pSMB,
(struct smb_hdr *) pSMBr, &bytes_returned, 0);
if (rc == 0) {
- server->secMode = pSMBr->SecurityMode;
- server->secType = NTLM; /* BB override default for
+ server->secMode = pSMBr->SecurityMode;
+ if((server->secMode & SECMODE_USER) == 0)
+ cFYI(1,("share mode security"));
+ server->secType = NTLM; /* BB override default for
NTLMv2 or kerberos v5 */
/* one byte - no need to convert this or EncryptionKeyLen
from little endian */
min(le32_to_cpu(pSMBr->MaxBufferSize),
(__u32) CIFSMaxBufSize + MAX_CIFS_HDR_SIZE);
server->maxRw = le32_to_cpu(pSMBr->MaxRawSize);
- cFYI(0, ("Max buf = %d ", ses->server->maxBuf));
+ cFYI(0, ("Max buf = %d", ses->server->maxBuf));
GETU32(ses->server->sessid) = le32_to_cpu(pSMBr->SessionKey);
server->capabilities = le32_to_cpu(pSMBr->Capabilities);
server->timeZone = le16_to_cpu(pSMBr->ServerTimeZone);
(server->server_GUID,
pSMBr->u.extended_response.
GUID, 16) != 0) {
- cFYI(1,
- ("UID of server does not match previous connection to same ip address"));
+ cFYI(1, ("server UID changed"));
memcpy(server->
server_GUID,
pSMBr->u.
return rc;
}
-/* If no buffer passed in, then caller wants to do the copy
- as in the case of readpages so the SMB buffer must be
- freed by the caller */
-
int
CIFSSMBRead(const int xid, struct cifsTconInfo *tcon,
- const int netfid, const unsigned int count,
- const __u64 lseek, unsigned int *nbytes, char **buf)
+ const int netfid, const unsigned int count,
+ const __u64 lseek, unsigned int *nbytes, char **buf,
+ int * pbuf_type)
{
int rc = -EACCES;
READ_REQ *pSMB = NULL;
READ_RSP *pSMBr = NULL;
char *pReadData = NULL;
- int bytes_returned;
int wct;
+ int resp_buf_type = 0;
+ struct kvec iov[1];
cFYI(1,("Reading %d bytes on fid %d",count,netfid));
if(tcon->ses->capabilities & CAP_LARGE_FILES)
wct = 10; /* old style read */
*nbytes = 0;
- rc = smb_init(SMB_COM_READ_ANDX, wct, tcon, (void **) &pSMB,
- (void **) &pSMBr);
+ rc = small_smb_init(SMB_COM_READ_ANDX, wct, tcon, (void **) &pSMB);
if (rc)
return rc;
if (tcon->ses->server == NULL)
return -ECONNABORTED;
- pSMB->AndXCommand = 0xFF; /* none */
+ pSMB->AndXCommand = 0xFF; /* none */
pSMB->Fid = netfid;
pSMB->OffsetLow = cpu_to_le32(lseek & 0xFFFFFFFF);
if(wct == 12)
pSMB->OffsetHigh = cpu_to_le32(lseek >> 32);
- else if((lseek >> 32) > 0) /* can not handle this big offset for old */
- return -EIO;
+ else if((lseek >> 32) > 0) /* can not handle this big offset for old */
+ return -EIO;
pSMB->Remaining = 0;
pSMB->MaxCount = cpu_to_le16(count & 0xFFFF);
pSMB->ByteCount = 0; /* no need to do le conversion since 0 */
else {
/* old style read */
- struct smb_com_readx_req * pSMBW =
+ struct smb_com_readx_req * pSMBW =
(struct smb_com_readx_req *)pSMB;
- pSMBW->ByteCount = 0;
+ pSMBW->ByteCount = 0;
}
-
- rc = SendReceive(xid, tcon->ses, (struct smb_hdr *) pSMB,
- (struct smb_hdr *) pSMBr, &bytes_returned, 0);
+
+ iov[0].iov_base = (char *)pSMB;
+ iov[0].iov_len = pSMB->hdr.smb_buf_length + 4;
+ rc = SendReceive2(xid, tcon->ses, iov,
+ 1 /* num iovecs */,
+ &resp_buf_type, 0);
cifs_stats_inc(&tcon->num_reads);
+ pSMBr = (READ_RSP *)iov[0].iov_base;
if (rc) {
cERROR(1, ("Send error in read = %d", rc));
} else {
*nbytes = data_length;
/*check that DataLength would not go beyond end of SMB */
- if ((data_length > CIFSMaxBufSize)
+ if ((data_length > CIFSMaxBufSize)
|| (data_length > count)) {
cFYI(1,("bad length %d for count %d",data_length,count));
rc = -EIO;
*nbytes = 0;
} else {
- pReadData =
- (char *) (&pSMBr->hdr.Protocol) +
+ pReadData = (char *) (&pSMBr->hdr.Protocol) +
le16_to_cpu(pSMBr->DataOffset);
-/* if(rc = copy_to_user(buf, pReadData, data_length)) {
- cERROR(1,("Faulting on read rc = %d",rc));
- rc = -EFAULT;
- }*/ /* can not use copy_to_user when using page cache*/
+/* if(rc = copy_to_user(buf, pReadData, data_length)) {
+ cERROR(1,("Faulting on read rc = %d",rc));
+ rc = -EFAULT;
+ }*/ /* can not use copy_to_user when using page cache*/
if(*buf)
- memcpy(*buf,pReadData,data_length);
+ memcpy(*buf,pReadData,data_length);
}
}
- if(*buf)
- cifs_buf_release(pSMB);
- else
- *buf = (char *)pSMB;
- /* Note: On -EAGAIN error only caller can retry on handle based calls
+ cifs_small_buf_release(pSMB);
+ if(*buf) {
+ if(resp_buf_type == CIFS_SMALL_BUFFER)
+ cifs_small_buf_release(iov[0].iov_base);
+ else if(resp_buf_type == CIFS_LARGE_BUFFER)
+ cifs_buf_release(iov[0].iov_base);
+ } else /* return buffer to caller to free */ /* BB FIXME how do we tell caller if it is not a large buffer */ {
+ *buf = iov[0].iov_base;
+ if(resp_buf_type == CIFS_SMALL_BUFFER)
+ *pbuf_type = CIFS_SMALL_BUFFER;
+ else if(resp_buf_type == CIFS_LARGE_BUFFER)
+ *pbuf_type = CIFS_LARGE_BUFFER;
+ }
+
+ /* Note: On -EAGAIN error only caller can retry on handle based calls
since file handle passed in no longer valid */
return rc;
}
+
int
CIFSSMBWrite(const int xid, struct cifsTconInfo *tcon,
const int netfid, const unsigned int count,
return rc;
}
-#ifdef CONFIG_CIFS_EXPERIMENTAL
int
CIFSSMBWrite2(const int xid, struct cifsTconInfo *tcon,
const int netfid, const unsigned int count,
{
int rc = -EACCES;
WRITE_REQ *pSMB = NULL;
- int bytes_returned, wct;
+ int wct;
int smb_hdr_len;
+ int resp_buf_type = 0;
- /* BB removeme BB */
cFYI(1,("write2 at %lld %d bytes", (long long)offset, count));
if(tcon->ses->capabilities & CAP_LARGE_FILES)
pSMBW->ByteCount = cpu_to_le16(count + 5);
}
iov[0].iov_base = pSMB;
- iov[0].iov_len = smb_hdr_len + 4;
+ if(wct == 14)
+ iov[0].iov_len = smb_hdr_len + 4;
+ else /* wct == 12 pad bigger by four bytes */
+ iov[0].iov_len = smb_hdr_len + 8;
+
- rc = SendReceive2(xid, tcon->ses, iov, n_vec + 1, &bytes_returned,
+ rc = SendReceive2(xid, tcon->ses, iov, n_vec + 1, &resp_buf_type,
long_op);
cifs_stats_inc(&tcon->num_writes);
if (rc) {
cFYI(1, ("Send error Write2 = %d", rc));
*nbytes = 0;
+ } else if(resp_buf_type == 0) {
+ /* presumably this can not happen, but best to be safe */
+ rc = -EIO;
+ *nbytes = 0;
} else {
- WRITE_RSP * pSMBr = (WRITE_RSP *)pSMB;
+ WRITE_RSP * pSMBr = (WRITE_RSP *)iov[0].iov_base;
*nbytes = le16_to_cpu(pSMBr->CountHigh);
*nbytes = (*nbytes) << 16;
*nbytes += le16_to_cpu(pSMBr->Count);
- }
+ }
cifs_small_buf_release(pSMB);
+ if(resp_buf_type == CIFS_SMALL_BUFFER)
+ cifs_small_buf_release(iov[0].iov_base);
+ else if(resp_buf_type == CIFS_LARGE_BUFFER)
+ cifs_buf_release(iov[0].iov_base);
/* Note: On -EAGAIN error only caller can retry on handle based calls
since file handle passed in no longer valid */
}
-#endif /* CIFS_EXPERIMENTAL */
-
int
CIFSSMBLock(const int xid, struct cifsTconInfo *tcon,
const __u16 smb_file_id, const __u64 len,
return rc;
}
+/* Initialize NT TRANSACT SMB into small smb request buffer.
+ This assumes that all NT TRANSACTS that we init here have
+ total parm and data under about 400 bytes (to fit in small cifs
+ buffer size), which is the case so far, it easily fits. NB:
+ Setup words themselves and ByteCount
+ MaxSetupCount (size of returned setup area) and
+ MaxParameterCount (returned parms size) must be set by caller */
+static int
+smb_init_ntransact(const __u16 sub_command, const int setup_count,
+ const int parm_len, struct cifsTconInfo *tcon,
+ void ** ret_buf)
+{
+ int rc;
+ __u32 temp_offset;
+ struct smb_com_ntransact_req * pSMB;
+
+ rc = small_smb_init(SMB_COM_NT_TRANSACT, 19 + setup_count, tcon,
+ (void **)&pSMB);
+ if (rc)
+ return rc;
+ *ret_buf = (void *)pSMB;
+ pSMB->Reserved = 0;
+ pSMB->TotalParameterCount = cpu_to_le32(parm_len);
+ pSMB->TotalDataCount = 0;
+ pSMB->MaxDataCount = cpu_to_le32((tcon->ses->server->maxBuf -
+ MAX_CIFS_HDR_SIZE) & 0xFFFFFF00);
+ pSMB->ParameterCount = pSMB->TotalParameterCount;
+ pSMB->DataCount = pSMB->TotalDataCount;
+ temp_offset = offsetof(struct smb_com_ntransact_req, Parms) +
+ (setup_count * 2) - 4 /* for rfc1001 length itself */;
+ pSMB->ParameterOffset = cpu_to_le32(temp_offset);
+ pSMB->DataOffset = cpu_to_le32(temp_offset + parm_len);
+ pSMB->SetupCount = setup_count; /* no need to le convert byte fields */
+ pSMB->SubCommand = cpu_to_le16(sub_command);
+ return 0;
+}
+
+static int
+validate_ntransact(char * buf, char ** ppparm, char ** ppdata,
+ int * pdatalen, int * pparmlen)
+{
+ char * end_of_smb;
+ __u32 data_count, data_offset, parm_count, parm_offset;
+ struct smb_com_ntransact_rsp * pSMBr;
+
+ if(buf == NULL)
+ return -EINVAL;
+
+ pSMBr = (struct smb_com_ntransact_rsp *)buf;
+
+ /* ByteCount was converted from little endian in SendReceive */
+ end_of_smb = 2 /* sizeof byte count */ + pSMBr->ByteCount +
+ (char *)&pSMBr->ByteCount;
+
+
+ data_offset = le32_to_cpu(pSMBr->DataOffset);
+ data_count = le32_to_cpu(pSMBr->DataCount);
+ parm_offset = le32_to_cpu(pSMBr->ParameterOffset);
+ parm_count = le32_to_cpu(pSMBr->ParameterCount);
+
+ *ppparm = (char *)&pSMBr->hdr.Protocol + parm_offset;
+ *ppdata = (char *)&pSMBr->hdr.Protocol + data_offset;
+
+ /* should we also check that parm and data areas do not overlap? */
+ if(*ppparm > end_of_smb) {
+ cFYI(1,("parms start after end of smb"));
+ return -EINVAL;
+ } else if(parm_count + *ppparm > end_of_smb) {
+ cFYI(1,("parm end after end of smb"));
+ return -EINVAL;
+ } else if(*ppdata > end_of_smb) {
+ cFYI(1,("data starts after end of smb"));
+ return -EINVAL;
+ } else if(data_count + *ppdata > end_of_smb) {
+ cFYI(1,("data %p + count %d (%p) ends after end of smb %p start %p",
+ *ppdata, data_count, (data_count + *ppdata), end_of_smb, pSMBr)); /* BB FIXME */
+ return -EINVAL;
+ } else if(parm_count + data_count > pSMBr->ByteCount) {
+ cFYI(1,("parm count and data count larger than SMB"));
+ return -EINVAL;
+ }
+ return 0;
+}
+
int
CIFSSMBQueryReparseLinkInfo(const int xid, struct cifsTconInfo *tcon,
const unsigned char *searchName,
pSMB->TotalDataCount = 0;
pSMB->MaxParameterCount = cpu_to_le32(2);
/* BB find exact data count max from sess structure BB */
- pSMB->MaxDataCount = cpu_to_le32(4000);
+ pSMB->MaxDataCount = cpu_to_le32((tcon->ses->server->maxBuf -
+ MAX_CIFS_HDR_SIZE) & 0xFFFFFF00);
pSMB->MaxSetupCount = 4;
pSMB->Reserved = 0;
pSMB->ParameterOffset = 0;
rc = -EIO; /* bad smb */
else {
if(data_count && (data_count < 2048)) {
- char * end_of_smb = pSMBr->ByteCount + (char *)&pSMBr->ByteCount;
+ char * end_of_smb = 2 /* sizeof byte count */ +
+ pSMBr->ByteCount +
+ (char *)&pSMBr->ByteCount;
struct reparse_data * reparse_buf = (struct reparse_data *)
((char *)&pSMBr->hdr.Protocol + data_offset);
rc = SendReceive(xid, tcon->ses, (struct smb_hdr *) pSMB,
(struct smb_hdr *) pSMBr, &bytes_returned, 0);
+ cifs_stats_inc(&tcon->num_acl_get);
if (rc) {
cFYI(1, ("Send error in Query POSIX ACL = %d", rc));
} else {
#endif /* CONFIG_POSIX */
+
+/* security id for everyone */
+const struct cifs_sid sid_everyone = {1, 1, {0, 0, 0, 0, 0, 0}, {0, 0, 0, 0}};
+/* group users */
+const struct cifs_sid sid_user = {1, 2 , {0, 0, 0, 0, 0, 5}, {32, 545, 0, 0}};
+
+/* Convert CIFS ACL to POSIX form */
+static int parse_sec_desc(struct cifs_sid * psec_desc, int acl_len)
+{
+ return 0;
+}
+
+/* Get Security Descriptor (by handle) from remote server for a file or dir */
+int
+CIFSSMBGetCIFSACL(const int xid, struct cifsTconInfo *tcon, __u16 fid,
+ /* BB fix up return info */ char *acl_inf, const int buflen,
+ const int acl_type /* ACCESS/DEFAULT not sure implication */)
+{
+ int rc = 0;
+ int buf_type = 0;
+ QUERY_SEC_DESC_REQ * pSMB;
+ struct kvec iov[1];
+
+ cFYI(1, ("GetCifsACL"));
+
+ rc = smb_init_ntransact(NT_TRANSACT_QUERY_SECURITY_DESC, 0,
+ 8 /* parm len */, tcon, (void **) &pSMB);
+ if (rc)
+ return rc;
+
+ pSMB->MaxParameterCount = cpu_to_le32(4);
+ /* BB TEST with big acls that might need to be e.g. larger than 16K */
+ pSMB->MaxSetupCount = 0;
+ pSMB->Fid = fid; /* file handle always le */
+ pSMB->AclFlags = cpu_to_le32(CIFS_ACL_OWNER | CIFS_ACL_GROUP |
+ CIFS_ACL_DACL);
+ pSMB->ByteCount = cpu_to_le16(11); /* 3 bytes pad + 8 bytes parm */
+ pSMB->hdr.smb_buf_length += 11;
+ iov[0].iov_base = (char *)pSMB;
+ iov[0].iov_len = pSMB->hdr.smb_buf_length + 4;
+
+ rc = SendReceive2(xid, tcon->ses, iov, 1 /* num iovec */, &buf_type, 0);
+ cifs_stats_inc(&tcon->num_acl_get);
+ if (rc) {
+ cFYI(1, ("Send error in QuerySecDesc = %d", rc));
+ } else { /* decode response */
+ struct cifs_sid * psec_desc;
+ __le32 * parm;
+ int parm_len;
+ int data_len;
+ int acl_len;
+ struct smb_com_ntransact_rsp * pSMBr;
+
+/* validate_nttransact */
+ rc = validate_ntransact(iov[0].iov_base, (char **)&parm,
+ (char **)&psec_desc,
+ &parm_len, &data_len);
+
+ if(rc)
+ goto qsec_out;
+ pSMBr = (struct smb_com_ntransact_rsp *)iov[0].iov_base;
+
+ cERROR(1,("smb %p parm %p data %p",pSMBr,parm,psec_desc)); /* BB removeme BB */
+
+ if (le32_to_cpu(pSMBr->ParameterCount) != 4) {
+ rc = -EIO; /* bad smb */
+ goto qsec_out;
+ }
+
+/* BB check that data area is minimum length and as big as acl_len */
+
+ acl_len = le32_to_cpu(*(__le32 *)parm);
+ /* BB check if(acl_len > bufsize) */
+
+ parse_sec_desc(psec_desc, acl_len);
+ }
+qsec_out:
+ if(buf_type == CIFS_SMALL_BUFFER)
+ cifs_small_buf_release(iov[0].iov_base);
+ else if(buf_type == CIFS_LARGE_BUFFER)
+ cifs_buf_release(iov[0].iov_base);
+ cifs_small_buf_release(pSMB);
+ return rc;
+}
+
+
/* Legacy Query Path Information call for lookup to old servers such
as Win9x/WinME */
int SMBQueryInformation(const int xid, struct cifsTconInfo *tcon,
{
int rc = 0;
struct smb_com_transaction_change_notify_req * pSMB = NULL;
- struct smb_com_transaction_change_notify_rsp * pSMBr = NULL;
+ struct smb_com_ntransaction_change_notify_rsp * pSMBr = NULL;
struct dir_notify_req *dnotify_req;
int bytes_returned;
pSMB->MaxParameterCount = cpu_to_le32(2);
/* BB find exact data count max from sess structure BB */
pSMB->MaxDataCount = 0; /* same in little endian or be */
+/* BB VERIFY verify which is correct for above BB */
+ pSMB->MaxDataCount = cpu_to_le32((tcon->ses->server->maxBuf -
+ MAX_CIFS_HDR_SIZE) & 0xFFFFFF00);
+
pSMB->MaxSetupCount = 4;
pSMB->Reserved = 0;
pSMB->ParameterOffset = 0;
unsigned setuids:1;
unsigned noperm:1;
unsigned no_psx_acl:1; /* set if posix acl support should be disabled */
+ unsigned cifs_acl:1;
unsigned no_xattr:1; /* set if xattr (EA) support should be disabled*/
unsigned server_ino:1; /* use inode numbers from server ie UniqueId */
unsigned direct_io:1;
unsigned remap:1; /* set to remap seven reserved chars in filenames */
unsigned posix_paths:1; /* unset to not ask for posix pathnames. */
unsigned sfu_emul:1;
+ unsigned krb5:1;
+ unsigned ntlm:1;
+ unsigned ntlmv2:1;
+ unsigned nullauth:1; /* attempt to authenticate with null user */
+ unsigned sign:1;
+ unsigned seal:1; /* encrypt */
unsigned nocase; /* request case insensitive filenames */
unsigned nobrl; /* disable sending byte range locks to srv */
unsigned int rsize;
/* else length ok */
reconnect = 0;
- if(pdu_length > MAX_CIFS_HDR_SIZE - 4) {
+ if(pdu_length > MAX_CIFS_SMALL_BUFFER_SIZE - 4) {
isLargeBuf = TRUE;
memcpy(bigbuf, smallbuf, 4);
smb_buffer = bigbuf;
/* vol->retry default is 0 (i.e. "soft" limited retry not hard retry) */
vol->rw = TRUE;
-
+ vol->ntlm = TRUE;
/* default is always to request posix paths. */
vol->posix_paths = 1;
printk(KERN_WARNING "CIFS: ip address too long\n");
return 1;
}
+ } else if (strnicmp(data, "sec", 3) == 0) {
+ if (!value || !*value) {
+ cERROR(1,("no security value specified"));
+ continue;
+ } else if (strnicmp(value, "krb5i", 5) == 0) {
+ vol->sign = 1;
+ vol->krb5 = 1;
+ } else if (strnicmp(value, "krb5p", 5) == 0) {
+ /* vol->seal = 1;
+ vol->krb5 = 1; */
+ cERROR(1,("Krb5 cifs privacy not supported"));
+ return 1;
+ } else if (strnicmp(value, "krb5", 4) == 0) {
+ vol->krb5 = 1;
+ } else if (strnicmp(value, "ntlmv2i", 7) == 0) {
+ vol->ntlmv2 = 1;
+ vol->sign = 1;
+ } else if (strnicmp(value, "ntlmv2", 6) == 0) {
+ vol->ntlmv2 = 1;
+ } else if (strnicmp(value, "ntlmi", 5) == 0) {
+ vol->ntlm = 1;
+ vol->sign = 1;
+ } else if (strnicmp(value, "ntlm", 4) == 0) {
+ /* ntlm is default so can be turned off too */
+ vol->ntlm = 1;
+ } else if (strnicmp(value, "nontlm", 6) == 0) {
+ vol->ntlm = 0;
+ } else if (strnicmp(value, "none", 4) == 0) {
+ vol->nullauth = 1;
+ } else {
+ cERROR(1,("bad security option: %s", value));
+ return 1;
+ }
} else if ((strnicmp(data, "unc", 3) == 0)
|| (strnicmp(data, "target", 6) == 0)
|| (strnicmp(data, "path", 4) == 0)) {
vol->server_ino = 1;
} else if (strnicmp(data, "noserverino",9) == 0) {
vol->server_ino = 0;
+ } else if (strnicmp(data, "cifsacl",7) == 0) {
+ vol->cifs_acl = 1;
+ } else if (strnicmp(data, "nocifsacl", 9) == 0) {
+ vol->cifs_acl = 0;
} else if (strnicmp(data, "acl",3) == 0) {
vol->no_psx_acl = 0;
} else if (strnicmp(data, "noacl",5) == 0) {
cFYI(1, ("Username: %s ", volume_info.username));
} else {
- cifserror("No username specified ");
+ cifserror("No username specified");
/* In userspace mount helper we can get user name from alternate
locations such as env variables and files on disk */
kfree(volume_info.UNC);
return -EINVAL;
} else /* which servers DFS root would we conect to */ {
cERROR(1,
- ("CIFS mount error: No UNC path (e.g. -o unc=//192.168.1.100/public) specified "));
+ ("CIFS mount error: No UNC path (e.g. -o unc=//192.168.1.100/public) specified"));
kfree(volume_info.UNC);
kfree(volume_info.password);
FreeXid(xid);
if (srvTcp) {
- cFYI(1, ("Existing tcp session with server found "));
+ cFYI(1, ("Existing tcp session with server found"));
} else { /* create socket */
if(volume_info.port)
sin_server.sin_port = htons(volume_info.port);
if (existingCifsSes) {
pSesInfo = existingCifsSes;
- cFYI(1, ("Existing smb sess found "));
+ cFYI(1, ("Existing smb sess found"));
kfree(volume_info.password);
/* volume_info.UNC freed at end of function */
} else if (!rc) {
- cFYI(1, ("Existing smb sess not found "));
+ cFYI(1, ("Existing smb sess not found"));
pSesInfo = sesInfoAlloc();
if (pSesInfo == NULL)
rc = -ENOMEM;
cifs_sb->mnt_gid = volume_info.linux_gid;
cifs_sb->mnt_file_mode = volume_info.file_mode;
cifs_sb->mnt_dir_mode = volume_info.dir_mode;
- cFYI(1,("file mode: 0x%x dir mode: 0x%x",cifs_sb->mnt_file_mode,cifs_sb->mnt_dir_mode));
+ cFYI(1,("file mode: 0x%x dir mode: 0x%x",
+ cifs_sb->mnt_file_mode,cifs_sb->mnt_dir_mode));
if(volume_info.noperm)
cifs_sb->mnt_cifs_flags |= CIFS_MOUNT_NO_PERM;
cifs_sb->mnt_cifs_flags |= CIFS_MOUNT_UNX_EMUL;
if(volume_info.nobrl)
cifs_sb->mnt_cifs_flags |= CIFS_MOUNT_NO_BRL;
+ if(volume_info.cifs_acl)
+ cifs_sb->mnt_cifs_flags |= CIFS_MOUNT_CIFS_ACL;
if(volume_info.direct_io) {
cFYI(1,("mounting share using direct i/o"));
find_unc(sin_server.sin_addr.s_addr, volume_info.UNC,
volume_info.username);
if (tcon) {
- cFYI(1, ("Found match on UNC path "));
+ cFYI(1, ("Found match on UNC path"));
/* we can have only one retry value for a connection
to a share so for resources mounted more than once
to the same server share the last value passed in
__u32 capabilities;
__u16 count;
- cFYI(1, ("In sesssetup "));
+ cFYI(1, ("In sesssetup"));
if(ses == NULL)
return -EINVAL;
user = ses->userName;
pSMB->AndXCommand = 0xFF;
pSMB->Flags = cpu_to_le16(TCON_EXTENDED_SECINFO);
- pSMB->PasswordLength = cpu_to_le16(1); /* minimum */
bcc_ptr = &pSMB->Password[0];
- bcc_ptr++; /* skip password */
+ if((ses->server->secMode) & SECMODE_USER) {
+ pSMB->PasswordLength = cpu_to_le16(1); /* minimum */
+ bcc_ptr++; /* skip password */
+ } else {
+ pSMB->PasswordLength = cpu_to_le16(CIFS_SESSION_KEY_SIZE);
+ /* BB FIXME add code to fail this if NTLMv2 or Kerberos
+ specified as required (when that support is added to
+ the vfs in the future) as only NTLM or the much
+ weaker LANMAN (which we do not send) is accepted
+ by Samba (not sure whether other servers allow
+ NTLMv2 password here) */
+ SMBNTencrypt(ses->password,
+ ses->server->cryptKey,
+ bcc_ptr);
+
+ bcc_ptr += CIFS_SESSION_KEY_SIZE;
+ *bcc_ptr = 0;
+ bcc_ptr++; /* align */
+ }
if(ses->server->secMode & (SECMODE_SIGN_REQUIRED | SECMODE_SIGN_ENABLED))
smb_buffer->Flags2 |= SMBFLG2_SECURITY_SIGNATURE;
bcc_ptr += 2 * length; /* convert num of 16 bit words to bytes */
bcc_ptr += 2; /* skip trailing null */
} else { /* ASCII */
-
strcpy(bcc_ptr, tree);
bcc_ptr += strlen(tree) + 1;
}
*
* vfs operations that deal with dentries
*
- * Copyright (C) International Business Machines Corp., 2002,2003
+ * Copyright (C) International Business Machines Corp., 2002,2005
* Author(s): Steve French (sfrench@us.ibm.com)
*
* This library is free software; you can redistribute it and/or modify
(oplock & CIFS_CREATE_ACTION))
if(cifs_sb->mnt_cifs_flags & CIFS_MOUNT_SET_UID) {
CIFSSMBUnixSetPerms(xid, pTcon, full_path, mode,
- (__u64)current->euid,
- (__u64)current->egid,
+ (__u64)current->fsuid,
+ (__u64)current->fsgid,
0 /* dev */,
cifs_sb->local_nls,
cifs_sb->mnt_cifs_flags &
else if (pTcon->ses->capabilities & CAP_UNIX) {
if(cifs_sb->mnt_cifs_flags & CIFS_MOUNT_SET_UID) {
rc = CIFSSMBUnixSetPerms(xid, pTcon, full_path,
- mode,(__u64)current->euid,(__u64)current->egid,
+ mode,(__u64)current->fsuid,(__u64)current->fsgid,
device_number, cifs_sb->local_nls,
cifs_sb->mnt_cifs_flags &
CIFS_MOUNT_MAP_SPECIAL_CHR);
}
ptmp = pCFileStruct->srch_inf.ntwrk_buf_start;
if (ptmp) {
- /* BB removeme BB */ cFYI(1, ("freeing smb buf in srch struct in closedir"));
+ cFYI(1, ("closedir free smb buf in srch struct"));
pCFileStruct->srch_inf.ntwrk_buf_start = NULL;
cifs_buf_release(ptmp);
}
ptmp = pCFileStruct->search_resume_name;
if (ptmp) {
- /* BB removeme BB */ cFYI(1, ("freeing resume name in closedir"));
+ cFYI(1, ("closedir free resume name"));
pCFileStruct->search_resume_name = NULL;
kfree(ptmp);
}
if (rc != 0)
break;
}
-#ifdef CONFIG_CIFS_EXPERIMENTAL
/* BB FIXME We can not sign across two buffers yet */
- if((experimEnabled) && ((pTcon->ses->server->secMode &
- (SECMODE_SIGN_REQUIRED | SECMODE_SIGN_ENABLED)) == 0)) {
+ if((pTcon->ses->server->secMode &
+ (SECMODE_SIGN_REQUIRED | SECMODE_SIGN_ENABLED)) == 0) {
struct kvec iov[2];
unsigned int len;
iov, 1, long_op);
} else
/* BB FIXME fixup indentation of line below */
-#endif
rc = CIFSSMBWrite(xid, pTcon,
open_file->netfid,
min_t(const int, cifs_sb->wsize,
return rc;
}
-#ifdef CONFIG_CIFS_EXPERIMENTAL
static int cifs_writepages(struct address_space *mapping,
struct writeback_control *wbc)
{
return rc;
}
-#endif
static int cifs_writepage(struct page* page, struct writeback_control *wbc)
{
rc = -EAGAIN;
smb_read_data = NULL;
while (rc == -EAGAIN) {
+ int buf_type = CIFS_NO_BUFFER;
if ((open_file->invalidHandle) &&
(!open_file->closePend)) {
rc = cifs_reopen_file(file->f_dentry->d_inode,
break;
}
rc = CIFSSMBRead(xid, pTcon,
- open_file->netfid,
- current_read_size, *poffset,
- &bytes_read, &smb_read_data);
+ open_file->netfid,
+ current_read_size, *poffset,
+ &bytes_read, &smb_read_data,
+ &buf_type);
pSMBr = (struct smb_com_read_rsp *)smb_read_data;
if (copy_to_user(current_offset,
smb_read_data + 4 /* RFC1001 hdr */
+ le16_to_cpu(pSMBr->DataOffset),
bytes_read)) {
rc = -EFAULT;
- FreeXid(xid);
- return rc;
- }
+ }
if (smb_read_data) {
- cifs_buf_release(smb_read_data);
+ if(buf_type == CIFS_SMALL_BUFFER)
+ cifs_small_buf_release(smb_read_data);
+ else if(buf_type == CIFS_LARGE_BUFFER)
+ cifs_buf_release(smb_read_data);
smb_read_data = NULL;
}
}
int xid;
char *current_offset;
struct cifsFileInfo *open_file;
+ int buf_type = CIFS_NO_BUFFER;
xid = GetXid();
cifs_sb = CIFS_SB(file->f_dentry->d_sb);
break;
}
rc = CIFSSMBRead(xid, pTcon,
- open_file->netfid,
- current_read_size, *poffset,
- &bytes_read, ¤t_offset);
+ open_file->netfid,
+ current_read_size, *poffset,
+ &bytes_read, ¤t_offset,
+ &buf_type);
}
if (rc || (bytes_read == 0)) {
if (total_read) {
struct smb_com_read_rsp *pSMBr;
struct pagevec lru_pvec;
struct cifsFileInfo *open_file;
+ int buf_type = CIFS_NO_BUFFER;
xid = GetXid();
if (file->private_data == NULL) {
}
rc = CIFSSMBRead(xid, pTcon,
- open_file->netfid,
- read_size, offset,
- &bytes_read, &smb_read_data);
-
+ open_file->netfid,
+ read_size, offset,
+ &bytes_read, &smb_read_data,
+ &buf_type);
/* BB more RC checks ? */
if (rc== -EAGAIN) {
if (smb_read_data) {
- cifs_buf_release(smb_read_data);
+ if(buf_type == CIFS_SMALL_BUFFER)
+ cifs_small_buf_release(smb_read_data);
+ else if(buf_type == CIFS_LARGE_BUFFER)
+ cifs_buf_release(smb_read_data);
smb_read_data = NULL;
}
}
break;
}
if (smb_read_data) {
- cifs_buf_release(smb_read_data);
+ if(buf_type == CIFS_SMALL_BUFFER)
+ cifs_small_buf_release(smb_read_data);
+ else if(buf_type == CIFS_LARGE_BUFFER)
+ cifs_buf_release(smb_read_data);
smb_read_data = NULL;
}
bytes_read = 0;
/* need to free smb_read_data buf before exit */
if (smb_read_data) {
- cifs_buf_release(smb_read_data);
+ if(buf_type == CIFS_SMALL_BUFFER)
+ cifs_small_buf_release(smb_read_data);
+ else if(buf_type == CIFS_LARGE_BUFFER)
+ cifs_buf_release(smb_read_data);
smb_read_data = NULL;
}
open_file = find_writable_file(cifsInode);
if(open_file) {
+ struct cifs_sb_info *cifs_sb;
+
/* there is not actually a write pending so let
this handle go free and allow it to
be closable if needed */
atomic_dec(&open_file->wrtPending);
+
+ cifs_sb = CIFS_SB(cifsInode->vfs_inode.i_sb);
+ if ( cifs_sb->mnt_cifs_flags & CIFS_MOUNT_DIRECT_IO ) {
+ /* since no page cache to corrupt on directio
+ we can change size safely */
+ return 1;
+ }
+
return 0;
} else
return 1;
.readpage = cifs_readpage,
.readpages = cifs_readpages,
.writepage = cifs_writepage,
-#ifdef CONFIG_CIFS_EXPERIMENTAL
.writepages = cifs_writepages,
-#endif
.prepare_write = cifs_prepare_write,
.commit_write = cifs_commit_write,
.set_page_dirty = __set_page_dirty_nobuffers,
cifs_sb->mnt_cifs_flags &
CIFS_MOUNT_MAP_SPECIAL_CHR);
if (rc==0) {
+ int buf_type = CIFS_NO_BUFFER;
/* Read header */
rc = CIFSSMBRead(xid, pTcon,
netfid,
24 /* length */, 0 /* offset */,
- &bytes_read, &pbuf);
+ &bytes_read, &pbuf, &buf_type);
if((rc == 0) && (bytes_read >= 8)) {
if(memcmp("IntxBLK", pbuf, 8) == 0) {
cFYI(1,("Block device"));
} else {
inode->i_mode |= S_IFREG; /* then it is a file */
rc = -EOPNOTSUPP; /* or some unknown SFU type */
- }
+ }
CIFSSMBClose(xid, pTcon, netfid);
}
return rc;
if (cifs_sb->mnt_cifs_flags & CIFS_MOUNT_SET_UID) {
CIFSSMBUnixSetPerms(xid, pTcon, full_path,
mode,
- (__u64)current->euid,
- (__u64)current->egid,
+ (__u64)current->fsuid,
+ (__u64)current->fsgid,
0 /* dev_t */,
cifs_sb->local_nls,
cifs_sb->mnt_cifs_flags &
/*
* fs/cifs/misc.c
*
- * Copyright (C) International Business Machines Corp., 2002,2004
+ * Copyright (C) International Business Machines Corp., 2002,2005
* Author(s): Steve French (sfrench@us.ibm.com)
*
* This library is free software; you can redistribute it and/or modify
if (ret_buf) {
memset(ret_buf, 0, sizeof(struct smb_hdr) + 3);
atomic_inc(&bufAllocCount);
+#ifdef CONFIG_CIFS_STATS2
+ atomic_inc(&totBufAllocCount);
+#endif /* CONFIG_CIFS_STATS2 */
}
return ret_buf;
/* No need to clear memory here, cleared in header assemble */
/* memset(ret_buf, 0, sizeof(struct smb_hdr) + 27);*/
atomic_inc(&smBufAllocCount);
+#ifdef CONFIG_CIFS_STATS2
+ atomic_inc(&totSmBufAllocCount);
+#endif /* CONFIG_CIFS_STATS2 */
+
}
return ret_buf;
}
struct cifsSesInfo * ses;
char *temp = (char *) buffer;
- memset(temp,0,MAX_CIFS_HDR_SIZE);
+ memset(temp,0,256); /* bigger than MAX_CIFS_HDR_SIZE */
buffer->smb_buf_length =
(2 * word_count) + sizeof (struct smb_hdr) -
/* BB Add support for establishing new tCon and SMB Session */
/* with userid/password pairs found on the smb session */
/* for other target tcp/ip addresses BB */
- if(current->uid != treeCon->ses->linux_uid) {
- cFYI(1,("Multiuser mode and UID did not match tcon uid "));
+ if(current->fsuid != treeCon->ses->linux_uid) {
+ cFYI(1,("Multiuser mode and UID did not match tcon uid"));
read_lock(&GlobalSMBSeslock);
list_for_each(temp_item, &GlobalSMBSessionList) {
ses = list_entry(temp_item, struct cifsSesInfo, cifsSessionList);
- if(ses->linux_uid == current->uid) {
+ if(ses->linux_uid == current->fsuid) {
if(ses->server == treeCon->ses->server) {
cFYI(1,("found matching uid substitute right smb_uid"));
buffer->Uid = ses->Suid;
tmp_inode->i_fop = &cifs_file_nobrl_ops;
else
tmp_inode->i_fop = &cifs_file_ops;
- if(cifs_sb->mnt_cifs_flags & CIFS_MOUNT_NO_BRL)
- tmp_inode->i_fop->lock = NULL;
+
tmp_inode->i_data.a_ops = &cifs_addr_ops;
if((cifs_sb->tcon) && (cifs_sb->tcon->ses) &&
(cifs_sb->tcon->ses->server->maxBuf <
if (S_ISREG(tmp_inode->i_mode)) {
cFYI(1, ("File inode"));
tmp_inode->i_op = &cifs_file_inode_ops;
- if(cifs_sb->mnt_cifs_flags & CIFS_MOUNT_DIRECT_IO)
- tmp_inode->i_fop = &cifs_file_direct_ops;
+
+ if(cifs_sb->mnt_cifs_flags & CIFS_MOUNT_DIRECT_IO) {
+ if(cifs_sb->mnt_cifs_flags & CIFS_MOUNT_NO_BRL)
+ tmp_inode->i_fop = &cifs_file_direct_nobrl_ops;
+ else
+ tmp_inode->i_fop = &cifs_file_direct_ops;
+
+ } else if(cifs_sb->mnt_cifs_flags & CIFS_MOUNT_NO_BRL)
+ tmp_inode->i_fop = &cifs_file_nobrl_ops;
else
tmp_inode->i_fop = &cifs_file_ops;
- if(cifs_sb->mnt_cifs_flags & CIFS_MOUNT_NO_BRL)
- tmp_inode->i_fop->lock = NULL;
+
tmp_inode->i_data.a_ops = &cifs_addr_ops;
if((cifs_sb->tcon) && (cifs_sb->tcon->ses) &&
(cifs_sb->tcon->ses->server->maxBuf <
/* NB: unlike smb/cifs packets, the RFC1002 structures are big endian */
/* RFC 1002 session packet types */
-#define RFC1002_SESSION_MESASAGE 0x00
+#define RFC1002_SESSION_MESSAGE 0x00
#define RFC1002_SESSION_REQUEST 0x81
#define RFC1002_POSITIVE_SESSION_RESPONSE 0x82
#define RFC1002_NEGATIVE_SESSION_RESPONSE 0x83
-#define RFC1002_RETARGET_SESSION_RESPONSE 0x83
+#define RFC1002_RETARGET_SESSION_RESPONSE 0x84
#define RFC1002_SESSION_KEEP_ALIVE 0x85
/* RFC 1002 flags (only one defined */
return rc;
}
-#ifdef CONFIG_CIFS_EXPERIMENTAL
static int
smb_send2(struct socket *ssocket, struct kvec *iov, int n_vec,
struct sockaddr *sin)
int
SendReceive2(const unsigned int xid, struct cifsSesInfo *ses,
- struct kvec *iov, int n_vec, int *pbytes_returned,
+ struct kvec *iov, int n_vec, int * pRespBufType /* ret */,
const int long_op)
{
int rc = 0;
unsigned long timeout;
struct mid_q_entry *midQ;
struct smb_hdr *in_buf = iov[0].iov_base;
+
+ *pRespBufType = CIFS_NO_BUFFER; /* no response buf yet */
if (ses == NULL) {
cERROR(1,("Null smb session"));
return -ENOMEM;
}
-/* BB FIXME */
-/* rc = cifs_sign_smb2(iov, n_vec, ses->server, &midQ->sequence_number); */
+ rc = cifs_sign_smb2(iov, n_vec, ses->server, &midQ->sequence_number);
midQ->midState = MID_REQUEST_SUBMITTED;
#ifdef CONFIG_CIFS_STATS2
receive_len, xid));
rc = -EIO;
} else { /* rcvd frame is ok */
-
if (midQ->resp_buf &&
(midQ->midState == MID_RESPONSE_RECEIVED)) {
- in_buf->smb_buf_length = receive_len;
- /* BB verify that length would not overrun small buf */
- memcpy((char *)in_buf + 4,
- (char *)midQ->resp_buf + 4,
- receive_len);
- dump_smb(in_buf, 80);
+ iov[0].iov_base = (char *)midQ->resp_buf;
+ if(midQ->largeBuf)
+ *pRespBufType = CIFS_LARGE_BUFFER;
+ else
+ *pRespBufType = CIFS_SMALL_BUFFER;
+ iov[0].iov_len = receive_len + 4;
+ iov[1].iov_len = 0;
+
+ dump_smb(midQ->resp_buf, 80);
/* convert the length into a more usable form */
if((receive_len > 24) &&
(ses->server->secMode & (SECMODE_SIGN_REQUIRED |
SECMODE_SIGN_ENABLED))) {
- rc = cifs_verify_signature(in_buf,
+ rc = cifs_verify_signature(midQ->resp_buf,
ses->server->mac_signing_key,
midQ->sequence_number+1);
if(rc) {
}
}
- *pbytes_returned = in_buf->smb_buf_length;
-
/* BB special case reconnect tid and uid here? */
/* BB special case Errbadpassword and pwdexpired here */
- rc = map_smb_to_linux_error(in_buf);
+ rc = map_smb_to_linux_error(midQ->resp_buf);
/* convert ByteCount if necessary */
if (receive_len >=
sizeof (struct smb_hdr) -
4 /* do not count RFC1001 header */ +
- (2 * in_buf->WordCount) + 2 /* bcc */ )
- BCC(in_buf) = le16_to_cpu(BCC_LE(in_buf));
+ (2 * midQ->resp_buf->WordCount) + 2 /* bcc */ )
+ BCC(midQ->resp_buf) =
+ le16_to_cpu(BCC_LE(midQ->resp_buf));
+ midQ->resp_buf = NULL; /* mark it so will not be freed
+ by DeleteMidQEntry */
} else {
rc = -EIO;
cFYI(1,("Bad MID state?"));
return rc;
}
-#endif /* CIFS_EXPERIMENTAL */
int
SendReceive(const unsigned int xid, struct cifsSesInfo *ses,
BCC(out_buf) = le16_to_cpu(BCC_LE(out_buf));
} else {
rc = -EIO;
- cERROR(1,("Bad MID state? "));
+ cERROR(1,("Bad MID state?"));
}
}
cifs_no_response_exit:
rc = CIFSSMBQueryEA(xid,pTcon,full_path,ea_name,ea_value,
buf_size, cifs_sb->local_nls,
cifs_sb->mnt_cifs_flags & CIFS_MOUNT_MAP_SPECIAL_CHR);
- } else if(strncmp(ea_name,POSIX_ACL_XATTR_ACCESS,strlen(POSIX_ACL_XATTR_ACCESS)) == 0) {
+ } else if(strncmp(ea_name,POSIX_ACL_XATTR_ACCESS,
+ strlen(POSIX_ACL_XATTR_ACCESS)) == 0) {
#ifdef CONFIG_CIFS_POSIX
if(sb->s_flags & MS_POSIXACL)
rc = CIFSSMBGetPosixACL(xid, pTcon, full_path,
cifs_sb->local_nls,
cifs_sb->mnt_cifs_flags &
CIFS_MOUNT_MAP_SPECIAL_CHR);
+/* else if(cifs_sb->mnt_cifs_flags & CIFS_MOUNT_CIFS_ACL) {
+ __u16 fid;
+ int oplock = FALSE;
+ rc = CIFSSMBOpen(xid, pTcon, full_path,
+ FILE_OPEN, GENERIC_READ, 0, &fid,
+ &oplock, NULL, cifs_sb->local_nls,
+ cifs_sb->mnt_cifs_flags &
+ CIFS_MOUNT_MAP_SPECIAL_CHR);
+ if(rc == 0) {
+ rc = CIFSSMBGetCIFSACL(xid, pTcon, fid,
+ ea_value, buf_size,
+ ACL_TYPE_ACCESS);
+ CIFSSMBClose(xid, pTcon, fid)
+ }
+ } */ /* BB enable after fixing up return data */
+
#else
cFYI(1,("query POSIX ACL not supported yet"));
#endif /* CONFIG_CIFS_POSIX */
- } else if(strncmp(ea_name,POSIX_ACL_XATTR_DEFAULT,strlen(POSIX_ACL_XATTR_DEFAULT)) == 0) {
+ } else if(strncmp(ea_name,POSIX_ACL_XATTR_DEFAULT,
+ strlen(POSIX_ACL_XATTR_DEFAULT)) == 0) {
#ifdef CONFIG_CIFS_POSIX
if(sb->s_flags & MS_POSIXACL)
rc = CIFSSMBGetPosixACL(xid, pTcon, full_path,
#include <asm/mmu_context.h>
#include <asm/ioctls.h>
+extern void sigset_from_compat(sigset_t *set, compat_sigset_t *compat);
+
/*
* Not all architectures have sys_utime, so implement this in terms
* of sys_utimes.
tv[0].tv_usec = 0;
tv[1].tv_usec = 0;
}
- return do_utimes(filename, t ? tv : NULL);
+ return do_utimes(AT_FDCWD, filename, t ? tv : NULL);
}
-asmlinkage long compat_sys_utimes(char __user *filename, struct compat_timeval __user *t)
+asmlinkage long compat_sys_futimesat(int dfd, char __user *filename, struct compat_timeval __user *t)
{
struct timeval tv[2];
get_user(tv[1].tv_usec, &t[1].tv_usec))
return -EFAULT;
}
- return do_utimes(filename, t ? tv : NULL);
+ return do_utimes(dfd, filename, t ? tv : NULL);
+}
+
+asmlinkage long compat_sys_utimes(char __user *filename, struct compat_timeval __user *t)
+{
+ return compat_sys_futimesat(AT_FDCWD, filename, t);
}
asmlinkage long compat_sys_newstat(char __user * filename,
struct compat_stat __user *statbuf)
{
struct kstat stat;
- int error = vfs_stat(filename, &stat);
+ int error = vfs_stat_fd(AT_FDCWD, filename, &stat);
if (!error)
error = cp_compat_stat(&stat, statbuf);
struct compat_stat __user *statbuf)
{
struct kstat stat;
- int error = vfs_lstat(filename, &stat);
+ int error = vfs_lstat_fd(AT_FDCWD, filename, &stat);
+
+ if (!error)
+ error = cp_compat_stat(&stat, statbuf);
+ return error;
+}
+
+asmlinkage long compat_sys_newfstatat(int dfd, char __user *filename,
+ struct compat_stat __user *statbuf, int flag)
+{
+ struct kstat stat;
+ int error = -EINVAL;
+
+ if ((flag & ~AT_SYMLINK_NOFOLLOW) != 0)
+ goto out;
+
+ if (flag & AT_SYMLINK_NOFOLLOW)
+ error = vfs_lstat_fd(dfd, filename, &stat);
+ else
+ error = vfs_stat_fd(dfd, filename, &stat);
if (!error)
error = cp_compat_stat(&stat, statbuf);
+
+out:
return error;
}
asmlinkage long
compat_sys_open(const char __user *filename, int flags, int mode)
{
- return do_sys_open(filename, flags, mode);
+ return do_sys_open(AT_FDCWD, filename, flags, mode);
+}
+
+/*
+ * Exactly like fs/open.c:sys_openat(), except that it doesn't set the
+ * O_LARGEFILE flag.
+ */
+asmlinkage long
+compat_sys_openat(int dfd, const char __user *filename, int flags, int mode)
+{
+ return do_sys_open(dfd, filename, flags, mode);
}
/*
#define MAX_SELECT_SECONDS \
((unsigned long) (MAX_SCHEDULE_TIMEOUT / HZ)-1)
-asmlinkage long
-compat_sys_select(int n, compat_ulong_t __user *inp, compat_ulong_t __user *outp,
- compat_ulong_t __user *exp, struct compat_timeval __user *tvp)
+int compat_core_sys_select(int n, compat_ulong_t __user *inp,
+ compat_ulong_t __user *outp, compat_ulong_t __user *exp, s64 *timeout)
{
fd_set_bits fds;
char *bits;
- long timeout;
int size, max_fdset, ret = -EINVAL;
struct fdtable *fdt;
- timeout = MAX_SCHEDULE_TIMEOUT;
- if (tvp) {
- time_t sec, usec;
-
- if (!access_ok(VERIFY_READ, tvp, sizeof(*tvp))
- || __get_user(sec, &tvp->tv_sec)
- || __get_user(usec, &tvp->tv_usec)) {
- ret = -EFAULT;
- goto out_nofds;
- }
-
- if (sec < 0 || usec < 0)
- goto out_nofds;
-
- if ((unsigned long) sec < MAX_SELECT_SECONDS) {
- timeout = ROUND_UP(usec, 1000000/HZ);
- timeout += sec * (unsigned long) HZ;
- }
- }
-
if (n < 0)
goto out_nofds;
zero_fd_set(n, fds.res_out);
zero_fd_set(n, fds.res_ex);
- ret = do_select(n, &fds, &timeout);
-
- if (tvp && !(current->personality & STICKY_TIMEOUTS)) {
- time_t sec = 0, usec = 0;
- if (timeout) {
- sec = timeout / HZ;
- usec = timeout % HZ;
- usec *= (1000000/HZ);
- }
- if (put_user(sec, &tvp->tv_sec) ||
- put_user(usec, &tvp->tv_usec))
- ret = -EFAULT;
- }
+ ret = do_select(n, &fds, timeout);
if (ret < 0)
goto out;
return ret;
}
+asmlinkage long compat_sys_select(int n, compat_ulong_t __user *inp,
+ compat_ulong_t __user *outp, compat_ulong_t __user *exp,
+ struct compat_timeval __user *tvp)
+{
+ s64 timeout = -1;
+ struct compat_timeval tv;
+ int ret;
+
+ if (tvp) {
+ if (copy_from_user(&tv, tvp, sizeof(tv)))
+ return -EFAULT;
+
+ if (tv.tv_sec < 0 || tv.tv_usec < 0)
+ return -EINVAL;
+
+ /* Cast to u64 to make GCC stop complaining */
+ if ((u64)tv.tv_sec >= (u64)MAX_INT64_SECONDS)
+ timeout = -1; /* infinite */
+ else {
+ timeout = ROUND_UP(tv.tv_usec, 1000000/HZ);
+ timeout += tv.tv_sec * HZ;
+ }
+ }
+
+ ret = compat_core_sys_select(n, inp, outp, exp, &timeout);
+
+ if (tvp) {
+ if (current->personality & STICKY_TIMEOUTS)
+ goto sticky;
+ tv.tv_usec = jiffies_to_usecs(do_div((*(u64*)&timeout), HZ));
+ tv.tv_sec = timeout;
+ if (copy_to_user(tvp, &tv, sizeof(tv))) {
+sticky:
+ /*
+ * If an application puts its timeval in read-only
+ * memory, we don't want the Linux-specific update to
+ * the timeval to cause a fault after the select has
+ * completed successfully. However, because we're not
+ * updating the timeval, we can't restart the system
+ * call.
+ */
+ if (ret == -ERESTARTNOHAND)
+ ret = -EINTR;
+ }
+ }
+
+ return ret;
+}
+
+#ifdef TIF_RESTORE_SIGMASK
+asmlinkage long compat_sys_pselect7(int n, compat_ulong_t __user *inp,
+ compat_ulong_t __user *outp, compat_ulong_t __user *exp,
+ struct compat_timespec __user *tsp, compat_sigset_t __user *sigmask,
+ compat_size_t sigsetsize)
+{
+ compat_sigset_t ss32;
+ sigset_t ksigmask, sigsaved;
+ long timeout = MAX_SCHEDULE_TIMEOUT;
+ struct compat_timespec ts;
+ int ret;
+
+ if (tsp) {
+ if (copy_from_user(&ts, tsp, sizeof(ts)))
+ return -EFAULT;
+
+ if (ts.tv_sec < 0 || ts.tv_nsec < 0)
+ return -EINVAL;
+ }
+
+ if (sigmask) {
+ if (sigsetsize != sizeof(compat_sigset_t))
+ return -EINVAL;
+ if (copy_from_user(&ss32, sigmask, sizeof(ss32)))
+ return -EFAULT;
+ sigset_from_compat(&ksigmask, &ss32);
+
+ sigdelsetmask(&ksigmask, sigmask(SIGKILL)|sigmask(SIGSTOP));
+ sigprocmask(SIG_SETMASK, &ksigmask, &sigsaved);
+ }
+
+ do {
+ if (tsp) {
+ if ((unsigned long)ts.tv_sec < MAX_SELECT_SECONDS) {
+ timeout = ROUND_UP(ts.tv_nsec, 1000000000/HZ);
+ timeout += ts.tv_sec * (unsigned long)HZ;
+ ts.tv_sec = 0;
+ ts.tv_nsec = 0;
+ } else {
+ ts.tv_sec -= MAX_SELECT_SECONDS;
+ timeout = MAX_SELECT_SECONDS * HZ;
+ }
+ }
+
+ ret = compat_core_sys_select(n, inp, outp, exp, &timeout);
+
+ } while (!ret && !timeout && tsp && (ts.tv_sec || ts.tv_nsec));
+
+ if (tsp && !(current->personality & STICKY_TIMEOUTS)) {
+ ts.tv_sec += timeout / HZ;
+ ts.tv_nsec += (timeout % HZ) * (1000000000/HZ);
+ if (ts.tv_nsec >= 1000000000) {
+ ts.tv_sec++;
+ ts.tv_nsec -= 1000000000;
+ }
+ (void)copy_to_user(tsp, &ts, sizeof(ts));
+ }
+
+ if (ret == -ERESTARTNOHAND) {
+ /*
+ * Don't restore the signal mask yet. Let do_signal() deliver
+ * the signal on the way back to userspace, before the signal
+ * mask is restored.
+ */
+ if (sigmask) {
+ memcpy(¤t->saved_sigmask, &sigsaved,
+ sizeof(sigsaved));
+ set_thread_flag(TIF_RESTORE_SIGMASK);
+ }
+ } else if (sigmask)
+ sigprocmask(SIG_SETMASK, &sigsaved, NULL);
+
+ return ret;
+}
+
+asmlinkage long compat_sys_pselect6(int n, compat_ulong_t __user *inp,
+ compat_ulong_t __user *outp, compat_ulong_t __user *exp,
+ struct compat_timespec __user *tsp, void __user *sig)
+{
+ compat_size_t sigsetsize = 0;
+ compat_uptr_t up = 0;
+
+ if (sig) {
+ if (!access_ok(VERIFY_READ, sig,
+ sizeof(compat_uptr_t)+sizeof(compat_size_t)) ||
+ __get_user(up, (compat_uptr_t __user *)sig) ||
+ __get_user(sigsetsize,
+ (compat_size_t __user *)(sig+sizeof(up))))
+ return -EFAULT;
+ }
+ return compat_sys_pselect7(n, inp, outp, exp, tsp, compat_ptr(up),
+ sigsetsize);
+}
+
+asmlinkage long compat_sys_ppoll(struct pollfd __user *ufds,
+ unsigned int nfds, struct compat_timespec __user *tsp,
+ const compat_sigset_t __user *sigmask, compat_size_t sigsetsize)
+{
+ compat_sigset_t ss32;
+ sigset_t ksigmask, sigsaved;
+ struct compat_timespec ts;
+ s64 timeout = -1;
+ int ret;
+
+ if (tsp) {
+ if (copy_from_user(&ts, tsp, sizeof(ts)))
+ return -EFAULT;
+
+ /* We assume that ts.tv_sec is always lower than
+ the number of seconds that can be expressed in
+ an s64. Otherwise the compiler bitches at us */
+ timeout = ROUND_UP(ts.tv_nsec, 1000000000/HZ);
+ timeout += ts.tv_sec * HZ;
+ }
+
+ if (sigmask) {
+ if (sigsetsize |= sizeof(compat_sigset_t))
+ return -EINVAL;
+ if (copy_from_user(&ss32, sigmask, sizeof(ss32)))
+ return -EFAULT;
+ sigset_from_compat(&ksigmask, &ss32);
+
+ sigdelsetmask(&ksigmask, sigmask(SIGKILL)|sigmask(SIGSTOP));
+ sigprocmask(SIG_SETMASK, &ksigmask, &sigsaved);
+ }
+
+ ret = do_sys_poll(ufds, nfds, &timeout);
+
+ /* We can restart this syscall, usually */
+ if (ret == -EINTR) {
+ /*
+ * Don't restore the signal mask yet. Let do_signal() deliver
+ * the signal on the way back to userspace, before the signal
+ * mask is restored.
+ */
+ if (sigmask) {
+ memcpy(¤t->saved_sigmask, &sigsaved,
+ sizeof(sigsaved));
+ set_thread_flag(TIF_RESTORE_SIGMASK);
+ }
+ ret = -ERESTARTNOHAND;
+ } else if (sigmask)
+ sigprocmask(SIG_SETMASK, &sigsaved, NULL);
+
+ if (tsp && timeout >= 0) {
+ if (current->personality & STICKY_TIMEOUTS)
+ goto sticky;
+ /* Yes, we know it's actually an s64, but it's also positive. */
+ ts.tv_nsec = jiffies_to_usecs(do_div((*(u64*)&timeout), HZ)) * 1000;
+ ts.tv_sec = timeout;
+ if (copy_to_user(tsp, &ts, sizeof(ts))) {
+sticky:
+ /*
+ * If an application puts its timeval in read-only
+ * memory, we don't want the Linux-specific update to
+ * the timeval to cause a fault after the select has
+ * completed successfully. However, because we're not
+ * updating the timeval, we can't restart the system
+ * call.
+ */
+ if (ret == -ERESTARTNOHAND && timeout >= 0)
+ ret = -EINTR;
+ }
+ }
+
+ return ret;
+}
+#endif /* TIF_RESTORE_SIGMASK */
+
#if defined(CONFIG_NFSD) || defined(CONFIG_NFSD_MODULE)
/* Stuff for NFS server syscalls... */
struct compat_nfsctl_svc {
int err;
struct file *file;
- err = path_lookup_open(name, LOOKUP_FOLLOW, &nd, FMODE_READ);
+ err = path_lookup_open(AT_FDCWD, name, LOOKUP_FOLLOW, &nd, FMODE_READ);
file = ERR_PTR(err);
if (!err) {
#define dprintk(fmt, args...) do{}while(0)
+static struct dentry *
+find_acceptable_alias(struct dentry *result,
+ int (*acceptable)(void *context, struct dentry *dentry),
+ void *context)
+{
+ struct dentry *dentry, *toput = NULL;
+
+ spin_lock(&dcache_lock);
+ list_for_each_entry(dentry, &result->d_inode->i_dentry, d_alias) {
+ dget_locked(dentry);
+ spin_unlock(&dcache_lock);
+ if (toput)
+ dput(toput);
+ if (dentry != result && acceptable(context, dentry)) {
+ dput(result);
+ return dentry;
+ }
+ spin_lock(&dcache_lock);
+ toput = dentry;
+ }
+ spin_unlock(&dcache_lock);
+
+ if (toput)
+ dput(toput);
+ return NULL;
+}
+
/**
* find_exported_dentry - helper routine to implement export_operations->decode_fh
* @sb: The &super_block identifying the filesystem
struct dentry *target_dir;
int err;
struct export_operations *nops = sb->s_export_op;
- struct list_head *le, *head;
- struct dentry *toput = NULL;
+ struct dentry *alias;
int noprogress;
char nbuf[NAME_MAX+1];
/* there is no other dentry, so fail */
goto err_result;
}
- /* try any other aliases */
- spin_lock(&dcache_lock);
- head = &result->d_inode->i_dentry;
- list_for_each(le, head) {
- struct dentry *dentry = list_entry(le, struct dentry, d_alias);
- dget_locked(dentry);
- spin_unlock(&dcache_lock);
- if (toput)
- dput(toput);
- toput = NULL;
- if (dentry != result &&
- acceptable(context, dentry)) {
- dput(result);
- return dentry;
- }
- spin_lock(&dcache_lock);
- toput = dentry;
- }
- spin_unlock(&dcache_lock);
- if (toput)
- dput(toput);
+
+ alias = find_acceptable_alias(result, acceptable, context);
+ if (alias)
+ return alias;
}
/* It's a directory, or we are required to confirm the file's
/* now result is properly connected, it is our best bet */
if (acceptable(context, result))
return result;
- /* one last try of the aliases.. */
- spin_lock(&dcache_lock);
- toput = NULL;
- head = &result->d_inode->i_dentry;
- list_for_each(le, head) {
- struct dentry *dentry = list_entry(le, struct dentry, d_alias);
- dget_locked(dentry);
- spin_unlock(&dcache_lock);
- if (toput) dput(toput);
- if (dentry != result &&
- acceptable(context, dentry)) {
- dput(result);
- return dentry;
- }
- spin_lock(&dcache_lock);
- toput = dentry;
- }
- spin_unlock(&dcache_lock);
- if (toput)
- dput(toput);
+
+ alias = find_acceptable_alias(result, acceptable, context);
+ if (alias)
+ return alias;
/* drat - I just cannot find anything acceptable */
dput(result);
static kmem_cache_t *fuse_req_cachep;
-static inline struct fuse_conn *fuse_get_conn(struct file *file)
+static struct fuse_conn *fuse_get_conn(struct file *file)
{
struct fuse_conn *fc;
spin_lock(&fuse_lock);
fc = file->private_data;
- if (fc && !fc->mounted)
+ if (fc && !fc->connected)
fc = NULL;
spin_unlock(&fuse_lock);
return fc;
}
-static inline void fuse_request_init(struct fuse_req *req)
+static void fuse_request_init(struct fuse_req *req)
{
memset(req, 0, sizeof(*req));
INIT_LIST_HEAD(&req->list);
kmem_cache_free(fuse_req_cachep, req);
}
-static inline void block_sigs(sigset_t *oldset)
+static void block_sigs(sigset_t *oldset)
{
sigset_t mask;
sigprocmask(SIG_BLOCK, &mask, oldset);
}
-static inline void restore_sigs(sigset_t *oldset)
+static void restore_sigs(sigset_t *oldset)
{
sigprocmask(SIG_SETMASK, oldset, NULL);
}
int intr;
sigset_t oldset;
+ atomic_inc(&fc->num_waiting);
block_sigs(&oldset);
intr = down_interruptible(&fc->outstanding_sem);
restore_sigs(&oldset);
- return intr ? NULL : do_get_request(fc);
+ if (intr) {
+ atomic_dec(&fc->num_waiting);
+ return NULL;
+ }
+ return do_get_request(fc);
}
static void fuse_putback_request(struct fuse_conn *fc, struct fuse_req *req)
{
spin_lock(&fuse_lock);
- if (req->preallocated)
+ if (req->preallocated) {
+ atomic_dec(&fc->num_waiting);
list_add(&req->list, &fc->unused_list);
- else
+ } else
fuse_request_free(req);
/* If we are in debt decrease that first */
spin_unlock(&fuse_lock);
}
-static void process_init_reply(struct fuse_conn *fc, struct fuse_req *req)
-{
- int i;
- struct fuse_init_out *arg = &req->misc.init_out;
-
- if (arg->major != FUSE_KERNEL_VERSION)
- fc->conn_error = 1;
- else {
- fc->minor = arg->minor;
- fc->max_write = arg->minor < 5 ? 4096 : arg->max_write;
- }
-
- /* After INIT reply is received other requests can go
- out. So do (FUSE_MAX_OUTSTANDING - 1) number of
- up()s on outstanding_sem. The last up() is done in
- fuse_putback_request() */
- for (i = 1; i < FUSE_MAX_OUTSTANDING; i++)
- up(&fc->outstanding_sem);
-}
-
/*
* This function is called when a request is finished. Either a reply
* has arrived or it was interrupted (and not yet sent) or some error
- * occurred during communication with userspace, or the device file was
- * closed. It decreases the reference count for the request. In case
- * of a background request the reference to the stored objects are
- * released. The requester thread is woken up (if still waiting), and
- * finally the request is either freed or put on the unused_list
+ * occurred during communication with userspace, or the device file
+ * was closed. In case of a background request the reference to the
+ * stored objects are released. The requester thread is woken up (if
+ * still waiting), the 'end' callback is called if given, else the
+ * reference to the request is released
*
* Called with fuse_lock, unlocks it
*/
static void request_end(struct fuse_conn *fc, struct fuse_req *req)
{
- int putback;
- req->finished = 1;
- putback = atomic_dec_and_test(&req->count);
+ void (*end) (struct fuse_conn *, struct fuse_req *) = req->end;
+ req->end = NULL;
+ list_del(&req->list);
+ req->state = FUSE_REQ_FINISHED;
spin_unlock(&fuse_lock);
if (req->background) {
down_read(&fc->sbput_sem);
up_read(&fc->sbput_sem);
}
wake_up(&req->waitq);
- if (req->in.h.opcode == FUSE_INIT)
- process_init_reply(fc, req);
- else if (req->in.h.opcode == FUSE_RELEASE && req->inode == NULL) {
- /* Special case for failed iget in CREATE */
- u64 nodeid = req->in.h.nodeid;
- __fuse_get_request(req);
- fuse_reset_request(req);
- fuse_send_forget(fc, req, nodeid, 1);
- putback = 0;
- }
- if (putback)
- fuse_putback_request(fc, req);
+ if (end)
+ end(fc, req);
+ else
+ fuse_put_request(fc, req);
}
/*
spin_unlock(&fuse_lock);
block_sigs(&oldset);
- wait_event_interruptible(req->waitq, req->finished);
+ wait_event_interruptible(req->waitq, req->state == FUSE_REQ_FINISHED);
restore_sigs(&oldset);
spin_lock(&fuse_lock);
- if (req->finished)
+ if (req->state == FUSE_REQ_FINISHED && !req->interrupted)
return;
- req->out.h.error = -EINTR;
- req->interrupted = 1;
+ if (!req->interrupted) {
+ req->out.h.error = -EINTR;
+ req->interrupted = 1;
+ }
if (req->locked) {
/* This is uninterruptible sleep, because data is
being copied to/from the buffers of req. During
wait_event(req->waitq, !req->locked);
spin_lock(&fuse_lock);
}
- if (!req->sent && !list_empty(&req->list)) {
+ if (req->state == FUSE_REQ_PENDING) {
list_del(&req->list);
__fuse_put_request(req);
- } else if (!req->finished && req->sent)
+ } else if (req->state == FUSE_REQ_SENT)
background_request(fc, req);
}
fc->outstanding_debt++;
}
list_add_tail(&req->list, &fc->pending);
+ req->state = FUSE_REQ_PENDING;
wake_up(&fc->waitq);
}
request_send_nowait(fc, req);
}
-void fuse_send_init(struct fuse_conn *fc)
-{
- /* This is called from fuse_read_super() so there's guaranteed
- to be a request available */
- struct fuse_req *req = do_get_request(fc);
- struct fuse_init_in *arg = &req->misc.init_in;
- arg->major = FUSE_KERNEL_VERSION;
- arg->minor = FUSE_KERNEL_MINOR_VERSION;
- req->in.h.opcode = FUSE_INIT;
- req->in.numargs = 1;
- req->in.args[0].size = sizeof(*arg);
- req->in.args[0].value = arg;
- req->out.numargs = 1;
- /* Variable length arguement used for backward compatibility
- with interface version < 7.5. Rest of init_out is zeroed
- by do_get_request(), so a short reply is not a problem */
- req->out.argvar = 1;
- req->out.args[0].size = sizeof(struct fuse_init_out);
- req->out.args[0].value = &req->misc.init_out;
- request_send_background(fc, req);
-}
-
/*
* Lock the request. Up to the next unlock_request() there mustn't be
* anything that could cause a page-fault. If the request was already
* interrupted bail out.
*/
-static inline int lock_request(struct fuse_req *req)
+static int lock_request(struct fuse_req *req)
{
int err = 0;
if (req) {
* requester thread is currently waiting for it to be unlocked, so
* wake it up.
*/
-static inline void unlock_request(struct fuse_req *req)
+static void unlock_request(struct fuse_req *req)
{
if (req) {
spin_lock(&fuse_lock);
}
/* Unmap and put previous page of userspace buffer */
-static inline void fuse_copy_finish(struct fuse_copy_state *cs)
+static void fuse_copy_finish(struct fuse_copy_state *cs)
{
if (cs->mapaddr) {
kunmap_atomic(cs->mapaddr, KM_USER0);
}
/* Do as much copy to/from userspace buffer as we can */
-static inline int fuse_copy_do(struct fuse_copy_state *cs, void **val,
- unsigned *size)
+static int fuse_copy_do(struct fuse_copy_state *cs, void **val, unsigned *size)
{
unsigned ncpy = min(*size, cs->len);
if (val) {
* Copy a page in the request to/from the userspace buffer. Must be
* done atomically
*/
-static inline int fuse_copy_page(struct fuse_copy_state *cs, struct page *page,
- unsigned offset, unsigned count, int zeroing)
+static int fuse_copy_page(struct fuse_copy_state *cs, struct page *page,
+ unsigned offset, unsigned count, int zeroing)
{
if (page && zeroing && count < PAGE_SIZE) {
void *mapaddr = kmap_atomic(page, KM_USER1);
DECLARE_WAITQUEUE(wait, current);
add_wait_queue_exclusive(&fc->waitq, &wait);
- while (fc->mounted && list_empty(&fc->pending)) {
+ while (fc->connected && list_empty(&fc->pending)) {
set_current_state(TASK_INTERRUPTIBLE);
if (signal_pending(current))
break;
goto err_unlock;
request_wait(fc);
err = -ENODEV;
- if (!fc->mounted)
+ if (!fc->connected)
goto err_unlock;
err = -ERESTARTSYS;
if (list_empty(&fc->pending))
goto err_unlock;
req = list_entry(fc->pending.next, struct fuse_req, list);
- list_del_init(&req->list);
+ req->state = FUSE_REQ_READING;
+ list_move(&req->list, &fc->io);
in = &req->in;
reqsize = in->h.len;
if (!req->isreply)
request_end(fc, req);
else {
- req->sent = 1;
- list_add_tail(&req->list, &fc->processing);
+ req->state = FUSE_REQ_SENT;
+ list_move_tail(&req->list, &fc->processing);
spin_unlock(&fuse_lock);
}
return reqsize;
goto err_finish;
spin_lock(&fuse_lock);
+ err = -ENOENT;
+ if (!fc->connected)
+ goto err_unlock;
+
req = request_find(fc, oh.unique);
err = -EINVAL;
if (!req)
goto err_unlock;
- list_del_init(&req->list);
if (req->interrupted) {
- request_end(fc, req);
+ spin_unlock(&fuse_lock);
fuse_copy_finish(&cs);
+ spin_lock(&fuse_lock);
+ request_end(fc, req);
return -ENOENT;
}
+ list_move(&req->list, &fc->io);
req->out.h = oh;
req->locked = 1;
cs.req = req;
return mask;
}
-/* Abort all requests on the given list (pending or processing) */
+/*
+ * Abort all requests on the given list (pending or processing)
+ *
+ * This function releases and reacquires fuse_lock
+ */
static void end_requests(struct fuse_conn *fc, struct list_head *head)
{
while (!list_empty(head)) {
struct fuse_req *req;
req = list_entry(head->next, struct fuse_req, list);
- list_del_init(&req->list);
req->out.h.error = -ECONNABORTED;
request_end(fc, req);
spin_lock(&fuse_lock);
}
}
+/*
+ * Abort requests under I/O
+ *
+ * The requests are set to interrupted and finished, and the request
+ * waiter is woken up. This will make request_wait_answer() wait
+ * until the request is unlocked and then return.
+ *
+ * If the request is asynchronous, then the end function needs to be
+ * called after waiting for the request to be unlocked (if it was
+ * locked).
+ */
+static void end_io_requests(struct fuse_conn *fc)
+{
+ while (!list_empty(&fc->io)) {
+ struct fuse_req *req =
+ list_entry(fc->io.next, struct fuse_req, list);
+ void (*end) (struct fuse_conn *, struct fuse_req *) = req->end;
+
+ req->interrupted = 1;
+ req->out.h.error = -ECONNABORTED;
+ req->state = FUSE_REQ_FINISHED;
+ list_del_init(&req->list);
+ wake_up(&req->waitq);
+ if (end) {
+ req->end = NULL;
+ /* The end function will consume this reference */
+ __fuse_get_request(req);
+ spin_unlock(&fuse_lock);
+ wait_event(req->waitq, !req->locked);
+ end(fc, req);
+ spin_lock(&fuse_lock);
+ }
+ }
+}
+
+/*
+ * Abort all requests.
+ *
+ * Emergency exit in case of a malicious or accidental deadlock, or
+ * just a hung filesystem.
+ *
+ * The same effect is usually achievable through killing the
+ * filesystem daemon and all users of the filesystem. The exception
+ * is the combination of an asynchronous request and the tricky
+ * deadlock (see Documentation/filesystems/fuse.txt).
+ *
+ * During the aborting, progression of requests from the pending and
+ * processing lists onto the io list, and progression of new requests
+ * onto the pending list is prevented by req->connected being false.
+ *
+ * Progression of requests under I/O to the processing list is
+ * prevented by the req->interrupted flag being true for these
+ * requests. For this reason requests on the io list must be aborted
+ * first.
+ */
+void fuse_abort_conn(struct fuse_conn *fc)
+{
+ spin_lock(&fuse_lock);
+ if (fc->connected) {
+ fc->connected = 0;
+ end_io_requests(fc);
+ end_requests(fc, &fc->pending);
+ end_requests(fc, &fc->processing);
+ wake_up_all(&fc->waitq);
+ }
+ spin_unlock(&fuse_lock);
+}
+
static int fuse_dev_release(struct inode *inode, struct file *file)
{
struct fuse_conn *fc;
fc->connected = 0;
end_requests(fc, &fc->pending);
end_requests(fc, &fc->processing);
- fuse_release_conn(fc);
}
spin_unlock(&fuse_lock);
+ if (fc)
+ kobject_put(&fc->kobj);
+
return 0;
}
/*
* Calculate the time in jiffies until a dentry/attributes are valid
*/
-static inline unsigned long time_to_jiffies(unsigned long sec,
- unsigned long nsec)
+static unsigned long time_to_jiffies(unsigned long sec, unsigned long nsec)
{
struct timespec ts = {sec, nsec};
return jiffies + timespec_to_jiffies(&ts);
return 0;
}
-static inline int invalid_nodeid(u64 nodeid)
+static int invalid_nodeid(u64 nodeid)
{
return !nodeid || nodeid == FUSE_ROOT_ID;
}
.d_revalidate = fuse_dentry_revalidate,
};
-static inline int valid_mode(int m)
+static int valid_mode(int m)
{
return S_ISREG(m) || S_ISDIR(m) || S_ISLNK(m) || S_ISCHR(m) ||
S_ISBLK(m) || S_ISFIFO(m) || S_ISSOCK(m);
return 0;
}
-static inline size_t fuse_send_readdir(struct fuse_req *req, struct file *file,
- struct inode *inode, loff_t pos,
- size_t count)
-{
- return fuse_send_read_common(req, file, inode, pos, count, 1);
-}
-
static int fuse_readdir(struct file *file, void *dstbuf, filldir_t filldir)
{
int err;
}
req->num_pages = 1;
req->pages[0] = page;
- nbytes = fuse_send_readdir(req, file, inode, file->f_pos, PAGE_SIZE);
+ fuse_read_fill(req, file, inode, file->f_pos, PAGE_SIZE, FUSE_READDIR);
+ request_send(fc, req);
+ nbytes = req->out.args[0].size;
err = req->out.h.error;
fuse_put_request(fc, req);
if (!err)
return err;
}
+/* Special case for failed iget in CREATE */
+static void fuse_release_end(struct fuse_conn *fc, struct fuse_req *req)
+{
+ u64 nodeid = req->in.h.nodeid;
+ fuse_reset_request(req);
+ fuse_send_forget(fc, req, nodeid, 1);
+}
+
void fuse_send_release(struct fuse_conn *fc, struct fuse_file *ff,
u64 nodeid, struct inode *inode, int flags, int isdir)
{
req->in.args[0].size = sizeof(struct fuse_release_in);
req->in.args[0].value = inarg;
request_send_background(fc, req);
+ if (!inode)
+ req->end = fuse_release_end;
kfree(ff);
}
return fuse_fsync_common(file, de, datasync, 0);
}
-size_t fuse_send_read_common(struct fuse_req *req, struct file *file,
- struct inode *inode, loff_t pos, size_t count,
- int isdir)
+void fuse_read_fill(struct fuse_req *req, struct file *file,
+ struct inode *inode, loff_t pos, size_t count, int opcode)
{
- struct fuse_conn *fc = get_fuse_conn(inode);
struct fuse_file *ff = file->private_data;
- struct fuse_read_in inarg;
+ struct fuse_read_in *inarg = &req->misc.read_in;
- memset(&inarg, 0, sizeof(struct fuse_read_in));
- inarg.fh = ff->fh;
- inarg.offset = pos;
- inarg.size = count;
- req->in.h.opcode = isdir ? FUSE_READDIR : FUSE_READ;
+ inarg->fh = ff->fh;
+ inarg->offset = pos;
+ inarg->size = count;
+ req->in.h.opcode = opcode;
req->in.h.nodeid = get_node_id(inode);
req->inode = inode;
req->file = file;
req->in.numargs = 1;
req->in.args[0].size = sizeof(struct fuse_read_in);
- req->in.args[0].value = &inarg;
+ req->in.args[0].value = inarg;
req->out.argpages = 1;
req->out.argvar = 1;
req->out.numargs = 1;
req->out.args[0].size = count;
- request_send(fc, req);
- return req->out.args[0].size;
}
-static inline size_t fuse_send_read(struct fuse_req *req, struct file *file,
- struct inode *inode, loff_t pos,
- size_t count)
+static size_t fuse_send_read(struct fuse_req *req, struct file *file,
+ struct inode *inode, loff_t pos, size_t count)
{
- return fuse_send_read_common(req, file, inode, pos, count, 0);
+ struct fuse_conn *fc = get_fuse_conn(inode);
+ fuse_read_fill(req, file, inode, pos, count, FUSE_READ);
+ request_send(fc, req);
+ return req->out.args[0].size;
}
static int fuse_readpage(struct file *file, struct page *page)
return err;
}
-static int fuse_send_readpages(struct fuse_req *req, struct file *file,
- struct inode *inode)
+static void fuse_readpages_end(struct fuse_conn *fc, struct fuse_req *req)
{
- loff_t pos = page_offset(req->pages[0]);
- size_t count = req->num_pages << PAGE_CACHE_SHIFT;
- unsigned i;
- req->out.page_zeroing = 1;
- fuse_send_read(req, file, inode, pos, count);
+ int i;
+
+ fuse_invalidate_attr(req->pages[0]->mapping->host); /* atime changed */
+
for (i = 0; i < req->num_pages; i++) {
struct page *page = req->pages[i];
if (!req->out.h.error)
SetPageUptodate(page);
+ else
+ SetPageError(page);
unlock_page(page);
}
- return req->out.h.error;
+ fuse_put_request(fc, req);
+}
+
+static void fuse_send_readpages(struct fuse_req *req, struct file *file,
+ struct inode *inode)
+{
+ struct fuse_conn *fc = get_fuse_conn(inode);
+ loff_t pos = page_offset(req->pages[0]);
+ size_t count = req->num_pages << PAGE_CACHE_SHIFT;
+ req->out.page_zeroing = 1;
+ req->end = fuse_readpages_end;
+ fuse_read_fill(req, file, inode, pos, count, FUSE_READ);
+ request_send_background(fc, req);
}
struct fuse_readpages_data {
(req->num_pages == FUSE_MAX_PAGES_PER_REQ ||
(req->num_pages + 1) * PAGE_CACHE_SIZE > fc->max_read ||
req->pages[req->num_pages - 1]->index + 1 != page->index)) {
- int err = fuse_send_readpages(req, data->file, inode);
- if (err) {
+ fuse_send_readpages(req, data->file, inode);
+ data->req = req = fuse_get_request(fc);
+ if (!req) {
unlock_page(page);
- return err;
+ return -EINTR;
}
- fuse_reset_request(req);
}
req->pages[req->num_pages] = page;
req->num_pages ++;
return -EINTR;
err = read_cache_pages(mapping, pages, fuse_readpages_fill, &data);
- if (!err && data.req->num_pages)
- err = fuse_send_readpages(data.req, file, inode);
- fuse_put_request(fc, data.req);
- fuse_invalidate_attr(inode); /* atime changed */
+ if (!err)
+ fuse_send_readpages(data.req, file, inode);
return err;
}
/** Header returned from userspace */
struct fuse_out_header h;
+ /*
+ * The following bitfields are not changed during the request
+ * processing
+ */
+
/** Last argument is variable length (can be shorter than
arg->size) */
unsigned argvar:1;
struct fuse_arg args[3];
};
+/** The request state */
+enum fuse_req_state {
+ FUSE_REQ_INIT = 0,
+ FUSE_REQ_PENDING,
+ FUSE_REQ_READING,
+ FUSE_REQ_SENT,
+ FUSE_REQ_FINISHED
+};
+
+struct fuse_conn;
+
/**
* A request to the client
*/
struct fuse_req {
- /** This can be on either unused_list, pending or processing
- lists in fuse_conn */
+ /** This can be on either unused_list, pending processing or
+ io lists in fuse_conn */
struct list_head list;
/** Entry on the background list */
/** refcount */
atomic_t count;
+ /*
+ * The following bitfields are either set once before the
+ * request is queued or setting/clearing them is protected by
+ * fuse_lock
+ */
+
/** True if the request has reply */
unsigned isreply:1;
/** Data is being copied to/from the request */
unsigned locked:1;
- /** Request has been sent to userspace */
- unsigned sent:1;
-
- /** The request is finished */
- unsigned finished:1;
+ /** State of the request */
+ enum fuse_req_state state;
/** The request input */
struct fuse_in in;
struct fuse_release_in release_in;
struct fuse_init_in init_in;
struct fuse_init_out init_out;
+ struct fuse_read_in read_in;
} misc;
/** page vector */
/** File used in the request (or NULL) */
struct file *file;
+
+ /** Request completion callback */
+ void (*end)(struct fuse_conn *, struct fuse_req *);
};
/**
* unmounted.
*/
struct fuse_conn {
- /** Reference count */
- int count;
-
/** The user id for this mount */
uid_t user_id;
/** The list of requests being processed */
struct list_head processing;
+ /** The list of requests under I/O */
+ struct list_head io;
+
/** Requests put in the background (RELEASE or any other
interrupted request) */
struct list_head background;
u64 reqctr;
/** Mount is active */
- unsigned mounted : 1;
+ unsigned mounted;
- /** Connection established */
- unsigned connected : 1;
+ /** Connection established, cleared on umount, connection
+ abort and device release */
+ unsigned connected;
- /** Connection failed (version mismatch) */
+ /** Connection failed (version mismatch). Cannot race with
+ setting other bitfields since it is only set once in INIT
+ reply, before any other request, and never cleared */
unsigned conn_error : 1;
+ /*
+ * The following bitfields are only for optimization purposes
+ * and hence races in setting them will not cause malfunction
+ */
+
/** Is fsync not implemented by fs? */
unsigned no_fsync : 1;
/** Is create not implemented by fs? */
unsigned no_create : 1;
+ /** The number of requests waiting for completion */
+ atomic_t num_waiting;
+
/** Negotiated minor version */
unsigned minor;
/** Backing dev info */
struct backing_dev_info bdi;
-};
-static inline struct fuse_conn **get_fuse_conn_super_p(struct super_block *sb)
-{
- return (struct fuse_conn **) &sb->s_fs_info;
-}
+ /** kobject */
+ struct kobject kobj;
+};
static inline struct fuse_conn *get_fuse_conn_super(struct super_block *sb)
{
- return *get_fuse_conn_super_p(sb);
+ return sb->s_fs_info;
}
static inline struct fuse_conn *get_fuse_conn(struct inode *inode)
return get_fuse_conn_super(inode->i_sb);
}
+static inline struct fuse_conn *get_fuse_conn_kobj(struct kobject *obj)
+{
+ return container_of(obj, struct fuse_conn, kobj);
+}
+
static inline struct fuse_inode *get_fuse_inode(struct inode *inode)
{
return container_of(inode, struct fuse_inode, inode);
unsigned long nodeid, u64 nlookup);
/**
- * Send READ or READDIR request
+ * Initialize READ or READDIR request
*/
-size_t fuse_send_read_common(struct fuse_req *req, struct file *file,
- struct inode *inode, loff_t pos, size_t count,
- int isdir);
+void fuse_read_fill(struct fuse_req *req, struct file *file,
+ struct inode *inode, loff_t pos, size_t count, int opcode);
/**
* Send OPEN or OPENDIR request
*/
void fuse_change_attributes(struct inode *inode, struct fuse_attr *attr);
-/**
- * Check if the connection can be released, and if yes, then free the
- * connection structure
- */
-void fuse_release_conn(struct fuse_conn *fc);
-
/**
* Initialize the client device
*/
*/
void fuse_release_background(struct fuse_req *req);
+/* Abort all requests */
+void fuse_abort_conn(struct fuse_conn *fc);
+
/**
* Get the attributes of a file
*/
* Invalidate inode attributes
*/
void fuse_invalidate_attr(struct inode *inode);
-
-/**
- * Send the INIT message
- */
-void fuse_send_init(struct fuse_conn *fc);
spinlock_t fuse_lock;
static kmem_cache_t *fuse_inode_cachep;
+static struct subsystem connections_subsys;
+
+struct fuse_conn_attr {
+ struct attribute attr;
+ ssize_t (*show)(struct fuse_conn *, char *);
+ ssize_t (*store)(struct fuse_conn *, const char *, size_t);
+};
#define FUSE_SUPER_MAGIC 0x65735546
return inode;
}
+static void fuse_umount_begin(struct super_block *sb)
+{
+ fuse_abort_conn(get_fuse_conn_super(sb));
+}
+
static void fuse_put_super(struct super_block *sb)
{
struct fuse_conn *fc = get_fuse_conn_super(sb);
spin_lock(&fuse_lock);
fc->mounted = 0;
- fc->user_id = 0;
- fc->group_id = 0;
- fc->flags = 0;
+ fc->connected = 0;
+ spin_unlock(&fuse_lock);
+ up_write(&fc->sbput_sem);
/* Flush all readers on this fs */
wake_up_all(&fc->waitq);
- up_write(&fc->sbput_sem);
- fuse_release_conn(fc);
- spin_unlock(&fuse_lock);
+ kobject_del(&fc->kobj);
+ kobject_put(&fc->kobj);
}
static void convert_fuse_statfs(struct kstatfs *stbuf, struct fuse_kstatfs *attr)
return 0;
}
-static void free_conn(struct fuse_conn *fc)
+static void fuse_conn_release(struct kobject *kobj)
{
+ struct fuse_conn *fc = get_fuse_conn_kobj(kobj);
+
while (!list_empty(&fc->unused_list)) {
struct fuse_req *req;
req = list_entry(fc->unused_list.next, struct fuse_req, list);
kfree(fc);
}
-/* Must be called with the fuse lock held */
-void fuse_release_conn(struct fuse_conn *fc)
-{
- fc->count--;
- if (!fc->count)
- free_conn(fc);
-}
-
static struct fuse_conn *new_conn(void)
{
struct fuse_conn *fc;
- fc = kmalloc(sizeof(*fc), GFP_KERNEL);
- if (fc != NULL) {
+ fc = kzalloc(sizeof(*fc), GFP_KERNEL);
+ if (fc) {
int i;
- memset(fc, 0, sizeof(*fc));
init_waitqueue_head(&fc->waitq);
INIT_LIST_HEAD(&fc->pending);
INIT_LIST_HEAD(&fc->processing);
+ INIT_LIST_HEAD(&fc->io);
INIT_LIST_HEAD(&fc->unused_list);
INIT_LIST_HEAD(&fc->background);
- sema_init(&fc->outstanding_sem, 0);
+ sema_init(&fc->outstanding_sem, 1); /* One for INIT */
init_rwsem(&fc->sbput_sem);
+ kobj_set_kset_s(fc, connections_subsys);
+ kobject_init(&fc->kobj);
+ atomic_set(&fc->num_waiting, 0);
for (i = 0; i < FUSE_MAX_OUTSTANDING; i++) {
struct fuse_req *req = fuse_request_alloc();
if (!req) {
- free_conn(fc);
+ kobject_put(&fc->kobj);
return NULL;
}
list_add(&req->list, &fc->unused_list);
static struct fuse_conn *get_conn(struct file *file, struct super_block *sb)
{
struct fuse_conn *fc;
+ int err;
+ err = -EINVAL;
if (file->f_op != &fuse_dev_operations)
- return ERR_PTR(-EINVAL);
+ goto out_err;
+
+ err = -ENOMEM;
fc = new_conn();
- if (fc == NULL)
- return ERR_PTR(-ENOMEM);
+ if (!fc)
+ goto out_err;
+
spin_lock(&fuse_lock);
- if (file->private_data) {
- free_conn(fc);
- fc = ERR_PTR(-EINVAL);
- } else {
- file->private_data = fc;
- *get_fuse_conn_super_p(sb) = fc;
- fc->mounted = 1;
- fc->connected = 1;
- fc->count = 2;
- }
+ err = -EINVAL;
+ if (file->private_data)
+ goto out_unlock;
+
+ kobject_get(&fc->kobj);
+ file->private_data = fc;
spin_unlock(&fuse_lock);
return fc;
+
+ out_unlock:
+ spin_unlock(&fuse_lock);
+ kobject_put(&fc->kobj);
+ out_err:
+ return ERR_PTR(err);
}
static struct inode *get_root_inode(struct super_block *sb, unsigned mode)
.read_inode = fuse_read_inode,
.clear_inode = fuse_clear_inode,
.put_super = fuse_put_super,
+ .umount_begin = fuse_umount_begin,
.statfs = fuse_statfs,
.show_options = fuse_show_options,
};
+static void process_init_reply(struct fuse_conn *fc, struct fuse_req *req)
+{
+ int i;
+ struct fuse_init_out *arg = &req->misc.init_out;
+
+ if (req->out.h.error || arg->major != FUSE_KERNEL_VERSION)
+ fc->conn_error = 1;
+ else {
+ fc->minor = arg->minor;
+ fc->max_write = arg->minor < 5 ? 4096 : arg->max_write;
+ }
+
+ /* After INIT reply is received other requests can go
+ out. So do (FUSE_MAX_OUTSTANDING - 1) number of
+ up()s on outstanding_sem. The last up() is done in
+ fuse_putback_request() */
+ for (i = 1; i < FUSE_MAX_OUTSTANDING; i++)
+ up(&fc->outstanding_sem);
+
+ fuse_put_request(fc, req);
+}
+
+static void fuse_send_init(struct fuse_conn *fc)
+{
+ /* This is called from fuse_read_super() so there's guaranteed
+ to be exactly one request available */
+ struct fuse_req *req = fuse_get_request(fc);
+ struct fuse_init_in *arg = &req->misc.init_in;
+
+ arg->major = FUSE_KERNEL_VERSION;
+ arg->minor = FUSE_KERNEL_MINOR_VERSION;
+ req->in.h.opcode = FUSE_INIT;
+ req->in.numargs = 1;
+ req->in.args[0].size = sizeof(*arg);
+ req->in.args[0].value = arg;
+ req->out.numargs = 1;
+ /* Variable length arguement used for backward compatibility
+ with interface version < 7.5. Rest of init_out is zeroed
+ by do_get_request(), so a short reply is not a problem */
+ req->out.argvar = 1;
+ req->out.args[0].size = sizeof(struct fuse_init_out);
+ req->out.args[0].value = &req->misc.init_out;
+ req->end = process_init_reply;
+ request_send_background(fc, req);
+}
+
+static unsigned long long conn_id(void)
+{
+ static unsigned long long ctr = 1;
+ unsigned long long val;
+ spin_lock(&fuse_lock);
+ val = ctr++;
+ spin_unlock(&fuse_lock);
+ return val;
+}
+
static int fuse_fill_super(struct super_block *sb, void *data, int silent)
{
struct fuse_conn *fc;
struct inode *root;
struct fuse_mount_data d;
struct file *file;
+ struct dentry *root_dentry;
int err;
if (!parse_fuse_opt((char *) data, &d))
if (fc->max_read / PAGE_CACHE_SIZE < fc->bdi.ra_pages)
fc->bdi.ra_pages = fc->max_read / PAGE_CACHE_SIZE;
+ /* Used by get_root_inode() */
+ sb->s_fs_info = fc;
+
err = -ENOMEM;
root = get_root_inode(sb, d.rootmode);
- if (root == NULL)
+ if (!root)
goto err;
- sb->s_root = d_alloc_root(root);
- if (!sb->s_root) {
+ root_dentry = d_alloc_root(root);
+ if (!root_dentry) {
iput(root);
goto err;
}
+
+ err = kobject_set_name(&fc->kobj, "%llu", conn_id());
+ if (err)
+ goto err_put_root;
+
+ err = kobject_add(&fc->kobj);
+ if (err)
+ goto err_put_root;
+
+ sb->s_root = root_dentry;
+ spin_lock(&fuse_lock);
+ fc->mounted = 1;
+ fc->connected = 1;
+ spin_unlock(&fuse_lock);
+
fuse_send_init(fc);
+
return 0;
+ err_put_root:
+ dput(root_dentry);
err:
- spin_lock(&fuse_lock);
- fuse_release_conn(fc);
- spin_unlock(&fuse_lock);
+ kobject_put(&fc->kobj);
return err;
}
.kill_sb = kill_anon_super,
};
+static ssize_t fuse_conn_waiting_show(struct fuse_conn *fc, char *page)
+{
+ return sprintf(page, "%i\n", atomic_read(&fc->num_waiting));
+}
+
+static ssize_t fuse_conn_abort_store(struct fuse_conn *fc, const char *page,
+ size_t count)
+{
+ fuse_abort_conn(fc);
+ return count;
+}
+
+static struct fuse_conn_attr fuse_conn_waiting =
+ __ATTR(waiting, 0400, fuse_conn_waiting_show, NULL);
+static struct fuse_conn_attr fuse_conn_abort =
+ __ATTR(abort, 0600, NULL, fuse_conn_abort_store);
+
+static struct attribute *fuse_conn_attrs[] = {
+ &fuse_conn_waiting.attr,
+ &fuse_conn_abort.attr,
+ NULL,
+};
+
+static ssize_t fuse_conn_attr_show(struct kobject *kobj,
+ struct attribute *attr,
+ char *page)
+{
+ struct fuse_conn_attr *fca =
+ container_of(attr, struct fuse_conn_attr, attr);
+
+ if (fca->show)
+ return fca->show(get_fuse_conn_kobj(kobj), page);
+ else
+ return -EACCES;
+}
+
+static ssize_t fuse_conn_attr_store(struct kobject *kobj,
+ struct attribute *attr,
+ const char *page, size_t count)
+{
+ struct fuse_conn_attr *fca =
+ container_of(attr, struct fuse_conn_attr, attr);
+
+ if (fca->store)
+ return fca->store(get_fuse_conn_kobj(kobj), page, count);
+ else
+ return -EACCES;
+}
+
+static struct sysfs_ops fuse_conn_sysfs_ops = {
+ .show = &fuse_conn_attr_show,
+ .store = &fuse_conn_attr_store,
+};
+
+static struct kobj_type ktype_fuse_conn = {
+ .release = fuse_conn_release,
+ .sysfs_ops = &fuse_conn_sysfs_ops,
+ .default_attrs = fuse_conn_attrs,
+};
+
+static decl_subsys(fuse, NULL, NULL);
+static decl_subsys(connections, &ktype_fuse_conn, NULL);
+
static void fuse_inode_init_once(void *foo, kmem_cache_t *cachep,
unsigned long flags)
{
kmem_cache_destroy(fuse_inode_cachep);
}
+static int fuse_sysfs_init(void)
+{
+ int err;
+
+ kset_set_kset_s(&fuse_subsys, fs_subsys);
+ err = subsystem_register(&fuse_subsys);
+ if (err)
+ goto out_err;
+
+ kset_set_kset_s(&connections_subsys, fuse_subsys);
+ err = subsystem_register(&connections_subsys);
+ if (err)
+ goto out_fuse_unregister;
+
+ return 0;
+
+ out_fuse_unregister:
+ subsystem_unregister(&fuse_subsys);
+ out_err:
+ return err;
+}
+
+static void fuse_sysfs_cleanup(void)
+{
+ subsystem_unregister(&connections_subsys);
+ subsystem_unregister(&fuse_subsys);
+}
+
static int __init fuse_init(void)
{
int res;
if (res)
goto err_fs_cleanup;
+ res = fuse_sysfs_init();
+ if (res)
+ goto err_dev_cleanup;
+
return 0;
+ err_dev_cleanup:
+ fuse_dev_cleanup();
err_fs_cleanup:
fuse_fs_cleanup();
err:
{
printk(KERN_DEBUG "fuse exit\n");
+ fuse_sysfs_cleanup();
fuse_fs_cleanup();
fuse_dev_cleanup();
}
else
e = rec - 1;
} while (b <= e);
- //printk("%d: %d,%d,%d\n", bnode->this, b, e, rec);
if (rec != e && e >= 0) {
len = hfs_brec_lenoff(bnode, e, &off);
keylen = hfs_brec_keylen(bnode, e);
return res;
invalid:
- printk("HFS: inconsistency in B*Tree (%d,%d,%d,%u,%u)\n",
+ printk(KERN_ERR "hfs: inconsistency in B*Tree (%d,%d,%d,%u,%u)\n",
height, bnode->height, bnode->type, nidx, parent);
res = -EIO;
release:
// move down?
if (!node->prev && !node->next) {
- printk("hfs_btree_del_level\n");
+ printk(KERN_DEBUG "hfs_btree_del_level\n");
}
if (!node->parent) {
tree->root = 0;
struct hfs_bnode *node;
if (cnid >= tree->node_count) {
- printk("HFS: request for non-existent node %d in B*Tree\n", cnid);
+ printk(KERN_ERR "hfs: request for non-existent node %d in B*Tree\n", cnid);
return NULL;
}
loff_t off;
if (cnid >= tree->node_count) {
- printk("HFS: request for non-existent node %d in B*Tree\n", cnid);
+ printk(KERN_ERR "hfs: request for non-existent node %d in B*Tree\n", cnid);
return NULL;
}
end_off = hfs_bnode_read_u16(parent, end_rec_off);
if (end_rec_off - end_off < diff) {
- printk("splitting index node...\n");
+ printk(KERN_DEBUG "hfs: splitting index node...\n");
fd->bnode = parent;
new_node = hfs_bnode_split(fd);
if (IS_ERR(new_node))
while ((node = tree->node_hash[i])) {
tree->node_hash[i] = node->next_hash;
if (atomic_read(&node->refcnt))
- printk("HFS: node %d:%d still has %d user(s)!\n",
+ printk(KERN_ERR "hfs: node %d:%d still has %d user(s)!\n",
node->tree->cnid, node->this, atomic_read(&node->refcnt));
hfs_bnode_free(node);
tree->node_hash_cnt--;
kunmap(*pagep);
nidx = node->next;
if (!nidx) {
- printk("create new bmap node...\n");
+ printk(KERN_DEBUG "hfs: create new bmap node...\n");
next_node = hfs_bmap_new_bmap(node, idx);
} else
next_node = hfs_bnode_find(tree, nidx);
hfs_bnode_put(node);
if (!i) {
/* panic */;
- printk("HFS: unable to free bnode %u. bmap not found!\n", node->this);
+ printk(KERN_CRIT "hfs: unable to free bnode %u. bmap not found!\n", node->this);
return;
}
node = hfs_bnode_find(tree, i);
return;
if (node->type != HFS_NODE_MAP) {
/* panic */;
- printk("HFS: invalid bmap found! (%u,%d)\n", node->this, node->type);
+ printk(KERN_CRIT "hfs: invalid bmap found! (%u,%d)\n", node->this, node->type);
hfs_bnode_put(node);
return;
}
m = 1 << (~nidx & 7);
byte = data[off];
if (!(byte & m)) {
- printk("HFS: trying to free free bnode %u(%d)\n", node->this, node->type);
+ printk(KERN_CRIT "hfs: trying to free free bnode %u(%d)\n", node->this, node->type);
kunmap(page);
hfs_bnode_put(node);
return;
type = rec.type;
if (type != HFS_CDR_THD && type != HFS_CDR_FTH) {
- printk("HFS-fs: Found bad thread record in catalog\n");
+ printk(KERN_ERR "hfs: found bad thread record in catalog\n");
return -EIO;
}
case 1:
hfs_bnode_read(fd.bnode, &entry, fd.entryoffset, fd.entrylength);
if (entry.type != HFS_CDR_THD) {
- printk("HFS: bad catalog folder thread\n");
+ printk(KERN_ERR "hfs: bad catalog folder thread\n");
err = -EIO;
goto out;
}
//if (fd.entrylength < HFS_MIN_THREAD_SZ) {
- // printk("HFS: truncated catalog thread\n");
+ // printk(KERN_ERR "hfs: truncated catalog thread\n");
// err = -EIO;
// goto out;
//}
for (;;) {
if (be32_to_cpu(fd.key->cat.ParID) != inode->i_ino) {
- printk("HFS: walked past end of dir\n");
+ printk(KERN_ERR "hfs: walked past end of dir\n");
err = -EIO;
goto out;
}
len = hfs_mac2asc(sb, strbuf, &fd.key->cat.CName);
if (type == HFS_CDR_DIR) {
if (fd.entrylength < sizeof(struct hfs_cat_dir)) {
- printk("HFS: small dir entry\n");
+ printk(KERN_ERR "hfs: small dir entry\n");
err = -EIO;
goto out;
}
break;
} else if (type == HFS_CDR_FIL) {
if (fd.entrylength < sizeof(struct hfs_cat_file)) {
- printk("HFS: small file entry\n");
+ printk(KERN_ERR "hfs: small file entry\n");
err = -EIO;
goto out;
}
be32_to_cpu(entry.file.FlNum), DT_REG))
break;
} else {
- printk("HFS: bad catalog entry type %d\n", type);
+ printk(KERN_ERR "hfs: bad catalog entry type %d\n", type);
err = -EIO;
goto out;
}
#define dprint(flg, fmt, args...) \
if (flg & DBG_MASK) printk(fmt , ## args)
-#define hfs_warn(format, args...) printk(KERN_WARNING format , ## args)
-#define hfs_error(format, args...) printk(KERN_ERR format , ## args)
-
/*
* struct hfs_inode_info
*
} while (--i && nidx < tree->node_count);
spin_unlock(&tree->hash_lock);
}
- //printk("releasepage: %lu,%x = %d\n", page->index, mask, res);
return res ? try_to_free_buffers(page) : 0;
}
*start = (sector_t)te.cdte_addr.lba << 2;
return 0;
}
- printk(KERN_ERR "HFS: Invalid session number or type of track\n");
+ printk(KERN_ERR "hfs: invalid session number or type of track\n");
return -EINVAL;
}
ms_info.addr_format = CDROM_LBA;
HFS_SB(sb)->alloc_blksz = size = be32_to_cpu(mdb->drAlBlkSiz);
if (!size || (size & (HFS_SECTOR_SIZE - 1))) {
- hfs_warn("hfs_fs: bad allocation block size %d\n", size);
+ printk(KERN_ERR "hfs: bad allocation block size %d\n", size);
goto out_bh;
}
size >>= 1;
brelse(bh);
if (!sb_set_blocksize(sb, size)) {
- printk("hfs_fs: unable to set blocksize to %u\n", size);
+ printk(KERN_ERR "hfs: unable to set blocksize to %u\n", size);
goto out;
}
}
if (!HFS_SB(sb)->alt_mdb) {
- hfs_warn("hfs_fs: unable to locate alternate MDB\n");
- hfs_warn("hfs_fs: continuing without an alternate MDB\n");
+ printk(KERN_WARNING "hfs: unable to locate alternate MDB\n");
+ printk(KERN_WARNING "hfs: continuing without an alternate MDB\n");
}
HFS_SB(sb)->bitmap = (__be32 *)__get_free_pages(GFP_KERNEL, PAGE_SIZE < 8192 ? 1 : 0);
while (size) {
bh = sb_bread(sb, off >> sb->s_blocksize_bits);
if (!bh) {
- hfs_warn("hfs_fs: unable to read volume bitmap\n");
+ printk(KERN_ERR "hfs: unable to read volume bitmap\n");
goto out;
}
off2 = off & (sb->s_blocksize - 1);
HFS_SB(sb)->ext_tree = hfs_btree_open(sb, HFS_EXT_CNID, hfs_ext_keycmp);
if (!HFS_SB(sb)->ext_tree) {
- hfs_warn("hfs_fs: unable to open extent tree\n");
+ printk(KERN_ERR "hfs: unable to open extent tree\n");
goto out;
}
HFS_SB(sb)->cat_tree = hfs_btree_open(sb, HFS_CAT_CNID, hfs_cat_keycmp);
if (!HFS_SB(sb)->cat_tree) {
- hfs_warn("hfs_fs: unable to open catalog tree\n");
+ printk(KERN_ERR "hfs: unable to open catalog tree\n");
goto out;
}
attrib = mdb->drAtrb;
if (!(attrib & cpu_to_be16(HFS_SB_ATTRIB_UNMNT))) {
- hfs_warn("HFS-fs warning: Filesystem was not cleanly unmounted, "
+ printk(KERN_WARNING "hfs: filesystem was not cleanly unmounted, "
"running fsck.hfs is recommended. mounting read-only.\n");
sb->s_flags |= MS_RDONLY;
}
if ((attrib & cpu_to_be16(HFS_SB_ATTRIB_SLOCK))) {
- hfs_warn("HFS-fs: Filesystem is marked locked, mounting read-only.\n");
+ printk(KERN_WARNING "hfs: filesystem is marked locked, mounting read-only.\n");
sb->s_flags |= MS_RDONLY;
}
if (!(sb->s_flags & MS_RDONLY)) {
while (size) {
bh = sb_bread(sb, block);
if (!bh) {
- hfs_warn("hfs_fs: unable to read volume bitmap\n");
+ printk(KERN_ERR "hfs: unable to read volume bitmap\n");
break;
}
len = min((int)sb->s_blocksize - off, size);
return 0;
if (!(*flags & MS_RDONLY)) {
if (!(HFS_SB(sb)->mdb->drAtrb & cpu_to_be16(HFS_SB_ATTRIB_UNMNT))) {
- printk("HFS-fs warning: Filesystem was not cleanly unmounted, "
+ printk(KERN_WARNING "hfs: filesystem was not cleanly unmounted, "
"running fsck.hfs is recommended. leaving read-only.\n");
sb->s_flags |= MS_RDONLY;
*flags |= MS_RDONLY;
} else if (HFS_SB(sb)->mdb->drAtrb & cpu_to_be16(HFS_SB_ATTRIB_SLOCK)) {
- printk("HFS-fs: Filesystem is marked locked, leaving read-only.\n");
+ printk(KERN_WARNING "hfs: filesystem is marked locked, leaving read-only.\n");
sb->s_flags |= MS_RDONLY;
*flags |= MS_RDONLY;
}
switch (token) {
case opt_uid:
if (match_int(&args[0], &tmp)) {
- printk("HFS: uid requires an argument\n");
+ printk(KERN_ERR "hfs: uid requires an argument\n");
return 0;
}
hsb->s_uid = (uid_t)tmp;
break;
case opt_gid:
if (match_int(&args[0], &tmp)) {
- printk("HFS: gid requires an argument\n");
+ printk(KERN_ERR "hfs: gid requires an argument\n");
return 0;
}
hsb->s_gid = (gid_t)tmp;
break;
case opt_umask:
if (match_octal(&args[0], &tmp)) {
- printk("HFS: umask requires a value\n");
+ printk(KERN_ERR "hfs: umask requires a value\n");
return 0;
}
hsb->s_file_umask = (umode_t)tmp;
break;
case opt_file_umask:
if (match_octal(&args[0], &tmp)) {
- printk("HFS: file_umask requires a value\n");
+ printk(KERN_ERR "hfs: file_umask requires a value\n");
return 0;
}
hsb->s_file_umask = (umode_t)tmp;
break;
case opt_dir_umask:
if (match_octal(&args[0], &tmp)) {
- printk("HFS: dir_umask requires a value\n");
+ printk(KERN_ERR "hfs: dir_umask requires a value\n");
return 0;
}
hsb->s_dir_umask = (umode_t)tmp;
break;
case opt_part:
if (match_int(&args[0], &hsb->part)) {
- printk("HFS: part requires an argument\n");
+ printk(KERN_ERR "hfs: part requires an argument\n");
return 0;
}
break;
case opt_session:
if (match_int(&args[0], &hsb->session)) {
- printk("HFS: session requires an argument\n");
+ printk(KERN_ERR "hfs: session requires an argument\n");
return 0;
}
break;
case opt_type:
if (match_fourchar(&args[0], &hsb->s_type)) {
- printk("HFS+-fs: type requires a 4 character value\n");
+ printk(KERN_ERR "hfs: type requires a 4 character value\n");
return 0;
}
break;
case opt_creator:
if (match_fourchar(&args[0], &hsb->s_creator)) {
- printk("HFS+-fs: creator requires a 4 character value\n");
+ printk(KERN_ERR "hfs: creator requires a 4 character value\n");
return 0;
}
break;
break;
case opt_codepage:
if (hsb->nls_disk) {
- printk("HFS+-fs: unable to change codepage\n");
+ printk(KERN_ERR "hfs: unable to change codepage\n");
return 0;
}
p = match_strdup(&args[0]);
hsb->nls_disk = load_nls(p);
if (!hsb->nls_disk) {
- printk("HFS+-fs: unable to load codepage \"%s\"\n", p);
+ printk(KERN_ERR "hfs: unable to load codepage \"%s\"\n", p);
kfree(p);
return 0;
}
break;
case opt_iocharset:
if (hsb->nls_io) {
- printk("HFS: unable to change iocharset\n");
+ printk(KERN_ERR "hfs: unable to change iocharset\n");
return 0;
}
p = match_strdup(&args[0]);
hsb->nls_io = load_nls(p);
if (!hsb->nls_io) {
- printk("HFS: unable to load iocharset \"%s\"\n", p);
+ printk(KERN_ERR "hfs: unable to load iocharset \"%s\"\n", p);
kfree(p);
return 0;
}
if (hsb->nls_disk && !hsb->nls_io) {
hsb->nls_io = load_nls_default();
if (!hsb->nls_io) {
- printk("HFS: unable to load default iocharset\n");
+ printk(KERN_ERR "hfs: unable to load default iocharset\n");
return 0;
}
}
res = -EINVAL;
if (!parse_options((char *)data, sbi)) {
- hfs_warn("hfs_fs: unable to parse mount options.\n");
+ printk(KERN_ERR "hfs: unable to parse mount options.\n");
goto bail;
}
res = hfs_mdb_get(sb);
if (res) {
if (!silent)
- hfs_warn("VFS: Can't find a HFS filesystem on dev %s.\n",
+ printk(KERN_WARNING "hfs: can't find a HFS filesystem on dev %s.\n",
hfs_mdb_name(sb));
res = -EINVAL;
goto bail;
bail_iput:
iput(root_inode);
bail_no_root:
- hfs_warn("hfs_fs: get root inode failed.\n");
+ printk(KERN_ERR "hfs: get root inode failed.\n");
bail:
hfs_mdb_put(sb);
return res;
{
unregister_filesystem(&hfs_fs_type);
if (kmem_cache_destroy(hfs_inode_cachep))
- printk(KERN_INFO "hfs_inode_cache: not all structures were freed\n");
+ printk(KERN_ERR "hfs_inode_cache: not all structures were freed\n");
}
module_init(init_hfs_fs)
else
e = rec - 1;
} while (b <= e);
- //printk("%d: %d,%d,%d\n", bnode->this, b, e, rec);
if (rec != e && e >= 0) {
len = hfs_brec_lenoff(bnode, e, &off);
keylen = hfs_brec_keylen(bnode, e);
return res;
invalid:
- printk("HFS+-fs: inconsistency in B*Tree (%d,%d,%d,%u,%u)\n",
+ printk(KERN_ERR "hfs: inconsistency in B*Tree (%d,%d,%d,%u,%u)\n",
height, bnode->height, bnode->type, nidx, parent);
res = -EIO;
release:
// move down?
if (!node->prev && !node->next) {
- printk("hfs_btree_del_level\n");
+ printk(KERN_DEBUG "hfs_btree_del_level\n");
}
if (!node->parent) {
tree->root = 0;
struct hfs_bnode *node;
if (cnid >= tree->node_count) {
- printk("HFS+-fs: request for non-existent node %d in B*Tree\n", cnid);
+ printk(KERN_ERR "hfs: request for non-existent node %d in B*Tree\n", cnid);
return NULL;
}
loff_t off;
if (cnid >= tree->node_count) {
- printk("HFS+-fs: request for non-existent node %d in B*Tree\n", cnid);
+ printk(KERN_ERR "hfs: request for non-existent node %d in B*Tree\n", cnid);
return NULL;
}
node = hfs_bnode_findhash(tree, num);
spin_unlock(&tree->hash_lock);
if (node) {
- printk("new node %u already hashed?\n", num);
- BUG();
+ printk(KERN_CRIT "new node %u already hashed?\n", num);
+ WARN_ON(1);
+ return node;
}
node = __hfs_bnode_create(tree, num);
if (!node)
end_off = hfs_bnode_read_u16(parent, end_rec_off);
if (end_rec_off - end_off < diff) {
- printk("splitting index node...\n");
+ printk(KERN_DEBUG "hfs: splitting index node...\n");
fd->bnode = parent;
new_node = hfs_bnode_split(fd);
if (IS_ERR(new_node))
init_MUTEX(&tree->tree_lock);
spin_lock_init(&tree->hash_lock);
- /* Set the correct compare function */
tree->sb = sb;
tree->cnid = id;
- if (id == HFSPLUS_EXT_CNID) {
- tree->keycmp = hfsplus_ext_cmp_key;
- } else if (id == HFSPLUS_CAT_CNID) {
- tree->keycmp = hfsplus_cat_cmp_key;
- } else {
- printk("HFS+-fs: unknown B*Tree requested\n");
- goto free_tree;
- }
tree->inode = iget(sb, id);
if (!tree->inode)
goto free_tree;
tree->max_key_len = be16_to_cpu(head->max_key_len);
tree->depth = be16_to_cpu(head->depth);
+ /* Set the correct compare function */
+ if (id == HFSPLUS_EXT_CNID) {
+ tree->keycmp = hfsplus_ext_cmp_key;
+ } else if (id == HFSPLUS_CAT_CNID) {
+ if ((HFSPLUS_SB(sb).flags & HFSPLUS_SB_HFSX) &&
+ (head->key_type == HFSPLUS_KEY_BINARY))
+ tree->keycmp = hfsplus_cat_bin_cmp_key;
+ else
+ tree->keycmp = hfsplus_cat_case_cmp_key;
+ } else {
+ printk(KERN_ERR "hfs: unknown B*Tree requested\n");
+ goto fail_page;
+ }
+
size = tree->node_size;
if (!size || size & (size - 1))
goto fail_page;
while ((node = tree->node_hash[i])) {
tree->node_hash[i] = node->next_hash;
if (atomic_read(&node->refcnt))
- printk("HFS+: node %d:%d still has %d user(s)!\n",
+ printk(KERN_CRIT "hfs: node %d:%d still has %d user(s)!\n",
node->tree->cnid, node->this, atomic_read(&node->refcnt));
hfs_bnode_free(node);
tree->node_hash_cnt--;
tree->free_nodes--;
mark_inode_dirty(tree->inode);
hfs_bnode_put(node);
- if (!idx) {
- printk("unexpected idx %u (%u)\n", idx, node->this);
- BUG();
- }
return hfs_bnode_create(tree, idx);
}
}
kunmap(*pagep);
nidx = node->next;
if (!nidx) {
- printk("create new bmap node...\n");
+ printk(KERN_DEBUG "hfs: create new bmap node...\n");
next_node = hfs_bmap_new_bmap(node, idx);
} else
next_node = hfs_bnode_find(tree, nidx);
hfs_bnode_put(node);
if (!i) {
/* panic */;
- printk("HFS: unable to free bnode %u. bmap not found!\n", node->this);
+ printk(KERN_CRIT "hfs: unable to free bnode %u. bmap not found!\n", node->this);
return;
}
node = hfs_bnode_find(tree, i);
return;
if (node->type != HFS_NODE_MAP) {
/* panic */;
- printk("HFS: invalid bmap found! (%u,%d)\n", node->this, node->type);
+ printk(KERN_CRIT "hfs: invalid bmap found! (%u,%d)\n", node->this, node->type);
hfs_bnode_put(node);
return;
}
m = 1 << (~nidx & 7);
byte = data[off];
if (!(byte & m)) {
- printk("HFS: trying to free free bnode %u(%d)\n", node->this, node->type);
+ printk(KERN_CRIT "hfs: trying to free free bnode %u(%d)\n", node->this, node->type);
kunmap(page);
hfs_bnode_put(node);
return;
#include "hfsplus_fs.h"
#include "hfsplus_raw.h"
-int hfsplus_cat_cmp_key(hfsplus_btree_key *k1, hfsplus_btree_key *k2)
+int hfsplus_cat_case_cmp_key(const hfsplus_btree_key *k1,
+ const hfsplus_btree_key *k2)
{
__be32 k1p, k2p;
if (k1p != k2p)
return be32_to_cpu(k1p) < be32_to_cpu(k2p) ? -1 : 1;
- return hfsplus_unistrcmp(&k1->cat.name, &k2->cat.name);
+ return hfsplus_strcasecmp(&k1->cat.name, &k2->cat.name);
+}
+
+int hfsplus_cat_bin_cmp_key(const hfsplus_btree_key *k1,
+ const hfsplus_btree_key *k2)
+{
+ __be32 k1p, k2p;
+
+ k1p = k1->cat.parent;
+ k2p = k2->cat.parent;
+ if (k1p != k2p)
+ return be32_to_cpu(k1p) < be32_to_cpu(k2p) ? -1 : 1;
+
+ return hfsplus_strcmp(&k1->cat.name, &k2->cat.name);
}
void hfsplus_cat_build_key(struct super_block *sb, hfsplus_btree_key *key,
memset(folder, 0, sizeof(*folder));
folder->type = cpu_to_be16(HFSPLUS_FOLDER);
folder->id = cpu_to_be32(inode->i_ino);
- folder->create_date = folder->content_mod_date =
- folder->attribute_mod_date = folder->access_date = hfsp_now2mt();
+ HFSPLUS_I(inode).create_date =
+ folder->create_date =
+ folder->content_mod_date =
+ folder->attribute_mod_date =
+ folder->access_date = hfsp_now2mt();
hfsplus_set_perms(inode, &folder->permissions);
if (inode == HFSPLUS_SB(inode->i_sb).hidden_dir)
/* invisible and namelocked */
file->type = cpu_to_be16(HFSPLUS_FILE);
file->flags = cpu_to_be16(HFSPLUS_FILE_THREAD_EXISTS);
file->id = cpu_to_be32(cnid);
- file->create_date = file->content_mod_date =
- file->attribute_mod_date = file->access_date = hfsp_now2mt();
+ HFSPLUS_I(inode).create_date =
+ file->create_date =
+ file->content_mod_date =
+ file->attribute_mod_date =
+ file->access_date = hfsp_now2mt();
if (cnid == inode->i_ino) {
hfsplus_set_perms(inode, &file->permissions);
- file->user_info.fdType = cpu_to_be32(HFSPLUS_SB(inode->i_sb).type);
- file->user_info.fdCreator = cpu_to_be32(HFSPLUS_SB(inode->i_sb).creator);
+ if (S_ISLNK(inode->i_mode)) {
+ file->user_info.fdType = cpu_to_be32(HFSP_SYMLINK_TYPE);
+ file->user_info.fdCreator = cpu_to_be32(HFSP_SYMLINK_CREATOR);
+ } else {
+ file->user_info.fdType = cpu_to_be32(HFSPLUS_SB(inode->i_sb).type);
+ file->user_info.fdCreator = cpu_to_be32(HFSPLUS_SB(inode->i_sb).creator);
+ }
if ((file->permissions.rootflags | file->permissions.userflags) & HFSPLUS_FLG_IMMUTABLE)
file->flags |= cpu_to_be16(HFSPLUS_FILE_LOCKED);
} else {
file->user_info.fdType = cpu_to_be32(HFSP_HARDLINK_TYPE);
file->user_info.fdCreator = cpu_to_be32(HFSP_HFSPLUS_CREATOR);
file->user_info.fdFlags = cpu_to_be16(0x100);
+ file->create_date = HFSPLUS_I(HFSPLUS_SB(inode->i_sb).hidden_dir).create_date;
file->permissions.dev = cpu_to_be32(HFSPLUS_I(inode).dev);
}
return sizeof(*file);
type = be16_to_cpu(tmp.type);
if (type != HFSPLUS_FOLDER_THREAD && type != HFSPLUS_FILE_THREAD) {
- printk("HFS+-fs: Found bad thread record in catalog\n");
+ printk(KERN_ERR "hfs: found bad thread record in catalog\n");
return -EIO;
}
}
cnid = be32_to_cpu(entry.file.id);
if (entry.file.user_info.fdType == cpu_to_be32(HFSP_HARDLINK_TYPE) &&
- entry.file.user_info.fdCreator == cpu_to_be32(HFSP_HFSPLUS_CREATOR)) {
+ entry.file.user_info.fdCreator == cpu_to_be32(HFSP_HFSPLUS_CREATOR) &&
+ (entry.file.create_date == HFSPLUS_I(HFSPLUS_SB(sb).hidden_dir).create_date ||
+ entry.file.create_date == HFSPLUS_I(sb->s_root->d_inode).create_date) &&
+ HFSPLUS_SB(sb).hidden_dir) {
struct qstr str;
char name[32];
if (dentry->d_fsdata) {
- err = -ENOENT;
- inode = NULL;
- goto out;
+ /*
+ * We found a link pointing to another link,
+ * so ignore it and treat it as regular file.
+ */
+ cnid = (unsigned long)dentry->d_fsdata;
+ linkid = 0;
+ } else {
+ dentry->d_fsdata = (void *)(unsigned long)cnid;
+ linkid = be32_to_cpu(entry.file.permissions.dev);
+ str.len = sprintf(name, "iNode%d", linkid);
+ str.name = name;
+ hfsplus_cat_build_key(sb, fd.search_key, HFSPLUS_SB(sb).hidden_dir->i_ino, &str);
+ goto again;
}
- dentry->d_fsdata = (void *)(unsigned long)cnid;
- linkid = be32_to_cpu(entry.file.permissions.dev);
- str.len = sprintf(name, "iNode%d", linkid);
- str.name = name;
- hfsplus_cat_build_key(sb, fd.search_key, HFSPLUS_SB(sb).hidden_dir->i_ino, &str);
- goto again;
} else if (!dentry->d_fsdata)
dentry->d_fsdata = (void *)(unsigned long)cnid;
} else {
- printk("HFS+-fs: Illegal catalog entry type in lookup\n");
+ printk(KERN_ERR "hfs: invalid catalog entry type in lookup\n");
err = -EIO;
goto fail;
}
case 1:
hfs_bnode_read(fd.bnode, &entry, fd.entryoffset, fd.entrylength);
if (be16_to_cpu(entry.type) != HFSPLUS_FOLDER_THREAD) {
- printk("HFS+-fs: bad catalog folder thread\n");
+ printk(KERN_ERR "hfs: bad catalog folder thread\n");
err = -EIO;
goto out;
}
if (fd.entrylength < HFSPLUS_MIN_THREAD_SZ) {
- printk("HFS+-fs: truncated catalog thread\n");
+ printk(KERN_ERR "hfs: truncated catalog thread\n");
err = -EIO;
goto out;
}
for (;;) {
if (be32_to_cpu(fd.key->cat.parent) != inode->i_ino) {
- printk("HFS+-fs: walked past end of dir\n");
+ printk(KERN_ERR "hfs: walked past end of dir\n");
err = -EIO;
goto out;
}
goto out;
if (type == HFSPLUS_FOLDER) {
if (fd.entrylength < sizeof(struct hfsplus_cat_folder)) {
- printk("HFS+-fs: small dir entry\n");
+ printk(KERN_ERR "hfs: small dir entry\n");
err = -EIO;
goto out;
}
break;
} else if (type == HFSPLUS_FILE) {
if (fd.entrylength < sizeof(struct hfsplus_cat_file)) {
- printk("HFS+-fs: small file entry\n");
+ printk(KERN_ERR "hfs: small file entry\n");
err = -EIO;
goto out;
}
be32_to_cpu(entry.file.id), DT_REG))
break;
} else {
- printk("HFS+-fs: bad catalog entry type\n");
+ printk(KERN_ERR "hfs: bad catalog entry type\n");
err = -EIO;
goto out;
}
if (res)
return res;
- inode->i_nlink--;
+ if (inode->i_nlink > 0)
+ inode->i_nlink--;
hfsplus_delete_inode(inode);
if (inode->i_ino != cnid && !inode->i_nlink) {
if (!atomic_read(&HFSPLUS_I(inode).opencnt)) {
hfsplus_delete_inode(inode);
} else
inode->i_flags |= S_DEAD;
- }
+ } else
+ inode->i_nlink = 0;
inode->i_ctime = CURRENT_TIME_SEC;
mark_inode_dirty(inode);
#include "hfsplus_raw.h"
/* Compare two extents keys, returns 0 on same, pos/neg for difference */
-int hfsplus_ext_cmp_key(hfsplus_btree_key *k1, hfsplus_btree_key *k2)
+int hfsplus_ext_cmp_key(const hfsplus_btree_key *k1,
+ const hfsplus_btree_key *k2)
{
__be32 k1id, k2id;
__be32 k1s, k2s;
if (HFSPLUS_SB(sb).alloc_file->i_size * 8 < HFSPLUS_SB(sb).total_blocks - HFSPLUS_SB(sb).free_blocks + 8) {
// extend alloc file
- printk("extend alloc file! (%Lu,%u,%u)\n", HFSPLUS_SB(sb).alloc_file->i_size * 8,
+ printk(KERN_ERR "hfs: extend alloc file! (%Lu,%u,%u)\n", HFSPLUS_SB(sb).alloc_file->i_size * 8,
HFSPLUS_SB(sb).total_blocks, HFSPLUS_SB(sb).free_blocks);
return -ENOSPC;
- //BUG();
}
down(&HFSPLUS_I(inode).extents_lock);
#define HFSPLUS_TYPE_DATA 0x00
#define HFSPLUS_TYPE_RSRC 0xFF
-typedef int (*btree_keycmp)(hfsplus_btree_key *, hfsplus_btree_key *);
+typedef int (*btree_keycmp)(const hfsplus_btree_key *, const hfsplus_btree_key *);
#define NODE_HASH_SIZE 256
#define HFSPLUS_SB_WRITEBACKUP 0x0001
#define HFSPLUS_SB_NODECOMPOSE 0x0002
#define HFSPLUS_SB_FORCE 0x0004
+#define HFSPLUS_SB_HFSX 0x0008
struct hfsplus_inode_info {
struct inode *rsrc_inode;
unsigned long flags;
+ __be32 create_date;
/* Device number in hfsplus_permissions in catalog */
u32 dev;
/* BSD system and user file flags */
int hfs_brec_goto(struct hfs_find_data *, int);
/* catalog.c */
-int hfsplus_cat_cmp_key(hfsplus_btree_key *, hfsplus_btree_key *);
+int hfsplus_cat_case_cmp_key(const hfsplus_btree_key *, const hfsplus_btree_key *);
+int hfsplus_cat_bin_cmp_key(const hfsplus_btree_key *, const hfsplus_btree_key *);
void hfsplus_cat_build_key(struct super_block *sb, hfsplus_btree_key *, u32, struct qstr *);
int hfsplus_find_cat(struct super_block *, u32, struct hfs_find_data *);
int hfsplus_create_cat(u32, struct inode *, struct qstr *, struct inode *);
struct inode *, struct qstr *);
/* extents.c */
-int hfsplus_ext_cmp_key(hfsplus_btree_key *, hfsplus_btree_key *);
+int hfsplus_ext_cmp_key(const hfsplus_btree_key *, const hfsplus_btree_key *);
void hfsplus_ext_write_extent(struct inode *);
int hfsplus_get_block(struct inode *, sector_t, struct buffer_head *, int);
int hfsplus_free_fork(struct super_block *, u32, struct hfsplus_fork_raw *, int);
extern u16 hfsplus_compose_table[];
/* unicode.c */
-int hfsplus_unistrcmp(const struct hfsplus_unistr *, const struct hfsplus_unistr *);
+int hfsplus_strcasecmp(const struct hfsplus_unistr *, const struct hfsplus_unistr *);
+int hfsplus_strcmp(const struct hfsplus_unistr *, const struct hfsplus_unistr *);
int hfsplus_uni2asc(struct super_block *, const struct hfsplus_unistr *, char *, int *);
int hfsplus_asc2uni(struct super_block *, struct hfsplus_unistr *, const char *, int);
#define HFSPLUS_SECTOR_SHIFT 9
#define HFSPLUS_VOLHEAD_SECTOR 2
#define HFSPLUS_VOLHEAD_SIG 0x482b
+#define HFSPLUS_VOLHEAD_SIGX 0x4858
#define HFSPLUS_SUPER_MAGIC 0x482b
-#define HFSPLUS_CURRENT_VERSION 4
+#define HFSPLUS_MIN_VERSION 4
+#define HFSPLUS_CURRENT_VERSION 5
#define HFSP_WRAP_MAGIC 0x4244
#define HFSP_WRAP_ATTRIB_SLOCK 0x8000
#define HFSP_HARDLINK_TYPE 0x686c6e6b /* 'hlnk' */
#define HFSP_HFSPLUS_CREATOR 0x6866732b /* 'hfs+' */
+#define HFSP_SYMLINK_TYPE 0x736c6e6b /* 'slnk' */
+#define HFSP_SYMLINK_CREATOR 0x72686170 /* 'rhap' */
+
#define HFSP_MOUNT_VERSION 0x482b4c78 /* 'H+Lx' */
/* Structures used on disk */
u16 reserved1;
__be32 clump_size;
u8 btree_type;
- u8 reserved2;
+ u8 key_type;
__be32 attributes;
u32 reserved3[16];
} __packed;
#define HFSPLUS_EXCH_CNID 15 /* ExchangeFiles temp id */
#define HFSPLUS_FIRSTUSER_CNID 16 /* first available user id */
+/* btree key type */
+#define HFSPLUS_KEY_CASEFOLDING 0xCF /* case-insensitive */
+#define HFSPLUS_KEY_BINARY 0xBC /* case-sensitive */
+
/* HFS+ catalog entry key */
struct hfsplus_cat_key {
__be16 key_len;
static int hfsplus_readpage(struct file *file, struct page *page)
{
- //printk("readpage: %lu\n", page->index);
return block_read_full_page(page, hfsplus_get_block);
}
static int hfsplus_writepage(struct page *page, struct writeback_control *wbc)
{
- //printk("writepage: %lu\n", page->index);
return block_write_full_page(page, hfsplus_get_block, wbc);
}
} while (--i && nidx < tree->node_count);
spin_unlock(&tree->hash_lock);
}
- //printk("releasepage: %lu,%x = %d\n", page->index, mask, res);
return res ? try_to_free_buffers(page) : 0;
}
inode->i_size = 2 + be32_to_cpu(folder->valence);
inode->i_atime = hfsp_mt2ut(folder->access_date);
inode->i_mtime = hfsp_mt2ut(folder->content_mod_date);
- inode->i_ctime = inode->i_mtime;
+ inode->i_ctime = hfsp_mt2ut(folder->attribute_mod_date);
+ HFSPLUS_I(inode).create_date = folder->create_date;
HFSPLUS_I(inode).fs_blocks = 0;
inode->i_op = &hfsplus_dir_inode_operations;
inode->i_fop = &hfsplus_dir_operations;
}
inode->i_atime = hfsp_mt2ut(file->access_date);
inode->i_mtime = hfsp_mt2ut(file->content_mod_date);
- inode->i_ctime = inode->i_mtime;
+ inode->i_ctime = hfsp_mt2ut(file->attribute_mod_date);
+ HFSPLUS_I(inode).create_date = file->create_date;
} else {
- printk("HFS+-fs: bad catalog entry used to create inode\n");
+ printk(KERN_ERR "hfs: bad catalog entry used to create inode\n");
res = -EIO;
}
return res;
switch (token) {
case opt_creator:
if (match_fourchar(&args[0], &sbi->creator)) {
- printk("HFS+-fs: creator requires a 4 character value\n");
+ printk(KERN_ERR "hfs: creator requires a 4 character value\n");
return 0;
}
break;
case opt_type:
if (match_fourchar(&args[0], &sbi->type)) {
- printk("HFS+-fs: type requires a 4 character value\n");
+ printk(KERN_ERR "hfs: type requires a 4 character value\n");
return 0;
}
break;
case opt_umask:
if (match_octal(&args[0], &tmp)) {
- printk("HFS+-fs: umask requires a value\n");
+ printk(KERN_ERR "hfs: umask requires a value\n");
return 0;
}
sbi->umask = (umode_t)tmp;
break;
case opt_uid:
if (match_int(&args[0], &tmp)) {
- printk("HFS+-fs: uid requires an argument\n");
+ printk(KERN_ERR "hfs: uid requires an argument\n");
return 0;
}
sbi->uid = (uid_t)tmp;
break;
case opt_gid:
if (match_int(&args[0], &tmp)) {
- printk("HFS+-fs: gid requires an argument\n");
+ printk(KERN_ERR "hfs: gid requires an argument\n");
return 0;
}
sbi->gid = (gid_t)tmp;
break;
case opt_part:
if (match_int(&args[0], &sbi->part)) {
- printk("HFS+-fs: part requires an argument\n");
+ printk(KERN_ERR "hfs: part requires an argument\n");
return 0;
}
break;
case opt_session:
if (match_int(&args[0], &sbi->session)) {
- printk("HFS+-fs: session requires an argument\n");
+ printk(KERN_ERR "hfs: session requires an argument\n");
return 0;
}
break;
case opt_nls:
if (sbi->nls) {
- printk("HFS+-fs: unable to change nls mapping\n");
+ printk(KERN_ERR "hfs: unable to change nls mapping\n");
return 0;
}
p = match_strdup(&args[0]);
sbi->nls = load_nls(p);
if (!sbi->nls) {
- printk("HFS+-fs: unable to load nls mapping \"%s\"\n", p);
+ printk(KERN_ERR "hfs: unable to load nls mapping \"%s\"\n", p);
kfree(p);
return 0;
}
block = HFSPLUS_SB(sb).blockoffset;
block += (HFSPLUS_SB(sb).sect_count - 2) >> (sb->s_blocksize_bits - 9);
offset = ((HFSPLUS_SB(sb).sect_count - 2) << 9) & (sb->s_blocksize - 1);
- printk("backup: %u,%u,%u,%u\n", HFSPLUS_SB(sb).blockoffset,
+ printk(KERN_DEBUG "hfs: backup: %u,%u,%u,%u\n", HFSPLUS_SB(sb).blockoffset,
HFSPLUS_SB(sb).sect_count, block, offset);
bh = sb_bread(sb, block);
if (bh) {
mark_buffer_dirty(bh);
brelse(bh);
} else
- printk("backup not found!\n");
+ printk(KERN_WARNING "hfs: backup not found!\n");
}
}
HFSPLUS_SB(sb).flags &= ~HFSPLUS_SB_WRITEBACKUP;
return -EINVAL;
if (!(vhdr->attributes & cpu_to_be32(HFSPLUS_VOL_UNMNT))) {
- printk("HFS+-fs warning: Filesystem was not cleanly unmounted, "
+ printk(KERN_WARNING "hfs: filesystem was not cleanly unmounted, "
"running fsck.hfsplus is recommended. leaving read-only.\n");
sb->s_flags |= MS_RDONLY;
*flags |= MS_RDONLY;
} else if (sbi.flags & HFSPLUS_SB_FORCE) {
/* nothing */
} else if (vhdr->attributes & cpu_to_be32(HFSPLUS_VOL_SOFTLOCK)) {
- printk("HFS+-fs: Filesystem is marked locked, leaving read-only.\n");
+ printk(KERN_WARNING "hfs: filesystem is marked locked, leaving read-only.\n");
sb->s_flags |= MS_RDONLY;
*flags |= MS_RDONLY;
} else if (vhdr->attributes & cpu_to_be32(HFSPLUS_VOL_JOURNALED)) {
- printk("HFS+-fs: Filesystem is marked journaled, leaving read-only.\n");
+ printk(KERN_WARNING "hfs: filesystem is marked journaled, leaving read-only.\n");
sb->s_flags |= MS_RDONLY;
*flags |= MS_RDONLY;
}
INIT_HLIST_HEAD(&sbi->rsrc_inodes);
hfsplus_fill_defaults(sbi);
if (!hfsplus_parse_options(data, sbi)) {
- if (!silent)
- printk("HFS+-fs: unable to parse mount options\n");
+ printk(KERN_ERR "hfs: unable to parse mount options\n");
err = -EINVAL;
goto cleanup;
}
nls = sbi->nls;
sbi->nls = load_nls("utf8");
if (!sbi->nls) {
- printk("HFS+: unable to load nls for utf8\n");
+ printk(KERN_ERR "hfs: unable to load nls for utf8\n");
err = -EINVAL;
goto cleanup;
}
/* Grab the volume header */
if (hfsplus_read_wrapper(sb)) {
if (!silent)
- printk("HFS+-fs: unable to find HFS+ superblock\n");
+ printk(KERN_WARNING "hfs: unable to find HFS+ superblock\n");
err = -EINVAL;
goto cleanup;
}
vhdr = HFSPLUS_SB(sb).s_vhdr;
/* Copy parts of the volume header into the superblock */
- sb->s_magic = be16_to_cpu(vhdr->signature);
- if (be16_to_cpu(vhdr->version) != HFSPLUS_CURRENT_VERSION) {
- if (!silent)
- printk("HFS+-fs: wrong filesystem version\n");
+ sb->s_magic = HFSPLUS_VOLHEAD_SIG;
+ if (be16_to_cpu(vhdr->version) < HFSPLUS_MIN_VERSION ||
+ be16_to_cpu(vhdr->version) > HFSPLUS_CURRENT_VERSION) {
+ printk(KERN_ERR "hfs: wrong filesystem version\n");
goto cleanup;
}
HFSPLUS_SB(sb).total_blocks = be32_to_cpu(vhdr->total_blocks);
sb->s_maxbytes = MAX_LFS_FILESIZE;
if (!(vhdr->attributes & cpu_to_be32(HFSPLUS_VOL_UNMNT))) {
- if (!silent)
- printk("HFS+-fs warning: Filesystem was not cleanly unmounted, "
- "running fsck.hfsplus is recommended. mounting read-only.\n");
+ printk(KERN_WARNING "hfs: Filesystem was not cleanly unmounted, "
+ "running fsck.hfsplus is recommended. mounting read-only.\n");
sb->s_flags |= MS_RDONLY;
} else if (sbi->flags & HFSPLUS_SB_FORCE) {
/* nothing */
} else if (vhdr->attributes & cpu_to_be32(HFSPLUS_VOL_SOFTLOCK)) {
- if (!silent)
- printk("HFS+-fs: Filesystem is marked locked, mounting read-only.\n");
+ printk(KERN_WARNING "hfs: Filesystem is marked locked, mounting read-only.\n");
sb->s_flags |= MS_RDONLY;
} else if (vhdr->attributes & cpu_to_be32(HFSPLUS_VOL_JOURNALED)) {
- if (!silent)
- printk("HFS+-fs: write access to a jounaled filesystem is not supported, "
- "use the force option at your own risk, mounting read-only.\n");
+ printk(KERN_WARNING "hfs: write access to a jounaled filesystem is not supported, "
+ "use the force option at your own risk, mounting read-only.\n");
sb->s_flags |= MS_RDONLY;
}
sbi->flags &= ~HFSPLUS_SB_FORCE;
/* Load metadata objects (B*Trees) */
HFSPLUS_SB(sb).ext_tree = hfs_btree_open(sb, HFSPLUS_EXT_CNID);
if (!HFSPLUS_SB(sb).ext_tree) {
- if (!silent)
- printk("HFS+-fs: failed to load extents file\n");
+ printk(KERN_ERR "hfs: failed to load extents file\n");
goto cleanup;
}
HFSPLUS_SB(sb).cat_tree = hfs_btree_open(sb, HFSPLUS_CAT_CNID);
if (!HFSPLUS_SB(sb).cat_tree) {
- if (!silent)
- printk("HFS+-fs: failed to load catalog file\n");
+ printk(KERN_ERR "hfs: failed to load catalog file\n");
goto cleanup;
}
HFSPLUS_SB(sb).alloc_file = iget(sb, HFSPLUS_ALLOC_CNID);
if (!HFSPLUS_SB(sb).alloc_file) {
- if (!silent)
- printk("HFS+-fs: failed to load allocation file\n");
+ printk(KERN_ERR "hfs: failed to load allocation file\n");
goto cleanup;
}
root = iget(sb, HFSPLUS_ROOT_CNID);
sb->s_root = d_alloc_root(root);
if (!sb->s_root) {
- if (!silent)
- printk("HFS+-fs: failed to load root directory\n");
+ printk(KERN_ERR "hfs: failed to load root directory\n");
iput(root);
goto cleanup;
}
sync_dirty_buffer(HFSPLUS_SB(sb).s_vhbh);
if (!HFSPLUS_SB(sb).hidden_dir) {
- printk("HFS+: create hidden dir...\n");
+ printk(KERN_DEBUG "hfs: create hidden dir...\n");
HFSPLUS_SB(sb).hidden_dir = hfsplus_new_inode(sb, S_IFDIR);
hfsplus_create_cat(HFSPLUS_SB(sb).hidden_dir->i_ino, sb->s_root->d_inode,
&str, HFSPLUS_SB(sb).hidden_dir);
{
unregister_filesystem(&hfsplus_fs_type);
if (kmem_cache_destroy(hfsplus_inode_cachep))
- printk(KERN_INFO "hfsplus_inode_cache: not all structures were freed\n");
+ printk(KERN_ERR "hfsplus_inode_cache: not all structures were freed\n");
}
module_init(init_hfsplus_fs)
}
/* Compare unicode strings, return values like normal strcmp */
-int hfsplus_unistrcmp(const struct hfsplus_unistr *s1, const struct hfsplus_unistr *s2)
+int hfsplus_strcasecmp(const struct hfsplus_unistr *s1,
+ const struct hfsplus_unistr *s2)
{
u16 len1, len2, c1, c2;
const hfsplus_unichr *p1, *p2;
}
}
+/* Compare names as a sequence of 16-bit unsigned integers */
+int hfsplus_strcmp(const struct hfsplus_unistr *s1,
+ const struct hfsplus_unistr *s2)
+{
+ u16 len1, len2, c1, c2;
+ const hfsplus_unichr *p1, *p2;
+ int len;
+
+ len1 = be16_to_cpu(s1->length);
+ len2 = be16_to_cpu(s2->length);
+ p1 = s1->unicode;
+ p2 = s2->unicode;
+
+ for (len = min(len1, len2); len > 0; len--) {
+ c1 = be16_to_cpu(*p1);
+ c2 = be16_to_cpu(*p2);
+ if (c1 != c2)
+ return c1 < c2 ? -1 : 1;
+ p1++;
+ p2++;
+ }
+
+ return len1 < len2 ? -1 :
+ len1 > len2 ? 1 : 0;
+}
+
+
#define Hangul_SBase 0xac00
#define Hangul_LBase 0x1100
#define Hangul_VBase 0x1161
{
u32 extent;
u16 attrib;
+ __be16 sig;
- if (be16_to_cpu(*(__be16 *)(bufptr + HFSP_WRAPOFF_EMBEDSIG)) != HFSPLUS_VOLHEAD_SIG)
+ sig = *(__be16 *)(bufptr + HFSP_WRAPOFF_EMBEDSIG);
+ if (sig != cpu_to_be16(HFSPLUS_VOLHEAD_SIG) &&
+ sig != cpu_to_be16(HFSPLUS_VOLHEAD_SIGX))
return 0;
attrib = be16_to_cpu(*(__be16 *)(bufptr + HFSP_WRAPOFF_ATTRIB));
*start = (sector_t)te.cdte_addr.lba << 2;
return 0;
}
- printk(KERN_ERR "HFS: Invalid session number or type of track\n");
+ printk(KERN_ERR "hfs: invalid session number or type of track\n");
return -EINVAL;
}
ms_info.addr_format = CDROM_LBA;
}
if (vhdr->signature == cpu_to_be16(HFSPLUS_VOLHEAD_SIG))
break;
+ if (vhdr->signature == cpu_to_be16(HFSPLUS_VOLHEAD_SIGX)) {
+ HFSPLUS_SB(sb).flags |= HFSPLUS_SB_HFSX;
+ break;
+ }
brelse(bh);
/* check for a partition block
blocksize >>= 1;
if (sb_set_blocksize(sb, blocksize) != blocksize) {
- printk("HFS+: unable to blocksize to %u!\n", blocksize);
+ printk(KERN_ERR "hfs: unable to set blocksize to %u!\n", blocksize);
return -EINVAL;
}
return -EIO;
/* should still be the same... */
- if (be16_to_cpu(vhdr->signature) != HFSPLUS_VOLHEAD_SIG)
+ if (vhdr->signature != (HFSPLUS_SB(sb).flags & HFSPLUS_SB_HFSX ?
+ cpu_to_be16(HFSPLUS_VOLHEAD_SIGX) :
+ cpu_to_be16(HFSPLUS_VOLHEAD_SIG)))
goto error;
HFSPLUS_SB(sb).s_vhbh = bh;
HFSPLUS_SB(sb).s_vhdr = vhdr;
#include <linux/list.h>
#include <linux/writeback.h>
#include <linux/inotify.h>
+#include <linux/syscalls.h>
#include <asm/ioctls.h>
* done (maybe it's a new transaction, but it fell at the same
* address).
*/
- if (journal->j_checkpoint_transactions == transaction ||
+ if (journal->j_checkpoint_transactions == transaction &&
transaction->t_tid == this_tid) {
int batch_count = 0;
struct buffer_head *bhs[NR_BATCH];
journal->j_committing_transaction = NULL;
spin_unlock(&journal->j_state_lock);
- if (commit_transaction->t_checkpoint_list == NULL) {
+ if (commit_transaction->t_checkpoint_list == NULL &&
+ commit_transaction->t_checkpoint_io_list == NULL) {
__journal_drop_transaction(journal, commit_transaction);
} else {
if (journal->j_checkpoint_transactions == NULL) {
#include <linux/audit.h>
#include <linux/capability.h>
#include <linux/file.h>
+#include <linux/fcntl.h>
+#include <linux/namei.h>
#include <asm/namei.h>
#include <asm/uaccess.h>
}
/* Returns 0 and nd will be valid on success; Retuns error, otherwise. */
-int fastcall path_lookup(const char *name, unsigned int flags, struct nameidata *nd)
+static int fastcall do_path_lookup(int dfd, const char *name,
+ unsigned int flags, struct nameidata *nd)
{
int retval = 0;
}
nd->mnt = mntget(current->fs->rootmnt);
nd->dentry = dget(current->fs->root);
- } else {
+ } else if (dfd == AT_FDCWD) {
nd->mnt = mntget(current->fs->pwdmnt);
nd->dentry = dget(current->fs->pwd);
+ } else {
+ struct file *file;
+ int fput_needed;
+ struct dentry *dentry;
+
+ file = fget_light(dfd, &fput_needed);
+ if (!file) {
+ retval = -EBADF;
+ goto out_fail;
+ }
+
+ dentry = file->f_dentry;
+
+ if (!S_ISDIR(dentry->d_inode->i_mode)) {
+ retval = -ENOTDIR;
+ fput_light(file, fput_needed);
+ goto out_fail;
+ }
+
+ retval = file_permission(file, MAY_EXEC);
+ if (retval) {
+ fput_light(file, fput_needed);
+ goto out_fail;
+ }
+
+ nd->mnt = mntget(file->f_vfsmnt);
+ nd->dentry = dget(dentry);
+
+ fput_light(file, fput_needed);
}
read_unlock(¤t->fs->lock);
current->total_link_count = 0;
if (unlikely(current->audit_context
&& nd && nd->dentry && nd->dentry->d_inode))
audit_inode(name, nd->dentry->d_inode, flags);
+out_fail:
return retval;
}
-static int __path_lookup_intent_open(const char *name, unsigned int lookup_flags,
- struct nameidata *nd, int open_flags, int create_mode)
+int fastcall path_lookup(const char *name, unsigned int flags,
+ struct nameidata *nd)
+{
+ return do_path_lookup(AT_FDCWD, name, flags, nd);
+}
+
+static int __path_lookup_intent_open(int dfd, const char *name,
+ unsigned int lookup_flags, struct nameidata *nd,
+ int open_flags, int create_mode)
{
struct file *filp = get_empty_filp();
int err;
nd->intent.open.file = filp;
nd->intent.open.flags = open_flags;
nd->intent.open.create_mode = create_mode;
- err = path_lookup(name, lookup_flags|LOOKUP_OPEN, nd);
+ err = do_path_lookup(dfd, name, lookup_flags|LOOKUP_OPEN, nd);
if (IS_ERR(nd->intent.open.file)) {
if (err == 0) {
err = PTR_ERR(nd->intent.open.file);
* @nd: pointer to nameidata
* @open_flags: open intent flags
*/
-int path_lookup_open(const char *name, unsigned int lookup_flags,
+int path_lookup_open(int dfd, const char *name, unsigned int lookup_flags,
struct nameidata *nd, int open_flags)
{
- return __path_lookup_intent_open(name, lookup_flags, nd,
+ return __path_lookup_intent_open(dfd, name, lookup_flags, nd,
open_flags, 0);
}
* @open_flags: open intent flags
* @create_mode: create intent flags
*/
-static int path_lookup_create(const char *name, unsigned int lookup_flags,
- struct nameidata *nd, int open_flags,
- int create_mode)
+static int path_lookup_create(int dfd, const char *name,
+ unsigned int lookup_flags, struct nameidata *nd,
+ int open_flags, int create_mode)
{
- return __path_lookup_intent_open(name, lookup_flags|LOOKUP_CREATE, nd,
- open_flags, create_mode);
+ return __path_lookup_intent_open(dfd, name, lookup_flags|LOOKUP_CREATE,
+ nd, open_flags, create_mode);
}
int __user_path_lookup_open(const char __user *name, unsigned int lookup_flags,
int err = PTR_ERR(tmp);
if (!IS_ERR(tmp)) {
- err = __path_lookup_intent_open(tmp, lookup_flags, nd, open_flags, 0);
+ err = __path_lookup_intent_open(AT_FDCWD, tmp, lookup_flags, nd, open_flags, 0);
putname(tmp);
}
return err;
* that namei follows links, while lnamei does not.
* SMP-safe
*/
-int fastcall __user_walk(const char __user *name, unsigned flags, struct nameidata *nd)
+int fastcall __user_walk_fd(int dfd, const char __user *name, unsigned flags,
+ struct nameidata *nd)
{
char *tmp = getname(name);
int err = PTR_ERR(tmp);
if (!IS_ERR(tmp)) {
- err = path_lookup(tmp, flags, nd);
+ err = do_path_lookup(dfd, tmp, flags, nd);
putname(tmp);
}
return err;
}
+int fastcall __user_walk(const char __user *name, unsigned flags, struct nameidata *nd)
+{
+ return __user_walk_fd(AT_FDCWD, name, flags, nd);
+}
+
/*
* It's inline, so penalty for filesystems that don't use sticky bit is
* minimal.
* for symlinks (where the permissions are checked later).
* SMP-safe
*/
-int open_namei(const char * pathname, int flag, int mode, struct nameidata *nd)
+int open_namei(int dfd, const char *pathname, int flag,
+ int mode, struct nameidata *nd)
{
int acc_mode, error;
struct path path;
* The simplest case - just a plain lookup.
*/
if (!(flag & O_CREAT)) {
- error = path_lookup_open(pathname, lookup_flags(flag), nd, flag);
+ error = path_lookup_open(dfd, pathname, lookup_flags(flag),
+ nd, flag);
if (error)
return error;
goto ok;
/*
* Create - we need to know the parent.
*/
- error = path_lookup_create(pathname, LOOKUP_PARENT, nd, flag, mode);
+ error = path_lookup_create(dfd,pathname,LOOKUP_PARENT,nd,flag,mode);
if (error)
return error;
return error;
}
-asmlinkage long sys_mknod(const char __user * filename, int mode, unsigned dev)
+asmlinkage long sys_mknodat(int dfd, const char __user *filename, int mode,
+ unsigned dev)
{
int error = 0;
char * tmp;
if (IS_ERR(tmp))
return PTR_ERR(tmp);
- error = path_lookup(tmp, LOOKUP_PARENT, &nd);
+ error = do_path_lookup(dfd, tmp, LOOKUP_PARENT, &nd);
if (error)
goto out;
dentry = lookup_create(&nd, 0);
return error;
}
+asmlinkage long sys_mknod(const char __user *filename, int mode, unsigned dev)
+{
+ return sys_mknodat(AT_FDCWD, filename, mode, dev);
+}
+
int vfs_mkdir(struct inode *dir, struct dentry *dentry, int mode)
{
int error = may_create(dir, dentry, NULL);
return error;
}
-asmlinkage long sys_mkdir(const char __user * pathname, int mode)
+asmlinkage long sys_mkdirat(int dfd, const char __user *pathname, int mode)
{
int error = 0;
char * tmp;
struct dentry *dentry;
struct nameidata nd;
- error = path_lookup(tmp, LOOKUP_PARENT, &nd);
+ error = do_path_lookup(dfd, tmp, LOOKUP_PARENT, &nd);
if (error)
goto out;
dentry = lookup_create(&nd, 1);
return error;
}
+asmlinkage long sys_mkdir(const char __user *pathname, int mode)
+{
+ return sys_mkdirat(AT_FDCWD, pathname, mode);
+}
+
/*
* We try to drop the dentry early: we should have
* a usage count of 2 if we're the only user of this
return error;
}
-asmlinkage long sys_rmdir(const char __user * pathname)
+static long do_rmdir(int dfd, const char __user *pathname)
{
int error = 0;
char * name;
if(IS_ERR(name))
return PTR_ERR(name);
- error = path_lookup(name, LOOKUP_PARENT, &nd);
+ error = do_path_lookup(dfd, name, LOOKUP_PARENT, &nd);
if (error)
goto exit;
return error;
}
+asmlinkage long sys_rmdir(const char __user *pathname)
+{
+ return do_rmdir(AT_FDCWD, pathname);
+}
+
int vfs_unlink(struct inode *dir, struct dentry *dentry)
{
int error = may_delete(dir, dentry, 0);
* writeout happening, and we don't want to prevent access to the directory
* while waiting on the I/O.
*/
-asmlinkage long sys_unlink(const char __user * pathname)
+static long do_unlinkat(int dfd, const char __user *pathname)
{
int error = 0;
char * name;
if(IS_ERR(name))
return PTR_ERR(name);
- error = path_lookup(name, LOOKUP_PARENT, &nd);
+ error = do_path_lookup(dfd, name, LOOKUP_PARENT, &nd);
if (error)
goto exit;
error = -EISDIR;
goto exit2;
}
+asmlinkage long sys_unlinkat(int dfd, const char __user *pathname, int flag)
+{
+ if ((flag & ~AT_REMOVEDIR) != 0)
+ return -EINVAL;
+
+ if (flag & AT_REMOVEDIR)
+ return do_rmdir(dfd, pathname);
+
+ return do_unlinkat(dfd, pathname);
+}
+
+asmlinkage long sys_unlink(const char __user *pathname)
+{
+ return do_unlinkat(AT_FDCWD, pathname);
+}
+
int vfs_symlink(struct inode *dir, struct dentry *dentry, const char *oldname, int mode)
{
int error = may_create(dir, dentry, NULL);
return error;
}
-asmlinkage long sys_symlink(const char __user * oldname, const char __user * newname)
+asmlinkage long sys_symlinkat(const char __user *oldname,
+ int newdfd, const char __user *newname)
{
int error = 0;
char * from;
struct dentry *dentry;
struct nameidata nd;
- error = path_lookup(to, LOOKUP_PARENT, &nd);
+ error = do_path_lookup(newdfd, to, LOOKUP_PARENT, &nd);
if (error)
goto out;
dentry = lookup_create(&nd, 0);
return error;
}
+asmlinkage long sys_symlink(const char __user *oldname, const char __user *newname)
+{
+ return sys_symlinkat(oldname, AT_FDCWD, newname);
+}
+
int vfs_link(struct dentry *old_dentry, struct inode *dir, struct dentry *new_dentry)
{
struct inode *inode = old_dentry->d_inode;
* with linux 2.0, and to avoid hard-linking to directories
* and other special files. --ADM
*/
-asmlinkage long sys_link(const char __user * oldname, const char __user * newname)
+asmlinkage long sys_linkat(int olddfd, const char __user *oldname,
+ int newdfd, const char __user *newname)
{
struct dentry *new_dentry;
struct nameidata nd, old_nd;
if (IS_ERR(to))
return PTR_ERR(to);
- error = __user_walk(oldname, 0, &old_nd);
+ error = __user_walk_fd(olddfd, oldname, 0, &old_nd);
if (error)
goto exit;
- error = path_lookup(to, LOOKUP_PARENT, &nd);
+ error = do_path_lookup(newdfd, to, LOOKUP_PARENT, &nd);
if (error)
goto out;
error = -EXDEV;
return error;
}
+asmlinkage long sys_link(const char __user *oldname, const char __user *newname)
+{
+ return sys_linkat(AT_FDCWD, oldname, AT_FDCWD, newname);
+}
+
/*
* The worst of all namespace operations - renaming directory. "Perverted"
* doesn't even start to describe it. Somebody in UCB had a heck of a trip...
return error;
}
-static int do_rename(const char * oldname, const char * newname)
+static int do_rename(int olddfd, const char *oldname,
+ int newdfd, const char *newname)
{
int error = 0;
struct dentry * old_dir, * new_dir;
struct dentry * trap;
struct nameidata oldnd, newnd;
- error = path_lookup(oldname, LOOKUP_PARENT, &oldnd);
+ error = do_path_lookup(olddfd, oldname, LOOKUP_PARENT, &oldnd);
if (error)
goto exit;
- error = path_lookup(newname, LOOKUP_PARENT, &newnd);
+ error = do_path_lookup(newdfd, newname, LOOKUP_PARENT, &newnd);
if (error)
goto exit1;
return error;
}
-asmlinkage long sys_rename(const char __user * oldname, const char __user * newname)
+asmlinkage long sys_renameat(int olddfd, const char __user *oldname,
+ int newdfd, const char __user *newname)
{
int error;
char * from;
to = getname(newname);
error = PTR_ERR(to);
if (!IS_ERR(to)) {
- error = do_rename(from,to);
+ error = do_rename(olddfd, from, newdfd, to);
putname(to);
}
putname(from);
return error;
}
+asmlinkage long sys_rename(const char __user *oldname, const char __user *newname)
+{
+ return sys_renameat(AT_FDCWD, oldname, AT_FDCWD, newname);
+}
+
int vfs_readlink(struct dentry *dentry, char __user *buffer, int buflen, const char *link)
{
int len;
};
EXPORT_SYMBOL(__user_walk);
+EXPORT_SYMBOL(__user_walk_fd);
EXPORT_SYMBOL(follow_down);
EXPORT_SYMBOL(follow_up);
EXPORT_SYMBOL(get_write_access); /* binfmt_aout */
static kmem_cache_t *mnt_cache;
static struct rw_semaphore namespace_sem;
+/* /sys/fs */
+decl_subsys(fs, NULL, NULL);
+EXPORT_SYMBOL_GPL(fs_subsys);
+
static inline unsigned long hash(struct vfsmount *mnt, struct dentry *dentry)
{
unsigned long tmp = ((unsigned long)mnt / L1_CACHE_BYTES);
i--;
} while (i);
sysfs_init();
+ subsystem_register(&fs_subsys);
init_rootfs();
init_mount_tree();
}
*
*/
#include <linux/config.h>
+#include <linux/types.h>
#include <linux/file.h>
#include <linux/fs.h>
#include <linux/sunrpc/svc.h>
}
if (status)
goto out;
+
+ /* Openowner is now set, so sequence id will get bumped. Now we need
+ * these checks before we do any creates: */
+ if (nfs4_in_grace() && open->op_claim_type != NFS4_OPEN_CLAIM_PREVIOUS)
+ return nfserr_grace;
+ if (!nfs4_in_grace() && open->op_claim_type == NFS4_OPEN_CLAIM_PREVIOUS)
+ return nfserr_no_grace;
+
switch (open->op_claim_type) {
case NFS4_OPEN_CLAIM_DELEGATE_CUR:
status = nfserr_inval;
goto out;
break;
case NFS4_OPEN_CLAIM_PREVIOUS:
+ open->op_stateowner->so_confirmed = 1;
/*
* The CURRENT_FH is already set to the file being
* opened. (1) set open->op_cinfo, (2) set
goto out;
break;
case NFS4_OPEN_CLAIM_DELEGATE_PREV:
+ open->op_stateowner->so_confirmed = 1;
printk("NFSD: unsupported OPEN claim type %d\n",
open->op_claim_type);
status = nfserr_notsupp;
{
int status = nfs_ok;
- if (!current_fh->fh_dentry)
- return nfserr_nofilehandle;
-
- status = nfs_ok;
if (setattr->sa_iattr.ia_valid & ATTR_SIZE) {
nfs4_lock_state();
- if ((status = nfs4_preprocess_stateid_op(current_fh,
- &setattr->sa_stateid,
- CHECK_FH | WR_STATE, NULL))) {
- dprintk("NFSD: nfsd4_setattr: couldn't process stateid!\n");
- goto out_unlock;
- }
+ status = nfs4_preprocess_stateid_op(current_fh,
+ &setattr->sa_stateid, CHECK_FH | WR_STATE, NULL);
nfs4_unlock_state();
+ if (status) {
+ dprintk("NFSD: nfsd4_setattr: couldn't process stateid!");
+ return status;
+ }
}
status = nfs_ok;
if (setattr->sa_acl != NULL)
status = nfsd4_set_nfs4_acl(rqstp, current_fh, setattr->sa_acl);
if (status)
- goto out;
+ return status;
status = nfsd_setattr(rqstp, current_fh, &setattr->sa_iattr,
0, (time_t)0);
-out:
- return status;
-out_unlock:
- nfs4_unlock_state();
return status;
}
return nfserr_inval;
nfs4_lock_state();
- if ((status = nfs4_preprocess_stateid_op(current_fh, stateid,
- CHECK_FH | WR_STATE, &filp))) {
- dprintk("NFSD: nfsd4_write: couldn't process stateid!\n");
- goto out;
- }
+ status = nfs4_preprocess_stateid_op(current_fh, stateid,
+ CHECK_FH | WR_STATE, &filp);
if (filp)
get_file(filp);
nfs4_unlock_state();
+ if (status) {
+ dprintk("NFSD: nfsd4_write: couldn't process stateid!\n");
+ return status;
+ }
+
write->wr_bytes_written = write->wr_buflen;
write->wr_how_written = write->wr_stable_how;
p = (u32 *)write->wr_verifier.data;
if (status == nfserr_symlink)
status = nfserr_inval;
return status;
-out:
- nfs4_unlock_state();
- return status;
}
/* This routine never returns NFS_OK! If there are no other errors, it
while (!status && resp->opcnt < args->opcnt) {
op = &args->ops[resp->opcnt++];
+ dprintk("nfsv4 compound op #%d: %d\n", resp->opcnt, op->opnum);
+
/*
* The XDR decode routines may have pre-set op->status;
* for example, if there is a miscellaneous XDR error
/* All operations except RENEW, SETCLIENTID, RESTOREFH
* SETCLIENTID_CONFIRM, PUTFH and PUTROOTFH
* require a valid current filehandle
- *
- * SETATTR NOFILEHANDLE error handled in nfsd4_setattr
- * due to required returned bitmap argument
*/
if ((!current_fh->fh_dentry) &&
!((op->opnum == OP_PUTFH) || (op->opnum == OP_PUTROOTFH) ||
(op->opnum == OP_SETCLIENTID) ||
(op->opnum == OP_SETCLIENTID_CONFIRM) ||
(op->opnum == OP_RENEW) || (op->opnum == OP_RESTOREFH) ||
- (op->opnum == OP_RELEASE_LOCKOWNER) ||
- (op->opnum == OP_SETATTR))) {
+ (op->opnum == OP_RELEASE_LOCKOWNER))) {
op->status = nfserr_nofilehandle;
goto encode_op;
}
nfs4_save_user(&uid, &gid);
- filp = dentry_open(dget(dir), mntget(rec_dir.mnt),
- O_RDWR);
+ filp = dentry_open(dget(dir), mntget(rec_dir.mnt), O_RDONLY);
status = PTR_ERR(filp);
if (IS_ERR(filp))
goto out;
nfs4_save_user(&uid, &gid);
- status = path_lookup(rec_dirname, LOOKUP_FOLLOW, &rec_dir);
- if (status == -ENOENT)
- printk("NFSD: recovery directory %s doesn't exist\n",
+ status = path_lookup(rec_dirname, LOOKUP_FOLLOW | LOOKUP_DIRECTORY,
+ &rec_dir);
+ if (status)
+ printk("NFSD: unable to find recovery directory %s\n",
rec_dirname);
if (!status)
sop->so_seqid = open->op_seqid;
sop->so_confirmed = 0;
rp = &sop->so_replay;
- rp->rp_status = NFSERR_SERVERFAULT;
+ rp->rp_status = nfserr_serverfault;
rp->rp_buflen = 0;
rp->rp_buf = rp->rp_ibuf;
return sop;
locks_remove_posix(filp, (fl_owner_t) stp->st_stateowner);
put_nfs4_file(stp->st_file);
kmem_cache_free(stateid_slab, stp);
- stp = NULL;
}
static void
sop->so_time = get_seconds();
}
-static void
-release_state_owner(struct nfs4_stateid *stp, int flag)
-{
- struct nfs4_stateowner *sop = stp->st_stateowner;
-
- dprintk("NFSD: release_state_owner\n");
- release_stateid(stp, flag);
-
- /* place unused nfs4_stateowners on so_close_lru list to be
- * released by the laundromat service after the lease period
- * to enable us to handle CLOSE replay
- */
- if (sop->so_confirmed && list_empty(&sop->so_stateids))
- move_to_close_lru(sop);
-}
-
static int
cmp_owner_str(struct nfs4_stateowner *sop, struct xdr_netobj *owner, clientid_t *clid) {
return ((sop->so_owner.len == owner->len) &&
};
-/*
- * nfsd4_process_open1()
- * lookup stateowner.
- * found:
- * check confirmed
- * confirmed:
- * check seqid
- * not confirmed:
- * delete owner
- * create new owner
- * notfound:
- * verify clientid
- * create new owner
- *
- * called with nfs4_lock_state() held.
- */
int
nfsd4_process_open1(struct nfsd4_open *open)
{
- int status;
clientid_t *clientid = &open->op_clientid;
struct nfs4_client *clp = NULL;
unsigned int strhashval;
struct nfs4_stateowner *sop = NULL;
- status = nfserr_inval;
if (!check_name(open->op_owner))
- goto out;
+ return nfserr_inval;
if (STALE_CLIENTID(&open->op_clientid))
return nfserr_stale_clientid;
strhashval = ownerstr_hashval(clientid->cl_id, open->op_owner);
sop = find_openstateowner_str(strhashval, open);
- if (sop) {
- open->op_stateowner = sop;
- /* check for replay */
- if (open->op_seqid == sop->so_seqid - 1){
- if (sop->so_replay.rp_buflen)
- return NFSERR_REPLAY_ME;
- else {
- /* The original OPEN failed so spectacularly
- * that we don't even have replay data saved!
- * Therefore, we have no choice but to continue
- * processing this OPEN; presumably, we'll
- * fail again for the same reason.
- */
- dprintk("nfsd4_process_open1:"
- " replay with no replay cache\n");
- goto renew;
- }
- } else if (sop->so_confirmed) {
- if (open->op_seqid == sop->so_seqid)
- goto renew;
- status = nfserr_bad_seqid;
- goto out;
- } else {
- /* If we get here, we received an OPEN for an
- * unconfirmed nfs4_stateowner. Since the seqid's are
- * different, purge the existing nfs4_stateowner, and
- * instantiate a new one.
- */
- clp = sop->so_client;
- release_stateowner(sop);
- }
- } else {
- /* nfs4_stateowner not found.
- * Verify clientid and instantiate new nfs4_stateowner.
- * If verify fails this is presumably the result of the
- * client's lease expiring.
- */
- status = nfserr_expired;
+ open->op_stateowner = sop;
+ if (!sop) {
+ /* Make sure the client's lease hasn't expired. */
clp = find_confirmed_client(clientid);
if (clp == NULL)
- goto out;
+ return nfserr_expired;
+ goto renew;
}
- status = nfserr_resource;
- sop = alloc_init_open_stateowner(strhashval, clp, open);
- if (sop == NULL)
- goto out;
- open->op_stateowner = sop;
+ if (!sop->so_confirmed) {
+ /* Replace unconfirmed owners without checking for replay. */
+ clp = sop->so_client;
+ release_stateowner(sop);
+ open->op_stateowner = NULL;
+ goto renew;
+ }
+ if (open->op_seqid == sop->so_seqid - 1) {
+ if (sop->so_replay.rp_buflen)
+ return NFSERR_REPLAY_ME;
+ /* The original OPEN failed so spectacularly
+ * that we don't even have replay data saved!
+ * Therefore, we have no choice but to continue
+ * processing this OPEN; presumably, we'll
+ * fail again for the same reason.
+ */
+ dprintk("nfsd4_process_open1: replay with no replay cache\n");
+ goto renew;
+ }
+ if (open->op_seqid != sop->so_seqid)
+ return nfserr_bad_seqid;
renew:
- status = nfs_ok;
+ if (open->op_stateowner == NULL) {
+ sop = alloc_init_open_stateowner(strhashval, clp, open);
+ if (sop == NULL)
+ return nfserr_resource;
+ open->op_stateowner = sop;
+ }
+ list_del_init(&sop->so_close_lru);
renew_client(sop->so_client);
-out:
- return status;
+ return nfs_ok;
}
static inline int
if (!open->op_truncate)
return 0;
if (!(open->op_share_access & NFS4_SHARE_ACCESS_WRITE))
- return -EINVAL;
+ return nfserr_inval;
return nfsd_setattr(rqstp, fh, &iattr, 0, (time_t)0);
}
{
struct file *filp = stp->st_vfs_file;
struct inode *inode = filp->f_dentry->d_inode;
- unsigned int share_access;
+ unsigned int share_access, new_writer;
int status;
set_access(&share_access, stp->st_access_bmap);
- share_access = ~share_access;
- share_access &= open->op_share_access;
-
- if (!(share_access & NFS4_SHARE_ACCESS_WRITE))
- return nfsd4_truncate(rqstp, cur_fh, open);
+ new_writer = (~share_access) & open->op_share_access
+ & NFS4_SHARE_ACCESS_WRITE;
- status = get_write_access(inode);
- if (status)
- return nfserrno(status);
+ if (new_writer) {
+ status = get_write_access(inode);
+ if (status)
+ return nfserrno(status);
+ }
status = nfsd4_truncate(rqstp, cur_fh, open);
if (status) {
- put_write_access(inode);
+ if (new_writer)
+ put_write_access(inode);
return status;
}
/* remember the open */
- filp->f_mode = (filp->f_mode | FMODE_WRITE) & ~FMODE_READ;
+ filp->f_mode |= open->op_share_access;
set_bit(open->op_share_access, &stp->st_access_bmap);
set_bit(open->op_share_deny, &stp->st_deny_bmap);
struct nfs4_delegation *dp = NULL;
int status;
- if (nfs4_in_grace() && open->op_claim_type != NFS4_OPEN_CLAIM_PREVIOUS)
- return nfserr_grace;
-
- if (!nfs4_in_grace() && open->op_claim_type == NFS4_OPEN_CLAIM_PREVIOUS)
- return nfserr_no_grace;
-
status = nfserr_inval;
if (!TEST_ACCESS(open->op_share_access) || !TEST_DENY(open->op_share_deny))
goto out;
CHECK_FH | OPEN_STATE | CLOSE_STATE,
&close->cl_stateowner, &stp, NULL)))
goto out;
- /*
- * Return success, but first update the stateid.
- */
status = nfs_ok;
update_stateid(&stp->st_stateid);
memcpy(&close->cl_stateid, &stp->st_stateid, sizeof(stateid_t));
- /* release_state_owner() calls nfsd_close() if needed */
- release_state_owner(stp, OPEN_STATE);
+ /* release_stateid() calls nfsd_close() if needed */
+ release_stateid(stp, OPEN_STATE);
+
+ /* place unused nfs4_stateowners on so_close_lru list to be
+ * released by the laundromat service after the lease period
+ * to enable us to handle CLOSE replay
+ */
+ if (list_empty(&close->cl_stateowner->so_stateids))
+ move_to_close_lru(close->cl_stateowner);
out:
if (close->cl_stateowner) {
nfs4_get_stateowner(close->cl_stateowner);
sop->so_seqid = lock->lk_new_lock_seqid + 1;
sop->so_confirmed = 1;
rp = &sop->so_replay;
- rp->rp_status = NFSERR_SERVERFAULT;
+ rp->rp_status = nfserr_serverfault;
rp->rp_buflen = 0;
rp->rp_buf = rp->rp_ibuf;
return sop;
if (check_lock_length(lock->lk_offset, lock->lk_length))
return nfserr_inval;
+ if ((status = fh_verify(rqstp, current_fh, S_IFREG, MAY_LOCK))) {
+ dprintk("NFSD: nfsd4_lock: permission denied!\n");
+ return status;
+ }
+
nfs4_lock_state();
if (lock->lk_is_new) {
lock->lk_new_open_seqid,
&lock->lk_new_open_stateid,
CHECK_FH | OPEN_STATE,
- &lock->lk_stateowner, &open_stp,
+ &lock->lk_replay_owner, &open_stp,
lock);
if (status)
goto out;
- open_sop = lock->lk_stateowner;
+ open_sop = lock->lk_replay_owner;
/* create lockowner and lock stateid */
fp = open_stp->st_file;
strhashval = lock_ownerstr_hashval(fp->fi_inode,
if (lock_sop == NULL)
goto out;
lock_stp = alloc_init_lock_stateid(lock_sop, fp, open_stp);
- if (lock_stp == NULL) {
- release_stateowner(lock_sop);
+ if (lock_stp == NULL)
goto out;
- }
} else {
/* lock (lock owner + lock stateid) already exists */
status = nfs4_preprocess_seqid_op(current_fh,
lock->lk_old_lock_seqid,
&lock->lk_old_lock_stateid,
CHECK_FH | LOCK_STATE,
- &lock->lk_stateowner, &lock_stp, lock);
+ &lock->lk_replay_owner, &lock_stp, lock);
if (status)
goto out;
- lock_sop = lock->lk_stateowner;
+ lock_sop = lock->lk_replay_owner;
}
- /* lock->lk_stateowner and lock_stp have been created or found */
+ /* lock->lk_replay_owner and lock_stp have been created or found */
filp = lock_stp->st_vfs_file;
- if ((status = fh_verify(rqstp, current_fh, S_IFREG, MAY_LOCK))) {
- dprintk("NFSD: nfsd4_lock: permission denied!\n");
- goto out;
- }
-
status = nfserr_grace;
if (nfs4_in_grace() && !lock->lk_reclaim)
goto out;
*/
status = posix_lock_file(filp, &file_lock);
- if (file_lock.fl_ops && file_lock.fl_ops->fl_release_private)
- file_lock.fl_ops->fl_release_private(&file_lock);
dprintk("NFSD: nfsd4_lock: posix_lock_file status %d\n",status);
switch (-status) {
case 0: /* success! */
goto conflicting_lock;
case (EDEADLK):
status = nfserr_deadlock;
+ dprintk("NFSD: nfsd4_lock: posix_lock_file() failed! status %d\n",status);
+ goto out;
default:
+ status = nfserrno(status);
dprintk("NFSD: nfsd4_lock: posix_lock_file() failed! status %d\n",status);
- goto out_destroy_new_stateid;
+ goto out;
}
conflicting_lock:
goto out;
}
nfs4_set_lock_denied(conflock, &lock->lk_denied);
-
-out_destroy_new_stateid:
- if (lock->lk_is_new) {
- dprintk("NFSD: nfsd4_lock: destroy new stateid!\n");
- /*
- * An error encountered after instantiation of the new
- * stateid has forced us to destroy it.
- */
- release_state_owner(lock_stp, LOCK_STATE);
- }
out:
- if (lock->lk_stateowner) {
- nfs4_get_stateowner(lock->lk_stateowner);
- *replay_owner = lock->lk_stateowner;
+ if (status && lock->lk_is_new && lock_sop)
+ release_stateowner(lock_sop);
+ if (lock->lk_replay_owner) {
+ nfs4_get_stateowner(lock->lk_replay_owner);
+ *replay_owner = lock->lk_replay_owner;
}
nfs4_unlock_state();
return status;
* Try to unlock the file in the VFS.
*/
status = posix_lock_file(filp, &file_lock);
- if (file_lock.fl_ops && file_lock.fl_ops->fl_release_private)
- file_lock.fl_ops->fl_release_private(&file_lock);
if (status) {
dprintk("NFSD: nfs4_locku: posix_lock_file failed!\n");
goto out_nfserr;
lock_kernel();
for (flpp = &inode->i_flock; *flpp != NULL; flpp = &(*flpp)->fl_next) {
- if ((*flpp)->fl_owner == (fl_owner_t)lowner)
+ if ((*flpp)->fl_owner == (fl_owner_t)lowner) {
status = 1;
goto out;
+ }
}
out:
unlock_kernel();
{
DECODE_HEAD;
- lock->lk_stateowner = NULL;
+ lock->lk_replay_owner = NULL;
/*
* type, reclaim(boolean), offset, length, new_lock_owner(boolean)
*/
*/
if (!(cd->rd_bmval[0] & FATTR4_WORD0_RDATTR_ERROR))
goto fail;
- nfserr = nfserr_toosmall;
p = nfsd4_encode_rdattr_error(p, buflen, nfserr);
- if (p == NULL)
+ if (p == NULL) {
+ nfserr = nfserr_toosmall;
goto fail;
+ }
}
cd->buflen -= (p - cd->buffer);
cd->buffer = p;
static void
nfsd4_encode_lock(struct nfsd4_compoundres *resp, int nfserr, struct nfsd4_lock *lock)
{
-
ENCODE_SEQID_OP_HEAD;
if (!nfserr) {
} else if (nfserr == nfserr_denied)
nfsd4_encode_lock_denied(resp, &lock->lk_denied);
- ENCODE_SEQID_OP_TAIL(lock->lk_stateowner);
+ ENCODE_SEQID_OP_TAIL(lock->lk_replay_owner);
}
static void
return nfs_ok;
}
+static int
+nfsd_return_attrs(int err, struct nfsd_attrstat *resp)
+{
+ if (err) return err;
+ return nfserrno(vfs_getattr(resp->fh.fh_export->ex_mnt,
+ resp->fh.fh_dentry,
+ &resp->stat));
+}
+static int
+nfsd_return_dirop(int err, struct nfsd_diropres *resp)
+{
+ if (err) return err;
+ return nfserrno(vfs_getattr(resp->fh.fh_export->ex_mnt,
+ resp->fh.fh_dentry,
+ &resp->stat));
+}
/*
* Get a file's attributes
* N.B. After this call resp->fh needs an fh_put
nfsd_proc_getattr(struct svc_rqst *rqstp, struct nfsd_fhandle *argp,
struct nfsd_attrstat *resp)
{
+ int nfserr;
dprintk("nfsd: GETATTR %s\n", SVCFH_fmt(&argp->fh));
fh_copy(&resp->fh, &argp->fh);
- return fh_verify(rqstp, &resp->fh, 0, MAY_NOP);
+ nfserr = fh_verify(rqstp, &resp->fh, 0, MAY_NOP);
+ return nfsd_return_attrs(nfserr, resp);
}
/*
nfsd_proc_setattr(struct svc_rqst *rqstp, struct nfsd_sattrargs *argp,
struct nfsd_attrstat *resp)
{
+ int nfserr;
dprintk("nfsd: SETATTR %s, valid=%x, size=%ld\n",
SVCFH_fmt(&argp->fh),
argp->attrs.ia_valid, (long) argp->attrs.ia_size);
fh_copy(&resp->fh, &argp->fh);
- return nfsd_setattr(rqstp, &resp->fh, &argp->attrs,0, (time_t)0);
+ nfserr = nfsd_setattr(rqstp, &resp->fh, &argp->attrs,0, (time_t)0);
+ return nfsd_return_attrs(nfserr, resp);
}
/*
&resp->fh);
fh_put(&argp->fh);
- return nfserr;
+ return nfsd_return_dirop(nfserr, resp);
}
/*
argp->vec, argp->vlen,
&resp->count);
- return nfserr;
+ if (nfserr) return nfserr;
+ return nfserrno(vfs_getattr(resp->fh.fh_export->ex_mnt,
+ resp->fh.fh_dentry,
+ &resp->stat));
}
/*
argp->vec, argp->vlen,
argp->len,
&stable);
- return nfserr;
+ return nfsd_return_attrs(nfserr, resp);
}
/*
done:
fh_put(dirfhp);
- return nfserr;
+ return nfsd_return_dirop(nfserr, resp);
}
static int
nfserr = nfsd_create(rqstp, &argp->fh, argp->name, argp->len,
&argp->attrs, S_IFDIR, 0, &resp->fh);
fh_put(&argp->fh);
- return nfserr;
+ return nfsd_return_dirop(nfserr, resp);
}
/*
{
struct inode *inode = dp->d_inode;
int (*fsync) (struct file *, struct dentry *, int);
- int err = nfs_ok;
+ int err;
- filemap_fdatawrite(inode->i_mapping);
- if (fop && (fsync = fop->fsync))
- err=fsync(filp, dp, 0);
- filemap_fdatawait(inode->i_mapping);
+ err = filemap_fdatawrite(inode->i_mapping);
+ if (err == 0 && fop && (fsync = fop->fsync))
+ err = fsync(filp, dp, 0);
+ if (err == 0)
+ err = filemap_fdatawait(inode->i_mapping);
- return nfserrno(err);
+ return err;
}
return err;
}
-void
+int
nfsd_sync_dir(struct dentry *dp)
{
- nfsd_dosync(NULL, dp, dp->d_inode->i_fop);
+ return nfsd_dosync(NULL, dp, dp->d_inode->i_fop);
}
/*
return size;
}
-static inline int
+static int
nfsd_vfs_read(struct svc_rqst *rqstp, struct svc_fh *fhp, struct file *file,
loff_t offset, struct kvec *vec, int vlen, unsigned long *count)
{
mutex_unlock(&dentry->d_inode->i_mutex);
}
-static inline int
+static int
nfsd_vfs_write(struct svc_rqst *rqstp, struct svc_fh *fhp, struct file *file,
loff_t offset, struct kvec *vec, int vlen,
unsigned long cnt, int *stablep)
int err = 0;
int stable = *stablep;
+#ifdef MSNFS
err = nfserr_perm;
-#ifdef MSNFS
if ((fhp->fh_export->ex_flags & NFSEXP_MSNFS) &&
(!lock_may_write(file->f_dentry->d_inode, offset, cnt)))
goto out;
return err;
if (EX_ISSYNC(fhp->fh_export)) {
if (file->f_op && file->f_op->fsync) {
- err = nfsd_sync(file);
+ err = nfserrno(nfsd_sync(file));
} else {
err = nfserr_notsupp;
}
"nfsd_create: parent %s/%s not locked!\n",
dentry->d_parent->d_name.name,
dentry->d_name.name);
- err = -EIO;
+ err = nfserr_io;
goto out;
}
}
goto out_nfserr;
if (EX_ISSYNC(fhp->fh_export)) {
- nfsd_sync_dir(dentry);
+ err = nfserrno(nfsd_sync_dir(dentry));
write_inode_now(dchild->d_inode, 1);
}
* send along the gid when it tries to implement setgid
* directories via NFS.
*/
- err = 0;
- if ((iap->ia_valid &= ~(ATTR_UID|ATTR_GID|ATTR_MODE)) != 0)
- err = nfsd_setattr(rqstp, resfhp, iap, 0, (time_t)0);
+ if ((iap->ia_valid &= ~(ATTR_UID|ATTR_GID|ATTR_MODE)) != 0) {
+ int err2 = nfsd_setattr(rqstp, resfhp, iap, 0, (time_t)0);
+ if (err2)
+ err = err2;
+ }
/*
* Update the file handle to get the new inode info.
*/
goto out_nfserr;
if (EX_ISSYNC(fhp->fh_export)) {
- nfsd_sync_dir(dentry);
+ err = nfserrno(nfsd_sync_dir(dentry));
/* setattr will sync the child (or not) */
}
- /*
- * Update the filehandle to get the new inode info.
- */
- err = fh_update(resfhp);
- if (err)
- goto out;
-
if (createmode == NFS3_CREATE_EXCLUSIVE) {
/* Cram the verifier into atime/mtime/mode */
iap->ia_valid = ATTR_MTIME|ATTR_ATIME
* implement setgid directories via NFS. Clear out all that cruft.
*/
set_attr:
- if ((iap->ia_valid &= ~(ATTR_UID|ATTR_GID)) != 0)
- err = nfsd_setattr(rqstp, resfhp, iap, 0, (time_t)0);
+ if ((iap->ia_valid &= ~(ATTR_UID|ATTR_GID)) != 0) {
+ int err2 = nfsd_setattr(rqstp, resfhp, iap, 0, (time_t)0);
+ if (err2)
+ err = err2;
+ }
+
+ /*
+ * Update the filehandle to get the new inode info.
+ */
+ if (!err)
+ err = fh_update(resfhp);
out:
fh_unlock(fhp);
} else
err = vfs_symlink(dentry->d_inode, dnew, path, mode);
- if (!err) {
+ if (!err)
if (EX_ISSYNC(fhp->fh_export))
- nfsd_sync_dir(dentry);
- } else
+ err = nfsd_sync_dir(dentry);
+ if (err)
err = nfserrno(err);
fh_unlock(fhp);
err = vfs_link(dold, dirp, dnew);
if (!err) {
if (EX_ISSYNC(ffhp->fh_export)) {
- nfsd_sync_dir(ddir);
+ err = nfserrno(nfsd_sync_dir(ddir));
write_inode_now(dest, 1);
}
} else {
if ((ffhp->fh_export->ex_flags & NFSEXP_MSNFS) &&
((atomic_read(&odentry->d_count) > 1)
|| (atomic_read(&ndentry->d_count) > 1))) {
- err = nfserr_perm;
+ err = -EPERM;
} else
#endif
err = vfs_rename(fdir, odentry, tdir, ndentry);
if (!err && EX_ISSYNC(tfhp->fh_export)) {
- nfsd_sync_dir(tdentry);
- nfsd_sync_dir(fdentry);
+ err = nfsd_sync_dir(tdentry);
+ if (!err)
+ err = nfsd_sync_dir(fdentry);
}
out_dput_new:
#ifdef MSNFS
if ((fhp->fh_export->ex_flags & NFSEXP_MSNFS) &&
(atomic_read(&rdentry->d_count) > 1)) {
- err = nfserr_perm;
+ err = -EPERM;
} else
#endif
err = vfs_unlink(dirp, rdentry);
dput(rdentry);
- if (err)
- goto out_nfserr;
- if (EX_ISSYNC(fhp->fh_export))
- nfsd_sync_dir(dentry);
-
-out:
- return err;
+ if (err == 0 &&
+ EX_ISSYNC(fhp->fh_export))
+ err = nfsd_sync_dir(dentry);
out_nfserr:
err = nfserrno(err);
- goto out;
+out:
+ return err;
}
/*
#include <linux/security.h>
#include <linux/mount.h>
#include <linux/vfs.h>
+#include <linux/fcntl.h>
#include <asm/uaccess.h>
#include <linux/fs.h>
#include <linux/personality.h>
error = get_user(newattrs.ia_atime.tv_sec, ×->actime);
newattrs.ia_atime.tv_nsec = 0;
- if (!error)
+ if (!error)
error = get_user(newattrs.ia_mtime.tv_sec, ×->modtime);
newattrs.ia_mtime.tv_nsec = 0;
if (error)
* must be owner or have write permission.
* Else, update from *times, must be owner or super user.
*/
-long do_utimes(char __user * filename, struct timeval * times)
+long do_utimes(int dfd, char __user *filename, struct timeval *times)
{
int error;
struct nameidata nd;
struct inode * inode;
struct iattr newattrs;
- error = user_path_walk(filename, &nd);
+ error = __user_walk_fd(dfd, filename, LOOKUP_FOLLOW, &nd);
if (error)
goto out;
return error;
}
-asmlinkage long sys_utimes(char __user * filename, struct timeval __user * utimes)
+asmlinkage long sys_futimesat(int dfd, char __user *filename, struct timeval __user *utimes)
{
struct timeval times[2];
if (utimes && copy_from_user(×, utimes, sizeof(times)))
return -EFAULT;
- return do_utimes(filename, utimes ? times : NULL);
+ return do_utimes(dfd, filename, utimes ? times : NULL);
+}
+
+asmlinkage long sys_utimes(char __user *filename, struct timeval __user *utimes)
+{
+ return sys_futimesat(AT_FDCWD, filename, utimes);
}
* We do this by temporarily clearing all FS-related capabilities and
* switching the fsuid/fsgid around to the real ones.
*/
-asmlinkage long sys_access(const char __user * filename, int mode)
+asmlinkage long sys_faccessat(int dfd, const char __user *filename, int mode)
{
struct nameidata nd;
int old_fsuid, old_fsgid;
else
current->cap_effective = current->cap_permitted;
- res = __user_walk(filename, LOOKUP_FOLLOW|LOOKUP_ACCESS, &nd);
+ res = __user_walk_fd(dfd, filename, LOOKUP_FOLLOW|LOOKUP_ACCESS, &nd);
if (!res) {
res = vfs_permission(&nd, mode);
/* SuS v2 requires we report a read only fs too */
return res;
}
+asmlinkage long sys_access(const char __user *filename, int mode)
+{
+ return sys_faccessat(AT_FDCWD, filename, mode);
+}
+
asmlinkage long sys_chdir(const char __user * filename)
{
struct nameidata nd;
return err;
}
-asmlinkage long sys_chmod(const char __user * filename, mode_t mode)
+asmlinkage long sys_fchmodat(int dfd, const char __user *filename,
+ mode_t mode)
{
struct nameidata nd;
struct inode * inode;
int error;
struct iattr newattrs;
- error = user_path_walk(filename, &nd);
+ error = __user_walk_fd(dfd, filename, LOOKUP_FOLLOW, &nd);
if (error)
goto out;
inode = nd.dentry->d_inode;
return error;
}
+asmlinkage long sys_chmod(const char __user *filename, mode_t mode)
+{
+ return sys_fchmodat(AT_FDCWD, filename, mode);
+}
+
static int chown_common(struct dentry * dentry, uid_t user, gid_t group)
{
struct inode * inode;
return error;
}
+asmlinkage long sys_fchownat(int dfd, const char __user *filename, uid_t user,
+ gid_t group, int flag)
+{
+ struct nameidata nd;
+ int error = -EINVAL;
+ int follow;
+
+ if ((flag & ~AT_SYMLINK_NOFOLLOW) != 0)
+ goto out;
+
+ follow = (flag & AT_SYMLINK_NOFOLLOW) ? 0 : LOOKUP_FOLLOW;
+ error = __user_walk_fd(dfd, filename, follow, &nd);
+ if (!error) {
+ error = chown_common(nd.dentry, user, group);
+ path_release(&nd);
+ }
+out:
+ return error;
+}
+
asmlinkage long sys_lchown(const char __user * filename, uid_t user, gid_t group)
{
struct nameidata nd;
* for the internal routines (ie open_namei()/follow_link() etc). 00 is
* used by symlinks.
*/
-struct file *filp_open(const char * filename, int flags, int mode)
+static struct file *do_filp_open(int dfd, const char *filename, int flags,
+ int mode)
{
int namei_flags, error;
struct nameidata nd;
if ((namei_flags+1) & O_ACCMODE)
namei_flags++;
- error = open_namei(filename, namei_flags, mode, &nd);
+ error = open_namei(dfd, filename, namei_flags, mode, &nd);
if (!error)
return nameidata_to_filp(&nd, flags);
return ERR_PTR(error);
}
+
+struct file *filp_open(const char *filename, int flags, int mode)
+{
+ return do_filp_open(AT_FDCWD, filename, flags, mode);
+}
EXPORT_SYMBOL(filp_open);
/**
EXPORT_SYMBOL(put_unused_fd);
/*
- * Install a file pointer in the fd array.
+ * Install a file pointer in the fd array.
*
* The VFS is full of places where we drop the files lock between
* setting the open_fds bitmap and installing the file in the file
EXPORT_SYMBOL(fd_install);
-long do_sys_open(const char __user *filename, int flags, int mode)
+long do_sys_open(int dfd, const char __user *filename, int flags, int mode)
{
char *tmp = getname(filename);
int fd = PTR_ERR(tmp);
if (!IS_ERR(tmp)) {
fd = get_unused_fd();
if (fd >= 0) {
- struct file *f = filp_open(tmp, flags, mode);
+ struct file *f = do_filp_open(dfd, tmp, flags, mode);
if (IS_ERR(f)) {
put_unused_fd(fd);
fd = PTR_ERR(f);
if (force_o_largefile())
flags |= O_LARGEFILE;
- return do_sys_open(filename, flags, mode);
+ return do_sys_open(AT_FDCWD, filename, flags, mode);
}
EXPORT_SYMBOL_GPL(sys_open);
+asmlinkage long sys_openat(int dfd, const char __user *filename, int flags,
+ int mode)
+{
+ if (force_o_largefile())
+ flags |= O_LARGEFILE;
+
+ return do_sys_open(dfd, filename, flags, mode);
+}
+EXPORT_SYMBOL_GPL(sys_openat);
+
#ifndef __alpha__
/*
given by the tar program ("man tar" or preferably "info tar"). If
you don't know what all this is about, say N.
+config KARMA_PARTITION
+ bool "Karma Partition support"
+ depends on PARTITION_ADVANCED
+ help
+ Say Y here if you would like to mount the Rio Karma MP3 player, as it
+ uses a proprietary partition table.
+
config EFI_PARTITION
bool "EFI GUID Partition support"
depends on PARTITION_ADVANCED
obj-$(CONFIG_ULTRIX_PARTITION) += ultrix.o
obj-$(CONFIG_IBM_PARTITION) += ibm.o
obj-$(CONFIG_EFI_PARTITION) += efi.o
+obj-$(CONFIG_KARMA_PARTITION) += karma.o
#include "ibm.h"
#include "ultrix.h"
#include "efi.h"
+#include "karma.h"
#ifdef CONFIG_BLK_DEV_MD
extern void md_autodetect_dev(dev_t dev);
#endif
#ifdef CONFIG_IBM_PARTITION
ibm_partition,
+#endif
+#ifdef CONFIG_KARMA_PARTITION
+ karma_partition,
#endif
NULL
};
--- /dev/null
+/*
+ * fs/partitions/karma.c
+ * Rio Karma partition info.
+ *
+ * Copyright (C) 2006 Bob Copeland (me@bobcopeland.com)
+ * based on osf.c
+ */
+
+#include "check.h"
+#include "karma.h"
+
+int karma_partition(struct parsed_partitions *state, struct block_device *bdev)
+{
+ int i;
+ int slot = 1;
+ Sector sect;
+ unsigned char *data;
+ struct disklabel {
+ u8 d_reserved[270];
+ struct d_partition {
+ __le32 p_res;
+ u8 p_fstype;
+ u8 p_res2[3];
+ __le32 p_offset;
+ __le32 p_size;
+ } d_partitions[2];
+ u8 d_blank[208];
+ __le16 d_magic;
+ } __attribute__((packed)) *label;
+ struct d_partition *p;
+
+ data = read_dev_sector(bdev, 0, §);
+ if (!data)
+ return -1;
+
+ label = (struct disklabel *)data;
+ if (le16_to_cpu(label->d_magic) != KARMA_LABEL_MAGIC) {
+ put_dev_sector(sect);
+ return 0;
+ }
+
+ p = label->d_partitions;
+ for (i = 0 ; i < 2; i++, p++) {
+ if (slot == state->limit)
+ break;
+
+ if (p->p_fstype == 0x4d && le32_to_cpu(p->p_size)) {
+ put_partition(state, slot, le32_to_cpu(p->p_offset),
+ le32_to_cpu(p->p_size));
+ }
+ slot++;
+ }
+ printk("\n");
+ put_dev_sector(sect);
+ return 1;
+}
+
--- /dev/null
+/*
+ * fs/partitions/karma.h
+ */
+
+#define KARMA_LABEL_MAGIC 0xAB56
+
+int karma_partition(struct parsed_partitions *state, struct block_device *bdev);
+
#define POLLOUT_SET (POLLWRBAND | POLLWRNORM | POLLOUT | POLLERR)
#define POLLEX_SET (POLLPRI)
-int do_select(int n, fd_set_bits *fds, long *timeout)
+int do_select(int n, fd_set_bits *fds, s64 *timeout)
{
struct poll_wqueues table;
poll_table *wait;
int retval, i;
- long __timeout = *timeout;
rcu_read_lock();
retval = max_select_fd(n, fds);
poll_initwait(&table);
wait = &table.pt;
- if (!__timeout)
+ if (!*timeout)
wait = NULL;
retval = 0;
for (;;) {
unsigned long *rinp, *routp, *rexp, *inp, *outp, *exp;
+ long __timeout;
set_current_state(TASK_INTERRUPTIBLE);
*rexp = res_ex;
}
wait = NULL;
- if (retval || !__timeout || signal_pending(current))
+ if (retval || !*timeout || signal_pending(current))
break;
if(table.error) {
retval = table.error;
break;
}
+
+ if (*timeout < 0) {
+ /* Wait indefinitely */
+ __timeout = MAX_SCHEDULE_TIMEOUT;
+ } else if (unlikely(*timeout >= (s64)MAX_SCHEDULE_TIMEOUT - 1)) {
+ /* Wait for longer than MAX_SCHEDULE_TIMEOUT. Do it in a loop */
+ __timeout = MAX_SCHEDULE_TIMEOUT - 1;
+ *timeout -= __timeout;
+ } else {
+ __timeout = *timeout;
+ *timeout = 0;
+ }
__timeout = schedule_timeout(__timeout);
+ if (*timeout >= 0)
+ *timeout += __timeout;
}
__set_current_state(TASK_RUNNING);
poll_freewait(&table);
- /*
- * Up-to-date the caller timeout.
- */
- *timeout = __timeout;
return retval;
}
#define MAX_SELECT_SECONDS \
((unsigned long) (MAX_SCHEDULE_TIMEOUT / HZ)-1)
-asmlinkage long
-sys_select(int n, fd_set __user *inp, fd_set __user *outp, fd_set __user *exp, struct timeval __user *tvp)
+static int core_sys_select(int n, fd_set __user *inp, fd_set __user *outp,
+ fd_set __user *exp, s64 *timeout)
{
fd_set_bits fds;
char *bits;
- long timeout;
int ret, size, max_fdset;
struct fdtable *fdt;
- timeout = MAX_SCHEDULE_TIMEOUT;
- if (tvp) {
- time_t sec, usec;
-
- if (!access_ok(VERIFY_READ, tvp, sizeof(*tvp))
- || __get_user(sec, &tvp->tv_sec)
- || __get_user(usec, &tvp->tv_usec)) {
- ret = -EFAULT;
- goto out_nofds;
- }
-
- ret = -EINVAL;
- if (sec < 0 || usec < 0)
- goto out_nofds;
-
- if ((unsigned long) sec < MAX_SELECT_SECONDS) {
- timeout = ROUND_UP(usec, 1000000/HZ);
- timeout += sec * (unsigned long) HZ;
- }
- }
-
ret = -EINVAL;
if (n < 0)
goto out_nofds;
zero_fd_set(n, fds.res_out);
zero_fd_set(n, fds.res_ex);
- ret = do_select(n, &fds, &timeout);
-
- if (tvp && !(current->personality & STICKY_TIMEOUTS)) {
- time_t sec = 0, usec = 0;
- if (timeout) {
- sec = timeout / HZ;
- usec = timeout % HZ;
- usec *= (1000000/HZ);
- }
- put_user(sec, &tvp->tv_sec);
- put_user(usec, &tvp->tv_usec);
- }
+ ret = do_select(n, &fds, timeout);
if (ret < 0)
goto out;
return ret;
}
+asmlinkage long sys_select(int n, fd_set __user *inp, fd_set __user *outp,
+ fd_set __user *exp, struct timeval __user *tvp)
+{
+ s64 timeout = -1;
+ struct timeval tv;
+ int ret;
+
+ if (tvp) {
+ if (copy_from_user(&tv, tvp, sizeof(tv)))
+ return -EFAULT;
+
+ if (tv.tv_sec < 0 || tv.tv_usec < 0)
+ return -EINVAL;
+
+ /* Cast to u64 to make GCC stop complaining */
+ if ((u64)tv.tv_sec >= (u64)MAX_INT64_SECONDS)
+ timeout = -1; /* infinite */
+ else {
+ timeout = ROUND_UP(tv.tv_usec, USEC_PER_SEC/HZ);
+ timeout += tv.tv_sec * HZ;
+ }
+ }
+
+ ret = core_sys_select(n, inp, outp, exp, &timeout);
+
+ if (tvp) {
+ if (current->personality & STICKY_TIMEOUTS)
+ goto sticky;
+ tv.tv_usec = jiffies_to_usecs(do_div((*(u64*)&timeout), HZ));
+ tv.tv_sec = timeout;
+ if (copy_to_user(tvp, &tv, sizeof(tv))) {
+sticky:
+ /*
+ * If an application puts its timeval in read-only
+ * memory, we don't want the Linux-specific update to
+ * the timeval to cause a fault after the select has
+ * completed successfully. However, because we're not
+ * updating the timeval, we can't restart the system
+ * call.
+ */
+ if (ret == -ERESTARTNOHAND)
+ ret = -EINTR;
+ }
+ }
+
+ return ret;
+}
+
+#ifdef TIF_RESTORE_SIGMASK
+asmlinkage long sys_pselect7(int n, fd_set __user *inp, fd_set __user *outp,
+ fd_set __user *exp, struct timespec __user *tsp,
+ const sigset_t __user *sigmask, size_t sigsetsize)
+{
+ s64 timeout = MAX_SCHEDULE_TIMEOUT;
+ sigset_t ksigmask, sigsaved;
+ struct timespec ts;
+ int ret;
+
+ if (tsp) {
+ if (copy_from_user(&ts, tsp, sizeof(ts)))
+ return -EFAULT;
+
+ if (ts.tv_sec < 0 || ts.tv_nsec < 0)
+ return -EINVAL;
+
+ /* Cast to u64 to make GCC stop complaining */
+ if ((u64)ts.tv_sec >= (u64)MAX_INT64_SECONDS)
+ timeout = -1; /* infinite */
+ else {
+ timeout = ROUND_UP(ts.tv_nsec, NSEC_PER_SEC/HZ);
+ timeout += ts.tv_sec * HZ;
+ }
+ }
+
+ if (sigmask) {
+ /* XXX: Don't preclude handling different sized sigset_t's. */
+ if (sigsetsize != sizeof(sigset_t))
+ return -EINVAL;
+ if (copy_from_user(&ksigmask, sigmask, sizeof(ksigmask)))
+ return -EFAULT;
+
+ sigdelsetmask(&ksigmask, sigmask(SIGKILL)|sigmask(SIGSTOP));
+ sigprocmask(SIG_SETMASK, &ksigmask, &sigsaved);
+ }
+
+ ret = core_sys_select(n, inp, outp, exp, &timeout);
+
+ if (tsp) {
+ if (current->personality & STICKY_TIMEOUTS)
+ goto sticky;
+ ts.tv_nsec = jiffies_to_usecs(do_div((*(u64*)&timeout), HZ)) * 1000;
+ ts.tv_sec = timeout;
+ if (copy_to_user(tsp, &ts, sizeof(ts))) {
+sticky:
+ /*
+ * If an application puts its timeval in read-only
+ * memory, we don't want the Linux-specific update to
+ * the timeval to cause a fault after the select has
+ * completed successfully. However, because we're not
+ * updating the timeval, we can't restart the system
+ * call.
+ */
+ if (ret == -ERESTARTNOHAND)
+ ret = -EINTR;
+ }
+ }
+
+ if (ret == -ERESTARTNOHAND) {
+ /*
+ * Don't restore the signal mask yet. Let do_signal() deliver
+ * the signal on the way back to userspace, before the signal
+ * mask is restored.
+ */
+ if (sigmask) {
+ memcpy(¤t->saved_sigmask, &sigsaved,
+ sizeof(sigsaved));
+ set_thread_flag(TIF_RESTORE_SIGMASK);
+ }
+ } else if (sigmask)
+ sigprocmask(SIG_SETMASK, &sigsaved, NULL);
+
+ return ret;
+}
+
+/*
+ * Most architectures can't handle 7-argument syscalls. So we provide a
+ * 6-argument version where the sixth argument is a pointer to a structure
+ * which has a pointer to the sigset_t itself followed by a size_t containing
+ * the sigset size.
+ */
+asmlinkage long sys_pselect6(int n, fd_set __user *inp, fd_set __user *outp,
+ fd_set __user *exp, struct timespec __user *tsp, void __user *sig)
+{
+ size_t sigsetsize = 0;
+ sigset_t __user *up = NULL;
+
+ if (sig) {
+ if (!access_ok(VERIFY_READ, sig, sizeof(void *)+sizeof(size_t))
+ || __get_user(up, (sigset_t * __user *)sig)
+ || __get_user(sigsetsize,
+ (size_t * __user)(sig+sizeof(void *))))
+ return -EFAULT;
+ }
+
+ return sys_pselect7(n, inp, outp, exp, tsp, up, sigsetsize);
+}
+#endif /* TIF_RESTORE_SIGMASK */
+
struct poll_list {
struct poll_list *next;
int len;
}
static int do_poll(unsigned int nfds, struct poll_list *list,
- struct poll_wqueues *wait, long timeout)
+ struct poll_wqueues *wait, s64 *timeout)
{
int count = 0;
poll_table* pt = &wait->pt;
- if (!timeout)
+ /* Optimise the no-wait case */
+ if (!(*timeout))
pt = NULL;
for (;;) {
struct poll_list *walk;
+ long __timeout;
+
set_current_state(TASK_INTERRUPTIBLE);
walk = list;
while(walk != NULL) {
walk = walk->next;
}
pt = NULL;
- if (count || !timeout || signal_pending(current))
+ if (count || !*timeout || signal_pending(current))
break;
count = wait->error;
if (count)
break;
- timeout = schedule_timeout(timeout);
+
+ if (*timeout < 0) {
+ /* Wait indefinitely */
+ __timeout = MAX_SCHEDULE_TIMEOUT;
+ } else if (unlikely(*timeout >= (s64)MAX_SCHEDULE_TIMEOUT-1)) {
+ /*
+ * Wait for longer than MAX_SCHEDULE_TIMEOUT. Do it in
+ * a loop
+ */
+ __timeout = MAX_SCHEDULE_TIMEOUT - 1;
+ *timeout -= __timeout;
+ } else {
+ __timeout = *timeout;
+ *timeout = 0;
+ }
+
+ __timeout = schedule_timeout(__timeout);
+ if (*timeout >= 0)
+ *timeout += __timeout;
}
__set_current_state(TASK_RUNNING);
return count;
}
-asmlinkage long sys_poll(struct pollfd __user * ufds, unsigned int nfds, long timeout)
+int do_sys_poll(struct pollfd __user *ufds, unsigned int nfds, s64 *timeout)
{
struct poll_wqueues table;
int fdcount, err;
if (nfds > max_fdset && nfds > OPEN_MAX)
return -EINVAL;
- if (timeout) {
- /* Careful about overflow in the intermediate values */
- if ((unsigned long) timeout < MAX_SCHEDULE_TIMEOUT / HZ)
- timeout = (unsigned long)(timeout*HZ+999)/1000+1;
- else /* Negative or overflow */
- timeout = MAX_SCHEDULE_TIMEOUT;
- }
-
poll_initwait(&table);
head = NULL;
}
i -= pp->len;
}
+
fdcount = do_poll(nfds, head, &table, timeout);
/* OK, now copy the revents fields back to user space. */
poll_freewait(&table);
return err;
}
+
+asmlinkage long sys_poll(struct pollfd __user *ufds, unsigned int nfds,
+ long timeout_msecs)
+{
+ s64 timeout_jiffies = 0;
+
+ if (timeout_msecs) {
+#if HZ > 1000
+ /* We can only overflow if HZ > 1000 */
+ if (timeout_msecs / 1000 > (s64)0x7fffffffffffffffULL / (s64)HZ)
+ timeout_jiffies = -1;
+ else
+#endif
+ timeout_jiffies = msecs_to_jiffies(timeout_msecs);
+ }
+
+ return do_sys_poll(ufds, nfds, &timeout_jiffies);
+}
+
+#ifdef TIF_RESTORE_SIGMASK
+asmlinkage long sys_ppoll(struct pollfd __user *ufds, unsigned int nfds,
+ struct timespec __user *tsp, const sigset_t __user *sigmask,
+ size_t sigsetsize)
+{
+ sigset_t ksigmask, sigsaved;
+ struct timespec ts;
+ s64 timeout = -1;
+ int ret;
+
+ if (tsp) {
+ if (copy_from_user(&ts, tsp, sizeof(ts)))
+ return -EFAULT;
+
+ /* Cast to u64 to make GCC stop complaining */
+ if ((u64)ts.tv_sec >= (u64)MAX_INT64_SECONDS)
+ timeout = -1; /* infinite */
+ else {
+ timeout = ROUND_UP(ts.tv_nsec, NSEC_PER_SEC/HZ);
+ timeout += ts.tv_sec * HZ;
+ }
+ }
+
+ if (sigmask) {
+ /* XXX: Don't preclude handling different sized sigset_t's. */
+ if (sigsetsize != sizeof(sigset_t))
+ return -EINVAL;
+ if (copy_from_user(&ksigmask, sigmask, sizeof(ksigmask)))
+ return -EFAULT;
+
+ sigdelsetmask(&ksigmask, sigmask(SIGKILL)|sigmask(SIGSTOP));
+ sigprocmask(SIG_SETMASK, &ksigmask, &sigsaved);
+ }
+
+ ret = do_sys_poll(ufds, nfds, &timeout);
+
+ /* We can restart this syscall, usually */
+ if (ret == -EINTR) {
+ /*
+ * Don't restore the signal mask yet. Let do_signal() deliver
+ * the signal on the way back to userspace, before the signal
+ * mask is restored.
+ */
+ if (sigmask) {
+ memcpy(¤t->saved_sigmask, &sigsaved,
+ sizeof(sigsaved));
+ set_thread_flag(TIF_RESTORE_SIGMASK);
+ }
+ ret = -ERESTARTNOHAND;
+ } else if (sigmask)
+ sigprocmask(SIG_SETMASK, &sigsaved, NULL);
+
+ if (tsp && timeout >= 0) {
+ if (current->personality & STICKY_TIMEOUTS)
+ goto sticky;
+ /* Yes, we know it's actually an s64, but it's also positive. */
+ ts.tv_nsec = jiffies_to_usecs(do_div((*(u64*)&timeout), HZ)) * 1000;
+ ts.tv_sec = timeout;
+ if (copy_to_user(tsp, &ts, sizeof(ts))) {
+ sticky:
+ /*
+ * If an application puts its timeval in read-only
+ * memory, we don't want the Linux-specific update to
+ * the timeval to cause a fault after the select has
+ * completed successfully. However, because we're not
+ * updating the timeval, we can't restart the system
+ * call.
+ */
+ if (ret == -ERESTARTNOHAND && timeout >= 0)
+ ret = -EINTR;
+ }
+ }
+
+ return ret;
+}
+#endif /* TIF_RESTORE_SIGMASK */
EXPORT_SYMBOL(vfs_getattr);
-int vfs_stat(char __user *name, struct kstat *stat)
+int vfs_stat_fd(int dfd, char __user *name, struct kstat *stat)
{
struct nameidata nd;
int error;
- error = user_path_walk(name, &nd);
+ error = __user_walk_fd(dfd, name, LOOKUP_FOLLOW, &nd);
if (!error) {
error = vfs_getattr(nd.mnt, nd.dentry, stat);
path_release(&nd);
return error;
}
+int vfs_stat(char __user *name, struct kstat *stat)
+{
+ return vfs_stat_fd(AT_FDCWD, name, stat);
+}
+
EXPORT_SYMBOL(vfs_stat);
-int vfs_lstat(char __user *name, struct kstat *stat)
+int vfs_lstat_fd(int dfd, char __user *name, struct kstat *stat)
{
struct nameidata nd;
int error;
- error = user_path_walk_link(name, &nd);
+ error = __user_walk_fd(dfd, name, 0, &nd);
if (!error) {
error = vfs_getattr(nd.mnt, nd.dentry, stat);
path_release(&nd);
return error;
}
+int vfs_lstat(char __user *name, struct kstat *stat)
+{
+ return vfs_lstat_fd(AT_FDCWD, name, stat);
+}
+
EXPORT_SYMBOL(vfs_lstat);
int vfs_fstat(unsigned int fd, struct kstat *stat)
asmlinkage long sys_stat(char __user * filename, struct __old_kernel_stat __user * statbuf)
{
struct kstat stat;
- int error = vfs_stat(filename, &stat);
+ int error = vfs_stat_fd(AT_FDCWD, filename, &stat);
if (!error)
error = cp_old_stat(&stat, statbuf);
asmlinkage long sys_lstat(char __user * filename, struct __old_kernel_stat __user * statbuf)
{
struct kstat stat;
- int error = vfs_lstat(filename, &stat);
+ int error = vfs_lstat_fd(AT_FDCWD, filename, &stat);
if (!error)
error = cp_old_stat(&stat, statbuf);
return copy_to_user(statbuf,&tmp,sizeof(tmp)) ? -EFAULT : 0;
}
-asmlinkage long sys_newstat(char __user * filename, struct stat __user * statbuf)
+asmlinkage long sys_newstat(char __user *filename, struct stat __user *statbuf)
{
struct kstat stat;
- int error = vfs_stat(filename, &stat);
+ int error = vfs_stat_fd(AT_FDCWD, filename, &stat);
if (!error)
error = cp_new_stat(&stat, statbuf);
return error;
}
-asmlinkage long sys_newlstat(char __user * filename, struct stat __user * statbuf)
+
+asmlinkage long sys_newlstat(char __user *filename, struct stat __user *statbuf)
{
struct kstat stat;
- int error = vfs_lstat(filename, &stat);
+ int error = vfs_lstat_fd(AT_FDCWD, filename, &stat);
if (!error)
error = cp_new_stat(&stat, statbuf);
return error;
}
-asmlinkage long sys_newfstat(unsigned int fd, struct stat __user * statbuf)
+
+asmlinkage long sys_newfstatat(int dfd, char __user *filename,
+ struct stat __user *statbuf, int flag)
+{
+ struct kstat stat;
+ int error = -EINVAL;
+
+ if ((flag & ~AT_SYMLINK_NOFOLLOW) != 0)
+ goto out;
+
+ if (flag & AT_SYMLINK_NOFOLLOW)
+ error = vfs_lstat_fd(dfd, filename, &stat);
+ else
+ error = vfs_stat_fd(dfd, filename, &stat);
+
+ if (!error)
+ error = cp_new_stat(&stat, statbuf);
+
+out:
+ return error;
+}
+
+asmlinkage long sys_newfstat(unsigned int fd, struct stat __user *statbuf)
{
struct kstat stat;
int error = vfs_fstat(fd, &stat);
return error;
}
-asmlinkage long sys_readlink(const char __user * path, char __user * buf, int bufsiz)
+asmlinkage long sys_readlinkat(int dfd, const char __user *path,
+ char __user *buf, int bufsiz)
{
struct nameidata nd;
int error;
if (bufsiz <= 0)
return -EINVAL;
- error = user_path_walk_link(path, &nd);
+ error = __user_walk_fd(dfd, path, 0, &nd);
if (!error) {
struct inode * inode = nd.dentry->d_inode;
return error;
}
+asmlinkage long sys_readlink(const char __user *path, char __user *buf,
+ int bufsiz)
+{
+ return sys_readlinkat(AT_FDCWD, path, buf, bufsiz);
+}
+
/* ---------- LFS-64 ----------- */
#ifdef __ARCH_WANT_STAT64
}
/*
- * Submit all of the bios for all of the ioends we have saved up,
- * covering the initial writepage page and also any probed pages.
+ * Submit all of the bios for all of the ioends we have saved up, covering the
+ * initial writepage page and also any probed pages.
+ *
+ * Because we may have multiple ioends spanning a page, we need to start
+ * writeback on all the buffers before we submit them for I/O. If we mark the
+ * buffers as we got, then we can end up with a page that only has buffers
+ * marked async write and I/O complete on can occur before we mark the other
+ * buffers async write.
+ *
+ * The end result of this is that we trip a bug in end_page_writeback() because
+ * we call it twice for the one page as the code in end_buffer_async_write()
+ * assumes that all buffers on the page are started at the same time.
+ *
+ * The fix is two passes across the ioend list - one to start writeback on the
+ * bufferheads, and then the second one submit them for I/O.
*/
STATIC void
xfs_submit_ioend(
xfs_ioend_t *ioend)
{
+ xfs_ioend_t *head = ioend;
xfs_ioend_t *next;
struct buffer_head *bh;
struct bio *bio;
sector_t lastblock = 0;
+ /* Pass 1 - start writeback */
+ do {
+ next = ioend->io_list;
+ for (bh = ioend->io_buffer_head; bh; bh = bh->b_private) {
+ xfs_start_buffer_writeback(bh);
+ }
+ } while ((ioend = next) != NULL);
+
+ /* Pass 2 - submit I/O */
+ ioend = head;
do {
next = ioend->io_list;
bio = NULL;
for (bh = ioend->io_buffer_head; bh; bh = bh->b_private) {
- xfs_start_buffer_writeback(bh);
if (!bio) {
retry:
struct clk_functions {
int (*clk_enable)(struct clk *clk);
void (*clk_disable)(struct clk *clk);
- int (*clk_use)(struct clk *clk);
- void (*clk_unuse)(struct clk *clk);
long (*clk_round_rate)(struct clk *clk, unsigned long rate);
int (*clk_set_rate)(struct clk *clk, unsigned long rate);
int (*clk_set_parent)(struct clk *clk, struct clk *parent);
#define DCSR_STARTINTR (1 << 1) /* Start Interrupt (read / write) */
#define DCSR_BUSERR (1 << 0) /* Bus Error Interrupt (read / write) */
+#define DALGN __REG(0x400000a0) /* DMA Alignment Register */
#define DINT __REG(0x400000f0) /* DMA Interrupt Register */
#define DRCMR(n) __REG2(0x40000100, (n)<<2)
#define SSCR0_National (0x2 << 4) /* National Microwire */
#define SSCR0_ECS (1 << 6) /* External clock select */
#define SSCR0_SSE (1 << 7) /* Synchronous Serial Port Enable */
+#if defined(CONFIG_PXA25x)
#define SSCR0_SCR (0x0000ff00) /* Serial Clock Rate (mask) */
#define SSCR0_SerClkDiv(x) ((((x) - 2)/2) << 8) /* Divisor [2..512] */
+#elif defined(CONFIG_PXA27x)
+#define SSCR0_SCR (0x000fff00) /* Serial Clock Rate (mask) */
+#define SSCR0_SerClkDiv(x) (((x) - 1) << 8) /* Divisor [1..4096] */
+#define SSCR0_EDSS (1 << 20) /* Extended data size select */
+#define SSCR0_NCS (1 << 21) /* Network clock select */
+#define SSCR0_RIM (1 << 22) /* Receive FIFO overrrun interrupt mask */
+#define SSCR0_TUM (1 << 23) /* Transmit FIFO underrun interrupt mask */
+#define SSCR0_FRDC (0x07000000) /* Frame rate divider control (mask) */
+#define SSCR0_SlotsPerFrm(c) ((x) - 1) /* Time slots per frame [1..8] */
+#define SSCR0_ADC (1 << 30) /* Audio clock select */
+#define SSCR0_MOD (1 << 31) /* Mode (normal or network) */
+#endif
#define SSCR1_RIE (1 << 0) /* Receive FIFO Interrupt Enable */
#define SSCR1_TIE (1 << 1) /* Transmit FIFO Interrupt Enable */
.macro addruart, rx
mrc p15, 0, \rx, c1, c0
tst \rx, #1
- ldreq \rx, = S3C2410_PA_UART
+ ldreq \rx, = S3C24XX_PA_UART
ldrne \rx, = S3C24XX_VA_UART
#if CONFIG_DEBUG_S3C2410_UART != 0
add \rx, \rx, #(S3C2410_UART1_OFF * CONFIG_DEBUG_S3C2410_UART)
1003:
mrc p15, 0, \rd, c1, c0
tst \rd, #1
- addeq \rd, \rx, #(S3C2410_PA_GPIO - S3C2410_PA_UART)
+ addeq \rd, \rx, #(S3C24XX_PA_GPIO - S3C24XX_PA_UART)
addne \rd, \rx, #(S3C24XX_VA_GPIO - S3C24XX_VA_UART)
bic \rd, \rd, #0xff000
ldr \rd, [ \rd, # S3C2410_GSTATUS1 - S3C2410_GPIOREG(0) ]
1003:
mrc p15, 0, \rd, c1, c0
tst \rd, #1
- addeq \rd, \rx, #(S3C2410_PA_GPIO - S3C2410_PA_UART)
+ addeq \rd, \rx, #(S3C24XX_PA_GPIO - S3C24XX_PA_UART)
addne \rd, \rx, #(S3C24XX_VA_GPIO - S3C24XX_VA_UART)
bic \rd, \rd, #0xff000
ldr \rd, [ \rd, # S3C2410_GSTATUS1 - S3C2410_GPIOREG(0) ]
* 06-Jan-2003 BJD Linux 2.6.0 version, moved bast specifics out
* 10-Feb-2005 BJD Added CAMIF definition from guillaume.gourat@nexvision.tv
* 10-Mar-2005 LCVR Added support to S3C2400, changed {VA,SZ} names
+ * 15-Jan-2006 LCVR Added S3C24XX_PA macros for common S3C24XX resources
*/
#ifndef __ASM_ARCH_MAP_H
#define S3C2400_SDRAM_PA (S3C2400_CS6)
+/* Use a single interface for common resources between S3C24XX cpus */
+
+#ifdef CONFIG_CPU_S3C2400
+#define S3C24XX_PA_IRQ S3C2400_PA_IRQ
+#define S3C24XX_PA_MEMCTRL S3C2400_PA_MEMCTRL
+#define S3C24XX_PA_USBHOST S3C2400_PA_USBHOST
+#define S3C24XX_PA_DMA S3C2400_PA_DMA
+#define S3C24XX_PA_CLKPWR S3C2400_PA_CLKPWR
+#define S3C24XX_PA_LCD S3C2400_PA_LCD
+#define S3C24XX_PA_UART S3C2400_PA_UART
+#define S3C24XX_PA_TIMER S3C2400_PA_TIMER
+#define S3C24XX_PA_USBDEV S3C2400_PA_USBDEV
+#define S3C24XX_PA_WATCHDOG S3C2400_PA_WATCHDOG
+#define S3C24XX_PA_IIC S3C2400_PA_IIC
+#define S3C24XX_PA_IIS S3C2400_PA_IIS
+#define S3C24XX_PA_GPIO S3C2400_PA_GPIO
+#define S3C24XX_PA_RTC S3C2400_PA_RTC
+#define S3C24XX_PA_ADC S3C2400_PA_ADC
+#define S3C24XX_PA_SPI S3C2400_PA_SPI
+#else
+#define S3C24XX_PA_IRQ S3C2410_PA_IRQ
+#define S3C24XX_PA_MEMCTRL S3C2410_PA_MEMCTRL
+#define S3C24XX_PA_USBHOST S3C2410_PA_USBHOST
+#define S3C24XX_PA_DMA S3C2410_PA_DMA
+#define S3C24XX_PA_CLKPWR S3C2410_PA_CLKPWR
+#define S3C24XX_PA_LCD S3C2410_PA_LCD
+#define S3C24XX_PA_UART S3C2410_PA_UART
+#define S3C24XX_PA_TIMER S3C2410_PA_TIMER
+#define S3C24XX_PA_USBDEV S3C2410_PA_USBDEV
+#define S3C24XX_PA_WATCHDOG S3C2410_PA_WATCHDOG
+#define S3C24XX_PA_IIC S3C2410_PA_IIC
+#define S3C24XX_PA_IIS S3C2410_PA_IIS
+#define S3C24XX_PA_GPIO S3C2410_PA_GPIO
+#define S3C24XX_PA_RTC S3C2410_PA_RTC
+#define S3C24XX_PA_ADC S3C2410_PA_ADC
+#define S3C24XX_PA_SPI S3C2410_PA_SPI
+#endif
#endif /* __ASM_ARCH_MAP_H */
#define S3C24XX_VA_UART1 (S3C24XX_VA_UART + 0x4000 )
#define S3C24XX_VA_UART2 (S3C24XX_VA_UART + 0x8000 )
-#define S3C2410_PA_UART0 (S3C2410_PA_UART)
-#define S3C2410_PA_UART1 (S3C2410_PA_UART + 0x4000 )
-#define S3C2410_PA_UART2 (S3C2410_PA_UART + 0x8000 )
+#define S3C2410_PA_UART0 (S3C24XX_PA_UART)
+#define S3C2410_PA_UART1 (S3C24XX_PA_UART + 0x4000 )
+#define S3C2410_PA_UART2 (S3C24XX_PA_UART + 0x8000 )
#define S3C2410_URXH (0x24)
#define S3C2410_UTXH (0x20)
#undef S3C2410_GPIOREG
#undef S3C2410_WDOGREG
-#define S3C2410_GPIOREG(x) ((S3C2410_PA_GPIO + (x)))
-#define S3C2410_WDOGREG(x) ((S3C2410_PA_WATCHDOG + (x)))
+#define S3C2410_GPIOREG(x) ((S3C24XX_PA_GPIO + (x)))
+#define S3C2410_WDOGREG(x) ((S3C24XX_PA_WATCHDOG + (x)))
/* how many bytes we allow into the FIFO at a time in FIFO mode */
#define FIFO_MAX (14)
-#define uart_base S3C2410_PA_UART + (0x4000*CONFIG_S3C2410_LOWLEVEL_UART_PORT)
+#define uart_base S3C24XX_PA_UART + (0x4000*CONFIG_S3C2410_LOWLEVEL_UART_PORT)
static __inline__ void
uart_wr(unsigned int reg, unsigned int val)
#define MT_MEMORY 5
#define MT_ROM 6
#define MT_IXP2000_DEVICE 7
+#define MT_NONSHARED_DEVICE 8
extern void create_memmap_holes(struct meminfo *);
extern void memtable_init(struct meminfo *);
#define PMD_SECT_WB (PMD_SECT_CACHEABLE | PMD_SECT_BUFFERABLE)
#define PMD_SECT_MINICACHE (PMD_SECT_TEX(1) | PMD_SECT_CACHEABLE)
#define PMD_SECT_WBWA (PMD_SECT_TEX(1) | PMD_SECT_CACHEABLE | PMD_SECT_BUFFERABLE)
+#define PMD_SECT_NONSHARED_DEV (PMD_SECT_TEX(2))
/*
* - coarse table (not used)
#ifndef __ASMARM_CACHE_H
#define __ASMARM_CACHE_H
-#define L1_CACHE_BYTES 32
+#define L1_CACHE_SHIFT 5
+#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT)
#define L1_CACHE_ALIGN(x) (((x)+(L1_CACHE_BYTES-1))&~(L1_CACHE_BYTES-1))
#define SMP_CACHE_BYTES L1_CACHE_BYTES
return (struct thread_info *)(sp & ~0x1fff);
}
-/* FIXME - PAGE_SIZE < 32K */
-#define THREAD_SIZE (8*32768) // FIXME - this needs attention (see kernel/fork.c which gets a nice div by zero if this is lower than 8*32768
+#define THREAD_SIZE PAGE_SIZE
#define task_pt_regs(task) ((struct pt_regs *)(task_stack_page(task) + THREAD_SIZE - 8) - 1)
extern struct thread_info *alloc_thread_info(struct task_struct *task);
#define TIF_NEED_RESCHED 3 /* rescheduling necessary */
#define TIF_SINGLESTEP 4 /* restore singlestep on return to user mode */
#define TIF_IRET 5 /* return with iret */
+#define TIF_RESTORE_SIGMASK 6 /* restore signal mask in do_signal() */
#define TIF_POLLING_NRFLAG 16 /* true if poll_idle() is polling TIF_NEED_RESCHED */
#define TIF_MEMDIE 17 /* OOM killer killed process */
#define _TIF_NEED_RESCHED (1 << TIF_NEED_RESCHED)
#define _TIF_SINGLESTEP (1 << TIF_SINGLESTEP)
#define _TIF_IRET (1 << TIF_IRET)
+#define _TIF_RESTORE_SIGMASK (1 << TIF_RESTORE_SIGMASK)
#define _TIF_POLLING_NRFLAG (1 << TIF_POLLING_NRFLAG)
#define _TIF_WORK_MASK 0x0000FFFE /* work to do on interrupt/exception return */
/* #define __ARCH_WANT_SYS_SIGPENDING */
#define __ARCH_WANT_SYS_SIGPROCMASK
#define __ARCH_WANT_SYS_RT_SIGACTION
+#define __ARCH_WANT_SYS_RT_SIGSUSPEND
#endif
/*
--- /dev/null
+#ifndef ASM_EDAC_H
+#define ASM_EDAC_H
+
+/* ECC atomic, DMA, SMP and interrupt safe scrub function */
+
+static __inline__ void atomic_scrub(void *va, u32 size)
+{
+ unsigned long *virt_addr = va;
+ u32 i;
+
+ for (i = 0; i < size / 4; i++, virt_addr++)
+ /* Very carefully read and write to memory atomically
+ * so we are interrupt, DMA and SMP safe.
+ */
+ __asm__ __volatile__("lock; addl $0, %0"::"m"(*virt_addr));
+}
+
+#endif
if (op == FUTEX_OP_SET)
__futex_atomic_op1("xchgl %0, %2", ret, oldval, uaddr, oparg);
else {
-#if !defined(CONFIG_X86_BSWAP) && !defined(CONFIG_UML)
+#ifndef CONFIG_X86_BSWAP
if (boot_cpu_data.x86 == 3)
ret = -ENOSYS;
else
}
struct pt_regs;
-extern int FASTCALL(do_signal(struct pt_regs *regs, sigset_t *oldset));
#define ptrace_signal_deliver(regs, cookie) \
do { \
#define TIF_SYSCALL_EMU 6 /* syscall emulation active */
#define TIF_SYSCALL_AUDIT 7 /* syscall auditing active */
#define TIF_SECCOMP 8 /* secure computing */
+#define TIF_RESTORE_SIGMASK 9 /* restore signal mask in do_signal() */
#define TIF_POLLING_NRFLAG 16 /* true if poll_idle() is polling TIF_NEED_RESCHED */
#define TIF_MEMDIE 17
#define _TIF_SYSCALL_EMU (1<<TIF_SYSCALL_EMU)
#define _TIF_SYSCALL_AUDIT (1<<TIF_SYSCALL_AUDIT)
#define _TIF_SECCOMP (1<<TIF_SECCOMP)
+#define _TIF_RESTORE_SIGMASK (1<<TIF_RESTORE_SIGMASK)
#define _TIF_POLLING_NRFLAG (1<<TIF_POLLING_NRFLAG)
/* work to do on interrupt/exception return */
#define __NR_inotify_add_watch 292
#define __NR_inotify_rm_watch 293
#define __NR_migrate_pages 294
+#define __NR_openat 295
+#define __NR_mkdirat 296
+#define __NR_mknodat 297
+#define __NR_fchownat 298
+#define __NR_futimesat 299
+#define __NR_newfstatat 300
+#define __NR_unlinkat 301
+#define __NR_renameat 302
+#define __NR_linkat 303
+#define __NR_symlinkat 304
+#define __NR_readlinkat 305
+#define __NR_fchmodat 306
+#define __NR_faccessat 307
+#define __NR_pselect6 308
+#define __NR_ppoll 309
-#define NR_syscalls 295
+#define NR_syscalls 310
/*
* user-visible error numbers are in the range -1 - -128: see
#define __ARCH_WANT_SYS_SIGPENDING
#define __ARCH_WANT_SYS_SIGPROCMASK
#define __ARCH_WANT_SYS_RT_SIGACTION
+#define __ARCH_WANT_SYS_RT_SIGSUSPEND
#endif
#ifdef __KERNEL_SYSCALLS__
ia64_pal_cache_flush (u64 cache_type, u64 invalidate, u64 *progress, u64 *vector)
{
struct ia64_pal_retval iprv;
- PAL_CALL_IC_OFF(iprv, PAL_CACHE_FLUSH, cache_type, invalidate, *progress);
+ PAL_CALL(iprv, PAL_CACHE_FLUSH, cache_type, invalidate, *progress);
if (vector)
*vector = iprv.v0;
*progress = iprv.v1;
* Limits for PMC and PMD are set to less than maximum architected values
* but should be sufficient for a while
*/
-#define IA64_NUM_PMC_REGS 32
-#define IA64_NUM_PMD_REGS 32
+#define IA64_NUM_PMC_REGS 64
+#define IA64_NUM_PMD_REGS 64
#define DEFAULT_MAP_BASE __IA64_UL_CONST(0x2000000000000000)
#define DEFAULT_TASK_SIZE __IA64_UL_CONST(0xa000000000000000)
down (struct semaphore *sem)
{
might_sleep();
- if (atomic_dec_return(&sem->count) < 0)
+ if (ia64_fetchadd(-1, &sem->count.counter, acq) < 1)
__down(sem);
}
int ret = 0;
might_sleep();
- if (atomic_dec_return(&sem->count) < 0)
+ if (ia64_fetchadd(-1, &sem->count.counter, acq) < 1)
ret = __down_interruptible(sem);
return ret;
}
{
int ret = 0;
- if (atomic_dec_return(&sem->count) < 0)
+ if (ia64_fetchadd(-1, &sem->count.counter, acq) < 1)
ret = __down_trylock(sem);
return ret;
}
static inline void
up (struct semaphore * sem)
{
- if (atomic_inc_return(&sem->count) <= 0)
+ if (ia64_fetchadd(1, &sem->count.counter, rel) <= -1)
__up(sem);
}
int irq_cpuid; /* kernel logical cpuid */
int irq_irq; /* the IRQ number */
int irq_int_bit; /* Bridge interrupt pin */
- uint64_t irq_xtalkaddr; /* xtalkaddr IRQ is sent to */
+ u64 irq_xtalkaddr; /* xtalkaddr IRQ is sent to */
int irq_bridge_type;/* pciio asic type (pciio.h) */
void *irq_bridge; /* bridge generating irq */
void *irq_pciioinfo; /* associated pciio_info_t */
#define PCI32_MAPPED_BASE 0x40000000
#define PCI32_DIRECT_BASE 0x80000000
-#define IS_PCI32_MAPPED(x) ((uint64_t)(x) < PCI32_DIRECT_BASE && \
- (uint64_t)(x) >= PCI32_MAPPED_BASE)
-#define IS_PCI32_DIRECT(x) ((uint64_t)(x) >= PCI32_MAPPED_BASE)
+#define IS_PCI32_MAPPED(x) ((u64)(x) < PCI32_DIRECT_BASE && \
+ (u64)(x) >= PCI32_MAPPED_BASE)
+#define IS_PCI32_DIRECT(x) ((u64)(x) >= PCI32_MAPPED_BASE)
/*
(IOPG(IOPGOFF(addr) + (size) - 1) == IOPG((size) - 1))
#define MINIMAL_ATE_FLAG(addr, size) \
- (MINIMAL_ATES_REQUIRED((uint64_t)addr, size) ? 1 : 0)
+ (MINIMAL_ATES_REQUIRED((u64)addr, size) ? 1 : 0)
/* bit 29 of the pci address is the SWAP bit */
#define ATE_SWAPSHIFT 29
* PMU resources.
*/
struct ate_resource{
- uint64_t *ate;
- uint64_t num_ate;
- uint64_t lowest_free_index;
+ u64 *ate;
+ u64 num_ate;
+ u64 lowest_free_index;
};
struct pcibus_info {
struct pcibus_bussoft pbi_buscommon; /* common header */
- uint32_t pbi_moduleid;
+ u32 pbi_moduleid;
short pbi_bridge_type;
short pbi_bridge_mode;
struct ate_resource pbi_int_ate_resource;
- uint64_t pbi_int_ate_size;
+ u64 pbi_int_ate_size;
- uint64_t pbi_dir_xbase;
+ u64 pbi_dir_xbase;
char pbi_hub_xid;
- uint64_t pbi_devreg[8];
+ u64 pbi_devreg[8];
- uint32_t pbi_valid_devices;
- uint32_t pbi_enabled_devices;
+ u32 pbi_valid_devices;
+ u32 pbi_enabled_devices;
spinlock_t pbi_lock;
};
/*
* prototypes for the bridge asic register access routines in pcibr_reg.c
*/
-extern void pcireg_control_bit_clr(struct pcibus_info *, uint64_t);
-extern void pcireg_control_bit_set(struct pcibus_info *, uint64_t);
-extern uint64_t pcireg_tflush_get(struct pcibus_info *);
-extern uint64_t pcireg_intr_status_get(struct pcibus_info *);
-extern void pcireg_intr_enable_bit_clr(struct pcibus_info *, uint64_t);
-extern void pcireg_intr_enable_bit_set(struct pcibus_info *, uint64_t);
-extern void pcireg_intr_addr_addr_set(struct pcibus_info *, int, uint64_t);
+extern void pcireg_control_bit_clr(struct pcibus_info *, u64);
+extern void pcireg_control_bit_set(struct pcibus_info *, u64);
+extern u64 pcireg_tflush_get(struct pcibus_info *);
+extern u64 pcireg_intr_status_get(struct pcibus_info *);
+extern void pcireg_intr_enable_bit_clr(struct pcibus_info *, u64);
+extern void pcireg_intr_enable_bit_set(struct pcibus_info *, u64);
+extern void pcireg_intr_addr_addr_set(struct pcibus_info *, int, u64);
extern void pcireg_force_intr_set(struct pcibus_info *, int);
-extern uint64_t pcireg_wrb_flush_get(struct pcibus_info *, int);
-extern void pcireg_int_ate_set(struct pcibus_info *, int, uint64_t);
-extern uint64_t * pcireg_int_ate_addr(struct pcibus_info *, int);
+extern u64 pcireg_wrb_flush_get(struct pcibus_info *, int);
+extern void pcireg_int_ate_set(struct pcibus_info *, int, u64);
+extern u64 * pcireg_int_ate_addr(struct pcibus_info *, int);
extern void pcibr_force_interrupt(struct sn_irq_info *sn_irq_info);
extern void pcibr_change_devices_irq(struct sn_irq_info *sn_irq_info);
extern int pcibr_ate_alloc(struct pcibus_info *, int);
extern void pcibr_ate_free(struct pcibus_info *, int);
-extern void ate_write(struct pcibus_info *, int, int, uint64_t);
+extern void ate_write(struct pcibus_info *, int, int, u64);
extern int sal_pcibr_slot_enable(struct pcibus_info *soft, int device,
void *resp);
extern int sal_pcibr_slot_disable(struct pcibus_info *soft, int device,
*/
struct pcibus_bussoft {
- uint32_t bs_asic_type; /* chipset type */
- uint32_t bs_xid; /* xwidget id */
- uint32_t bs_persist_busnum; /* Persistent Bus Number */
- uint32_t bs_persist_segment; /* Segment Number */
- uint64_t bs_legacy_io; /* legacy io pio addr */
- uint64_t bs_legacy_mem; /* legacy mem pio addr */
- uint64_t bs_base; /* widget base */
+ u32 bs_asic_type; /* chipset type */
+ u32 bs_xid; /* xwidget id */
+ u32 bs_persist_busnum; /* Persistent Bus Number */
+ u32 bs_persist_segment; /* Segment Number */
+ u64 bs_legacy_io; /* legacy io pio addr */
+ u64 bs_legacy_mem; /* legacy mem pio addr */
+ u64 bs_base; /* widget base */
struct xwidget_info *bs_xwidget_info;
};
#define PCIIO_VENDOR_ID_NONE (-1)
struct pcidev_info {
- uint64_t pdi_pio_mapped_addr[7]; /* 6 BARs PLUS 1 ROM */
- uint64_t pdi_slot_host_handle; /* Bus and devfn Host pci_dev */
+ u64 pdi_pio_mapped_addr[7]; /* 6 BARs PLUS 1 ROM */
+ u64 pdi_slot_host_handle; /* Bus and devfn Host pci_dev */
struct pcibus_bussoft *pdi_pcibus_info; /* Kernel common bus soft */
struct pcidev_info *pdi_host_pcidev_info; /* Kernel Host pci_dev */
/* 0x000000-0x00FFFF -- Local Registers */
/* 0x000000-0x000057 -- Standard Widget Configuration */
- uint64_t p_wid_id; /* 0x000000 */
- uint64_t p_wid_stat; /* 0x000008 */
- uint64_t p_wid_err_upper; /* 0x000010 */
- uint64_t p_wid_err_lower; /* 0x000018 */
+ u64 p_wid_id; /* 0x000000 */
+ u64 p_wid_stat; /* 0x000008 */
+ u64 p_wid_err_upper; /* 0x000010 */
+ u64 p_wid_err_lower; /* 0x000018 */
#define p_wid_err p_wid_err_lower
- uint64_t p_wid_control; /* 0x000020 */
- uint64_t p_wid_req_timeout; /* 0x000028 */
- uint64_t p_wid_int_upper; /* 0x000030 */
- uint64_t p_wid_int_lower; /* 0x000038 */
+ u64 p_wid_control; /* 0x000020 */
+ u64 p_wid_req_timeout; /* 0x000028 */
+ u64 p_wid_int_upper; /* 0x000030 */
+ u64 p_wid_int_lower; /* 0x000038 */
#define p_wid_int p_wid_int_lower
- uint64_t p_wid_err_cmdword; /* 0x000040 */
- uint64_t p_wid_llp; /* 0x000048 */
- uint64_t p_wid_tflush; /* 0x000050 */
+ u64 p_wid_err_cmdword; /* 0x000040 */
+ u64 p_wid_llp; /* 0x000048 */
+ u64 p_wid_tflush; /* 0x000050 */
/* 0x000058-0x00007F -- Bridge-specific Widget Configuration */
- uint64_t p_wid_aux_err; /* 0x000058 */
- uint64_t p_wid_resp_upper; /* 0x000060 */
- uint64_t p_wid_resp_lower; /* 0x000068 */
+ u64 p_wid_aux_err; /* 0x000058 */
+ u64 p_wid_resp_upper; /* 0x000060 */
+ u64 p_wid_resp_lower; /* 0x000068 */
#define p_wid_resp p_wid_resp_lower
- uint64_t p_wid_tst_pin_ctrl; /* 0x000070 */
- uint64_t p_wid_addr_lkerr; /* 0x000078 */
+ u64 p_wid_tst_pin_ctrl; /* 0x000070 */
+ u64 p_wid_addr_lkerr; /* 0x000078 */
/* 0x000080-0x00008F -- PMU & MAP */
- uint64_t p_dir_map; /* 0x000080 */
- uint64_t _pad_000088; /* 0x000088 */
+ u64 p_dir_map; /* 0x000080 */
+ u64 _pad_000088; /* 0x000088 */
/* 0x000090-0x00009F -- SSRAM */
- uint64_t p_map_fault; /* 0x000090 */
- uint64_t _pad_000098; /* 0x000098 */
+ u64 p_map_fault; /* 0x000090 */
+ u64 _pad_000098; /* 0x000098 */
/* 0x0000A0-0x0000AF -- Arbitration */
- uint64_t p_arb; /* 0x0000A0 */
- uint64_t _pad_0000A8; /* 0x0000A8 */
+ u64 p_arb; /* 0x0000A0 */
+ u64 _pad_0000A8; /* 0x0000A8 */
/* 0x0000B0-0x0000BF -- Number In A Can or ATE Parity Error */
- uint64_t p_ate_parity_err; /* 0x0000B0 */
- uint64_t _pad_0000B8; /* 0x0000B8 */
+ u64 p_ate_parity_err; /* 0x0000B0 */
+ u64 _pad_0000B8; /* 0x0000B8 */
/* 0x0000C0-0x0000FF -- PCI/GIO */
- uint64_t p_bus_timeout; /* 0x0000C0 */
- uint64_t p_pci_cfg; /* 0x0000C8 */
- uint64_t p_pci_err_upper; /* 0x0000D0 */
- uint64_t p_pci_err_lower; /* 0x0000D8 */
+ u64 p_bus_timeout; /* 0x0000C0 */
+ u64 p_pci_cfg; /* 0x0000C8 */
+ u64 p_pci_err_upper; /* 0x0000D0 */
+ u64 p_pci_err_lower; /* 0x0000D8 */
#define p_pci_err p_pci_err_lower
- uint64_t _pad_0000E0[4]; /* 0x0000{E0..F8} */
+ u64 _pad_0000E0[4]; /* 0x0000{E0..F8} */
/* 0x000100-0x0001FF -- Interrupt */
- uint64_t p_int_status; /* 0x000100 */
- uint64_t p_int_enable; /* 0x000108 */
- uint64_t p_int_rst_stat; /* 0x000110 */
- uint64_t p_int_mode; /* 0x000118 */
- uint64_t p_int_device; /* 0x000120 */
- uint64_t p_int_host_err; /* 0x000128 */
- uint64_t p_int_addr[8]; /* 0x0001{30,,,68} */
- uint64_t p_err_int_view; /* 0x000170 */
- uint64_t p_mult_int; /* 0x000178 */
- uint64_t p_force_always[8]; /* 0x0001{80,,,B8} */
- uint64_t p_force_pin[8]; /* 0x0001{C0,,,F8} */
+ u64 p_int_status; /* 0x000100 */
+ u64 p_int_enable; /* 0x000108 */
+ u64 p_int_rst_stat; /* 0x000110 */
+ u64 p_int_mode; /* 0x000118 */
+ u64 p_int_device; /* 0x000120 */
+ u64 p_int_host_err; /* 0x000128 */
+ u64 p_int_addr[8]; /* 0x0001{30,,,68} */
+ u64 p_err_int_view; /* 0x000170 */
+ u64 p_mult_int; /* 0x000178 */
+ u64 p_force_always[8]; /* 0x0001{80,,,B8} */
+ u64 p_force_pin[8]; /* 0x0001{C0,,,F8} */
/* 0x000200-0x000298 -- Device */
- uint64_t p_device[4]; /* 0x0002{00,,,18} */
- uint64_t _pad_000220[4]; /* 0x0002{20,,,38} */
- uint64_t p_wr_req_buf[4]; /* 0x0002{40,,,58} */
- uint64_t _pad_000260[4]; /* 0x0002{60,,,78} */
- uint64_t p_rrb_map[2]; /* 0x0002{80,,,88} */
+ u64 p_device[4]; /* 0x0002{00,,,18} */
+ u64 _pad_000220[4]; /* 0x0002{20,,,38} */
+ u64 p_wr_req_buf[4]; /* 0x0002{40,,,58} */
+ u64 _pad_000260[4]; /* 0x0002{60,,,78} */
+ u64 p_rrb_map[2]; /* 0x0002{80,,,88} */
#define p_even_resp p_rrb_map[0] /* 0x000280 */
#define p_odd_resp p_rrb_map[1] /* 0x000288 */
- uint64_t p_resp_status; /* 0x000290 */
- uint64_t p_resp_clear; /* 0x000298 */
+ u64 p_resp_status; /* 0x000290 */
+ u64 p_resp_clear; /* 0x000298 */
- uint64_t _pad_0002A0[12]; /* 0x0002{A0..F8} */
+ u64 _pad_0002A0[12]; /* 0x0002{A0..F8} */
/* 0x000300-0x0003F8 -- Buffer Address Match Registers */
struct {
- uint64_t upper; /* 0x0003{00,,,F0} */
- uint64_t lower; /* 0x0003{08,,,F8} */
+ u64 upper; /* 0x0003{00,,,F0} */
+ u64 lower; /* 0x0003{08,,,F8} */
} p_buf_addr_match[16];
/* 0x000400-0x0005FF -- Performance Monitor Registers (even only) */
struct {
- uint64_t flush_w_touch; /* 0x000{400,,,5C0} */
- uint64_t flush_wo_touch; /* 0x000{408,,,5C8} */
- uint64_t inflight; /* 0x000{410,,,5D0} */
- uint64_t prefetch; /* 0x000{418,,,5D8} */
- uint64_t total_pci_retry; /* 0x000{420,,,5E0} */
- uint64_t max_pci_retry; /* 0x000{428,,,5E8} */
- uint64_t max_latency; /* 0x000{430,,,5F0} */
- uint64_t clear_all; /* 0x000{438,,,5F8} */
+ u64 flush_w_touch; /* 0x000{400,,,5C0} */
+ u64 flush_wo_touch; /* 0x000{408,,,5C8} */
+ u64 inflight; /* 0x000{410,,,5D0} */
+ u64 prefetch; /* 0x000{418,,,5D8} */
+ u64 total_pci_retry; /* 0x000{420,,,5E0} */
+ u64 max_pci_retry; /* 0x000{428,,,5E8} */
+ u64 max_latency; /* 0x000{430,,,5F0} */
+ u64 clear_all; /* 0x000{438,,,5F8} */
} p_buf_count[8];
/* 0x000600-0x0009FF -- PCI/X registers */
- uint64_t p_pcix_bus_err_addr; /* 0x000600 */
- uint64_t p_pcix_bus_err_attr; /* 0x000608 */
- uint64_t p_pcix_bus_err_data; /* 0x000610 */
- uint64_t p_pcix_pio_split_addr; /* 0x000618 */
- uint64_t p_pcix_pio_split_attr; /* 0x000620 */
- uint64_t p_pcix_dma_req_err_attr; /* 0x000628 */
- uint64_t p_pcix_dma_req_err_addr; /* 0x000630 */
- uint64_t p_pcix_timeout; /* 0x000638 */
+ u64 p_pcix_bus_err_addr; /* 0x000600 */
+ u64 p_pcix_bus_err_attr; /* 0x000608 */
+ u64 p_pcix_bus_err_data; /* 0x000610 */
+ u64 p_pcix_pio_split_addr; /* 0x000618 */
+ u64 p_pcix_pio_split_attr; /* 0x000620 */
+ u64 p_pcix_dma_req_err_attr; /* 0x000628 */
+ u64 p_pcix_dma_req_err_addr; /* 0x000630 */
+ u64 p_pcix_timeout; /* 0x000638 */
- uint64_t _pad_000640[120]; /* 0x000{640,,,9F8} */
+ u64 _pad_000640[120]; /* 0x000{640,,,9F8} */
/* 0x000A00-0x000BFF -- PCI/X Read&Write Buffer */
struct {
- uint64_t p_buf_addr; /* 0x000{A00,,,AF0} */
- uint64_t p_buf_attr; /* 0X000{A08,,,AF8} */
+ u64 p_buf_addr; /* 0x000{A00,,,AF0} */
+ u64 p_buf_attr; /* 0X000{A08,,,AF8} */
} p_pcix_read_buf_64[16];
struct {
- uint64_t p_buf_addr; /* 0x000{B00,,,BE0} */
- uint64_t p_buf_attr; /* 0x000{B08,,,BE8} */
- uint64_t p_buf_valid; /* 0x000{B10,,,BF0} */
- uint64_t __pad1; /* 0x000{B18,,,BF8} */
+ u64 p_buf_addr; /* 0x000{B00,,,BE0} */
+ u64 p_buf_attr; /* 0x000{B08,,,BE8} */
+ u64 p_buf_valid; /* 0x000{B10,,,BF0} */
+ u64 __pad1; /* 0x000{B18,,,BF8} */
} p_pcix_write_buf_64[8];
/* End of Local Registers -- Start of Address Map space */
char _pad_000c00[0x010000 - 0x000c00];
/* 0x010000-0x011fff -- Internal ATE RAM (Auto Parity Generation) */
- uint64_t p_int_ate_ram[1024]; /* 0x010000-0x011fff */
+ u64 p_int_ate_ram[1024]; /* 0x010000-0x011fff */
/* 0x012000-0x013fff -- Internal ATE RAM (Manual Parity Generation) */
- uint64_t p_int_ate_ram_mp[1024]; /* 0x012000-0x013fff */
+ u64 p_int_ate_ram_mp[1024]; /* 0x012000-0x013fff */
char _pad_014000[0x18000 - 0x014000];
/* 0x18000-0x197F8 -- PIC Write Request Ram */
- uint64_t p_wr_req_lower[256]; /* 0x18000 - 0x187F8 */
- uint64_t p_wr_req_upper[256]; /* 0x18800 - 0x18FF8 */
- uint64_t p_wr_req_parity[256]; /* 0x19000 - 0x197F8 */
+ u64 p_wr_req_lower[256]; /* 0x18000 - 0x187F8 */
+ u64 p_wr_req_upper[256]; /* 0x18800 - 0x18FF8 */
+ u64 p_wr_req_parity[256]; /* 0x19000 - 0x197F8 */
char _pad_019800[0x20000 - 0x019800];
/* 0x020000-0x027FFF -- PCI Device Configuration Spaces */
union {
- uint8_t c[0x1000 / 1]; /* 0x02{0000,,,7FFF} */
- uint16_t s[0x1000 / 2]; /* 0x02{0000,,,7FFF} */
- uint32_t l[0x1000 / 4]; /* 0x02{0000,,,7FFF} */
- uint64_t d[0x1000 / 8]; /* 0x02{0000,,,7FFF} */
+ u8 c[0x1000 / 1]; /* 0x02{0000,,,7FFF} */
+ u16 s[0x1000 / 2]; /* 0x02{0000,,,7FFF} */
+ u32 l[0x1000 / 4]; /* 0x02{0000,,,7FFF} */
+ u64 d[0x1000 / 8]; /* 0x02{0000,,,7FFF} */
union {
- uint8_t c[0x100 / 1];
- uint16_t s[0x100 / 2];
- uint32_t l[0x100 / 4];
- uint64_t d[0x100 / 8];
+ u8 c[0x100 / 1];
+ u16 s[0x100 / 2];
+ u32 l[0x100 / 4];
+ u64 d[0x100 / 8];
} f[8];
} p_type0_cfg_dev[8]; /* 0x02{0000,,,7FFF} */
/* 0x028000-0x028FFF -- PCI Type 1 Configuration Space */
union {
- uint8_t c[0x1000 / 1]; /* 0x028000-0x029000 */
- uint16_t s[0x1000 / 2]; /* 0x028000-0x029000 */
- uint32_t l[0x1000 / 4]; /* 0x028000-0x029000 */
- uint64_t d[0x1000 / 8]; /* 0x028000-0x029000 */
+ u8 c[0x1000 / 1]; /* 0x028000-0x029000 */
+ u16 s[0x1000 / 2]; /* 0x028000-0x029000 */
+ u32 l[0x1000 / 4]; /* 0x028000-0x029000 */
+ u64 d[0x1000 / 8]; /* 0x028000-0x029000 */
union {
- uint8_t c[0x100 / 1];
- uint16_t s[0x100 / 2];
- uint32_t l[0x100 / 4];
- uint64_t d[0x100 / 8];
+ u8 c[0x100 / 1];
+ u16 s[0x100 / 2];
+ u32 l[0x100 / 4];
+ u64 d[0x100 / 8];
} f[8];
} p_type1_cfg; /* 0x028000-0x029000 */
/* 0x030000-0x030007 -- PCI Interrupt Acknowledge Cycle */
union {
- uint8_t c[8 / 1];
- uint16_t s[8 / 2];
- uint32_t l[8 / 4];
- uint64_t d[8 / 8];
+ u8 c[8 / 1];
+ u16 s[8 / 2];
+ u32 l[8 / 4];
+ u64 d[8 / 8];
} p_pci_iack; /* 0x030000-0x030007 */
char _pad_030007[0x040000-0x030008];
/* 0x040000-0x030007 -- PCIX Special Cycle */
union {
- uint8_t c[8 / 1];
- uint16_t s[8 / 2];
- uint32_t l[8 / 4];
- uint64_t d[8 / 8];
+ u8 c[8 / 1];
+ u16 s[8 / 2];
+ u32 l[8 / 4];
+ u64 d[8 / 8];
} p_pcix_cycle; /* 0x040000-0x040007 */
};
************************************************************************/
typedef union ii_wid_u {
- uint64_t ii_wid_regval;
+ u64 ii_wid_regval;
struct {
- uint64_t w_rsvd_1:1;
- uint64_t w_mfg_num:11;
- uint64_t w_part_num:16;
- uint64_t w_rev_num:4;
- uint64_t w_rsvd:32;
+ u64 w_rsvd_1:1;
+ u64 w_mfg_num:11;
+ u64 w_part_num:16;
+ u64 w_rev_num:4;
+ u64 w_rsvd:32;
} ii_wid_fld_s;
} ii_wid_u_t;
************************************************************************/
typedef union ii_wstat_u {
- uint64_t ii_wstat_regval;
- struct {
- uint64_t w_pending:4;
- uint64_t w_xt_crd_to:1;
- uint64_t w_xt_tail_to:1;
- uint64_t w_rsvd_3:3;
- uint64_t w_tx_mx_rty:1;
- uint64_t w_rsvd_2:6;
- uint64_t w_llp_tx_cnt:8;
- uint64_t w_rsvd_1:8;
- uint64_t w_crazy:1;
- uint64_t w_rsvd:31;
+ u64 ii_wstat_regval;
+ struct {
+ u64 w_pending:4;
+ u64 w_xt_crd_to:1;
+ u64 w_xt_tail_to:1;
+ u64 w_rsvd_3:3;
+ u64 w_tx_mx_rty:1;
+ u64 w_rsvd_2:6;
+ u64 w_llp_tx_cnt:8;
+ u64 w_rsvd_1:8;
+ u64 w_crazy:1;
+ u64 w_rsvd:31;
} ii_wstat_fld_s;
} ii_wstat_u_t;
************************************************************************/
typedef union ii_wcr_u {
- uint64_t ii_wcr_regval;
- struct {
- uint64_t w_wid:4;
- uint64_t w_tag:1;
- uint64_t w_rsvd_1:8;
- uint64_t w_dst_crd:3;
- uint64_t w_f_bad_pkt:1;
- uint64_t w_dir_con:1;
- uint64_t w_e_thresh:5;
- uint64_t w_rsvd:41;
+ u64 ii_wcr_regval;
+ struct {
+ u64 w_wid:4;
+ u64 w_tag:1;
+ u64 w_rsvd_1:8;
+ u64 w_dst_crd:3;
+ u64 w_f_bad_pkt:1;
+ u64 w_dir_con:1;
+ u64 w_e_thresh:5;
+ u64 w_rsvd:41;
} ii_wcr_fld_s;
} ii_wcr_u_t;
************************************************************************/
typedef union ii_ilapr_u {
- uint64_t ii_ilapr_regval;
+ u64 ii_ilapr_regval;
struct {
- uint64_t i_region:64;
+ u64 i_region:64;
} ii_ilapr_fld_s;
} ii_ilapr_u_t;
************************************************************************/
typedef union ii_ilapo_u {
- uint64_t ii_ilapo_regval;
+ u64 ii_ilapo_regval;
struct {
- uint64_t i_io_ovrride:64;
+ u64 i_io_ovrride:64;
} ii_ilapo_fld_s;
} ii_ilapo_u_t;
************************************************************************/
typedef union ii_iowa_u {
- uint64_t ii_iowa_regval;
+ u64 ii_iowa_regval;
struct {
- uint64_t i_w0_oac:1;
- uint64_t i_rsvd_1:7;
- uint64_t i_wx_oac:8;
- uint64_t i_rsvd:48;
+ u64 i_w0_oac:1;
+ u64 i_rsvd_1:7;
+ u64 i_wx_oac:8;
+ u64 i_rsvd:48;
} ii_iowa_fld_s;
} ii_iowa_u_t;
************************************************************************/
typedef union ii_iiwa_u {
- uint64_t ii_iiwa_regval;
+ u64 ii_iiwa_regval;
struct {
- uint64_t i_w0_iac:1;
- uint64_t i_rsvd_1:7;
- uint64_t i_wx_iac:8;
- uint64_t i_rsvd:48;
+ u64 i_w0_iac:1;
+ u64 i_rsvd_1:7;
+ u64 i_wx_iac:8;
+ u64 i_rsvd:48;
} ii_iiwa_fld_s;
} ii_iiwa_u_t;
************************************************************************/
typedef union ii_iidem_u {
- uint64_t ii_iidem_regval;
- struct {
- uint64_t i_w8_dxs:8;
- uint64_t i_w9_dxs:8;
- uint64_t i_wa_dxs:8;
- uint64_t i_wb_dxs:8;
- uint64_t i_wc_dxs:8;
- uint64_t i_wd_dxs:8;
- uint64_t i_we_dxs:8;
- uint64_t i_wf_dxs:8;
+ u64 ii_iidem_regval;
+ struct {
+ u64 i_w8_dxs:8;
+ u64 i_w9_dxs:8;
+ u64 i_wa_dxs:8;
+ u64 i_wb_dxs:8;
+ u64 i_wc_dxs:8;
+ u64 i_wd_dxs:8;
+ u64 i_we_dxs:8;
+ u64 i_wf_dxs:8;
} ii_iidem_fld_s;
} ii_iidem_u_t;
************************************************************************/
typedef union ii_ilcsr_u {
- uint64_t ii_ilcsr_regval;
- struct {
- uint64_t i_nullto:6;
- uint64_t i_rsvd_4:2;
- uint64_t i_wrmrst:1;
- uint64_t i_rsvd_3:1;
- uint64_t i_llp_en:1;
- uint64_t i_bm8:1;
- uint64_t i_llp_stat:2;
- uint64_t i_remote_power:1;
- uint64_t i_rsvd_2:1;
- uint64_t i_maxrtry:10;
- uint64_t i_d_avail_sel:2;
- uint64_t i_rsvd_1:4;
- uint64_t i_maxbrst:10;
- uint64_t i_rsvd:22;
+ u64 ii_ilcsr_regval;
+ struct {
+ u64 i_nullto:6;
+ u64 i_rsvd_4:2;
+ u64 i_wrmrst:1;
+ u64 i_rsvd_3:1;
+ u64 i_llp_en:1;
+ u64 i_bm8:1;
+ u64 i_llp_stat:2;
+ u64 i_remote_power:1;
+ u64 i_rsvd_2:1;
+ u64 i_maxrtry:10;
+ u64 i_d_avail_sel:2;
+ u64 i_rsvd_1:4;
+ u64 i_maxbrst:10;
+ u64 i_rsvd:22;
} ii_ilcsr_fld_s;
} ii_ilcsr_u_t;
************************************************************************/
typedef union ii_illr_u {
- uint64_t ii_illr_regval;
+ u64 ii_illr_regval;
struct {
- uint64_t i_sn_cnt:16;
- uint64_t i_cb_cnt:16;
- uint64_t i_rsvd:32;
+ u64 i_sn_cnt:16;
+ u64 i_cb_cnt:16;
+ u64 i_rsvd:32;
} ii_illr_fld_s;
} ii_illr_u_t;
************************************************************************/
typedef union ii_iidsr_u {
- uint64_t ii_iidsr_regval;
- struct {
- uint64_t i_level:8;
- uint64_t i_pi_id:1;
- uint64_t i_node:11;
- uint64_t i_rsvd_3:4;
- uint64_t i_enable:1;
- uint64_t i_rsvd_2:3;
- uint64_t i_int_sent:2;
- uint64_t i_rsvd_1:2;
- uint64_t i_pi0_forward_int:1;
- uint64_t i_pi1_forward_int:1;
- uint64_t i_rsvd:30;
+ u64 ii_iidsr_regval;
+ struct {
+ u64 i_level:8;
+ u64 i_pi_id:1;
+ u64 i_node:11;
+ u64 i_rsvd_3:4;
+ u64 i_enable:1;
+ u64 i_rsvd_2:3;
+ u64 i_int_sent:2;
+ u64 i_rsvd_1:2;
+ u64 i_pi0_forward_int:1;
+ u64 i_pi1_forward_int:1;
+ u64 i_rsvd:30;
} ii_iidsr_fld_s;
} ii_iidsr_u_t;
************************************************************************/
typedef union ii_igfx0_u {
- uint64_t ii_igfx0_regval;
+ u64 ii_igfx0_regval;
struct {
- uint64_t i_w_num:4;
- uint64_t i_pi_id:1;
- uint64_t i_n_num:12;
- uint64_t i_p_num:1;
- uint64_t i_rsvd:46;
+ u64 i_w_num:4;
+ u64 i_pi_id:1;
+ u64 i_n_num:12;
+ u64 i_p_num:1;
+ u64 i_rsvd:46;
} ii_igfx0_fld_s;
} ii_igfx0_u_t;
************************************************************************/
typedef union ii_igfx1_u {
- uint64_t ii_igfx1_regval;
+ u64 ii_igfx1_regval;
struct {
- uint64_t i_w_num:4;
- uint64_t i_pi_id:1;
- uint64_t i_n_num:12;
- uint64_t i_p_num:1;
- uint64_t i_rsvd:46;
+ u64 i_w_num:4;
+ u64 i_pi_id:1;
+ u64 i_n_num:12;
+ u64 i_p_num:1;
+ u64 i_rsvd:46;
} ii_igfx1_fld_s;
} ii_igfx1_u_t;
************************************************************************/
typedef union ii_iscr0_u {
- uint64_t ii_iscr0_regval;
+ u64 ii_iscr0_regval;
struct {
- uint64_t i_scratch:64;
+ u64 i_scratch:64;
} ii_iscr0_fld_s;
} ii_iscr0_u_t;
************************************************************************/
typedef union ii_iscr1_u {
- uint64_t ii_iscr1_regval;
+ u64 ii_iscr1_regval;
struct {
- uint64_t i_scratch:64;
+ u64 i_scratch:64;
} ii_iscr1_fld_s;
} ii_iscr1_u_t;
************************************************************************/
typedef union ii_itte1_u {
- uint64_t ii_itte1_regval;
+ u64 ii_itte1_regval;
struct {
- uint64_t i_offset:5;
- uint64_t i_rsvd_1:3;
- uint64_t i_w_num:4;
- uint64_t i_iosp:1;
- uint64_t i_rsvd:51;
+ u64 i_offset:5;
+ u64 i_rsvd_1:3;
+ u64 i_w_num:4;
+ u64 i_iosp:1;
+ u64 i_rsvd:51;
} ii_itte1_fld_s;
} ii_itte1_u_t;
************************************************************************/
typedef union ii_itte2_u {
- uint64_t ii_itte2_regval;
+ u64 ii_itte2_regval;
struct {
- uint64_t i_offset:5;
- uint64_t i_rsvd_1:3;
- uint64_t i_w_num:4;
- uint64_t i_iosp:1;
- uint64_t i_rsvd:51;
+ u64 i_offset:5;
+ u64 i_rsvd_1:3;
+ u64 i_w_num:4;
+ u64 i_iosp:1;
+ u64 i_rsvd:51;
} ii_itte2_fld_s;
} ii_itte2_u_t;
************************************************************************/
typedef union ii_itte3_u {
- uint64_t ii_itte3_regval;
+ u64 ii_itte3_regval;
struct {
- uint64_t i_offset:5;
- uint64_t i_rsvd_1:3;
- uint64_t i_w_num:4;
- uint64_t i_iosp:1;
- uint64_t i_rsvd:51;
+ u64 i_offset:5;
+ u64 i_rsvd_1:3;
+ u64 i_w_num:4;
+ u64 i_iosp:1;
+ u64 i_rsvd:51;
} ii_itte3_fld_s;
} ii_itte3_u_t;
************************************************************************/
typedef union ii_itte4_u {
- uint64_t ii_itte4_regval;
+ u64 ii_itte4_regval;
struct {
- uint64_t i_offset:5;
- uint64_t i_rsvd_1:3;
- uint64_t i_w_num:4;
- uint64_t i_iosp:1;
- uint64_t i_rsvd:51;
+ u64 i_offset:5;
+ u64 i_rsvd_1:3;
+ u64 i_w_num:4;
+ u64 i_iosp:1;
+ u64 i_rsvd:51;
} ii_itte4_fld_s;
} ii_itte4_u_t;
************************************************************************/
typedef union ii_itte5_u {
- uint64_t ii_itte5_regval;
+ u64 ii_itte5_regval;
struct {
- uint64_t i_offset:5;
- uint64_t i_rsvd_1:3;
- uint64_t i_w_num:4;
- uint64_t i_iosp:1;
- uint64_t i_rsvd:51;
+ u64 i_offset:5;
+ u64 i_rsvd_1:3;
+ u64 i_w_num:4;
+ u64 i_iosp:1;
+ u64 i_rsvd:51;
} ii_itte5_fld_s;
} ii_itte5_u_t;
************************************************************************/
typedef union ii_itte6_u {
- uint64_t ii_itte6_regval;
+ u64 ii_itte6_regval;
struct {
- uint64_t i_offset:5;
- uint64_t i_rsvd_1:3;
- uint64_t i_w_num:4;
- uint64_t i_iosp:1;
- uint64_t i_rsvd:51;
+ u64 i_offset:5;
+ u64 i_rsvd_1:3;
+ u64 i_w_num:4;
+ u64 i_iosp:1;
+ u64 i_rsvd:51;
} ii_itte6_fld_s;
} ii_itte6_u_t;
************************************************************************/
typedef union ii_itte7_u {
- uint64_t ii_itte7_regval;
+ u64 ii_itte7_regval;
struct {
- uint64_t i_offset:5;
- uint64_t i_rsvd_1:3;
- uint64_t i_w_num:4;
- uint64_t i_iosp:1;
- uint64_t i_rsvd:51;
+ u64 i_offset:5;
+ u64 i_rsvd_1:3;
+ u64 i_w_num:4;
+ u64 i_iosp:1;
+ u64 i_rsvd:51;
} ii_itte7_fld_s;
} ii_itte7_u_t;
************************************************************************/
typedef union ii_iprb0_u {
- uint64_t ii_iprb0_regval;
- struct {
- uint64_t i_c:8;
- uint64_t i_na:14;
- uint64_t i_rsvd_2:2;
- uint64_t i_nb:14;
- uint64_t i_rsvd_1:2;
- uint64_t i_m:2;
- uint64_t i_f:1;
- uint64_t i_of_cnt:5;
- uint64_t i_error:1;
- uint64_t i_rd_to:1;
- uint64_t i_spur_wr:1;
- uint64_t i_spur_rd:1;
- uint64_t i_rsvd:11;
- uint64_t i_mult_err:1;
+ u64 ii_iprb0_regval;
+ struct {
+ u64 i_c:8;
+ u64 i_na:14;
+ u64 i_rsvd_2:2;
+ u64 i_nb:14;
+ u64 i_rsvd_1:2;
+ u64 i_m:2;
+ u64 i_f:1;
+ u64 i_of_cnt:5;
+ u64 i_error:1;
+ u64 i_rd_to:1;
+ u64 i_spur_wr:1;
+ u64 i_spur_rd:1;
+ u64 i_rsvd:11;
+ u64 i_mult_err:1;
} ii_iprb0_fld_s;
} ii_iprb0_u_t;
************************************************************************/
typedef union ii_iprb8_u {
- uint64_t ii_iprb8_regval;
- struct {
- uint64_t i_c:8;
- uint64_t i_na:14;
- uint64_t i_rsvd_2:2;
- uint64_t i_nb:14;
- uint64_t i_rsvd_1:2;
- uint64_t i_m:2;
- uint64_t i_f:1;
- uint64_t i_of_cnt:5;
- uint64_t i_error:1;
- uint64_t i_rd_to:1;
- uint64_t i_spur_wr:1;
- uint64_t i_spur_rd:1;
- uint64_t i_rsvd:11;
- uint64_t i_mult_err:1;
+ u64 ii_iprb8_regval;
+ struct {
+ u64 i_c:8;
+ u64 i_na:14;
+ u64 i_rsvd_2:2;
+ u64 i_nb:14;
+ u64 i_rsvd_1:2;
+ u64 i_m:2;
+ u64 i_f:1;
+ u64 i_of_cnt:5;
+ u64 i_error:1;
+ u64 i_rd_to:1;
+ u64 i_spur_wr:1;
+ u64 i_spur_rd:1;
+ u64 i_rsvd:11;
+ u64 i_mult_err:1;
} ii_iprb8_fld_s;
} ii_iprb8_u_t;
************************************************************************/
typedef union ii_iprb9_u {
- uint64_t ii_iprb9_regval;
- struct {
- uint64_t i_c:8;
- uint64_t i_na:14;
- uint64_t i_rsvd_2:2;
- uint64_t i_nb:14;
- uint64_t i_rsvd_1:2;
- uint64_t i_m:2;
- uint64_t i_f:1;
- uint64_t i_of_cnt:5;
- uint64_t i_error:1;
- uint64_t i_rd_to:1;
- uint64_t i_spur_wr:1;
- uint64_t i_spur_rd:1;
- uint64_t i_rsvd:11;
- uint64_t i_mult_err:1;
+ u64 ii_iprb9_regval;
+ struct {
+ u64 i_c:8;
+ u64 i_na:14;
+ u64 i_rsvd_2:2;
+ u64 i_nb:14;
+ u64 i_rsvd_1:2;
+ u64 i_m:2;
+ u64 i_f:1;
+ u64 i_of_cnt:5;
+ u64 i_error:1;
+ u64 i_rd_to:1;
+ u64 i_spur_wr:1;
+ u64 i_spur_rd:1;
+ u64 i_rsvd:11;
+ u64 i_mult_err:1;
} ii_iprb9_fld_s;
} ii_iprb9_u_t;
************************************************************************/
typedef union ii_iprba_u {
- uint64_t ii_iprba_regval;
- struct {
- uint64_t i_c:8;
- uint64_t i_na:14;
- uint64_t i_rsvd_2:2;
- uint64_t i_nb:14;
- uint64_t i_rsvd_1:2;
- uint64_t i_m:2;
- uint64_t i_f:1;
- uint64_t i_of_cnt:5;
- uint64_t i_error:1;
- uint64_t i_rd_to:1;
- uint64_t i_spur_wr:1;
- uint64_t i_spur_rd:1;
- uint64_t i_rsvd:11;
- uint64_t i_mult_err:1;
+ u64 ii_iprba_regval;
+ struct {
+ u64 i_c:8;
+ u64 i_na:14;
+ u64 i_rsvd_2:2;
+ u64 i_nb:14;
+ u64 i_rsvd_1:2;
+ u64 i_m:2;
+ u64 i_f:1;
+ u64 i_of_cnt:5;
+ u64 i_error:1;
+ u64 i_rd_to:1;
+ u64 i_spur_wr:1;
+ u64 i_spur_rd:1;
+ u64 i_rsvd:11;
+ u64 i_mult_err:1;
} ii_iprba_fld_s;
} ii_iprba_u_t;
************************************************************************/
typedef union ii_iprbb_u {
- uint64_t ii_iprbb_regval;
- struct {
- uint64_t i_c:8;
- uint64_t i_na:14;
- uint64_t i_rsvd_2:2;
- uint64_t i_nb:14;
- uint64_t i_rsvd_1:2;
- uint64_t i_m:2;
- uint64_t i_f:1;
- uint64_t i_of_cnt:5;
- uint64_t i_error:1;
- uint64_t i_rd_to:1;
- uint64_t i_spur_wr:1;
- uint64_t i_spur_rd:1;
- uint64_t i_rsvd:11;
- uint64_t i_mult_err:1;
+ u64 ii_iprbb_regval;
+ struct {
+ u64 i_c:8;
+ u64 i_na:14;
+ u64 i_rsvd_2:2;
+ u64 i_nb:14;
+ u64 i_rsvd_1:2;
+ u64 i_m:2;
+ u64 i_f:1;
+ u64 i_of_cnt:5;
+ u64 i_error:1;
+ u64 i_rd_to:1;
+ u64 i_spur_wr:1;
+ u64 i_spur_rd:1;
+ u64 i_rsvd:11;
+ u64 i_mult_err:1;
} ii_iprbb_fld_s;
} ii_iprbb_u_t;
************************************************************************/
typedef union ii_iprbc_u {
- uint64_t ii_iprbc_regval;
- struct {
- uint64_t i_c:8;
- uint64_t i_na:14;
- uint64_t i_rsvd_2:2;
- uint64_t i_nb:14;
- uint64_t i_rsvd_1:2;
- uint64_t i_m:2;
- uint64_t i_f:1;
- uint64_t i_of_cnt:5;
- uint64_t i_error:1;
- uint64_t i_rd_to:1;
- uint64_t i_spur_wr:1;
- uint64_t i_spur_rd:1;
- uint64_t i_rsvd:11;
- uint64_t i_mult_err:1;
+ u64 ii_iprbc_regval;
+ struct {
+ u64 i_c:8;
+ u64 i_na:14;
+ u64 i_rsvd_2:2;
+ u64 i_nb:14;
+ u64 i_rsvd_1:2;
+ u64 i_m:2;
+ u64 i_f:1;
+ u64 i_of_cnt:5;
+ u64 i_error:1;
+ u64 i_rd_to:1;
+ u64 i_spur_wr:1;
+ u64 i_spur_rd:1;
+ u64 i_rsvd:11;
+ u64 i_mult_err:1;
} ii_iprbc_fld_s;
} ii_iprbc_u_t;
************************************************************************/
typedef union ii_iprbd_u {
- uint64_t ii_iprbd_regval;
- struct {
- uint64_t i_c:8;
- uint64_t i_na:14;
- uint64_t i_rsvd_2:2;
- uint64_t i_nb:14;
- uint64_t i_rsvd_1:2;
- uint64_t i_m:2;
- uint64_t i_f:1;
- uint64_t i_of_cnt:5;
- uint64_t i_error:1;
- uint64_t i_rd_to:1;
- uint64_t i_spur_wr:1;
- uint64_t i_spur_rd:1;
- uint64_t i_rsvd:11;
- uint64_t i_mult_err:1;
+ u64 ii_iprbd_regval;
+ struct {
+ u64 i_c:8;
+ u64 i_na:14;
+ u64 i_rsvd_2:2;
+ u64 i_nb:14;
+ u64 i_rsvd_1:2;
+ u64 i_m:2;
+ u64 i_f:1;
+ u64 i_of_cnt:5;
+ u64 i_error:1;
+ u64 i_rd_to:1;
+ u64 i_spur_wr:1;
+ u64 i_spur_rd:1;
+ u64 i_rsvd:11;
+ u64 i_mult_err:1;
} ii_iprbd_fld_s;
} ii_iprbd_u_t;
************************************************************************/
typedef union ii_iprbe_u {
- uint64_t ii_iprbe_regval;
- struct {
- uint64_t i_c:8;
- uint64_t i_na:14;
- uint64_t i_rsvd_2:2;
- uint64_t i_nb:14;
- uint64_t i_rsvd_1:2;
- uint64_t i_m:2;
- uint64_t i_f:1;
- uint64_t i_of_cnt:5;
- uint64_t i_error:1;
- uint64_t i_rd_to:1;
- uint64_t i_spur_wr:1;
- uint64_t i_spur_rd:1;
- uint64_t i_rsvd:11;
- uint64_t i_mult_err:1;
+ u64 ii_iprbe_regval;
+ struct {
+ u64 i_c:8;
+ u64 i_na:14;
+ u64 i_rsvd_2:2;
+ u64 i_nb:14;
+ u64 i_rsvd_1:2;
+ u64 i_m:2;
+ u64 i_f:1;
+ u64 i_of_cnt:5;
+ u64 i_error:1;
+ u64 i_rd_to:1;
+ u64 i_spur_wr:1;
+ u64 i_spur_rd:1;
+ u64 i_rsvd:11;
+ u64 i_mult_err:1;
} ii_iprbe_fld_s;
} ii_iprbe_u_t;
************************************************************************/
typedef union ii_iprbf_u {
- uint64_t ii_iprbf_regval;
- struct {
- uint64_t i_c:8;
- uint64_t i_na:14;
- uint64_t i_rsvd_2:2;
- uint64_t i_nb:14;
- uint64_t i_rsvd_1:2;
- uint64_t i_m:2;
- uint64_t i_f:1;
- uint64_t i_of_cnt:5;
- uint64_t i_error:1;
- uint64_t i_rd_to:1;
- uint64_t i_spur_wr:1;
- uint64_t i_spur_rd:1;
- uint64_t i_rsvd:11;
- uint64_t i_mult_err:1;
+ u64 ii_iprbf_regval;
+ struct {
+ u64 i_c:8;
+ u64 i_na:14;
+ u64 i_rsvd_2:2;
+ u64 i_nb:14;
+ u64 i_rsvd_1:2;
+ u64 i_m:2;
+ u64 i_f:1;
+ u64 i_of_cnt:5;
+ u64 i_error:1;
+ u64 i_rd_to:1;
+ u64 i_spur_wr:1;
+ u64 i_spur_rd:1;
+ u64 i_rsvd:11;
+ u64 i_mult_err:1;
} ii_iprbe_fld_s;
} ii_iprbf_u_t;
************************************************************************/
typedef union ii_ixcc_u {
- uint64_t ii_ixcc_regval;
+ u64 ii_ixcc_regval;
struct {
- uint64_t i_time_out:26;
- uint64_t i_rsvd:38;
+ u64 i_time_out:26;
+ u64 i_rsvd:38;
} ii_ixcc_fld_s;
} ii_ixcc_u_t;
************************************************************************/
typedef union ii_imem_u {
- uint64_t ii_imem_regval;
- struct {
- uint64_t i_w0_esd:1;
- uint64_t i_rsvd_3:3;
- uint64_t i_b0_esd:1;
- uint64_t i_rsvd_2:3;
- uint64_t i_b1_esd:1;
- uint64_t i_rsvd_1:3;
- uint64_t i_clr_precise:1;
- uint64_t i_rsvd:51;
+ u64 ii_imem_regval;
+ struct {
+ u64 i_w0_esd:1;
+ u64 i_rsvd_3:3;
+ u64 i_b0_esd:1;
+ u64 i_rsvd_2:3;
+ u64 i_b1_esd:1;
+ u64 i_rsvd_1:3;
+ u64 i_clr_precise:1;
+ u64 i_rsvd:51;
} ii_imem_fld_s;
} ii_imem_u_t;
************************************************************************/
typedef union ii_ixtt_u {
- uint64_t ii_ixtt_regval;
+ u64 ii_ixtt_regval;
struct {
- uint64_t i_tail_to:26;
- uint64_t i_rsvd_1:6;
- uint64_t i_rrsp_ps:23;
- uint64_t i_rrsp_to:5;
- uint64_t i_rsvd:4;
+ u64 i_tail_to:26;
+ u64 i_rsvd_1:6;
+ u64 i_rrsp_ps:23;
+ u64 i_rrsp_to:5;
+ u64 i_rsvd:4;
} ii_ixtt_fld_s;
} ii_ixtt_u_t;
************************************************************************/
typedef union ii_ieclr_u {
- uint64_t ii_ieclr_regval;
- struct {
- uint64_t i_e_prb_0:1;
- uint64_t i_rsvd:7;
- uint64_t i_e_prb_8:1;
- uint64_t i_e_prb_9:1;
- uint64_t i_e_prb_a:1;
- uint64_t i_e_prb_b:1;
- uint64_t i_e_prb_c:1;
- uint64_t i_e_prb_d:1;
- uint64_t i_e_prb_e:1;
- uint64_t i_e_prb_f:1;
- uint64_t i_e_crazy:1;
- uint64_t i_e_bte_0:1;
- uint64_t i_e_bte_1:1;
- uint64_t i_reserved_1:10;
- uint64_t i_spur_rd_hdr:1;
- uint64_t i_cam_intr_to:1;
- uint64_t i_cam_overflow:1;
- uint64_t i_cam_read_miss:1;
- uint64_t i_ioq_rep_underflow:1;
- uint64_t i_ioq_req_underflow:1;
- uint64_t i_ioq_rep_overflow:1;
- uint64_t i_ioq_req_overflow:1;
- uint64_t i_iiq_rep_overflow:1;
- uint64_t i_iiq_req_overflow:1;
- uint64_t i_ii_xn_rep_cred_overflow:1;
- uint64_t i_ii_xn_req_cred_overflow:1;
- uint64_t i_ii_xn_invalid_cmd:1;
- uint64_t i_xn_ii_invalid_cmd:1;
- uint64_t i_reserved_2:21;
+ u64 ii_ieclr_regval;
+ struct {
+ u64 i_e_prb_0:1;
+ u64 i_rsvd:7;
+ u64 i_e_prb_8:1;
+ u64 i_e_prb_9:1;
+ u64 i_e_prb_a:1;
+ u64 i_e_prb_b:1;
+ u64 i_e_prb_c:1;
+ u64 i_e_prb_d:1;
+ u64 i_e_prb_e:1;
+ u64 i_e_prb_f:1;
+ u64 i_e_crazy:1;
+ u64 i_e_bte_0:1;
+ u64 i_e_bte_1:1;
+ u64 i_reserved_1:10;
+ u64 i_spur_rd_hdr:1;
+ u64 i_cam_intr_to:1;
+ u64 i_cam_overflow:1;
+ u64 i_cam_read_miss:1;
+ u64 i_ioq_rep_underflow:1;
+ u64 i_ioq_req_underflow:1;
+ u64 i_ioq_rep_overflow:1;
+ u64 i_ioq_req_overflow:1;
+ u64 i_iiq_rep_overflow:1;
+ u64 i_iiq_req_overflow:1;
+ u64 i_ii_xn_rep_cred_overflow:1;
+ u64 i_ii_xn_req_cred_overflow:1;
+ u64 i_ii_xn_invalid_cmd:1;
+ u64 i_xn_ii_invalid_cmd:1;
+ u64 i_reserved_2:21;
} ii_ieclr_fld_s;
} ii_ieclr_u_t;
************************************************************************/
typedef union ii_ibcr_u {
- uint64_t ii_ibcr_regval;
+ u64 ii_ibcr_regval;
struct {
- uint64_t i_count:4;
- uint64_t i_rsvd_1:4;
- uint64_t i_soft_reset:1;
- uint64_t i_rsvd:55;
+ u64 i_count:4;
+ u64 i_rsvd_1:4;
+ u64 i_soft_reset:1;
+ u64 i_rsvd:55;
} ii_ibcr_fld_s;
} ii_ibcr_u_t;
************************************************************************/
typedef union ii_ixsm_u {
- uint64_t ii_ixsm_regval;
- struct {
- uint64_t i_byte_en:32;
- uint64_t i_reserved:1;
- uint64_t i_tag:3;
- uint64_t i_alt_pactyp:4;
- uint64_t i_bo:1;
- uint64_t i_error:1;
- uint64_t i_vbpm:1;
- uint64_t i_gbr:1;
- uint64_t i_ds:2;
- uint64_t i_ct:1;
- uint64_t i_tnum:5;
- uint64_t i_pactyp:4;
- uint64_t i_sidn:4;
- uint64_t i_didn:4;
+ u64 ii_ixsm_regval;
+ struct {
+ u64 i_byte_en:32;
+ u64 i_reserved:1;
+ u64 i_tag:3;
+ u64 i_alt_pactyp:4;
+ u64 i_bo:1;
+ u64 i_error:1;
+ u64 i_vbpm:1;
+ u64 i_gbr:1;
+ u64 i_ds:2;
+ u64 i_ct:1;
+ u64 i_tnum:5;
+ u64 i_pactyp:4;
+ u64 i_sidn:4;
+ u64 i_didn:4;
} ii_ixsm_fld_s;
} ii_ixsm_u_t;
************************************************************************/
typedef union ii_ixss_u {
- uint64_t ii_ixss_regval;
+ u64 ii_ixss_regval;
struct {
- uint64_t i_sideband:8;
- uint64_t i_rsvd:55;
- uint64_t i_valid:1;
+ u64 i_sideband:8;
+ u64 i_rsvd:55;
+ u64 i_valid:1;
} ii_ixss_fld_s;
} ii_ixss_u_t;
************************************************************************/
typedef union ii_ilct_u {
- uint64_t ii_ilct_regval;
- struct {
- uint64_t i_test_seed:20;
- uint64_t i_test_mask:8;
- uint64_t i_test_data:20;
- uint64_t i_test_valid:1;
- uint64_t i_test_cberr:1;
- uint64_t i_test_flit:3;
- uint64_t i_test_clear:1;
- uint64_t i_test_err_capture:1;
- uint64_t i_rsvd:9;
+ u64 ii_ilct_regval;
+ struct {
+ u64 i_test_seed:20;
+ u64 i_test_mask:8;
+ u64 i_test_data:20;
+ u64 i_test_valid:1;
+ u64 i_test_cberr:1;
+ u64 i_test_flit:3;
+ u64 i_test_clear:1;
+ u64 i_test_err_capture:1;
+ u64 i_rsvd:9;
} ii_ilct_fld_s;
} ii_ilct_u_t;
************************************************************************/
typedef union ii_iieph1_u {
- uint64_t ii_iieph1_regval;
- struct {
- uint64_t i_command:7;
- uint64_t i_rsvd_5:1;
- uint64_t i_suppl:14;
- uint64_t i_rsvd_4:1;
- uint64_t i_source:14;
- uint64_t i_rsvd_3:1;
- uint64_t i_err_type:4;
- uint64_t i_rsvd_2:4;
- uint64_t i_overrun:1;
- uint64_t i_rsvd_1:3;
- uint64_t i_valid:1;
- uint64_t i_rsvd:13;
+ u64 ii_iieph1_regval;
+ struct {
+ u64 i_command:7;
+ u64 i_rsvd_5:1;
+ u64 i_suppl:14;
+ u64 i_rsvd_4:1;
+ u64 i_source:14;
+ u64 i_rsvd_3:1;
+ u64 i_err_type:4;
+ u64 i_rsvd_2:4;
+ u64 i_overrun:1;
+ u64 i_rsvd_1:3;
+ u64 i_valid:1;
+ u64 i_rsvd:13;
} ii_iieph1_fld_s;
} ii_iieph1_u_t;
************************************************************************/
typedef union ii_iieph2_u {
- uint64_t ii_iieph2_regval;
+ u64 ii_iieph2_regval;
struct {
- uint64_t i_rsvd_0:3;
- uint64_t i_address:47;
- uint64_t i_rsvd_1:10;
- uint64_t i_tail:1;
- uint64_t i_rsvd:3;
+ u64 i_rsvd_0:3;
+ u64 i_address:47;
+ u64 i_rsvd_1:10;
+ u64 i_tail:1;
+ u64 i_rsvd:3;
} ii_iieph2_fld_s;
} ii_iieph2_u_t;
************************************************************************/
typedef union ii_islapr_u {
- uint64_t ii_islapr_regval;
+ u64 ii_islapr_regval;
struct {
- uint64_t i_region:64;
+ u64 i_region:64;
} ii_islapr_fld_s;
} ii_islapr_u_t;
************************************************************************/
typedef union ii_islapo_u {
- uint64_t ii_islapo_regval;
+ u64 ii_islapo_regval;
struct {
- uint64_t i_io_sbx_ovrride:56;
- uint64_t i_rsvd:8;
+ u64 i_io_sbx_ovrride:56;
+ u64 i_rsvd:8;
} ii_islapo_fld_s;
} ii_islapo_u_t;
************************************************************************/
typedef union ii_iwi_u {
- uint64_t ii_iwi_regval;
- struct {
- uint64_t i_prescale:24;
- uint64_t i_rsvd:8;
- uint64_t i_timeout:8;
- uint64_t i_rsvd1:8;
- uint64_t i_intrpt_retry_period:8;
- uint64_t i_rsvd2:8;
+ u64 ii_iwi_regval;
+ struct {
+ u64 i_prescale:24;
+ u64 i_rsvd:8;
+ u64 i_timeout:8;
+ u64 i_rsvd1:8;
+ u64 i_intrpt_retry_period:8;
+ u64 i_rsvd2:8;
} ii_iwi_fld_s;
} ii_iwi_u_t;
************************************************************************/
typedef union ii_iwel_u {
- uint64_t ii_iwel_regval;
- struct {
- uint64_t i_intr_timed_out:1;
- uint64_t i_rsvd:7;
- uint64_t i_cam_overflow:1;
- uint64_t i_cam_read_miss:1;
- uint64_t i_rsvd1:2;
- uint64_t i_ioq_rep_underflow:1;
- uint64_t i_ioq_req_underflow:1;
- uint64_t i_ioq_rep_overflow:1;
- uint64_t i_ioq_req_overflow:1;
- uint64_t i_iiq_rep_overflow:1;
- uint64_t i_iiq_req_overflow:1;
- uint64_t i_rsvd2:6;
- uint64_t i_ii_xn_rep_cred_over_under:1;
- uint64_t i_ii_xn_req_cred_over_under:1;
- uint64_t i_rsvd3:6;
- uint64_t i_ii_xn_invalid_cmd:1;
- uint64_t i_xn_ii_invalid_cmd:1;
- uint64_t i_rsvd4:30;
+ u64 ii_iwel_regval;
+ struct {
+ u64 i_intr_timed_out:1;
+ u64 i_rsvd:7;
+ u64 i_cam_overflow:1;
+ u64 i_cam_read_miss:1;
+ u64 i_rsvd1:2;
+ u64 i_ioq_rep_underflow:1;
+ u64 i_ioq_req_underflow:1;
+ u64 i_ioq_rep_overflow:1;
+ u64 i_ioq_req_overflow:1;
+ u64 i_iiq_rep_overflow:1;
+ u64 i_iiq_req_overflow:1;
+ u64 i_rsvd2:6;
+ u64 i_ii_xn_rep_cred_over_under:1;
+ u64 i_ii_xn_req_cred_over_under:1;
+ u64 i_rsvd3:6;
+ u64 i_ii_xn_invalid_cmd:1;
+ u64 i_xn_ii_invalid_cmd:1;
+ u64 i_rsvd4:30;
} ii_iwel_fld_s;
} ii_iwel_u_t;
************************************************************************/
typedef union ii_iwc_u {
- uint64_t ii_iwc_regval;
- struct {
- uint64_t i_dma_byte_swap:1;
- uint64_t i_rsvd:3;
- uint64_t i_cam_read_lines_reset:1;
- uint64_t i_rsvd1:3;
- uint64_t i_ii_xn_cred_over_under_log:1;
- uint64_t i_rsvd2:19;
- uint64_t i_xn_rep_iq_depth:5;
- uint64_t i_rsvd3:3;
- uint64_t i_xn_req_iq_depth:5;
- uint64_t i_rsvd4:3;
- uint64_t i_iiq_depth:6;
- uint64_t i_rsvd5:12;
- uint64_t i_force_rep_cred:1;
- uint64_t i_force_req_cred:1;
+ u64 ii_iwc_regval;
+ struct {
+ u64 i_dma_byte_swap:1;
+ u64 i_rsvd:3;
+ u64 i_cam_read_lines_reset:1;
+ u64 i_rsvd1:3;
+ u64 i_ii_xn_cred_over_under_log:1;
+ u64 i_rsvd2:19;
+ u64 i_xn_rep_iq_depth:5;
+ u64 i_rsvd3:3;
+ u64 i_xn_req_iq_depth:5;
+ u64 i_rsvd4:3;
+ u64 i_iiq_depth:6;
+ u64 i_rsvd5:12;
+ u64 i_force_rep_cred:1;
+ u64 i_force_req_cred:1;
} ii_iwc_fld_s;
} ii_iwc_u_t;
************************************************************************/
typedef union ii_iws_u {
- uint64_t ii_iws_regval;
+ u64 ii_iws_regval;
struct {
- uint64_t i_xn_rep_iq_credits:5;
- uint64_t i_rsvd:3;
- uint64_t i_xn_req_iq_credits:5;
- uint64_t i_rsvd1:51;
+ u64 i_xn_rep_iq_credits:5;
+ u64 i_rsvd:3;
+ u64 i_xn_req_iq_credits:5;
+ u64 i_rsvd1:51;
} ii_iws_fld_s;
} ii_iws_u_t;
************************************************************************/
typedef union ii_iweim_u {
- uint64_t ii_iweim_regval;
- struct {
- uint64_t i_intr_timed_out:1;
- uint64_t i_rsvd:7;
- uint64_t i_cam_overflow:1;
- uint64_t i_cam_read_miss:1;
- uint64_t i_rsvd1:2;
- uint64_t i_ioq_rep_underflow:1;
- uint64_t i_ioq_req_underflow:1;
- uint64_t i_ioq_rep_overflow:1;
- uint64_t i_ioq_req_overflow:1;
- uint64_t i_iiq_rep_overflow:1;
- uint64_t i_iiq_req_overflow:1;
- uint64_t i_rsvd2:6;
- uint64_t i_ii_xn_rep_cred_overflow:1;
- uint64_t i_ii_xn_req_cred_overflow:1;
- uint64_t i_rsvd3:6;
- uint64_t i_ii_xn_invalid_cmd:1;
- uint64_t i_xn_ii_invalid_cmd:1;
- uint64_t i_rsvd4:30;
+ u64 ii_iweim_regval;
+ struct {
+ u64 i_intr_timed_out:1;
+ u64 i_rsvd:7;
+ u64 i_cam_overflow:1;
+ u64 i_cam_read_miss:1;
+ u64 i_rsvd1:2;
+ u64 i_ioq_rep_underflow:1;
+ u64 i_ioq_req_underflow:1;
+ u64 i_ioq_rep_overflow:1;
+ u64 i_ioq_req_overflow:1;
+ u64 i_iiq_rep_overflow:1;
+ u64 i_iiq_req_overflow:1;
+ u64 i_rsvd2:6;
+ u64 i_ii_xn_rep_cred_overflow:1;
+ u64 i_ii_xn_req_cred_overflow:1;
+ u64 i_rsvd3:6;
+ u64 i_ii_xn_invalid_cmd:1;
+ u64 i_xn_ii_invalid_cmd:1;
+ u64 i_rsvd4:30;
} ii_iweim_fld_s;
} ii_iweim_u_t;
************************************************************************/
typedef union ii_ipca_u {
- uint64_t ii_ipca_regval;
+ u64 ii_ipca_regval;
struct {
- uint64_t i_wid:4;
- uint64_t i_adjust:1;
- uint64_t i_rsvd_1:3;
- uint64_t i_field:2;
- uint64_t i_rsvd:54;
+ u64 i_wid:4;
+ u64 i_adjust:1;
+ u64 i_rsvd_1:3;
+ u64 i_field:2;
+ u64 i_rsvd:54;
} ii_ipca_fld_s;
} ii_ipca_u_t;
************************************************************************/
typedef union ii_iprte0a_u {
- uint64_t ii_iprte0a_regval;
+ u64 ii_iprte0a_regval;
struct {
- uint64_t i_rsvd_1:54;
- uint64_t i_widget:4;
- uint64_t i_to_cnt:5;
- uint64_t i_vld:1;
+ u64 i_rsvd_1:54;
+ u64 i_widget:4;
+ u64 i_to_cnt:5;
+ u64 i_vld:1;
} ii_iprte0a_fld_s;
} ii_iprte0a_u_t;
************************************************************************/
typedef union ii_iprte1a_u {
- uint64_t ii_iprte1a_regval;
+ u64 ii_iprte1a_regval;
struct {
- uint64_t i_rsvd_1:54;
- uint64_t i_widget:4;
- uint64_t i_to_cnt:5;
- uint64_t i_vld:1;
+ u64 i_rsvd_1:54;
+ u64 i_widget:4;
+ u64 i_to_cnt:5;
+ u64 i_vld:1;
} ii_iprte1a_fld_s;
} ii_iprte1a_u_t;
************************************************************************/
typedef union ii_iprte2a_u {
- uint64_t ii_iprte2a_regval;
+ u64 ii_iprte2a_regval;
struct {
- uint64_t i_rsvd_1:54;
- uint64_t i_widget:4;
- uint64_t i_to_cnt:5;
- uint64_t i_vld:1;
+ u64 i_rsvd_1:54;
+ u64 i_widget:4;
+ u64 i_to_cnt:5;
+ u64 i_vld:1;
} ii_iprte2a_fld_s;
} ii_iprte2a_u_t;
************************************************************************/
typedef union ii_iprte3a_u {
- uint64_t ii_iprte3a_regval;
+ u64 ii_iprte3a_regval;
struct {
- uint64_t i_rsvd_1:54;
- uint64_t i_widget:4;
- uint64_t i_to_cnt:5;
- uint64_t i_vld:1;
+ u64 i_rsvd_1:54;
+ u64 i_widget:4;
+ u64 i_to_cnt:5;
+ u64 i_vld:1;
} ii_iprte3a_fld_s;
} ii_iprte3a_u_t;
************************************************************************/
typedef union ii_iprte4a_u {
- uint64_t ii_iprte4a_regval;
+ u64 ii_iprte4a_regval;
struct {
- uint64_t i_rsvd_1:54;
- uint64_t i_widget:4;
- uint64_t i_to_cnt:5;
- uint64_t i_vld:1;
+ u64 i_rsvd_1:54;
+ u64 i_widget:4;
+ u64 i_to_cnt:5;
+ u64 i_vld:1;
} ii_iprte4a_fld_s;
} ii_iprte4a_u_t;
************************************************************************/
typedef union ii_iprte5a_u {
- uint64_t ii_iprte5a_regval;
+ u64 ii_iprte5a_regval;
struct {
- uint64_t i_rsvd_1:54;
- uint64_t i_widget:4;
- uint64_t i_to_cnt:5;
- uint64_t i_vld:1;
+ u64 i_rsvd_1:54;
+ u64 i_widget:4;
+ u64 i_to_cnt:5;
+ u64 i_vld:1;
} ii_iprte5a_fld_s;
} ii_iprte5a_u_t;
************************************************************************/
typedef union ii_iprte6a_u {
- uint64_t ii_iprte6a_regval;
+ u64 ii_iprte6a_regval;
struct {
- uint64_t i_rsvd_1:54;
- uint64_t i_widget:4;
- uint64_t i_to_cnt:5;
- uint64_t i_vld:1;
+ u64 i_rsvd_1:54;
+ u64 i_widget:4;
+ u64 i_to_cnt:5;
+ u64 i_vld:1;
} ii_iprte6a_fld_s;
} ii_iprte6a_u_t;
************************************************************************/
typedef union ii_iprte7a_u {
- uint64_t ii_iprte7a_regval;
+ u64 ii_iprte7a_regval;
struct {
- uint64_t i_rsvd_1:54;
- uint64_t i_widget:4;
- uint64_t i_to_cnt:5;
- uint64_t i_vld:1;
+ u64 i_rsvd_1:54;
+ u64 i_widget:4;
+ u64 i_to_cnt:5;
+ u64 i_vld:1;
} ii_iprtea7_fld_s;
} ii_iprte7a_u_t;
************************************************************************/
typedef union ii_iprte0b_u {
- uint64_t ii_iprte0b_regval;
+ u64 ii_iprte0b_regval;
struct {
- uint64_t i_rsvd_1:3;
- uint64_t i_address:47;
- uint64_t i_init:3;
- uint64_t i_source:11;
+ u64 i_rsvd_1:3;
+ u64 i_address:47;
+ u64 i_init:3;
+ u64 i_source:11;
} ii_iprte0b_fld_s;
} ii_iprte0b_u_t;
************************************************************************/
typedef union ii_iprte1b_u {
- uint64_t ii_iprte1b_regval;
+ u64 ii_iprte1b_regval;
struct {
- uint64_t i_rsvd_1:3;
- uint64_t i_address:47;
- uint64_t i_init:3;
- uint64_t i_source:11;
+ u64 i_rsvd_1:3;
+ u64 i_address:47;
+ u64 i_init:3;
+ u64 i_source:11;
} ii_iprte1b_fld_s;
} ii_iprte1b_u_t;
************************************************************************/
typedef union ii_iprte2b_u {
- uint64_t ii_iprte2b_regval;
+ u64 ii_iprte2b_regval;
struct {
- uint64_t i_rsvd_1:3;
- uint64_t i_address:47;
- uint64_t i_init:3;
- uint64_t i_source:11;
+ u64 i_rsvd_1:3;
+ u64 i_address:47;
+ u64 i_init:3;
+ u64 i_source:11;
} ii_iprte2b_fld_s;
} ii_iprte2b_u_t;
************************************************************************/
typedef union ii_iprte3b_u {
- uint64_t ii_iprte3b_regval;
+ u64 ii_iprte3b_regval;
struct {
- uint64_t i_rsvd_1:3;
- uint64_t i_address:47;
- uint64_t i_init:3;
- uint64_t i_source:11;
+ u64 i_rsvd_1:3;
+ u64 i_address:47;
+ u64 i_init:3;
+ u64 i_source:11;
} ii_iprte3b_fld_s;
} ii_iprte3b_u_t;
************************************************************************/
typedef union ii_iprte4b_u {
- uint64_t ii_iprte4b_regval;
+ u64 ii_iprte4b_regval;
struct {
- uint64_t i_rsvd_1:3;
- uint64_t i_address:47;
- uint64_t i_init:3;
- uint64_t i_source:11;
+ u64 i_rsvd_1:3;
+ u64 i_address:47;
+ u64 i_init:3;
+ u64 i_source:11;
} ii_iprte4b_fld_s;
} ii_iprte4b_u_t;
************************************************************************/
typedef union ii_iprte5b_u {
- uint64_t ii_iprte5b_regval;
+ u64 ii_iprte5b_regval;
struct {
- uint64_t i_rsvd_1:3;
- uint64_t i_address:47;
- uint64_t i_init:3;
- uint64_t i_source:11;
+ u64 i_rsvd_1:3;
+ u64 i_address:47;
+ u64 i_init:3;
+ u64 i_source:11;
} ii_iprte5b_fld_s;
} ii_iprte5b_u_t;
************************************************************************/
typedef union ii_iprte6b_u {
- uint64_t ii_iprte6b_regval;
+ u64 ii_iprte6b_regval;
struct {
- uint64_t i_rsvd_1:3;
- uint64_t i_address:47;
- uint64_t i_init:3;
- uint64_t i_source:11;
+ u64 i_rsvd_1:3;
+ u64 i_address:47;
+ u64 i_init:3;
+ u64 i_source:11;
} ii_iprte6b_fld_s;
} ii_iprte6b_u_t;
************************************************************************/
typedef union ii_iprte7b_u {
- uint64_t ii_iprte7b_regval;
+ u64 ii_iprte7b_regval;
struct {
- uint64_t i_rsvd_1:3;
- uint64_t i_address:47;
- uint64_t i_init:3;
- uint64_t i_source:11;
+ u64 i_rsvd_1:3;
+ u64 i_address:47;
+ u64 i_init:3;
+ u64 i_source:11;
} ii_iprte7b_fld_s;
} ii_iprte7b_u_t;
************************************************************************/
typedef union ii_ipdr_u {
- uint64_t ii_ipdr_regval;
+ u64 ii_ipdr_regval;
struct {
- uint64_t i_te:3;
- uint64_t i_rsvd_1:1;
- uint64_t i_pnd:1;
- uint64_t i_init_rpcnt:1;
- uint64_t i_rsvd:58;
+ u64 i_te:3;
+ u64 i_rsvd_1:1;
+ u64 i_pnd:1;
+ u64 i_init_rpcnt:1;
+ u64 i_rsvd:58;
} ii_ipdr_fld_s;
} ii_ipdr_u_t;
************************************************************************/
typedef union ii_icdr_u {
- uint64_t ii_icdr_regval;
+ u64 ii_icdr_regval;
struct {
- uint64_t i_crb_num:4;
- uint64_t i_pnd:1;
- uint64_t i_rsvd:59;
+ u64 i_crb_num:4;
+ u64 i_pnd:1;
+ u64 i_rsvd:59;
} ii_icdr_fld_s;
} ii_icdr_u_t;
************************************************************************/
typedef union ii_ifdr_u {
- uint64_t ii_ifdr_regval;
+ u64 ii_ifdr_regval;
struct {
- uint64_t i_ioq_max_rq:7;
- uint64_t i_set_ioq_rq:1;
- uint64_t i_ioq_max_rp:7;
- uint64_t i_set_ioq_rp:1;
- uint64_t i_rsvd:48;
+ u64 i_ioq_max_rq:7;
+ u64 i_set_ioq_rq:1;
+ u64 i_ioq_max_rp:7;
+ u64 i_set_ioq_rp:1;
+ u64 i_rsvd:48;
} ii_ifdr_fld_s;
} ii_ifdr_u_t;
************************************************************************/
typedef union ii_iiap_u {
- uint64_t ii_iiap_regval;
+ u64 ii_iiap_regval;
struct {
- uint64_t i_rq_mls:6;
- uint64_t i_rsvd_1:2;
- uint64_t i_rp_mls:6;
- uint64_t i_rsvd:50;
+ u64 i_rq_mls:6;
+ u64 i_rsvd_1:2;
+ u64 i_rp_mls:6;
+ u64 i_rsvd:50;
} ii_iiap_fld_s;
} ii_iiap_u_t;
************************************************************************/
typedef union ii_icmr_u {
- uint64_t ii_icmr_regval;
- struct {
- uint64_t i_sp_msg:1;
- uint64_t i_rd_hdr:1;
- uint64_t i_rsvd_4:2;
- uint64_t i_c_cnt:4;
- uint64_t i_rsvd_3:4;
- uint64_t i_clr_rqpd:1;
- uint64_t i_clr_rppd:1;
- uint64_t i_rsvd_2:2;
- uint64_t i_fc_cnt:4;
- uint64_t i_crb_vld:15;
- uint64_t i_crb_mark:15;
- uint64_t i_rsvd_1:2;
- uint64_t i_precise:1;
- uint64_t i_rsvd:11;
+ u64 ii_icmr_regval;
+ struct {
+ u64 i_sp_msg:1;
+ u64 i_rd_hdr:1;
+ u64 i_rsvd_4:2;
+ u64 i_c_cnt:4;
+ u64 i_rsvd_3:4;
+ u64 i_clr_rqpd:1;
+ u64 i_clr_rppd:1;
+ u64 i_rsvd_2:2;
+ u64 i_fc_cnt:4;
+ u64 i_crb_vld:15;
+ u64 i_crb_mark:15;
+ u64 i_rsvd_1:2;
+ u64 i_precise:1;
+ u64 i_rsvd:11;
} ii_icmr_fld_s;
} ii_icmr_u_t;
************************************************************************/
typedef union ii_iccr_u {
- uint64_t ii_iccr_regval;
+ u64 ii_iccr_regval;
struct {
- uint64_t i_crb_num:4;
- uint64_t i_rsvd_1:4;
- uint64_t i_cmd:8;
- uint64_t i_pending:1;
- uint64_t i_rsvd:47;
+ u64 i_crb_num:4;
+ u64 i_rsvd_1:4;
+ u64 i_cmd:8;
+ u64 i_pending:1;
+ u64 i_rsvd:47;
} ii_iccr_fld_s;
} ii_iccr_u_t;
************************************************************************/
typedef union ii_icto_u {
- uint64_t ii_icto_regval;
+ u64 ii_icto_regval;
struct {
- uint64_t i_timeout:8;
- uint64_t i_rsvd:56;
+ u64 i_timeout:8;
+ u64 i_rsvd:56;
} ii_icto_fld_s;
} ii_icto_u_t;
************************************************************************/
typedef union ii_ictp_u {
- uint64_t ii_ictp_regval;
+ u64 ii_ictp_regval;
struct {
- uint64_t i_prescale:24;
- uint64_t i_rsvd:40;
+ u64 i_prescale:24;
+ u64 i_rsvd:40;
} ii_ictp_fld_s;
} ii_ictp_u_t;
************************************************************************/
typedef union ii_icrb0_a_u {
- uint64_t ii_icrb0_a_regval;
- struct {
- uint64_t ia_iow:1;
- uint64_t ia_vld:1;
- uint64_t ia_addr:47;
- uint64_t ia_tnum:5;
- uint64_t ia_sidn:4;
- uint64_t ia_rsvd:6;
+ u64 ii_icrb0_a_regval;
+ struct {
+ u64 ia_iow:1;
+ u64 ia_vld:1;
+ u64 ia_addr:47;
+ u64 ia_tnum:5;
+ u64 ia_sidn:4;
+ u64 ia_rsvd:6;
} ii_icrb0_a_fld_s;
} ii_icrb0_a_u_t;
************************************************************************/
typedef union ii_icrb0_b_u {
- uint64_t ii_icrb0_b_regval;
- struct {
- uint64_t ib_xt_err:1;
- uint64_t ib_mark:1;
- uint64_t ib_ln_uce:1;
- uint64_t ib_errcode:3;
- uint64_t ib_error:1;
- uint64_t ib_stall__bte_1:1;
- uint64_t ib_stall__bte_0:1;
- uint64_t ib_stall__intr:1;
- uint64_t ib_stall_ib:1;
- uint64_t ib_intvn:1;
- uint64_t ib_wb:1;
- uint64_t ib_hold:1;
- uint64_t ib_ack:1;
- uint64_t ib_resp:1;
- uint64_t ib_ack_cnt:11;
- uint64_t ib_rsvd:7;
- uint64_t ib_exc:5;
- uint64_t ib_init:3;
- uint64_t ib_imsg:8;
- uint64_t ib_imsgtype:2;
- uint64_t ib_use_old:1;
- uint64_t ib_rsvd_1:11;
+ u64 ii_icrb0_b_regval;
+ struct {
+ u64 ib_xt_err:1;
+ u64 ib_mark:1;
+ u64 ib_ln_uce:1;
+ u64 ib_errcode:3;
+ u64 ib_error:1;
+ u64 ib_stall__bte_1:1;
+ u64 ib_stall__bte_0:1;
+ u64 ib_stall__intr:1;
+ u64 ib_stall_ib:1;
+ u64 ib_intvn:1;
+ u64 ib_wb:1;
+ u64 ib_hold:1;
+ u64 ib_ack:1;
+ u64 ib_resp:1;
+ u64 ib_ack_cnt:11;
+ u64 ib_rsvd:7;
+ u64 ib_exc:5;
+ u64 ib_init:3;
+ u64 ib_imsg:8;
+ u64 ib_imsgtype:2;
+ u64 ib_use_old:1;
+ u64 ib_rsvd_1:11;
} ii_icrb0_b_fld_s;
} ii_icrb0_b_u_t;
************************************************************************/
typedef union ii_icrb0_c_u {
- uint64_t ii_icrb0_c_regval;
- struct {
- uint64_t ic_source:15;
- uint64_t ic_size:2;
- uint64_t ic_ct:1;
- uint64_t ic_bte_num:1;
- uint64_t ic_gbr:1;
- uint64_t ic_resprqd:1;
- uint64_t ic_bo:1;
- uint64_t ic_suppl:15;
- uint64_t ic_rsvd:27;
+ u64 ii_icrb0_c_regval;
+ struct {
+ u64 ic_source:15;
+ u64 ic_size:2;
+ u64 ic_ct:1;
+ u64 ic_bte_num:1;
+ u64 ic_gbr:1;
+ u64 ic_resprqd:1;
+ u64 ic_bo:1;
+ u64 ic_suppl:15;
+ u64 ic_rsvd:27;
} ii_icrb0_c_fld_s;
} ii_icrb0_c_u_t;
************************************************************************/
typedef union ii_icrb0_d_u {
- uint64_t ii_icrb0_d_regval;
- struct {
- uint64_t id_pa_be:43;
- uint64_t id_bte_op:1;
- uint64_t id_pr_psc:4;
- uint64_t id_pr_cnt:4;
- uint64_t id_sleep:1;
- uint64_t id_rsvd:11;
+ u64 ii_icrb0_d_regval;
+ struct {
+ u64 id_pa_be:43;
+ u64 id_bte_op:1;
+ u64 id_pr_psc:4;
+ u64 id_pr_cnt:4;
+ u64 id_sleep:1;
+ u64 id_rsvd:11;
} ii_icrb0_d_fld_s;
} ii_icrb0_d_u_t;
************************************************************************/
typedef union ii_icrb0_e_u {
- uint64_t ii_icrb0_e_regval;
- struct {
- uint64_t ie_timeout:8;
- uint64_t ie_context:15;
- uint64_t ie_rsvd:1;
- uint64_t ie_tvld:1;
- uint64_t ie_cvld:1;
- uint64_t ie_rsvd_0:38;
+ u64 ii_icrb0_e_regval;
+ struct {
+ u64 ie_timeout:8;
+ u64 ie_context:15;
+ u64 ie_rsvd:1;
+ u64 ie_tvld:1;
+ u64 ie_cvld:1;
+ u64 ie_rsvd_0:38;
} ii_icrb0_e_fld_s;
} ii_icrb0_e_u_t;
************************************************************************/
typedef union ii_icsml_u {
- uint64_t ii_icsml_regval;
+ u64 ii_icsml_regval;
struct {
- uint64_t i_tt_addr:47;
- uint64_t i_newsuppl_ex:14;
- uint64_t i_reserved:2;
- uint64_t i_overflow:1;
+ u64 i_tt_addr:47;
+ u64 i_newsuppl_ex:14;
+ u64 i_reserved:2;
+ u64 i_overflow:1;
} ii_icsml_fld_s;
} ii_icsml_u_t;
************************************************************************/
typedef union ii_icsmm_u {
- uint64_t ii_icsmm_regval;
+ u64 ii_icsmm_regval;
struct {
- uint64_t i_tt_ack_cnt:11;
- uint64_t i_reserved:53;
+ u64 i_tt_ack_cnt:11;
+ u64 i_reserved:53;
} ii_icsmm_fld_s;
} ii_icsmm_u_t;
************************************************************************/
typedef union ii_icsmh_u {
- uint64_t ii_icsmh_regval;
- struct {
- uint64_t i_tt_vld:1;
- uint64_t i_xerr:1;
- uint64_t i_ft_cwact_o:1;
- uint64_t i_ft_wact_o:1;
- uint64_t i_ft_active_o:1;
- uint64_t i_sync:1;
- uint64_t i_mnusg:1;
- uint64_t i_mnusz:1;
- uint64_t i_plusz:1;
- uint64_t i_plusg:1;
- uint64_t i_tt_exc:5;
- uint64_t i_tt_wb:1;
- uint64_t i_tt_hold:1;
- uint64_t i_tt_ack:1;
- uint64_t i_tt_resp:1;
- uint64_t i_tt_intvn:1;
- uint64_t i_g_stall_bte1:1;
- uint64_t i_g_stall_bte0:1;
- uint64_t i_g_stall_il:1;
- uint64_t i_g_stall_ib:1;
- uint64_t i_tt_imsg:8;
- uint64_t i_tt_imsgtype:2;
- uint64_t i_tt_use_old:1;
- uint64_t i_tt_respreqd:1;
- uint64_t i_tt_bte_num:1;
- uint64_t i_cbn:1;
- uint64_t i_match:1;
- uint64_t i_rpcnt_lt_34:1;
- uint64_t i_rpcnt_ge_34:1;
- uint64_t i_rpcnt_lt_18:1;
- uint64_t i_rpcnt_ge_18:1;
- uint64_t i_rpcnt_lt_2:1;
- uint64_t i_rpcnt_ge_2:1;
- uint64_t i_rqcnt_lt_18:1;
- uint64_t i_rqcnt_ge_18:1;
- uint64_t i_rqcnt_lt_2:1;
- uint64_t i_rqcnt_ge_2:1;
- uint64_t i_tt_device:7;
- uint64_t i_tt_init:3;
- uint64_t i_reserved:5;
+ u64 ii_icsmh_regval;
+ struct {
+ u64 i_tt_vld:1;
+ u64 i_xerr:1;
+ u64 i_ft_cwact_o:1;
+ u64 i_ft_wact_o:1;
+ u64 i_ft_active_o:1;
+ u64 i_sync:1;
+ u64 i_mnusg:1;
+ u64 i_mnusz:1;
+ u64 i_plusz:1;
+ u64 i_plusg:1;
+ u64 i_tt_exc:5;
+ u64 i_tt_wb:1;
+ u64 i_tt_hold:1;
+ u64 i_tt_ack:1;
+ u64 i_tt_resp:1;
+ u64 i_tt_intvn:1;
+ u64 i_g_stall_bte1:1;
+ u64 i_g_stall_bte0:1;
+ u64 i_g_stall_il:1;
+ u64 i_g_stall_ib:1;
+ u64 i_tt_imsg:8;
+ u64 i_tt_imsgtype:2;
+ u64 i_tt_use_old:1;
+ u64 i_tt_respreqd:1;
+ u64 i_tt_bte_num:1;
+ u64 i_cbn:1;
+ u64 i_match:1;
+ u64 i_rpcnt_lt_34:1;
+ u64 i_rpcnt_ge_34:1;
+ u64 i_rpcnt_lt_18:1;
+ u64 i_rpcnt_ge_18:1;
+ u64 i_rpcnt_lt_2:1;
+ u64 i_rpcnt_ge_2:1;
+ u64 i_rqcnt_lt_18:1;
+ u64 i_rqcnt_ge_18:1;
+ u64 i_rqcnt_lt_2:1;
+ u64 i_rqcnt_ge_2:1;
+ u64 i_tt_device:7;
+ u64 i_tt_init:3;
+ u64 i_reserved:5;
} ii_icsmh_fld_s;
} ii_icsmh_u_t;
************************************************************************/
typedef union ii_idbss_u {
- uint64_t ii_idbss_regval;
- struct {
- uint64_t i_iioclk_core_submenu:3;
- uint64_t i_rsvd:5;
- uint64_t i_fsbclk_wrapper_submenu:3;
- uint64_t i_rsvd_1:5;
- uint64_t i_iioclk_menu:5;
- uint64_t i_rsvd_2:43;
+ u64 ii_idbss_regval;
+ struct {
+ u64 i_iioclk_core_submenu:3;
+ u64 i_rsvd:5;
+ u64 i_fsbclk_wrapper_submenu:3;
+ u64 i_rsvd_1:5;
+ u64 i_iioclk_menu:5;
+ u64 i_rsvd_2:43;
} ii_idbss_fld_s;
} ii_idbss_u_t;
************************************************************************/
typedef union ii_ibls0_u {
- uint64_t ii_ibls0_regval;
+ u64 ii_ibls0_regval;
struct {
- uint64_t i_length:16;
- uint64_t i_error:1;
- uint64_t i_rsvd_1:3;
- uint64_t i_busy:1;
- uint64_t i_rsvd:43;
+ u64 i_length:16;
+ u64 i_error:1;
+ u64 i_rsvd_1:3;
+ u64 i_busy:1;
+ u64 i_rsvd:43;
} ii_ibls0_fld_s;
} ii_ibls0_u_t;
************************************************************************/
typedef union ii_ibsa0_u {
- uint64_t ii_ibsa0_regval;
+ u64 ii_ibsa0_regval;
struct {
- uint64_t i_rsvd_1:7;
- uint64_t i_addr:42;
- uint64_t i_rsvd:15;
+ u64 i_rsvd_1:7;
+ u64 i_addr:42;
+ u64 i_rsvd:15;
} ii_ibsa0_fld_s;
} ii_ibsa0_u_t;
************************************************************************/
typedef union ii_ibda0_u {
- uint64_t ii_ibda0_regval;
+ u64 ii_ibda0_regval;
struct {
- uint64_t i_rsvd_1:7;
- uint64_t i_addr:42;
- uint64_t i_rsvd:15;
+ u64 i_rsvd_1:7;
+ u64 i_addr:42;
+ u64 i_rsvd:15;
} ii_ibda0_fld_s;
} ii_ibda0_u_t;
************************************************************************/
typedef union ii_ibct0_u {
- uint64_t ii_ibct0_regval;
- struct {
- uint64_t i_zerofill:1;
- uint64_t i_rsvd_2:3;
- uint64_t i_notify:1;
- uint64_t i_rsvd_1:3;
- uint64_t i_poison:1;
- uint64_t i_rsvd:55;
+ u64 ii_ibct0_regval;
+ struct {
+ u64 i_zerofill:1;
+ u64 i_rsvd_2:3;
+ u64 i_notify:1;
+ u64 i_rsvd_1:3;
+ u64 i_poison:1;
+ u64 i_rsvd:55;
} ii_ibct0_fld_s;
} ii_ibct0_u_t;
************************************************************************/
typedef union ii_ibna0_u {
- uint64_t ii_ibna0_regval;
+ u64 ii_ibna0_regval;
struct {
- uint64_t i_rsvd_1:7;
- uint64_t i_addr:42;
- uint64_t i_rsvd:15;
+ u64 i_rsvd_1:7;
+ u64 i_addr:42;
+ u64 i_rsvd:15;
} ii_ibna0_fld_s;
} ii_ibna0_u_t;
************************************************************************/
typedef union ii_ibia0_u {
- uint64_t ii_ibia0_regval;
+ u64 ii_ibia0_regval;
struct {
- uint64_t i_rsvd_2:1;
- uint64_t i_node_id:11;
- uint64_t i_rsvd_1:4;
- uint64_t i_level:7;
- uint64_t i_rsvd:41;
+ u64 i_rsvd_2:1;
+ u64 i_node_id:11;
+ u64 i_rsvd_1:4;
+ u64 i_level:7;
+ u64 i_rsvd:41;
} ii_ibia0_fld_s;
} ii_ibia0_u_t;
************************************************************************/
typedef union ii_ibls1_u {
- uint64_t ii_ibls1_regval;
+ u64 ii_ibls1_regval;
struct {
- uint64_t i_length:16;
- uint64_t i_error:1;
- uint64_t i_rsvd_1:3;
- uint64_t i_busy:1;
- uint64_t i_rsvd:43;
+ u64 i_length:16;
+ u64 i_error:1;
+ u64 i_rsvd_1:3;
+ u64 i_busy:1;
+ u64 i_rsvd:43;
} ii_ibls1_fld_s;
} ii_ibls1_u_t;
************************************************************************/
typedef union ii_ibsa1_u {
- uint64_t ii_ibsa1_regval;
+ u64 ii_ibsa1_regval;
struct {
- uint64_t i_rsvd_1:7;
- uint64_t i_addr:33;
- uint64_t i_rsvd:24;
+ u64 i_rsvd_1:7;
+ u64 i_addr:33;
+ u64 i_rsvd:24;
} ii_ibsa1_fld_s;
} ii_ibsa1_u_t;
************************************************************************/
typedef union ii_ibda1_u {
- uint64_t ii_ibda1_regval;
+ u64 ii_ibda1_regval;
struct {
- uint64_t i_rsvd_1:7;
- uint64_t i_addr:33;
- uint64_t i_rsvd:24;
+ u64 i_rsvd_1:7;
+ u64 i_addr:33;
+ u64 i_rsvd:24;
} ii_ibda1_fld_s;
} ii_ibda1_u_t;
************************************************************************/
typedef union ii_ibct1_u {
- uint64_t ii_ibct1_regval;
- struct {
- uint64_t i_zerofill:1;
- uint64_t i_rsvd_2:3;
- uint64_t i_notify:1;
- uint64_t i_rsvd_1:3;
- uint64_t i_poison:1;
- uint64_t i_rsvd:55;
+ u64 ii_ibct1_regval;
+ struct {
+ u64 i_zerofill:1;
+ u64 i_rsvd_2:3;
+ u64 i_notify:1;
+ u64 i_rsvd_1:3;
+ u64 i_poison:1;
+ u64 i_rsvd:55;
} ii_ibct1_fld_s;
} ii_ibct1_u_t;
************************************************************************/
typedef union ii_ibna1_u {
- uint64_t ii_ibna1_regval;
+ u64 ii_ibna1_regval;
struct {
- uint64_t i_rsvd_1:7;
- uint64_t i_addr:33;
- uint64_t i_rsvd:24;
+ u64 i_rsvd_1:7;
+ u64 i_addr:33;
+ u64 i_rsvd:24;
} ii_ibna1_fld_s;
} ii_ibna1_u_t;
************************************************************************/
typedef union ii_ibia1_u {
- uint64_t ii_ibia1_regval;
+ u64 ii_ibia1_regval;
struct {
- uint64_t i_pi_id:1;
- uint64_t i_node_id:8;
- uint64_t i_rsvd_1:7;
- uint64_t i_level:7;
- uint64_t i_rsvd:41;
+ u64 i_pi_id:1;
+ u64 i_node_id:8;
+ u64 i_rsvd_1:7;
+ u64 i_level:7;
+ u64 i_rsvd:41;
} ii_ibia1_fld_s;
} ii_ibia1_u_t;
************************************************************************/
typedef union ii_ipcr_u {
- uint64_t ii_ipcr_regval;
+ u64 ii_ipcr_regval;
struct {
- uint64_t i_ippr0_c:4;
- uint64_t i_ippr1_c:4;
- uint64_t i_icct:8;
- uint64_t i_rsvd:48;
+ u64 i_ippr0_c:4;
+ u64 i_ippr1_c:4;
+ u64 i_icct:8;
+ u64 i_rsvd:48;
} ii_ipcr_fld_s;
} ii_ipcr_u_t;
************************************************************************/
typedef union ii_ippr_u {
- uint64_t ii_ippr_regval;
+ u64 ii_ippr_regval;
struct {
- uint64_t i_ippr0:32;
- uint64_t i_ippr1:32;
+ u64 i_ippr0:32;
+ u64 i_ippr1:32;
} ii_ippr_fld_s;
} ii_ippr_u_t;
#define IO_PERF_SETS 32
/* Bit for the widget in inbound access register */
-#define IIO_IIWA_WIDGET(_w) ((uint64_t)(1ULL << _w))
+#define IIO_IIWA_WIDGET(_w) ((u64)(1ULL << _w))
/* Bit for the widget in outbound access register */
-#define IIO_IOWA_WIDGET(_w) ((uint64_t)(1ULL << _w))
+#define IIO_IOWA_WIDGET(_w) ((u64)(1ULL << _w))
/* NOTE: The following define assumes that we are going to get
* widget numbers from 8 thru F and the device numbers within
* widget from 0 thru 7.
*/
-#define IIO_IIDEM_WIDGETDEV_MASK(w, d) ((uint64_t)(1ULL << (8 * ((w) - 8) + (d))))
+#define IIO_IIDEM_WIDGETDEV_MASK(w, d) ((u64)(1ULL << (8 * ((w) - 8) + (d))))
/* IO Interrupt Destination Register */
#define IIO_IIDSR_SENT_SHIFT 28
*/
typedef union hubii_wcr_u {
- uint64_t wcr_reg_value;
+ u64 wcr_reg_value;
struct {
- uint64_t wcr_widget_id:4, /* LLP crossbar credit */
+ u64 wcr_widget_id:4, /* LLP crossbar credit */
wcr_tag_mode:1, /* Tag mode */
wcr_rsvd1:8, /* Reserved */
wcr_xbar_crd:3, /* LLP crossbar credit */
performed */
typedef union io_perf_sel {
- uint64_t perf_sel_reg;
+ u64 perf_sel_reg;
struct {
- uint64_t perf_ippr0:4, perf_ippr1:4, perf_icct:8, perf_rsvd:48;
+ u64 perf_ippr0:4, perf_ippr1:4, perf_icct:8, perf_rsvd:48;
} perf_sel_bits;
} io_perf_sel_t;
hardware problems there is only one counter, not two. */
typedef union io_perf_cnt {
- uint64_t perf_cnt;
+ u64 perf_cnt;
struct {
- uint64_t perf_cnt:20, perf_rsvd2:12, perf_rsvd1:32;
+ u64 perf_cnt:20, perf_rsvd2:12, perf_rsvd1:32;
} perf_cnt_bits;
} io_perf_cnt_t;
typedef union iprte_a {
- uint64_t entry;
- struct {
- uint64_t i_rsvd_1:3;
- uint64_t i_addr:38;
- uint64_t i_init:3;
- uint64_t i_source:8;
- uint64_t i_rsvd:2;
- uint64_t i_widget:4;
- uint64_t i_to_cnt:5;
- uint64_t i_vld:1;
+ u64 entry;
+ struct {
+ u64 i_rsvd_1:3;
+ u64 i_addr:38;
+ u64 i_init:3;
+ u64 i_source:8;
+ u64 i_rsvd:2;
+ u64 i_widget:4;
+ u64 i_to_cnt:5;
+ u64 i_vld:1;
} iprte_fields;
} iprte_a_t;
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
- * Copyright (c) 2005 Silicon Graphics, Inc. All rights reserved.
+ * Copyright (c) 2005-2006 Silicon Graphics, Inc. All rights reserved.
*/
* "false" for new features.
*
* Use:
- * if (sn_prom_feature_available(PRF_FEATURE_XXX))
+ * if (sn_prom_feature_available(PRF_XXX))
* ...
*/
-/*
- * Example: feature XXX
- */
-#define PRF_FEATURE_XXX 0
+#define PRF_PAL_CACHE_FLUSH_SAFE 0
+#define PRF_DEVICE_FLUSH_LIST 1
*
* By default, features are disabled unless explicitly enabled.
*/
-#define OSF_MCA_SLV_TO_OS_INIT_SLV 0
-#define OSF_FEAT_LOG_SBES 1
+#define OSF_MCA_SLV_TO_OS_INIT_SLV 0
+#define OSF_FEAT_LOG_SBES 1
#endif /* _ASM_IA64_SN_FEATURE_SETS_H */
ret_stuff.v0 = 0;
ret_stuff.v1 = 0;
ret_stuff.v2 = 0;
- SAL_CALL_NOLOCK(ret_stuff, SN_SAL_CONSOLE_PUTC, (uint64_t)ch, 0, 0, 0, 0, 0, 0);
+ SAL_CALL_NOLOCK(ret_stuff, SN_SAL_CONSOLE_PUTC, (u64)ch, 0, 0, 0, 0, 0, 0);
return ret_stuff.status;
}
ret_stuff.v0 = 0;
ret_stuff.v1 = 0;
ret_stuff.v2 = 0;
- SAL_CALL_NOLOCK(ret_stuff, SN_SAL_CONSOLE_PUTB, (uint64_t)buf, (uint64_t)len, 0, 0, 0, 0, 0);
+ SAL_CALL_NOLOCK(ret_stuff, SN_SAL_CONSOLE_PUTB, (u64)buf, (u64)len, 0, 0, 0, 0, 0);
if ( ret_stuff.status == 0 ) {
return ret_stuff.v0;
ret_stuff.v0 = 0;
ret_stuff.v1 = 0;
ret_stuff.v2 = 0;
- SAL_CALL_REENTRANT(ret_stuff, SN_SAL_PRINT_ERROR, (uint64_t)hook, (uint64_t)rec, 0, 0, 0, 0, 0);
+ SAL_CALL_REENTRANT(ret_stuff, SN_SAL_PRINT_ERROR, (u64)hook, (u64)rec, 0, 0, 0, 0, 0);
return ret_stuff.status;
}
* Enable an interrupt on the SAL console device.
*/
static inline void
-ia64_sn_console_intr_enable(uint64_t intr)
+ia64_sn_console_intr_enable(u64 intr)
{
struct ia64_sal_retval ret_stuff;
* Disable an interrupt on the SAL console device.
*/
static inline void
-ia64_sn_console_intr_disable(uint64_t intr)
+ia64_sn_console_intr_disable(u64 intr)
{
struct ia64_sal_retval ret_stuff;
ret_stuff.v1 = 0;
ret_stuff.v2 = 0;
SAL_CALL_NOLOCK(ret_stuff, SN_SAL_CONSOLE_XMIT_CHARS,
- (uint64_t)buf, (uint64_t)len,
+ (u64)buf, (u64)len,
0, 0, 0, 0, 0);
if (ret_stuff.status == 0) {
*/
struct tioca {
- uint64_t ca_id; /* 0x000000 */
- uint64_t ca_control1; /* 0x000008 */
- uint64_t ca_control2; /* 0x000010 */
- uint64_t ca_status1; /* 0x000018 */
- uint64_t ca_status2; /* 0x000020 */
- uint64_t ca_gart_aperature; /* 0x000028 */
- uint64_t ca_gfx_detach; /* 0x000030 */
- uint64_t ca_inta_dest_addr; /* 0x000038 */
- uint64_t ca_intb_dest_addr; /* 0x000040 */
- uint64_t ca_err_int_dest_addr; /* 0x000048 */
- uint64_t ca_int_status; /* 0x000050 */
- uint64_t ca_int_status_alias; /* 0x000058 */
- uint64_t ca_mult_error; /* 0x000060 */
- uint64_t ca_mult_error_alias; /* 0x000068 */
- uint64_t ca_first_error; /* 0x000070 */
- uint64_t ca_int_mask; /* 0x000078 */
- uint64_t ca_crm_pkterr_type; /* 0x000080 */
- uint64_t ca_crm_pkterr_type_alias; /* 0x000088 */
- uint64_t ca_crm_ct_error_detail_1; /* 0x000090 */
- uint64_t ca_crm_ct_error_detail_2; /* 0x000098 */
- uint64_t ca_crm_tnumto; /* 0x0000A0 */
- uint64_t ca_gart_err; /* 0x0000A8 */
- uint64_t ca_pcierr_type; /* 0x0000B0 */
- uint64_t ca_pcierr_addr; /* 0x0000B8 */
-
- uint64_t ca_pad_0000C0[3]; /* 0x0000{C0..D0} */
-
- uint64_t ca_pci_rd_buf_flush; /* 0x0000D8 */
- uint64_t ca_pci_dma_addr_extn; /* 0x0000E0 */
- uint64_t ca_agp_dma_addr_extn; /* 0x0000E8 */
- uint64_t ca_force_inta; /* 0x0000F0 */
- uint64_t ca_force_intb; /* 0x0000F8 */
- uint64_t ca_debug_vector_sel; /* 0x000100 */
- uint64_t ca_debug_mux_core_sel; /* 0x000108 */
- uint64_t ca_debug_mux_pci_sel; /* 0x000110 */
- uint64_t ca_debug_domain_sel; /* 0x000118 */
-
- uint64_t ca_pad_000120[28]; /* 0x0001{20..F8} */
-
- uint64_t ca_gart_ptr_table; /* 0x200 */
- uint64_t ca_gart_tlb_addr[8]; /* 0x2{08..40} */
+ u64 ca_id; /* 0x000000 */
+ u64 ca_control1; /* 0x000008 */
+ u64 ca_control2; /* 0x000010 */
+ u64 ca_status1; /* 0x000018 */
+ u64 ca_status2; /* 0x000020 */
+ u64 ca_gart_aperature; /* 0x000028 */
+ u64 ca_gfx_detach; /* 0x000030 */
+ u64 ca_inta_dest_addr; /* 0x000038 */
+ u64 ca_intb_dest_addr; /* 0x000040 */
+ u64 ca_err_int_dest_addr; /* 0x000048 */
+ u64 ca_int_status; /* 0x000050 */
+ u64 ca_int_status_alias; /* 0x000058 */
+ u64 ca_mult_error; /* 0x000060 */
+ u64 ca_mult_error_alias; /* 0x000068 */
+ u64 ca_first_error; /* 0x000070 */
+ u64 ca_int_mask; /* 0x000078 */
+ u64 ca_crm_pkterr_type; /* 0x000080 */
+ u64 ca_crm_pkterr_type_alias; /* 0x000088 */
+ u64 ca_crm_ct_error_detail_1; /* 0x000090 */
+ u64 ca_crm_ct_error_detail_2; /* 0x000098 */
+ u64 ca_crm_tnumto; /* 0x0000A0 */
+ u64 ca_gart_err; /* 0x0000A8 */
+ u64 ca_pcierr_type; /* 0x0000B0 */
+ u64 ca_pcierr_addr; /* 0x0000B8 */
+
+ u64 ca_pad_0000C0[3]; /* 0x0000{C0..D0} */
+
+ u64 ca_pci_rd_buf_flush; /* 0x0000D8 */
+ u64 ca_pci_dma_addr_extn; /* 0x0000E0 */
+ u64 ca_agp_dma_addr_extn; /* 0x0000E8 */
+ u64 ca_force_inta; /* 0x0000F0 */
+ u64 ca_force_intb; /* 0x0000F8 */
+ u64 ca_debug_vector_sel; /* 0x000100 */
+ u64 ca_debug_mux_core_sel; /* 0x000108 */
+ u64 ca_debug_mux_pci_sel; /* 0x000110 */
+ u64 ca_debug_domain_sel; /* 0x000118 */
+
+ u64 ca_pad_000120[28]; /* 0x0001{20..F8} */
+
+ u64 ca_gart_ptr_table; /* 0x200 */
+ u64 ca_gart_tlb_addr[8]; /* 0x2{08..40} */
};
/*
/*
* General GART stuff
*/
- uint64_t ca_ap_size; /* size of aperature in bytes */
- uint32_t ca_gart_entries; /* # uint64_t entries in gart */
- uint32_t ca_ap_pagesize; /* aperature page size in bytes */
- uint64_t ca_ap_bus_base; /* bus address of CA aperature */
- uint64_t ca_gart_size; /* gart size in bytes */
- uint64_t *ca_gart; /* gart table vaddr */
- uint64_t ca_gart_coretalk_addr; /* gart coretalk addr */
- uint8_t ca_gart_iscoherent; /* used in tioca_tlbflush */
+ u64 ca_ap_size; /* size of aperature in bytes */
+ u32 ca_gart_entries; /* # u64 entries in gart */
+ u32 ca_ap_pagesize; /* aperature page size in bytes */
+ u64 ca_ap_bus_base; /* bus address of CA aperature */
+ u64 ca_gart_size; /* gart size in bytes */
+ u64 *ca_gart; /* gart table vaddr */
+ u64 ca_gart_coretalk_addr; /* gart coretalk addr */
+ u8 ca_gart_iscoherent; /* used in tioca_tlbflush */
/* PCI GART convenience values */
- uint64_t ca_pciap_base; /* pci aperature bus base address */
- uint64_t ca_pciap_size; /* pci aperature size (bytes) */
- uint64_t ca_pcigart_base; /* gfx GART bus base address */
- uint64_t *ca_pcigart; /* gfx GART vm address */
- uint32_t ca_pcigart_entries;
- uint32_t ca_pcigart_start; /* PCI start index in ca_gart */
+ u64 ca_pciap_base; /* pci aperature bus base address */
+ u64 ca_pciap_size; /* pci aperature size (bytes) */
+ u64 ca_pcigart_base; /* gfx GART bus base address */
+ u64 *ca_pcigart; /* gfx GART vm address */
+ u32 ca_pcigart_entries;
+ u32 ca_pcigart_start; /* PCI start index in ca_gart */
void *ca_pcigart_pagemap;
/* AGP GART convenience values */
- uint64_t ca_gfxap_base; /* gfx aperature bus base address */
- uint64_t ca_gfxap_size; /* gfx aperature size (bytes) */
- uint64_t ca_gfxgart_base; /* gfx GART bus base address */
- uint64_t *ca_gfxgart; /* gfx GART vm address */
- uint32_t ca_gfxgart_entries;
- uint32_t ca_gfxgart_start; /* agpgart start index in ca_gart */
+ u64 ca_gfxap_base; /* gfx aperature bus base address */
+ u64 ca_gfxap_size; /* gfx aperature size (bytes) */
+ u64 ca_gfxgart_base; /* gfx GART bus base address */
+ u64 *ca_gfxgart; /* gfx GART vm address */
+ u32 ca_gfxgart_entries;
+ u32 ca_gfxgart_start; /* agpgart start index in ca_gart */
};
/*
struct tioca_common {
struct pcibus_bussoft ca_common; /* common pciio header */
- uint32_t ca_rev;
- uint32_t ca_closest_nasid;
+ u32 ca_rev;
+ u32 ca_closest_nasid;
- uint64_t ca_prom_private;
- uint64_t ca_kernel_private;
+ u64 ca_prom_private;
+ u64 ca_kernel_private;
};
/**
*/
static inline unsigned long
-tioca_physpage_to_gart(uint64_t page_addr)
+tioca_physpage_to_gart(u64 page_addr)
{
- uint64_t coretalk_addr;
+ u64 coretalk_addr;
coretalk_addr = PHYS_TO_TIODMA(page_addr);
if (!coretalk_addr) {
static inline void
tioca_tlbflush(struct tioca_kernel *tioca_kernel)
{
- volatile uint64_t tmp;
+ volatile u64 tmp;
volatile struct tioca *ca_base;
struct tioca_common *tioca_common;
tmp = __sn_readq_relaxed(&ca_base->ca_control2);
}
-extern uint32_t tioca_gart_found;
+extern u32 tioca_gart_found;
extern struct list_head tioca_list;
extern int tioca_init_provider(void);
extern void tioca_fastwrite_enable(struct tioca_kernel *tioca_kern);
/*
* ADMIN : Administration Registers
*/
- uint64_t ce_adm_id; /* 0x000000 */
- uint64_t ce_pad_000008; /* 0x000008 */
- uint64_t ce_adm_dyn_credit_status; /* 0x000010 */
- uint64_t ce_adm_last_credit_status; /* 0x000018 */
- uint64_t ce_adm_credit_limit; /* 0x000020 */
- uint64_t ce_adm_force_credit; /* 0x000028 */
- uint64_t ce_adm_control; /* 0x000030 */
- uint64_t ce_adm_mmr_chn_timeout; /* 0x000038 */
- uint64_t ce_adm_ssp_ure_timeout; /* 0x000040 */
- uint64_t ce_adm_ssp_dre_timeout; /* 0x000048 */
- uint64_t ce_adm_ssp_debug_sel; /* 0x000050 */
- uint64_t ce_adm_int_status; /* 0x000058 */
- uint64_t ce_adm_int_status_alias; /* 0x000060 */
- uint64_t ce_adm_int_mask; /* 0x000068 */
- uint64_t ce_adm_int_pending; /* 0x000070 */
- uint64_t ce_adm_force_int; /* 0x000078 */
- uint64_t ce_adm_ure_ups_buf_barrier_flush; /* 0x000080 */
- uint64_t ce_adm_int_dest[15]; /* 0x000088 -- 0x0000F8 */
- uint64_t ce_adm_error_summary; /* 0x000100 */
- uint64_t ce_adm_error_summary_alias; /* 0x000108 */
- uint64_t ce_adm_error_mask; /* 0x000110 */
- uint64_t ce_adm_first_error; /* 0x000118 */
- uint64_t ce_adm_error_overflow; /* 0x000120 */
- uint64_t ce_adm_error_overflow_alias; /* 0x000128 */
- uint64_t ce_pad_000130[2]; /* 0x000130 -- 0x000138 */
- uint64_t ce_adm_tnum_error; /* 0x000140 */
- uint64_t ce_adm_mmr_err_detail; /* 0x000148 */
- uint64_t ce_adm_msg_sram_perr_detail; /* 0x000150 */
- uint64_t ce_adm_bap_sram_perr_detail; /* 0x000158 */
- uint64_t ce_adm_ce_sram_perr_detail; /* 0x000160 */
- uint64_t ce_adm_ce_credit_oflow_detail; /* 0x000168 */
- uint64_t ce_adm_tx_link_idle_max_timer; /* 0x000170 */
- uint64_t ce_adm_pcie_debug_sel; /* 0x000178 */
- uint64_t ce_pad_000180[16]; /* 0x000180 -- 0x0001F8 */
-
- uint64_t ce_adm_pcie_debug_sel_top; /* 0x000200 */
- uint64_t ce_adm_pcie_debug_lat_sel_lo_top; /* 0x000208 */
- uint64_t ce_adm_pcie_debug_lat_sel_hi_top; /* 0x000210 */
- uint64_t ce_adm_pcie_debug_trig_sel_top; /* 0x000218 */
- uint64_t ce_adm_pcie_debug_trig_lat_sel_lo_top; /* 0x000220 */
- uint64_t ce_adm_pcie_debug_trig_lat_sel_hi_top; /* 0x000228 */
- uint64_t ce_adm_pcie_trig_compare_top; /* 0x000230 */
- uint64_t ce_adm_pcie_trig_compare_en_top; /* 0x000238 */
- uint64_t ce_adm_ssp_debug_sel_top; /* 0x000240 */
- uint64_t ce_adm_ssp_debug_lat_sel_lo_top; /* 0x000248 */
- uint64_t ce_adm_ssp_debug_lat_sel_hi_top; /* 0x000250 */
- uint64_t ce_adm_ssp_debug_trig_sel_top; /* 0x000258 */
- uint64_t ce_adm_ssp_debug_trig_lat_sel_lo_top; /* 0x000260 */
- uint64_t ce_adm_ssp_debug_trig_lat_sel_hi_top; /* 0x000268 */
- uint64_t ce_adm_ssp_trig_compare_top; /* 0x000270 */
- uint64_t ce_adm_ssp_trig_compare_en_top; /* 0x000278 */
- uint64_t ce_pad_000280[48]; /* 0x000280 -- 0x0003F8 */
-
- uint64_t ce_adm_bap_ctrl; /* 0x000400 */
- uint64_t ce_pad_000408[127]; /* 0x000408 -- 0x0007F8 */
-
- uint64_t ce_msg_buf_data63_0[35]; /* 0x000800 -- 0x000918 */
- uint64_t ce_pad_000920[29]; /* 0x000920 -- 0x0009F8 */
-
- uint64_t ce_msg_buf_data127_64[35]; /* 0x000A00 -- 0x000B18 */
- uint64_t ce_pad_000B20[29]; /* 0x000B20 -- 0x000BF8 */
-
- uint64_t ce_msg_buf_parity[35]; /* 0x000C00 -- 0x000D18 */
- uint64_t ce_pad_000D20[29]; /* 0x000D20 -- 0x000DF8 */
-
- uint64_t ce_pad_000E00[576]; /* 0x000E00 -- 0x001FF8 */
+ u64 ce_adm_id; /* 0x000000 */
+ u64 ce_pad_000008; /* 0x000008 */
+ u64 ce_adm_dyn_credit_status; /* 0x000010 */
+ u64 ce_adm_last_credit_status; /* 0x000018 */
+ u64 ce_adm_credit_limit; /* 0x000020 */
+ u64 ce_adm_force_credit; /* 0x000028 */
+ u64 ce_adm_control; /* 0x000030 */
+ u64 ce_adm_mmr_chn_timeout; /* 0x000038 */
+ u64 ce_adm_ssp_ure_timeout; /* 0x000040 */
+ u64 ce_adm_ssp_dre_timeout; /* 0x000048 */
+ u64 ce_adm_ssp_debug_sel; /* 0x000050 */
+ u64 ce_adm_int_status; /* 0x000058 */
+ u64 ce_adm_int_status_alias; /* 0x000060 */
+ u64 ce_adm_int_mask; /* 0x000068 */
+ u64 ce_adm_int_pending; /* 0x000070 */
+ u64 ce_adm_force_int; /* 0x000078 */
+ u64 ce_adm_ure_ups_buf_barrier_flush; /* 0x000080 */
+ u64 ce_adm_int_dest[15]; /* 0x000088 -- 0x0000F8 */
+ u64 ce_adm_error_summary; /* 0x000100 */
+ u64 ce_adm_error_summary_alias; /* 0x000108 */
+ u64 ce_adm_error_mask; /* 0x000110 */
+ u64 ce_adm_first_error; /* 0x000118 */
+ u64 ce_adm_error_overflow; /* 0x000120 */
+ u64 ce_adm_error_overflow_alias; /* 0x000128 */
+ u64 ce_pad_000130[2]; /* 0x000130 -- 0x000138 */
+ u64 ce_adm_tnum_error; /* 0x000140 */
+ u64 ce_adm_mmr_err_detail; /* 0x000148 */
+ u64 ce_adm_msg_sram_perr_detail; /* 0x000150 */
+ u64 ce_adm_bap_sram_perr_detail; /* 0x000158 */
+ u64 ce_adm_ce_sram_perr_detail; /* 0x000160 */
+ u64 ce_adm_ce_credit_oflow_detail; /* 0x000168 */
+ u64 ce_adm_tx_link_idle_max_timer; /* 0x000170 */
+ u64 ce_adm_pcie_debug_sel; /* 0x000178 */
+ u64 ce_pad_000180[16]; /* 0x000180 -- 0x0001F8 */
+
+ u64 ce_adm_pcie_debug_sel_top; /* 0x000200 */
+ u64 ce_adm_pcie_debug_lat_sel_lo_top; /* 0x000208 */
+ u64 ce_adm_pcie_debug_lat_sel_hi_top; /* 0x000210 */
+ u64 ce_adm_pcie_debug_trig_sel_top; /* 0x000218 */
+ u64 ce_adm_pcie_debug_trig_lat_sel_lo_top; /* 0x000220 */
+ u64 ce_adm_pcie_debug_trig_lat_sel_hi_top; /* 0x000228 */
+ u64 ce_adm_pcie_trig_compare_top; /* 0x000230 */
+ u64 ce_adm_pcie_trig_compare_en_top; /* 0x000238 */
+ u64 ce_adm_ssp_debug_sel_top; /* 0x000240 */
+ u64 ce_adm_ssp_debug_lat_sel_lo_top; /* 0x000248 */
+ u64 ce_adm_ssp_debug_lat_sel_hi_top; /* 0x000250 */
+ u64 ce_adm_ssp_debug_trig_sel_top; /* 0x000258 */
+ u64 ce_adm_ssp_debug_trig_lat_sel_lo_top; /* 0x000260 */
+ u64 ce_adm_ssp_debug_trig_lat_sel_hi_top; /* 0x000268 */
+ u64 ce_adm_ssp_trig_compare_top; /* 0x000270 */
+ u64 ce_adm_ssp_trig_compare_en_top; /* 0x000278 */
+ u64 ce_pad_000280[48]; /* 0x000280 -- 0x0003F8 */
+
+ u64 ce_adm_bap_ctrl; /* 0x000400 */
+ u64 ce_pad_000408[127]; /* 0x000408 -- 0x0007F8 */
+
+ u64 ce_msg_buf_data63_0[35]; /* 0x000800 -- 0x000918 */
+ u64 ce_pad_000920[29]; /* 0x000920 -- 0x0009F8 */
+
+ u64 ce_msg_buf_data127_64[35]; /* 0x000A00 -- 0x000B18 */
+ u64 ce_pad_000B20[29]; /* 0x000B20 -- 0x000BF8 */
+
+ u64 ce_msg_buf_parity[35]; /* 0x000C00 -- 0x000D18 */
+ u64 ce_pad_000D20[29]; /* 0x000D20 -- 0x000DF8 */
+
+ u64 ce_pad_000E00[576]; /* 0x000E00 -- 0x001FF8 */
/*
* LSI : LSI's PCI Express Link Registers (Link#1 and Link#2)
*/
#define ce_lsi(link_num) ce_lsi[link_num-1]
struct ce_lsi_reg {
- uint64_t ce_lsi_lpu_id; /* 0x00z000 */
- uint64_t ce_lsi_rst; /* 0x00z008 */
- uint64_t ce_lsi_dbg_stat; /* 0x00z010 */
- uint64_t ce_lsi_dbg_cfg; /* 0x00z018 */
- uint64_t ce_lsi_ltssm_ctrl; /* 0x00z020 */
- uint64_t ce_lsi_lk_stat; /* 0x00z028 */
- uint64_t ce_pad_00z030[2]; /* 0x00z030 -- 0x00z038 */
- uint64_t ce_lsi_int_and_stat; /* 0x00z040 */
- uint64_t ce_lsi_int_mask; /* 0x00z048 */
- uint64_t ce_pad_00z050[22]; /* 0x00z050 -- 0x00z0F8 */
- uint64_t ce_lsi_lk_perf_cnt_sel; /* 0x00z100 */
- uint64_t ce_pad_00z108; /* 0x00z108 */
- uint64_t ce_lsi_lk_perf_cnt_ctrl; /* 0x00z110 */
- uint64_t ce_pad_00z118; /* 0x00z118 */
- uint64_t ce_lsi_lk_perf_cnt1; /* 0x00z120 */
- uint64_t ce_lsi_lk_perf_cnt1_test; /* 0x00z128 */
- uint64_t ce_lsi_lk_perf_cnt2; /* 0x00z130 */
- uint64_t ce_lsi_lk_perf_cnt2_test; /* 0x00z138 */
- uint64_t ce_pad_00z140[24]; /* 0x00z140 -- 0x00z1F8 */
- uint64_t ce_lsi_lk_lyr_cfg; /* 0x00z200 */
- uint64_t ce_lsi_lk_lyr_status; /* 0x00z208 */
- uint64_t ce_lsi_lk_lyr_int_stat; /* 0x00z210 */
- uint64_t ce_lsi_lk_ly_int_stat_test; /* 0x00z218 */
- uint64_t ce_lsi_lk_ly_int_stat_mask; /* 0x00z220 */
- uint64_t ce_pad_00z228[3]; /* 0x00z228 -- 0x00z238 */
- uint64_t ce_lsi_fc_upd_ctl; /* 0x00z240 */
- uint64_t ce_pad_00z248[3]; /* 0x00z248 -- 0x00z258 */
- uint64_t ce_lsi_flw_ctl_upd_to_timer; /* 0x00z260 */
- uint64_t ce_lsi_flw_ctl_upd_timer0; /* 0x00z268 */
- uint64_t ce_lsi_flw_ctl_upd_timer1; /* 0x00z270 */
- uint64_t ce_pad_00z278[49]; /* 0x00z278 -- 0x00z3F8 */
- uint64_t ce_lsi_freq_nak_lat_thrsh; /* 0x00z400 */
- uint64_t ce_lsi_ack_nak_lat_tmr; /* 0x00z408 */
- uint64_t ce_lsi_rply_tmr_thr; /* 0x00z410 */
- uint64_t ce_lsi_rply_tmr; /* 0x00z418 */
- uint64_t ce_lsi_rply_num_stat; /* 0x00z420 */
- uint64_t ce_lsi_rty_buf_max_addr; /* 0x00z428 */
- uint64_t ce_lsi_rty_fifo_ptr; /* 0x00z430 */
- uint64_t ce_lsi_rty_fifo_rd_wr_ptr; /* 0x00z438 */
- uint64_t ce_lsi_rty_fifo_cred; /* 0x00z440 */
- uint64_t ce_lsi_seq_cnt; /* 0x00z448 */
- uint64_t ce_lsi_ack_sent_seq_num; /* 0x00z450 */
- uint64_t ce_lsi_seq_cnt_fifo_max_addr; /* 0x00z458 */
- uint64_t ce_lsi_seq_cnt_fifo_ptr; /* 0x00z460 */
- uint64_t ce_lsi_seq_cnt_rd_wr_ptr; /* 0x00z468 */
- uint64_t ce_lsi_tx_lk_ts_ctl; /* 0x00z470 */
- uint64_t ce_pad_00z478; /* 0x00z478 */
- uint64_t ce_lsi_mem_addr_ctl; /* 0x00z480 */
- uint64_t ce_lsi_mem_d_ld0; /* 0x00z488 */
- uint64_t ce_lsi_mem_d_ld1; /* 0x00z490 */
- uint64_t ce_lsi_mem_d_ld2; /* 0x00z498 */
- uint64_t ce_lsi_mem_d_ld3; /* 0x00z4A0 */
- uint64_t ce_lsi_mem_d_ld4; /* 0x00z4A8 */
- uint64_t ce_pad_00z4B0[2]; /* 0x00z4B0 -- 0x00z4B8 */
- uint64_t ce_lsi_rty_d_cnt; /* 0x00z4C0 */
- uint64_t ce_lsi_seq_buf_cnt; /* 0x00z4C8 */
- uint64_t ce_lsi_seq_buf_bt_d; /* 0x00z4D0 */
- uint64_t ce_pad_00z4D8; /* 0x00z4D8 */
- uint64_t ce_lsi_ack_lat_thr; /* 0x00z4E0 */
- uint64_t ce_pad_00z4E8[3]; /* 0x00z4E8 -- 0x00z4F8 */
- uint64_t ce_lsi_nxt_rcv_seq_1_cntr; /* 0x00z500 */
- uint64_t ce_lsi_unsp_dllp_rcvd; /* 0x00z508 */
- uint64_t ce_lsi_rcv_lk_ts_ctl; /* 0x00z510 */
- uint64_t ce_pad_00z518[29]; /* 0x00z518 -- 0x00z5F8 */
- uint64_t ce_lsi_phy_lyr_cfg; /* 0x00z600 */
- uint64_t ce_pad_00z608; /* 0x00z608 */
- uint64_t ce_lsi_phy_lyr_int_stat; /* 0x00z610 */
- uint64_t ce_lsi_phy_lyr_int_stat_test; /* 0x00z618 */
- uint64_t ce_lsi_phy_lyr_int_mask; /* 0x00z620 */
- uint64_t ce_pad_00z628[11]; /* 0x00z628 -- 0x00z678 */
- uint64_t ce_lsi_rcv_phy_cfg; /* 0x00z680 */
- uint64_t ce_lsi_rcv_phy_stat1; /* 0x00z688 */
- uint64_t ce_lsi_rcv_phy_stat2; /* 0x00z690 */
- uint64_t ce_lsi_rcv_phy_stat3; /* 0x00z698 */
- uint64_t ce_lsi_rcv_phy_int_stat; /* 0x00z6A0 */
- uint64_t ce_lsi_rcv_phy_int_stat_test; /* 0x00z6A8 */
- uint64_t ce_lsi_rcv_phy_int_mask; /* 0x00z6B0 */
- uint64_t ce_pad_00z6B8[9]; /* 0x00z6B8 -- 0x00z6F8 */
- uint64_t ce_lsi_tx_phy_cfg; /* 0x00z700 */
- uint64_t ce_lsi_tx_phy_stat; /* 0x00z708 */
- uint64_t ce_lsi_tx_phy_int_stat; /* 0x00z710 */
- uint64_t ce_lsi_tx_phy_int_stat_test; /* 0x00z718 */
- uint64_t ce_lsi_tx_phy_int_mask; /* 0x00z720 */
- uint64_t ce_lsi_tx_phy_stat2; /* 0x00z728 */
- uint64_t ce_pad_00z730[10]; /* 0x00z730 -- 0x00z77F */
- uint64_t ce_lsi_ltssm_cfg1; /* 0x00z780 */
- uint64_t ce_lsi_ltssm_cfg2; /* 0x00z788 */
- uint64_t ce_lsi_ltssm_cfg3; /* 0x00z790 */
- uint64_t ce_lsi_ltssm_cfg4; /* 0x00z798 */
- uint64_t ce_lsi_ltssm_cfg5; /* 0x00z7A0 */
- uint64_t ce_lsi_ltssm_stat1; /* 0x00z7A8 */
- uint64_t ce_lsi_ltssm_stat2; /* 0x00z7B0 */
- uint64_t ce_lsi_ltssm_int_stat; /* 0x00z7B8 */
- uint64_t ce_lsi_ltssm_int_stat_test; /* 0x00z7C0 */
- uint64_t ce_lsi_ltssm_int_mask; /* 0x00z7C8 */
- uint64_t ce_lsi_ltssm_stat_wr_en; /* 0x00z7D0 */
- uint64_t ce_pad_00z7D8[5]; /* 0x00z7D8 -- 0x00z7F8 */
- uint64_t ce_lsi_gb_cfg1; /* 0x00z800 */
- uint64_t ce_lsi_gb_cfg2; /* 0x00z808 */
- uint64_t ce_lsi_gb_cfg3; /* 0x00z810 */
- uint64_t ce_lsi_gb_cfg4; /* 0x00z818 */
- uint64_t ce_lsi_gb_stat; /* 0x00z820 */
- uint64_t ce_lsi_gb_int_stat; /* 0x00z828 */
- uint64_t ce_lsi_gb_int_stat_test; /* 0x00z830 */
- uint64_t ce_lsi_gb_int_mask; /* 0x00z838 */
- uint64_t ce_lsi_gb_pwr_dn1; /* 0x00z840 */
- uint64_t ce_lsi_gb_pwr_dn2; /* 0x00z848 */
- uint64_t ce_pad_00z850[246]; /* 0x00z850 -- 0x00zFF8 */
+ u64 ce_lsi_lpu_id; /* 0x00z000 */
+ u64 ce_lsi_rst; /* 0x00z008 */
+ u64 ce_lsi_dbg_stat; /* 0x00z010 */
+ u64 ce_lsi_dbg_cfg; /* 0x00z018 */
+ u64 ce_lsi_ltssm_ctrl; /* 0x00z020 */
+ u64 ce_lsi_lk_stat; /* 0x00z028 */
+ u64 ce_pad_00z030[2]; /* 0x00z030 -- 0x00z038 */
+ u64 ce_lsi_int_and_stat; /* 0x00z040 */
+ u64 ce_lsi_int_mask; /* 0x00z048 */
+ u64 ce_pad_00z050[22]; /* 0x00z050 -- 0x00z0F8 */
+ u64 ce_lsi_lk_perf_cnt_sel; /* 0x00z100 */
+ u64 ce_pad_00z108; /* 0x00z108 */
+ u64 ce_lsi_lk_perf_cnt_ctrl; /* 0x00z110 */
+ u64 ce_pad_00z118; /* 0x00z118 */
+ u64 ce_lsi_lk_perf_cnt1; /* 0x00z120 */
+ u64 ce_lsi_lk_perf_cnt1_test; /* 0x00z128 */
+ u64 ce_lsi_lk_perf_cnt2; /* 0x00z130 */
+ u64 ce_lsi_lk_perf_cnt2_test; /* 0x00z138 */
+ u64 ce_pad_00z140[24]; /* 0x00z140 -- 0x00z1F8 */
+ u64 ce_lsi_lk_lyr_cfg; /* 0x00z200 */
+ u64 ce_lsi_lk_lyr_status; /* 0x00z208 */
+ u64 ce_lsi_lk_lyr_int_stat; /* 0x00z210 */
+ u64 ce_lsi_lk_ly_int_stat_test; /* 0x00z218 */
+ u64 ce_lsi_lk_ly_int_stat_mask; /* 0x00z220 */
+ u64 ce_pad_00z228[3]; /* 0x00z228 -- 0x00z238 */
+ u64 ce_lsi_fc_upd_ctl; /* 0x00z240 */
+ u64 ce_pad_00z248[3]; /* 0x00z248 -- 0x00z258 */
+ u64 ce_lsi_flw_ctl_upd_to_timer; /* 0x00z260 */
+ u64 ce_lsi_flw_ctl_upd_timer0; /* 0x00z268 */
+ u64 ce_lsi_flw_ctl_upd_timer1; /* 0x00z270 */
+ u64 ce_pad_00z278[49]; /* 0x00z278 -- 0x00z3F8 */
+ u64 ce_lsi_freq_nak_lat_thrsh; /* 0x00z400 */
+ u64 ce_lsi_ack_nak_lat_tmr; /* 0x00z408 */
+ u64 ce_lsi_rply_tmr_thr; /* 0x00z410 */
+ u64 ce_lsi_rply_tmr; /* 0x00z418 */
+ u64 ce_lsi_rply_num_stat; /* 0x00z420 */
+ u64 ce_lsi_rty_buf_max_addr; /* 0x00z428 */
+ u64 ce_lsi_rty_fifo_ptr; /* 0x00z430 */
+ u64 ce_lsi_rty_fifo_rd_wr_ptr; /* 0x00z438 */
+ u64 ce_lsi_rty_fifo_cred; /* 0x00z440 */
+ u64 ce_lsi_seq_cnt; /* 0x00z448 */
+ u64 ce_lsi_ack_sent_seq_num; /* 0x00z450 */
+ u64 ce_lsi_seq_cnt_fifo_max_addr; /* 0x00z458 */
+ u64 ce_lsi_seq_cnt_fifo_ptr; /* 0x00z460 */
+ u64 ce_lsi_seq_cnt_rd_wr_ptr; /* 0x00z468 */
+ u64 ce_lsi_tx_lk_ts_ctl; /* 0x00z470 */
+ u64 ce_pad_00z478; /* 0x00z478 */
+ u64 ce_lsi_mem_addr_ctl; /* 0x00z480 */
+ u64 ce_lsi_mem_d_ld0; /* 0x00z488 */
+ u64 ce_lsi_mem_d_ld1; /* 0x00z490 */
+ u64 ce_lsi_mem_d_ld2; /* 0x00z498 */
+ u64 ce_lsi_mem_d_ld3; /* 0x00z4A0 */
+ u64 ce_lsi_mem_d_ld4; /* 0x00z4A8 */
+ u64 ce_pad_00z4B0[2]; /* 0x00z4B0 -- 0x00z4B8 */
+ u64 ce_lsi_rty_d_cnt; /* 0x00z4C0 */
+ u64 ce_lsi_seq_buf_cnt; /* 0x00z4C8 */
+ u64 ce_lsi_seq_buf_bt_d; /* 0x00z4D0 */
+ u64 ce_pad_00z4D8; /* 0x00z4D8 */
+ u64 ce_lsi_ack_lat_thr; /* 0x00z4E0 */
+ u64 ce_pad_00z4E8[3]; /* 0x00z4E8 -- 0x00z4F8 */
+ u64 ce_lsi_nxt_rcv_seq_1_cntr; /* 0x00z500 */
+ u64 ce_lsi_unsp_dllp_rcvd; /* 0x00z508 */
+ u64 ce_lsi_rcv_lk_ts_ctl; /* 0x00z510 */
+ u64 ce_pad_00z518[29]; /* 0x00z518 -- 0x00z5F8 */
+ u64 ce_lsi_phy_lyr_cfg; /* 0x00z600 */
+ u64 ce_pad_00z608; /* 0x00z608 */
+ u64 ce_lsi_phy_lyr_int_stat; /* 0x00z610 */
+ u64 ce_lsi_phy_lyr_int_stat_test; /* 0x00z618 */
+ u64 ce_lsi_phy_lyr_int_mask; /* 0x00z620 */
+ u64 ce_pad_00z628[11]; /* 0x00z628 -- 0x00z678 */
+ u64 ce_lsi_rcv_phy_cfg; /* 0x00z680 */
+ u64 ce_lsi_rcv_phy_stat1; /* 0x00z688 */
+ u64 ce_lsi_rcv_phy_stat2; /* 0x00z690 */
+ u64 ce_lsi_rcv_phy_stat3; /* 0x00z698 */
+ u64 ce_lsi_rcv_phy_int_stat; /* 0x00z6A0 */
+ u64 ce_lsi_rcv_phy_int_stat_test; /* 0x00z6A8 */
+ u64 ce_lsi_rcv_phy_int_mask; /* 0x00z6B0 */
+ u64 ce_pad_00z6B8[9]; /* 0x00z6B8 -- 0x00z6F8 */
+ u64 ce_lsi_tx_phy_cfg; /* 0x00z700 */
+ u64 ce_lsi_tx_phy_stat; /* 0x00z708 */
+ u64 ce_lsi_tx_phy_int_stat; /* 0x00z710 */
+ u64 ce_lsi_tx_phy_int_stat_test; /* 0x00z718 */
+ u64 ce_lsi_tx_phy_int_mask; /* 0x00z720 */
+ u64 ce_lsi_tx_phy_stat2; /* 0x00z728 */
+ u64 ce_pad_00z730[10]; /* 0x00z730 -- 0x00z77F */
+ u64 ce_lsi_ltssm_cfg1; /* 0x00z780 */
+ u64 ce_lsi_ltssm_cfg2; /* 0x00z788 */
+ u64 ce_lsi_ltssm_cfg3; /* 0x00z790 */
+ u64 ce_lsi_ltssm_cfg4; /* 0x00z798 */
+ u64 ce_lsi_ltssm_cfg5; /* 0x00z7A0 */
+ u64 ce_lsi_ltssm_stat1; /* 0x00z7A8 */
+ u64 ce_lsi_ltssm_stat2; /* 0x00z7B0 */
+ u64 ce_lsi_ltssm_int_stat; /* 0x00z7B8 */
+ u64 ce_lsi_ltssm_int_stat_test; /* 0x00z7C0 */
+ u64 ce_lsi_ltssm_int_mask; /* 0x00z7C8 */
+ u64 ce_lsi_ltssm_stat_wr_en; /* 0x00z7D0 */
+ u64 ce_pad_00z7D8[5]; /* 0x00z7D8 -- 0x00z7F8 */
+ u64 ce_lsi_gb_cfg1; /* 0x00z800 */
+ u64 ce_lsi_gb_cfg2; /* 0x00z808 */
+ u64 ce_lsi_gb_cfg3; /* 0x00z810 */
+ u64 ce_lsi_gb_cfg4; /* 0x00z818 */
+ u64 ce_lsi_gb_stat; /* 0x00z820 */
+ u64 ce_lsi_gb_int_stat; /* 0x00z828 */
+ u64 ce_lsi_gb_int_stat_test; /* 0x00z830 */
+ u64 ce_lsi_gb_int_mask; /* 0x00z838 */
+ u64 ce_lsi_gb_pwr_dn1; /* 0x00z840 */
+ u64 ce_lsi_gb_pwr_dn2; /* 0x00z848 */
+ u64 ce_pad_00z850[246]; /* 0x00z850 -- 0x00zFF8 */
} ce_lsi[2];
- uint64_t ce_pad_004000[10]; /* 0x004000 -- 0x004048 */
+ u64 ce_pad_004000[10]; /* 0x004000 -- 0x004048 */
/*
* CRM: Coretalk Receive Module Registers
*/
- uint64_t ce_crm_debug_mux; /* 0x004050 */
- uint64_t ce_pad_004058; /* 0x004058 */
- uint64_t ce_crm_ssp_err_cmd_wrd; /* 0x004060 */
- uint64_t ce_crm_ssp_err_addr; /* 0x004068 */
- uint64_t ce_crm_ssp_err_syn; /* 0x004070 */
+ u64 ce_crm_debug_mux; /* 0x004050 */
+ u64 ce_pad_004058; /* 0x004058 */
+ u64 ce_crm_ssp_err_cmd_wrd; /* 0x004060 */
+ u64 ce_crm_ssp_err_addr; /* 0x004068 */
+ u64 ce_crm_ssp_err_syn; /* 0x004070 */
- uint64_t ce_pad_004078[499]; /* 0x004078 -- 0x005008 */
+ u64 ce_pad_004078[499]; /* 0x004078 -- 0x005008 */
/*
* CXM: Coretalk Xmit Module Registers
*/
- uint64_t ce_cxm_dyn_credit_status; /* 0x005010 */
- uint64_t ce_cxm_last_credit_status; /* 0x005018 */
- uint64_t ce_cxm_credit_limit; /* 0x005020 */
- uint64_t ce_cxm_force_credit; /* 0x005028 */
- uint64_t ce_cxm_disable_bypass; /* 0x005030 */
- uint64_t ce_pad_005038[3]; /* 0x005038 -- 0x005048 */
- uint64_t ce_cxm_debug_mux; /* 0x005050 */
+ u64 ce_cxm_dyn_credit_status; /* 0x005010 */
+ u64 ce_cxm_last_credit_status; /* 0x005018 */
+ u64 ce_cxm_credit_limit; /* 0x005020 */
+ u64 ce_cxm_force_credit; /* 0x005028 */
+ u64 ce_cxm_disable_bypass; /* 0x005030 */
+ u64 ce_pad_005038[3]; /* 0x005038 -- 0x005048 */
+ u64 ce_cxm_debug_mux; /* 0x005050 */
- uint64_t ce_pad_005058[501]; /* 0x005058 -- 0x005FF8 */
+ u64 ce_pad_005058[501]; /* 0x005058 -- 0x005FF8 */
/*
* DTL: Downstream Transaction Layer Regs (Link#1 and Link#2)
#define ce_utl(link_num) ce_dtl_utl[link_num-1]
struct ce_dtl_utl_reg {
/* DTL */
- uint64_t ce_dtl_dtdr_credit_limit; /* 0x00y000 */
- uint64_t ce_dtl_dtdr_credit_force; /* 0x00y008 */
- uint64_t ce_dtl_dyn_credit_status; /* 0x00y010 */
- uint64_t ce_dtl_dtl_last_credit_stat; /* 0x00y018 */
- uint64_t ce_dtl_dtl_ctrl; /* 0x00y020 */
- uint64_t ce_pad_00y028[5]; /* 0x00y028 -- 0x00y048 */
- uint64_t ce_dtl_debug_sel; /* 0x00y050 */
- uint64_t ce_pad_00y058[501]; /* 0x00y058 -- 0x00yFF8 */
+ u64 ce_dtl_dtdr_credit_limit; /* 0x00y000 */
+ u64 ce_dtl_dtdr_credit_force; /* 0x00y008 */
+ u64 ce_dtl_dyn_credit_status; /* 0x00y010 */
+ u64 ce_dtl_dtl_last_credit_stat; /* 0x00y018 */
+ u64 ce_dtl_dtl_ctrl; /* 0x00y020 */
+ u64 ce_pad_00y028[5]; /* 0x00y028 -- 0x00y048 */
+ u64 ce_dtl_debug_sel; /* 0x00y050 */
+ u64 ce_pad_00y058[501]; /* 0x00y058 -- 0x00yFF8 */
/* UTL */
- uint64_t ce_utl_utl_ctrl; /* 0x00z000 */
- uint64_t ce_utl_debug_sel; /* 0x00z008 */
- uint64_t ce_pad_00z010[510]; /* 0x00z010 -- 0x00zFF8 */
+ u64 ce_utl_utl_ctrl; /* 0x00z000 */
+ u64 ce_utl_debug_sel; /* 0x00z008 */
+ u64 ce_pad_00z010[510]; /* 0x00z010 -- 0x00zFF8 */
} ce_dtl_utl[2];
- uint64_t ce_pad_00A000[514]; /* 0x00A000 -- 0x00B008 */
+ u64 ce_pad_00A000[514]; /* 0x00A000 -- 0x00B008 */
/*
* URE: Upstream Request Engine
*/
- uint64_t ce_ure_dyn_credit_status; /* 0x00B010 */
- uint64_t ce_ure_last_credit_status; /* 0x00B018 */
- uint64_t ce_ure_credit_limit; /* 0x00B020 */
- uint64_t ce_pad_00B028; /* 0x00B028 */
- uint64_t ce_ure_control; /* 0x00B030 */
- uint64_t ce_ure_status; /* 0x00B038 */
- uint64_t ce_pad_00B040[2]; /* 0x00B040 -- 0x00B048 */
- uint64_t ce_ure_debug_sel; /* 0x00B050 */
- uint64_t ce_ure_pcie_debug_sel; /* 0x00B058 */
- uint64_t ce_ure_ssp_err_cmd_wrd; /* 0x00B060 */
- uint64_t ce_ure_ssp_err_addr; /* 0x00B068 */
- uint64_t ce_ure_page_map; /* 0x00B070 */
- uint64_t ce_ure_dir_map[TIOCE_NUM_PORTS]; /* 0x00B078 */
- uint64_t ce_ure_pipe_sel1; /* 0x00B088 */
- uint64_t ce_ure_pipe_mask1; /* 0x00B090 */
- uint64_t ce_ure_pipe_sel2; /* 0x00B098 */
- uint64_t ce_ure_pipe_mask2; /* 0x00B0A0 */
- uint64_t ce_ure_pcie1_credits_sent; /* 0x00B0A8 */
- uint64_t ce_ure_pcie1_credits_used; /* 0x00B0B0 */
- uint64_t ce_ure_pcie1_credit_limit; /* 0x00B0B8 */
- uint64_t ce_ure_pcie2_credits_sent; /* 0x00B0C0 */
- uint64_t ce_ure_pcie2_credits_used; /* 0x00B0C8 */
- uint64_t ce_ure_pcie2_credit_limit; /* 0x00B0D0 */
- uint64_t ce_ure_pcie_force_credit; /* 0x00B0D8 */
- uint64_t ce_ure_rd_tnum_val; /* 0x00B0E0 */
- uint64_t ce_ure_rd_tnum_rsp_rcvd; /* 0x00B0E8 */
- uint64_t ce_ure_rd_tnum_esent_timer; /* 0x00B0F0 */
- uint64_t ce_ure_rd_tnum_error; /* 0x00B0F8 */
- uint64_t ce_ure_rd_tnum_first_cl; /* 0x00B100 */
- uint64_t ce_ure_rd_tnum_link_buf; /* 0x00B108 */
- uint64_t ce_ure_wr_tnum_val; /* 0x00B110 */
- uint64_t ce_ure_sram_err_addr0; /* 0x00B118 */
- uint64_t ce_ure_sram_err_addr1; /* 0x00B120 */
- uint64_t ce_ure_sram_err_addr2; /* 0x00B128 */
- uint64_t ce_ure_sram_rd_addr0; /* 0x00B130 */
- uint64_t ce_ure_sram_rd_addr1; /* 0x00B138 */
- uint64_t ce_ure_sram_rd_addr2; /* 0x00B140 */
- uint64_t ce_ure_sram_wr_addr0; /* 0x00B148 */
- uint64_t ce_ure_sram_wr_addr1; /* 0x00B150 */
- uint64_t ce_ure_sram_wr_addr2; /* 0x00B158 */
- uint64_t ce_ure_buf_flush10; /* 0x00B160 */
- uint64_t ce_ure_buf_flush11; /* 0x00B168 */
- uint64_t ce_ure_buf_flush12; /* 0x00B170 */
- uint64_t ce_ure_buf_flush13; /* 0x00B178 */
- uint64_t ce_ure_buf_flush20; /* 0x00B180 */
- uint64_t ce_ure_buf_flush21; /* 0x00B188 */
- uint64_t ce_ure_buf_flush22; /* 0x00B190 */
- uint64_t ce_ure_buf_flush23; /* 0x00B198 */
- uint64_t ce_ure_pcie_control1; /* 0x00B1A0 */
- uint64_t ce_ure_pcie_control2; /* 0x00B1A8 */
-
- uint64_t ce_pad_00B1B0[458]; /* 0x00B1B0 -- 0x00BFF8 */
+ u64 ce_ure_dyn_credit_status; /* 0x00B010 */
+ u64 ce_ure_last_credit_status; /* 0x00B018 */
+ u64 ce_ure_credit_limit; /* 0x00B020 */
+ u64 ce_pad_00B028; /* 0x00B028 */
+ u64 ce_ure_control; /* 0x00B030 */
+ u64 ce_ure_status; /* 0x00B038 */
+ u64 ce_pad_00B040[2]; /* 0x00B040 -- 0x00B048 */
+ u64 ce_ure_debug_sel; /* 0x00B050 */
+ u64 ce_ure_pcie_debug_sel; /* 0x00B058 */
+ u64 ce_ure_ssp_err_cmd_wrd; /* 0x00B060 */
+ u64 ce_ure_ssp_err_addr; /* 0x00B068 */
+ u64 ce_ure_page_map; /* 0x00B070 */
+ u64 ce_ure_dir_map[TIOCE_NUM_PORTS]; /* 0x00B078 */
+ u64 ce_ure_pipe_sel1; /* 0x00B088 */
+ u64 ce_ure_pipe_mask1; /* 0x00B090 */
+ u64 ce_ure_pipe_sel2; /* 0x00B098 */
+ u64 ce_ure_pipe_mask2; /* 0x00B0A0 */
+ u64 ce_ure_pcie1_credits_sent; /* 0x00B0A8 */
+ u64 ce_ure_pcie1_credits_used; /* 0x00B0B0 */
+ u64 ce_ure_pcie1_credit_limit; /* 0x00B0B8 */
+ u64 ce_ure_pcie2_credits_sent; /* 0x00B0C0 */
+ u64 ce_ure_pcie2_credits_used; /* 0x00B0C8 */
+ u64 ce_ure_pcie2_credit_limit; /* 0x00B0D0 */
+ u64 ce_ure_pcie_force_credit; /* 0x00B0D8 */
+ u64 ce_ure_rd_tnum_val; /* 0x00B0E0 */
+ u64 ce_ure_rd_tnum_rsp_rcvd; /* 0x00B0E8 */
+ u64 ce_ure_rd_tnum_esent_timer; /* 0x00B0F0 */
+ u64 ce_ure_rd_tnum_error; /* 0x00B0F8 */
+ u64 ce_ure_rd_tnum_first_cl; /* 0x00B100 */
+ u64 ce_ure_rd_tnum_link_buf; /* 0x00B108 */
+ u64 ce_ure_wr_tnum_val; /* 0x00B110 */
+ u64 ce_ure_sram_err_addr0; /* 0x00B118 */
+ u64 ce_ure_sram_err_addr1; /* 0x00B120 */
+ u64 ce_ure_sram_err_addr2; /* 0x00B128 */
+ u64 ce_ure_sram_rd_addr0; /* 0x00B130 */
+ u64 ce_ure_sram_rd_addr1; /* 0x00B138 */
+ u64 ce_ure_sram_rd_addr2; /* 0x00B140 */
+ u64 ce_ure_sram_wr_addr0; /* 0x00B148 */
+ u64 ce_ure_sram_wr_addr1; /* 0x00B150 */
+ u64 ce_ure_sram_wr_addr2; /* 0x00B158 */
+ u64 ce_ure_buf_flush10; /* 0x00B160 */
+ u64 ce_ure_buf_flush11; /* 0x00B168 */
+ u64 ce_ure_buf_flush12; /* 0x00B170 */
+ u64 ce_ure_buf_flush13; /* 0x00B178 */
+ u64 ce_ure_buf_flush20; /* 0x00B180 */
+ u64 ce_ure_buf_flush21; /* 0x00B188 */
+ u64 ce_ure_buf_flush22; /* 0x00B190 */
+ u64 ce_ure_buf_flush23; /* 0x00B198 */
+ u64 ce_ure_pcie_control1; /* 0x00B1A0 */
+ u64 ce_ure_pcie_control2; /* 0x00B1A8 */
+
+ u64 ce_pad_00B1B0[458]; /* 0x00B1B0 -- 0x00BFF8 */
/* Upstream Data Buffer, Port1 */
struct ce_ure_maint_ups_dat1_data {
- uint64_t data63_0[512]; /* 0x00C000 -- 0x00CFF8 */
- uint64_t data127_64[512]; /* 0x00D000 -- 0x00DFF8 */
- uint64_t parity[512]; /* 0x00E000 -- 0x00EFF8 */
+ u64 data63_0[512]; /* 0x00C000 -- 0x00CFF8 */
+ u64 data127_64[512]; /* 0x00D000 -- 0x00DFF8 */
+ u64 parity[512]; /* 0x00E000 -- 0x00EFF8 */
} ce_ure_maint_ups_dat1;
/* Upstream Header Buffer, Port1 */
struct ce_ure_maint_ups_hdr1_data {
- uint64_t data63_0[512]; /* 0x00F000 -- 0x00FFF8 */
- uint64_t data127_64[512]; /* 0x010000 -- 0x010FF8 */
- uint64_t parity[512]; /* 0x011000 -- 0x011FF8 */
+ u64 data63_0[512]; /* 0x00F000 -- 0x00FFF8 */
+ u64 data127_64[512]; /* 0x010000 -- 0x010FF8 */
+ u64 parity[512]; /* 0x011000 -- 0x011FF8 */
} ce_ure_maint_ups_hdr1;
/* Upstream Data Buffer, Port2 */
struct ce_ure_maint_ups_dat2_data {
- uint64_t data63_0[512]; /* 0x012000 -- 0x012FF8 */
- uint64_t data127_64[512]; /* 0x013000 -- 0x013FF8 */
- uint64_t parity[512]; /* 0x014000 -- 0x014FF8 */
+ u64 data63_0[512]; /* 0x012000 -- 0x012FF8 */
+ u64 data127_64[512]; /* 0x013000 -- 0x013FF8 */
+ u64 parity[512]; /* 0x014000 -- 0x014FF8 */
} ce_ure_maint_ups_dat2;
/* Upstream Header Buffer, Port2 */
struct ce_ure_maint_ups_hdr2_data {
- uint64_t data63_0[512]; /* 0x015000 -- 0x015FF8 */
- uint64_t data127_64[512]; /* 0x016000 -- 0x016FF8 */
- uint64_t parity[512]; /* 0x017000 -- 0x017FF8 */
+ u64 data63_0[512]; /* 0x015000 -- 0x015FF8 */
+ u64 data127_64[512]; /* 0x016000 -- 0x016FF8 */
+ u64 parity[512]; /* 0x017000 -- 0x017FF8 */
} ce_ure_maint_ups_hdr2;
/* Downstream Data Buffer */
struct ce_ure_maint_dns_dat_data {
- uint64_t data63_0[512]; /* 0x018000 -- 0x018FF8 */
- uint64_t data127_64[512]; /* 0x019000 -- 0x019FF8 */
- uint64_t parity[512]; /* 0x01A000 -- 0x01AFF8 */
+ u64 data63_0[512]; /* 0x018000 -- 0x018FF8 */
+ u64 data127_64[512]; /* 0x019000 -- 0x019FF8 */
+ u64 parity[512]; /* 0x01A000 -- 0x01AFF8 */
} ce_ure_maint_dns_dat;
/* Downstream Header Buffer */
struct ce_ure_maint_dns_hdr_data {
- uint64_t data31_0[64]; /* 0x01B000 -- 0x01B1F8 */
- uint64_t data95_32[64]; /* 0x01B200 -- 0x01B3F8 */
- uint64_t parity[64]; /* 0x01B400 -- 0x01B5F8 */
+ u64 data31_0[64]; /* 0x01B000 -- 0x01B1F8 */
+ u64 data95_32[64]; /* 0x01B200 -- 0x01B3F8 */
+ u64 parity[64]; /* 0x01B400 -- 0x01B5F8 */
} ce_ure_maint_dns_hdr;
/* RCI Buffer Data */
struct ce_ure_maint_rci_data {
- uint64_t data41_0[64]; /* 0x01B600 -- 0x01B7F8 */
- uint64_t data69_42[64]; /* 0x01B800 -- 0x01B9F8 */
+ u64 data41_0[64]; /* 0x01B600 -- 0x01B7F8 */
+ u64 data69_42[64]; /* 0x01B800 -- 0x01B9F8 */
} ce_ure_maint_rci;
/* Response Queue */
- uint64_t ce_ure_maint_rspq[64]; /* 0x01BA00 -- 0x01BBF8 */
+ u64 ce_ure_maint_rspq[64]; /* 0x01BA00 -- 0x01BBF8 */
- uint64_t ce_pad_01C000[4224]; /* 0x01BC00 -- 0x023FF8 */
+ u64 ce_pad_01C000[4224]; /* 0x01BC00 -- 0x023FF8 */
/* Admin Build-a-Packet Buffer */
struct ce_adm_maint_bap_buf_data {
- uint64_t data63_0[258]; /* 0x024000 -- 0x024808 */
- uint64_t data127_64[258]; /* 0x024810 -- 0x025018 */
- uint64_t parity[258]; /* 0x025020 -- 0x025828 */
+ u64 data63_0[258]; /* 0x024000 -- 0x024808 */
+ u64 data127_64[258]; /* 0x024810 -- 0x025018 */
+ u64 parity[258]; /* 0x025020 -- 0x025828 */
} ce_adm_maint_bap_buf;
- uint64_t ce_pad_025830[5370]; /* 0x025830 -- 0x02FFF8 */
+ u64 ce_pad_025830[5370]; /* 0x025830 -- 0x02FFF8 */
/* URE: 40bit PMU ATE Buffer */ /* 0x030000 -- 0x037FF8 */
- uint64_t ce_ure_ate40[TIOCE_NUM_M40_ATES];
+ u64 ce_ure_ate40[TIOCE_NUM_M40_ATES];
/* URE: 32/40bit PMU ATE Buffer */ /* 0x038000 -- 0x03BFF8 */
- uint64_t ce_ure_ate3240[TIOCE_NUM_M3240_ATES];
+ u64 ce_ure_ate3240[TIOCE_NUM_M3240_ATES];
- uint64_t ce_pad_03C000[2050]; /* 0x03C000 -- 0x040008 */
+ u64 ce_pad_03C000[2050]; /* 0x03C000 -- 0x040008 */
/*
* DRE: Down Stream Request Engine
*/
- uint64_t ce_dre_dyn_credit_status1; /* 0x040010 */
- uint64_t ce_dre_dyn_credit_status2; /* 0x040018 */
- uint64_t ce_dre_last_credit_status1; /* 0x040020 */
- uint64_t ce_dre_last_credit_status2; /* 0x040028 */
- uint64_t ce_dre_credit_limit1; /* 0x040030 */
- uint64_t ce_dre_credit_limit2; /* 0x040038 */
- uint64_t ce_dre_force_credit1; /* 0x040040 */
- uint64_t ce_dre_force_credit2; /* 0x040048 */
- uint64_t ce_dre_debug_mux1; /* 0x040050 */
- uint64_t ce_dre_debug_mux2; /* 0x040058 */
- uint64_t ce_dre_ssp_err_cmd_wrd; /* 0x040060 */
- uint64_t ce_dre_ssp_err_addr; /* 0x040068 */
- uint64_t ce_dre_comp_err_cmd_wrd; /* 0x040070 */
- uint64_t ce_dre_comp_err_addr; /* 0x040078 */
- uint64_t ce_dre_req_status; /* 0x040080 */
- uint64_t ce_dre_config1; /* 0x040088 */
- uint64_t ce_dre_config2; /* 0x040090 */
- uint64_t ce_dre_config_req_status; /* 0x040098 */
- uint64_t ce_pad_0400A0[12]; /* 0x0400A0 -- 0x0400F8 */
- uint64_t ce_dre_dyn_fifo; /* 0x040100 */
- uint64_t ce_pad_040108[3]; /* 0x040108 -- 0x040118 */
- uint64_t ce_dre_last_fifo; /* 0x040120 */
-
- uint64_t ce_pad_040128[27]; /* 0x040128 -- 0x0401F8 */
+ u64 ce_dre_dyn_credit_status1; /* 0x040010 */
+ u64 ce_dre_dyn_credit_status2; /* 0x040018 */
+ u64 ce_dre_last_credit_status1; /* 0x040020 */
+ u64 ce_dre_last_credit_status2; /* 0x040028 */
+ u64 ce_dre_credit_limit1; /* 0x040030 */
+ u64 ce_dre_credit_limit2; /* 0x040038 */
+ u64 ce_dre_force_credit1; /* 0x040040 */
+ u64 ce_dre_force_credit2; /* 0x040048 */
+ u64 ce_dre_debug_mux1; /* 0x040050 */
+ u64 ce_dre_debug_mux2; /* 0x040058 */
+ u64 ce_dre_ssp_err_cmd_wrd; /* 0x040060 */
+ u64 ce_dre_ssp_err_addr; /* 0x040068 */
+ u64 ce_dre_comp_err_cmd_wrd; /* 0x040070 */
+ u64 ce_dre_comp_err_addr; /* 0x040078 */
+ u64 ce_dre_req_status; /* 0x040080 */
+ u64 ce_dre_config1; /* 0x040088 */
+ u64 ce_dre_config2; /* 0x040090 */
+ u64 ce_dre_config_req_status; /* 0x040098 */
+ u64 ce_pad_0400A0[12]; /* 0x0400A0 -- 0x0400F8 */
+ u64 ce_dre_dyn_fifo; /* 0x040100 */
+ u64 ce_pad_040108[3]; /* 0x040108 -- 0x040118 */
+ u64 ce_dre_last_fifo; /* 0x040120 */
+
+ u64 ce_pad_040128[27]; /* 0x040128 -- 0x0401F8 */
/* DRE Downstream Head Queue */
struct ce_dre_maint_ds_head_queue {
- uint64_t data63_0[32]; /* 0x040200 -- 0x0402F8 */
- uint64_t data127_64[32]; /* 0x040300 -- 0x0403F8 */
- uint64_t parity[32]; /* 0x040400 -- 0x0404F8 */
+ u64 data63_0[32]; /* 0x040200 -- 0x0402F8 */
+ u64 data127_64[32]; /* 0x040300 -- 0x0403F8 */
+ u64 parity[32]; /* 0x040400 -- 0x0404F8 */
} ce_dre_maint_ds_head_q;
- uint64_t ce_pad_040500[352]; /* 0x040500 -- 0x040FF8 */
+ u64 ce_pad_040500[352]; /* 0x040500 -- 0x040FF8 */
/* DRE Downstream Data Queue */
struct ce_dre_maint_ds_data_queue {
- uint64_t data63_0[256]; /* 0x041000 -- 0x0417F8 */
- uint64_t ce_pad_041800[256]; /* 0x041800 -- 0x041FF8 */
- uint64_t data127_64[256]; /* 0x042000 -- 0x0427F8 */
- uint64_t ce_pad_042800[256]; /* 0x042800 -- 0x042FF8 */
- uint64_t parity[256]; /* 0x043000 -- 0x0437F8 */
- uint64_t ce_pad_043800[256]; /* 0x043800 -- 0x043FF8 */
+ u64 data63_0[256]; /* 0x041000 -- 0x0417F8 */
+ u64 ce_pad_041800[256]; /* 0x041800 -- 0x041FF8 */
+ u64 data127_64[256]; /* 0x042000 -- 0x0427F8 */
+ u64 ce_pad_042800[256]; /* 0x042800 -- 0x042FF8 */
+ u64 parity[256]; /* 0x043000 -- 0x0437F8 */
+ u64 ce_pad_043800[256]; /* 0x043800 -- 0x043FF8 */
} ce_dre_maint_ds_data_q;
/* DRE URE Upstream Response Queue */
struct ce_dre_maint_ure_us_rsp_queue {
- uint64_t data63_0[8]; /* 0x044000 -- 0x044038 */
- uint64_t ce_pad_044040[24]; /* 0x044040 -- 0x0440F8 */
- uint64_t data127_64[8]; /* 0x044100 -- 0x044138 */
- uint64_t ce_pad_044140[24]; /* 0x044140 -- 0x0441F8 */
- uint64_t parity[8]; /* 0x044200 -- 0x044238 */
- uint64_t ce_pad_044240[24]; /* 0x044240 -- 0x0442F8 */
+ u64 data63_0[8]; /* 0x044000 -- 0x044038 */
+ u64 ce_pad_044040[24]; /* 0x044040 -- 0x0440F8 */
+ u64 data127_64[8]; /* 0x044100 -- 0x044138 */
+ u64 ce_pad_044140[24]; /* 0x044140 -- 0x0441F8 */
+ u64 parity[8]; /* 0x044200 -- 0x044238 */
+ u64 ce_pad_044240[24]; /* 0x044240 -- 0x0442F8 */
} ce_dre_maint_ure_us_rsp_q;
- uint64_t ce_dre_maint_us_wrt_rsp[32];/* 0x044300 -- 0x0443F8 */
+ u64 ce_dre_maint_us_wrt_rsp[32];/* 0x044300 -- 0x0443F8 */
- uint64_t ce_end_of_struct; /* 0x044400 */
+ u64 ce_end_of_struct; /* 0x044400 */
} tioce_t;
#define CE_URE_BUS_MASK (0xFFULL << BUS_SRC_ID_SHFT)
#define CE_URE_DEV_MASK (0x1FULL << DEV_SRC_ID_SHFT)
#define CE_URE_FNC_MASK (0x07ULL << FNC_SRC_ID_SHFT)
-#define CE_URE_PIPE_BUS(b) (((uint64_t)(b) << BUS_SRC_ID_SHFT) & \
+#define CE_URE_PIPE_BUS(b) (((u64)(b) << BUS_SRC_ID_SHFT) & \
CE_URE_BUS_MASK)
-#define CE_URE_PIPE_DEV(d) (((uint64_t)(d) << DEV_SRC_ID_SHFT) & \
+#define CE_URE_PIPE_DEV(d) (((u64)(d) << DEV_SRC_ID_SHFT) & \
CE_URE_DEV_MASK)
-#define CE_URE_PIPE_FNC(f) (((uint64_t)(f) << FNC_SRC_ID_SHFT) & \
+#define CE_URE_PIPE_FNC(f) (((u64)(f) << FNC_SRC_ID_SHFT) & \
CE_URE_FNC_MASK)
#define CE_URE_SEL1_SHFT 0
#define CE_URE_PN1_MASK (0xFFULL << CE_URE_PN1_SHFT)
#define CE_URE_PN2_SHFT 24
#define CE_URE_PN2_MASK (0xFFULL << CE_URE_PN2_SHFT)
-#define CE_URE_PN1_SET(n) (((uint64_t)(n) << CE_URE_PN1_SHFT) & \
+#define CE_URE_PN1_SET(n) (((u64)(n) << CE_URE_PN1_SHFT) & \
CE_URE_PN1_MASK)
-#define CE_URE_PN2_SET(n) (((uint64_t)(n) << CE_URE_PN2_SHFT) & \
+#define CE_URE_PN2_SET(n) (((u64)(n) << CE_URE_PN2_SHFT) & \
CE_URE_PN2_MASK)
/* ce_ure_pcie_control2 register bit masks & shifts */
#define CE_URE_PSN1_MASK (0x1FFFULL << CE_URE_PSN1_SHFT)
#define CE_URE_PSN2_SHFT 32
#define CE_URE_PSN2_MASK (0x1FFFULL << CE_URE_PSN2_SHFT)
-#define CE_URE_PSN1_SET(n) (((uint64_t)(n) << CE_URE_PSN1_SHFT) & \
+#define CE_URE_PSN1_SET(n) (((u64)(n) << CE_URE_PSN1_SHFT) & \
CE_URE_PSN1_MASK)
-#define CE_URE_PSN2_SET(n) (((uint64_t)(n) << CE_URE_PSN2_SHFT) & \
+#define CE_URE_PSN2_SET(n) (((u64)(n) << CE_URE_PSN2_SHFT) & \
CE_URE_PSN2_MASK)
/*
struct tioce_common {
struct pcibus_bussoft ce_pcibus; /* common pciio header */
- uint32_t ce_rev;
- uint64_t ce_kernel_private;
- uint64_t ce_prom_private;
+ u32 ce_rev;
+ u64 ce_kernel_private;
+ u64 ce_prom_private;
};
struct tioce_kernel {
spinlock_t ce_lock;
struct list_head ce_dmamap_list;
- uint64_t ce_ate40_shadow[TIOCE_NUM_M40_ATES];
- uint64_t ce_ate3240_shadow[TIOCE_NUM_M3240_ATES];
- uint32_t ce_ate3240_pagesize;
+ u64 ce_ate40_shadow[TIOCE_NUM_M40_ATES];
+ u64 ce_ate3240_shadow[TIOCE_NUM_M3240_ATES];
+ u32 ce_ate3240_pagesize;
- uint8_t ce_port1_secondary;
+ u8 ce_port1_secondary;
/* per-port resources */
struct {
int dirmap_refcnt;
- uint64_t dirmap_shadow;
+ u64 dirmap_shadow;
} ce_port[TIOCE_NUM_PORTS];
};
struct tioce_dmamap {
struct list_head ce_dmamap_list; /* headed by tioce_kernel */
- uint32_t refcnt;
+ u32 refcnt;
- uint64_t nbytes; /* # bytes mapped */
+ u64 nbytes; /* # bytes mapped */
- uint64_t ct_start; /* coretalk start address */
- uint64_t pci_start; /* bus start address */
+ u64 ct_start; /* coretalk start address */
+ u64 pci_start; /* bus start address */
- uint64_t *ate_hw; /* hw ptr of first ate in map */
- uint64_t *ate_shadow; /* shadow ptr of firat ate */
- uint16_t ate_count; /* # ate's in the map */
+ u64 *ate_hw; /* hw ptr of first ate in map */
+ u64 *ate_shadow; /* shadow ptr of firat ate */
+ u16 ate_count; /* # ate's in the map */
};
extern int tioce_init_provider(void);
/* 0x000000-0x00FFFF -- Local Registers */
/* 0x000000-0x000057 -- (Legacy Widget Space) Configuration */
- uint64_t cp_id; /* 0x000000 */
- uint64_t cp_stat; /* 0x000008 */
- uint64_t cp_err_upper; /* 0x000010 */
- uint64_t cp_err_lower; /* 0x000018 */
+ u64 cp_id; /* 0x000000 */
+ u64 cp_stat; /* 0x000008 */
+ u64 cp_err_upper; /* 0x000010 */
+ u64 cp_err_lower; /* 0x000018 */
#define cp_err cp_err_lower
- uint64_t cp_control; /* 0x000020 */
- uint64_t cp_req_timeout; /* 0x000028 */
- uint64_t cp_intr_upper; /* 0x000030 */
- uint64_t cp_intr_lower; /* 0x000038 */
+ u64 cp_control; /* 0x000020 */
+ u64 cp_req_timeout; /* 0x000028 */
+ u64 cp_intr_upper; /* 0x000030 */
+ u64 cp_intr_lower; /* 0x000038 */
#define cp_intr cp_intr_lower
- uint64_t cp_err_cmdword; /* 0x000040 */
- uint64_t _pad_000048; /* 0x000048 */
- uint64_t cp_tflush; /* 0x000050 */
+ u64 cp_err_cmdword; /* 0x000040 */
+ u64 _pad_000048; /* 0x000048 */
+ u64 cp_tflush; /* 0x000050 */
/* 0x000058-0x00007F -- Bridge-specific Configuration */
- uint64_t cp_aux_err; /* 0x000058 */
- uint64_t cp_resp_upper; /* 0x000060 */
- uint64_t cp_resp_lower; /* 0x000068 */
+ u64 cp_aux_err; /* 0x000058 */
+ u64 cp_resp_upper; /* 0x000060 */
+ u64 cp_resp_lower; /* 0x000068 */
#define cp_resp cp_resp_lower
- uint64_t cp_tst_pin_ctrl; /* 0x000070 */
- uint64_t cp_addr_lkerr; /* 0x000078 */
+ u64 cp_tst_pin_ctrl; /* 0x000070 */
+ u64 cp_addr_lkerr; /* 0x000078 */
/* 0x000080-0x00008F -- PMU & MAP */
- uint64_t cp_dir_map; /* 0x000080 */
- uint64_t _pad_000088; /* 0x000088 */
+ u64 cp_dir_map; /* 0x000080 */
+ u64 _pad_000088; /* 0x000088 */
/* 0x000090-0x00009F -- SSRAM */
- uint64_t cp_map_fault; /* 0x000090 */
- uint64_t _pad_000098; /* 0x000098 */
+ u64 cp_map_fault; /* 0x000090 */
+ u64 _pad_000098; /* 0x000098 */
/* 0x0000A0-0x0000AF -- Arbitration */
- uint64_t cp_arb; /* 0x0000A0 */
- uint64_t _pad_0000A8; /* 0x0000A8 */
+ u64 cp_arb; /* 0x0000A0 */
+ u64 _pad_0000A8; /* 0x0000A8 */
/* 0x0000B0-0x0000BF -- Number In A Can or ATE Parity Error */
- uint64_t cp_ate_parity_err; /* 0x0000B0 */
- uint64_t _pad_0000B8; /* 0x0000B8 */
+ u64 cp_ate_parity_err; /* 0x0000B0 */
+ u64 _pad_0000B8; /* 0x0000B8 */
/* 0x0000C0-0x0000FF -- PCI/GIO */
- uint64_t cp_bus_timeout; /* 0x0000C0 */
- uint64_t cp_pci_cfg; /* 0x0000C8 */
- uint64_t cp_pci_err_upper; /* 0x0000D0 */
- uint64_t cp_pci_err_lower; /* 0x0000D8 */
+ u64 cp_bus_timeout; /* 0x0000C0 */
+ u64 cp_pci_cfg; /* 0x0000C8 */
+ u64 cp_pci_err_upper; /* 0x0000D0 */
+ u64 cp_pci_err_lower; /* 0x0000D8 */
#define cp_pci_err cp_pci_err_lower
- uint64_t _pad_0000E0[4]; /* 0x0000{E0..F8} */
+ u64 _pad_0000E0[4]; /* 0x0000{E0..F8} */
/* 0x000100-0x0001FF -- Interrupt */
- uint64_t cp_int_status; /* 0x000100 */
- uint64_t cp_int_enable; /* 0x000108 */
- uint64_t cp_int_rst_stat; /* 0x000110 */
- uint64_t cp_int_mode; /* 0x000118 */
- uint64_t cp_int_device; /* 0x000120 */
- uint64_t cp_int_host_err; /* 0x000128 */
- uint64_t cp_int_addr[8]; /* 0x0001{30,,,68} */
- uint64_t cp_err_int_view; /* 0x000170 */
- uint64_t cp_mult_int; /* 0x000178 */
- uint64_t cp_force_always[8]; /* 0x0001{80,,,B8} */
- uint64_t cp_force_pin[8]; /* 0x0001{C0,,,F8} */
+ u64 cp_int_status; /* 0x000100 */
+ u64 cp_int_enable; /* 0x000108 */
+ u64 cp_int_rst_stat; /* 0x000110 */
+ u64 cp_int_mode; /* 0x000118 */
+ u64 cp_int_device; /* 0x000120 */
+ u64 cp_int_host_err; /* 0x000128 */
+ u64 cp_int_addr[8]; /* 0x0001{30,,,68} */
+ u64 cp_err_int_view; /* 0x000170 */
+ u64 cp_mult_int; /* 0x000178 */
+ u64 cp_force_always[8]; /* 0x0001{80,,,B8} */
+ u64 cp_force_pin[8]; /* 0x0001{C0,,,F8} */
/* 0x000200-0x000298 -- Device */
- uint64_t cp_device[4]; /* 0x0002{00,,,18} */
- uint64_t _pad_000220[4]; /* 0x0002{20,,,38} */
- uint64_t cp_wr_req_buf[4]; /* 0x0002{40,,,58} */
- uint64_t _pad_000260[4]; /* 0x0002{60,,,78} */
- uint64_t cp_rrb_map[2]; /* 0x0002{80,,,88} */
+ u64 cp_device[4]; /* 0x0002{00,,,18} */
+ u64 _pad_000220[4]; /* 0x0002{20,,,38} */
+ u64 cp_wr_req_buf[4]; /* 0x0002{40,,,58} */
+ u64 _pad_000260[4]; /* 0x0002{60,,,78} */
+ u64 cp_rrb_map[2]; /* 0x0002{80,,,88} */
#define cp_even_resp cp_rrb_map[0] /* 0x000280 */
#define cp_odd_resp cp_rrb_map[1] /* 0x000288 */
- uint64_t cp_resp_status; /* 0x000290 */
- uint64_t cp_resp_clear; /* 0x000298 */
+ u64 cp_resp_status; /* 0x000290 */
+ u64 cp_resp_clear; /* 0x000298 */
- uint64_t _pad_0002A0[12]; /* 0x0002{A0..F8} */
+ u64 _pad_0002A0[12]; /* 0x0002{A0..F8} */
/* 0x000300-0x0003F8 -- Buffer Address Match Registers */
struct {
- uint64_t upper; /* 0x0003{00,,,F0} */
- uint64_t lower; /* 0x0003{08,,,F8} */
+ u64 upper; /* 0x0003{00,,,F0} */
+ u64 lower; /* 0x0003{08,,,F8} */
} cp_buf_addr_match[16];
/* 0x000400-0x0005FF -- Performance Monitor Registers (even only) */
struct {
- uint64_t flush_w_touch; /* 0x000{400,,,5C0} */
- uint64_t flush_wo_touch; /* 0x000{408,,,5C8} */
- uint64_t inflight; /* 0x000{410,,,5D0} */
- uint64_t prefetch; /* 0x000{418,,,5D8} */
- uint64_t total_pci_retry; /* 0x000{420,,,5E0} */
- uint64_t max_pci_retry; /* 0x000{428,,,5E8} */
- uint64_t max_latency; /* 0x000{430,,,5F0} */
- uint64_t clear_all; /* 0x000{438,,,5F8} */
+ u64 flush_w_touch; /* 0x000{400,,,5C0} */
+ u64 flush_wo_touch; /* 0x000{408,,,5C8} */
+ u64 inflight; /* 0x000{410,,,5D0} */
+ u64 prefetch; /* 0x000{418,,,5D8} */
+ u64 total_pci_retry; /* 0x000{420,,,5E0} */
+ u64 max_pci_retry; /* 0x000{428,,,5E8} */
+ u64 max_latency; /* 0x000{430,,,5F0} */
+ u64 clear_all; /* 0x000{438,,,5F8} */
} cp_buf_count[8];
/* 0x000600-0x0009FF -- PCI/X registers */
- uint64_t cp_pcix_bus_err_addr; /* 0x000600 */
- uint64_t cp_pcix_bus_err_attr; /* 0x000608 */
- uint64_t cp_pcix_bus_err_data; /* 0x000610 */
- uint64_t cp_pcix_pio_split_addr; /* 0x000618 */
- uint64_t cp_pcix_pio_split_attr; /* 0x000620 */
- uint64_t cp_pcix_dma_req_err_attr; /* 0x000628 */
- uint64_t cp_pcix_dma_req_err_addr; /* 0x000630 */
- uint64_t cp_pcix_timeout; /* 0x000638 */
+ u64 cp_pcix_bus_err_addr; /* 0x000600 */
+ u64 cp_pcix_bus_err_attr; /* 0x000608 */
+ u64 cp_pcix_bus_err_data; /* 0x000610 */
+ u64 cp_pcix_pio_split_addr; /* 0x000618 */
+ u64 cp_pcix_pio_split_attr; /* 0x000620 */
+ u64 cp_pcix_dma_req_err_attr; /* 0x000628 */
+ u64 cp_pcix_dma_req_err_addr; /* 0x000630 */
+ u64 cp_pcix_timeout; /* 0x000638 */
- uint64_t _pad_000640[24]; /* 0x000{640,,,6F8} */
+ u64 _pad_000640[24]; /* 0x000{640,,,6F8} */
/* 0x000700-0x000737 -- Debug Registers */
- uint64_t cp_ct_debug_ctl; /* 0x000700 */
- uint64_t cp_br_debug_ctl; /* 0x000708 */
- uint64_t cp_mux3_debug_ctl; /* 0x000710 */
- uint64_t cp_mux4_debug_ctl; /* 0x000718 */
- uint64_t cp_mux5_debug_ctl; /* 0x000720 */
- uint64_t cp_mux6_debug_ctl; /* 0x000728 */
- uint64_t cp_mux7_debug_ctl; /* 0x000730 */
+ u64 cp_ct_debug_ctl; /* 0x000700 */
+ u64 cp_br_debug_ctl; /* 0x000708 */
+ u64 cp_mux3_debug_ctl; /* 0x000710 */
+ u64 cp_mux4_debug_ctl; /* 0x000718 */
+ u64 cp_mux5_debug_ctl; /* 0x000720 */
+ u64 cp_mux6_debug_ctl; /* 0x000728 */
+ u64 cp_mux7_debug_ctl; /* 0x000730 */
- uint64_t _pad_000738[89]; /* 0x000{738,,,9F8} */
+ u64 _pad_000738[89]; /* 0x000{738,,,9F8} */
/* 0x000A00-0x000BFF -- PCI/X Read&Write Buffer */
struct {
- uint64_t cp_buf_addr; /* 0x000{A00,,,AF0} */
- uint64_t cp_buf_attr; /* 0X000{A08,,,AF8} */
+ u64 cp_buf_addr; /* 0x000{A00,,,AF0} */
+ u64 cp_buf_attr; /* 0X000{A08,,,AF8} */
} cp_pcix_read_buf_64[16];
struct {
- uint64_t cp_buf_addr; /* 0x000{B00,,,BE0} */
- uint64_t cp_buf_attr; /* 0x000{B08,,,BE8} */
- uint64_t cp_buf_valid; /* 0x000{B10,,,BF0} */
- uint64_t __pad1; /* 0x000{B18,,,BF8} */
+ u64 cp_buf_addr; /* 0x000{B00,,,BE0} */
+ u64 cp_buf_attr; /* 0x000{B08,,,BE8} */
+ u64 cp_buf_valid; /* 0x000{B10,,,BF0} */
+ u64 __pad1; /* 0x000{B18,,,BF8} */
} cp_pcix_write_buf_64[8];
/* End of Local Registers -- Start of Address Map space */
- char _pad_000c00[0x010000 - 0x000c00];
+ char _pad_000c00[0x010000 - 0x000c00];
/* 0x010000-0x011FF8 -- Internal ATE RAM (Auto Parity Generation) */
- uint64_t cp_int_ate_ram[1024]; /* 0x010000-0x011FF8 */
+ u64 cp_int_ate_ram[1024]; /* 0x010000-0x011FF8 */
- char _pad_012000[0x14000 - 0x012000];
+ char _pad_012000[0x14000 - 0x012000];
/* 0x014000-0x015FF8 -- Internal ATE RAM (Manual Parity Generation) */
- uint64_t cp_int_ate_ram_mp[1024]; /* 0x014000-0x015FF8 */
+ u64 cp_int_ate_ram_mp[1024]; /* 0x014000-0x015FF8 */
- char _pad_016000[0x18000 - 0x016000];
+ char _pad_016000[0x18000 - 0x016000];
/* 0x18000-0x197F8 -- TIOCP Write Request Ram */
- uint64_t cp_wr_req_lower[256]; /* 0x18000 - 0x187F8 */
- uint64_t cp_wr_req_upper[256]; /* 0x18800 - 0x18FF8 */
- uint64_t cp_wr_req_parity[256]; /* 0x19000 - 0x197F8 */
+ u64 cp_wr_req_lower[256]; /* 0x18000 - 0x187F8 */
+ u64 cp_wr_req_upper[256]; /* 0x18800 - 0x18FF8 */
+ u64 cp_wr_req_parity[256]; /* 0x19000 - 0x197F8 */
- char _pad_019800[0x1C000 - 0x019800];
+ char _pad_019800[0x1C000 - 0x019800];
/* 0x1C000-0x1EFF8 -- TIOCP Read Response Ram */
- uint64_t cp_rd_resp_lower[512]; /* 0x1C000 - 0x1CFF8 */
- uint64_t cp_rd_resp_upper[512]; /* 0x1D000 - 0x1DFF8 */
- uint64_t cp_rd_resp_parity[512]; /* 0x1E000 - 0x1EFF8 */
+ u64 cp_rd_resp_lower[512]; /* 0x1C000 - 0x1CFF8 */
+ u64 cp_rd_resp_upper[512]; /* 0x1D000 - 0x1DFF8 */
+ u64 cp_rd_resp_parity[512]; /* 0x1E000 - 0x1EFF8 */
- char _pad_01F000[0x20000 - 0x01F000];
+ char _pad_01F000[0x20000 - 0x01F000];
/* 0x020000-0x021FFF -- Host Device (CP) Configuration Space (not used) */
- char _pad_020000[0x021000 - 0x20000];
+ char _pad_020000[0x021000 - 0x20000];
/* 0x021000-0x027FFF -- PCI Device Configuration Spaces */
union {
- uint8_t c[0x1000 / 1]; /* 0x02{0000,,,7FFF} */
- uint16_t s[0x1000 / 2]; /* 0x02{0000,,,7FFF} */
- uint32_t l[0x1000 / 4]; /* 0x02{0000,,,7FFF} */
- uint64_t d[0x1000 / 8]; /* 0x02{0000,,,7FFF} */
+ u8 c[0x1000 / 1]; /* 0x02{0000,,,7FFF} */
+ u16 s[0x1000 / 2]; /* 0x02{0000,,,7FFF} */
+ u32 l[0x1000 / 4]; /* 0x02{0000,,,7FFF} */
+ u64 d[0x1000 / 8]; /* 0x02{0000,,,7FFF} */
union {
- uint8_t c[0x100 / 1];
- uint16_t s[0x100 / 2];
- uint32_t l[0x100 / 4];
- uint64_t d[0x100 / 8];
+ u8 c[0x100 / 1];
+ u16 s[0x100 / 2];
+ u32 l[0x100 / 4];
+ u64 d[0x100 / 8];
} f[8];
} cp_type0_cfg_dev[7]; /* 0x02{1000,,,7FFF} */
/* 0x028000-0x028FFF -- PCI Type 1 Configuration Space */
union {
- uint8_t c[0x1000 / 1]; /* 0x028000-0x029000 */
- uint16_t s[0x1000 / 2]; /* 0x028000-0x029000 */
- uint32_t l[0x1000 / 4]; /* 0x028000-0x029000 */
- uint64_t d[0x1000 / 8]; /* 0x028000-0x029000 */
+ u8 c[0x1000 / 1]; /* 0x028000-0x029000 */
+ u16 s[0x1000 / 2]; /* 0x028000-0x029000 */
+ u32 l[0x1000 / 4]; /* 0x028000-0x029000 */
+ u64 d[0x1000 / 8]; /* 0x028000-0x029000 */
union {
- uint8_t c[0x100 / 1];
- uint16_t s[0x100 / 2];
- uint32_t l[0x100 / 4];
- uint64_t d[0x100 / 8];
+ u8 c[0x100 / 1];
+ u16 s[0x100 / 2];
+ u32 l[0x100 / 4];
+ u64 d[0x100 / 8];
} f[8];
} cp_type1_cfg; /* 0x028000-0x029000 */
/* 0x030000-0x030007 -- PCI Interrupt Acknowledge Cycle */
union {
- uint8_t c[8 / 1];
- uint16_t s[8 / 2];
- uint32_t l[8 / 4];
- uint64_t d[8 / 8];
+ u8 c[8 / 1];
+ u16 s[8 / 2];
+ u32 l[8 / 4];
+ u64 d[8 / 8];
} cp_pci_iack; /* 0x030000-0x030007 */
char _pad_030007[0x040000-0x030008];
/* 0x040000-0x040007 -- PCIX Special Cycle */
union {
- uint8_t c[8 / 1];
- uint16_t s[8 / 2];
- uint32_t l[8 / 4];
- uint64_t d[8 / 8];
+ u8 c[8 / 1];
+ u16 s[8 / 2];
+ u32 l[8 / 4];
+ u64 d[8 / 8];
} cp_pcix_cycle; /* 0x040000-0x040007 */
char _pad_040007[0x200000-0x040008];
/* 0x200000-0x7FFFFF -- PCI/GIO Device Spaces */
union {
- uint8_t c[0x100000 / 1];
- uint16_t s[0x100000 / 2];
- uint32_t l[0x100000 / 4];
- uint64_t d[0x100000 / 8];
+ u8 c[0x100000 / 1];
+ u16 s[0x100000 / 2];
+ u32 l[0x100000 / 4];
+ u64 d[0x100000 / 8];
} cp_devio_raw[6]; /* 0x200000-0x7FFFFF */
#define cp_devio(n) cp_devio_raw[((n)<2)?(n*2):(n+2)]
/* 0xA00000-0xBFFFFF -- PCI/GIO Device Spaces w/flush */
union {
- uint8_t c[0x100000 / 1];
- uint16_t s[0x100000 / 2];
- uint32_t l[0x100000 / 4];
- uint64_t d[0x100000 / 8];
+ u8 c[0x100000 / 1];
+ u16 s[0x100000 / 2];
+ u32 l[0x100000 / 4];
+ u64 d[0x100000 / 8];
} cp_devio_raw_flush[6]; /* 0xA00000-0xBFFFFF */
#define cp_devio_flush(n) cp_devio_raw_flush[((n)<2)?(n*2):(n+2)]
};
/* create DMA address by stripping AS bits */
-#define TIOCX_DMA_ADDR(a) (uint64_t)((uint64_t)(a) & 0xffffcfffffffffUL)
+#define TIOCX_DMA_ADDR(a) (u64)((u64)(a) & 0xffffcfffffffffUL)
-#define TIOCX_TO_TIOCX_DMA_ADDR(a) (uint64_t)(((uint64_t)(a) & 0xfffffffff) | \
- ((((uint64_t)(a)) & 0xffffc000000000UL) <<2))
+#define TIOCX_TO_TIOCX_DMA_ADDR(a) (u64)(((u64)(a) & 0xfffffffff) | \
+ ((((u64)(a)) & 0xffffc000000000UL) <<2))
#define TIO_CE_ASIC_PARTNUM 0xce00
#define TIOCX_CORELET 3
extern int cx_device_register(nasid_t, int, int, struct hubdev_info *, int);
extern int cx_driver_unregister(struct cx_drv *);
extern int cx_driver_register(struct cx_drv *);
-extern uint64_t tiocx_dma_addr(uint64_t addr);
-extern uint64_t tiocx_swin_base(int nasid);
-extern void tiocx_mmr_store(int nasid, uint64_t offset, uint64_t value);
-extern uint64_t tiocx_mmr_load(int nasid, uint64_t offset);
+extern u64 tiocx_dma_addr(u64 addr);
+extern u64 tiocx_swin_base(int nasid);
+extern void tiocx_mmr_store(int nasid, u64 offset, u64 value);
+extern u64 tiocx_mmr_load(int nasid, u64 offset);
#endif // __KERNEL__
#endif // _ASM_IA64_SN_TIO_TIOCX__
#include <linux/cache.h>
#include <linux/hardirq.h>
+#include <linux/mutex.h>
#include <asm/sn/types.h>
#include <asm/sn/bte.h>
* the channel.
*/
struct xpc_registration {
- struct semaphore sema;
+ struct mutex mutex;
xpc_channel_func func; /* function to call */
void *key; /* pointer to user's key */
u16 nentries; /* #of msg entries in local msg queue */
#include <linux/interrupt.h>
#include <linux/sysctl.h>
#include <linux/device.h>
+#include <linux/mutex.h>
+#include <linux/completion.h>
#include <asm/pgtable.h>
#include <asm/processor.h>
#include <asm/sn/bte.h>
* and consumed by the intended recipient.
*/
struct xpc_notify {
- struct semaphore sema; /* notify semaphore */
- volatile u8 type; /* type of notification */
+ volatile u8 type; /* type of notification */
/* the following two fields are only used if type == XPC_N_CALL */
xpc_notify_func func; /* user's notify function */
xpc_channel_func func; /* user's channel function */
void *key; /* pointer to user's key */
- struct semaphore msg_to_pull_sema; /* next msg to pull serialization */
- struct semaphore wdisconnect_sema; /* wait for channel disconnect */
+ struct mutex msg_to_pull_mutex; /* next msg to pull serialization */
+ struct completion wdisconnect_wait; /* wait for channel disconnect */
struct xpc_openclose_args *local_openclose_args; /* args passed on */
/* opening or closing of channel */
#include <asm/smp.h>
#ifdef CONFIG_NUMA
+
+/* Nodes w/o CPUs are preferred for memory allocations, see build_zonelists */
+#define PENALTY_FOR_NODE_WITH_CPUS 255
+
/*
* Returns the number of the node containing CPU 'cpu'
*/
/* The Hypervisor barfs if the lppaca crosses a page boundary. A 1k
* alignment is sufficient to prevent this */
-struct __attribute__((__aligned__(0x400))) lppaca {
+struct lppaca {
//=============================================================================
// CACHE_LINE_1 0x0000 - 0x007F Contains read-only data
// NOTE: The xDynXyz fields are fields that will be dynamically changed by
// CACHE_LINE_4-5 0x0100 - 0x01FF Contains PMC interrupt data
//=============================================================================
u8 pmc_save_area[256]; // PMC interrupt Area x00-xFF
-};
+} __attribute__((__aligned__(0x400)));
extern struct lppaca lppaca[];
#define TIF_RESTOREALL 12 /* Restore all regs (implies NOERROR) */
#define TIF_SAVE_NVGPRS 13 /* Save r14-r31 in signal frame */
#define TIF_NOERROR 14 /* Force successful syscall return */
+#define TIF_RESTORE_SIGMASK 15 /* Restore signal mask in do_signal */
/* as above, but as bit values */
#define _TIF_SYSCALL_TRACE (1<<TIF_SYSCALL_TRACE)
#define _TIF_RESTOREALL (1<<TIF_RESTOREALL)
#define _TIF_SAVE_NVGPRS (1<<TIF_SAVE_NVGPRS)
#define _TIF_NOERROR (1<<TIF_NOERROR)
+#define _TIF_RESTORE_SIGMASK (1<<TIF_RESTORE_SIGMASK)
#define _TIF_SYSCALL_T_OR_A (_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT|_TIF_SECCOMP)
#define _TIF_USER_WORK_MASK (_TIF_NOTIFY_RESUME | _TIF_SIGPENDING | \
- _TIF_NEED_RESCHED | _TIF_RESTOREALL)
+ _TIF_NEED_RESCHED | _TIF_RESTOREALL | \
+ _TIF_RESTORE_SIGMASK)
#define _TIF_PERSYSCALL_MASK (_TIF_RESTOREALL|_TIF_NOERROR|_TIF_SAVE_NVGPRS)
#endif /* __KERNEL__ */
#define __NR_inotify_rm_watch 277
#define __NR_spu_run 278
#define __NR_spu_create 279
+#define __NR_pselect6 280
+#define __NR_ppoll 281
-#define __NR_syscalls 280
+#define __NR_syscalls 282
#ifdef __KERNEL__
#define __NR__exit __NR_exit
#define __ARCH_WANT_SYS_SIGPENDING
#define __ARCH_WANT_SYS_SIGPROCMASK
#define __ARCH_WANT_SYS_RT_SIGACTION
+#define __ARCH_WANT_SYS_RT_SIGSUSPEND
#ifdef CONFIG_PPC32
#define __ARCH_WANT_OLD_STAT
#endif
#ifdef CONFIG_PPC64
#define __ARCH_WANT_COMPAT_SYS_TIME
+#define __ARCH_WANT_COMPAT_SYS_RT_SIGSUSPEND
#endif
/*
void *mapbase;
unsigned int irq[6];
u64 *dma_mask;
+ u64 coherent_dma_mask;
};
#define to_sh_dev(d) container_of((d), struct sh_dev, dev)
--- /dev/null
+#ifndef __ASM_SH_CLOCK_H
+#define __ASM_SH_CLOCK_H
+
+#include <linux/kref.h>
+#include <linux/list.h>
+#include <linux/seq_file.h>
+
+struct clk;
+
+struct clk_ops {
+ void (*init)(struct clk *clk);
+ void (*enable)(struct clk *clk);
+ void (*disable)(struct clk *clk);
+ void (*recalc)(struct clk *clk);
+ int (*set_rate)(struct clk *clk, unsigned long rate);
+};
+
+struct clk {
+ struct list_head node;
+ const char *name;
+
+ struct module *owner;
+
+ struct clk *parent;
+ struct clk_ops *ops;
+
+ struct kref kref;
+
+ unsigned long rate;
+ unsigned long flags;
+};
+
+#define CLK_ALWAYS_ENABLED (1 << 0)
+#define CLK_RATE_PROPAGATES (1 << 1)
+
+/* Should be defined by processor-specific code */
+void arch_init_clk_ops(struct clk_ops **, int type);
+
+/* arch/sh/kernel/cpu/clock.c */
+int clk_init(void);
+
+int __clk_enable(struct clk *);
+int clk_enable(struct clk *);
+
+void __clk_disable(struct clk *);
+void clk_disable(struct clk *);
+
+int clk_set_rate(struct clk *, unsigned long rate);
+unsigned long clk_get_rate(struct clk *);
+void clk_recalc_rate(struct clk *);
+
+struct clk *clk_get(const char *id);
+void clk_put(struct clk *);
+
+int clk_register(struct clk *);
+void clk_unregister(struct clk *);
+
+int show_clocks(struct seq_file *m);
+
+#endif /* __ASM_SH_CLOCK_H */
+
#define SH_DMAC_BASE 0xa4000020
-#endif /* __ASM_CPU_SH3_DMA_H */
+/* Definitions for the SuperH DMAC */
+#define TM_BURST 0x00000020
+#define TS_8 0x00000000
+#define TS_16 0x00000008
+#define TS_32 0x00000010
+#define TS_128 0x00000018
+
+#define CHCR_TS_MASK 0x18
+#define CHCR_TS_SHIFT 3
+
+#define DMAOR_INIT DMAOR_DME
+/*
+ * The SuperH DMAC supports a number of transmit sizes, we list them here,
+ * with their respective values as they appear in the CHCR registers.
+ */
+enum {
+ XMIT_SZ_8BIT,
+ XMIT_SZ_16BIT,
+ XMIT_SZ_32BIT,
+ XMIT_SZ_128BIT,
+};
+
+static unsigned int ts_shift[] __attribute__ ((used)) = {
+ [XMIT_SZ_8BIT] = 0,
+ [XMIT_SZ_16BIT] = 1,
+ [XMIT_SZ_32BIT] = 2,
+ [XMIT_SZ_128BIT] = 4,
+};
+
+#endif /* __ASM_CPU_SH3_DMA_H */
#ifndef __ASM_CPU_SH4_DMA_H
#define __ASM_CPU_SH4_DMA_H
+#ifdef CONFIG_CPU_SH4A
+#define SH_DMAC_BASE 0xfc808020
+#else
#define SH_DMAC_BASE 0xffa00000
+#endif
-#define SAR ((unsigned long[]){SH_DMAC_BASE + 0x00, SH_DMAC_BASE + 0x10, \
- SH_DMAC_BASE + 0x20, SH_DMAC_BASE + 0x30})
-#define DAR ((unsigned long[]){SH_DMAC_BASE + 0x04, SH_DMAC_BASE + 0x14, \
- SH_DMAC_BASE + 0x24, SH_DMAC_BASE + 0x34})
-#define DMATCR ((unsigned long[]){SH_DMAC_BASE + 0x08, SH_DMAC_BASE + 0x18, \
- SH_DMAC_BASE + 0x28, SH_DMAC_BASE + 0x38})
-#define CHCR ((unsigned long[]){SH_DMAC_BASE + 0x0c, SH_DMAC_BASE + 0x1c, \
- SH_DMAC_BASE + 0x2c, SH_DMAC_BASE + 0x3c})
-#define DMAOR (SH_DMAC_BASE + 0x40)
+/* Definitions for the SuperH DMAC */
+#define TM_BURST 0x0000080
+#define TS_8 0x00000010
+#define TS_16 0x00000020
+#define TS_32 0x00000030
+#define TS_64 0x00000000
-#endif /* __ASM_CPU_SH4_DMA_H */
+#define CHCR_TS_MASK 0x30
+#define CHCR_TS_SHIFT 4
+
+#define DMAOR_COD 0x00000008
+
+#define DMAOR_INIT ( 0x8000 | DMAOR_DME )
+/*
+ * The SuperH DMAC supports a number of transmit sizes, we list them here,
+ * with their respective values as they appear in the CHCR registers.
+ *
+ * Defaults to a 64-bit transfer size.
+ */
+enum {
+ XMIT_SZ_64BIT,
+ XMIT_SZ_8BIT,
+ XMIT_SZ_16BIT,
+ XMIT_SZ_32BIT,
+ XMIT_SZ_256BIT,
+};
+
+/*
+ * The DMA count is defined as the number of bytes to transfer.
+ */
+static unsigned int ts_shift[] __attribute__ ((used)) = {
+ [XMIT_SZ_64BIT] = 3,
+ [XMIT_SZ_8BIT] = 0,
+ [XMIT_SZ_16BIT] = 1,
+ [XMIT_SZ_32BIT] = 2,
+ [XMIT_SZ_256BIT] = 5,
+};
+
+#endif /* __ASM_CPU_SH4_DMA_H */
#if defined(CONFIG_CPU_SUBTYPE_SH73180)
#define FRQCR 0xa4150000
+#elif defined(CONFIG_CPU_SUBTYPE_SH7780)
+#define FRQCR 0xffc80000
#else
#define FRQCR 0xffc00000
#endif
#include <linux/config.h>
#include <linux/mm.h>
#include <asm/scatterlist.h>
+#include <asm/cacheflush.h>
#include <asm/io.h>
extern struct bus_type pci_bus_type;
}
}
-static inline void dma_sync_single_for_cpu(struct device *dev,
- dma_addr_t dma_handle, size_t size,
- enum dma_data_direction dir)
+static void dma_sync_single_for_cpu(struct device *dev,
+ dma_addr_t dma_handle, size_t size,
+ enum dma_data_direction dir)
__attribute__ ((alias("dma_sync_single")));
-static inline void dma_sync_single_for_device(struct device *dev,
- dma_addr_t dma_handle, size_t size,
- enum dma_data_direction dir)
+static void dma_sync_single_for_device(struct device *dev,
+ dma_addr_t dma_handle, size_t size,
+ enum dma_data_direction dir)
__attribute__ ((alias("dma_sync_single")));
-static inline void dma_sync_sg_for_cpu(struct device *dev,
- struct scatterlist *sg, int nelems,
- enum dma_data_direction dir)
+static void dma_sync_sg_for_cpu(struct device *dev,
+ struct scatterlist *sg, int nelems,
+ enum dma_data_direction dir)
__attribute__ ((alias("dma_sync_sg")));
-static inline void dma_sync_sg_for_device(struct device *dev,
- struct scatterlist *sg, int nelems,
- enum dma_data_direction dir)
+static void dma_sync_sg_for_device(struct device *dev,
+ struct scatterlist *sg, int nelems,
+ enum dma_data_direction dir)
__attribute__ ((alias("dma_sync_sg")));
static inline int dma_get_cache_alignment(void)
#include <linux/spinlock.h>
#include <linux/wait.h>
#include <linux/sysdev.h>
+#include <linux/device.h>
#include <asm/cpu/dma.h>
#include <asm/semaphore.h>
* DMA channel capabilities / flags
*/
enum {
- DMA_CONFIGURED = 0x00,
DMA_TEI_CAPABLE = 0x01,
+ DMA_CONFIGURED = 0x02,
};
extern spinlock_t dma_spin_lock;
struct dma_channel {
char dev_id[16];
- unsigned int chan;
+ unsigned int chan; /* Physical channel number */
+ unsigned int vchan; /* Virtual channel number */
unsigned int mode;
unsigned int count;
};
struct dma_info {
+ struct platform_device *pdev;
+
const char *name;
unsigned int nr_channels;
unsigned long flags;
#ifdef CONFIG_SYSFS
/* arch/sh/drivers/dma/dma-sysfs.c */
-extern int dma_create_sysfs_files(struct dma_channel *);
+extern int dma_create_sysfs_files(struct dma_channel *, struct dma_info *);
+extern void dma_remove_sysfs_files(struct dma_channel *, struct dma_info *);
+#else
+#define dma_create_sysfs_file(channel, info) do { } while (0)
+#define dma_remove_sysfs_file(channel, info) do { } while (0)
#endif
#ifdef CONFIG_PCI
#include <asm/cpu/freq.h>
-/* arch/sh/kernel/time.c */
-extern void get_current_frequency_divisors(unsigned int *ifc, unsigned int *pfc, unsigned int *bfc);
-
-extern unsigned int get_ifc_divisor(unsigned int value);
-extern unsigned int get_ifc_divisor(unsigned int value);
-extern unsigned int get_ifc_divisor(unsigned int value);
-
-extern unsigned int get_ifc_value(unsigned int divisor);
-extern unsigned int get_pfc_value(unsigned int divisor);
-extern unsigned int get_bfc_value(unsigned int divisor);
-
#endif /* __KERNEL__ */
#endif /* __ASM_SH_FREQ_H */
* For read{b,w,l} and write{b,w,l} there are also __raw versions, which
* do not have a memory barrier after them.
*
- * In addition, we have
+ * In addition, we have
* ctrl_in{b,w,l}/ctrl_out{b,w,l} for SuperH specific I/O.
* which are processor specific.
*/
* inb by default expands to _inb, but the machine specific code may
* define it to __inb if it chooses.
*/
-
+#include <linux/config.h>
#include <asm/cache.h>
#include <asm/system.h>
#include <asm/addrspace.h>
#include <asm/machvec.h>
-#include <linux/config.h>
+#include <asm/pgtable.h>
+#include <asm-generic/iomap.h>
+
+#ifdef __KERNEL__
/*
* Depending on which platform we are running on, we need different
* I/O functions.
*/
+#define __IO_PREFIX generic
+#include <asm/io_generic.h>
+
+#define maybebadio(port) \
+ printk(KERN_ERR "bad PC-like io %s:%u for port 0x%lx at 0x%08x\n", \
+ __FUNCTION__, __LINE__, (port), (u32)__builtin_return_address(0))
-#ifdef __KERNEL__
/*
* Since boards are able to define their own set of I/O routines through
* their respective machine vector, we always wrap through the mv.
* a given routine, it will be wrapped to generic code at run-time.
*/
-# define __inb(p) sh_mv.mv_inb((p))
-# define __inw(p) sh_mv.mv_inw((p))
-# define __inl(p) sh_mv.mv_inl((p))
-# define __outb(x,p) sh_mv.mv_outb((x),(p))
-# define __outw(x,p) sh_mv.mv_outw((x),(p))
-# define __outl(x,p) sh_mv.mv_outl((x),(p))
-
-# define __inb_p(p) sh_mv.mv_inb_p((p))
-# define __inw_p(p) sh_mv.mv_inw_p((p))
-# define __inl_p(p) sh_mv.mv_inl_p((p))
-# define __outb_p(x,p) sh_mv.mv_outb_p((x),(p))
-# define __outw_p(x,p) sh_mv.mv_outw_p((x),(p))
-# define __outl_p(x,p) sh_mv.mv_outl_p((x),(p))
-
-# define __insb(p,b,c) sh_mv.mv_insb((p), (b), (c))
-# define __insw(p,b,c) sh_mv.mv_insw((p), (b), (c))
-# define __insl(p,b,c) sh_mv.mv_insl((p), (b), (c))
-# define __outsb(p,b,c) sh_mv.mv_outsb((p), (b), (c))
-# define __outsw(p,b,c) sh_mv.mv_outsw((p), (b), (c))
-# define __outsl(p,b,c) sh_mv.mv_outsl((p), (b), (c))
-
-# define __readb(a) sh_mv.mv_readb((a))
-# define __readw(a) sh_mv.mv_readw((a))
-# define __readl(a) sh_mv.mv_readl((a))
-# define __writeb(v,a) sh_mv.mv_writeb((v),(a))
-# define __writew(v,a) sh_mv.mv_writew((v),(a))
-# define __writel(v,a) sh_mv.mv_writel((v),(a))
-
-# define __ioremap(a,s) sh_mv.mv_ioremap((a), (s))
-# define __iounmap(a) sh_mv.mv_iounmap((a))
-
-# define __isa_port2addr(a) sh_mv.mv_isa_port2addr(a)
-
-# define inb __inb
-# define inw __inw
-# define inl __inl
-# define outb __outb
-# define outw __outw
-# define outl __outl
-
-# define inb_p __inb_p
-# define inw_p __inw_p
-# define inl_p __inl_p
-# define outb_p __outb_p
-# define outw_p __outw_p
-# define outl_p __outl_p
-
-# define insb __insb
-# define insw __insw
-# define insl __insl
-# define outsb __outsb
-# define outsw __outsw
-# define outsl __outsl
-
-# define __raw_readb __readb
-# define __raw_readw __readw
-# define __raw_readl __readl
-# define __raw_writeb __writeb
-# define __raw_writew __writew
-# define __raw_writel __writel
+#define __inb(p) sh_mv.mv_inb((p))
+#define __inw(p) sh_mv.mv_inw((p))
+#define __inl(p) sh_mv.mv_inl((p))
+#define __outb(x,p) sh_mv.mv_outb((x),(p))
+#define __outw(x,p) sh_mv.mv_outw((x),(p))
+#define __outl(x,p) sh_mv.mv_outl((x),(p))
+
+#define __inb_p(p) sh_mv.mv_inb_p((p))
+#define __inw_p(p) sh_mv.mv_inw_p((p))
+#define __inl_p(p) sh_mv.mv_inl_p((p))
+#define __outb_p(x,p) sh_mv.mv_outb_p((x),(p))
+#define __outw_p(x,p) sh_mv.mv_outw_p((x),(p))
+#define __outl_p(x,p) sh_mv.mv_outl_p((x),(p))
+
+#define __insb(p,b,c) sh_mv.mv_insb((p), (b), (c))
+#define __insw(p,b,c) sh_mv.mv_insw((p), (b), (c))
+#define __insl(p,b,c) sh_mv.mv_insl((p), (b), (c))
+#define __outsb(p,b,c) sh_mv.mv_outsb((p), (b), (c))
+#define __outsw(p,b,c) sh_mv.mv_outsw((p), (b), (c))
+#define __outsl(p,b,c) sh_mv.mv_outsl((p), (b), (c))
+
+#define __readb(a) sh_mv.mv_readb((a))
+#define __readw(a) sh_mv.mv_readw((a))
+#define __readl(a) sh_mv.mv_readl((a))
+#define __writeb(v,a) sh_mv.mv_writeb((v),(a))
+#define __writew(v,a) sh_mv.mv_writew((v),(a))
+#define __writel(v,a) sh_mv.mv_writel((v),(a))
+
+#define inb __inb
+#define inw __inw
+#define inl __inl
+#define outb __outb
+#define outw __outw
+#define outl __outl
+
+#define inb_p __inb_p
+#define inw_p __inw_p
+#define inl_p __inl_p
+#define outb_p __outb_p
+#define outw_p __outw_p
+#define outl_p __outl_p
+
+#define insb __insb
+#define insw __insw
+#define insl __insl
+#define outsb __outsb
+#define outsw __outsw
+#define outsl __outsl
+
+#define __raw_readb(a) __readb((void __iomem *)(a))
+#define __raw_readw(a) __readw((void __iomem *)(a))
+#define __raw_readl(a) __readl((void __iomem *)(a))
+#define __raw_writeb(v, a) __writeb(v, (void __iomem *)(a))
+#define __raw_writew(v, a) __writew(v, (void __iomem *)(a))
+#define __raw_writel(v, a) __writel(v, (void __iomem *)(a))
/*
* The platform header files may define some of these macros to use
* the inlined versions where appropriate. These macros may also be
* redefined by userlevel programs.
*/
-#ifdef __raw_readb
-# define readb(a) ({ unsigned long r_ = __raw_readb((unsigned long)a); mb(); r_; })
+#ifdef __readb
+# define readb(a) ({ unsigned long r_ = __raw_readb(a); mb(); r_; })
#endif
#ifdef __raw_readw
-# define readw(a) ({ unsigned long r_ = __raw_readw((unsigned long)a); mb(); r_; })
+# define readw(a) ({ unsigned long r_ = __raw_readw(a); mb(); r_; })
#endif
#ifdef __raw_readl
-# define readl(a) ({ unsigned long r_ = __raw_readl((unsigned long)a); mb(); r_; })
+# define readl(a) ({ unsigned long r_ = __raw_readl(a); mb(); r_; })
#endif
#ifdef __raw_writeb
-# define writeb(v,a) ({ __raw_writeb((v),(unsigned long)(a)); mb(); })
+# define writeb(v,a) ({ __raw_writeb((v),(a)); mb(); })
#endif
#ifdef __raw_writew
-# define writew(v,a) ({ __raw_writew((v),(unsigned long)(a)); mb(); })
+# define writew(v,a) ({ __raw_writew((v),(a)); mb(); })
#endif
#ifdef __raw_writel
-# define writel(v,a) ({ __raw_writel((v),(unsigned long)(a)); mb(); })
+# define writel(v,a) ({ __raw_writel((v),(a)); mb(); })
#endif
#define readb_relaxed(a) readb(a)
#define readw_relaxed(a) readw(a)
#define readl_relaxed(a) readl(a)
-#define mmiowb()
+/* Simple MMIO */
+#define ioread8(a) readb(a)
+#define ioread16(a) readw(a)
+#define ioread16be(a) be16_to_cpu(__raw_readw((a)))
+#define ioread32(a) readl(a)
+#define ioread32be(a) be32_to_cpu(__raw_readl((a)))
-/*
- * If the platform has PC-like I/O, this function converts the offset into
- * an address.
- */
-static __inline__ unsigned long isa_port2addr(unsigned long offset)
-{
- return __isa_port2addr(offset);
-}
+#define iowrite8(v,a) writeb((v),(a))
+#define iowrite16(v,a) writew((v),(a))
+#define iowrite16be(v,a) __raw_writew(cpu_to_be16((v)),(a))
+#define iowrite32(v,a) writel((v),(a))
+#define iowrite32be(v,a) __raw_writel(cpu_to_be32((v)),(a))
+
+#define ioread8_rep(a,d,c) insb((a),(d),(c))
+#define ioread16_rep(a,d,c) insw((a),(d),(c))
+#define ioread32_rep(a,d,c) insl((a),(d),(c))
+
+#define iowrite8_rep(a,s,c) outsb((a),(s),(c))
+#define iowrite16_rep(a,s,c) outsw((a),(s),(c))
+#define iowrite32_rep(a,s,c) outsl((a),(s),(c))
+
+#define mmiowb() wmb() /* synco on SH-4A, otherwise a nop */
/*
* This function provides a method for the generic case where a board-specific
- * isa_port2addr simply needs to return the port + some arbitrary port base.
+ * ioport_map simply needs to return the port + some arbitrary port base.
*
* We use this at board setup time to implicitly set the port base, and
- * as a result, we can use the generic isa_port2addr.
+ * as a result, we can use the generic ioport_map.
*/
static inline void __set_io_port_base(unsigned long pbase)
{
generic_io_base = pbase;
}
-#define isa_readb(a) readb(isa_port2addr(a))
-#define isa_readw(a) readw(isa_port2addr(a))
-#define isa_readl(a) readl(isa_port2addr(a))
-#define isa_writeb(b,a) writeb(b,isa_port2addr(a))
-#define isa_writew(w,a) writew(w,isa_port2addr(a))
-#define isa_writel(l,a) writel(l,isa_port2addr(a))
+#define isa_readb(a) readb(ioport_map(a, 1))
+#define isa_readw(a) readw(ioport_map(a, 2))
+#define isa_readl(a) readl(ioport_map(a, 4))
+#define isa_writeb(b,a) writeb(b,ioport_map(a, 1))
+#define isa_writew(w,a) writew(w,ioport_map(a, 2))
+#define isa_writel(l,a) writel(l,ioport_map(a, 4))
+
#define isa_memset_io(a,b,c) \
- memset((void *)(isa_port2addr((unsigned long)a)),(b),(c))
+ memset((void *)(ioport_map((unsigned long)(a), 1)),(b),(c))
#define isa_memcpy_fromio(a,b,c) \
- memcpy((a),(void *)(isa_port2addr((unsigned long)(b))),(c))
+ memcpy((a),(void *)(ioport_map((unsigned long)(b), 1)),(c))
#define isa_memcpy_toio(a,b,c) \
- memcpy((void *)(isa_port2addr((unsigned long)(a))),(b),(c))
+ memcpy((void *)(ioport_map((unsigned long)(a), 1)),(b),(c))
/* We really want to try and get these to memcpy etc */
-extern void memcpy_fromio(void *, unsigned long, unsigned long);
-extern void memcpy_toio(unsigned long, const void *, unsigned long);
-extern void memset_io(unsigned long, int, unsigned long);
+extern void memcpy_fromio(void *, volatile void __iomem *, unsigned long);
+extern void memcpy_toio(volatile void __iomem *, const void *, unsigned long);
+extern void memset_io(volatile void __iomem *, int, unsigned long);
/* SuperH on-chip I/O functions */
-static __inline__ unsigned char ctrl_inb(unsigned long addr)
+static inline unsigned char ctrl_inb(unsigned long addr)
{
return *(volatile unsigned char*)addr;
}
-static __inline__ unsigned short ctrl_inw(unsigned long addr)
+static inline unsigned short ctrl_inw(unsigned long addr)
{
return *(volatile unsigned short*)addr;
}
-static __inline__ unsigned int ctrl_inl(unsigned long addr)
+static inline unsigned int ctrl_inl(unsigned long addr)
{
return *(volatile unsigned long*)addr;
}
-static __inline__ void ctrl_outb(unsigned char b, unsigned long addr)
+static inline void ctrl_outb(unsigned char b, unsigned long addr)
{
*(volatile unsigned char*)addr = b;
}
-static __inline__ void ctrl_outw(unsigned short b, unsigned long addr)
+static inline void ctrl_outw(unsigned short b, unsigned long addr)
{
*(volatile unsigned short*)addr = b;
}
-static __inline__ void ctrl_outl(unsigned int b, unsigned long addr)
+static inline void ctrl_outl(unsigned int b, unsigned long addr)
{
*(volatile unsigned long*)addr = b;
}
* Change virtual addresses to physical addresses and vv.
* These are trivial on the 1:1 Linux/SuperH mapping
*/
-static __inline__ unsigned long virt_to_phys(volatile void * address)
+static inline unsigned long virt_to_phys(volatile void *address)
{
return PHYSADDR(address);
}
-static __inline__ void * phys_to_virt(unsigned long address)
+static inline void *phys_to_virt(unsigned long address)
{
return (void *)P1SEGADDR(address);
}
* differently. On the x86 architecture, we just read/write the
* memory location directly.
*
- * On SH, we have the whole physical address space mapped at all times
- * (as MIPS does), so "ioremap()" and "iounmap()" do not need to do
- * anything. (This isn't true for all machines but we still handle
- * these cases with wired TLB entries anyway ...)
+ * On SH, we traditionally have the whole physical address space mapped
+ * at all times (as MIPS does), so "ioremap()" and "iounmap()" do not
+ * need to do anything but place the address in the proper segment. This
+ * is true for P1 and P2 addresses, as well as some P3 ones. However,
+ * most of the P3 addresses and newer cores using extended addressing
+ * need to map through page tables, so the ioremap() implementation
+ * becomes a bit more complicated. See arch/sh/mm/ioremap.c for
+ * additional notes on this.
*
* We cheat a bit and always return uncachable areas until we've fixed
- * the drivers to handle caching properly.
+ * the drivers to handle caching properly.
*/
-static __inline__ void * ioremap(unsigned long offset, unsigned long size)
+#ifdef CONFIG_MMU
+void __iomem *__ioremap(unsigned long offset, unsigned long size,
+ unsigned long flags);
+void __iounmap(void __iomem *addr);
+#else
+#define __ioremap(offset, size, flags) ((void __iomem *)(offset))
+#define __iounmap(addr) do { } while (0)
+#endif /* CONFIG_MMU */
+
+static inline void __iomem *
+__ioremap_mode(unsigned long offset, unsigned long size, unsigned long flags)
{
- return __ioremap(offset, size);
+ unsigned long last_addr = offset + size - 1;
+
+ /*
+ * For P1 and P2 space this is trivial, as everything is already
+ * mapped. Uncached access for P1 addresses are done through P2.
+ * In the P3 case or for addresses outside of the 29-bit space,
+ * mapping must be done by the PMB or by using page tables.
+ */
+ if (likely(PXSEG(offset) < P3SEG && PXSEG(last_addr) < P3SEG)) {
+ if (unlikely(flags & _PAGE_CACHABLE))
+ return (void __iomem *)P1SEGADDR(offset);
+
+ return (void __iomem *)P2SEGADDR(offset);
+ }
+
+ return __ioremap(offset, size, flags);
}
-static __inline__ void iounmap(void *addr)
-{
- return __iounmap(addr);
-}
-
-#define ioremap_nocache(off,size) ioremap(off,size)
-
-static __inline__ int check_signature(unsigned long io_addr,
+#define ioremap(offset, size) \
+ __ioremap_mode((offset), (size), 0)
+#define ioremap_nocache(offset, size) \
+ __ioremap_mode((offset), (size), 0)
+#define ioremap_cache(offset, size) \
+ __ioremap_mode((offset), (size), _PAGE_CACHABLE)
+#define p3_ioremap(offset, size, flags) \
+ __ioremap((offset), (size), (flags))
+#define iounmap(addr) \
+ __iounmap((addr))
+
+static inline int check_signature(char __iomem *io_addr,
const unsigned char *signature, int length)
{
int retval = 0;
/*
- * include/asm-sh/io_generic.h
- *
- * Copyright 2000 Stuart Menefy (stuart.menefy@st.com)
- *
- * May be copied or modified under the terms of the GNU General Public
- * License. See linux/COPYING for more information.
- *
- * Generic IO functions
+ * Trivial I/O routine definitions, intentionally meant to be included
+ * multiple times. Ugly I/O routine concatenation helpers taken from
+ * alpha. Must be included _before_ io.h to avoid preprocessor-induced
+ * routine mismatch.
*/
-
-#ifndef _ASM_SH_IO_GENERIC_H
-#define _ASM_SH_IO_GENERIC_H
-
-extern unsigned long generic_io_base;
-
-extern unsigned char generic_inb(unsigned long port);
-extern unsigned short generic_inw(unsigned long port);
-extern unsigned int generic_inl(unsigned long port);
-
-extern void generic_outb(unsigned char value, unsigned long port);
-extern void generic_outw(unsigned short value, unsigned long port);
-extern void generic_outl(unsigned int value, unsigned long port);
-
-extern unsigned char generic_inb_p(unsigned long port);
-extern unsigned short generic_inw_p(unsigned long port);
-extern unsigned int generic_inl_p(unsigned long port);
-extern void generic_outb_p(unsigned char value, unsigned long port);
-extern void generic_outw_p(unsigned short value, unsigned long port);
-extern void generic_outl_p(unsigned int value, unsigned long port);
-
-extern void generic_insb(unsigned long port, void *addr, unsigned long count);
-extern void generic_insw(unsigned long port, void *addr, unsigned long count);
-extern void generic_insl(unsigned long port, void *addr, unsigned long count);
-extern void generic_outsb(unsigned long port, const void *addr, unsigned long count);
-extern void generic_outsw(unsigned long port, const void *addr, unsigned long count);
-extern void generic_outsl(unsigned long port, const void *addr, unsigned long count);
-
-extern unsigned char generic_readb(unsigned long addr);
-extern unsigned short generic_readw(unsigned long addr);
-extern unsigned int generic_readl(unsigned long addr);
-extern void generic_writeb(unsigned char b, unsigned long addr);
-extern void generic_writew(unsigned short b, unsigned long addr);
-extern void generic_writel(unsigned int b, unsigned long addr);
-
-extern void *generic_ioremap(unsigned long offset, unsigned long size);
-extern void generic_iounmap(void *addr);
-
-extern unsigned long generic_isa_port2addr(unsigned long offset);
-
-#endif /* _ASM_SH_IO_GENERIC_H */
+#define IO_CONCAT(a,b) _IO_CONCAT(a,b)
+#define _IO_CONCAT(a,b) a ## _ ## b
+
+#ifndef __IO_PREFIX
+#error "Don't include this header without a valid system prefix"
+#endif
+
+u8 IO_CONCAT(__IO_PREFIX,inb)(unsigned long);
+u16 IO_CONCAT(__IO_PREFIX,inw)(unsigned long);
+u32 IO_CONCAT(__IO_PREFIX,inl)(unsigned long);
+
+void IO_CONCAT(__IO_PREFIX,outb)(u8, unsigned long);
+void IO_CONCAT(__IO_PREFIX,outw)(u16, unsigned long);
+void IO_CONCAT(__IO_PREFIX,outl)(u32, unsigned long);
+
+u8 IO_CONCAT(__IO_PREFIX,inb_p)(unsigned long);
+u16 IO_CONCAT(__IO_PREFIX,inw_p)(unsigned long);
+u32 IO_CONCAT(__IO_PREFIX,inl_p)(unsigned long);
+void IO_CONCAT(__IO_PREFIX,outb_p)(u8, unsigned long);
+void IO_CONCAT(__IO_PREFIX,outw_p)(u16, unsigned long);
+void IO_CONCAT(__IO_PREFIX,outl_p)(u32, unsigned long);
+
+void IO_CONCAT(__IO_PREFIX,insb)(unsigned long, void *dst, unsigned long count);
+void IO_CONCAT(__IO_PREFIX,insw)(unsigned long, void *dst, unsigned long count);
+void IO_CONCAT(__IO_PREFIX,insl)(unsigned long, void *dst, unsigned long count);
+void IO_CONCAT(__IO_PREFIX,outsb)(unsigned long, const void *src, unsigned long count);
+void IO_CONCAT(__IO_PREFIX,outsw)(unsigned long, const void *src, unsigned long count);
+void IO_CONCAT(__IO_PREFIX,outsl)(unsigned long, const void *src, unsigned long count);
+
+u8 IO_CONCAT(__IO_PREFIX,readb)(void __iomem *);
+u16 IO_CONCAT(__IO_PREFIX,readw)(void __iomem *);
+u32 IO_CONCAT(__IO_PREFIX,readl)(void __iomem *);
+void IO_CONCAT(__IO_PREFIX,writeb)(u8, void __iomem *);
+void IO_CONCAT(__IO_PREFIX,writew)(u16, void __iomem *);
+void IO_CONCAT(__IO_PREFIX,writel)(u32, void __iomem *);
+
+void *IO_CONCAT(__IO_PREFIX,ioremap)(unsigned long offset, unsigned long size);
+void IO_CONCAT(__IO_PREFIX,iounmap)(void *addr);
+
+void __iomem *IO_CONCAT(__IO_PREFIX,ioport_map)(unsigned long addr, unsigned int size);
+void IO_CONCAT(__IO_PREFIX,ioport_unmap)(void __iomem *addr);
+
+#undef __IO_PREFIX
--- /dev/null
+#ifndef __ASM_SH_IRQ_SH7780_H
+#define __ASM_SH_IRQ_SH7780_H
+
+/*
+ * linux/include/asm-sh/irq-sh7780.h
+ *
+ * Copyright (C) 2004 Takashi SHUDO <shudo@hitachi-ul.co.jp>
+ */
+
+#ifdef CONFIG_IDE
+# ifndef IRQ_CFCARD
+# define IRQ_CFCARD 14
+# endif
+# ifndef IRQ_PCMCIA
+# define IRQ_PCMCIA 15
+# endif
+#endif
+
+#define INTC_BASE 0xffd00000
+#define INTC_ICR0 (INTC_BASE+0x0)
+#define INTC_ICR1 (INTC_BASE+0x1c)
+#define INTC_INTPRI (INTC_BASE+0x10)
+#define INTC_INTREQ (INTC_BASE+0x24)
+#define INTC_INTMSK0 (INTC_BASE+0x44)
+#define INTC_INTMSK1 (INTC_BASE+0x48)
+#define INTC_INTMSK2 (INTC_BASE+0x40080)
+#define INTC_INTMSKCLR0 (INTC_BASE+0x64)
+#define INTC_INTMSKCLR1 (INTC_BASE+0x68)
+#define INTC_INTMSKCLR2 (INTC_BASE+0x40084)
+#define INTC_NMIFCR (INTC_BASE+0xc0)
+#define INTC_USERIMASK (INTC_BASE+0x30000)
+
+#define INTC_INT2PRI0 (INTC_BASE+0x40000)
+#define INTC_INT2PRI1 (INTC_BASE+0x40004)
+#define INTC_INT2PRI2 (INTC_BASE+0x40008)
+#define INTC_INT2PRI3 (INTC_BASE+0x4000c)
+#define INTC_INT2PRI4 (INTC_BASE+0x40010)
+#define INTC_INT2PRI5 (INTC_BASE+0x40014)
+#define INTC_INT2PRI6 (INTC_BASE+0x40018)
+#define INTC_INT2PRI7 (INTC_BASE+0x4001c)
+#define INTC_INT2A0 (INTC_BASE+0x40030)
+#define INTC_INT2A1 (INTC_BASE+0x40034)
+#define INTC_INT2MSKR (INTC_BASE+0x40038)
+#define INTC_INT2MSKCR (INTC_BASE+0x4003c)
+#define INTC_INT2B0 (INTC_BASE+0x40040)
+#define INTC_INT2B1 (INTC_BASE+0x40044)
+#define INTC_INT2B2 (INTC_BASE+0x40048)
+#define INTC_INT2B3 (INTC_BASE+0x4004c)
+#define INTC_INT2B4 (INTC_BASE+0x40050)
+#define INTC_INT2B5 (INTC_BASE+0x40054)
+#define INTC_INT2B6 (INTC_BASE+0x40058)
+#define INTC_INT2B7 (INTC_BASE+0x4005c)
+#define INTC_INT2GPIC (INTC_BASE+0x40090)
+/*
+ NOTE:
+ *_IRQ = (INTEVT2 - 0x200)/0x20
+*/
+/* IRQ 0-7 line external int*/
+#define IRQ0_IRQ 2
+#define IRQ0_IPR_ADDR INTC_INTPRI
+#define IRQ0_IPR_POS 7
+#define IRQ0_PRIORITY 2
+
+#define IRQ1_IRQ 4
+#define IRQ1_IPR_ADDR INTC_INTPRI
+#define IRQ1_IPR_POS 6
+#define IRQ1_PRIORITY 2
+
+#define IRQ2_IRQ 6
+#define IRQ2_IPR_ADDR INTC_INTPRI
+#define IRQ2_IPR_POS 5
+#define IRQ2_PRIORITY 2
+
+#define IRQ3_IRQ 8
+#define IRQ3_IPR_ADDR INTC_INTPRI
+#define IRQ3_IPR_POS 4
+#define IRQ3_PRIORITY 2
+
+#define IRQ4_IRQ 10
+#define IRQ4_IPR_ADDR INTC_INTPRI
+#define IRQ4_IPR_POS 3
+#define IRQ4_PRIORITY 2
+
+#define IRQ5_IRQ 12
+#define IRQ5_IPR_ADDR INTC_INTPRI
+#define IRQ5_IPR_POS 2
+#define IRQ5_PRIORITY 2
+
+#define IRQ6_IRQ 14
+#define IRQ6_IPR_ADDR INTC_INTPRI
+#define IRQ6_IPR_POS 1
+#define IRQ6_PRIORITY 2
+
+#define IRQ7_IRQ 0
+#define IRQ7_IPR_ADDR INTC_INTPRI
+#define IRQ7_IPR_POS 0
+#define IRQ7_PRIORITY 2
+
+/* TMU */
+/* ch0 */
+#define TMU_IRQ 28
+#define TMU_IPR_ADDR INTC_INT2PRI0
+#define TMU_IPR_POS 3
+#define TMU_PRIORITY 2
+
+#define TIMER_IRQ 28
+#define TIMER_IPR_ADDR INTC_INT2PRI0
+#define TIMER_IPR_POS 3
+#define TIMER_PRIORITY 2
+
+/* ch 1*/
+#define TMU_CH1_IRQ 29
+#define TMU_CH1_IPR_ADDR INTC_INT2PRI0
+#define TMU_CH1_IPR_POS 2
+#define TMU_CH1_PRIORITY 2
+
+#define TIMER1_IRQ 29
+#define TIMER1_IPR_ADDR INTC_INT2PRI0
+#define TIMER1_IPR_POS 2
+#define TIMER1_PRIORITY 2
+
+/* ch 2*/
+#define TMU_CH2_IRQ 30
+#define TMU_CH2_IPR_ADDR INTC_INT2PRI0
+#define TMU_CH2_IPR_POS 1
+#define TMU_CH2_PRIORITY 2
+/* ch 2 Input capture */
+#define TMU_CH2IC_IRQ 31
+#define TMU_CH2IC_IPR_ADDR INTC_INT2PRI0
+#define TMU_CH2IC_IPR_POS 0
+#define TMU_CH2IC_PRIORITY 2
+/* ch 3 */
+#define TMU_CH3_IRQ 96
+#define TMU_CH3_IPR_ADDR INTC_INT2PRI1
+#define TMU_CH3_IPR_POS 3
+#define TMU_CH3_PRIORITY 2
+/* ch 4 */
+#define TMU_CH4_IRQ 97
+#define TMU_CH4_IPR_ADDR INTC_INT2PRI1
+#define TMU_CH4_IPR_POS 2
+#define TMU_CH4_PRIORITY 2
+/* ch 5*/
+#define TMU_CH5_IRQ 98
+#define TMU_CH5_IPR_ADDR INTC_INT2PRI1
+#define TMU_CH5_IPR_POS 1
+#define TMU_CH5_PRIORITY 2
+
+#define RTC_IRQ 22
+#define RTC_IPR_ADDR INTC_INT2PRI1
+#define RTC_IPR_POS 0
+#define RTC_PRIORITY TIMER_PRIORITY
+
+/* SCIF0 */
+#define SCIF0_ERI_IRQ 40
+#define SCIF0_RXI_IRQ 41
+#define SCIF0_BRI_IRQ 42
+#define SCIF0_TXI_IRQ 43
+#define SCIF0_IPR_ADDR INTC_INT2PRI2
+#define SCIF0_IPR_POS 3
+#define SCIF0_PRIORITY 3
+
+/* SCIF1 */
+#define SCIF1_ERI_IRQ 76
+#define SCIF1_RXI_IRQ 77
+#define SCIF1_BRI_IRQ 78
+#define SCIF1_TXI_IRQ 79
+#define SCIF1_IPR_ADDR INTC_INT2PRI2
+#define SCIF1_IPR_POS 2
+#define SCIF1_PRIORITY 3
+
+#define WDT_IRQ 27
+#define WDT_IPR_ADDR INTC_INT2PRI2
+#define WDT_IPR_POS 1
+#define WDT_PRIORITY 2
+
+/* DMAC(0) */
+#define DMINT0_IRQ 34
+#define DMINT1_IRQ 35
+#define DMINT2_IRQ 36
+#define DMINT3_IRQ 37
+#define DMINT4_IRQ 44
+#define DMINT5_IRQ 45
+#define DMINT6_IRQ 46
+#define DMINT7_IRQ 47
+#define DMAE_IRQ 38
+#define DMA0_IPR_ADDR INTC_INT2PRI3
+#define DMA0_IPR_POS 2
+#define DMA0_PRIORITY 7
+
+/* DMAC(1) */
+#define DMINT8_IRQ 92
+#define DMINT9_IRQ 93
+#define DMINT10_IRQ 94
+#define DMINT11_IRQ 95
+#define DMA1_IPR_ADDR INTC_INT2PRI3
+#define DMA1_IPR_POS 1
+#define DMA1_PRIORITY 7
+
+#define DMTE0_IRQ DMINT0_IRQ
+#define DMTE4_IRQ DMINT4_IRQ
+#define DMA_IPR_ADDR DMA0_IPR_ADDR
+#define DMA_IPR_POS DMA0_IPR_POS
+#define DMA_PRIORITY DMA0_PRIORITY
+
+/* CMT */
+#define CMT_IRQ 56
+#define CMT_IPR_ADDR INTC_INT2PRI4
+#define CMT_IPR_POS 3
+#define CMT_PRIORITY 0
+
+/* HAC */
+#define HAC_IRQ 60
+#define HAC_IPR_ADDR INTC_INT2PRI4
+#define HAC_IPR_POS 2
+#define CMT_PRIORITY 0
+
+/* PCIC(0) */
+#define PCIC0_IRQ 64
+#define PCIC0_IPR_ADDR INTC_INT2PRI4
+#define PCIC0_IPR_POS 1
+#define PCIC0_PRIORITY 2
+
+/* PCIC(1) */
+#define PCIC1_IRQ 65
+#define PCIC1_IPR_ADDR INTC_INT2PRI4
+#define PCIC1_IPR_POS 0
+#define PCIC1_PRIORITY 2
+
+/* PCIC(2) */
+#define PCIC2_IRQ 66
+#define PCIC2_IPR_ADDR INTC_INT2PRI5
+#define PCIC2_IPR_POS 3
+#define PCIC2_PRIORITY 2
+
+/* PCIC(3) */
+#define PCIC3_IRQ 67
+#define PCIC3_IPR_ADDR INTC_INT2PRI5
+#define PCIC3_IPR_POS 2
+#define PCIC3_PRIORITY 2
+
+/* PCIC(4) */
+#define PCIC4_IRQ 68
+#define PCIC4_IPR_ADDR INTC_INT2PRI5
+#define PCIC4_IPR_POS 1
+#define PCIC4_PRIORITY 2
+
+/* PCIC(5) */
+#define PCICERR_IRQ 69
+#define PCICPWD3_IRQ 70
+#define PCICPWD2_IRQ 71
+#define PCICPWD1_IRQ 72
+#define PCICPWD0_IRQ 73
+#define PCIC5_IPR_ADDR INTC_INT2PRI5
+#define PCIC5_IPR_POS 0
+#define PCIC5_PRIORITY 2
+
+/* SIOF */
+#define SIOF_IRQ 80
+#define SIOF_IPR_ADDR INTC_INT2PRI6
+#define SIOF_IPR_POS 3
+#define SIOF_PRIORITY 3
+
+/* HSPI */
+#define HSPI_IRQ 84
+#define HSPI_IPR_ADDR INTC_INT2PRI6
+#define HSPI_IPR_POS 2
+#define HSPI_PRIORITY 3
+
+/* MMCIF */
+#define MMCIF_FSTAT_IRQ 88
+#define MMCIF_TRAN_IRQ 89
+#define MMCIF_ERR_IRQ 90
+#define MMCIF_FRDY_IRQ 91
+#define MMCIF_IPR_ADDR INTC_INT2PRI6
+#define MMCIF_IPR_POS 1
+#define HSPI_PRIORITY 3
+
+/* SSI */
+#define SSI_IRQ 100
+#define SSI_IPR_ADDR INTC_INT2PRI6
+#define SSI_IPR_POS 0
+#define SSI_PRIORITY 3
+
+/* FLCTL */
+#define FLCTL_FLSTE_IRQ 104
+#define FLCTL_FLTEND_IRQ 105
+#define FLCTL_FLTRQ0_IRQ 106
+#define FLCTL_FLTRQ1_IRQ 107
+#define FLCTL_IPR_ADDR INTC_INT2PRI7
+#define FLCTL_IPR_POS 3
+#define FLCTL_PRIORITY 3
+
+/* GPIO */
+#define GPIO0_IRQ 108
+#define GPIO1_IRQ 109
+#define GPIO2_IRQ 110
+#define GPIO3_IRQ 111
+#define GPIO_IPR_ADDR INTC_INT2PRI7
+#define GPIO_IPR_POS 2
+#define GPIO_PRIORITY 3
+
+/* ONCHIP_NR_IRQS */
+#define NR_IRQS 150 /* 111 + 16 */
+
+/* In a generic kernel, NR_IRQS is an upper bound, and we should use
+ * ACTUAL_NR_IRQS (which uses the machine vector) to get the correct value.
+ */
+#define ACTUAL_NR_IRQS NR_IRQS
+
+extern void disable_irq(unsigned int);
+extern void disable_irq_nosync(unsigned int);
+extern void enable_irq(unsigned int);
+
+/*
+ * Simple Mask Register Support
+ */
+extern void make_maskreg_irq(unsigned int irq);
+extern unsigned short *irq_mask_register;
+
+/*
+ * Function for "on chip support modules".
+ */
+extern void make_imask_irq(unsigned int irq);
+
+#define INTC_TMU0_MSK 0
+#define INTC_TMU3_MSK 1
+#define INTC_RTC_MSK 2
+#define INTC_SCIF0_MSK 3
+#define INTC_SCIF1_MSK 4
+#define INTC_WDT_MSK 5
+#define INTC_HUID_MSK 7
+#define INTC_DMAC0_MSK 8
+#define INTC_DMAC1_MSK 9
+#define INTC_CMT_MSK 12
+#define INTC_HAC_MSK 13
+#define INTC_PCIC0_MSK 14
+#define INTC_PCIC1_MSK 15
+#define INTC_PCIC2_MSK 16
+#define INTC_PCIC3_MSK 17
+#define INTC_PCIC4_MSK 18
+#define INTC_PCIC5_MSK 19
+#define INTC_SIOF_MSK 20
+#define INTC_HSPI_MSK 21
+#define INTC_MMCIF_MSK 22
+#define INTC_SSI_MSK 23
+#define INTC_FLCTL_MSK 24
+#define INTC_GPIO_MSK 25
+
+#endif /* __ASM_SH_IRQ_SH7780_H */
#include <asm/machvec.h>
#include <asm/ptrace.h> /* for pt_regs */
-#if defined(CONFIG_SH_HP600) || \
+#if defined(CONFIG_SH_HP6XX) || \
defined(CONFIG_SH_RTS7751R2D) || \
defined(CONFIG_SH_HS7751RVOIP) || \
- defined(CONFIG_SH_SH03)
+ defined(CONFIG_SH_HS7751RVOIP) || \
+ defined(CONFIG_SH_SH03) || \
+ defined(CONFIG_SH_R7780RP) || \
+ defined(CONFIG_SH_LANDISK)
#include <asm/mach/ide.h>
#endif
+#ifndef CONFIG_CPU_SUBTYPE_SH7780
+
+#define INTC_DMAC0_MSK 0
+
#if defined(CONFIG_CPU_SH3)
#define INTC_IPRA 0xfffffee2UL
#define INTC_IPRB 0xfffffee4UL
#define SCIF1_IPR_ADDR INTC_IPRB
#define SCIF1_IPR_POS 1
#define SCIF1_PRIORITY 3
-#endif
-#endif
+#endif /* ST40STB1 */
+
+#endif /* 775x / SH4-202 / ST40STB1 */
/* NR_IRQS is made from three components:
* 1. ONCHIP_NR_IRQS - number of IRLS + on-chip peripherial modules
*/
/* 1. ONCHIP_NR_IRQS */
-#ifdef CONFIG_SH_GENERIC
+#if defined(CONFIG_CPU_SUBTYPE_SH7604)
+# define ONCHIP_NR_IRQS 24 // Actually 21
+#elif defined(CONFIG_CPU_SUBTYPE_SH7707)
+# define ONCHIP_NR_IRQS 64
+# define PINT_NR_IRQS 16
+#elif defined(CONFIG_CPU_SUBTYPE_SH7708)
+# define ONCHIP_NR_IRQS 32
+#elif defined(CONFIG_CPU_SUBTYPE_SH7709) || \
+ defined(CONFIG_CPU_SUBTYPE_SH7705)
+# define ONCHIP_NR_IRQS 64 // Actually 61
+# define PINT_NR_IRQS 16
+#elif defined(CONFIG_CPU_SUBTYPE_SH7750)
+# define ONCHIP_NR_IRQS 48 // Actually 44
+#elif defined(CONFIG_CPU_SUBTYPE_SH7751)
+# define ONCHIP_NR_IRQS 72
+#elif defined(CONFIG_CPU_SUBTYPE_SH7760)
+# define ONCHIP_NR_IRQS 112 /* XXX */
+#elif defined(CONFIG_CPU_SUBTYPE_SH4_202)
+# define ONCHIP_NR_IRQS 72
+#elif defined(CONFIG_CPU_SUBTYPE_ST40STB1)
+# define ONCHIP_NR_IRQS 144
+#elif defined(CONFIG_CPU_SUBTYPE_SH7300)
+# define ONCHIP_NR_IRQS 109
+#elif defined(CONFIG_SH_UNKNOWN) /* Most be last */
# define ONCHIP_NR_IRQS 144
-#else
-# if defined(CONFIG_CPU_SUBTYPE_SH7604)
-# define ONCHIP_NR_IRQS 24 // Actually 21
-# elif defined(CONFIG_CPU_SUBTYPE_SH7707)
-# define ONCHIP_NR_IRQS 64
-# define PINT_NR_IRQS 16
-# elif defined(CONFIG_CPU_SUBTYPE_SH7708)
-# define ONCHIP_NR_IRQS 32
-# elif defined(CONFIG_CPU_SUBTYPE_SH7709) || \
- defined(CONFIG_CPU_SUBTYPE_SH7705)
-# define ONCHIP_NR_IRQS 64 // Actually 61
-# define PINT_NR_IRQS 16
-# elif defined(CONFIG_CPU_SUBTYPE_SH7750)
-# define ONCHIP_NR_IRQS 48 // Actually 44
-# elif defined(CONFIG_CPU_SUBTYPE_SH7751)
-# define ONCHIP_NR_IRQS 72
-# elif defined(CONFIG_CPU_SUBTYPE_SH7760)
-# define ONCHIP_NR_IRQS 110
-# elif defined(CONFIG_CPU_SUBTYPE_SH4_202)
-# define ONCHIP_NR_IRQS 72
-# elif defined(CONFIG_CPU_SUBTYPE_ST40STB1)
-# define ONCHIP_NR_IRQS 144
-# elif defined(CONFIG_CPU_SUBTYPE_SH7300)
-# define ONCHIP_NR_IRQS 109
-# endif
#endif
/* 2. PINT_NR_IRQS */
-#ifdef CONFIG_SH_GENERIC
+#ifdef CONFIG_SH_UNKNOWN
# define PINT_NR_IRQS 16
#else
# ifndef PINT_NR_IRQS
#endif
/* 3. OFFCHIP_NR_IRQS */
-#ifdef CONFIG_SH_GENERIC
+#if defined(CONFIG_HD64461)
+# define OFFCHIP_NR_IRQS 18
+#elif defined (CONFIG_SH_BIGSUR) /* must be before CONFIG_HD64465 */
+# define OFFCHIP_NR_IRQS 48
+#elif defined(CONFIG_HD64465)
# define OFFCHIP_NR_IRQS 16
+#elif defined (CONFIG_SH_EC3104)
+# define OFFCHIP_NR_IRQS 16
+#elif defined (CONFIG_SH_DREAMCAST)
+# define OFFCHIP_NR_IRQS 96
+#elif defined (CONFIG_SH_TITAN)
+# define OFFCHIP_NR_IRQS 4
+#elif defined(CONFIG_SH_UNKNOWN)
+# define OFFCHIP_NR_IRQS 16 /* Must also be last */
#else
-# if defined(CONFIG_HD64461)
-# define OFFCHIP_NR_IRQS 18
-# elif defined (CONFIG_SH_BIGSUR) /* must be before CONFIG_HD64465 */
-# define OFFCHIP_NR_IRQS 48
-# elif defined(CONFIG_HD64465)
-# define OFFCHIP_NR_IRQS 16
-# elif defined (CONFIG_SH_EC3104)
-# define OFFCHIP_NR_IRQS 16
-# elif defined (CONFIG_SH_DREAMCAST)
-# define OFFCHIP_NR_IRQS 96
-# else
-# define OFFCHIP_NR_IRQS 0
-# endif
+# define OFFCHIP_NR_IRQS 0
#endif
#if OFFCHIP_NR_IRQS > 0
/* NR_IRQS. 1+2+3 */
#define NR_IRQS (ONCHIP_NR_IRQS + PINT_NR_IRQS + OFFCHIP_NR_IRQS)
-/* In a generic kernel, NR_IRQS is an upper bound, and we should use
- * ACTUAL_NR_IRQS (which uses the machine vector) to get the correct value.
- */
-#ifdef CONFIG_SH_GENERIC
-# define ACTUAL_NR_IRQS (sh_mv.mv_nr_irqs)
-#else
-# define ACTUAL_NR_IRQS NR_IRQS
-#endif
-
-
extern void disable_irq(unsigned int);
extern void disable_irq_nosync(unsigned int);
extern void enable_irq(unsigned int);
extern int ipr_irq_demux(int irq);
#define __irq_demux(irq) ipr_irq_demux(irq)
-
-#else
-#define __irq_demux(irq) irq
#endif /* CONFIG_CPU_SUBTYPE_SH7707 || CONFIG_CPU_SUBTYPE_SH7709 */
#if defined(CONFIG_CPU_SUBTYPE_SH7750) || defined(CONFIG_CPU_SUBTYPE_SH7751) || \
#define INTC_ICR_IRLM (1<<7)
#endif
-#ifdef CONFIG_CPU_SUBTYPE_ST40STB1
+#else
+#include <asm/irq-sh7780.h>
+#endif
+/* SH with INTC2-style interrupts */
+#ifdef CONFIG_CPU_HAS_INTC2_IRQ
+#if defined(CONFIG_CPU_SUBTYPE_ST40STB1)
+#define INTC2_BASE 0xfe080000
#define INTC2_FIRST_IRQ 64
-#define NR_INTC2_IRQS 25
-
+#define INTC2_INTREQ_OFFSET 0x20
+#define INTC2_INTMSK_OFFSET 0x40
+#define INTC2_INTMSKCLR_OFFSET 0x60
+#define NR_INTC2_IRQS 25
+#elif defined(CONFIG_CPU_SUBTYPE_SH7760)
#define INTC2_BASE 0xfe080000
-#define INTC2_INTC2MODE (INTC2_BASE+0x80)
-
-#define INTC2_INTPRI_OFFSET 0x00
+#define INTC2_FIRST_IRQ 48 /* INTEVT 0x800 */
#define INTC2_INTREQ_OFFSET 0x20
#define INTC2_INTMSK_OFFSET 0x40
#define INTC2_INTMSKCLR_OFFSET 0x60
+#define NR_INTC2_IRQS 64
+#elif defined(CONFIG_CPU_SUBTYPE_SH7780)
+#define INTC2_BASE 0xffd40000
+#define INTC2_FIRST_IRQ 22
+#define INTC2_INTMSK_OFFSET (0x38)
+#define INTC2_INTMSKCLR_OFFSET (0x3c)
+#define NR_INTC2_IRQS 60
+#endif
+
+#define INTC2_INTPRI_OFFSET 0x00
void make_intc2_irq(unsigned int irq,
unsigned int ipr_offset, unsigned int ipr_shift,
void init_IRQ_intc2(void);
void intc2_add_clear_irq(int irq, int (*fn)(int));
-#endif /* CONFIG_CPU_SUBTYPE_ST40STB1 */
+#endif
static inline int generic_irq_demux(int irq)
{
return irq;
}
+#ifndef __irq_demux
+#define __irq_demux(irq) (irq)
+#endif
#define irq_canonicalize(irq) (irq)
#define irq_demux(irq) __irq_demux(sh_mv.mv_irq_demux(irq))
--- /dev/null
+#ifndef _SH_KEXEC_H
+#define _SH_KEXEC_H
+
+/*
+ * KEXEC_SOURCE_MEMORY_LIMIT maximum page get_free_page can return.
+ * I.e. Maximum page that is mapped directly into kernel memory,
+ * and kmap is not required.
+ *
+ * Someone correct me if FIXADDR_START - PAGEOFFSET is not the correct
+ * calculation for the amount of memory directly mappable into the
+ * kernel memory space.
+ */
+
+/* Maximum physical address we can use pages from */
+#define KEXEC_SOURCE_MEMORY_LIMIT (-1UL)
+/* Maximum address we can reach in physical address mode */
+#define KEXEC_DESTINATION_MEMORY_LIMIT (-1UL)
+/* Maximum address we can use for the control code buffer */
+#define KEXEC_CONTROL_MEMORY_LIMIT TASK_SIZE
+
+#define KEXEC_CONTROL_CODE_SIZE 4096
+
+/* The native architecture */
+#define KEXEC_ARCH KEXEC_ARCH_SH
+
+#ifndef __ASSEMBLY__
+
+extern void machine_shutdown(void);
+extern void *crash_notes;
+
+#endif /* __ASSEMBLY__ */
+
+#endif /* _SH_KEXEC_H */
#include <asm/machvec_init.h>
struct device;
-struct timeval;
-struct sh_machine_vector
-{
+struct sh_machine_vector {
int mv_nr_irqs;
- unsigned char (*mv_inb)(unsigned long);
- unsigned short (*mv_inw)(unsigned long);
- unsigned int (*mv_inl)(unsigned long);
- void (*mv_outb)(unsigned char, unsigned long);
- void (*mv_outw)(unsigned short, unsigned long);
- void (*mv_outl)(unsigned int, unsigned long);
-
- unsigned char (*mv_inb_p)(unsigned long);
- unsigned short (*mv_inw_p)(unsigned long);
- unsigned int (*mv_inl_p)(unsigned long);
- void (*mv_outb_p)(unsigned char, unsigned long);
- void (*mv_outw_p)(unsigned short, unsigned long);
- void (*mv_outl_p)(unsigned int, unsigned long);
-
- void (*mv_insb)(unsigned long port, void *addr, unsigned long count);
- void (*mv_insw)(unsigned long port, void *addr, unsigned long count);
- void (*mv_insl)(unsigned long port, void *addr, unsigned long count);
- void (*mv_outsb)(unsigned long port, const void *addr, unsigned long count);
- void (*mv_outsw)(unsigned long port, const void *addr, unsigned long count);
- void (*mv_outsl)(unsigned long port, const void *addr, unsigned long count);
-
- unsigned char (*mv_readb)(unsigned long);
- unsigned short (*mv_readw)(unsigned long);
- unsigned int (*mv_readl)(unsigned long);
- void (*mv_writeb)(unsigned char, unsigned long);
- void (*mv_writew)(unsigned short, unsigned long);
- void (*mv_writel)(unsigned int, unsigned long);
-
- void* (*mv_ioremap)(unsigned long offset, unsigned long size);
- void (*mv_iounmap)(void *addr);
-
- unsigned long (*mv_isa_port2addr)(unsigned long offset);
+ u8 (*mv_inb)(unsigned long);
+ u16 (*mv_inw)(unsigned long);
+ u32 (*mv_inl)(unsigned long);
+ void (*mv_outb)(u8, unsigned long);
+ void (*mv_outw)(u16, unsigned long);
+ void (*mv_outl)(u32, unsigned long);
+
+ u8 (*mv_inb_p)(unsigned long);
+ u16 (*mv_inw_p)(unsigned long);
+ u32 (*mv_inl_p)(unsigned long);
+ void (*mv_outb_p)(u8, unsigned long);
+ void (*mv_outw_p)(u16, unsigned long);
+ void (*mv_outl_p)(u32, unsigned long);
+
+ void (*mv_insb)(unsigned long, void *dst, unsigned long count);
+ void (*mv_insw)(unsigned long, void *dst, unsigned long count);
+ void (*mv_insl)(unsigned long, void *dst, unsigned long count);
+ void (*mv_outsb)(unsigned long, const void *src, unsigned long count);
+ void (*mv_outsw)(unsigned long, const void *src, unsigned long count);
+ void (*mv_outsl)(unsigned long, const void *src, unsigned long count);
+
+ u8 (*mv_readb)(void __iomem *);
+ u16 (*mv_readw)(void __iomem *);
+ u32 (*mv_readl)(void __iomem *);
+ void (*mv_writeb)(u8, void __iomem *);
+ void (*mv_writew)(u16, void __iomem *);
+ void (*mv_writel)(u32, void __iomem *);
int (*mv_irq_demux)(int irq);
void *(*mv_consistent_alloc)(struct device *, size_t, dma_addr_t *, gfp_t);
int (*mv_consistent_free)(struct device *, size_t, void *, dma_addr_t);
+
+ void __iomem *(*mv_ioport_map)(unsigned long port, unsigned int size);
+ void (*mv_ioport_unmap)(void __iomem *);
};
extern struct sh_machine_vector sh_mv;
--- /dev/null
+#ifndef __ASM_SH_TIMER_H
+#define __ASM_SH_TIMER_H
+
+#include <linux/sysdev.h>
+#include <asm/cpu/timer.h>
+
+struct sys_timer_ops {
+ int (*init)(void);
+ unsigned long (*get_offset)(void);
+ unsigned long (*get_frequency)(void);
+};
+
+struct sys_timer {
+ const char *name;
+
+ struct sys_device dev;
+ struct sys_timer_ops *ops;
+};
+
+#define TICK_SIZE (tick_nsec / 1000)
+
+extern struct sys_timer tmu_timer;
+extern struct sys_timer *sys_timer;
+
+static inline unsigned long get_timer_offset(void)
+{
+ return sys_timer->ops->get_offset();
+}
+
+static inline unsigned long get_timer_frequency(void)
+{
+ return sys_timer->ops->get_frequency();
+}
+
+/* arch/sh/kernel/timers/timer.c */
+struct sys_timer *get_sys_timer(void);
+
+/* arch/sh/kernel/time.c */
+void handle_timer_tick(struct pt_regs *);
+
+#endif /* __ASM_SH_TIMER_H */
+
PROMDEV_IKBD, /* input from keyboard */
PROMDEV_ITTYA, /* input from ttya */
PROMDEV_ITTYB, /* input from ttyb */
+ PROMDEV_IRSC, /* input from rsc */
PROMDEV_I_UNK,
};
PROMDEV_OSCREEN, /* to screen */
PROMDEV_OTTYA, /* to ttya */
PROMDEV_OTTYB, /* to ttyb */
+ PROMDEV_ORSC, /* to rsc */
PROMDEV_O_UNK,
};
* thread information flag bit numbers
*/
#define TIF_SYSCALL_TRACE 0 /* syscall trace active */
-#define TIF_NOTIFY_RESUME 1 /* resumption notification requested */
+/* flag bit 1 is available */
#define TIF_SIGPENDING 2 /* signal pending */
#define TIF_NEED_RESCHED 3 /* rescheduling necessary */
+#define TIF_RESTORE_SIGMASK 4 /* restore signal mask in do_signal() */
#define TIF_USEDFPU 8 /* FPU was used by this task
* this quantum (SMP) */
#define TIF_POLLING_NRFLAG 9 /* true if poll_idle() is polling
/* as above, but as bit values */
#define _TIF_SYSCALL_TRACE (1<<TIF_SYSCALL_TRACE)
-#define _TIF_NOTIFY_RESUME (1<<TIF_NOTIFY_RESUME)
#define _TIF_SIGPENDING (1<<TIF_SIGPENDING)
#define _TIF_NEED_RESCHED (1<<TIF_NEED_RESCHED)
+#define _TIF_RESTORE_SIGMASK (1<<TIF_RESTORE_SIGMASK)
#define _TIF_USEDFPU (1<<TIF_USEDFPU)
#define _TIF_POLLING_NRFLAG (1<<TIF_POLLING_NRFLAG)
#define __NR_add_key 281
#define __NR_request_key 282
#define __NR_keyctl 283
+#define __NR_openat 284
+#define __NR_mkdirat 285
+#define __NR_mknodat 286
+#define __NR_fchownat 287
+#define __NR_futimesat 288
+#define __NR_newfstatat 289
+#define __NR_unlinkat 290
+#define __NR_renameat 291
+#define __NR_linkat 292
+#define __NR_symlinkat 293
+#define __NR_readlinkat 294
+#define __NR_fchmodat 295
+#define __NR_faccessat 296
+#define __NR_pselect6 297
+#define __NR_ppoll 298
-/* WARNING: You MAY NOT add syscall numbers larger than 283, since
+/* WARNING: You MAY NOT add syscall numbers larger than 298, since
* all of the syscall tables in the Sparc kernel are
- * sized to have 283 entries (starting at zero). Therefore
- * find a free slot in the 0-282 range.
+ * sized to have 298 entries (starting at zero). Therefore
+ * find a free slot in the 0-298 range.
*/
#define _syscall0(type,name) \
#define __ARCH_WANT_SYS_OLDUMOUNT
#define __ARCH_WANT_SYS_SIGPENDING
#define __ARCH_WANT_SYS_SIGPROCMASK
+#define __ARCH_WANT_SYS_RT_SIGSUSPEND
#endif
#ifdef __KERNEL_SYSCALLS__
PROMDEV_IKBD, /* input from keyboard */
PROMDEV_ITTYA, /* input from ttya */
PROMDEV_ITTYB, /* input from ttyb */
+ PROMDEV_IRSC, /* input from rsc */
PROMDEV_I_UNK,
};
PROMDEV_OSCREEN, /* to screen */
PROMDEV_OTTYA, /* to ttya */
PROMDEV_OTTYB, /* to ttyb */
+ PROMDEV_ORSC, /* to rsc */
PROMDEV_O_UNK,
};
: "memory");
}
+static int inline __read_trylock(raw_rwlock_t *lock)
+{
+ int tmp1, tmp2;
+
+ __asm__ __volatile__ (
+"1: ldsw [%2], %0\n"
+" brlz,a,pn %0, 2f\n"
+" mov 0, %0\n"
+" add %0, 1, %1\n"
+" cas [%2], %0, %1\n"
+" cmp %0, %1\n"
+" membar #StoreLoad | #StoreStore\n"
+" bne,pn %%icc, 1b\n"
+" mov 1, %0\n"
+"2:"
+ : "=&r" (tmp1), "=&r" (tmp2)
+ : "r" (lock)
+ : "memory");
+
+ return tmp1;
+}
+
static void inline __read_unlock(raw_rwlock_t *lock)
{
unsigned long tmp1, tmp2;
}
#define __raw_read_lock(p) __read_lock(p)
+#define __raw_read_trylock(p) __read_trylock(p)
#define __raw_read_unlock(p) __read_unlock(p)
#define __raw_write_lock(p) __write_lock(p)
#define __raw_write_unlock(p) __write_unlock(p)
#define __raw_write_trylock(p) __write_trylock(p)
-#define __raw_read_trylock(lock) generic__raw_read_trylock(lock)
#define __raw_read_can_lock(rw) (!((rw)->lock & 0x80000000UL))
#define __raw_write_can_lock(rw) (!(rw)->lock)
* nop
*/
#define TIF_SYSCALL_TRACE 0 /* syscall trace active */
-#define TIF_NOTIFY_RESUME 1 /* resumption notification requested */
+#define TIF_RESTORE_SIGMASK 1 /* restore signal mask in do_signal() */
#define TIF_SIGPENDING 2 /* signal pending */
#define TIF_NEED_RESCHED 3 /* rescheduling necessary */
#define TIF_PERFCTR 4 /* performance counters active */
#define TIF_POLLING_NRFLAG 14
#define _TIF_SYSCALL_TRACE (1<<TIF_SYSCALL_TRACE)
-#define _TIF_NOTIFY_RESUME (1<<TIF_NOTIFY_RESUME)
#define _TIF_SIGPENDING (1<<TIF_SIGPENDING)
#define _TIF_NEED_RESCHED (1<<TIF_NEED_RESCHED)
#define _TIF_PERFCTR (1<<TIF_PERFCTR)
#define _TIF_32BIT (1<<TIF_32BIT)
#define _TIF_SECCOMP (1<<TIF_SECCOMP)
#define _TIF_SYSCALL_AUDIT (1<<TIF_SYSCALL_AUDIT)
+#define _TIF_RESTORE_SIGMASK (1<<TIF_RESTORE_SIGMASK)
#define _TIF_ABI_PENDING (1<<TIF_ABI_PENDING)
#define _TIF_POLLING_NRFLAG (1<<TIF_POLLING_NRFLAG)
#define _TIF_USER_WORK_MASK ((0xff << TI_FLAG_WSAVED_SHIFT) | \
- (_TIF_NOTIFY_RESUME | _TIF_SIGPENDING | \
+ (_TIF_SIGPENDING | _TIF_RESTORE_SIGMASK | \
_TIF_NEED_RESCHED | _TIF_PERFCTR))
#endif /* __KERNEL__ */
#define __NR_add_key 281
#define __NR_request_key 282
#define __NR_keyctl 283
+#define __NR_openat 284
+#define __NR_mkdirat 285
+#define __NR_mknodat 286
+#define __NR_fchownat 287
+#define __NR_futimesat 288
+#define __NR_newfstatat 289
+#define __NR_unlinkat 290
+#define __NR_renameat 291
+#define __NR_linkat 292
+#define __NR_symlinkat 293
+#define __NR_readlinkat 294
+#define __NR_fchmodat 295
+#define __NR_faccessat 296
+#define __NR_pselect6 297
+#define __NR_ppoll 298
-/* WARNING: You MAY NOT add syscall numbers larger than 283, since
+/* WARNING: You MAY NOT add syscall numbers larger than 298, since
* all of the syscall tables in the Sparc kernel are
- * sized to have 283 entries (starting at zero). Therefore
- * find a free slot in the 0-282 range.
+ * sized to have 298 entries (starting at zero). Therefore
+ * find a free slot in the 0-298 range.
*/
#define _syscall0(type,name) \
#define __ARCH_WANT_SYS_OLDUMOUNT
#define __ARCH_WANT_SYS_SIGPENDING
#define __ARCH_WANT_SYS_SIGPROCMASK
+#define __ARCH_WANT_SYS_RT_SIGSUSPEND
+#define __ARCH_WANT_COMPAT_SYS_RT_SIGSUSPEND
#endif
/*
*/
#define xlate_dev_kmem_ptr(p) p
+static inline void writeb(unsigned char b, volatile void __iomem *addr)
+{
+ *(volatile unsigned char __force *) addr = b;
+}
+static inline void writew(unsigned short b, volatile void __iomem *addr)
+{
+ *(volatile unsigned short __force *) addr = b;
+}
+static inline void writel(unsigned int b, volatile void __iomem *addr)
+{
+ *(volatile unsigned int __force *) addr = b;
+}
+#define __raw_writeb writeb
+#define __raw_writew writew
+#define __raw_writel writel
+
#endif
#define TIF_RESTART_BLOCK 4
#define TIF_MEMDIE 5
#define TIF_SYSCALL_AUDIT 6
+#define TIF_RESTORE_SIGMASK 7
#define _TIF_SYSCALL_TRACE (1 << TIF_SYSCALL_TRACE)
#define _TIF_SIGPENDING (1 << TIF_SIGPENDING)
#define _TIF_POLLING_NRFLAG (1 << TIF_POLLING_NRFLAG)
#define _TIF_MEMDIE (1 << TIF_MEMDIE)
#define _TIF_SYSCALL_AUDIT (1 << TIF_SYSCALL_AUDIT)
+#define _TIF_RESTORE_SIGMASK (1 << TIF_RESTORE_SIGMASK)
#endif
-
-/*
- * Overrides for Emacs so that we follow Linus's tabbing style.
- * Emacs will notice this stuff at the end of the file and automatically
- * adjust the settings for this buffer only. This must remain at the end
- * of the file.
- * ---------------------------------------------------------------------------
- * Local variables:
- * c-file-style: "linux"
- * End:
- */
#define __ARCH_WANT_SYS_SIGPENDING
#define __ARCH_WANT_SYS_SIGPROCMASK
#define __ARCH_WANT_SYS_RT_SIGACTION
+#define __ARCH_WANT_SYS_RT_SIGSUSPEND
#endif
#ifdef __KERNEL_SYSCALLS__
--- /dev/null
+#ifndef ASM_EDAC_H
+#define ASM_EDAC_H
+
+/* ECC atomic, DMA, SMP and interrupt safe scrub function */
+
+static __inline__ void atomic_scrub(void *va, u32 size)
+{
+ unsigned int *virt_addr = va;
+ u32 i;
+
+ for (i = 0; i < size / 4; i++, virt_addr++)
+ /* Very carefully read and write to memory atomically
+ * so we are interrupt, DMA and SMP safe.
+ */
+ __asm__ __volatile__("lock; addl $0, %0"::"m"(*virt_addr));
+}
+
+#endif
struct linux_binprm;
extern int ia32_setup_arg_pages(struct linux_binprm *bprm,
unsigned long stack_top, int exec_stack);
+struct mm_struct;
+extern void ia32_pick_mmap_layout(struct mm_struct *mm);
#endif
#define __NR_ia32_inotify_add_watch 292
#define __NR_ia32_inotify_rm_watch 293
#define __NR_ia32_migrate_pages 294
+#define __NR_ia32_opanat 295
+#define __NR_ia32_mkdirat 296
+#define __NR_ia32_mknodat 297
+#define __NR_ia32_fchownat 298
+#define __NR_ia32_futimesat 299
+#define __NR_ia32_newfstatat 300
+#define __NR_ia32_unlinkat 301
+#define __NR_ia32_renameat 302
+#define __NR_ia32_linkat 303
+#define __NR_ia32_symlinkat 304
+#define __NR_ia32_readlinkat 305
+#define __NR_ia32_fchmodat 306
+#define __NR_ia32_faccessat 307
-#define IA32_NR_syscalls 295 /* must be > than biggest syscall! */
+#define IA32_NR_syscalls 308 /* must be > than biggest syscall! */
#endif /* _ASM_X86_64_IA32_UNISTD_H_ */
/* Boot loader type from the setup header */
extern int bootloader_type;
+#define HAVE_ARCH_PICK_MMAP_LAYOUT 1
+
#endif /* __ASM_X86_64_PROCESSOR_H */
#define local_irq_disable() __asm__ __volatile__("cli": : :"memory")
#define local_irq_enable() __asm__ __volatile__("sti": : :"memory")
-/* used in the idle loop; sti takes one instruction cycle to complete */
-#define safe_halt() __asm__ __volatile__("sti; hlt": : :"memory")
-/* used when interrupts are already enabled or to shutdown the processor */
-#define halt() __asm__ __volatile__("hlt": : :"memory")
-
#define irqs_disabled() \
({ \
unsigned long flags; \
#define local_irq_save(x) do { warn_if_not_ulong(x); __asm__ __volatile__("# local_irq_save \n\t pushfq ; popq %0 ; cli":"=g" (x): /* no input */ :"memory"); } while (0)
#endif
+/* used in the idle loop; sti takes one instruction cycle to complete */
+#define safe_halt() __asm__ __volatile__("sti; hlt": : :"memory")
+/* used when interrupts are already enabled or to shutdown the processor */
+#define halt() __asm__ __volatile__("hlt": : :"memory")
+
void cpu_idle_wait(void);
extern unsigned long arch_align_stack(unsigned long sp);
__SYSCALL(__NR_inotify_rm_watch, sys_inotify_rm_watch)
#define __NR_migrate_pages 256
__SYSCALL(__NR_migrate_pages, sys_migrate_pages)
+#define __NR_openat 257
+__SYSCALL(__NR_openat, sys_openat)
+#define __NR_mkdirat 258
+__SYSCALL(__NR_mkdirat, sys_mkdirat)
+#define __NR_mknodat 259
+__SYSCALL(__NR_mknodat, sys_mknodat)
+#define __NR_fchownat 260
+__SYSCALL(__NR_fchownat, sys_fchownat)
+#define __NR_futimesat 261
+__SYSCALL(__NR_futimesat, sys_futimesat)
+#define __NR_newfstatat 262
+__SYSCALL(__NR_newfstatat, sys_newfstatat)
+#define __NR_unlinkat 263
+__SYSCALL(__NR_unlinkat, sys_unlinkat)
+#define __NR_renameat 264
+__SYSCALL(__NR_renameat, sys_renameat)
+#define __NR_linkat 265
+__SYSCALL(__NR_linkat, sys_linkat)
+#define __NR_symlinkat 266
+__SYSCALL(__NR_symlinkat, sys_symlinkat)
+#define __NR_readlinkat 267
+__SYSCALL(__NR_readlinkat, sys_readlinkat)
+#define __NR_fchmodat 268
+__SYSCALL(__NR_fchmodat, sys_fchmodat)
+#define __NR_faccessat 269
+__SYSCALL(__NR_faccessat, sys_faccessat)
+
+#define __NR_syscall_max __NR_faccessat
-#define __NR_syscall_max __NR_migrate_pages
#ifndef __NO_STUBS
/* user-visible error numbers are in the range -1 - -4095 */
unsigned int nr_congestion_off;
unsigned int nr_batching;
- unsigned short max_sectors;
- unsigned short max_hw_sectors;
+ unsigned int max_sectors;
+ unsigned int max_hw_sectors;
unsigned short max_phys_segments;
unsigned short max_hw_segments;
unsigned short hardsect_size;
extern void blk_cleanup_queue(request_queue_t *);
extern void blk_queue_make_request(request_queue_t *, make_request_fn *);
extern void blk_queue_bounce_limit(request_queue_t *, u64);
-extern void blk_queue_max_sectors(request_queue_t *, unsigned short);
+extern void blk_queue_max_sectors(request_queue_t *, unsigned int);
extern void blk_queue_max_phys_segments(request_queue_t *, unsigned short);
extern void blk_queue_max_hw_segments(request_queue_t *, unsigned short);
extern void blk_queue_max_segment_size(request_queue_t *, unsigned int);
#ifndef _LINUX_CPUFREQ_H
#define _LINUX_CPUFREQ_H
+#include <linux/mutex.h>
#include <linux/config.h>
#include <linux/notifier.h>
#include <linux/threads.h>
unsigned int policy; /* see above */
struct cpufreq_governor *governor; /* see below */
- struct semaphore lock; /* CPU ->setpolicy or ->target may
+ struct mutex lock; /* CPU ->setpolicy or ->target may
only be called once a time */
struct work_struct update; /* if update_policy() needs to be
#define DN_ATTRIB 0x00000020 /* File changed attibutes */
#define DN_MULTISHOT 0x80000000 /* Don't remove notifier */
+#define AT_FDCWD -100 /* Special value used to indicate
+ openat should use the current
+ working directory. */
+#define AT_SYMLINK_NOFOLLOW 0x100 /* Do not follow symbolic links. */
+#define AT_REMOVEDIR 0x200 /* Remove directory instead of
+ unlinking file. */
+
#ifdef __KERNEL__
#ifndef force_o_largefile
extern int vfs_statfs(struct super_block *, struct kstatfs *);
+/* /sys/fs */
+extern struct subsystem fs_subsys;
+
#define FLOCK_VERIFY_READ 1
#define FLOCK_VERIFY_WRITE 2
extern int do_truncate(struct dentry *, loff_t start, unsigned int time_attrs,
struct file *filp);
-extern long do_sys_open(const char __user *filename, int flags, int mode);
+extern long do_sys_open(int fdf, const char __user *filename, int flags,
+ int mode);
extern struct file *filp_open(const char *, int, int);
extern struct file * dentry_open(struct dentry *, struct vfsmount *, int);
extern int filp_close(struct file *, fl_owner_t id);
}
extern int do_pipe(int *);
-extern int open_namei(const char *, int, int, struct nameidata *);
+extern int open_namei(int dfd, const char *, int, int, struct nameidata *);
extern int may_open(struct nameidata *, int, int);
extern int kernel_read(struct file *, unsigned long, char *, unsigned long);
extern int vfs_stat(char __user *, struct kstat *);
extern int vfs_lstat(char __user *, struct kstat *);
+extern int vfs_stat_fd(int dfd, char __user *, struct kstat *);
+extern int vfs_lstat_fd(int dfd, char __user *, struct kstat *);
extern int vfs_fstat(unsigned int, struct kstat *);
extern int vfs_ioctl(struct file *, unsigned int, unsigned int, unsigned long);
#define I2C_DRIVERID_AKITAIOEXP 74 /* IO Expander on Sharp SL-C1000 */
#define I2C_DRIVERID_INFRARED 75 /* I2C InfraRed on Video boards */
#define I2C_DRIVERID_TVP5150 76 /* TVP5150 video decoder */
+#define I2C_DRIVERID_WM8739 77 /* wm8739 audio processor */
+#define I2C_DRIVERID_UPD64083 78 /* upd64083 video processor */
+#define I2C_DRIVERID_UPD64031A 79 /* upd64031a video processor */
+#define I2C_DRIVERID_SAA717X 80 /* saa717x video encoder */
#define I2C_DRIVERID_I2CDEV 900
#define I2C_DRIVERID_ARP 902 /* SMBus ARP Client */
* over Ethernet
*/
#define ETH_P_AOE 0x88A2 /* ATA over Ethernet */
+#define ETH_P_TIPC 0x88CA /* TIPC */
/*
* Non DIX types. Won't clash for 1500 types.
#define __cpuexitdata __exitdata
#endif
+#ifdef CONFIG_MEMORY_HOTPLUG
+#define __meminit
+#define __meminitdata
+#define __memexit
+#define __memexitdata
+#else
+#define __meminit __init
+#define __meminitdata __initdata
+#define __memexit __exit
+#define __memexitdata __exitdata
+#endif
+
/* Functions marked as __devexit may be discarded at kernel link time, depending
on config options. Newer versions of binutils detect references from
retained sections to discarded sections and flag an error. Pointers to
ntohs((addr).s6_addr16[6]), \
ntohs((addr).s6_addr16[7])
#define NIP6_FMT "%04x:%04x:%04x:%04x:%04x:%04x:%04x:%04x"
+#define NIP6_SEQFMT "%04x%04x%04x%04x%04x%04x%04x%04x"
#if defined(__LITTLE_ENDIAN)
#define HIPQUAD(addr) \
#define KEXEC_ARCH_PPC64 (21 << 16)
#define KEXEC_ARCH_IA_64 (50 << 16)
#define KEXEC_ARCH_S390 (22 << 16)
+#define KEXEC_ARCH_SH (42 << 16)
#define KEXEC_FLAGS (KEXEC_ON_CRASH) /* List of defined/legal kexec flags */
ATA_FLAG_SUSPENDED = (1 << 12), /* port is suspended */
+ ATA_FLAG_PIO_LBA48 = (1 << 13), /* Host DMA engine is LBA28 only */
+ ATA_FLAG_IRQ_MASK = (1 << 14), /* Mask IRQ in PIO xfers */
+
ATA_QCFLAG_ACTIVE = (1 << 1), /* cmd not yet ack'd to scsi lyer */
ATA_QCFLAG_SG = (1 << 3), /* have s/g table? */
ATA_QCFLAG_SINGLE = (1 << 4), /* no s/g, just a single buffer */
ATA_QCFLAG_DMAMAP = ATA_QCFLAG_SG | ATA_QCFLAG_SINGLE,
/* various lengths of time */
- ATA_TMOUT_EDD = 5 * HZ, /* hueristic */
+ ATA_TMOUT_EDD = 5 * HZ, /* heuristic */
ATA_TMOUT_PIO = 30 * HZ,
- ATA_TMOUT_BOOT = 30 * HZ, /* hueristic */
- ATA_TMOUT_BOOT_QUICK = 7 * HZ, /* hueristic */
+ ATA_TMOUT_BOOT = 30 * HZ, /* heuristic */
+ ATA_TMOUT_BOOT_QUICK = 7 * HZ, /* heuristic */
ATA_TMOUT_CDB = 30 * HZ,
ATA_TMOUT_CDB_QUICK = 5 * HZ,
ATA_TMOUT_INTERNAL = 30 * HZ,
/*
* Timing helpers
*/
+
+extern unsigned int ata_pio_need_iordy(const struct ata_device *);
extern int ata_timing_compute(struct ata_device *, unsigned short,
struct ata_timing *, int, int);
extern void ata_timing_merge(const struct ata_timing *,
extern struct mempolicy default_policy;
extern struct zonelist *huge_zonelist(struct vm_area_struct *vma,
unsigned long addr);
+extern unsigned slab_node(struct mempolicy *policy);
extern int policy_zone;
}
}
-/*
- * Isolate one page from the LRU lists.
- *
- * - zone->lru_lock must be held
- */
-static inline int __isolate_lru_page(struct page *page)
-{
- if (unlikely(!TestClearPageLRU(page)))
- return 0;
-
- if (get_page_testone(page)) {
- /*
- * It is being freed elsewhere
- */
- __put_page(page);
- SetPageLRU(page);
- return -ENOENT;
- }
-
- return 1;
-}
unsigned long pages_scanned; /* since last reclaim */
int all_unreclaimable; /* All pages pinned */
- /*
- * Does the allocator try to reclaim pages from the zone as soon
- * as it fails a watermark_ok() in __alloc_pages?
- */
- int reclaim_pages;
/* A count of how many reclaimers are scanning this zone */
atomic_t reclaim_in_progress;
+ /*
+ * timestamp (in jiffies) of the last zone reclaim that did not
+ * result in freeing of pages. This is used to avoid repeated scans
+ * if all memory in the zone is in use.
+ */
+ unsigned long last_unsuccessful_zone_reclaim;
+
/*
* prev_priority holds the scanning priority for this zone. It is
* defined as the scanning priority at which we achieved our reclaim
#define LOOKUP_ACCESS (0x0400)
extern int FASTCALL(__user_walk(const char __user *, unsigned, struct nameidata *));
+extern int FASTCALL(__user_walk_fd(int dfd, const char __user *, unsigned, struct nameidata *));
#define user_path_walk(name,nd) \
- __user_walk(name, LOOKUP_FOLLOW, nd)
+ __user_walk_fd(AT_FDCWD, name, LOOKUP_FOLLOW, nd)
#define user_path_walk_link(name,nd) \
- __user_walk(name, 0, nd)
+ __user_walk_fd(AT_FDCWD, name, 0, nd)
extern int FASTCALL(path_lookup(const char *, unsigned, struct nameidata *));
extern int FASTCALL(path_walk(const char *, struct nameidata *));
extern int FASTCALL(link_path_walk(const char *, struct nameidata *));
extern void path_release_on_umount(struct nameidata *);
extern int __user_path_lookup_open(const char __user *, unsigned lookup_flags, struct nameidata *nd, int open_flags);
-extern int path_lookup_open(const char *, unsigned lookup_flags, struct nameidata *, int open_flags);
+extern int path_lookup_open(int dfd, const char *name, unsigned lookup_flags, struct nameidata *, int open_flags);
extern struct file *lookup_instantiate_filp(struct nameidata *nd, struct dentry *dentry,
int (*open)(struct inode *, struct file *));
extern struct file *nameidata_to_filp(struct nameidata *nd, int flags);
/* For standard target */
#define XT_RETURN (-NF_REPEAT - 1)
-#define XT_ALIGN(s) (((s) + (__alignof__(void *)-1)) & ~(__alignof__(void *)-1))
+/* this is a dummy structure to find out the alignment requirement for a struct
+ * containing all the fundamental data types that are used in ipt_entry,
+ * ip6t_entry and arpt_entry. This sucks, and it is a hack. It will be my
+ * personal pleasure to remove it -HW
+ */
+struct _xt_align
+{
+ u_int8_t u8;
+ u_int16_t u16;
+ u_int32_t u32;
+ u_int64_t u64;
+};
+
+#define XT_ALIGN(s) (((s) + (__alignof__(struct _xt_align)-1)) \
+ & ~(__alignof__(struct _xt_align)-1))
/* Standard return verdict, or do jump. */
#define XT_STANDARD_TARGET ""
#define IP6T_AH_INV_LEN 0x02 /* Invert the sense of length. */
#define IP6T_AH_INV_MASK 0x03 /* All possible flags. */
-#define MASK_HOPOPTS 128
-#define MASK_DSTOPTS 64
-#define MASK_ROUTING 32
-#define MASK_FRAGMENT 16
-#define MASK_AH 8
-#define MASK_ESP 4
-#define MASK_NONE 2
-#define MASK_PROTO 1
-
#endif /*_IP6T_AH_H*/
u_int8_t invflags; /* Inverse flags */
};
-#define MASK_HOPOPTS 128
-#define MASK_DSTOPTS 64
-#define MASK_ROUTING 32
-#define MASK_FRAGMENT 16
-#define MASK_AH 8
-#define MASK_ESP 4
-#define MASK_NONE 2
-#define MASK_PROTO 1
-
/* Values for "invflags" field in struct ip6t_esp. */
#define IP6T_ESP_INV_SPI 0x01 /* Invert the sense of spi. */
#define IP6T_ESP_INV_MASK 0x01 /* All possible flags. */
#define IP6T_FRAG_INV_LEN 0x02 /* Invert the sense of length. */
#define IP6T_FRAG_INV_MASK 0x03 /* All possible flags. */
-#define MASK_HOPOPTS 128
-#define MASK_DSTOPTS 64
-#define MASK_ROUTING 32
-#define MASK_FRAGMENT 16
-#define MASK_AH 8
-#define MASK_ESP 4
-#define MASK_NONE 2
-#define MASK_PROTO 1
-
#endif /*_IP6T_FRAG_H*/
#define IP6T_OPTS_INV_LEN 0x01 /* Invert the sense of length. */
#define IP6T_OPTS_INV_MASK 0x01 /* All possible flags. */
-#define MASK_HOPOPTS 128
-#define MASK_DSTOPTS 64
-#define MASK_ROUTING 32
-#define MASK_FRAGMENT 16
-#define MASK_AH 8
-#define MASK_ESP 4
-#define MASK_NONE 2
-#define MASK_PROTO 1
-
#endif /*_IP6T_OPTS_H*/
#define IP6T_RT_INV_LEN 0x04 /* Invert the sense of length. */
#define IP6T_RT_INV_MASK 0x07 /* All possible flags. */
-#define MASK_HOPOPTS 128
-#define MASK_DSTOPTS 64
-#define MASK_ROUTING 32
-#define MASK_FRAGMENT 16
-#define MASK_AH 8
-#define MASK_ESP 4
-#define MASK_NONE 2
-#define MASK_PROTO 1
-
#endif /*_IP6T_RT_H*/
int nfsd_notify_change(struct inode *, struct iattr *);
int nfsd_permission(struct svc_export *, struct dentry *, int);
-void nfsd_sync_dir(struct dentry *dp);
+int nfsd_sync_dir(struct dentry *dp);
#if defined(CONFIG_NFSD_V2_ACL) || defined(CONFIG_NFSD_V3_ACL)
#ifdef CONFIG_NFSD_V2_ACL
} ok;
struct nfsd4_lock_denied denied;
} u;
-
- struct nfs4_stateowner *lk_stateowner;
+ /* The lk_replay_owner is the open owner in the open_to_lock_owner
+ * case and the lock owner otherwise: */
+ struct nfs4_stateowner *lk_replay_owner;
};
#define lk_new_open_seqid v.new.open_seqid
#define lk_new_open_stateid v.new.open_stateid
#define PCI_VENDOR_ID_DCI 0x6666
#define PCI_DEVICE_ID_DCI_PCCOM4 0x0001
#define PCI_DEVICE_ID_DCI_PCCOM8 0x0002
+#define PCI_DEVICE_ID_DCI_PCCOM2 0x0004
#define PCI_VENDOR_ID_INTEL 0x8086
#define PCI_DEVICE_ID_INTEL_EESSC 0x0008
memset(fdset, 0, FDS_BYTES(nr));
}
-extern int do_select(int n, fd_set_bits *fds, long *timeout);
+#define MAX_INT64_SECONDS (((s64)(~((u64)0)>>1)/HZ)-1)
+
+extern int do_select(int n, fd_set_bits *fds, s64 *timeout);
+extern int do_sys_poll(struct pollfd __user * ufds, unsigned int nfds,
+ s64 *timeout);
#endif /* KERNEL */
struct sighand_struct *sighand;
sigset_t blocked, real_blocked;
+ sigset_t saved_sigmask; /* To be restored with TIF_RESTORE_SIGMASK */
struct sigpending pending;
unsigned long sas_ss_sp;
unsigned char regshift; /* register shift */
unsigned char iotype; /* UPIO_* */
unsigned char hub6;
- unsigned int flags; /* UPF_* flags */
+ upf_t flags; /* UPF_* flags */
};
/*
__u32 buf_overrun;
};
+typedef unsigned int __bitwise__ upf_t;
+
struct uart_port {
spinlock_t lock; /* port lock */
unsigned int iobase; /* in/out[bwl] */
unsigned long sysrq; /* sysrq timeout */
#endif
- unsigned int flags;
-
-#define UPF_FOURPORT (1 << 1)
-#define UPF_SAK (1 << 2)
-#define UPF_SPD_MASK (0x1030)
-#define UPF_SPD_HI (0x0010)
-#define UPF_SPD_VHI (0x0020)
-#define UPF_SPD_CUST (0x0030)
-#define UPF_SPD_SHI (0x1000)
-#define UPF_SPD_WARP (0x1010)
-#define UPF_SKIP_TEST (1 << 6)
-#define UPF_AUTO_IRQ (1 << 7)
-#define UPF_HARDPPS_CD (1 << 11)
-#define UPF_LOW_LATENCY (1 << 13)
-#define UPF_BUGGY_UART (1 << 14)
-#define UPF_AUTOPROBE (1 << 15)
-#define UPF_MAGIC_MULTIPLIER (1 << 16)
-#define UPF_BOOT_ONLYMCA (1 << 22)
-#define UPF_CONS_FLOW (1 << 23)
-#define UPF_SHARE_IRQ (1 << 24)
-#define UPF_BOOT_AUTOCONF (1 << 28)
-#define UPF_IOREMAP (1 << 31)
-
-#define UPF_CHANGE_MASK (0x17fff)
-#define UPF_USR_MASK (UPF_SPD_MASK|UPF_LOW_LATENCY)
+ upf_t flags;
+
+#define UPF_FOURPORT ((__force upf_t) (1 << 1))
+#define UPF_SAK ((__force upf_t) (1 << 2))
+#define UPF_SPD_MASK ((__force upf_t) (0x1030))
+#define UPF_SPD_HI ((__force upf_t) (0x0010))
+#define UPF_SPD_VHI ((__force upf_t) (0x0020))
+#define UPF_SPD_CUST ((__force upf_t) (0x0030))
+#define UPF_SPD_SHI ((__force upf_t) (0x1000))
+#define UPF_SPD_WARP ((__force upf_t) (0x1010))
+#define UPF_SKIP_TEST ((__force upf_t) (1 << 6))
+#define UPF_AUTO_IRQ ((__force upf_t) (1 << 7))
+#define UPF_HARDPPS_CD ((__force upf_t) (1 << 11))
+#define UPF_LOW_LATENCY ((__force upf_t) (1 << 13))
+#define UPF_BUGGY_UART ((__force upf_t) (1 << 14))
+#define UPF_MAGIC_MULTIPLIER ((__force upf_t) (1 << 16))
+#define UPF_CONS_FLOW ((__force upf_t) (1 << 23))
+#define UPF_SHARE_IRQ ((__force upf_t) (1 << 24))
+#define UPF_BOOT_AUTOCONF ((__force upf_t) (1 << 28))
+#define UPF_IOREMAP ((__force upf_t) (1 << 31))
+
+#define UPF_CHANGE_MASK ((__force upf_t) (0x17fff))
+#define UPF_USR_MASK ((__force upf_t) (UPF_SPD_MASK|UPF_LOW_LATENCY))
unsigned int mctrl; /* current modem ctrl settings */
unsigned int timeout; /* character-based timeout */
unsigned int type; /* port type */
- struct uart_ops *ops;
+ const struct uart_ops *ops;
unsigned int custom_divisor;
unsigned int line; /* port index */
unsigned long mapbase; /* for ioremap */
};
#define UART_XMIT_SIZE PAGE_SIZE
+
+typedef unsigned int __bitwise__ uif_t;
+
/*
* This is the state information which is only valid when the port
* is open; it may be freed by the core driver once the device has
struct uart_info {
struct tty_struct *tty;
struct circ_buf xmit;
- unsigned int flags;
+ uif_t flags;
/*
- * These are the flags that specific to info->flags, and reflect our
- * internal state. They can not be accessed via port->flags. Low
- * level drivers must not change these, but may query them instead.
+ * Definitions for info->flags. These are _private_ to serial_core, and
+ * are specific to this structure. They may be queried by low level drivers.
*/
-#define UIF_CHECK_CD (1 << 25)
-#define UIF_CTS_FLOW (1 << 26)
-#define UIF_NORMAL_ACTIVE (1 << 29)
-#define UIF_INITIALIZED (1 << 31)
+#define UIF_CHECK_CD ((__force uif_t) (1 << 25))
+#define UIF_CTS_FLOW ((__force uif_t) (1 << 26))
+#define UIF_NORMAL_ACTIVE ((__force uif_t) (1 << 29))
+#define UIF_INITIALIZED ((__force uif_t) (1 << 31))
int blocked_open;
port->sysrq = 0;
}
#endif
- if (info->flags & UPF_SAK)
+ if (port->flags & UPF_SAK)
do_SAK(info->tty);
return 0;
}
* Increase the headroom of an empty &sk_buff by reducing the tail
* room. This is only allowed for an empty buffer.
*/
-static inline void skb_reserve(struct sk_buff *skb, unsigned int len)
+static inline void skb_reserve(struct sk_buff *skb, int len)
{
skb->data += len;
skb->tail += len;
u32 prot; /* protocol (UDP or TCP) */
struct sockaddr_in addr;
struct svc_sock *svsk; /* where reply must go */
+ u32 daddr; /* where reply must come from */
struct cache_deferred_req handle;
int argslen;
u32 args[0];
extern void FASTCALL(activate_page(struct page *));
extern void FASTCALL(mark_page_accessed(struct page *));
extern void lru_add_drain(void);
+extern int lru_add_drain_all(void);
extern int rotate_reclaimable_page(struct page *page);
extern void swap_setup(void);
extern int shrink_all_memory(int);
extern int vm_swappiness;
+#ifdef CONFIG_NUMA
+extern int zone_reclaim_mode;
+extern int zone_reclaim(struct zone *, gfp_t, unsigned int);
+#else
+#define zone_reclaim_mode 0
+static inline int zone_reclaim(struct zone *z, gfp_t mask, unsigned int order)
+{
+ return 0;
+}
+#endif
+
#ifdef CONFIG_MIGRATION
extern int isolate_lru_page(struct page *p);
extern int putback_lru_pages(struct list_head *l);
asmlinkage long sys_ioprio_set(int which, int who, int ioprio);
asmlinkage long sys_ioprio_get(int which, int who);
asmlinkage long sys_set_mempolicy(int mode, unsigned long __user *nmask,
- unsigned long maxnode);
+ unsigned long maxnode);
asmlinkage long sys_migrate_pages(pid_t pid, unsigned long maxnode,
- const unsigned long __user *from, const unsigned long __user *to);
+ const unsigned long __user *from,
+ const unsigned long __user *to);
+asmlinkage long sys_mbind(unsigned long start, unsigned long len,
+ unsigned long mode,
+ unsigned long __user *nmask,
+ unsigned long maxnode,
+ unsigned flags);
+asmlinkage long sys_get_mempolicy(int __user *policy,
+ unsigned long __user *nmask,
+ unsigned long maxnode,
+ unsigned long addr, unsigned long flags);
+
+asmlinkage long sys_inotify_init(void);
+asmlinkage long sys_inotify_add_watch(int fd, const char __user *path,
+ u32 mask);
+asmlinkage long sys_inotify_rm_watch(int fd, u32 wd);
asmlinkage long sys_spu_run(int fd, __u32 __user *unpc,
__u32 __user *ustatus);
VM_SWAP_TOKEN_TIMEOUT=28, /* default time for token time out */
VM_DROP_PAGECACHE=29, /* int: nuke lots of pagecache */
VM_PERCPU_PAGELIST_FRACTION=30,/* int: fraction of pages in each percpu_pagelist */
+ VM_ZONE_RECLAIM_MODE=31,/* reclaim local zone memory before going off node */
};
extern int do_settimeofday(struct timespec *tv);
extern int do_sys_settimeofday(struct timespec *tv, struct timezone *tz);
#define do_posix_clock_monotonic_gettime(ts) ktime_get_ts(ts)
-extern long do_utimes(char __user *filename, struct timeval *times);
+extern long do_utimes(int dfd, char __user *filename, struct timeval *times);
struct itimerval;
extern int do_setitimer(int which, struct itimerval *value,
struct itimerval *ovalue);
#define TIPC_MAX_LINK_NAME 60 /* format = Z.C.N:interface-Z.C.N:interface */
/*
- * Link priority limits (range from 0 to # priorities - 1)
+ * Link priority limits (min, default, max, media default)
*/
-#define TIPC_NUM_LINK_PRI 32
+#define TIPC_MIN_LINK_PRI 0
+#define TIPC_DEF_LINK_PRI 10
+#define TIPC_MAX_LINK_PRI 31
+#define TIPC_MEDIA_LINK_PRI (TIPC_MAX_LINK_PRI + 1)
/*
* Link tolerance limits (min, default, max), in ms
#define REMOTE_DISTANCE 20
#define node_distance(from,to) ((from) == (to) ? LOCAL_DISTANCE : REMOTE_DISTANCE)
#endif
+#ifndef RECLAIM_DISTANCE
+/*
+ * If the distance between nodes in a system is larger than RECLAIM_DISTANCE
+ * (in whatever arch specific measurement units returned by node_distance())
+ * then switch on zone reclaim on boot.
+ */
+#define RECLAIM_DISTANCE 20
+#endif
#ifndef PENALTY_FOR_NODE_WITH_CPUS
#define PENALTY_FOR_NODE_WITH_CPUS (1)
#endif
--- /dev/null
+/*
+ * descriptions for simple tuners.
+ */
+
+#ifndef __TUNER_TYPES_H__
+#define __TUNER_TYPES_H__
+
+enum param_type {
+ TUNER_PARAM_TYPE_RADIO, \
+ TUNER_PARAM_TYPE_PAL, \
+ TUNER_PARAM_TYPE_SECAM, \
+ TUNER_PARAM_TYPE_NTSC
+};
+
+struct tuner_range {
+ unsigned short limit;
+ unsigned char cb;
+};
+
+struct tuner_params {
+ enum param_type type;
+ /* Many Philips based tuners have a comment like this in their
+ * datasheet:
+ *
+ * For channel selection involving band switching, and to ensure
+ * smooth tuning to the desired channel without causing
+ * unnecessary charge pump action, it is recommended to consider
+ * the difference between wanted channel frequency and the
+ * current channel frequency. Unnecessary charge pump action
+ * will result in very low tuning voltage which may drive the
+ * oscillator to extreme conditions.
+ *
+ * Set cb_first_if_lower_freq to 1, if this check is
+ * required for this tuner.
+ *
+ * I tested this for PAL by first setting the TV frequency to
+ * 203 MHz and then switching to 96.6 MHz FM radio. The result was
+ * static unless the control byte was sent first.
+ */
+ unsigned int cb_first_if_lower_freq:1;
+ unsigned char config; /* to be moved into struct tuner_range for dvb-pll merge */
+
+ unsigned int count;
+ struct tuner_range *ranges;
+};
+
+struct tunertype {
+ char *name;
+ struct tuner_params *params;
+};
+
+extern struct tunertype tuners[];
+extern unsigned const int tuner_count;
+
+#endif
#define _TUNER_H
#include <linux/videodev2.h>
+#include <media/tuner-types.h>
#define ADDR_UNSET (255)
#define TUNER_PHILIPS_TUV1236D 68 /* ATI HDTV Wonder */
#define TUNER_TNF_5335MF 69 /* Sabrent Bt848 */
+#define TUNER_SAMSUNG_TCPN_2121P30A 70 /* Hauppauge PVR-500MCE NTSC */
/* tv card specific */
#define TDA9887_PRESENT (1<<0)
unsigned int mode;
unsigned int mode_mask; /* Combination of allowable modes */
- unsigned int freq; /* keep track of the current settings */
+ unsigned int tv_freq; /* keep track of the current settings */
+ unsigned int radio_freq;
+ u16 last_div;
unsigned int audmode;
v4l2_std_id std;
unsigned int sgIF;
/* function ptrs */
- void (*tv_freq)(struct i2c_client *c, unsigned int freq);
- void (*radio_freq)(struct i2c_client *c, unsigned int freq);
+ void (*set_tv_freq)(struct i2c_client *c, unsigned int freq);
+ void (*set_radio_freq)(struct i2c_client *c, unsigned int freq);
int (*has_signal)(struct i2c_client *c);
int (*is_stereo)(struct i2c_client *c);
void (*standby)(struct i2c_client *c);
/* select from TV,radio,extern,MUTE */
#define AUDC_SET_INPUT _IOW('d',89,int)
+/* msp3400 ioctl: will be removed in the near future */
+struct msp_matrix {
+ int input;
+ int output;
+};
+#define MSP_SET_MATRIX _IOW('m',17,struct msp_matrix)
+
/* tuner ioctls */
/* Sets tuner type and its I2C addr */
#define TUNER_SET_TYPE_ADDR _IOW('d',90,int)
#define IEEE80211_24GHZ_MAX_CHANNEL 14
#define IEEE80211_24GHZ_CHANNELS 14
-#define IEEE80211_52GHZ_MIN_CHANNEL 36
+#define IEEE80211_52GHZ_MIN_CHANNEL 34
#define IEEE80211_52GHZ_MAX_CHANNEL 165
-#define IEEE80211_52GHZ_CHANNELS 32
+#define IEEE80211_52GHZ_CHANNELS 131
enum {
IEEE80211_CH_PASSIVE_ONLY = (1 << 0),
#include <linux/types.h>
#include <linux/list.h>
+#include <net/ieee80211.h>
#include <asm/atomic.h>
enum {
__u16 num_private_args;
/* Array of handlers for standard ioctls
- * We will call dev->wireless_handlers->standard[ioctl - SIOCSIWNAME]
+ * We will call dev->wireless_handlers->standard[ioctl - SIOCSIWCOMMIT]
*/
const iw_handler * standard;
void sctp_icmp_proto_unreachable(struct sock *sk,
struct sctp_association *asoc,
struct sctp_transport *t);
+void sctp_backlog_migrate(struct sctp_association *assoc,
+ struct sock *oldsk, struct sock *newsk);
/*
* Section: Macros, externs, and inlines
* RTO.Alpha - 1/8 (3 when converted to right shifts.)
* RTO.Beta - 1/4 (2 when converted to right shifts.)
*/
- __u32 rto_initial;
- __u32 rto_min;
- __u32 rto_max;
+ unsigned long rto_initial;
+ unsigned long rto_min;
+ unsigned long rto_max;
/* Note: rto_alpha and rto_beta are really defined as inverse
* powers of two to facilitate integer operations.
/* Max.Burst - 4 */
int max_burst;
- /* Valid.Cookie.Life - 60 seconds */
- int valid_cookie_life;
-
/* Whether Cookie Preservative is enabled(1) or not(0) */
int cookie_preserve_enable;
+ /* Valid.Cookie.Life - 60 seconds */
+ unsigned long valid_cookie_life;
+
+ /* Delayed SACK timeout 200ms default*/
+ unsigned long sack_timeout;
+
+ /* HB.interval - 30 seconds */
+ unsigned long hb_interval;
+
/* Association.Max.Retrans - 10 attempts
* Path.Max.Retrans - 5 attempts (per destination address)
* Max.Init.Retransmits - 8 attempts
*/
int rcvbuf_policy;
- /* Delayed SACK timeout 200ms default*/
- int sack_timeout;
-
- /* HB.interval - 30 seconds */
- int hb_interval;
-
/* The following variables are implementation specific. */
/* Default initialization values to be applied to new associations. */
/* The format of our cookie that we send to our peer. */
struct sctp_signed_cookie {
__u8 signature[SCTP_SECRET_SIZE];
+ __u32 __pad; /* force sctp_cookie alignment to 64 bits */
struct sctp_cookie c;
-};
+} __attribute__((packed));
/* This is another convenience type to allocate memory for address
* params for the maximum size and pass such structures around
__u32 rtt; /* This is the most recent RTT. */
/* RTO : The current retransmission timeout value. */
- __u32 rto;
+ unsigned long rto;
/* RTTVAR : The current RTT variation. */
__u32 rttvar;
/* Heartbeat interval: The endpoint sends out a Heartbeat chunk to
* the destination address every heartbeat interval.
*/
- __u32 hbinterval;
-
- /* This is the max_retrans value for the transport and will
- * be initialized from the assocs value. This can be changed
- * using SCTP_SET_PEER_ADDR_PARAMS socket option.
- */
- __u16 pathmaxrxt;
-
- /* PMTU : The current known path MTU. */
- __u32 pathmtu;
+ unsigned long hbinterval;
/* SACK delay timeout */
- __u32 sackdelay;
-
- /* Flags controling Heartbeat, SACK delay, and Path MTU Discovery. */
- __u32 param_flags;
+ unsigned long sackdelay;
/* When was the last time (in jiffies) that we heard from this
* transport? We use this to pick new active and retran paths.
*/
unsigned long last_time_ecne_reduced;
+ /* This is the max_retrans value for the transport and will
+ * be initialized from the assocs value. This can be changed
+ * using SCTP_SET_PEER_ADDR_PARAMS socket option.
+ */
+ __u16 pathmaxrxt;
+
+ /* PMTU : The current known path MTU. */
+ __u32 pathmtu;
+
+ /* Flags controling Heartbeat, SACK delay, and Path MTU Discovery. */
+ __u32 param_flags;
+
/* The number of times INIT has been sent on this transport. */
int init_sent_count;
int last_key;
int key_changed_at;
+ /* digest: This is a digest of the sctp cookie. This field is
+ * only used on the receive path when we try to validate
+ * that the cookie has not been tampered with. We put
+ * this here so we pre-allocate this once and can re-use
+ * on every receive.
+ */
+ __u8 digest[SCTP_SIGNATURE_SIZE];
+
/* sendbuf acct. policy. */
__u32 sndbuf_policy;
* These values will be initialized by system defaults, but can
* be modified via the SCTP_RTOINFO socket option.
*/
- __u32 rto_initial;
- __u32 rto_max;
- __u32 rto_min;
+ unsigned long rto_initial;
+ unsigned long rto_max;
+ unsigned long rto_min;
/* Maximum number of new data packets that can be sent in a burst. */
int max_burst;
__u16 init_retries;
/* The largest timeout or RTO value to use in attempting an INIT */
- __u16 max_init_timeo;
+ unsigned long max_init_timeo;
/* Heartbeat interval: The endpoint sends out a Heartbeat chunk to
* the destination address every heartbeat interval. This value
* will be inherited by all new transports.
*/
- __u32 hbinterval;
+ unsigned long hbinterval;
/* This is the max_retrans value for new transports in the
* association.
*/
__u32 pathmtu;
- /* SACK delay timeout */
- __u32 sackdelay;
-
/* Flags controling Heartbeat, SACK delay, and Path MTU Discovery. */
__u32 param_flags;
- int timeouts[SCTP_NUM_TIMEOUT_TYPES];
+ /* SACK delay timeout */
+ unsigned long sackdelay;
+
+
+ unsigned long timeouts[SCTP_NUM_TIMEOUT_TYPES];
struct timer_list timers[SCTP_NUM_TIMEOUT_TYPES];
/* Transport to which SHUTDOWN chunk was last sent. */
/* How many duplicated TSNs have we seen? */
int numduptsns;
- /* Number of seconds of idle time before an association is closed. */
+ /* Number of seconds of idle time before an association is closed.
+ * In the association context, this is really used as a boolean
+ * since the real timeout is stored in the timeouts array
+ */
__u32 autoclose;
/* These are to support
int data_direction, void *buffer, unsigned bufflen,
struct scsi_sense_hdr *, int timeout, int retries);
extern int scsi_execute_async(struct scsi_device *sdev,
- const unsigned char *cmd, int data_direction,
+ const unsigned char *cmd, int cmd_len, int data_direction,
void *buffer, unsigned bufflen, int use_sg,
int timeout, int retries, void *privdata,
void (*done)(void *, char *, int, int),
/*
* ordered write support
*/
- unsigned ordered_flush:1;
unsigned ordered_tag:1;
/*
#include <linux/config.h>
#include <linux/transport_class.h>
+#include <linux/mutex.h>
struct scsi_transport_template;
struct scsi_target;
default !SLAB
bool
+config OBSOLETE_INTERMODULE
+ tristate
+
menu "Loadable module support"
config MODULES
exit.o itimer.o time.o softirq.o resource.o \
sysctl.o capability.o ptrace.o timer.o user.o \
signal.o sys.o kmod.o workqueue.o pid.o \
- rcupdate.o intermodule.o extable.o params.o posix-timers.o \
+ rcupdate.o extable.o params.o posix-timers.o \
kthread.o wait.o kfifo.o sys_ni.o posix-cpu-timers.o mutex.o \
hrtimer.o
obj-$(CONFIG_DEBUG_SPINLOCK) += spinlock.o
obj-$(CONFIG_UID16) += uid16.o
obj-$(CONFIG_MODULES) += module.o
+obj-$(CONFIG_OBSOLETE_INTERMODULE) += intermodule.o
obj-$(CONFIG_KALLSYMS) += kallsyms.o
obj-$(CONFIG_PM) += power/
obj-$(CONFIG_BSD_PROCESS_ACCT) += acct.o
*/
#include <linux/init.h>
-#include <asm/atomic.h>
#include <asm/types.h>
+#include <asm/atomic.h>
#include <linux/mm.h>
#include <linux/module.h>
#include <linux/err.h>
*/
#include <linux/init.h>
-#include <asm/atomic.h>
#include <asm/types.h>
+#include <asm/atomic.h>
#include <linux/mm.h>
#include <linux/module.h>
#include <linux/mount.h>
}
#endif /* __ARCH_WANT_COMPAT_SYS_TIME */
+
+#ifdef __ARCH_WANT_COMPAT_SYS_RT_SIGSUSPEND
+asmlinkage long compat_sys_rt_sigsuspend(compat_sigset_t __user *unewset, compat_size_t sigsetsize)
+{
+ sigset_t newset;
+ compat_sigset_t newset32;
+
+ /* XXX: Don't preclude handling different sized sigset_t's. */
+ if (sigsetsize != sizeof(sigset_t))
+ return -EINVAL;
+
+ if (copy_from_user(&newset32, unewset, sizeof(compat_sigset_t)))
+ return -EFAULT;
+ sigset_from_compat(&newset, &newset32);
+ sigdelsetmask(&newset, sigmask(SIGKILL)|sigmask(SIGSTOP));
+
+ spin_lock_irq(¤t->sighand->siglock);
+ current->saved_sigmask = current->blocked;
+ current->blocked = newset;
+ recalc_sigpending();
+ spin_unlock_irq(¤t->sighand->siglock);
+
+ current->state = TASK_INTERRUPTIBLE;
+ schedule();
+ set_thread_flag(TIF_RESTORE_SIGMASK);
+ return -ERESTARTNOHAND;
+}
+#endif /* __ARCH_WANT_COMPAT_SYS_RT_SIGSUSPEND */
static long __sched
nanosleep_restart(struct restart_block *restart, clockid_t clockid)
{
- struct timespec __user *rmtp, tu;
+ struct timespec __user *rmtp;
+ struct timespec tu;
void *rfn_save = restart->fn;
struct hrtimer timer;
ktime_t rem;
{
struct list_head *p;
- spin_lock(&rcu_torture_lock);
+ spin_lock_bh(&rcu_torture_lock);
if (list_empty(&rcu_torture_freelist)) {
atomic_inc(&n_rcu_torture_alloc_fail);
- spin_unlock(&rcu_torture_lock);
+ spin_unlock_bh(&rcu_torture_lock);
return NULL;
}
atomic_inc(&n_rcu_torture_alloc);
p = rcu_torture_freelist.next;
list_del_init(p);
- spin_unlock(&rcu_torture_lock);
+ spin_unlock_bh(&rcu_torture_lock);
return container_of(p, struct rcu_torture, rtort_free);
}
rcu_torture_free(struct rcu_torture *p)
{
atomic_inc(&n_rcu_torture_free);
- spin_lock(&rcu_torture_lock);
+ spin_lock_bh(&rcu_torture_lock);
list_add_tail(&p->rtort_free, &rcu_torture_freelist);
- spin_unlock(&rcu_torture_lock);
+ spin_unlock_bh(&rcu_torture_lock);
}
static void
asmlinkage long sys_sched_setscheduler(pid_t pid, int policy,
struct sched_param __user *param)
{
+ /* negative values for policy are not valid */
+ if (policy < 0)
+ return -EINVAL;
+
return do_sched_setscheduler(pid, policy, param);
}
#define SEARCH_SCOPE 2
#define MIN_CACHE_SIZE (64*1024U)
#define DEFAULT_CACHE_SIZE (5*1024*1024U)
-#define ITERATIONS 2
+#define ITERATIONS 1
#define SIZE_THRESH 130
#define COST_THRESH 130
break;
}
/*
- * Increase the cachesize in 5% steps:
+ * Increase the cachesize in 10% steps:
*/
- size = size * 20 / 19;
+ size = size * 10 / 9;
}
if (migration_debug)
#endif
+#ifdef __ARCH_WANT_SYS_RT_SIGSUSPEND
+asmlinkage long sys_rt_sigsuspend(sigset_t __user *unewset, size_t sigsetsize)
+{
+ sigset_t newset;
+
+ /* XXX: Don't preclude handling different sized sigset_t's. */
+ if (sigsetsize != sizeof(sigset_t))
+ return -EINVAL;
+
+ if (copy_from_user(&newset, unewset, sizeof(newset)))
+ return -EFAULT;
+ sigdelsetmask(&newset, sigmask(SIGKILL)|sigmask(SIGSTOP));
+
+ spin_lock_irq(¤t->sighand->siglock);
+ current->saved_sigmask = current->blocked;
+ current->blocked = newset;
+ recalc_sigpending();
+ spin_unlock_irq(¤t->sighand->siglock);
+
+ current->state = TASK_INTERRUPTIBLE;
+ schedule();
+ set_thread_flag(TIF_RESTORE_SIGMASK);
+ return -ERESTARTNOHAND;
+}
+#endif /* __ARCH_WANT_SYS_RT_SIGSUSPEND */
+
void __init signals_init(void)
{
sigqueue_cachep =
.proc_handler = &proc_dointvec_jiffies,
.strategy = &sysctl_jiffies,
},
+#endif
+#ifdef CONFIG_NUMA
+ {
+ .ctl_name = VM_ZONE_RECLAIM_MODE,
+ .procname = "zone_reclaim_mode",
+ .data = &zone_reclaim_mode,
+ .maxlen = sizeof(zone_reclaim_mode),
+ .mode = 0644,
+ .proc_handler = &proc_dointvec,
+ .strategy = &zero,
+ },
#endif
{ .ctl_name = 0 }
};
static int firsttime = 1;
int error = 0;
- if (!timespec_valid(tv))
+ if (tv && !timespec_valid(tv))
return -EINVAL;
error = security_settime(tv, tz);
#include <linux/slab.h>
#include <linux/bitops.h>
#include <linux/key.h>
+#include <linux/interrupt.h>
/*
* UID task count cache, to get fast user lookup in "alloc_uid"
static kmem_cache_t *uid_cachep;
static struct list_head uidhash_table[UIDHASH_SZ];
+
+/*
+ * The uidhash_lock is mostly taken from process context, but it is
+ * occasionally also taken from softirq/tasklet context, when
+ * task-structs get RCU-freed. Hence all locking must be softirq-safe.
+ */
static DEFINE_SPINLOCK(uidhash_lock);
struct user_struct root_user = {
{
struct user_struct *ret;
- spin_lock(&uidhash_lock);
+ spin_lock_bh(&uidhash_lock);
ret = uid_hash_find(uid, uidhashentry(uid));
- spin_unlock(&uidhash_lock);
+ spin_unlock_bh(&uidhash_lock);
return ret;
}
void free_uid(struct user_struct *up)
{
+ local_bh_disable();
if (up && atomic_dec_and_lock(&up->__count, &uidhash_lock)) {
uid_hash_remove(up);
key_put(up->uid_keyring);
kmem_cache_free(uid_cachep, up);
spin_unlock(&uidhash_lock);
}
+ local_bh_enable();
}
struct user_struct * alloc_uid(uid_t uid)
struct list_head *hashent = uidhashentry(uid);
struct user_struct *up;
- spin_lock(&uidhash_lock);
+ spin_lock_bh(&uidhash_lock);
up = uid_hash_find(uid, hashent);
- spin_unlock(&uidhash_lock);
+ spin_unlock_bh(&uidhash_lock);
if (!up) {
struct user_struct *new;
* Before adding this, check whether we raced
* on adding the same user already..
*/
- spin_lock(&uidhash_lock);
+ spin_lock_bh(&uidhash_lock);
up = uid_hash_find(uid, hashent);
if (up) {
key_put(new->uid_keyring);
uid_hash_insert(new, hashent);
up = new;
}
- spin_unlock(&uidhash_lock);
+ spin_unlock_bh(&uidhash_lock);
}
return up;
INIT_LIST_HEAD(uidhash_table + n);
/* Insert the root user immediately (init already runs as root) */
- spin_lock(&uidhash_lock);
+ spin_lock_bh(&uidhash_lock);
uid_hash_insert(&root_user, uidhashentry(0));
- spin_unlock(&uidhash_lock);
+ spin_unlock_bh(&uidhash_lock);
return 0;
}
* ->private_lock (try_to_unmap_one)
* ->tree_lock (try_to_unmap_one)
* ->zone.lru_lock (follow_page->mark_page_accessed)
+ * ->zone.lru_lock (check_pte_range->isolate_lru_page)
* ->private_lock (page_remove_rmap->set_page_dirty)
* ->tree_lock (page_remove_rmap->set_page_dirty)
* ->inode_lock (page_remove_rmap->set_page_dirty)
}
static void gather_stats(struct page *, void *);
-static void migrate_page_add(struct vm_area_struct *vma,
- struct page *page, struct list_head *pagelist, unsigned long flags);
+static void migrate_page_add(struct page *page, struct list_head *pagelist,
+ unsigned long flags);
/* Scan through pages checking if pages follow certain conditions. */
static int check_pte_range(struct vm_area_struct *vma, pmd_t *pmd,
page = vm_normal_page(vma, addr, *pte);
if (!page)
continue;
+ /*
+ * The check for PageReserved here is important to avoid
+ * handling zero pages and other pages that may have been
+ * marked special by the system.
+ *
+ * If the PageReserved would not be checked here then f.e.
+ * the location of the zero page could have an influence
+ * on MPOL_MF_STRICT, zero pages would be counted for
+ * the per node stats, and there would be useless attempts
+ * to put zero pages on the migration list.
+ */
if (PageReserved(page))
continue;
nid = page_to_nid(page);
if (flags & MPOL_MF_STATS)
gather_stats(page, private);
- else if (flags & (MPOL_MF_MOVE | MPOL_MF_MOVE_ALL)) {
- spin_unlock(ptl);
- migrate_page_add(vma, page, private, flags);
- spin_lock(ptl);
- }
+ else if (flags & (MPOL_MF_MOVE | MPOL_MF_MOVE_ALL))
+ migrate_page_add(page, private, flags);
else
break;
} while (pte++, addr += PAGE_SIZE, addr != end);
int err;
struct vm_area_struct *first, *vma, *prev;
+ /* Clear the LRU lists so pages can be isolated */
+ if (flags & (MPOL_MF_MOVE | MPOL_MF_MOVE_ALL))
+ lru_add_drain_all();
+
first = find_vma(mm, start);
if (!first)
return ERR_PTR(-EFAULT);
* page migration
*/
-/* Check if we are the only process mapping the page in question */
-static inline int single_mm_mapping(struct mm_struct *mm,
- struct address_space *mapping)
-{
- struct vm_area_struct *vma;
- struct prio_tree_iter iter;
- int rc = 1;
-
- spin_lock(&mapping->i_mmap_lock);
- vma_prio_tree_foreach(vma, &iter, &mapping->i_mmap, 0, ULONG_MAX)
- if (mm != vma->vm_mm) {
- rc = 0;
- goto out;
- }
- list_for_each_entry(vma, &mapping->i_mmap_nonlinear, shared.vm_set.list)
- if (mm != vma->vm_mm) {
- rc = 0;
- goto out;
- }
-out:
- spin_unlock(&mapping->i_mmap_lock);
- return rc;
-}
-
-/*
- * Add a page to be migrated to the pagelist
- */
-static void migrate_page_add(struct vm_area_struct *vma,
- struct page *page, struct list_head *pagelist, unsigned long flags)
+static void migrate_page_add(struct page *page, struct list_head *pagelist,
+ unsigned long flags)
{
/*
- * Avoid migrating a page that is shared by others and not writable.
+ * Avoid migrating a page that is shared with others.
*/
- if ((flags & MPOL_MF_MOVE_ALL) || !page->mapping || PageAnon(page) ||
- mapping_writably_mapped(page->mapping) ||
- single_mm_mapping(vma->vm_mm, page->mapping)) {
- int rc = isolate_lru_page(page);
-
- if (rc == 1)
+ if ((flags & MPOL_MF_MOVE_ALL) || page_mapcount(page) == 1) {
+ if (isolate_lru_page(page))
list_add(&page->lru, pagelist);
- /*
- * If the isolate attempt was not successful then we just
- * encountered an unswappable page. Something must be wrong.
- */
- WARN_ON(rc == 0);
}
}
return nid;
}
+/*
+ * Depending on the memory policy provide a node from which to allocate the
+ * next slab entry.
+ */
+unsigned slab_node(struct mempolicy *policy)
+{
+ switch (policy->policy) {
+ case MPOL_INTERLEAVE:
+ return interleave_nodes(policy);
+
+ case MPOL_BIND:
+ /*
+ * Follow bind policy behavior and start allocation at the
+ * first node.
+ */
+ return policy->v.zonelist->zones[0]->zone_pgdat->node_id;
+
+ case MPOL_PREFERRED:
+ if (policy->v.preferred_node >= 0)
+ return policy->v.preferred_node;
+ /* Fall through */
+
+ default:
+ return numa_node_id();
+ }
+}
+
/* Do static interleaving for a VMA with known offset. */
static unsigned offset_il_node(struct mempolicy *pol,
struct vm_area_struct *vma, unsigned long off)
static long ratelimit_pages = 32;
static long total_pages; /* The total number of pages in the machine. */
-static int dirty_exceeded; /* Dirty mem may be over limit */
+static int dirty_exceeded __cacheline_aligned_in_smp; /* Dirty mem may be over limit */
/*
* When balance_dirty_pages decides that the caller needs to perform some
if (nr_reclaimable + wbs.nr_writeback <= dirty_thresh)
break;
- dirty_exceeded = 1;
+ if (!dirty_exceeded)
+ dirty_exceeded = 1;
/* Note: nr_reclaimable denotes nr_dirty + nr_unstable.
* Unstable writes are a feature of certain networked
blk_congestion_wait(WRITE, HZ/10);
}
- if (nr_reclaimable + wbs.nr_writeback <= dirty_thresh)
+ if (nr_reclaimable + wbs.nr_writeback <= dirty_thresh && dirty_exceeded)
dirty_exceeded = 0;
if (writeback_in_progress(bdi))
mark = (*z)->pages_high;
if (!zone_watermark_ok(*z, order, mark,
classzone_idx, alloc_flags))
- continue;
+ if (!zone_reclaim_mode ||
+ !zone_reclaim(*z, gfp_mask, order))
+ continue;
}
page = buffered_rmqueue(zonelist, *z, order, gfp_mask);
prev_node = local_node;
nodes_clear(used_mask);
while ((node = find_next_best_node(local_node, &used_mask)) >= 0) {
+ int distance = node_distance(local_node, node);
+
+ /*
+ * If another node is sufficiently far away then it is better
+ * to reclaim pages in a zone before going off node.
+ */
+ if (distance > RECLAIM_DISTANCE)
+ zone_reclaim_mode = 1;
+
/*
* We don't want to pressure a particular node.
* So adding penalty to the first node in same
* distance group to make it round-robin.
*/
- if (node_distance(local_node, node) !=
- node_distance(local_node, prev_node))
+
+ if (distance != node_distance(local_node, prev_node))
node_load[node] += load;
prev_node = node;
load--;
* up by free_all_bootmem() once the early boot process is
* done. Non-atomic initialization, single-pass.
*/
-void __devinit memmap_init_zone(unsigned long size, int nid, unsigned long zone,
+void __meminit memmap_init_zone(unsigned long size, int nid, unsigned long zone,
unsigned long start_pfn)
{
struct page *page;
memmap_init_zone((size), (nid), (zone), (start_pfn))
#endif
-static int __devinit zone_batchsize(struct zone *zone)
+static int __meminit zone_batchsize(struct zone *zone)
{
int batch;
* Dynamically allocate memory for the
* per cpu pageset array in struct zone.
*/
-static int __devinit process_zones(int cpu)
+static int __meminit process_zones(int cpu)
{
struct zone *zone, *dzone;
}
}
-static int __devinit pageset_cpuup_callback(struct notifier_block *nfb,
+static int __meminit pageset_cpuup_callback(struct notifier_block *nfb,
unsigned long action,
void *hcpu)
{
#endif
-static __devinit
+static __meminit
void zone_wait_table_init(struct zone *zone, unsigned long zone_size_pages)
{
int i;
init_waitqueue_head(zone->wait_table + i);
}
-static __devinit void zone_pcp_init(struct zone *zone)
+static __meminit void zone_pcp_init(struct zone *zone)
{
int cpu;
unsigned long batch = zone_batchsize(zone);
zone->name, zone->present_pages, batch);
}
-static __devinit void init_currently_empty_zone(struct zone *zone,
+static __meminit void init_currently_empty_zone(struct zone *zone,
unsigned long zone_start_pfn, unsigned long size)
{
struct pglist_data *pgdat = zone->zone_pgdat;
* mapping->i_mmap_lock
* anon_vma->lock
* mm->page_table_lock or pte_lock
- * zone->lru_lock (in mark_page_accessed)
+ * zone->lru_lock (in mark_page_accessed, isolate_lru_page)
* swap_lock (in swap_duplicate, swap_info_get)
* mmlist_lock (in mmput, drain_mmlist and others)
* mapping->private_lock (in __set_page_dirty_buffers)
* Further notes from the original documentation:
*
* 11 April '97. Started multi-threading - markhe
- * The global cache-chain is protected by the semaphore 'cache_chain_sem'.
+ * The global cache-chain is protected by the mutex 'cache_chain_mutex'.
* The sem is only needed when accessing/extending the cache-chain, which
* can never happen inside an interrupt (kmem_cache_create(),
* kmem_cache_shrink() and kmem_cache_reap()).
#include <linux/rcupdate.h>
#include <linux/string.h>
#include <linux/nodemask.h>
+#include <linux/mempolicy.h>
+#include <linux/mutex.h>
#include <asm/uaccess.h>
#include <asm/cacheflush.h>
};
/* Guard access to the cache-chain. */
-static struct semaphore cache_chain_sem;
+static DEFINE_MUTEX(cache_chain_mutex);
static struct list_head cache_chain;
/*
}
#ifdef CONFIG_NUMA
+static void *__cache_alloc_node(kmem_cache_t *, gfp_t, int);
+
static inline struct array_cache **alloc_alien_cache(int node, int limit)
{
struct array_cache **ac_ptr;
switch (action) {
case CPU_UP_PREPARE:
- down(&cache_chain_sem);
+ mutex_lock(&cache_chain_mutex);
/* we need to do this right in the beginning since
* alloc_arraycache's are going to use this list.
* kmalloc_node allows us to add the slab to the right
l3->shared = nc;
}
}
- up(&cache_chain_sem);
+ mutex_unlock(&cache_chain_mutex);
break;
case CPU_ONLINE:
start_cpu_timer(cpu);
case CPU_DEAD:
/* fall thru */
case CPU_UP_CANCELED:
- down(&cache_chain_sem);
+ mutex_lock(&cache_chain_mutex);
list_for_each_entry(cachep, &cache_chain, next) {
struct array_cache *nc;
spin_unlock_irq(&cachep->spinlock);
kfree(nc);
}
- up(&cache_chain_sem);
+ mutex_unlock(&cache_chain_mutex);
break;
#endif
}
return NOTIFY_OK;
bad:
- up(&cache_chain_sem);
+ mutex_unlock(&cache_chain_mutex);
return NOTIFY_BAD;
}
*/
/* 1) create the cache_cache */
- init_MUTEX(&cache_chain_sem);
INIT_LIST_HEAD(&cache_chain);
list_add(&cache_cache.next, &cache_chain);
cache_cache.colour_off = cache_line_size();
/* 6) resize the head arrays to their final sizes */
{
kmem_cache_t *cachep;
- down(&cache_chain_sem);
+ mutex_lock(&cache_chain_mutex);
list_for_each_entry(cachep, &cache_chain, next)
enable_cpucache(cachep);
- up(&cache_chain_sem);
+ mutex_unlock(&cache_chain_mutex);
}
/* Done! */
BUG();
}
- down(&cache_chain_sem);
+ mutex_lock(&cache_chain_mutex);
list_for_each(p, &cache_chain) {
kmem_cache_t *pc = list_entry(p, kmem_cache_t, next);
if (!cachep && (flags & SLAB_PANIC))
panic("kmem_cache_create(): failed to create slab `%s'\n",
name);
- up(&cache_chain_sem);
+ mutex_unlock(&cache_chain_mutex);
return cachep;
}
EXPORT_SYMBOL(kmem_cache_create);
lock_cpu_hotplug();
/* Find the cache in the chain of caches. */
- down(&cache_chain_sem);
+ mutex_lock(&cache_chain_mutex);
/*
* the chain is never empty, cache_cache is never destroyed
*/
list_del(&cachep->next);
- up(&cache_chain_sem);
+ mutex_unlock(&cache_chain_mutex);
if (__cache_shrink(cachep)) {
slab_error(cachep, "Can't free all objects");
- down(&cache_chain_sem);
+ mutex_lock(&cache_chain_mutex);
list_add(&cachep->next, &cache_chain);
- up(&cache_chain_sem);
+ mutex_unlock(&cache_chain_mutex);
unlock_cpu_hotplug();
return 1;
}
void *objp;
struct array_cache *ac;
+#ifdef CONFIG_NUMA
+ if (unlikely(current->mempolicy && !in_interrupt())) {
+ int nid = slab_node(current->mempolicy);
+
+ if (nid != numa_node_id())
+ return __cache_alloc_node(cachep, flags, nid);
+ }
+#endif
+
check_irq_off();
ac = ac_data(cachep);
if (likely(ac->avail)) {
* - clear the per-cpu caches for this CPU.
* - return freeable pages to the main free memory pool.
*
- * If we cannot acquire the cache chain semaphore then just give up - we'll
+ * If we cannot acquire the cache chain mutex then just give up - we'll
* try again on the next iteration.
*/
static void cache_reap(void *unused)
struct list_head *walk;
struct kmem_list3 *l3;
- if (down_trylock(&cache_chain_sem)) {
+ if (!mutex_trylock(&cache_chain_mutex)) {
/* Give up. Setup the next iteration. */
schedule_delayed_work(&__get_cpu_var(reap_work),
REAPTIMEOUT_CPUC);
cond_resched();
}
check_irq_on();
- up(&cache_chain_sem);
+ mutex_unlock(&cache_chain_mutex);
drain_remote_pages();
/* Setup the next iteration */
schedule_delayed_work(&__get_cpu_var(reap_work), REAPTIMEOUT_CPUC);
loff_t n = *pos;
struct list_head *p;
- down(&cache_chain_sem);
+ mutex_lock(&cache_chain_mutex);
if (!n)
print_slabinfo_header(m);
p = cache_chain.next;
static void s_stop(struct seq_file *m, void *p)
{
- up(&cache_chain_sem);
+ mutex_unlock(&cache_chain_mutex);
}
static int s_show(struct seq_file *m, void *p)
return -EINVAL;
/* Find the cache in the chain of caches. */
- down(&cache_chain_sem);
+ mutex_lock(&cache_chain_mutex);
res = -EINVAL;
list_for_each(p, &cache_chain) {
kmem_cache_t *cachep = list_entry(p, kmem_cache_t, next);
break;
}
}
- up(&cache_chain_sem);
+ mutex_unlock(&cache_chain_mutex);
if (res >= 0)
res = count;
return res;
put_cpu();
}
+#ifdef CONFIG_NUMA
+static void lru_add_drain_per_cpu(void *dummy)
+{
+ lru_add_drain();
+}
+
+/*
+ * Returns 0 for success
+ */
+int lru_add_drain_all(void)
+{
+ return schedule_on_each_cpu(lru_add_drain_per_cpu, NULL);
+}
+
+#else
+
+/*
+ * Returns 0 for success
+ */
+int lru_add_drain_all(void)
+{
+ lru_add_drain();
+ return 0;
+}
+#endif
+
/*
* This path almost never happens for VM activity - pages are normally
* freed via pagevecs. But it gets used by networking.
#include <linux/rmap.h>
#include <linux/security.h>
#include <linux/backing-dev.h>
+#include <linux/mutex.h>
#include <linux/capability.h>
#include <linux/syscalls.h>
struct swap_info_struct swap_info[MAX_SWAPFILES];
-static DECLARE_MUTEX(swapon_sem);
+static DEFINE_MUTEX(swapon_mutex);
/*
* We need this because the bdev->unplug_fn can sleep and we cannot
* hold swap_lock while calling the unplug_fn. And swap_lock
- * cannot be turned into a semaphore.
+ * cannot be turned into a mutex.
*/
static DECLARE_RWSEM(swap_unplug_sem);
up_write(&swap_unplug_sem);
destroy_swap_extents(p);
- down(&swapon_sem);
+ mutex_lock(&swapon_mutex);
spin_lock(&swap_lock);
drain_mmlist();
p->swap_map = NULL;
p->flags = 0;
spin_unlock(&swap_lock);
- up(&swapon_sem);
+ mutex_unlock(&swapon_mutex);
vfree(swap_map);
inode = mapping->host;
if (S_ISBLK(inode->i_mode)) {
int i;
loff_t l = *pos;
- down(&swapon_sem);
+ mutex_lock(&swapon_mutex);
for (i = 0; i < nr_swapfiles; i++, ptr++) {
if (!(ptr->flags & SWP_USED) || !ptr->swap_map)
static void swap_stop(struct seq_file *swap, void *v)
{
- up(&swapon_sem);
+ mutex_unlock(&swapon_mutex);
}
static int swap_show(struct seq_file *swap, void *v)
goto bad_swap;
}
- down(&swapon_sem);
+ mutex_lock(&swapon_mutex);
spin_lock(&swap_lock);
p->flags = SWP_ACTIVE;
nr_swap_pages += nr_good_pages;
swap_info[prev].next = p - swap_info;
}
spin_unlock(&swap_lock);
- up(&swapon_sem);
+ mutex_unlock(&swapon_mutex);
error = 0;
goto out;
bad_swap:
int may_writepage;
+ /* Can pages be swapped as part of reclaim? */
+ int may_swap;
+
/* This context's SWAP_CLUSTER_MAX. If freeing memory for
* suspend, we effectively ignore SWAP_CLUSTER_MAX.
* In this context, it doesn't matter that we scan the
* Try to allocate it some swap space here.
*/
if (PageAnon(page) && !PageSwapCache(page)) {
+ if (!sc->may_swap)
+ goto keep_locked;
if (!add_to_swap(page, GFP_ATOMIC))
goto activate_locked;
}
}
/*
- * Add isolated pages on the list back to the LRU
+ * Add isolated pages on the list back to the LRU.
*
* returns the number of pages put back.
*/
return nr_failed + retry;
}
-static void lru_add_drain_per_cpu(void *dummy)
-{
- lru_add_drain();
-}
-
/*
* Isolate one page from the LRU lists and put it on the
- * indicated list. Do necessary cache draining if the
- * page is not on the LRU lists yet.
+ * indicated list with elevated refcount.
*
* Result:
* 0 = page not on LRU list
* 1 = page removed from LRU list and added to the specified list.
- * -ENOENT = page is being freed elsewhere.
*/
int isolate_lru_page(struct page *page)
{
- int rc = 0;
- struct zone *zone = page_zone(page);
+ int ret = 0;
-redo:
- spin_lock_irq(&zone->lru_lock);
- rc = __isolate_lru_page(page);
- if (rc == 1) {
- if (PageActive(page))
- del_page_from_active_list(zone, page);
- else
- del_page_from_inactive_list(zone, page);
- }
- spin_unlock_irq(&zone->lru_lock);
- if (rc == 0) {
- /*
- * Maybe this page is still waiting for a cpu to drain it
- * from one of the lru lists?
- */
- rc = schedule_on_each_cpu(lru_add_drain_per_cpu, NULL);
- if (rc == 0 && PageLRU(page))
- goto redo;
+ if (PageLRU(page)) {
+ struct zone *zone = page_zone(page);
+ spin_lock_irq(&zone->lru_lock);
+ if (TestClearPageLRU(page)) {
+ ret = 1;
+ get_page(page);
+ if (PageActive(page))
+ del_page_from_active_list(zone, page);
+ else
+ del_page_from_inactive_list(zone, page);
+ }
+ spin_unlock_irq(&zone->lru_lock);
}
- return rc;
+
+ return ret;
}
#endif
page = lru_to_page(src);
prefetchw_prev_lru_page(page, src, flags);
- switch (__isolate_lru_page(page)) {
- case 1:
- /* Succeeded to isolate page */
- list_move(&page->lru, dst);
- nr_taken++;
- break;
- case -ENOENT:
- /* Not possible to isolate */
- list_move(&page->lru, src);
- break;
- default:
+ if (!TestClearPageLRU(page))
BUG();
+ list_del(&page->lru);
+ if (get_page_testone(page)) {
+ /*
+ * It is being freed elsewhere
+ */
+ __put_page(page);
+ SetPageLRU(page);
+ list_add(&page->lru, src);
+ continue;
+ } else {
+ list_add(&page->lru, dst);
+ nr_taken++;
}
}
sc.gfp_mask = gfp_mask;
sc.may_writepage = 0;
+ sc.may_swap = 1;
inc_page_state(allocstall);
total_reclaimed = 0;
sc.gfp_mask = GFP_KERNEL;
sc.may_writepage = 0;
+ sc.may_swap = 1;
sc.nr_mapped = read_page_state(nr_mapped);
inc_page_state(pageoutrun);
}
module_init(kswapd_init)
+
+#ifdef CONFIG_NUMA
+/*
+ * Zone reclaim mode
+ *
+ * If non-zero call zone_reclaim when the number of free pages falls below
+ * the watermarks.
+ *
+ * In the future we may add flags to the mode. However, the page allocator
+ * should only have to check that zone_reclaim_mode != 0 before calling
+ * zone_reclaim().
+ */
+int zone_reclaim_mode __read_mostly;
+
+/*
+ * Mininum time between zone reclaim scans
+ */
+#define ZONE_RECLAIM_INTERVAL HZ/2
+/*
+ * Try to free up some pages from this zone through reclaim.
+ */
+int zone_reclaim(struct zone *zone, gfp_t gfp_mask, unsigned int order)
+{
+ int nr_pages = 1 << order;
+ struct task_struct *p = current;
+ struct reclaim_state reclaim_state;
+ struct scan_control sc = {
+ .gfp_mask = gfp_mask,
+ .may_writepage = 0,
+ .may_swap = 0,
+ .nr_mapped = read_page_state(nr_mapped),
+ .nr_scanned = 0,
+ .nr_reclaimed = 0,
+ .priority = 0
+ };
+
+ if (!(gfp_mask & __GFP_WAIT) ||
+ zone->zone_pgdat->node_id != numa_node_id() ||
+ zone->all_unreclaimable ||
+ atomic_read(&zone->reclaim_in_progress) > 0)
+ return 0;
+
+ if (time_before(jiffies,
+ zone->last_unsuccessful_zone_reclaim + ZONE_RECLAIM_INTERVAL))
+ return 0;
+
+ disable_swap_token();
+
+ if (nr_pages > SWAP_CLUSTER_MAX)
+ sc.swap_cluster_max = nr_pages;
+ else
+ sc.swap_cluster_max = SWAP_CLUSTER_MAX;
+
+ cond_resched();
+ p->flags |= PF_MEMALLOC;
+ reclaim_state.reclaimed_slab = 0;
+ p->reclaim_state = &reclaim_state;
+ shrink_zone(zone, &sc);
+ p->reclaim_state = NULL;
+ current->flags &= ~PF_MEMALLOC;
+
+ if (sc.nr_reclaimed == 0)
+ zone->last_unsuccessful_zone_reclaim = jiffies;
+
+ return sc.nr_reclaimed > nr_pages;
+}
+#endif
+
source "net/dccp/Kconfig"
source "net/sctp/Kconfig"
+source "net/tipc/Kconfig"
source "net/atm/Kconfig"
source "net/bridge/Kconfig"
source "net/8021q/Kconfig"
source "drivers/net/appletalk/Kconfig"
source "net/x25/Kconfig"
source "net/lapb/Kconfig"
-source "net/tipc/Kconfig"
config NET_DIVERT
bool "Frame Diverter (EXPERIMENTAL)"
if (info->invflags & EBT_IP_PROTO)
return -EINVAL;
if (info->protocol != IPPROTO_TCP &&
- info->protocol != IPPROTO_UDP)
+ info->protocol != IPPROTO_UDP &&
+ info->protocol != IPPROTO_SCTP &&
+ info->protocol != IPPROTO_DCCP)
return -EINVAL;
}
if (info->bitmask & EBT_IP_DPORT && info->dport[0] > info->dport[1])
"tos=0x%02X, IP proto=%d", NIPQUAD(ih->saddr),
NIPQUAD(ih->daddr), ih->tos, ih->protocol);
if (ih->protocol == IPPROTO_TCP ||
- ih->protocol == IPPROTO_UDP) {
+ ih->protocol == IPPROTO_UDP ||
+ ih->protocol == IPPROTO_SCTP ||
+ ih->protocol == IPPROTO_DCCP) {
struct tcpudphdr _ports, *pptr;
pptr = skb_header_pointer(skb, ih->ihl*4,
case SIOCBONDENSLAVE:
case SIOCBONDRELEASE:
case SIOCBONDSETHWADDR:
- case SIOCBONDSLAVEINFOQUERY:
- case SIOCBONDINFOQUERY:
case SIOCBONDCHANGEACTIVE:
case SIOCBRADDIF:
case SIOCBRDELIF:
if (!capable(CAP_NET_ADMIN))
return -EPERM;
+ /* fall through */
+ case SIOCBONDSLAVEINFOQUERY:
+ case SIOCBONDINFOQUERY:
dev_load(ifr.ifr_name);
rtnl_lock();
ret = dev_ifsioc(&ifr, cmd);
}
/**
- * sk_run_filter - run a filter on a socket
+ * sk_run_filter - run a filter on a socket
* @skb: buffer to run the filter on
* @filter: filter to apply
* @flen: length of filter
* filtering, filter is the array of filter instructions, and
* len is the number of filter blocks in the array.
*/
-
unsigned int sk_run_filter(struct sk_buff *skb, struct sock_filter *filter, int flen)
{
struct sock_filter *fentry; /* We walk down these */
void *ptr;
- u32 A = 0; /* Accumulator */
- u32 X = 0; /* Index Register */
+ u32 A = 0; /* Accumulator */
+ u32 X = 0; /* Index Register */
u32 mem[BPF_MEMWORDS]; /* Scratch Memory Store */
u32 tmp;
int k;
continue;
case BPF_LD|BPF_W|BPF_ABS:
k = fentry->k;
- load_w:
+load_w:
ptr = load_pointer(skb, k, 4, &tmp);
if (ptr != NULL) {
A = ntohl(*(u32 *)ptr);
break;
case BPF_LD|BPF_H|BPF_ABS:
k = fentry->k;
- load_h:
+load_h:
ptr = load_pointer(skb, k, 2, &tmp);
if (ptr != NULL) {
A = ntohs(*(u16 *)ptr);
case BPF_JMP|BPF_JSET|BPF_K:
case BPF_JMP|BPF_JSET|BPF_X:
/* for conditionals both must be safe */
- if (pc + ftest->jt + 1 >= flen ||
+ if (pc + ftest->jt + 1 >= flen ||
pc + ftest->jf + 1 >= flen)
return -EINVAL;
break;
}
}
- return (BPF_CLASS(filter[flen - 1].code) == BPF_RET) ? 0 : -EINVAL;
+ return (BPF_CLASS(filter[flen - 1].code) == BPF_RET) ? 0 : -EINVAL;
}
/**
int err;
/* Make sure new filter is there and in the right amounts. */
- if (fprog->filter == NULL)
- return -EINVAL;
+ if (fprog->filter == NULL)
+ return -EINVAL;
fp = sock_kmalloc(sk, fsize+sizeof(*fp), GFP_KERNEL);
if (!fp)
}
}
- if (!memcmp(np->local_mac, "\0\0\0\0\0\0", 6) && ndev->dev_addr)
+ if (is_zero_ether_addr(np->local_mac) && ndev->dev_addr)
memcpy(np->local_mac, ndev->dev_addr, 6);
if (!np->local_ip) {
#include <linux/proc_fs.h>
#include <linux/seq_file.h>
#include <linux/wait.h>
+#include <linux/etherdevice.h>
#include <net/checksum.h>
#include <net/ipv6.h>
#include <net/addrconf.h>
__u32 src_mac_count; /* How many MACs to iterate through */
__u32 dst_mac_count; /* How many MACs to iterate through */
- unsigned char dst_mac[6];
- unsigned char src_mac[6];
+ unsigned char dst_mac[ETH_ALEN];
+ unsigned char src_mac[ETH_ALEN];
__u32 cur_dst_mac_offset;
__u32 cur_src_mac_offset;
seq_puts(seq, " src_mac: ");
- if ((pkt_dev->src_mac[0] == 0) &&
- (pkt_dev->src_mac[1] == 0) &&
- (pkt_dev->src_mac[2] == 0) &&
- (pkt_dev->src_mac[3] == 0) &&
- (pkt_dev->src_mac[4] == 0) &&
- (pkt_dev->src_mac[5] == 0))
-
+ if (is_zero_ether_addr(pkt_dev->src_mac))
for (i = 0; i < 6; i++)
seq_printf(seq, "%02X%s", pkt_dev->odev->dev_addr[i], i == 5 ? " " : ":");
-
else
for (i = 0; i < 6; i++)
seq_printf(seq, "%02X%s", pkt_dev->src_mac[i], i == 5 ? " " : ":");
}
if (!strcmp(name, "dst_mac")) {
char *v = valstr;
- unsigned char old_dmac[6];
+ unsigned char old_dmac[ETH_ALEN];
unsigned char *m = pkt_dev->dst_mac;
- memcpy(old_dmac, pkt_dev->dst_mac, 6);
+ memcpy(old_dmac, pkt_dev->dst_mac, ETH_ALEN);
len = strn_len(&user_buffer[i], sizeof(valstr) - 1);
if (len < 0) { return len; }
}
/* Set up Dest MAC */
- if (memcmp(old_dmac, pkt_dev->dst_mac, 6) != 0)
- memcpy(&(pkt_dev->hh[0]), pkt_dev->dst_mac, 6);
+ if (compare_ether_addr(old_dmac, pkt_dev->dst_mac))
+ memcpy(&(pkt_dev->hh[0]), pkt_dev->dst_mac, ETH_ALEN);
sprintf(pg_result, "OK: dstmac");
return count;
/* Default to the interface's mac if not explicitly set. */
- if ((pkt_dev->src_mac[0] == 0) &&
- (pkt_dev->src_mac[1] == 0) &&
- (pkt_dev->src_mac[2] == 0) &&
- (pkt_dev->src_mac[3] == 0) &&
- (pkt_dev->src_mac[4] == 0) &&
- (pkt_dev->src_mac[5] == 0)) {
+ if (is_zero_ether_addr(pkt_dev->src_mac))
+ memcpy(&(pkt_dev->hh[6]), pkt_dev->odev->dev_addr, ETH_ALEN);
- memcpy(&(pkt_dev->hh[6]), pkt_dev->odev->dev_addr, 6);
- }
/* Set up Dest MAC */
- memcpy(&(pkt_dev->hh[0]), pkt_dev->dst_mac, 6);
+ memcpy(&(pkt_dev->hh[0]), pkt_dev->dst_mac, ETH_ALEN);
/* Set up pkt size */
pkt_dev->cur_pkt_size = pkt_dev->min_pkt_size;
*/
mod_cur_headers(pkt_dev);
- skb = alloc_skb(pkt_dev->cur_pkt_size + 64 + 16, GFP_ATOMIC);
+ datalen = (odev->hard_header_len + 16) & ~0xf;
+ skb = alloc_skb(pkt_dev->cur_pkt_size + 64 + datalen, GFP_ATOMIC);
if (!skb) {
sprintf(pkt_dev->result, "No memory");
return NULL;
}
- skb_reserve(skb, 16);
+ skb_reserve(skb, datalen);
/* Reserve for ethernet and IP header */
eth = (__u8 *) skb_push(skb, 14);
struct sk_buff *__alloc_skb(unsigned int size, gfp_t gfp_mask,
int fclone)
{
+ kmem_cache_t *cache;
struct skb_shared_info *shinfo;
struct sk_buff *skb;
u8 *data;
+ cache = fclone ? skbuff_fclone_cache : skbuff_head_cache;
+
/* Get the HEAD */
- skb = kmem_cache_alloc(fclone ? skbuff_fclone_cache : skbuff_head_cache,
- gfp_mask & ~__GFP_DMA);
+ skb = kmem_cache_alloc(cache, gfp_mask & ~__GFP_DMA);
if (!skb)
goto out;
out:
return skb;
nodata:
- kmem_cache_free(skbuff_head_cache, skb);
+ kmem_cache_free(cache, skb);
skb = NULL;
goto out;
}
const unsigned char state)
{
unsigned int gap;
- signed long new_head;
+ long new_head;
if (av->dccpav_vec_len + packets > av->dccpav_buf_len)
return -ENOBUFS;
u8 src[ETH_ALEN];
struct ieee80211_crypt_data *crypt = NULL;
int keyidx = 0;
+ int can_be_decrypted = 0;
hdr = (struct ieee80211_hdr_4addr *)skb->data;
stats = &ieee->stats;
return 1;
}
- if (is_multicast_ether_addr(hdr->addr1)
- ? ieee->host_mc_decrypt : ieee->host_decrypt) {
+ can_be_decrypted = (is_multicast_ether_addr(hdr->addr1) ||
+ is_broadcast_ether_addr(hdr->addr2)) ?
+ ieee->host_mc_decrypt : ieee->host_decrypt;
+
+ if (can_be_decrypted) {
int idx = 0;
- if (skb->len >= hdrlen + 3)
+ if (skb->len >= hdrlen + 3) {
+ /* Top two-bits of byte 3 are the key index */
idx = skb->data[hdrlen + 3] >> 6;
+ }
+
+ /* ieee->crypt[] is WEP_KEY (4) in length. Given that idx
+ * is only allowed 2-bits of storage, no value of idx can
+ * be provided via above code that would result in idx
+ * being out of range */
crypt = ieee->crypt[idx];
+
#ifdef NOT_YET
sta = NULL;
/* skb: hdr + (possibly fragmented, possibly encrypted) payload */
- if (ieee->host_decrypt && (fc & IEEE80211_FCTL_PROTECTED) &&
+ if ((fc & IEEE80211_FCTL_PROTECTED) && can_be_decrypted &&
(keyidx = ieee80211_rx_frame_decrypt(ieee, skb, crypt)) < 0)
goto rx_dropped;
/* skb: hdr + (possible reassembled) full MSDU payload; possibly still
* encrypted/authenticated */
- if (ieee->host_decrypt && (fc & IEEE80211_FCTL_PROTECTED) &&
+ if ((fc & IEEE80211_FCTL_PROTECTED) && can_be_decrypted &&
ieee80211_rx_frame_decrypt_msdu(ieee, skb, keyidx, crypt))
goto rx_dropped;
break;
case IEEE80211_STYPE_PROBE_REQ:
- IEEE80211_DEBUG_MGMT("recieved auth (%d)\n",
+ IEEE80211_DEBUG_MGMT("received auth (%d)\n",
WLAN_FC_GET_STYPE(le16_to_cpu
(header->frame_ctl)));
break;
case IEEE80211_STYPE_AUTH:
- IEEE80211_DEBUG_MGMT("recieved auth (%d)\n",
+ IEEE80211_DEBUG_MGMT("received auth (%d)\n",
WLAN_FC_GET_STYPE(le16_to_cpu
(header->frame_ctl)));
return start;
}
+#define SCAN_ITEM_SIZE 128
+
int ieee80211_wx_get_scan(struct ieee80211_device *ieee,
struct iw_request_info *info,
union iwreq_data *wrqu, char *extra)
{
struct ieee80211_network *network;
unsigned long flags;
+ int err = 0;
char *ev = extra;
- char *stop = ev + IW_SCAN_MAX_DATA;
+ char *stop = ev + wrqu->data.length;
int i = 0;
IEEE80211_DEBUG_WX("Getting scan\n");
list_for_each_entry(network, &ieee->network_list, list) {
i++;
+ if (stop - ev < SCAN_ITEM_SIZE) {
+ err = -E2BIG;
+ break;
+ }
+
if (ieee->scan_age == 0 ||
time_after(network->last_scanned + ieee->scan_age, jiffies))
ev = ipw2100_translate_scan(ieee, ev, stop, network);
IEEE80211_DEBUG_WX("exit: %d networks returned.\n", i);
- return 0;
+ return err;
}
int ieee80211_wx_set_encode(struct ieee80211_device *ieee,
case IGMPV3_MODE_IS_EXCLUDE:
if (gdeleted || sdeleted)
return 0;
- return !(pmc->gsquery && !psf->sf_gsresp);
+ if (!(pmc->gsquery && !psf->sf_gsresp)) {
+ if (pmc->sfmode == MCAST_INCLUDE)
+ return 1;
+ /* don't include if this source is excluded
+ * in all filters
+ */
+ if (psf->sf_count[MCAST_INCLUDE])
+ return type == IGMPV3_MODE_IS_INCLUDE;
+ return pmc->sfcount[MCAST_EXCLUDE] ==
+ psf->sf_count[MCAST_EXCLUDE];
+ }
+ return 0;
case IGMPV3_CHANGE_TO_INCLUDE:
if (gdeleted || sdeleted)
return 0;
struct igmpv3_report *pih;
struct igmpv3_grec *pgr = NULL;
struct ip_sf_list *psf, *psf_next, *psf_prev, **psf_list;
- int scount, first, isquery, truncate;
+ int scount, stotal, first, isquery, truncate;
if (pmc->multiaddr == IGMP_ALL_HOSTS)
return skb;
truncate = type == IGMPV3_MODE_IS_EXCLUDE ||
type == IGMPV3_CHANGE_TO_EXCLUDE;
+ stotal = scount = 0;
+
psf_list = sdeleted ? &pmc->tomb : &pmc->sources;
- if (!*psf_list) {
- if (type == IGMPV3_ALLOW_NEW_SOURCES ||
- type == IGMPV3_BLOCK_OLD_SOURCES)
- return skb;
- if (pmc->crcount || isquery) {
- /* make sure we have room for group header and at
- * least one source.
- */
- if (skb && AVAILABLE(skb) < sizeof(struct igmpv3_grec)+
- sizeof(__u32)) {
- igmpv3_sendpack(skb);
- skb = NULL; /* add_grhead will get a new one */
- }
- skb = add_grhead(skb, pmc, type, &pgr);
- }
- return skb;
- }
+ if (!*psf_list)
+ goto empty_source;
+
pih = skb ? (struct igmpv3_report *)skb->h.igmph : NULL;
/* EX and TO_EX get a fresh packet, if needed */
}
}
first = 1;
- scount = 0;
psf_prev = NULL;
for (psf=*psf_list; psf; psf=psf_next) {
u32 *psrc;
}
psrc = (u32 *)skb_put(skb, sizeof(u32));
*psrc = psf->sf_inaddr;
- scount++;
+ scount++; stotal++;
if ((type == IGMPV3_ALLOW_NEW_SOURCES ||
type == IGMPV3_BLOCK_OLD_SOURCES) && psf->sf_crcount) {
psf->sf_crcount--;
}
psf_prev = psf;
}
+
+empty_source:
+ if (!stotal) {
+ if (type == IGMPV3_ALLOW_NEW_SOURCES ||
+ type == IGMPV3_BLOCK_OLD_SOURCES)
+ return skb;
+ if (pmc->crcount || isquery) {
+ /* make sure we have room for group header */
+ if (skb && AVAILABLE(skb)<sizeof(struct igmpv3_grec)) {
+ igmpv3_sendpack(skb);
+ skb = NULL; /* add_grhead will get a new one */
+ }
+ skb = add_grhead(skb, pmc, type, &pgr);
+ }
+ }
if (pgr)
pgr->grec_nsrcs = htons(scount);
skb = add_grec(skb, pmc, dtype, 1, 1);
}
if (pmc->crcount) {
- pmc->crcount--;
if (pmc->sfmode == MCAST_EXCLUDE) {
type = IGMPV3_CHANGE_TO_INCLUDE;
skb = add_grec(skb, pmc, type, 1, 0);
}
+ pmc->crcount--;
if (pmc->crcount == 0) {
igmpv3_clear_zeros(&pmc->tomb);
igmpv3_clear_zeros(&pmc->sources);
/* filter mode changes */
if (pmc->crcount) {
- pmc->crcount--;
if (pmc->sfmode == MCAST_EXCLUDE)
type = IGMPV3_CHANGE_TO_EXCLUDE;
else
type = IGMPV3_CHANGE_TO_INCLUDE;
skb = add_grec(skb, pmc, type, 0, 0);
+ pmc->crcount--;
}
spin_unlock_bh(&pmc->lock);
}
ip_ma_put(im);
}
-static void igmp_marksources(struct ip_mc_list *pmc, int nsrcs, __u32 *srcs)
+/* mark EXCLUDE-mode sources */
+static int igmp_xmarksources(struct ip_mc_list *pmc, int nsrcs, __u32 *srcs)
{
struct ip_sf_list *psf;
int i, scount;
+ scount = 0;
+ for (psf=pmc->sources; psf; psf=psf->sf_next) {
+ if (scount == nsrcs)
+ break;
+ for (i=0; i<nsrcs; i++) {
+ /* skip inactive filters */
+ if (pmc->sfcount[MCAST_INCLUDE] ||
+ pmc->sfcount[MCAST_EXCLUDE] !=
+ psf->sf_count[MCAST_EXCLUDE])
+ continue;
+ if (srcs[i] == psf->sf_inaddr) {
+ scount++;
+ break;
+ }
+ }
+ }
+ pmc->gsquery = 0;
+ if (scount == nsrcs) /* all sources excluded */
+ return 0;
+ return 1;
+}
+
+static int igmp_marksources(struct ip_mc_list *pmc, int nsrcs, __u32 *srcs)
+{
+ struct ip_sf_list *psf;
+ int i, scount;
+
+ if (pmc->sfmode == MCAST_EXCLUDE)
+ return igmp_xmarksources(pmc, nsrcs, srcs);
+
+ /* mark INCLUDE-mode sources */
scount = 0;
for (psf=pmc->sources; psf; psf=psf->sf_next) {
if (scount == nsrcs)
break;
}
}
+ if (!scount) {
+ pmc->gsquery = 0;
+ return 0;
+ }
+ pmc->gsquery = 1;
+ return 1;
}
static void igmp_heard_report(struct in_device *in_dev, u32 group)
*/
read_lock(&in_dev->mc_list_lock);
for (im=in_dev->mc_list; im!=NULL; im=im->next) {
+ int changed;
+
if (group && group != im->multiaddr)
continue;
if (im->multiaddr == IGMP_ALL_HOSTS)
im->gsquery = im->gsquery && mark;
else
im->gsquery = mark;
- if (im->gsquery)
- igmp_marksources(im, ntohs(ih3->nsrcs), ih3->srcs);
+ changed = !im->gsquery ||
+ igmp_marksources(im, ntohs(ih3->nsrcs), ih3->srcs);
spin_unlock_bh(&im->lock);
- igmp_mod_timer(im, max_delay);
+ if (changed)
+ igmp_mod_timer(im, max_delay);
}
read_unlock(&in_dev->mc_list_lock);
}
case IGMP_MTRACE_RESP:
break;
default:
- NETDEBUG(KERN_DEBUG "New IGMP type=%d, why we do not know about it?\n", ih->type);
+ break;
}
drop:
static int sf_setstate(struct ip_mc_list *pmc)
{
- struct ip_sf_list *psf;
+ struct ip_sf_list *psf, *dpsf;
int mca_xcount = pmc->sfcount[MCAST_EXCLUDE];
int qrv = pmc->interface->mr_qrv;
int new_in, rv;
!psf->sf_count[MCAST_INCLUDE];
} else
new_in = psf->sf_count[MCAST_INCLUDE] != 0;
- if (new_in != psf->sf_oldin) {
- psf->sf_crcount = qrv;
+ if (new_in) {
+ if (!psf->sf_oldin) {
+ struct ip_sf_list *prev = 0;
+
+ for (dpsf=pmc->tomb; dpsf; dpsf=dpsf->sf_next) {
+ if (dpsf->sf_inaddr == psf->sf_inaddr)
+ break;
+ prev = dpsf;
+ }
+ if (dpsf) {
+ if (prev)
+ prev->sf_next = dpsf->sf_next;
+ else
+ pmc->tomb = dpsf->sf_next;
+ kfree(dpsf);
+ }
+ psf->sf_crcount = qrv;
+ rv++;
+ }
+ } else if (psf->sf_oldin) {
+
+ psf->sf_crcount = 0;
+ /*
+ * add or update "delete" records if an active filter
+ * is now inactive
+ */
+ for (dpsf=pmc->tomb; dpsf; dpsf=dpsf->sf_next)
+ if (dpsf->sf_inaddr == psf->sf_inaddr)
+ break;
+ if (!dpsf) {
+ dpsf = (struct ip_sf_list *)
+ kmalloc(sizeof(*dpsf), GFP_ATOMIC);
+ if (!dpsf)
+ continue;
+ *dpsf = *psf;
+ /* pmc->lock held by callers */
+ dpsf->sf_next = pmc->tomb;
+ pmc->tomb = dpsf;
+ }
+ dpsf->sf_crcount = qrv;
rv++;
}
}
obj-$(CONFIG_IP_NF_RAW) += iptable_raw.o
# matches
-obj-$(CONFIG_IP_NF_MATCH_HELPER) += ipt_helper.o
obj-$(CONFIG_IP_NF_MATCH_HASHLIMIT) += ipt_hashlimit.o
obj-$(CONFIG_IP_NF_MATCH_IPRANGE) += ipt_iprange.o
obj-$(CONFIG_IP_NF_MATCH_MULTIPORT) += ipt_multiport.o
#include <linux/in.h>
#include <linux/list.h>
#include <linux/seq_file.h>
+#include <linux/interrupt.h>
static DEFINE_RWLOCK(ip_ct_gre_lock);
#define ASSERT_READ_LOCK(x)
static int match(const struct sk_buff *skb,
const struct net_device *in,
const struct net_device *out,
- const void *matchinfo, int offset, int *hotdrop)
+ const void *matchinfo,
+ int offset,
+ unsigned int protoff,
+ int *hotdrop)
{
const struct ipt_policy_info *info = matchinfo;
int ret;
return ret;
}
-static int checkentry(const char *tablename, const struct ipt_ip *ip,
+static int checkentry(const char *tablename, const void *ip_void,
void *matchinfo, unsigned int matchsize,
unsigned int hook_mask)
{
*/
#include <linux/config.h>
+#include <linux/types.h>
#include <asm/atomic.h>
#include <asm/byteorder.h>
#include <asm/current.h>
#include <asm/uaccess.h>
#include <asm/ioctls.h>
-#include <linux/types.h>
#include <linux/stddef.h>
#include <linux/slab.h>
#include <linux/errno.h>
static int rt_hash_log;
static unsigned int rt_hash_rnd;
-static struct rt_cache_stat *rt_cache_stat;
-#define RT_CACHE_STAT_INC(field) \
- (per_cpu_ptr(rt_cache_stat, raw_smp_processor_id())->field++)
+static DEFINE_PER_CPU(struct rt_cache_stat, rt_cache_stat);
+#define RT_CACHE_STAT_INC(field) \
+ (per_cpu(rt_cache_stat, raw_smp_processor_id()).field++)
static int rt_intern_hash(unsigned hash, struct rtable *rth,
struct rtable **res);
if (!cpu_possible(cpu))
continue;
*pos = cpu+1;
- return per_cpu_ptr(rt_cache_stat, cpu);
+ return &per_cpu(rt_cache_stat, cpu);
}
return NULL;
}
if (!cpu_possible(cpu))
continue;
*pos = cpu+1;
- return per_cpu_ptr(rt_cache_stat, cpu);
+ return &per_cpu(rt_cache_stat, cpu);
}
return NULL;
ipv4_dst_ops.gc_thresh = (rt_hash_mask + 1);
ip_rt_max_size = (rt_hash_mask + 1) * 16;
- rt_cache_stat = alloc_percpu(struct rt_cache_stat);
- if (!rt_cache_stat)
- return -ENOMEM;
-
devinet_init();
ip_fib_init();
if (!proc_net_fops_create("rt_cache", S_IRUGO, &rt_cache_seq_fops) ||
!(rtstat_pde = create_proc_entry("rt_cache", S_IRUGO,
proc_net_stat))) {
- free_percpu(rt_cache_stat);
return -ENOMEM;
}
rtstat_pde->proc_fops = &rt_cpu_seq_fops;
if (tp->snd_cwnd < tp->snd_cwnd_clamp)
tp->snd_cwnd++;
tp->snd_cwnd_cnt = 0;
- ca->ccount++;
}
}
}
{
struct inet6_ifaddr *ifp = (struct inet6_ifaddr *)v;
seq_printf(seq,
- NIP6_FMT " %02x %02x %02x %02x %8s\n",
+ NIP6_SEQFMT " %02x %02x %02x %02x %8s\n",
NIP6(ifp->addr),
ifp->idev->dev->ifindex,
ifp->prefix_len,
struct ac6_iter_state *state = ac6_seq_private(seq);
seq_printf(seq,
- "%-4d %-15s " NIP6_FMT " %5d\n",
+ "%-4d %-15s " NIP6_SEQFMT " %5d\n",
state->dev->ifindex, state->dev->name,
NIP6(im->aca_addr),
im->aca_users);
{
while(fl) {
seq_printf(seq,
- "%05X %-1d %-6d %-6d %-6ld %-8ld " NIP6_FMT " %-4d\n",
+ "%05X %-1d %-6d %-6d %-6ld %-8ld " NIP6_SEQFMT " %-4d\n",
(unsigned)ntohl(fl->label),
fl->share,
(unsigned)fl->owner,
static int ip6fl_seq_show(struct seq_file *seq, void *v)
{
if (v == SEQ_START_TOKEN)
- seq_printf(seq, "%-5s %-1s %-6s %-6s %-6s %-8s %-39s %s\n",
+ seq_printf(seq, "%-5s %-1s %-6s %-6s %-6s %-8s %-32s %s\n",
"Label", "S", "Owner", "Users", "Linger", "Expires", "Dst", "Opt");
else
ip6fl_fl_seq_show(seq, v);
}
} else {
for (ma = idev->mc_list; ma; ma=ma->next) {
- if (group_type != IPV6_ADDR_ANY &&
- !ipv6_addr_equal(group, &ma->mca_addr))
+ if (!ipv6_addr_equal(group, &ma->mca_addr))
continue;
spin_lock_bh(&ma->mca_lock);
if (ma->mca_flags & MAF_TIMER_RUNNING) {
ma->mca_flags &= ~MAF_GSQUERY;
}
if (!(ma->mca_flags & MAF_GSQUERY) ||
- mld_marksources(ma, ntohs(mlh2->nsrcs), mlh2->srcs))
+ mld_marksources(ma, ntohs(mlh2->nsrcs), mlh2->srcs))
igmp6_group_queried(ma, max_delay);
spin_unlock_bh(&ma->mca_lock);
- if (group_type != IPV6_ADDR_ANY)
- break;
+ break;
}
}
read_unlock_bh(&idev->lock);
* in all filters
*/
if (psf->sf_count[MCAST_INCLUDE])
- return 0;
+ return type == MLD2_MODE_IS_INCLUDE;
return pmc->mca_sfcount[MCAST_EXCLUDE] ==
psf->sf_count[MCAST_EXCLUDE];
}
static int sf_setstate(struct ifmcaddr6 *pmc)
{
- struct ip6_sf_list *psf;
+ struct ip6_sf_list *psf, *dpsf;
int mca_xcount = pmc->mca_sfcount[MCAST_EXCLUDE];
int qrv = pmc->idev->mc_qrv;
int new_in, rv;
!psf->sf_count[MCAST_INCLUDE];
} else
new_in = psf->sf_count[MCAST_INCLUDE] != 0;
- if (new_in != psf->sf_oldin) {
- psf->sf_crcount = qrv;
+ if (new_in) {
+ if (!psf->sf_oldin) {
+ struct ip6_sf_list *prev = 0;
+
+ for (dpsf=pmc->mca_tomb; dpsf;
+ dpsf=dpsf->sf_next) {
+ if (ipv6_addr_equal(&dpsf->sf_addr,
+ &psf->sf_addr))
+ break;
+ prev = dpsf;
+ }
+ if (dpsf) {
+ if (prev)
+ prev->sf_next = dpsf->sf_next;
+ else
+ pmc->mca_tomb = dpsf->sf_next;
+ kfree(dpsf);
+ }
+ psf->sf_crcount = qrv;
+ rv++;
+ }
+ } else if (psf->sf_oldin) {
+ psf->sf_crcount = 0;
+ /*
+ * add or update "delete" records if an active filter
+ * is now inactive
+ */
+ for (dpsf=pmc->mca_tomb; dpsf; dpsf=dpsf->sf_next)
+ if (ipv6_addr_equal(&dpsf->sf_addr,
+ &psf->sf_addr))
+ break;
+ if (!dpsf) {
+ dpsf = (struct ip6_sf_list *)
+ kmalloc(sizeof(*dpsf), GFP_ATOMIC);
+ if (!dpsf)
+ continue;
+ *dpsf = *psf;
+ /* pmc->mca_lock held by callers */
+ dpsf->sf_next = pmc->mca_tomb;
+ pmc->mca_tomb = dpsf;
+ }
+ dpsf->sf_crcount = qrv;
rv++;
}
}
struct igmp6_mc_iter_state *state = igmp6_mc_seq_private(seq);
seq_printf(seq,
- "%-4d %-15s " NIP6_FMT " %5d %08X %ld\n",
+ "%-4d %-15s " NIP6_SEQFMT " %5d %08X %ld\n",
state->dev->ifindex, state->dev->name,
NIP6(im->mca_addr),
im->mca_users, im->mca_flags,
if (v == SEQ_START_TOKEN) {
seq_printf(seq,
"%3s %6s "
- "%39s %39s %6s %6s\n", "Idx",
+ "%32s %32s %6s %6s\n", "Idx",
"Device", "Multicast Address",
"Source Address", "INC", "EXC");
} else {
seq_printf(seq,
- "%3d %6.6s " NIP6_FMT " " NIP6_FMT " %6lu %6lu\n",
+ "%3d %6.6s " NIP6_SEQFMT " " NIP6_SEQFMT " %6lu %6lu\n",
state->dev->ifindex, state->dev->name,
NIP6(state->im->mca_addr),
NIP6(psf->sf_addr),
# Link order matters here.
obj-$(CONFIG_IP6_NF_IPTABLES) += ip6_tables.o
-obj-$(CONFIG_IP6_NF_MATCH_LENGTH) += ip6t_length.o
obj-$(CONFIG_IP6_NF_MATCH_RT) += ip6t_rt.o
obj-$(CONFIG_IP6_NF_MATCH_OPTS) += ip6t_hbh.o ip6t_dst.o
obj-$(CONFIG_IP6_NF_MATCH_IPV6HEADER) += ip6t_ipv6header.o
#endif
/*
- * (Type & 0xC0) >> 6
- * 0 -> ignorable
- * 1 -> must drop the packet
- * 2 -> send ICMP PARM PROB regardless and drop packet
- * 3 -> Send ICMP if not a multicast address and drop packet
+ * (Type & 0xC0) >> 6
+ * 0 -> ignorable
+ * 1 -> must drop the packet
+ * 2 -> send ICMP PARM PROB regardless and drop packet
+ * 3 -> Send ICMP if not a multicast address and drop packet
* (Type & 0x20) >> 5
- * 0 -> invariant
- * 1 -> can change the routing
+ * 0 -> invariant
+ * 1 -> can change the routing
* (Type & 0x1F) Type
- * 0 -> Pad1 (only 1 byte!)
- * 1 -> PadN LENGTH info (total length = length + 2)
- * C0 | 2 -> JUMBO 4 x x x x ( xxxx > 64k )
- * 5 -> RTALERT 2 x x
+ * 0 -> Pad1 (only 1 byte!)
+ * 1 -> PadN LENGTH info (total length = length + 2)
+ * C0 | 2 -> JUMBO 4 x x x x ( xxxx > 64k )
+ * 5 -> RTALERT 2 x x
*/
static int
unsigned int protoff,
int *hotdrop)
{
- struct ipv6_opt_hdr _optsh, *oh;
- const struct ip6t_opts *optinfo = matchinfo;
- unsigned int temp;
- unsigned int ptr;
- unsigned int hdrlen = 0;
- unsigned int ret = 0;
- u8 _opttype, *tp = NULL;
- u8 _optlen, *lp = NULL;
- unsigned int optlen;
-
+ struct ipv6_opt_hdr _optsh, *oh;
+ const struct ip6t_opts *optinfo = matchinfo;
+ unsigned int temp;
+ unsigned int ptr;
+ unsigned int hdrlen = 0;
+ unsigned int ret = 0;
+ u8 _opttype, *tp = NULL;
+ u8 _optlen, *lp = NULL;
+ unsigned int optlen;
+
#if HOPBYHOP
if (ipv6_find_hdr(skb, &ptr, NEXTHDR_HOP, NULL) < 0)
#else
#endif
return 0;
- oh = skb_header_pointer(skb, ptr, sizeof(_optsh), &_optsh);
- if (oh == NULL){
- *hotdrop = 1;
- return 0;
- }
-
- hdrlen = ipv6_optlen(oh);
- if (skb->len - ptr < hdrlen){
- /* Packet smaller than it's length field */
- return 0;
- }
-
- DEBUGP("IPv6 OPTS LEN %u %u ", hdrlen, oh->hdrlen);
-
- DEBUGP("len %02X %04X %02X ",
- optinfo->hdrlen, hdrlen,
- (!(optinfo->flags & IP6T_OPTS_LEN) ||
- ((optinfo->hdrlen == hdrlen) ^
- !!(optinfo->invflags & IP6T_OPTS_INV_LEN))));
-
- ret = (oh != NULL)
- &&
- (!(optinfo->flags & IP6T_OPTS_LEN) ||
- ((optinfo->hdrlen == hdrlen) ^
- !!(optinfo->invflags & IP6T_OPTS_INV_LEN)));
-
- ptr += 2;
- hdrlen -= 2;
- if ( !(optinfo->flags & IP6T_OPTS_OPTS) ){
- return ret;
+ oh = skb_header_pointer(skb, ptr, sizeof(_optsh), &_optsh);
+ if (oh == NULL) {
+ *hotdrop = 1;
+ return 0;
+ }
+
+ hdrlen = ipv6_optlen(oh);
+ if (skb->len - ptr < hdrlen) {
+ /* Packet smaller than it's length field */
+ return 0;
+ }
+
+ DEBUGP("IPv6 OPTS LEN %u %u ", hdrlen, oh->hdrlen);
+
+ DEBUGP("len %02X %04X %02X ",
+ optinfo->hdrlen, hdrlen,
+ (!(optinfo->flags & IP6T_OPTS_LEN) ||
+ ((optinfo->hdrlen == hdrlen) ^
+ !!(optinfo->invflags & IP6T_OPTS_INV_LEN))));
+
+ ret = (oh != NULL) &&
+ (!(optinfo->flags & IP6T_OPTS_LEN) ||
+ ((optinfo->hdrlen == hdrlen) ^
+ !!(optinfo->invflags & IP6T_OPTS_INV_LEN)));
+
+ ptr += 2;
+ hdrlen -= 2;
+ if (!(optinfo->flags & IP6T_OPTS_OPTS)) {
+ return ret;
} else if (optinfo->flags & IP6T_OPTS_NSTRICT) {
DEBUGP("Not strict - not implemented");
} else {
DEBUGP("Strict ");
- DEBUGP("#%d ",optinfo->optsnr);
- for(temp=0; temp<optinfo->optsnr; temp++){
+ DEBUGP("#%d ", optinfo->optsnr);
+ for (temp = 0; temp < optinfo->optsnr; temp++) {
/* type field exists ? */
if (hdrlen < 1)
break;
break;
/* Type check */
- if (*tp != (optinfo->opts[temp] & 0xFF00)>>8){
+ if (*tp != (optinfo->opts[temp] & 0xFF00) >> 8) {
DEBUGP("Tbad %02X %02X\n",
*tp,
- (optinfo->opts[temp] & 0xFF00)>>8);
+ (optinfo->opts[temp] & 0xFF00) >> 8);
return 0;
} else {
DEBUGP("Tok ");
}
if (temp == optinfo->optsnr)
return ret;
- else return 0;
+ else
+ return 0;
}
return 0;
/* Called when user tries to insert an entry of this type. */
static int
checkentry(const char *tablename,
- const void *info,
- void *matchinfo,
- unsigned int matchinfosize,
- unsigned int hook_mask)
+ const void *info,
+ void *matchinfo,
+ unsigned int matchinfosize,
+ unsigned int hook_mask)
{
- const struct ip6t_opts *optsinfo = matchinfo;
-
- if (matchinfosize != IP6T_ALIGN(sizeof(struct ip6t_opts))) {
- DEBUGP("ip6t_opts: matchsize %u != %u\n",
- matchinfosize, IP6T_ALIGN(sizeof(struct ip6t_opts)));
- return 0;
- }
- if (optsinfo->invflags & ~IP6T_OPTS_INV_MASK) {
- DEBUGP("ip6t_opts: unknown flags %X\n",
- optsinfo->invflags);
- return 0;
- }
-
- return 1;
+ const struct ip6t_opts *optsinfo = matchinfo;
+
+ if (matchinfosize != IP6T_ALIGN(sizeof(struct ip6t_opts))) {
+ DEBUGP("ip6t_opts: matchsize %u != %u\n",
+ matchinfosize, IP6T_ALIGN(sizeof(struct ip6t_opts)));
+ return 0;
+ }
+ if (optsinfo->invflags & ~IP6T_OPTS_INV_MASK) {
+ DEBUGP("ip6t_opts: unknown flags %X\n", optsinfo->invflags);
+ return 0;
+ }
+
+ return 1;
}
static struct ip6t_match opts_match = {
static int __init init(void)
{
- return ip6t_register_match(&opts_match);
+ return ip6t_register_match(&opts_match);
}
static void __exit cleanup(void)
{
- ip6t_unregister_match(&opts_match);
+ ip6t_unregister_match(&opts_match);
}
module_init(init);
unsigned int protoff,
int *hotdrop)
{
+ unsigned char eui64[8];
+ int i = 0;
- unsigned char eui64[8];
- int i=0;
-
- if ( !(skb->mac.raw >= skb->head
- && (skb->mac.raw + ETH_HLEN) <= skb->data)
- && offset != 0) {
- *hotdrop = 1;
- return 0;
- }
-
- memset(eui64, 0, sizeof(eui64));
-
- if (eth_hdr(skb)->h_proto == ntohs(ETH_P_IPV6)) {
- if (skb->nh.ipv6h->version == 0x6) {
- memcpy(eui64, eth_hdr(skb)->h_source, 3);
- memcpy(eui64 + 5, eth_hdr(skb)->h_source + 3, 3);
- eui64[3]=0xff;
- eui64[4]=0xfe;
- eui64[0] |= 0x02;
-
- i=0;
- while ((skb->nh.ipv6h->saddr.s6_addr[8+i] ==
- eui64[i]) && (i<8)) i++;
-
- if ( i == 8 )
- return 1;
- }
- }
-
- return 0;
+ if (!(skb->mac.raw >= skb->head &&
+ (skb->mac.raw + ETH_HLEN) <= skb->data) &&
+ offset != 0) {
+ *hotdrop = 1;
+ return 0;
+ }
+
+ memset(eui64, 0, sizeof(eui64));
+
+ if (eth_hdr(skb)->h_proto == ntohs(ETH_P_IPV6)) {
+ if (skb->nh.ipv6h->version == 0x6) {
+ memcpy(eui64, eth_hdr(skb)->h_source, 3);
+ memcpy(eui64 + 5, eth_hdr(skb)->h_source + 3, 3);
+ eui64[3] = 0xff;
+ eui64[4] = 0xfe;
+ eui64[0] |= 0x02;
+
+ i = 0;
+ while ((skb->nh.ipv6h->saddr.s6_addr[8+i] == eui64[i])
+ && (i < 8))
+ i++;
+
+ if (i == 8)
+ return 1;
+ }
+ }
+
+ return 0;
}
static int
ip6t_eui64_checkentry(const char *tablename,
- const void *ip,
- void *matchinfo,
- unsigned int matchsize,
- unsigned int hook_mask)
+ const void *ip,
+ void *matchinfo,
+ unsigned int matchsize,
+ unsigned int hook_mask)
{
if (hook_mask
& ~((1 << NF_IP6_PRE_ROUTING) | (1 << NF_IP6_LOCAL_IN) |
static inline int
id_match(u_int32_t min, u_int32_t max, u_int32_t id, int invert)
{
- int r=0;
- DEBUGP("frag id_match:%c 0x%x <= 0x%x <= 0x%x",invert? '!':' ',
- min,id,max);
- r=(id >= min && id <= max) ^ invert;
- DEBUGP(" result %s\n",r? "PASS" : "FAILED");
- return r;
+ int r = 0;
+ DEBUGP("frag id_match:%c 0x%x <= 0x%x <= 0x%x", invert ? '!' : ' ',
+ min, id, max);
+ r = (id >= min && id <= max) ^ invert;
+ DEBUGP(" result %s\n", r ? "PASS" : "FAILED");
+ return r;
}
static int
unsigned int protoff,
int *hotdrop)
{
- struct frag_hdr _frag, *fh;
- const struct ip6t_frag *fraginfo = matchinfo;
- unsigned int ptr;
+ struct frag_hdr _frag, *fh;
+ const struct ip6t_frag *fraginfo = matchinfo;
+ unsigned int ptr;
if (ipv6_find_hdr(skb, &ptr, NEXTHDR_FRAGMENT, NULL) < 0)
return 0;
fh = skb_header_pointer(skb, ptr, sizeof(_frag), &_frag);
- if (fh == NULL){
+ if (fh == NULL) {
*hotdrop = 1;
return 0;
}
- DEBUGP("INFO %04X ", fh->frag_off);
- DEBUGP("OFFSET %04X ", ntohs(fh->frag_off) & ~0x7);
- DEBUGP("RES %02X %04X", fh->reserved, ntohs(fh->frag_off) & 0x6);
- DEBUGP("MF %04X ", fh->frag_off & htons(IP6_MF));
- DEBUGP("ID %u %08X\n", ntohl(fh->identification),
- ntohl(fh->identification));
-
- DEBUGP("IPv6 FRAG id %02X ",
- (id_match(fraginfo->ids[0], fraginfo->ids[1],
- ntohl(fh->identification),
- !!(fraginfo->invflags & IP6T_FRAG_INV_IDS))));
- DEBUGP("res %02X %02X%04X %02X ",
- (fraginfo->flags & IP6T_FRAG_RES), fh->reserved,
- ntohs(fh->frag_off) & 0x6,
- !((fraginfo->flags & IP6T_FRAG_RES)
- && (fh->reserved || (ntohs(fh->frag_off) & 0x06))));
- DEBUGP("first %02X %02X %02X ",
- (fraginfo->flags & IP6T_FRAG_FST),
- ntohs(fh->frag_off) & ~0x7,
- !((fraginfo->flags & IP6T_FRAG_FST)
- && (ntohs(fh->frag_off) & ~0x7)));
- DEBUGP("mf %02X %02X %02X ",
- (fraginfo->flags & IP6T_FRAG_MF),
- ntohs(fh->frag_off) & IP6_MF,
- !((fraginfo->flags & IP6T_FRAG_MF)
- && !((ntohs(fh->frag_off) & IP6_MF))));
- DEBUGP("last %02X %02X %02X\n",
- (fraginfo->flags & IP6T_FRAG_NMF),
- ntohs(fh->frag_off) & IP6_MF,
- !((fraginfo->flags & IP6T_FRAG_NMF)
- && (ntohs(fh->frag_off) & IP6_MF)));
-
- return (fh != NULL)
- &&
- (id_match(fraginfo->ids[0], fraginfo->ids[1],
- ntohl(fh->identification),
- !!(fraginfo->invflags & IP6T_FRAG_INV_IDS)))
- &&
- !((fraginfo->flags & IP6T_FRAG_RES)
- && (fh->reserved || (ntohs(fh->frag_off) & 0x6)))
- &&
- !((fraginfo->flags & IP6T_FRAG_FST)
- && (ntohs(fh->frag_off) & ~0x7))
- &&
- !((fraginfo->flags & IP6T_FRAG_MF)
- && !(ntohs(fh->frag_off) & IP6_MF))
- &&
- !((fraginfo->flags & IP6T_FRAG_NMF)
- && (ntohs(fh->frag_off) & IP6_MF));
+ DEBUGP("INFO %04X ", fh->frag_off);
+ DEBUGP("OFFSET %04X ", ntohs(fh->frag_off) & ~0x7);
+ DEBUGP("RES %02X %04X", fh->reserved, ntohs(fh->frag_off) & 0x6);
+ DEBUGP("MF %04X ", fh->frag_off & htons(IP6_MF));
+ DEBUGP("ID %u %08X\n", ntohl(fh->identification),
+ ntohl(fh->identification));
+
+ DEBUGP("IPv6 FRAG id %02X ",
+ (id_match(fraginfo->ids[0], fraginfo->ids[1],
+ ntohl(fh->identification),
+ !!(fraginfo->invflags & IP6T_FRAG_INV_IDS))));
+ DEBUGP("res %02X %02X%04X %02X ",
+ (fraginfo->flags & IP6T_FRAG_RES), fh->reserved,
+ ntohs(fh->frag_off) & 0x6,
+ !((fraginfo->flags & IP6T_FRAG_RES)
+ && (fh->reserved || (ntohs(fh->frag_off) & 0x06))));
+ DEBUGP("first %02X %02X %02X ",
+ (fraginfo->flags & IP6T_FRAG_FST),
+ ntohs(fh->frag_off) & ~0x7,
+ !((fraginfo->flags & IP6T_FRAG_FST)
+ && (ntohs(fh->frag_off) & ~0x7)));
+ DEBUGP("mf %02X %02X %02X ",
+ (fraginfo->flags & IP6T_FRAG_MF),
+ ntohs(fh->frag_off) & IP6_MF,
+ !((fraginfo->flags & IP6T_FRAG_MF)
+ && !((ntohs(fh->frag_off) & IP6_MF))));
+ DEBUGP("last %02X %02X %02X\n",
+ (fraginfo->flags & IP6T_FRAG_NMF),
+ ntohs(fh->frag_off) & IP6_MF,
+ !((fraginfo->flags & IP6T_FRAG_NMF)
+ && (ntohs(fh->frag_off) & IP6_MF)));
+
+ return (fh != NULL)
+ &&
+ (id_match(fraginfo->ids[0], fraginfo->ids[1],
+ ntohl(fh->identification),
+ !!(fraginfo->invflags & IP6T_FRAG_INV_IDS)))
+ &&
+ !((fraginfo->flags & IP6T_FRAG_RES)
+ && (fh->reserved || (ntohs(fh->frag_off) & 0x6)))
+ &&
+ !((fraginfo->flags & IP6T_FRAG_FST)
+ && (ntohs(fh->frag_off) & ~0x7))
+ &&
+ !((fraginfo->flags & IP6T_FRAG_MF)
+ && !(ntohs(fh->frag_off) & IP6_MF))
+ &&
+ !((fraginfo->flags & IP6T_FRAG_NMF)
+ && (ntohs(fh->frag_off) & IP6_MF));
}
/* Called when user tries to insert an entry of this type. */
static int
checkentry(const char *tablename,
- const void *ip,
- void *matchinfo,
- unsigned int matchinfosize,
- unsigned int hook_mask)
+ const void *ip,
+ void *matchinfo,
+ unsigned int matchinfosize,
+ unsigned int hook_mask)
{
- const struct ip6t_frag *fraginfo = matchinfo;
-
- if (matchinfosize != IP6T_ALIGN(sizeof(struct ip6t_frag))) {
- DEBUGP("ip6t_frag: matchsize %u != %u\n",
- matchinfosize, IP6T_ALIGN(sizeof(struct ip6t_frag)));
- return 0;
- }
- if (fraginfo->invflags & ~IP6T_FRAG_INV_MASK) {
- DEBUGP("ip6t_frag: unknown flags %X\n",
- fraginfo->invflags);
- return 0;
- }
-
- return 1;
+ const struct ip6t_frag *fraginfo = matchinfo;
+
+ if (matchinfosize != IP6T_ALIGN(sizeof(struct ip6t_frag))) {
+ DEBUGP("ip6t_frag: matchsize %u != %u\n",
+ matchinfosize, IP6T_ALIGN(sizeof(struct ip6t_frag)));
+ return 0;
+ }
+ if (fraginfo->invflags & ~IP6T_FRAG_INV_MASK) {
+ DEBUGP("ip6t_frag: unknown flags %X\n", fraginfo->invflags);
+ return 0;
+ }
+
+ return 1;
}
static struct ip6t_match frag_match = {
static int __init init(void)
{
- return ip6t_register_match(&frag_match);
+ return ip6t_register_match(&frag_match);
}
static void __exit cleanup(void)
{
- ip6t_unregister_match(&frag_match);
+ ip6t_unregister_match(&frag_match);
}
module_init(init);
#endif
/*
- * (Type & 0xC0) >> 6
- * 0 -> ignorable
- * 1 -> must drop the packet
- * 2 -> send ICMP PARM PROB regardless and drop packet
- * 3 -> Send ICMP if not a multicast address and drop packet
+ * (Type & 0xC0) >> 6
+ * 0 -> ignorable
+ * 1 -> must drop the packet
+ * 2 -> send ICMP PARM PROB regardless and drop packet
+ * 3 -> Send ICMP if not a multicast address and drop packet
* (Type & 0x20) >> 5
- * 0 -> invariant
- * 1 -> can change the routing
+ * 0 -> invariant
+ * 1 -> can change the routing
* (Type & 0x1F) Type
- * 0 -> Pad1 (only 1 byte!)
- * 1 -> PadN LENGTH info (total length = length + 2)
- * C0 | 2 -> JUMBO 4 x x x x ( xxxx > 64k )
- * 5 -> RTALERT 2 x x
+ * 0 -> Pad1 (only 1 byte!)
+ * 1 -> PadN LENGTH info (total length = length + 2)
+ * C0 | 2 -> JUMBO 4 x x x x ( xxxx > 64k )
+ * 5 -> RTALERT 2 x x
*/
static int
unsigned int protoff,
int *hotdrop)
{
- struct ipv6_opt_hdr _optsh, *oh;
- const struct ip6t_opts *optinfo = matchinfo;
- unsigned int temp;
- unsigned int ptr;
- unsigned int hdrlen = 0;
- unsigned int ret = 0;
- u8 _opttype, *tp = NULL;
- u8 _optlen, *lp = NULL;
- unsigned int optlen;
-
+ struct ipv6_opt_hdr _optsh, *oh;
+ const struct ip6t_opts *optinfo = matchinfo;
+ unsigned int temp;
+ unsigned int ptr;
+ unsigned int hdrlen = 0;
+ unsigned int ret = 0;
+ u8 _opttype, *tp = NULL;
+ u8 _optlen, *lp = NULL;
+ unsigned int optlen;
+
#if HOPBYHOP
if (ipv6_find_hdr(skb, &ptr, NEXTHDR_HOP, NULL) < 0)
#else
#endif
return 0;
- oh = skb_header_pointer(skb, ptr, sizeof(_optsh), &_optsh);
- if (oh == NULL){
- *hotdrop = 1;
- return 0;
- }
-
- hdrlen = ipv6_optlen(oh);
- if (skb->len - ptr < hdrlen){
- /* Packet smaller than it's length field */
- return 0;
- }
-
- DEBUGP("IPv6 OPTS LEN %u %u ", hdrlen, oh->hdrlen);
-
- DEBUGP("len %02X %04X %02X ",
- optinfo->hdrlen, hdrlen,
- (!(optinfo->flags & IP6T_OPTS_LEN) ||
- ((optinfo->hdrlen == hdrlen) ^
- !!(optinfo->invflags & IP6T_OPTS_INV_LEN))));
-
- ret = (oh != NULL)
- &&
- (!(optinfo->flags & IP6T_OPTS_LEN) ||
- ((optinfo->hdrlen == hdrlen) ^
- !!(optinfo->invflags & IP6T_OPTS_INV_LEN)));
-
- ptr += 2;
- hdrlen -= 2;
- if ( !(optinfo->flags & IP6T_OPTS_OPTS) ){
- return ret;
+ oh = skb_header_pointer(skb, ptr, sizeof(_optsh), &_optsh);
+ if (oh == NULL) {
+ *hotdrop = 1;
+ return 0;
+ }
+
+ hdrlen = ipv6_optlen(oh);
+ if (skb->len - ptr < hdrlen) {
+ /* Packet smaller than it's length field */
+ return 0;
+ }
+
+ DEBUGP("IPv6 OPTS LEN %u %u ", hdrlen, oh->hdrlen);
+
+ DEBUGP("len %02X %04X %02X ",
+ optinfo->hdrlen, hdrlen,
+ (!(optinfo->flags & IP6T_OPTS_LEN) ||
+ ((optinfo->hdrlen == hdrlen) ^
+ !!(optinfo->invflags & IP6T_OPTS_INV_LEN))));
+
+ ret = (oh != NULL) &&
+ (!(optinfo->flags & IP6T_OPTS_LEN) ||
+ ((optinfo->hdrlen == hdrlen) ^
+ !!(optinfo->invflags & IP6T_OPTS_INV_LEN)));
+
+ ptr += 2;
+ hdrlen -= 2;
+ if (!(optinfo->flags & IP6T_OPTS_OPTS)) {
+ return ret;
} else if (optinfo->flags & IP6T_OPTS_NSTRICT) {
DEBUGP("Not strict - not implemented");
} else {
DEBUGP("Strict ");
- DEBUGP("#%d ",optinfo->optsnr);
- for(temp=0; temp<optinfo->optsnr; temp++){
+ DEBUGP("#%d ", optinfo->optsnr);
+ for (temp = 0; temp < optinfo->optsnr; temp++) {
/* type field exists ? */
if (hdrlen < 1)
break;
break;
/* Type check */
- if (*tp != (optinfo->opts[temp] & 0xFF00)>>8){
+ if (*tp != (optinfo->opts[temp] & 0xFF00) >> 8) {
DEBUGP("Tbad %02X %02X\n",
*tp,
- (optinfo->opts[temp] & 0xFF00)>>8);
+ (optinfo->opts[temp] & 0xFF00) >> 8);
return 0;
} else {
DEBUGP("Tok ");
}
if (temp == optinfo->optsnr)
return ret;
- else return 0;
+ else
+ return 0;
}
return 0;
/* Called when user tries to insert an entry of this type. */
static int
checkentry(const char *tablename,
- const void *entry,
- void *matchinfo,
- unsigned int matchinfosize,
- unsigned int hook_mask)
+ const void *entry,
+ void *matchinfo,
+ unsigned int matchinfosize,
+ unsigned int hook_mask)
{
- const struct ip6t_opts *optsinfo = matchinfo;
-
- if (matchinfosize != IP6T_ALIGN(sizeof(struct ip6t_opts))) {
- DEBUGP("ip6t_opts: matchsize %u != %u\n",
- matchinfosize, IP6T_ALIGN(sizeof(struct ip6t_opts)));
- return 0;
- }
- if (optsinfo->invflags & ~IP6T_OPTS_INV_MASK) {
- DEBUGP("ip6t_opts: unknown flags %X\n",
- optsinfo->invflags);
- return 0;
- }
-
- return 1;
+ const struct ip6t_opts *optsinfo = matchinfo;
+
+ if (matchinfosize != IP6T_ALIGN(sizeof(struct ip6t_opts))) {
+ DEBUGP("ip6t_opts: matchsize %u != %u\n",
+ matchinfosize, IP6T_ALIGN(sizeof(struct ip6t_opts)));
+ return 0;
+ }
+ if (optsinfo->invflags & ~IP6T_OPTS_INV_MASK) {
+ DEBUGP("ip6t_opts: unknown flags %X\n", optsinfo->invflags);
+ return 0;
+ }
+
+ return 1;
}
static struct ip6t_match opts_match = {
static int __init init(void)
{
- return ip6t_register_match(&opts_match);
+ return ip6t_register_match(&opts_match);
}
static void __exit cleanup(void)
{
- ip6t_unregister_match(&opts_match);
+ ip6t_unregister_match(&opts_match);
}
module_init(init);
len = skb->len - ptr;
temp = 0;
- while (ip6t_ext_hdr(nexthdr)) {
+ while (ip6t_ext_hdr(nexthdr)) {
struct ipv6_opt_hdr _hdr, *hp;
- int hdrlen;
+ int hdrlen;
/* Is there enough space for the next ext header? */
- if (len < (int)sizeof(struct ipv6_opt_hdr))
- return 0;
+ if (len < (int)sizeof(struct ipv6_opt_hdr))
+ return 0;
/* No more exthdr -> evaluate */
- if (nexthdr == NEXTHDR_NONE) {
+ if (nexthdr == NEXTHDR_NONE) {
temp |= MASK_NONE;
break;
}
/* ESP -> evaluate */
- if (nexthdr == NEXTHDR_ESP) {
+ if (nexthdr == NEXTHDR_ESP) {
temp |= MASK_ESP;
break;
}
BUG_ON(hp == NULL);
/* Calculate the header length */
- if (nexthdr == NEXTHDR_FRAGMENT) {
- hdrlen = 8;
- } else if (nexthdr == NEXTHDR_AUTH)
- hdrlen = (hp->hdrlen+2)<<2;
- else
- hdrlen = ipv6_optlen(hp);
+ if (nexthdr == NEXTHDR_FRAGMENT) {
+ hdrlen = 8;
+ } else if (nexthdr == NEXTHDR_AUTH)
+ hdrlen = (hp->hdrlen + 2) << 2;
+ else
+ hdrlen = ipv6_optlen(hp);
/* set the flag */
- switch (nexthdr){
- case NEXTHDR_HOP:
- temp |= MASK_HOPOPTS;
- break;
- case NEXTHDR_ROUTING:
- temp |= MASK_ROUTING;
- break;
- case NEXTHDR_FRAGMENT:
- temp |= MASK_FRAGMENT;
- break;
- case NEXTHDR_AUTH:
- temp |= MASK_AH;
- break;
- case NEXTHDR_DEST:
- temp |= MASK_DSTOPTS;
- break;
- default:
- return 0;
- break;
+ switch (nexthdr) {
+ case NEXTHDR_HOP:
+ temp |= MASK_HOPOPTS;
+ break;
+ case NEXTHDR_ROUTING:
+ temp |= MASK_ROUTING;
+ break;
+ case NEXTHDR_FRAGMENT:
+ temp |= MASK_FRAGMENT;
+ break;
+ case NEXTHDR_AUTH:
+ temp |= MASK_AH;
+ break;
+ case NEXTHDR_DEST:
+ temp |= MASK_DSTOPTS;
+ break;
+ default:
+ return 0;
+ break;
}
- nexthdr = hp->nexthdr;
- len -= hdrlen;
- ptr += hdrlen;
+ nexthdr = hp->nexthdr;
+ len -= hdrlen;
+ ptr += hdrlen;
if (ptr > skb->len)
break;
- }
+ }
- if ( (nexthdr != NEXTHDR_NONE ) && (nexthdr != NEXTHDR_ESP) )
+ if ((nexthdr != NEXTHDR_NONE) && (nexthdr != NEXTHDR_ESP))
temp |= MASK_PROTO;
if (info->modeflag)
return 0;
/* invflags is 0 or 0xff in hard mode */
- if ((!info->modeflag) && info->invflags != 0x00
- && info->invflags != 0xFF)
+ if ((!info->modeflag) && info->invflags != 0x00 &&
+ info->invflags != 0xFF)
return 0;
return 1;
.me = THIS_MODULE,
};
-static int __init ipv6header_init(void)
+static int __init ipv6header_init(void)
{
return ip6t_register_match(&ip6t_ipv6header_match);
}
module_init(ipv6header_init);
module_exit(ipv6header_exit);
-
if (!skb->sk || !skb->sk->sk_socket || !skb->sk->sk_socket->file)
return 0;
- if(info->match & IP6T_OWNER_UID) {
- if((skb->sk->sk_socket->file->f_uid != info->uid) ^
+ if (info->match & IP6T_OWNER_UID) {
+ if ((skb->sk->sk_socket->file->f_uid != info->uid) ^
!!(info->invert & IP6T_OWNER_UID))
return 0;
}
- if(info->match & IP6T_OWNER_GID) {
- if((skb->sk->sk_socket->file->f_gid != info->gid) ^
+ if (info->match & IP6T_OWNER_GID) {
+ if ((skb->sk->sk_socket->file->f_gid != info->gid) ^
!!(info->invert & IP6T_OWNER_GID))
return 0;
}
static int
checkentry(const char *tablename,
- const void *ip,
- void *matchinfo,
- unsigned int matchsize,
- unsigned int hook_mask)
+ const void *ip,
+ void *matchinfo,
+ unsigned int matchsize,
+ unsigned int hook_mask)
{
const struct ip6t_owner_info *info = matchinfo;
- if (hook_mask
- & ~((1 << NF_IP6_LOCAL_OUT) | (1 << NF_IP6_POST_ROUTING))) {
- printk("ip6t_owner: only valid for LOCAL_OUT or POST_ROUTING.\n");
- return 0;
- }
+ if (hook_mask
+ & ~((1 << NF_IP6_LOCAL_OUT) | (1 << NF_IP6_POST_ROUTING))) {
+ printk("ip6t_owner: only valid for LOCAL_OUT or POST_ROUTING.\n");
+ return 0;
+ }
if (matchsize != IP6T_ALIGN(sizeof(struct ip6t_owner_info)))
return 0;
- if (info->match & (IP6T_OWNER_PID|IP6T_OWNER_SID)) {
+ if (info->match & (IP6T_OWNER_PID | IP6T_OWNER_SID)) {
printk("ipt_owner: pid and sid matching "
"not supported anymore\n");
return 0;
return ret;
}
-static int checkentry(const char *tablename, const struct ip6t_ip6 *ip,
+static int checkentry(const char *tablename, const void *ip_void,
void *matchinfo, unsigned int matchsize,
unsigned int hook_mask)
{
static inline int
segsleft_match(u_int32_t min, u_int32_t max, u_int32_t id, int invert)
{
- int r=0;
- DEBUGP("rt segsleft_match:%c 0x%x <= 0x%x <= 0x%x",invert? '!':' ',
- min,id,max);
- r=(id >= min && id <= max) ^ invert;
- DEBUGP(" result %s\n",r? "PASS" : "FAILED");
- return r;
+ int r = 0;
+ DEBUGP("rt segsleft_match:%c 0x%x <= 0x%x <= 0x%x",
+ invert ? '!' : ' ', min, id, max);
+ r = (id >= min && id <= max) ^ invert;
+ DEBUGP(" result %s\n", r ? "PASS" : "FAILED");
+ return r;
}
static int
unsigned int protoff,
int *hotdrop)
{
- struct ipv6_rt_hdr _route, *rh;
- const struct ip6t_rt *rtinfo = matchinfo;
- unsigned int temp;
- unsigned int ptr;
- unsigned int hdrlen = 0;
- unsigned int ret = 0;
- struct in6_addr *ap, _addr;
+ struct ipv6_rt_hdr _route, *rh;
+ const struct ip6t_rt *rtinfo = matchinfo;
+ unsigned int temp;
+ unsigned int ptr;
+ unsigned int hdrlen = 0;
+ unsigned int ret = 0;
+ struct in6_addr *ap, _addr;
if (ipv6_find_hdr(skb, &ptr, NEXTHDR_ROUTING, NULL) < 0)
return 0;
- rh = skb_header_pointer(skb, ptr, sizeof(_route), &_route);
- if (rh == NULL){
- *hotdrop = 1;
- return 0;
- }
-
- hdrlen = ipv6_optlen(rh);
- if (skb->len - ptr < hdrlen){
- /* Pcket smaller than its length field */
- return 0;
- }
-
- DEBUGP("IPv6 RT LEN %u %u ", hdrlen, rh->hdrlen);
- DEBUGP("TYPE %04X ", rh->type);
- DEBUGP("SGS_LEFT %u %02X\n", rh->segments_left, rh->segments_left);
-
- DEBUGP("IPv6 RT segsleft %02X ",
- (segsleft_match(rtinfo->segsleft[0], rtinfo->segsleft[1],
- rh->segments_left,
- !!(rtinfo->invflags & IP6T_RT_INV_SGS))));
- DEBUGP("type %02X %02X %02X ",
- rtinfo->rt_type, rh->type,
- (!(rtinfo->flags & IP6T_RT_TYP) ||
- ((rtinfo->rt_type == rh->type) ^
- !!(rtinfo->invflags & IP6T_RT_INV_TYP))));
- DEBUGP("len %02X %04X %02X ",
- rtinfo->hdrlen, hdrlen,
- (!(rtinfo->flags & IP6T_RT_LEN) ||
- ((rtinfo->hdrlen == hdrlen) ^
- !!(rtinfo->invflags & IP6T_RT_INV_LEN))));
- DEBUGP("res %02X %02X %02X ",
- (rtinfo->flags & IP6T_RT_RES), ((struct rt0_hdr *)rh)->reserved,
- !((rtinfo->flags & IP6T_RT_RES) && (((struct rt0_hdr *)rh)->reserved)));
-
- ret = (rh != NULL)
- &&
- (segsleft_match(rtinfo->segsleft[0], rtinfo->segsleft[1],
- rh->segments_left,
- !!(rtinfo->invflags & IP6T_RT_INV_SGS)))
- &&
- (!(rtinfo->flags & IP6T_RT_LEN) ||
- ((rtinfo->hdrlen == hdrlen) ^
- !!(rtinfo->invflags & IP6T_RT_INV_LEN)))
- &&
- (!(rtinfo->flags & IP6T_RT_TYP) ||
- ((rtinfo->rt_type == rh->type) ^
- !!(rtinfo->invflags & IP6T_RT_INV_TYP)));
+ rh = skb_header_pointer(skb, ptr, sizeof(_route), &_route);
+ if (rh == NULL) {
+ *hotdrop = 1;
+ return 0;
+ }
+
+ hdrlen = ipv6_optlen(rh);
+ if (skb->len - ptr < hdrlen) {
+ /* Pcket smaller than its length field */
+ return 0;
+ }
+
+ DEBUGP("IPv6 RT LEN %u %u ", hdrlen, rh->hdrlen);
+ DEBUGP("TYPE %04X ", rh->type);
+ DEBUGP("SGS_LEFT %u %02X\n", rh->segments_left, rh->segments_left);
+
+ DEBUGP("IPv6 RT segsleft %02X ",
+ (segsleft_match(rtinfo->segsleft[0], rtinfo->segsleft[1],
+ rh->segments_left,
+ !!(rtinfo->invflags & IP6T_RT_INV_SGS))));
+ DEBUGP("type %02X %02X %02X ",
+ rtinfo->rt_type, rh->type,
+ (!(rtinfo->flags & IP6T_RT_TYP) ||
+ ((rtinfo->rt_type == rh->type) ^
+ !!(rtinfo->invflags & IP6T_RT_INV_TYP))));
+ DEBUGP("len %02X %04X %02X ",
+ rtinfo->hdrlen, hdrlen,
+ (!(rtinfo->flags & IP6T_RT_LEN) ||
+ ((rtinfo->hdrlen == hdrlen) ^
+ !!(rtinfo->invflags & IP6T_RT_INV_LEN))));
+ DEBUGP("res %02X %02X %02X ",
+ (rtinfo->flags & IP6T_RT_RES),
+ ((struct rt0_hdr *)rh)->reserved,
+ !((rtinfo->flags & IP6T_RT_RES) &&
+ (((struct rt0_hdr *)rh)->reserved)));
+
+ ret = (rh != NULL)
+ &&
+ (segsleft_match(rtinfo->segsleft[0], rtinfo->segsleft[1],
+ rh->segments_left,
+ !!(rtinfo->invflags & IP6T_RT_INV_SGS)))
+ &&
+ (!(rtinfo->flags & IP6T_RT_LEN) ||
+ ((rtinfo->hdrlen == hdrlen) ^
+ !!(rtinfo->invflags & IP6T_RT_INV_LEN)))
+ &&
+ (!(rtinfo->flags & IP6T_RT_TYP) ||
+ ((rtinfo->rt_type == rh->type) ^
+ !!(rtinfo->invflags & IP6T_RT_INV_TYP)));
if (ret && (rtinfo->flags & IP6T_RT_RES)) {
u_int32_t *rp, _reserved;
rp = skb_header_pointer(skb,
- ptr + offsetof(struct rt0_hdr, reserved),
- sizeof(_reserved), &_reserved);
+ ptr + offsetof(struct rt0_hdr,
+ reserved),
+ sizeof(_reserved),
+ &_reserved);
ret = (*rp == 0);
}
- DEBUGP("#%d ",rtinfo->addrnr);
- if ( !(rtinfo->flags & IP6T_RT_FST) ){
- return ret;
+ DEBUGP("#%d ", rtinfo->addrnr);
+ if (!(rtinfo->flags & IP6T_RT_FST)) {
+ return ret;
} else if (rtinfo->flags & IP6T_RT_FST_NSTRICT) {
DEBUGP("Not strict ");
- if ( rtinfo->addrnr > (unsigned int)((hdrlen-8)/16) ){
+ if (rtinfo->addrnr > (unsigned int)((hdrlen - 8) / 16)) {
DEBUGP("There isn't enough space\n");
return 0;
} else {
unsigned int i = 0;
- DEBUGP("#%d ",rtinfo->addrnr);
- for(temp=0; temp<(unsigned int)((hdrlen-8)/16); temp++){
+ DEBUGP("#%d ", rtinfo->addrnr);
+ for (temp = 0;
+ temp < (unsigned int)((hdrlen - 8) / 16);
+ temp++) {
ap = skb_header_pointer(skb,
ptr
+ sizeof(struct rt0_hdr)
BUG_ON(ap == NULL);
if (ipv6_addr_equal(ap, &rtinfo->addrs[i])) {
- DEBUGP("i=%d temp=%d;\n",i,temp);
+ DEBUGP("i=%d temp=%d;\n", i, temp);
i++;
}
- if (i==rtinfo->addrnr) break;
+ if (i == rtinfo->addrnr)
+ break;
}
DEBUGP("i=%d #%d\n", i, rtinfo->addrnr);
if (i == rtinfo->addrnr)
return ret;
- else return 0;
+ else
+ return 0;
}
} else {
DEBUGP("Strict ");
- if ( rtinfo->addrnr > (unsigned int)((hdrlen-8)/16) ){
+ if (rtinfo->addrnr > (unsigned int)((hdrlen - 8) / 16)) {
DEBUGP("There isn't enough space\n");
return 0;
} else {
- DEBUGP("#%d ",rtinfo->addrnr);
- for(temp=0; temp<rtinfo->addrnr; temp++){
+ DEBUGP("#%d ", rtinfo->addrnr);
+ for (temp = 0; temp < rtinfo->addrnr; temp++) {
ap = skb_header_pointer(skb,
ptr
+ sizeof(struct rt0_hdr)
break;
}
DEBUGP("temp=%d #%d\n", temp, rtinfo->addrnr);
- if ((temp == rtinfo->addrnr) && (temp == (unsigned int)((hdrlen-8)/16)))
+ if ((temp == rtinfo->addrnr) &&
+ (temp == (unsigned int)((hdrlen - 8) / 16)))
return ret;
- else return 0;
+ else
+ return 0;
}
}
/* Called when user tries to insert an entry of this type. */
static int
checkentry(const char *tablename,
- const void *entry,
- void *matchinfo,
- unsigned int matchinfosize,
- unsigned int hook_mask)
+ const void *entry,
+ void *matchinfo,
+ unsigned int matchinfosize,
+ unsigned int hook_mask)
{
- const struct ip6t_rt *rtinfo = matchinfo;
-
- if (matchinfosize != IP6T_ALIGN(sizeof(struct ip6t_rt))) {
- DEBUGP("ip6t_rt: matchsize %u != %u\n",
- matchinfosize, IP6T_ALIGN(sizeof(struct ip6t_rt)));
- return 0;
- }
- if (rtinfo->invflags & ~IP6T_RT_INV_MASK) {
- DEBUGP("ip6t_rt: unknown flags %X\n",
- rtinfo->invflags);
- return 0;
- }
- if ( (rtinfo->flags & (IP6T_RT_RES|IP6T_RT_FST_MASK)) &&
- (!(rtinfo->flags & IP6T_RT_TYP) ||
- (rtinfo->rt_type != 0) ||
- (rtinfo->invflags & IP6T_RT_INV_TYP)) ) {
- DEBUGP("`--rt-type 0' required before `--rt-0-*'");
- return 0;
- }
-
- return 1;
+ const struct ip6t_rt *rtinfo = matchinfo;
+
+ if (matchinfosize != IP6T_ALIGN(sizeof(struct ip6t_rt))) {
+ DEBUGP("ip6t_rt: matchsize %u != %u\n",
+ matchinfosize, IP6T_ALIGN(sizeof(struct ip6t_rt)));
+ return 0;
+ }
+ if (rtinfo->invflags & ~IP6T_RT_INV_MASK) {
+ DEBUGP("ip6t_rt: unknown flags %X\n", rtinfo->invflags);
+ return 0;
+ }
+ if ((rtinfo->flags & (IP6T_RT_RES | IP6T_RT_FST_MASK)) &&
+ (!(rtinfo->flags & IP6T_RT_TYP) ||
+ (rtinfo->rt_type != 0) ||
+ (rtinfo->invflags & IP6T_RT_INV_TYP))) {
+ DEBUGP("`--rt-type 0' required before `--rt-0-*'");
+ return 0;
+ }
+
+ return 1;
}
static struct ip6t_match rt_match = {
static int __init init(void)
{
- return ip6t_register_match(&rt_match);
+ return ip6t_register_match(&rt_match);
}
static void __exit cleanup(void)
{
- ip6t_unregister_match(&rt_match);
+ ip6t_unregister_match(&rt_match);
}
module_init(init);
return -ENOBUFS;
hdr = (struct sadb_msg *) skb_put(skb, sizeof(struct sadb_msg));
hdr->sadb_msg_satype = pfkey_proto2satype(c->data.proto);
+ hdr->sadb_msg_type = SADB_FLUSH;
hdr->sadb_msg_seq = c->seq;
hdr->sadb_msg_pid = c->pid;
hdr->sadb_msg_version = PF_KEY_V2;
if (!skb_out)
return -ENOBUFS;
hdr = (struct sadb_msg *) skb_put(skb_out, sizeof(struct sadb_msg));
+ hdr->sadb_msg_type = SADB_X_SPDFLUSH;
hdr->sadb_msg_seq = c->seq;
hdr->sadb_msg_pid = c->pid;
hdr->sadb_msg_version = PF_KEY_V2;
*/
err = -EMSGSIZE;
- if(len>dev->mtu+dev->hard_header_len)
+ if (len > dev->mtu + dev->hard_header_len)
goto out_unlock;
err = -ENOBUFS;
* Check legality
*/
- if(addr_len!=sizeof(struct sockaddr))
+ if (addr_len != sizeof(struct sockaddr))
return -EINVAL;
strlcpy(name,uaddr->sa_data,sizeof(name));
* retries.
*/
- if(skb==NULL)
+ if (skb == NULL)
goto out;
/*
if (level != SOL_PACKET)
return -ENOPROTOOPT;
- if (get_user(len,optlen))
- return -EFAULT;
+ if (get_user(len, optlen))
+ return -EFAULT;
if (len < 0)
return -EINVAL;
return -ENOPROTOOPT;
}
- if (put_user(len, optlen))
- return -EFAULT;
- return 0;
+ if (put_user(len, optlen))
+ return -EFAULT;
+ return 0;
}
for (;;) {
unsigned long jif;
- signed long timeout;
+ long timeout;
/* deal with the server being asked to die */
if (krxtimod_die) {
static int rxrpc_proc_peers_show(struct seq_file *m, void *v)
{
struct rxrpc_peer *peer = list_entry(v, struct rxrpc_peer, proc_link);
- signed long timeout;
+ long timeout;
/* display header on line 1 */
if (v == SEQ_START_TOKEN) {
/* display one peer per line on subsequent lines */
timeout = 0;
if (!list_empty(&peer->timeout.link))
- timeout = (signed long) peer->timeout.timo_jif -
- (signed long) jiffies;
+ timeout = (long) peer->timeout.timo_jif -
+ (long) jiffies;
seq_printf(m, "%5hu %08x %5d %5d %8ld %5Zu %7lu\n",
peer->trans->port,
static int rxrpc_proc_conns_show(struct seq_file *m, void *v)
{
struct rxrpc_connection *conn;
- signed long timeout;
+ long timeout;
conn = list_entry(v, struct rxrpc_connection, proc_link);
/* display one conn per line on subsequent lines */
timeout = 0;
if (!list_empty(&conn->timeout.link))
- timeout = (signed long) conn->timeout.timo_jif -
- (signed long) jiffies;
+ timeout = (long) conn->timeout.timo_jif -
+ (long) jiffies;
seq_printf(m,
"%5hu %08x %5hu %04hx %08x %-3.3s %08x %08x %5Zu %8ld\n",
}
sch_tree_unlock(sch);
- for (i=0; i<=TC_PRIO_MAX; i++) {
- int band = q->prio2band[i];
- if (q->queues[band] == &noop_qdisc) {
+ for (i=0; i<q->bands; i++) {
+ if (q->queues[i] == &noop_qdisc) {
struct Qdisc *child;
child = qdisc_create_dflt(sch->dev, &pfifo_qdisc_ops);
if (child) {
sch_tree_lock(sch);
- child = xchg(&q->queues[band], child);
+ child = xchg(&q->queues[i], child);
if (child != &noop_qdisc)
qdisc_destroy(child);
if (!(iph->frag_off&htons(IP_MF|IP_OFFSET)) &&
(iph->protocol == IPPROTO_TCP ||
iph->protocol == IPPROTO_UDP ||
+ iph->protocol == IPPROTO_SCTP ||
+ iph->protocol == IPPROTO_DCCP ||
iph->protocol == IPPROTO_ESP))
h2 ^= *(((u32*)iph) + iph->ihl);
break;
h2 = iph->saddr.s6_addr32[3]^iph->nexthdr;
if (iph->nexthdr == IPPROTO_TCP ||
iph->nexthdr == IPPROTO_UDP ||
+ iph->nexthdr == IPPROTO_SCTP ||
+ iph->nexthdr == IPPROTO_DCCP ||
iph->nexthdr == IPPROTO_ESP)
h2 ^= *(u32*)&iph[1];
break;
*/
sctp_bh_lock_sock(sk);
+ /* It is possible that the association could have moved to a different
+ * socket if it is peeled off. If so, update the sk.
+ */
+ if (sk != rcvr->sk) {
+ sctp_bh_lock_sock(rcvr->sk);
+ sctp_bh_unlock_sock(sk);
+ sk = rcvr->sk;
+ }
+
if (sock_owned_by_user(sk))
sk_add_backlog(sk, skb);
else
sctp_backlog_rcv(sk, skb);
- /* Release the sock and any reference counts we took in the
- * lookup calls.
+ /* Release the sock and the sock ref we took in the lookup calls.
+ * The asoc/ep ref will be released in sctp_backlog_rcv.
*/
sctp_bh_unlock_sock(sk);
- if (asoc)
- sctp_association_put(asoc);
- else
- sctp_endpoint_put(ep);
sock_put(sk);
+
return ret;
discard_it:
int sctp_backlog_rcv(struct sock *sk, struct sk_buff *skb)
{
struct sctp_chunk *chunk = SCTP_INPUT_CB(skb)->chunk;
- struct sctp_inq *inqueue = &chunk->rcvr->inqueue;
-
- sctp_inq_push(inqueue, chunk);
+ struct sctp_inq *inqueue = NULL;
+ struct sctp_ep_common *rcvr = NULL;
+
+ rcvr = chunk->rcvr;
+
+ BUG_TRAP(rcvr->sk == sk);
+
+ if (rcvr->dead) {
+ sctp_chunk_free(chunk);
+ } else {
+ inqueue = &chunk->rcvr->inqueue;
+ sctp_inq_push(inqueue, chunk);
+ }
+
+ /* Release the asoc/ep ref we took in the lookup calls in sctp_rcv. */
+ if (SCTP_EP_TYPE_ASSOCIATION == rcvr->type)
+ sctp_association_put(sctp_assoc(rcvr));
+ else
+ sctp_endpoint_put(sctp_ep(rcvr));
+
return 0;
}
+void sctp_backlog_migrate(struct sctp_association *assoc,
+ struct sock *oldsk, struct sock *newsk)
+{
+ struct sk_buff *skb;
+ struct sctp_chunk *chunk;
+
+ skb = oldsk->sk_backlog.head;
+ oldsk->sk_backlog.head = oldsk->sk_backlog.tail = NULL;
+ while (skb != NULL) {
+ struct sk_buff *next = skb->next;
+
+ chunk = SCTP_INPUT_CB(skb)->chunk;
+ skb->next = NULL;
+ if (&assoc->base == chunk->rcvr)
+ sk_add_backlog(newsk, skb);
+ else
+ sk_add_backlog(oldsk, skb);
+ skb = next;
+ }
+}
+
/* Handle icmp frag needed error. */
void sctp_icmp_frag_needed(struct sock *sk, struct sctp_association *asoc,
struct sctp_transport *t, __u32 pmtu)
sctp_errhdr_t *err;
ch = (sctp_chunkhdr_t *) skb->data;
- ch_end = ((__u8 *) ch) + WORD_ROUND(ntohs(ch->length));
/* Scan through all the chunks in the packet. */
- while (ch_end > (__u8 *)ch && ch_end < skb->tail) {
+ do {
+ /* Break out if chunk length is less then minimal. */
+ if (ntohs(ch->length) < sizeof(sctp_chunkhdr_t))
+ break;
+
+ ch_end = ((__u8 *)ch) + WORD_ROUND(ntohs(ch->length));
+ if (ch_end > skb->tail)
+ break;
/* RFC 8.4, 2) If the OOTB packet contains an ABORT chunk, the
* receiver MUST silently discard the OOTB packet and take no
}
ch = (sctp_chunkhdr_t *) ch_end;
- ch_end = ((__u8 *) ch) + WORD_ROUND(ntohs(ch->length));
- }
+ } while (ch_end < skb->tail);
return 0;
/* If there is a packet which is currently being worked on,
* free it as well.
*/
- if (queue->in_progress)
+ if (queue->in_progress) {
sctp_chunk_free(queue->in_progress);
+ queue->in_progress = NULL;
+ }
if (queue->malloced) {
/* Dump the master memory segment. */
static void * sctp_eps_seq_start(struct seq_file *seq, loff_t *pos)
{
- if (*pos > sctp_ep_hashsize)
+ if (*pos >= sctp_ep_hashsize)
return NULL;
if (*pos < 0)
if (*pos == 0)
seq_printf(seq, " ENDPT SOCK STY SST HBKT LPORT UID INODE LADDRS\n");
- ++*pos;
-
return (void *)pos;
}
static void * sctp_eps_seq_next(struct seq_file *seq, void *v, loff_t *pos)
{
- if (*pos > sctp_ep_hashsize)
+ if (++*pos >= sctp_ep_hashsize)
return NULL;
- ++*pos;
-
return pos;
}
struct sctp_ep_common *epb;
struct sctp_endpoint *ep;
struct sock *sk;
- int hash = *(int *)v;
+ int hash = *(loff_t *)v;
- if (hash > sctp_ep_hashsize)
+ if (hash >= sctp_ep_hashsize)
return -ENOMEM;
- head = &sctp_ep_hashtable[hash-1];
+ head = &sctp_ep_hashtable[hash];
sctp_local_bh_disable();
read_lock(&head->lock);
for (epb = head->chain; epb; epb = epb->next) {
ep = sctp_ep(epb);
sk = epb->sk;
seq_printf(seq, "%8p %8p %-3d %-3d %-4d %-5d %5d %5lu ", ep, sk,
- sctp_sk(sk)->type, sk->sk_state, hash-1,
+ sctp_sk(sk)->type, sk->sk_state, hash,
epb->bind_addr.port,
sock_i_uid(sk), sock_i_ino(sk));
static void * sctp_assocs_seq_start(struct seq_file *seq, loff_t *pos)
{
- if (*pos > sctp_assoc_hashsize)
+ if (*pos >= sctp_assoc_hashsize)
return NULL;
if (*pos < 0)
seq_printf(seq, " ASSOC SOCK STY SST ST HBKT ASSOC-ID TX_QUEUE RX_QUEUE UID INODE LPORT "
"RPORT LADDRS <-> RADDRS\n");
- ++*pos;
-
return (void *)pos;
}
static void * sctp_assocs_seq_next(struct seq_file *seq, void *v, loff_t *pos)
{
- if (*pos > sctp_assoc_hashsize)
+ if (++*pos >= sctp_assoc_hashsize)
return NULL;
- ++*pos;
-
return pos;
}
struct sctp_ep_common *epb;
struct sctp_association *assoc;
struct sock *sk;
- int hash = *(int *)v;
+ int hash = *(loff_t *)v;
- if (hash > sctp_assoc_hashsize)
+ if (hash >= sctp_assoc_hashsize)
return -ENOMEM;
- head = &sctp_assoc_hashtable[hash-1];
+ head = &sctp_assoc_hashtable[hash];
sctp_local_bh_disable();
read_lock(&head->lock);
for (epb = head->chain; epb; epb = epb->next) {
seq_printf(seq,
"%8p %8p %-3d %-3d %-2d %-4d %4d %8d %8d %7d %5lu %-5d %5d ",
assoc, sk, sctp_sk(sk)->type, sk->sk_state,
- assoc->state, hash-1, assoc->assoc_id,
+ assoc->state, hash, assoc->assoc_id,
(sk->sk_rcvbuf - assoc->rwnd),
assoc->sndbuf_used,
sock_i_uid(sk), sock_i_ino(sk),
unsigned int keylen;
char *key;
- headersize = sizeof(sctp_paramhdr_t) + SCTP_SECRET_SIZE;
+ /* Header size is static data prior to the actual cookie, including
+ * any padding.
+ */
+ headersize = sizeof(sctp_paramhdr_t) +
+ (sizeof(struct sctp_signed_cookie) -
+ sizeof(struct sctp_cookie));
bodysize = sizeof(struct sctp_cookie)
+ ntohs(init_chunk->chunk_hdr->length) + addrs_len;
struct sctp_signed_cookie *cookie;
struct sctp_cookie *bear_cookie;
int headersize, bodysize, fixed_size;
- __u8 digest[SCTP_SIGNATURE_SIZE];
+ __u8 *digest = ep->digest;
struct scatterlist sg;
unsigned int keylen, len;
char *key;
struct sk_buff *skb = chunk->skb;
struct timeval tv;
- headersize = sizeof(sctp_chunkhdr_t) + SCTP_SECRET_SIZE;
+ /* Header size is static data prior to the actual cookie, including
+ * any padding.
+ */
+ headersize = sizeof(sctp_chunkhdr_t) +
+ (sizeof(struct sctp_signed_cookie) -
+ sizeof(struct sctp_cookie));
bodysize = ntohs(chunk->chunk_hdr->length) - headersize;
fixed_size = headersize + sizeof(struct sctp_cookie);
"T1 INIT Timeout adjustment"
" init_err_counter: %d"
" cycle: %d"
- " timeout: %d\n",
+ " timeout: %ld\n",
asoc->init_err_counter,
asoc->init_cycle,
asoc->timeouts[SCTP_EVENT_TIMEOUT_T1_INIT]);
SCTP_DEBUG_PRINTK(
"T1 COOKIE Timeout adjustment"
" init_err_counter: %d"
- " timeout: %d\n",
+ " timeout: %ld\n",
asoc->init_err_counter,
asoc->timeouts[SCTP_EVENT_TIMEOUT_T1_COOKIE]);
{
struct sctp_transport *transport = (struct sctp_transport *) arg;
- if (asoc->overall_error_count > asoc->max_retrans) {
+ if (asoc->overall_error_count >= asoc->max_retrans) {
/* CMD_ASSOC_FAILED calls CMD_DELETE_TCB. */
sctp_add_cmd_sf(commands, SCTP_CMD_ASSOC_FAILED,
SCTP_U32(SCTP_ERROR_NO_ERROR));
struct sctp_bind_addr *bp;
int attempts = asoc->init_err_counter + 1;
- if (attempts >= asoc->max_init_attempts) {
+ if (attempts > asoc->max_init_attempts) {
sctp_add_cmd_sf(commands, SCTP_CMD_INIT_FAILED,
SCTP_U32(SCTP_ERROR_STALE_COOKIE));
return SCTP_DISPOSITION_DELETE_TCB;
break;
ch_end = ((__u8 *)ch) + WORD_ROUND(ntohs(ch->length));
+ if (ch_end > skb->tail)
+ break;
if (SCTP_CID_SHUTDOWN_ACK == ch->type)
ootb_shut_ack = 1;
SCTP_DEBUG_PRINTK("Timer T1 expired (INIT).\n");
- if (attempts < asoc->max_init_attempts) {
+ if (attempts <= asoc->max_init_attempts) {
bp = (struct sctp_bind_addr *) &asoc->base.bind_addr;
repl = sctp_make_init(asoc, bp, GFP_ATOMIC, 0);
if (!repl)
SCTP_DEBUG_PRINTK("Timer T1 expired (COOKIE-ECHO).\n");
- if (attempts < asoc->max_init_attempts) {
+ if (attempts <= asoc->max_init_attempts) {
repl = sctp_make_cookie_echo(asoc, NULL);
if (!repl)
return SCTP_DISPOSITION_NOMEM;
sp->hbinterval = jiffies_to_msecs(sctp_hb_interval);
sp->pathmaxrxt = sctp_max_retrans_path;
sp->pathmtu = 0; // allow default discovery
- sp->sackdelay = sctp_sack_timeout;
+ sp->sackdelay = jiffies_to_msecs(sctp_sack_timeout);
sp->param_flags = SPP_HB_ENABLE |
SPP_PMTUD_ENABLE |
SPP_SACKDELAY_ENABLE;
return err;
do_error:
- if (asoc->init_err_counter + 1 >= asoc->max_init_attempts)
+ if (asoc->init_err_counter + 1 > asoc->max_init_attempts)
err = -ETIMEDOUT;
else
err = -ECONNREFUSED;
*/
newsp->type = type;
+ spin_lock_bh(&oldsk->sk_lock.slock);
+ /* Migrate the backlog from oldsk to newsk. */
+ sctp_backlog_migrate(assoc, oldsk, newsk);
/* Migrate the association to the new socket. */
sctp_assoc_migrate(assoc, newsk);
+ spin_unlock_bh(&oldsk->sk_lock.slock);
/* If the association on the newsk is already closed before accept()
* is called, set RCV_SHUTDOWN flag.
.ctl_name = NET_SCTP_PRESERVE_ENABLE,
.procname = "cookie_preserve_enable",
.data = &sctp_cookie_preserve_enable,
- .maxlen = sizeof(long),
+ .maxlen = sizeof(int),
.mode = 0644,
- .proc_handler = &proc_doulongvec_ms_jiffies_minmax,
- .strategy = &sctp_sysctl_jiffies_ms,
- .extra1 = &rto_timer_min,
- .extra2 = &rto_timer_max
+ .proc_handler = &proc_dointvec
},
{
.ctl_name = NET_SCTP_RTO_ALPHA,
tp->rto_pending = 0;
SCTP_DEBUG_PRINTK("%s: transport: %p, rtt: %d, srtt: %d "
- "rttvar: %d, rto: %d\n", __FUNCTION__,
+ "rttvar: %d, rto: %ld\n", __FUNCTION__,
tp, rtt, tp->srtt, tp->rttvar, tp->rto);
}
gss_mech_put(gm);
goto out;
}
- if (gss_import_sec_context(buf, len, gm, &rsci.mechctx)) {
+ status = gss_import_sec_context(buf, len, gm, &rsci.mechctx);
+ if (status) {
gss_mech_put(gm);
goto out;
}
return SVC_OK;
}
+static int
+gss_write_null_verf(struct svc_rqst *rqstp)
+{
+ u32 *p;
+
+ svc_putu32(rqstp->rq_res.head, htonl(RPC_AUTH_NULL));
+ p = rqstp->rq_res.head->iov_base + rqstp->rq_res.head->iov_len;
+ /* don't really need to check if head->iov_len > PAGE_SIZE ... */
+ *p++ = 0;
+ if (!xdr_ressize_check(rqstp, p))
+ return -1;
+ return 0;
+}
+
static int
gss_write_verf(struct svc_rqst *rqstp, struct gss_ctx *ctx_id, u32 seq)
{
return SVC_OK;
}
+static inline int
+gss_write_init_verf(struct svc_rqst *rqstp, struct rsi *rsip)
+{
+ struct rsc *rsci;
+
+ if (rsip->major_status != GSS_S_COMPLETE)
+ return gss_write_null_verf(rqstp);
+ rsci = gss_svc_searchbyctx(&rsip->out_handle);
+ if (rsci == NULL) {
+ rsip->major_status = GSS_S_NO_CONTEXT;
+ return gss_write_null_verf(rqstp);
+ }
+ return gss_write_verf(rqstp, rsci->mechctx, GSS_SEQ_WIN);
+}
+
/*
* Accept an rpcsec packet.
* If context establishment, punt to user space
case -ENOENT:
goto drop;
case 0:
- rsci = gss_svc_searchbyctx(&rsip->out_handle);
- if (!rsci) {
- goto drop;
- }
- if (gss_write_verf(rqstp, rsci->mechctx, GSS_SEQ_WIN))
+ if (gss_write_init_verf(rqstp, rsip))
goto drop;
if (resv->iov_len + 4 > PAGE_SIZE)
goto drop;
dr->handle.owner = rqstp->rq_server;
dr->prot = rqstp->rq_prot;
dr->addr = rqstp->rq_addr;
+ dr->daddr = rqstp->rq_daddr;
dr->argslen = rqstp->rq_arg.len >> 2;
memcpy(dr->args, rqstp->rq_arg.head[0].iov_base-skip, dr->argslen<<2);
}
rqstp->rq_arg.len = dr->argslen<<2;
rqstp->rq_prot = dr->prot;
rqstp->rq_addr = dr->addr;
+ rqstp->rq_daddr = dr->daddr;
return dr->argslen<<2;
}
config TIPC
tristate "The TIPC Protocol (EXPERIMENTAL)"
---help---
- TBD.
+ The Transparent Inter Process Communication (TIPC) protocol is
+ specially designed for intra cluster communication. This protocol
+ originates from Ericsson where it has been used in carrier grade
+ cluster applications for many years.
+
+ For more information about TIPC, see http://tipc.sourceforge.net.
This protocol support is also available as a module ( = code which
can be inserted in and removed from the running kernel whenever you
}
/**
- * addr_domain_valid - validates a network domain address
+ * tipc_addr_domain_valid - validates a network domain address
*
* Accepts <Z.C.N>, <Z.C.0>, <Z.0.0>, and <0.0.0>,
* where Z, C, and N are non-zero and do not exceed the configured limits.
* Returns 1 if domain address is valid, otherwise 0
*/
-int addr_domain_valid(u32 addr)
+int tipc_addr_domain_valid(u32 addr)
{
u32 n = tipc_node(addr);
u32 c = tipc_cluster(addr);
}
/**
- * addr_node_valid - validates a proposed network address for this node
+ * tipc_addr_node_valid - validates a proposed network address for this node
*
* Accepts <Z.C.N>, where Z, C, and N are non-zero and do not exceed
* the configured limits.
* Returns 1 if address can be used, otherwise 0
*/
-int addr_node_valid(u32 addr)
+int tipc_addr_node_valid(u32 addr)
{
- return (addr_domain_valid(addr) && tipc_node(addr));
+ return (tipc_addr_domain_valid(addr) && tipc_node(addr));
}
return string;
}
-int addr_domain_valid(u32);
-int addr_node_valid(u32 addr);
+int tipc_addr_domain_valid(u32);
+int tipc_addr_node_valid(u32 addr);
#endif
struct bearer bearer;
struct media media;
struct bcbearer_pair bpairs[MAX_BEARERS];
- struct bcbearer_pair bpairs_temp[TIPC_NUM_LINK_PRI];
+ struct bcbearer_pair bpairs_temp[TIPC_MAX_LINK_PRI + 1];
};
/**
static struct link *bcl = NULL;
static spinlock_t bc_lock = SPIN_LOCK_UNLOCKED;
-char bc_link_name[] = "multicast-link";
+char tipc_bclink_name[] = "multicast-link";
static inline u32 buf_seqno(struct sk_buff *buf)
buf = buf->next;
}
if (buf != NULL)
- link_retransmit(bcl, buf, mod(to - after));
+ tipc_link_retransmit(bcl, buf, mod(to - after));
spin_unlock_bh(&bc_lock);
}
/**
- * bclink_acknowledge - handle acknowledgement of broadcast packets
+ * tipc_bclink_acknowledge - handle acknowledgement of broadcast packets
* @n_ptr: node that sent acknowledgement info
* @acked: broadcast sequence # that has been acknowledged
*
* Node is locked, bc_lock unlocked.
*/
-void bclink_acknowledge(struct node *n_ptr, u32 acked)
+void tipc_bclink_acknowledge(struct node *n_ptr, u32 acked)
{
struct sk_buff *crs;
struct sk_buff *next;
/* Try resolving broadcast link congestion, if necessary */
if (unlikely(bcl->next_out))
- link_push_queue(bcl);
+ tipc_link_push_queue(bcl);
if (unlikely(released && !list_empty(&bcl->waiting_ports)))
- link_wakeup_ports(bcl, 0);
+ tipc_link_wakeup_ports(bcl, 0);
spin_unlock_bh(&bc_lock);
}
/**
* bclink_send_ack - unicast an ACK msg
*
- * net_lock and node lock set
+ * tipc_net_lock and node lock set
*/
static void bclink_send_ack(struct node *n_ptr)
struct link *l_ptr = n_ptr->active_links[n_ptr->addr & 1];
if (l_ptr != NULL)
- link_send_proto_msg(l_ptr, STATE_MSG, 0, 0, 0, 0, 0);
+ tipc_link_send_proto_msg(l_ptr, STATE_MSG, 0, 0, 0, 0, 0);
}
/**
* bclink_send_nack- broadcast a NACK msg
*
- * net_lock and node lock set
+ * tipc_net_lock and node lock set
*/
static void bclink_send_nack(struct node *n_ptr)
msg_set_bcgap_to(msg, n_ptr->bclink.gap_to);
msg_set_bcast_tag(msg, tipc_own_tag);
- if (bearer_send(&bcbearer->bearer, buf, 0)) {
+ if (tipc_bearer_send(&bcbearer->bearer, buf, 0)) {
bcl->stats.sent_nacks++;
buf_discard(buf);
} else {
- bearer_schedule(bcl->b_ptr, bcl);
+ tipc_bearer_schedule(bcl->b_ptr, bcl);
bcl->proto_msg_queue = buf;
bcl->stats.bearer_congs++;
}
}
/**
- * bclink_check_gap - send a NACK if a sequence gap exists
+ * tipc_bclink_check_gap - send a NACK if a sequence gap exists
*
- * net_lock and node lock set
+ * tipc_net_lock and node lock set
*/
-void bclink_check_gap(struct node *n_ptr, u32 last_sent)
+void tipc_bclink_check_gap(struct node *n_ptr, u32 last_sent)
{
if (!n_ptr->bclink.supported ||
less_eq(last_sent, mod(n_ptr->bclink.last_in)))
}
/**
- * bclink_peek_nack - process a NACK msg meant for another node
+ * tipc_bclink_peek_nack - process a NACK msg meant for another node
*
- * Only net_lock set.
+ * Only tipc_net_lock set.
*/
-void bclink_peek_nack(u32 dest, u32 sender_tag, u32 gap_after, u32 gap_to)
+void tipc_bclink_peek_nack(u32 dest, u32 sender_tag, u32 gap_after, u32 gap_to)
{
- struct node *n_ptr = node_find(dest);
+ struct node *n_ptr = tipc_node_find(dest);
u32 my_after, my_to;
- if (unlikely(!n_ptr || !node_is_up(n_ptr)))
+ if (unlikely(!n_ptr || !tipc_node_is_up(n_ptr)))
return;
- node_lock(n_ptr);
+ tipc_node_lock(n_ptr);
/*
* Modify gap to suppress unnecessary NACKs from this node
*/
bclink_set_gap(n_ptr);
}
}
- node_unlock(n_ptr);
+ tipc_node_unlock(n_ptr);
}
/**
- * bclink_send_msg - broadcast a packet to all nodes in cluster
+ * tipc_bclink_send_msg - broadcast a packet to all nodes in cluster
*/
-int bclink_send_msg(struct sk_buff *buf)
+int tipc_bclink_send_msg(struct sk_buff *buf)
{
int res;
spin_lock_bh(&bc_lock);
- res = link_send_buf(bcl, buf);
+ res = tipc_link_send_buf(bcl, buf);
if (unlikely(res == -ELINKCONG))
buf_discard(buf);
else
}
/**
- * bclink_recv_pkt - receive a broadcast packet, and deliver upwards
+ * tipc_bclink_recv_pkt - receive a broadcast packet, and deliver upwards
*
- * net_lock is read_locked, no other locks set
+ * tipc_net_lock is read_locked, no other locks set
*/
-void bclink_recv_pkt(struct sk_buff *buf)
+void tipc_bclink_recv_pkt(struct sk_buff *buf)
{
struct tipc_msg *msg = buf_msg(buf);
- struct node* node = node_find(msg_prevnode(msg));
+ struct node* node = tipc_node_find(msg_prevnode(msg));
u32 next_in;
u32 seqno;
struct sk_buff *deferred;
msg_dbg(msg, "<BC<<<");
- if (unlikely(!node || !node_is_up(node) || !node->bclink.supported ||
+ if (unlikely(!node || !tipc_node_is_up(node) || !node->bclink.supported ||
(msg_mc_netid(msg) != tipc_net_id))) {
buf_discard(buf);
return;
if (unlikely(msg_user(msg) == BCAST_PROTOCOL)) {
msg_dbg(msg, "<BCNACK<<<");
if (msg_destnode(msg) == tipc_own_addr) {
- node_lock(node);
- bclink_acknowledge(node, msg_bcast_ack(msg));
- node_unlock(node);
+ tipc_node_lock(node);
+ tipc_bclink_acknowledge(node, msg_bcast_ack(msg));
+ tipc_node_unlock(node);
bcl->stats.recv_nacks++;
bclink_retransmit_pkt(msg_bcgap_after(msg),
msg_bcgap_to(msg));
} else {
- bclink_peek_nack(msg_destnode(msg),
+ tipc_bclink_peek_nack(msg_destnode(msg),
msg_bcast_tag(msg),
msg_bcgap_after(msg),
msg_bcgap_to(msg));
return;
}
- node_lock(node);
+ tipc_node_lock(node);
receive:
deferred = node->bclink.deferred_head;
next_in = mod(node->bclink.last_in + 1);
bcl->stats.sent_acks++;
}
if (likely(msg_isdata(msg))) {
- node_unlock(node);
- port_recv_mcast(buf, NULL);
+ tipc_node_unlock(node);
+ tipc_port_recv_mcast(buf, NULL);
} else if (msg_user(msg) == MSG_BUNDLER) {
bcl->stats.recv_bundles++;
bcl->stats.recv_bundled += msg_msgcnt(msg);
- node_unlock(node);
- link_recv_bundle(buf);
+ tipc_node_unlock(node);
+ tipc_link_recv_bundle(buf);
} else if (msg_user(msg) == MSG_FRAGMENTER) {
bcl->stats.recv_fragments++;
- if (link_recv_fragment(&node->bclink.defragm,
- &buf, &msg))
+ if (tipc_link_recv_fragment(&node->bclink.defragm,
+ &buf, &msg))
bcl->stats.recv_fragmented++;
- node_unlock(node);
- net_route_msg(buf);
+ tipc_node_unlock(node);
+ tipc_net_route_msg(buf);
} else {
- node_unlock(node);
- net_route_msg(buf);
+ tipc_node_unlock(node);
+ tipc_net_route_msg(buf);
}
if (deferred && (buf_seqno(deferred) == mod(next_in + 1))) {
- node_lock(node);
+ tipc_node_lock(node);
buf = deferred;
msg = buf_msg(buf);
node->bclink.deferred_head = deferred->next;
u32 gap_after = node->bclink.gap_after;
u32 gap_to = node->bclink.gap_to;
- if (link_defer_pkt(&node->bclink.deferred_head,
- &node->bclink.deferred_tail,
- buf)) {
+ if (tipc_link_defer_pkt(&node->bclink.deferred_head,
+ &node->bclink.deferred_tail,
+ buf)) {
node->bclink.nack_sync++;
bcl->stats.deferred_recv++;
if (seqno == mod(gap_after + 1))
bcl->stats.duplicates++;
buf_discard(buf);
}
- node_unlock(node);
+ tipc_node_unlock(node);
}
-u32 bclink_get_last_sent(void)
+u32 tipc_bclink_get_last_sent(void)
{
u32 last_sent = mod(bcl->next_out_no - 1);
return last_sent;
}
-u32 bclink_acks_missing(struct node *n_ptr)
+u32 tipc_bclink_acks_missing(struct node *n_ptr)
{
return (n_ptr->bclink.supported &&
- (bclink_get_last_sent() != n_ptr->bclink.acked));
+ (tipc_bclink_get_last_sent() != n_ptr->bclink.acked));
}
/**
- * bcbearer_send - send a packet through the broadcast pseudo-bearer
+ * tipc_bcbearer_send - send a packet through the broadcast pseudo-bearer
*
* Send through as many bearers as necessary to reach all nodes
* that support TIPC multicasting.
* Returns 0 if packet sent successfully, non-zero if not
*/
-int bcbearer_send(struct sk_buff *buf,
- struct tipc_bearer *unused1,
- struct tipc_media_addr *unused2)
+int tipc_bcbearer_send(struct sk_buff *buf,
+ struct tipc_bearer *unused1,
+ struct tipc_media_addr *unused2)
{
static int send_count = 0;
if (likely(!msg_non_seq(buf_msg(buf)))) {
struct tipc_msg *msg;
- assert(cluster_bcast_nodes.count != 0);
- bcbuf_set_acks(buf, cluster_bcast_nodes.count);
+ assert(tipc_cltr_bcast_nodes.count != 0);
+ bcbuf_set_acks(buf, tipc_cltr_bcast_nodes.count);
msg = buf_msg(buf);
msg_set_non_seq(msg);
msg_set_mc_netid(msg, tipc_net_id);
/* Send buffer over bearers until all targets reached */
- remains = cluster_bcast_nodes;
+ remains = tipc_cltr_bcast_nodes;
for (bp_index = 0; bp_index < MAX_BEARERS; bp_index++) {
struct bearer *p = bcbearer->bpairs[bp_index].primary;
if (!p)
break; /* no more bearers to try */
- nmap_diff(&remains, &p->nodes, &remains_new);
+ tipc_nmap_diff(&remains, &p->nodes, &remains_new);
if (remains_new.count == remains.count)
continue; /* bearer pair doesn't add anything */
}
/**
- * bcbearer_sort - create sets of bearer pairs used by broadcast bearer
+ * tipc_bcbearer_sort - create sets of bearer pairs used by broadcast bearer
*/
-void bcbearer_sort(void)
+void tipc_bcbearer_sort(void)
{
struct bcbearer_pair *bp_temp = bcbearer->bpairs_temp;
struct bcbearer_pair *bp_curr;
memset(bp_temp, 0, sizeof(bcbearer->bpairs_temp));
for (b_index = 0; b_index < MAX_BEARERS; b_index++) {
- struct bearer *b = &bearers[b_index];
+ struct bearer *b = &tipc_bearers[b_index];
if (!b->active || !b->nodes.count)
continue;
bp_curr = bcbearer->bpairs;
memset(bcbearer->bpairs, 0, sizeof(bcbearer->bpairs));
- for (pri = (TIPC_NUM_LINK_PRI - 1); pri >= 0; pri--) {
+ for (pri = TIPC_MAX_LINK_PRI; pri >= 0; pri--) {
if (!bp_temp[pri].primary)
continue;
bp_curr->primary = bp_temp[pri].primary;
if (bp_temp[pri].secondary) {
- if (nmap_equal(&bp_temp[pri].primary->nodes,
- &bp_temp[pri].secondary->nodes)) {
+ if (tipc_nmap_equal(&bp_temp[pri].primary->nodes,
+ &bp_temp[pri].secondary->nodes)) {
bp_curr->secondary = bp_temp[pri].secondary;
} else {
bp_curr++;
}
/**
- * bcbearer_push - resolve bearer congestion
+ * tipc_bcbearer_push - resolve bearer congestion
*
* Forces bclink to push out any unsent packets, until all packets are gone
* or congestion reoccurs.
* No locks set when function called
*/
-void bcbearer_push(void)
+void tipc_bcbearer_push(void)
{
struct bearer *b_ptr;
b_ptr = &bcbearer->bearer;
if (b_ptr->publ.blocked) {
b_ptr->publ.blocked = 0;
- bearer_lock_push(b_ptr);
+ tipc_bearer_lock_push(b_ptr);
}
spin_unlock_bh(&bc_lock);
}
-int bclink_stats(char *buf, const u32 buf_size)
+int tipc_bclink_stats(char *buf, const u32 buf_size)
{
struct print_buf pb;
if (!bcl)
return 0;
- printbuf_init(&pb, buf, buf_size);
+ tipc_printbuf_init(&pb, buf, buf_size);
spin_lock_bh(&bc_lock);
: 0);
spin_unlock_bh(&bc_lock);
- return printbuf_validate(&pb);
+ return tipc_printbuf_validate(&pb);
}
-int bclink_reset_stats(void)
+int tipc_bclink_reset_stats(void)
{
if (!bcl)
return -ENOPROTOOPT;
return TIPC_OK;
}
-int bclink_set_queue_limits(u32 limit)
+int tipc_bclink_set_queue_limits(u32 limit)
{
if (!bcl)
return -ENOPROTOOPT;
return -EINVAL;
spin_lock_bh(&bc_lock);
- link_set_queue_limits(bcl, limit);
+ tipc_link_set_queue_limits(bcl, limit);
spin_unlock_bh(&bc_lock);
return TIPC_OK;
}
-int bclink_init(void)
+int tipc_bclink_init(void)
{
bcbearer = kmalloc(sizeof(*bcbearer), GFP_ATOMIC);
bclink = kmalloc(sizeof(*bclink), GFP_ATOMIC);
memset(bcbearer, 0, sizeof(struct bcbearer));
INIT_LIST_HEAD(&bcbearer->bearer.cong_links);
bcbearer->bearer.media = &bcbearer->media;
- bcbearer->media.send_msg = bcbearer_send;
+ bcbearer->media.send_msg = tipc_bcbearer_send;
sprintf(bcbearer->media.name, "tipc-multicast");
bcl = &bclink->link;
bclink->node.lock = SPIN_LOCK_UNLOCKED;
bcl->owner = &bclink->node;
bcl->max_pkt = MAX_PKT_DEFAULT_MCAST;
- link_set_queue_limits(bcl, BCLINK_WIN_DEFAULT);
+ tipc_link_set_queue_limits(bcl, BCLINK_WIN_DEFAULT);
bcl->b_ptr = &bcbearer->bearer;
bcl->state = WORKING_WORKING;
- sprintf(bcl->name, bc_link_name);
+ sprintf(bcl->name, tipc_bclink_name);
if (BCLINK_LOG_BUF_SIZE) {
char *pb = kmalloc(BCLINK_LOG_BUF_SIZE, GFP_ATOMIC);
if (!pb)
goto nomem;
- printbuf_init(&bcl->print_buf, pb, BCLINK_LOG_BUF_SIZE);
+ tipc_printbuf_init(&bcl->print_buf, pb, BCLINK_LOG_BUF_SIZE);
}
return TIPC_OK;
}
-void bclink_stop(void)
+void tipc_bclink_stop(void)
{
spin_lock_bh(&bc_lock);
if (bcbearer) {
- link_stop(bcl);
+ tipc_link_stop(bcl);
if (BCLINK_LOG_BUF_SIZE)
kfree(bcl->print_buf.buf);
bcl = NULL;
struct node;
-extern char bc_link_name[];
+extern char tipc_bclink_name[];
/**
* nmap_get - determine if node exists in a node map
*/
-static inline int nmap_get(struct node_map *nm_ptr, u32 node)
+static inline int tipc_nmap_get(struct node_map *nm_ptr, u32 node)
{
int n = tipc_node(node);
int w = n / WSIZE;
* nmap_add - add a node to a node map
*/
-static inline void nmap_add(struct node_map *nm_ptr, u32 node)
+static inline void tipc_nmap_add(struct node_map *nm_ptr, u32 node)
{
int n = tipc_node(node);
int w = n / WSIZE;
* nmap_remove - remove a node from a node map
*/
-static inline void nmap_remove(struct node_map *nm_ptr, u32 node)
+static inline void tipc_nmap_remove(struct node_map *nm_ptr, u32 node)
{
int n = tipc_node(node);
int w = n / WSIZE;
* nmap_equal - test for equality of node maps
*/
-static inline int nmap_equal(struct node_map *nm_a, struct node_map *nm_b)
+static inline int tipc_nmap_equal(struct node_map *nm_a, struct node_map *nm_b)
{
return !memcmp(nm_a, nm_b, sizeof(*nm_a));
}
* @nm_diff: output node map A-B (i.e. nodes of A that are not in B)
*/
-static inline void nmap_diff(struct node_map *nm_a, struct node_map *nm_b,
- struct node_map *nm_diff)
+static inline void tipc_nmap_diff(struct node_map *nm_a, struct node_map *nm_b,
+ struct node_map *nm_diff)
{
int stop = sizeof(nm_a->map) / sizeof(u32);
int w;
* port_list_add - add a port to a port list, ensuring no duplicates
*/
-static inline void port_list_add(struct port_list *pl_ptr, u32 port)
+static inline void tipc_port_list_add(struct port_list *pl_ptr, u32 port)
{
struct port_list *item = pl_ptr;
int i;
* Note: First item is on stack, so it doesn't need to be released
*/
-static inline void port_list_free(struct port_list *pl_ptr)
+static inline void tipc_port_list_free(struct port_list *pl_ptr)
{
struct port_list *item;
struct port_list *next;
}
-int bclink_init(void);
-void bclink_stop(void);
-void bclink_acknowledge(struct node *n_ptr, u32 acked);
-int bclink_send_msg(struct sk_buff *buf);
-void bclink_recv_pkt(struct sk_buff *buf);
-u32 bclink_get_last_sent(void);
-u32 bclink_acks_missing(struct node *n_ptr);
-void bclink_check_gap(struct node *n_ptr, u32 seqno);
-int bclink_stats(char *stats_buf, const u32 buf_size);
-int bclink_reset_stats(void);
-int bclink_set_queue_limits(u32 limit);
-void bcbearer_sort(void);
-void bcbearer_push(void);
+int tipc_bclink_init(void);
+void tipc_bclink_stop(void);
+void tipc_bclink_acknowledge(struct node *n_ptr, u32 acked);
+int tipc_bclink_send_msg(struct sk_buff *buf);
+void tipc_bclink_recv_pkt(struct sk_buff *buf);
+u32 tipc_bclink_get_last_sent(void);
+u32 tipc_bclink_acks_missing(struct node *n_ptr);
+void tipc_bclink_check_gap(struct node *n_ptr, u32 seqno);
+int tipc_bclink_stats(char *stats_buf, const u32 buf_size);
+int tipc_bclink_reset_stats(void);
+int tipc_bclink_set_queue_limits(u32 limit);
+void tipc_bcbearer_sort(void);
+void tipc_bcbearer_push(void);
#endif
static struct media *media_list = 0;
static u32 media_count = 0;
-struct bearer *bearers = 0;
+struct bearer *tipc_bearers = 0;
/**
* media_name_valid - validate media name
u32 i;
int res = -EINVAL;
- write_lock_bh(&net_lock);
+ write_lock_bh(&tipc_net_lock);
if (!media_list)
goto exit;
warn("Media registration error: no broadcast address supplied\n");
goto exit;
}
- if (bearer_priority >= TIPC_NUM_LINK_PRI) {
+ if ((bearer_priority < TIPC_MIN_LINK_PRI) &&
+ (bearer_priority > TIPC_MAX_LINK_PRI)) {
warn("Media registration error: priority %u\n", bearer_priority);
goto exit;
}
dbg("Media <%s> registered\n", name);
res = 0;
exit:
- write_unlock_bh(&net_lock);
+ write_unlock_bh(&tipc_net_lock);
return res;
}
/**
- * media_addr_printf - record media address in print buffer
+ * tipc_media_addr_printf - record media address in print buffer
*/
-void media_addr_printf(struct print_buf *pb, struct tipc_media_addr *a)
+void tipc_media_addr_printf(struct print_buf *pb, struct tipc_media_addr *a)
{
struct media *m_ptr;
u32 media_type;
}
/**
- * media_get_names - record names of registered media in buffer
+ * tipc_media_get_names - record names of registered media in buffer
*/
-struct sk_buff *media_get_names(void)
+struct sk_buff *tipc_media_get_names(void)
{
struct sk_buff *buf;
struct media *m_ptr;
int i;
- buf = cfg_reply_alloc(MAX_MEDIA * TLV_SPACE(TIPC_MAX_MEDIA_NAME));
+ buf = tipc_cfg_reply_alloc(MAX_MEDIA * TLV_SPACE(TIPC_MAX_MEDIA_NAME));
if (!buf)
return NULL;
- read_lock_bh(&net_lock);
+ read_lock_bh(&tipc_net_lock);
for (i = 0, m_ptr = media_list; i < media_count; i++, m_ptr++) {
- cfg_append_tlv(buf, TIPC_TLV_MEDIA_NAME, m_ptr->name,
- strlen(m_ptr->name) + 1);
+ tipc_cfg_append_tlv(buf, TIPC_TLV_MEDIA_NAME, m_ptr->name,
+ strlen(m_ptr->name) + 1);
}
- read_unlock_bh(&net_lock);
+ read_unlock_bh(&tipc_net_lock);
return buf;
}
struct bearer *b_ptr;
u32 i;
- for (i = 0, b_ptr = bearers; i < MAX_BEARERS; i++, b_ptr++) {
+ for (i = 0, b_ptr = tipc_bearers; i < MAX_BEARERS; i++, b_ptr++) {
if (b_ptr->active && (!strcmp(b_ptr->publ.name, name)))
return b_ptr;
}
}
/**
- * bearer_find - locates bearer object with matching interface name
+ * tipc_bearer_find_interface - locates bearer object with matching interface name
*/
-struct bearer *bearer_find_interface(const char *if_name)
+struct bearer *tipc_bearer_find_interface(const char *if_name)
{
struct bearer *b_ptr;
char *b_if_name;
u32 i;
- for (i = 0, b_ptr = bearers; i < MAX_BEARERS; i++, b_ptr++) {
+ for (i = 0, b_ptr = tipc_bearers; i < MAX_BEARERS; i++, b_ptr++) {
if (!b_ptr->active)
continue;
b_if_name = strchr(b_ptr->publ.name, ':') + 1;
}
/**
- * bearer_get_names - record names of bearers in buffer
+ * tipc_bearer_get_names - record names of bearers in buffer
*/
-struct sk_buff *bearer_get_names(void)
+struct sk_buff *tipc_bearer_get_names(void)
{
struct sk_buff *buf;
struct media *m_ptr;
struct bearer *b_ptr;
int i, j;
- buf = cfg_reply_alloc(MAX_BEARERS * TLV_SPACE(TIPC_MAX_BEARER_NAME));
+ buf = tipc_cfg_reply_alloc(MAX_BEARERS * TLV_SPACE(TIPC_MAX_BEARER_NAME));
if (!buf)
return NULL;
- read_lock_bh(&net_lock);
+ read_lock_bh(&tipc_net_lock);
for (i = 0, m_ptr = media_list; i < media_count; i++, m_ptr++) {
for (j = 0; j < MAX_BEARERS; j++) {
- b_ptr = &bearers[j];
+ b_ptr = &tipc_bearers[j];
if (b_ptr->active && (b_ptr->media == m_ptr)) {
- cfg_append_tlv(buf, TIPC_TLV_BEARER_NAME,
- b_ptr->publ.name,
- strlen(b_ptr->publ.name) + 1);
+ tipc_cfg_append_tlv(buf, TIPC_TLV_BEARER_NAME,
+ b_ptr->publ.name,
+ strlen(b_ptr->publ.name) + 1);
}
}
}
- read_unlock_bh(&net_lock);
+ read_unlock_bh(&tipc_net_lock);
return buf;
}
-void bearer_add_dest(struct bearer *b_ptr, u32 dest)
+void tipc_bearer_add_dest(struct bearer *b_ptr, u32 dest)
{
- nmap_add(&b_ptr->nodes, dest);
- disc_update_link_req(b_ptr->link_req);
- bcbearer_sort();
+ tipc_nmap_add(&b_ptr->nodes, dest);
+ tipc_disc_update_link_req(b_ptr->link_req);
+ tipc_bcbearer_sort();
}
-void bearer_remove_dest(struct bearer *b_ptr, u32 dest)
+void tipc_bearer_remove_dest(struct bearer *b_ptr, u32 dest)
{
- nmap_remove(&b_ptr->nodes, dest);
- disc_update_link_req(b_ptr->link_req);
- bcbearer_sort();
+ tipc_nmap_remove(&b_ptr->nodes, dest);
+ tipc_disc_update_link_req(b_ptr->link_req);
+ tipc_bcbearer_sort();
}
/*
* bearer_push(): Resolve bearer congestion. Force the waiting
* links to push out their unsent packets, one packet per link
* per iteration, until all packets are gone or congestion reoccurs.
- * 'net_lock' is read_locked when this function is called
+ * 'tipc_net_lock' is read_locked when this function is called
* bearer.lock must be taken before calling
* Returns binary true(1) ore false(0)
*/
while (!list_empty(&b_ptr->cong_links) && (res != PUSH_FAILED)) {
list_for_each_entry_safe(ln, tln, &b_ptr->cong_links, link_list) {
- res = link_push_packet(ln);
+ res = tipc_link_push_packet(ln);
if (res == PUSH_FAILED)
break;
if (res == PUSH_FINISHED)
return list_empty(&b_ptr->cong_links);
}
-void bearer_lock_push(struct bearer *b_ptr)
+void tipc_bearer_lock_push(struct bearer *b_ptr)
{
int res;
res = bearer_push(b_ptr);
spin_unlock_bh(&b_ptr->publ.lock);
if (res)
- bcbearer_push();
+ tipc_bcbearer_push();
}
spin_lock_bh(&b_ptr->publ.lock);
b_ptr->continue_count++;
if (!list_empty(&b_ptr->cong_links))
- k_signal((Handler)bearer_lock_push, (unsigned long)b_ptr);
+ tipc_k_signal((Handler)tipc_bearer_lock_push, (unsigned long)b_ptr);
b_ptr->publ.blocked = 0;
spin_unlock_bh(&b_ptr->publ.lock);
}
* Schedule link for sending of messages after the bearer
* has been deblocked by 'continue()'. This method is called
* when somebody tries to send a message via this link while
- * the bearer is congested. 'net_lock' is in read_lock here
+ * the bearer is congested. 'tipc_net_lock' is in read_lock here
* bearer.lock is busy
*/
-static void bearer_schedule_unlocked(struct bearer *b_ptr, struct link *l_ptr)
+static void tipc_bearer_schedule_unlocked(struct bearer *b_ptr, struct link *l_ptr)
{
list_move_tail(&l_ptr->link_list, &b_ptr->cong_links);
}
* Schedule link for sending of messages after the bearer
* has been deblocked by 'continue()'. This method is called
* when somebody tries to send a message via this link while
- * the bearer is congested. 'net_lock' is in read_lock here,
+ * the bearer is congested. 'tipc_net_lock' is in read_lock here,
* bearer.lock is free
*/
-void bearer_schedule(struct bearer *b_ptr, struct link *l_ptr)
+void tipc_bearer_schedule(struct bearer *b_ptr, struct link *l_ptr)
{
spin_lock_bh(&b_ptr->publ.lock);
- bearer_schedule_unlocked(b_ptr, l_ptr);
+ tipc_bearer_schedule_unlocked(b_ptr, l_ptr);
spin_unlock_bh(&b_ptr->publ.lock);
}
/*
- * bearer_resolve_congestion(): Check if there is bearer congestion,
+ * tipc_bearer_resolve_congestion(): Check if there is bearer congestion,
* and if there is, try to resolve it before returning.
- * 'net_lock' is read_locked when this function is called
+ * 'tipc_net_lock' is read_locked when this function is called
*/
-int bearer_resolve_congestion(struct bearer *b_ptr, struct link *l_ptr)
+int tipc_bearer_resolve_congestion(struct bearer *b_ptr, struct link *l_ptr)
{
int res = 1;
return 1;
spin_lock_bh(&b_ptr->publ.lock);
if (!bearer_push(b_ptr)) {
- bearer_schedule_unlocked(b_ptr, l_ptr);
+ tipc_bearer_schedule_unlocked(b_ptr, l_ptr);
res = 0;
}
spin_unlock_bh(&b_ptr->publ.lock);
if (tipc_mode != TIPC_NET_MODE)
return -ENOPROTOOPT;
+
if (!bearer_name_validate(name, &b_name) ||
- !addr_domain_valid(bcast_scope) ||
- !in_scope(bcast_scope, tipc_own_addr) ||
- (priority > TIPC_NUM_LINK_PRI))
+ !tipc_addr_domain_valid(bcast_scope) ||
+ !in_scope(bcast_scope, tipc_own_addr))
+ return -EINVAL;
+
+ if ((priority < TIPC_MIN_LINK_PRI ||
+ priority > TIPC_MAX_LINK_PRI) &&
+ (priority != TIPC_MEDIA_LINK_PRI))
return -EINVAL;
- write_lock_bh(&net_lock);
- if (!bearers)
+ write_lock_bh(&tipc_net_lock);
+ if (!tipc_bearers)
goto failed;
m_ptr = media_find(b_name.media_name);
warn("No media <%s>\n", b_name.media_name);
goto failed;
}
- if (priority == TIPC_NUM_LINK_PRI)
+
+ if (priority == TIPC_MEDIA_LINK_PRI)
priority = m_ptr->priority;
restart:
bearer_id = MAX_BEARERS;
with_this_prio = 1;
for (i = MAX_BEARERS; i-- != 0; ) {
- if (!bearers[i].active) {
+ if (!tipc_bearers[i].active) {
bearer_id = i;
continue;
}
- if (!strcmp(name, bearers[i].publ.name)) {
+ if (!strcmp(name, tipc_bearers[i].publ.name)) {
warn("Bearer <%s> already enabled\n", name);
goto failed;
}
- if ((bearers[i].priority == priority) &&
+ if ((tipc_bearers[i].priority == priority) &&
(++with_this_prio > 2)) {
if (priority-- == 0) {
warn("Third bearer <%s> with priority %u, unable to lower to %u\n",
goto failed;
}
- b_ptr = &bearers[bearer_id];
+ b_ptr = &tipc_bearers[bearer_id];
memset(b_ptr, 0, sizeof(struct bearer));
strcpy(b_ptr->publ.name, name);
INIT_LIST_HEAD(&b_ptr->cong_links);
INIT_LIST_HEAD(&b_ptr->links);
if (m_ptr->bcast) {
- b_ptr->link_req = disc_init_link_req(b_ptr, &m_ptr->bcast_addr,
- bcast_scope, 2);
+ b_ptr->link_req = tipc_disc_init_link_req(b_ptr, &m_ptr->bcast_addr,
+ bcast_scope, 2);
}
b_ptr->publ.lock = SPIN_LOCK_UNLOCKED;
- write_unlock_bh(&net_lock);
- info("Enabled bearer <%s>, discovery domain %s\n",
- name, addr_string_fill(addr_string, bcast_scope));
+ write_unlock_bh(&tipc_net_lock);
+ info("Enabled bearer <%s>, discovery domain %s, priority %u\n",
+ name, addr_string_fill(addr_string, bcast_scope), priority);
return 0;
failed:
- write_unlock_bh(&net_lock);
+ write_unlock_bh(&tipc_net_lock);
return res;
}
if (tipc_mode != TIPC_NET_MODE)
return -ENOPROTOOPT;
- read_lock_bh(&net_lock);
+ read_lock_bh(&tipc_net_lock);
b_ptr = bearer_find(name);
if (!b_ptr) {
warn("Attempt to block unknown bearer <%s>\n", name);
- read_unlock_bh(&net_lock);
+ read_unlock_bh(&tipc_net_lock);
return -EINVAL;
}
struct node *n_ptr = l_ptr->owner;
spin_lock_bh(&n_ptr->lock);
- link_reset(l_ptr);
+ tipc_link_reset(l_ptr);
spin_unlock_bh(&n_ptr->lock);
}
spin_unlock_bh(&b_ptr->publ.lock);
- read_unlock_bh(&net_lock);
+ read_unlock_bh(&tipc_net_lock);
info("Blocked bearer <%s>\n", name);
return TIPC_OK;
}
/**
* bearer_disable -
*
- * Note: This routine assumes caller holds net_lock.
+ * Note: This routine assumes caller holds tipc_net_lock.
*/
static int bearer_disable(const char *name)
return -EINVAL;
}
- disc_stop_link_req(b_ptr->link_req);
+ tipc_disc_stop_link_req(b_ptr->link_req);
spin_lock_bh(&b_ptr->publ.lock);
b_ptr->link_req = NULL;
b_ptr->publ.blocked = 1;
if (b_ptr->media->disable_bearer) {
spin_unlock_bh(&b_ptr->publ.lock);
- write_unlock_bh(&net_lock);
+ write_unlock_bh(&tipc_net_lock);
b_ptr->media->disable_bearer(&b_ptr->publ);
- write_lock_bh(&net_lock);
+ write_lock_bh(&tipc_net_lock);
spin_lock_bh(&b_ptr->publ.lock);
}
list_for_each_entry_safe(l_ptr, temp_l_ptr, &b_ptr->links, link_list) {
- link_delete(l_ptr);
+ tipc_link_delete(l_ptr);
}
spin_unlock_bh(&b_ptr->publ.lock);
info("Disabled bearer <%s>\n", name);
{
int res;
- write_lock_bh(&net_lock);
+ write_lock_bh(&tipc_net_lock);
res = bearer_disable(name);
- write_unlock_bh(&net_lock);
+ write_unlock_bh(&tipc_net_lock);
return res;
}
-int bearer_init(void)
+int tipc_bearer_init(void)
{
int res;
- write_lock_bh(&net_lock);
- bearers = kmalloc(MAX_BEARERS * sizeof(struct bearer), GFP_ATOMIC);
+ write_lock_bh(&tipc_net_lock);
+ tipc_bearers = kmalloc(MAX_BEARERS * sizeof(struct bearer), GFP_ATOMIC);
media_list = kmalloc(MAX_MEDIA * sizeof(struct media), GFP_ATOMIC);
- if (bearers && media_list) {
- memset(bearers, 0, MAX_BEARERS * sizeof(struct bearer));
+ if (tipc_bearers && media_list) {
+ memset(tipc_bearers, 0, MAX_BEARERS * sizeof(struct bearer));
memset(media_list, 0, MAX_MEDIA * sizeof(struct media));
res = TIPC_OK;
} else {
- kfree(bearers);
+ kfree(tipc_bearers);
kfree(media_list);
- bearers = 0;
+ tipc_bearers = 0;
media_list = 0;
res = -ENOMEM;
}
- write_unlock_bh(&net_lock);
+ write_unlock_bh(&tipc_net_lock);
return res;
}
-void bearer_stop(void)
+void tipc_bearer_stop(void)
{
u32 i;
- if (!bearers)
+ if (!tipc_bearers)
return;
for (i = 0; i < MAX_BEARERS; i++) {
- if (bearers[i].active)
- bearers[i].publ.blocked = 1;
+ if (tipc_bearers[i].active)
+ tipc_bearers[i].publ.blocked = 1;
}
for (i = 0; i < MAX_BEARERS; i++) {
- if (bearers[i].active)
- bearer_disable(bearers[i].publ.name);
+ if (tipc_bearers[i].active)
+ bearer_disable(tipc_bearers[i].publ.name);
}
- kfree(bearers);
+ kfree(tipc_bearers);
kfree(media_list);
- bearers = 0;
+ tipc_bearers = 0;
media_list = 0;
media_count = 0;
}
#ifndef _TIPC_BEARER_H
#define _TIPC_BEARER_H
-#include <net/tipc/tipc_bearer.h>
+#include "core.h"
#include "bcast.h"
#define MAX_BEARERS 8
struct link;
-extern struct bearer *bearers;
+extern struct bearer *tipc_bearers;
-void media_addr_printf(struct print_buf *pb, struct tipc_media_addr *a);
-struct sk_buff *media_get_names(void);
+void tipc_media_addr_printf(struct print_buf *pb, struct tipc_media_addr *a);
+struct sk_buff *tipc_media_get_names(void);
-struct sk_buff *bearer_get_names(void);
-void bearer_add_dest(struct bearer *b_ptr, u32 dest);
-void bearer_remove_dest(struct bearer *b_ptr, u32 dest);
-void bearer_schedule(struct bearer *b_ptr, struct link *l_ptr);
-struct bearer *bearer_find_interface(const char *if_name);
-int bearer_resolve_congestion(struct bearer *b_ptr, struct link *l_ptr);
-int bearer_init(void);
-void bearer_stop(void);
-int bearer_broadcast(struct sk_buff *buf, struct tipc_bearer *b_ptr,
- struct tipc_media_addr *dest);
-void bearer_lock_push(struct bearer *b_ptr);
+struct sk_buff *tipc_bearer_get_names(void);
+void tipc_bearer_add_dest(struct bearer *b_ptr, u32 dest);
+void tipc_bearer_remove_dest(struct bearer *b_ptr, u32 dest);
+void tipc_bearer_schedule(struct bearer *b_ptr, struct link *l_ptr);
+struct bearer *tipc_bearer_find_interface(const char *if_name);
+int tipc_bearer_resolve_congestion(struct bearer *b_ptr, struct link *l_ptr);
+int tipc_bearer_init(void);
+void tipc_bearer_stop(void);
+void tipc_bearer_lock_push(struct bearer *b_ptr);
/**
- * bearer_send- sends buffer to destination over bearer
+ * tipc_bearer_send- sends buffer to destination over bearer
*
* Returns true (1) if successful, or false (0) if unable to send
*
* and let TIPC's link code deal with the undelivered message.
*/
-static inline int bearer_send(struct bearer *b_ptr, struct sk_buff *buf,
- struct tipc_media_addr *dest)
+static inline int tipc_bearer_send(struct bearer *b_ptr, struct sk_buff *buf,
+ struct tipc_media_addr *dest)
{
return !b_ptr->media->send_msg(buf, &b_ptr->publ, dest);
}
/**
- * bearer_congested - determines if bearer is currently congested
+ * tipc_bearer_congested - determines if bearer is currently congested
*/
-static inline int bearer_congested(struct bearer *b_ptr, struct link *l_ptr)
+static inline int tipc_bearer_congested(struct bearer *b_ptr, struct link *l_ptr)
{
if (unlikely(b_ptr->publ.blocked))
return 1;
if (likely(list_empty(&b_ptr->cong_links)))
return 0;
- return !bearer_resolve_congestion(b_ptr, l_ptr);
+ return !tipc_bearer_resolve_congestion(b_ptr, l_ptr);
}
#endif
#include "msg.h"
#include "bearer.h"
-void cluster_multicast(struct cluster *c_ptr, struct sk_buff *buf,
- u32 lower, u32 upper);
-struct sk_buff *cluster_prepare_routing_msg(u32 data_size, u32 dest);
+void tipc_cltr_multicast(struct cluster *c_ptr, struct sk_buff *buf,
+ u32 lower, u32 upper);
+struct sk_buff *tipc_cltr_prepare_routing_msg(u32 data_size, u32 dest);
-struct node **local_nodes = 0;
-struct node_map cluster_bcast_nodes = {0,{0,}};
-u32 highest_allowed_slave = 0;
+struct node **tipc_local_nodes = 0;
+struct node_map tipc_cltr_bcast_nodes = {0,{0,}};
+u32 tipc_highest_allowed_slave = 0;
-struct cluster *cluster_create(u32 addr)
+struct cluster *tipc_cltr_create(u32 addr)
{
struct _zone *z_ptr;
struct cluster *c_ptr;
}
memset(c_ptr->nodes, 0, alloc);
if (in_own_cluster(addr))
- local_nodes = c_ptr->nodes;
+ tipc_local_nodes = c_ptr->nodes;
c_ptr->highest_slave = LOWEST_SLAVE - 1;
c_ptr->highest_node = 0;
- z_ptr = zone_find(tipc_zone(addr));
+ z_ptr = tipc_zone_find(tipc_zone(addr));
if (z_ptr == NULL) {
- z_ptr = zone_create(addr);
+ z_ptr = tipc_zone_create(addr);
}
if (z_ptr != NULL) {
- zone_attach_cluster(z_ptr, c_ptr);
+ tipc_zone_attach_cluster(z_ptr, c_ptr);
c_ptr->owner = z_ptr;
}
else {
return c_ptr;
}
-void cluster_delete(struct cluster *c_ptr)
+void tipc_cltr_delete(struct cluster *c_ptr)
{
u32 n_num;
if (!c_ptr)
return;
for (n_num = 1; n_num <= c_ptr->highest_node; n_num++) {
- node_delete(c_ptr->nodes[n_num]);
+ tipc_node_delete(c_ptr->nodes[n_num]);
}
for (n_num = LOWEST_SLAVE; n_num <= c_ptr->highest_slave; n_num++) {
- node_delete(c_ptr->nodes[n_num]);
+ tipc_node_delete(c_ptr->nodes[n_num]);
}
kfree(c_ptr->nodes);
kfree(c_ptr);
}
-u32 cluster_next_node(struct cluster *c_ptr, u32 addr)
+u32 tipc_cltr_next_node(struct cluster *c_ptr, u32 addr)
{
struct node *n_ptr;
u32 n_num = tipc_node(addr) + 1;
return addr;
for (; n_num <= c_ptr->highest_node; n_num++) {
n_ptr = c_ptr->nodes[n_num];
- if (n_ptr && node_has_active_links(n_ptr))
+ if (n_ptr && tipc_node_has_active_links(n_ptr))
return n_ptr->addr;
}
for (n_num = 1; n_num < tipc_node(addr); n_num++) {
n_ptr = c_ptr->nodes[n_num];
- if (n_ptr && node_has_active_links(n_ptr))
+ if (n_ptr && tipc_node_has_active_links(n_ptr))
return n_ptr->addr;
}
return 0;
}
-void cluster_attach_node(struct cluster *c_ptr, struct node *n_ptr)
+void tipc_cltr_attach_node(struct cluster *c_ptr, struct node *n_ptr)
{
u32 n_num = tipc_node(n_ptr->addr);
u32 max_n_num = tipc_max_nodes;
if (in_own_cluster(n_ptr->addr))
- max_n_num = highest_allowed_slave;
+ max_n_num = tipc_highest_allowed_slave;
assert(n_num > 0);
assert(n_num <= max_n_num);
assert(c_ptr->nodes[n_num] == 0);
}
/**
- * cluster_select_router - select router to a cluster
+ * tipc_cltr_select_router - select router to a cluster
*
* Uses deterministic and fair algorithm.
*/
-u32 cluster_select_router(struct cluster *c_ptr, u32 ref)
+u32 tipc_cltr_select_router(struct cluster *c_ptr, u32 ref)
{
u32 n_num;
u32 ulim = c_ptr->highest_node;
/* Lookup upwards with wrap-around */
do {
- if (node_is_up(c_ptr->nodes[n_num]))
+ if (tipc_node_is_up(c_ptr->nodes[n_num]))
break;
} while (++n_num <= ulim);
if (n_num > ulim) {
n_num = 1;
do {
- if (node_is_up(c_ptr->nodes[n_num]))
+ if (tipc_node_is_up(c_ptr->nodes[n_num]))
break;
} while (++n_num < tstart);
if (n_num == tstart)
return 0;
}
assert(n_num <= ulim);
- return node_select_router(c_ptr->nodes[n_num], ref);
+ return tipc_node_select_router(c_ptr->nodes[n_num], ref);
}
/**
- * cluster_select_node - select destination node within a remote cluster
+ * tipc_cltr_select_node - select destination node within a remote cluster
*
* Uses deterministic and fair algorithm.
*/
-struct node *cluster_select_node(struct cluster *c_ptr, u32 selector)
+struct node *tipc_cltr_select_node(struct cluster *c_ptr, u32 selector)
{
u32 n_num;
u32 mask = tipc_max_nodes;
/* Lookup upwards with wrap-around */
for (n_num = start_entry; n_num <= c_ptr->highest_node; n_num++) {
- if (node_has_active_links(c_ptr->nodes[n_num]))
+ if (tipc_node_has_active_links(c_ptr->nodes[n_num]))
return c_ptr->nodes[n_num];
}
for (n_num = 1; n_num < start_entry; n_num++) {
- if (node_has_active_links(c_ptr->nodes[n_num]))
+ if (tipc_node_has_active_links(c_ptr->nodes[n_num]))
return c_ptr->nodes[n_num];
}
return 0;
* Routing table management: See description in node.c
*/
-struct sk_buff *cluster_prepare_routing_msg(u32 data_size, u32 dest)
+struct sk_buff *tipc_cltr_prepare_routing_msg(u32 data_size, u32 dest)
{
u32 size = INT_H_SIZE + data_size;
struct sk_buff *buf = buf_acquire(size);
return buf;
}
-void cluster_bcast_new_route(struct cluster *c_ptr, u32 dest,
+void tipc_cltr_bcast_new_route(struct cluster *c_ptr, u32 dest,
u32 lower, u32 upper)
{
- struct sk_buff *buf = cluster_prepare_routing_msg(0, c_ptr->addr);
+ struct sk_buff *buf = tipc_cltr_prepare_routing_msg(0, c_ptr->addr);
struct tipc_msg *msg;
if (buf) {
msg = buf_msg(buf);
msg_set_remote_node(msg, dest);
msg_set_type(msg, ROUTE_ADDITION);
- cluster_multicast(c_ptr, buf, lower, upper);
+ tipc_cltr_multicast(c_ptr, buf, lower, upper);
} else {
warn("Memory squeeze: broadcast of new route failed\n");
}
}
-void cluster_bcast_lost_route(struct cluster *c_ptr, u32 dest,
- u32 lower, u32 upper)
+void tipc_cltr_bcast_lost_route(struct cluster *c_ptr, u32 dest,
+ u32 lower, u32 upper)
{
- struct sk_buff *buf = cluster_prepare_routing_msg(0, c_ptr->addr);
+ struct sk_buff *buf = tipc_cltr_prepare_routing_msg(0, c_ptr->addr);
struct tipc_msg *msg;
if (buf) {
msg = buf_msg(buf);
msg_set_remote_node(msg, dest);
msg_set_type(msg, ROUTE_REMOVAL);
- cluster_multicast(c_ptr, buf, lower, upper);
+ tipc_cltr_multicast(c_ptr, buf, lower, upper);
} else {
warn("Memory squeeze: broadcast of lost route failed\n");
}
}
-void cluster_send_slave_routes(struct cluster *c_ptr, u32 dest)
+void tipc_cltr_send_slave_routes(struct cluster *c_ptr, u32 dest)
{
struct sk_buff *buf;
struct tipc_msg *msg;
assert(in_own_cluster(c_ptr->addr));
if (highest <= LOWEST_SLAVE)
return;
- buf = cluster_prepare_routing_msg(highest - LOWEST_SLAVE + 1,
- c_ptr->addr);
+ buf = tipc_cltr_prepare_routing_msg(highest - LOWEST_SLAVE + 1,
+ c_ptr->addr);
if (buf) {
msg = buf_msg(buf);
msg_set_remote_node(msg, c_ptr->addr);
msg_set_type(msg, SLAVE_ROUTING_TABLE);
for (n_num = LOWEST_SLAVE; n_num <= highest; n_num++) {
if (c_ptr->nodes[n_num] &&
- node_has_active_links(c_ptr->nodes[n_num])) {
+ tipc_node_has_active_links(c_ptr->nodes[n_num])) {
send = 1;
msg_set_dataoctet(msg, n_num);
}
}
if (send)
- link_send(buf, dest, dest);
+ tipc_link_send(buf, dest, dest);
else
buf_discard(buf);
} else {
}
}
-void cluster_send_ext_routes(struct cluster *c_ptr, u32 dest)
+void tipc_cltr_send_ext_routes(struct cluster *c_ptr, u32 dest)
{
struct sk_buff *buf;
struct tipc_msg *msg;
assert(!is_slave(dest));
assert(in_own_cluster(dest));
highest = c_ptr->highest_node;
- buf = cluster_prepare_routing_msg(highest + 1, c_ptr->addr);
+ buf = tipc_cltr_prepare_routing_msg(highest + 1, c_ptr->addr);
if (buf) {
msg = buf_msg(buf);
msg_set_remote_node(msg, c_ptr->addr);
msg_set_type(msg, EXT_ROUTING_TABLE);
for (n_num = 1; n_num <= highest; n_num++) {
if (c_ptr->nodes[n_num] &&
- node_has_active_links(c_ptr->nodes[n_num])) {
+ tipc_node_has_active_links(c_ptr->nodes[n_num])) {
send = 1;
msg_set_dataoctet(msg, n_num);
}
}
if (send)
- link_send(buf, dest, dest);
+ tipc_link_send(buf, dest, dest);
else
buf_discard(buf);
} else {
}
}
-void cluster_send_local_routes(struct cluster *c_ptr, u32 dest)
+void tipc_cltr_send_local_routes(struct cluster *c_ptr, u32 dest)
{
struct sk_buff *buf;
struct tipc_msg *msg;
assert(is_slave(dest));
assert(in_own_cluster(c_ptr->addr));
- buf = cluster_prepare_routing_msg(highest, c_ptr->addr);
+ buf = tipc_cltr_prepare_routing_msg(highest, c_ptr->addr);
if (buf) {
msg = buf_msg(buf);
msg_set_remote_node(msg, c_ptr->addr);
msg_set_type(msg, LOCAL_ROUTING_TABLE);
for (n_num = 1; n_num <= highest; n_num++) {
if (c_ptr->nodes[n_num] &&
- node_has_active_links(c_ptr->nodes[n_num])) {
+ tipc_node_has_active_links(c_ptr->nodes[n_num])) {
send = 1;
msg_set_dataoctet(msg, n_num);
}
}
if (send)
- link_send(buf, dest, dest);
+ tipc_link_send(buf, dest, dest);
else
buf_discard(buf);
} else {
}
}
-void cluster_recv_routing_table(struct sk_buff *buf)
+void tipc_cltr_recv_routing_table(struct sk_buff *buf)
{
struct tipc_msg *msg = buf_msg(buf);
struct cluster *c_ptr;
u32 c_num;
u32 n_num;
- c_ptr = cluster_find(rem_node);
+ c_ptr = tipc_cltr_find(rem_node);
if (!c_ptr) {
- c_ptr = cluster_create(rem_node);
+ c_ptr = tipc_cltr_create(rem_node);
if (!c_ptr) {
buf_discard(buf);
return;
u32 addr = tipc_addr(z_num, c_num, n_num);
n_ptr = c_ptr->nodes[n_num];
if (!n_ptr) {
- n_ptr = node_create(addr);
+ n_ptr = tipc_node_create(addr);
}
if (n_ptr)
- node_add_router(n_ptr, router);
+ tipc_node_add_router(n_ptr, router);
}
}
break;
u32 addr = tipc_addr(z_num, c_num, slave_num);
n_ptr = c_ptr->nodes[slave_num];
if (!n_ptr) {
- n_ptr = node_create(addr);
+ n_ptr = tipc_node_create(addr);
}
if (n_ptr)
- node_add_router(n_ptr, router);
+ tipc_node_add_router(n_ptr, router);
}
}
break;
}
n_ptr = c_ptr->nodes[tipc_node(rem_node)];
if (!n_ptr)
- n_ptr = node_create(rem_node);
+ n_ptr = tipc_node_create(rem_node);
if (n_ptr)
- node_add_router(n_ptr, router);
+ tipc_node_add_router(n_ptr, router);
break;
case ROUTE_REMOVAL:
if (!is_slave(tipc_own_addr)) {
}
n_ptr = c_ptr->nodes[tipc_node(rem_node)];
if (n_ptr)
- node_remove_router(n_ptr, router);
+ tipc_node_remove_router(n_ptr, router);
break;
default:
assert(!"Illegal routing manager message received\n");
buf_discard(buf);
}
-void cluster_remove_as_router(struct cluster *c_ptr, u32 router)
+void tipc_cltr_remove_as_router(struct cluster *c_ptr, u32 router)
{
u32 start_entry;
u32 tstop;
for (n_num = start_entry; n_num <= tstop; n_num++) {
if (c_ptr->nodes[n_num]) {
- node_remove_router(c_ptr->nodes[n_num], router);
+ tipc_node_remove_router(c_ptr->nodes[n_num], router);
}
}
}
/**
- * cluster_multicast - multicast message to local nodes
+ * tipc_cltr_multicast - multicast message to local nodes
*/
-void cluster_multicast(struct cluster *c_ptr, struct sk_buff *buf,
- u32 lower, u32 upper)
+void tipc_cltr_multicast(struct cluster *c_ptr, struct sk_buff *buf,
+ u32 lower, u32 upper)
{
struct sk_buff *buf_copy;
struct node *n_ptr;
assert(lower <= upper);
assert(((lower >= 1) && (lower <= tipc_max_nodes)) ||
- ((lower >= LOWEST_SLAVE) && (lower <= highest_allowed_slave)));
+ ((lower >= LOWEST_SLAVE) && (lower <= tipc_highest_allowed_slave)));
assert(((upper >= 1) && (upper <= tipc_max_nodes)) ||
- ((upper >= LOWEST_SLAVE) && (upper <= highest_allowed_slave)));
+ ((upper >= LOWEST_SLAVE) && (upper <= tipc_highest_allowed_slave)));
assert(in_own_cluster(c_ptr->addr));
tstop = is_slave(upper) ? c_ptr->highest_slave : c_ptr->highest_node;
tstop = upper;
for (n_num = lower; n_num <= tstop; n_num++) {
n_ptr = c_ptr->nodes[n_num];
- if (n_ptr && node_has_active_links(n_ptr)) {
+ if (n_ptr && tipc_node_has_active_links(n_ptr)) {
buf_copy = skb_copy(buf, GFP_ATOMIC);
if (buf_copy == NULL)
break;
msg_set_destnode(buf_msg(buf_copy), n_ptr->addr);
- link_send(buf_copy, n_ptr->addr, n_ptr->addr);
+ tipc_link_send(buf_copy, n_ptr->addr, n_ptr->addr);
}
}
buf_discard(buf);
}
/**
- * cluster_broadcast - broadcast message to all nodes within cluster
+ * tipc_cltr_broadcast - broadcast message to all nodes within cluster
*/
-void cluster_broadcast(struct sk_buff *buf)
+void tipc_cltr_broadcast(struct sk_buff *buf)
{
struct sk_buff *buf_copy;
struct cluster *c_ptr;
u32 node_type;
if (tipc_mode == TIPC_NET_MODE) {
- c_ptr = cluster_find(tipc_own_addr);
+ c_ptr = tipc_cltr_find(tipc_own_addr);
assert(in_own_cluster(c_ptr->addr)); /* For now */
/* Send to standard nodes, then repeat loop sending to slaves */
for (node_type = 1; node_type <= 2; node_type++) {
for (n_num = tstart; n_num <= tstop; n_num++) {
n_ptr = c_ptr->nodes[n_num];
- if (n_ptr && node_has_active_links(n_ptr)) {
+ if (n_ptr && tipc_node_has_active_links(n_ptr)) {
buf_copy = skb_copy(buf, GFP_ATOMIC);
if (buf_copy == NULL)
goto exit;
msg_set_destnode(buf_msg(buf_copy),
n_ptr->addr);
- link_send(buf_copy, n_ptr->addr,
- n_ptr->addr);
+ tipc_link_send(buf_copy, n_ptr->addr,
+ n_ptr->addr);
}
}
tstart = LOWEST_SLAVE;
buf_discard(buf);
}
-int cluster_init(void)
+int tipc_cltr_init(void)
{
- highest_allowed_slave = LOWEST_SLAVE + tipc_max_slaves;
- return cluster_create(tipc_own_addr) ? TIPC_OK : -ENOMEM;
+ tipc_highest_allowed_slave = LOWEST_SLAVE + tipc_max_slaves;
+ return tipc_cltr_create(tipc_own_addr) ? TIPC_OK : -ENOMEM;
}
};
-extern struct node **local_nodes;
-extern u32 highest_allowed_slave;
-extern struct node_map cluster_bcast_nodes;
+extern struct node **tipc_local_nodes;
+extern u32 tipc_highest_allowed_slave;
+extern struct node_map tipc_cltr_bcast_nodes;
-void cluster_remove_as_router(struct cluster *c_ptr, u32 router);
-void cluster_send_ext_routes(struct cluster *c_ptr, u32 dest);
-struct node *cluster_select_node(struct cluster *c_ptr, u32 selector);
-u32 cluster_select_router(struct cluster *c_ptr, u32 ref);
-void cluster_recv_routing_table(struct sk_buff *buf);
-struct cluster *cluster_create(u32 addr);
-void cluster_delete(struct cluster *c_ptr);
-void cluster_attach_node(struct cluster *c_ptr, struct node *n_ptr);
-void cluster_send_slave_routes(struct cluster *c_ptr, u32 dest);
-void cluster_broadcast(struct sk_buff *buf);
-int cluster_init(void);
-u32 cluster_next_node(struct cluster *c_ptr, u32 addr);
-void cluster_bcast_new_route(struct cluster *c_ptr, u32 dest, u32 lo, u32 hi);
-void cluster_send_local_routes(struct cluster *c_ptr, u32 dest);
-void cluster_bcast_lost_route(struct cluster *c_ptr, u32 dest, u32 lo, u32 hi);
+void tipc_cltr_remove_as_router(struct cluster *c_ptr, u32 router);
+void tipc_cltr_send_ext_routes(struct cluster *c_ptr, u32 dest);
+struct node *tipc_cltr_select_node(struct cluster *c_ptr, u32 selector);
+u32 tipc_cltr_select_router(struct cluster *c_ptr, u32 ref);
+void tipc_cltr_recv_routing_table(struct sk_buff *buf);
+struct cluster *tipc_cltr_create(u32 addr);
+void tipc_cltr_delete(struct cluster *c_ptr);
+void tipc_cltr_attach_node(struct cluster *c_ptr, struct node *n_ptr);
+void tipc_cltr_send_slave_routes(struct cluster *c_ptr, u32 dest);
+void tipc_cltr_broadcast(struct sk_buff *buf);
+int tipc_cltr_init(void);
+u32 tipc_cltr_next_node(struct cluster *c_ptr, u32 addr);
+void tipc_cltr_bcast_new_route(struct cluster *c_ptr, u32 dest, u32 lo, u32 hi);
+void tipc_cltr_send_local_routes(struct cluster *c_ptr, u32 dest);
+void tipc_cltr_bcast_lost_route(struct cluster *c_ptr, u32 dest, u32 lo, u32 hi);
-static inline struct cluster *cluster_find(u32 addr)
+static inline struct cluster *tipc_cltr_find(u32 addr)
{
- struct _zone *z_ptr = zone_find(addr);
+ struct _zone *z_ptr = tipc_zone_find(addr);
if (z_ptr)
return z_ptr->clusters[1];
static int rep_headroom; /* reply message headroom to use */
-void cfg_link_event(u32 addr, char *name, int up)
+void tipc_cfg_link_event(u32 addr, char *name, int up)
{
/* TIPC DOESN'T HANDLE LINK EVENT SUBSCRIPTIONS AT THE MOMENT */
}
-struct sk_buff *cfg_reply_alloc(int payload_size)
+struct sk_buff *tipc_cfg_reply_alloc(int payload_size)
{
struct sk_buff *buf;
return buf;
}
-int cfg_append_tlv(struct sk_buff *buf, int tlv_type,
- void *tlv_data, int tlv_data_size)
+int tipc_cfg_append_tlv(struct sk_buff *buf, int tlv_type,
+ void *tlv_data, int tlv_data_size)
{
struct tlv_desc *tlv = (struct tlv_desc *)buf->tail;
int new_tlv_space = TLV_SPACE(tlv_data_size);
if (skb_tailroom(buf) < new_tlv_space) {
- dbg("cfg_append_tlv unable to append TLV\n");
+ dbg("tipc_cfg_append_tlv unable to append TLV\n");
return 0;
}
skb_put(buf, new_tlv_space);
return 1;
}
-struct sk_buff *cfg_reply_unsigned_type(u16 tlv_type, u32 value)
+struct sk_buff *tipc_cfg_reply_unsigned_type(u16 tlv_type, u32 value)
{
struct sk_buff *buf;
u32 value_net;
- buf = cfg_reply_alloc(TLV_SPACE(sizeof(value)));
+ buf = tipc_cfg_reply_alloc(TLV_SPACE(sizeof(value)));
if (buf) {
value_net = htonl(value);
- cfg_append_tlv(buf, tlv_type, &value_net,
- sizeof(value_net));
+ tipc_cfg_append_tlv(buf, tlv_type, &value_net,
+ sizeof(value_net));
}
return buf;
}
-struct sk_buff *cfg_reply_string_type(u16 tlv_type, char *string)
+struct sk_buff *tipc_cfg_reply_string_type(u16 tlv_type, char *string)
{
struct sk_buff *buf;
int string_len = strlen(string) + 1;
- buf = cfg_reply_alloc(TLV_SPACE(string_len));
+ buf = tipc_cfg_reply_alloc(TLV_SPACE(string_len));
if (buf)
- cfg_append_tlv(buf, tlv_type, string, string_len);
+ tipc_cfg_append_tlv(buf, tlv_type, string, string_len);
return buf;
}
exit:
rmsg.result_len = htonl(msg_sect[1].iov_len);
rmsg.retval = htonl(rv);
- cfg_respond(msg_sect, 2u, orig);
+ tipc_cfg_respond(msg_sect, 2u, orig);
}
#endif
struct tipc_bearer_config *args;
if (!TLV_CHECK(req_tlv_area, req_tlv_space, TIPC_TLV_BEARER_CONFIG))
- return cfg_reply_error_string(TIPC_CFG_TLV_ERROR);
+ return tipc_cfg_reply_error_string(TIPC_CFG_TLV_ERROR);
args = (struct tipc_bearer_config *)TLV_DATA(req_tlv_area);
if (tipc_enable_bearer(args->name,
ntohl(args->detect_scope),
ntohl(args->priority)))
- return cfg_reply_error_string("unable to enable bearer");
+ return tipc_cfg_reply_error_string("unable to enable bearer");
- return cfg_reply_none();
+ return tipc_cfg_reply_none();
}
static struct sk_buff *cfg_disable_bearer(void)
{
if (!TLV_CHECK(req_tlv_area, req_tlv_space, TIPC_TLV_BEARER_NAME))
- return cfg_reply_error_string(TIPC_CFG_TLV_ERROR);
+ return tipc_cfg_reply_error_string(TIPC_CFG_TLV_ERROR);
if (tipc_disable_bearer((char *)TLV_DATA(req_tlv_area)))
- return cfg_reply_error_string("unable to disable bearer");
+ return tipc_cfg_reply_error_string("unable to disable bearer");
- return cfg_reply_none();
+ return tipc_cfg_reply_none();
}
static struct sk_buff *cfg_set_own_addr(void)
u32 addr;
if (!TLV_CHECK(req_tlv_area, req_tlv_space, TIPC_TLV_NET_ADDR))
- return cfg_reply_error_string(TIPC_CFG_TLV_ERROR);
+ return tipc_cfg_reply_error_string(TIPC_CFG_TLV_ERROR);
addr = *(u32 *)TLV_DATA(req_tlv_area);
addr = ntohl(addr);
if (addr == tipc_own_addr)
- return cfg_reply_none();
- if (!addr_node_valid(addr))
- return cfg_reply_error_string(TIPC_CFG_INVALID_VALUE
- " (node address)");
+ return tipc_cfg_reply_none();
+ if (!tipc_addr_node_valid(addr))
+ return tipc_cfg_reply_error_string(TIPC_CFG_INVALID_VALUE
+ " (node address)");
if (tipc_own_addr)
- return cfg_reply_error_string(TIPC_CFG_NOT_SUPPORTED
- " (cannot change node address once assigned)");
+ return tipc_cfg_reply_error_string(TIPC_CFG_NOT_SUPPORTED
+ " (cannot change node address once assigned)");
spin_unlock_bh(&config_lock);
- stop_net();
+ tipc_core_stop_net();
tipc_own_addr = addr;
- start_net();
+ tipc_core_start_net();
spin_lock_bh(&config_lock);
- return cfg_reply_none();
+ return tipc_cfg_reply_none();
}
static struct sk_buff *cfg_set_remote_mng(void)
u32 value;
if (!TLV_CHECK(req_tlv_area, req_tlv_space, TIPC_TLV_UNSIGNED))
- return cfg_reply_error_string(TIPC_CFG_TLV_ERROR);
+ return tipc_cfg_reply_error_string(TIPC_CFG_TLV_ERROR);
value = *(u32 *)TLV_DATA(req_tlv_area);
value = ntohl(value);
tipc_remote_management = (value != 0);
- return cfg_reply_none();
+ return tipc_cfg_reply_none();
}
static struct sk_buff *cfg_set_max_publications(void)
u32 value;
if (!TLV_CHECK(req_tlv_area, req_tlv_space, TIPC_TLV_UNSIGNED))
- return cfg_reply_error_string(TIPC_CFG_TLV_ERROR);
+ return tipc_cfg_reply_error_string(TIPC_CFG_TLV_ERROR);
value = *(u32 *)TLV_DATA(req_tlv_area);
value = ntohl(value);
if (value != delimit(value, 1, 65535))
- return cfg_reply_error_string(TIPC_CFG_INVALID_VALUE
- " (max publications must be 1-65535)");
+ return tipc_cfg_reply_error_string(TIPC_CFG_INVALID_VALUE
+ " (max publications must be 1-65535)");
tipc_max_publications = value;
- return cfg_reply_none();
+ return tipc_cfg_reply_none();
}
static struct sk_buff *cfg_set_max_subscriptions(void)
u32 value;
if (!TLV_CHECK(req_tlv_area, req_tlv_space, TIPC_TLV_UNSIGNED))
- return cfg_reply_error_string(TIPC_CFG_TLV_ERROR);
+ return tipc_cfg_reply_error_string(TIPC_CFG_TLV_ERROR);
value = *(u32 *)TLV_DATA(req_tlv_area);
value = ntohl(value);
if (value != delimit(value, 1, 65535))
- return cfg_reply_error_string(TIPC_CFG_INVALID_VALUE
- " (max subscriptions must be 1-65535");
+ return tipc_cfg_reply_error_string(TIPC_CFG_INVALID_VALUE
+ " (max subscriptions must be 1-65535");
tipc_max_subscriptions = value;
- return cfg_reply_none();
+ return tipc_cfg_reply_none();
}
static struct sk_buff *cfg_set_max_ports(void)
u32 value;
if (!TLV_CHECK(req_tlv_area, req_tlv_space, TIPC_TLV_UNSIGNED))
- return cfg_reply_error_string(TIPC_CFG_TLV_ERROR);
+ return tipc_cfg_reply_error_string(TIPC_CFG_TLV_ERROR);
value = *(u32 *)TLV_DATA(req_tlv_area);
value = ntohl(value);
if (value != delimit(value, 127, 65535))
- return cfg_reply_error_string(TIPC_CFG_INVALID_VALUE
- " (max ports must be 127-65535)");
+ return tipc_cfg_reply_error_string(TIPC_CFG_INVALID_VALUE
+ " (max ports must be 127-65535)");
if (value == tipc_max_ports)
- return cfg_reply_none();
+ return tipc_cfg_reply_none();
if (atomic_read(&tipc_user_count) > 2)
- return cfg_reply_error_string(TIPC_CFG_NOT_SUPPORTED
- " (cannot change max ports while TIPC users exist)");
+ return tipc_cfg_reply_error_string(TIPC_CFG_NOT_SUPPORTED
+ " (cannot change max ports while TIPC users exist)");
spin_unlock_bh(&config_lock);
orig_mode = tipc_get_mode();
if (orig_mode == TIPC_NET_MODE)
- stop_net();
- stop_core();
+ tipc_core_stop_net();
+ tipc_core_stop();
tipc_max_ports = value;
- start_core();
+ tipc_core_start();
if (orig_mode == TIPC_NET_MODE)
- start_net();
+ tipc_core_start_net();
spin_lock_bh(&config_lock);
- return cfg_reply_none();
+ return tipc_cfg_reply_none();
}
static struct sk_buff *set_net_max(int value, int *parameter)
if (value != *parameter) {
orig_mode = tipc_get_mode();
if (orig_mode == TIPC_NET_MODE)
- stop_net();
+ tipc_core_stop_net();
*parameter = value;
if (orig_mode == TIPC_NET_MODE)
- start_net();
+ tipc_core_start_net();
}
- return cfg_reply_none();
+ return tipc_cfg_reply_none();
}
static struct sk_buff *cfg_set_max_zones(void)
u32 value;
if (!TLV_CHECK(req_tlv_area, req_tlv_space, TIPC_TLV_UNSIGNED))
- return cfg_reply_error_string(TIPC_CFG_TLV_ERROR);
+ return tipc_cfg_reply_error_string(TIPC_CFG_TLV_ERROR);
value = *(u32 *)TLV_DATA(req_tlv_area);
value = ntohl(value);
if (value != delimit(value, 1, 255))
- return cfg_reply_error_string(TIPC_CFG_INVALID_VALUE
- " (max zones must be 1-255)");
+ return tipc_cfg_reply_error_string(TIPC_CFG_INVALID_VALUE
+ " (max zones must be 1-255)");
return set_net_max(value, &tipc_max_zones);
}
u32 value;
if (!TLV_CHECK(req_tlv_area, req_tlv_space, TIPC_TLV_UNSIGNED))
- return cfg_reply_error_string(TIPC_CFG_TLV_ERROR);
+ return tipc_cfg_reply_error_string(TIPC_CFG_TLV_ERROR);
value = *(u32 *)TLV_DATA(req_tlv_area);
value = ntohl(value);
if (value != 1)
- return cfg_reply_error_string(TIPC_CFG_NOT_SUPPORTED
- " (max clusters fixed at 1)");
- return cfg_reply_none();
+ return tipc_cfg_reply_error_string(TIPC_CFG_NOT_SUPPORTED
+ " (max clusters fixed at 1)");
+ return tipc_cfg_reply_none();
}
static struct sk_buff *cfg_set_max_nodes(void)
u32 value;
if (!TLV_CHECK(req_tlv_area, req_tlv_space, TIPC_TLV_UNSIGNED))
- return cfg_reply_error_string(TIPC_CFG_TLV_ERROR);
+ return tipc_cfg_reply_error_string(TIPC_CFG_TLV_ERROR);
value = *(u32 *)TLV_DATA(req_tlv_area);
value = ntohl(value);
if (value != delimit(value, 8, 2047))
- return cfg_reply_error_string(TIPC_CFG_INVALID_VALUE
- " (max nodes must be 8-2047)");
+ return tipc_cfg_reply_error_string(TIPC_CFG_INVALID_VALUE
+ " (max nodes must be 8-2047)");
return set_net_max(value, &tipc_max_nodes);
}
u32 value;
if (!TLV_CHECK(req_tlv_area, req_tlv_space, TIPC_TLV_UNSIGNED))
- return cfg_reply_error_string(TIPC_CFG_TLV_ERROR);
+ return tipc_cfg_reply_error_string(TIPC_CFG_TLV_ERROR);
value = *(u32 *)TLV_DATA(req_tlv_area);
value = ntohl(value);
if (value != 0)
- return cfg_reply_error_string(TIPC_CFG_NOT_SUPPORTED
- " (max secondary nodes fixed at 0)");
- return cfg_reply_none();
+ return tipc_cfg_reply_error_string(TIPC_CFG_NOT_SUPPORTED
+ " (max secondary nodes fixed at 0)");
+ return tipc_cfg_reply_none();
}
static struct sk_buff *cfg_set_netid(void)
u32 value;
if (!TLV_CHECK(req_tlv_area, req_tlv_space, TIPC_TLV_UNSIGNED))
- return cfg_reply_error_string(TIPC_CFG_TLV_ERROR);
+ return tipc_cfg_reply_error_string(TIPC_CFG_TLV_ERROR);
value = *(u32 *)TLV_DATA(req_tlv_area);
value = ntohl(value);
if (value != delimit(value, 1, 9999))
- return cfg_reply_error_string(TIPC_CFG_INVALID_VALUE
- " (network id must be 1-9999)");
+ return tipc_cfg_reply_error_string(TIPC_CFG_INVALID_VALUE
+ " (network id must be 1-9999)");
if (tipc_own_addr)
- return cfg_reply_error_string(TIPC_CFG_NOT_SUPPORTED
- " (cannot change network id once part of network)");
+ return tipc_cfg_reply_error_string(TIPC_CFG_NOT_SUPPORTED
+ " (cannot change network id once part of network)");
return set_net_max(value, &tipc_net_id);
}
-struct sk_buff *cfg_do_cmd(u32 orig_node, u16 cmd, const void *request_area,
- int request_space, int reply_headroom)
+struct sk_buff *tipc_cfg_do_cmd(u32 orig_node, u16 cmd, const void *request_area,
+ int request_space, int reply_headroom)
{
struct sk_buff *rep_tlv_buf;
if (likely(orig_node == tipc_own_addr)) {
/* command is permitted */
} else if (cmd >= 0x8000) {
- rep_tlv_buf = cfg_reply_error_string(TIPC_CFG_NOT_SUPPORTED
- " (cannot be done remotely)");
+ rep_tlv_buf = tipc_cfg_reply_error_string(TIPC_CFG_NOT_SUPPORTED
+ " (cannot be done remotely)");
goto exit;
} else if (!tipc_remote_management) {
- rep_tlv_buf = cfg_reply_error_string(TIPC_CFG_NO_REMOTE);
+ rep_tlv_buf = tipc_cfg_reply_error_string(TIPC_CFG_NO_REMOTE);
goto exit;
}
else if (cmd >= 0x4000) {
u32 domain = 0;
- if ((nametbl_translate(TIPC_ZM_SRV, 0, &domain) == 0) ||
+ if ((tipc_nametbl_translate(TIPC_ZM_SRV, 0, &domain) == 0) ||
(domain != orig_node)) {
- rep_tlv_buf = cfg_reply_error_string(TIPC_CFG_NOT_ZONE_MSTR);
+ rep_tlv_buf = tipc_cfg_reply_error_string(TIPC_CFG_NOT_ZONE_MSTR);
goto exit;
}
}
switch (cmd) {
case TIPC_CMD_NOOP:
- rep_tlv_buf = cfg_reply_none();
+ rep_tlv_buf = tipc_cfg_reply_none();
break;
case TIPC_CMD_GET_NODES:
- rep_tlv_buf = node_get_nodes(req_tlv_area, req_tlv_space);
+ rep_tlv_buf = tipc_node_get_nodes(req_tlv_area, req_tlv_space);
break;
case TIPC_CMD_GET_LINKS:
- rep_tlv_buf = node_get_links(req_tlv_area, req_tlv_space);
+ rep_tlv_buf = tipc_node_get_links(req_tlv_area, req_tlv_space);
break;
case TIPC_CMD_SHOW_LINK_STATS:
- rep_tlv_buf = link_cmd_show_stats(req_tlv_area, req_tlv_space);
+ rep_tlv_buf = tipc_link_cmd_show_stats(req_tlv_area, req_tlv_space);
break;
case TIPC_CMD_RESET_LINK_STATS:
- rep_tlv_buf = link_cmd_reset_stats(req_tlv_area, req_tlv_space);
+ rep_tlv_buf = tipc_link_cmd_reset_stats(req_tlv_area, req_tlv_space);
break;
case TIPC_CMD_SHOW_NAME_TABLE:
- rep_tlv_buf = nametbl_get(req_tlv_area, req_tlv_space);
+ rep_tlv_buf = tipc_nametbl_get(req_tlv_area, req_tlv_space);
break;
case TIPC_CMD_GET_BEARER_NAMES:
- rep_tlv_buf = bearer_get_names();
+ rep_tlv_buf = tipc_bearer_get_names();
break;
case TIPC_CMD_GET_MEDIA_NAMES:
- rep_tlv_buf = media_get_names();
+ rep_tlv_buf = tipc_media_get_names();
break;
case TIPC_CMD_SHOW_PORTS:
- rep_tlv_buf = port_get_ports();
+ rep_tlv_buf = tipc_port_get_ports();
break;
#if 0
case TIPC_CMD_SHOW_PORT_STATS:
rep_tlv_buf = port_show_stats(req_tlv_area, req_tlv_space);
break;
case TIPC_CMD_RESET_PORT_STATS:
- rep_tlv_buf = cfg_reply_error_string(TIPC_CFG_NOT_SUPPORTED);
+ rep_tlv_buf = tipc_cfg_reply_error_string(TIPC_CFG_NOT_SUPPORTED);
break;
#endif
case TIPC_CMD_SET_LOG_SIZE:
- rep_tlv_buf = log_resize(req_tlv_area, req_tlv_space);
+ rep_tlv_buf = tipc_log_resize(req_tlv_area, req_tlv_space);
break;
case TIPC_CMD_DUMP_LOG:
- rep_tlv_buf = log_dump();
+ rep_tlv_buf = tipc_log_dump();
break;
case TIPC_CMD_SET_LINK_TOL:
case TIPC_CMD_SET_LINK_PRI:
case TIPC_CMD_SET_LINK_WINDOW:
- rep_tlv_buf = link_cmd_config(req_tlv_area, req_tlv_space, cmd);
+ rep_tlv_buf = tipc_link_cmd_config(req_tlv_area, req_tlv_space, cmd);
break;
case TIPC_CMD_ENABLE_BEARER:
rep_tlv_buf = cfg_enable_bearer();
rep_tlv_buf = cfg_set_netid();
break;
case TIPC_CMD_GET_REMOTE_MNG:
- rep_tlv_buf = cfg_reply_unsigned(tipc_remote_management);
+ rep_tlv_buf = tipc_cfg_reply_unsigned(tipc_remote_management);
break;
case TIPC_CMD_GET_MAX_PORTS:
- rep_tlv_buf = cfg_reply_unsigned(tipc_max_ports);
+ rep_tlv_buf = tipc_cfg_reply_unsigned(tipc_max_ports);
break;
case TIPC_CMD_GET_MAX_PUBL:
- rep_tlv_buf = cfg_reply_unsigned(tipc_max_publications);
+ rep_tlv_buf = tipc_cfg_reply_unsigned(tipc_max_publications);
break;
case TIPC_CMD_GET_MAX_SUBSCR:
- rep_tlv_buf = cfg_reply_unsigned(tipc_max_subscriptions);
+ rep_tlv_buf = tipc_cfg_reply_unsigned(tipc_max_subscriptions);
break;
case TIPC_CMD_GET_MAX_ZONES:
- rep_tlv_buf = cfg_reply_unsigned(tipc_max_zones);
+ rep_tlv_buf = tipc_cfg_reply_unsigned(tipc_max_zones);
break;
case TIPC_CMD_GET_MAX_CLUSTERS:
- rep_tlv_buf = cfg_reply_unsigned(tipc_max_clusters);
+ rep_tlv_buf = tipc_cfg_reply_unsigned(tipc_max_clusters);
break;
case TIPC_CMD_GET_MAX_NODES:
- rep_tlv_buf = cfg_reply_unsigned(tipc_max_nodes);
+ rep_tlv_buf = tipc_cfg_reply_unsigned(tipc_max_nodes);
break;
case TIPC_CMD_GET_MAX_SLAVES:
- rep_tlv_buf = cfg_reply_unsigned(tipc_max_slaves);
+ rep_tlv_buf = tipc_cfg_reply_unsigned(tipc_max_slaves);
break;
case TIPC_CMD_GET_NETID:
- rep_tlv_buf = cfg_reply_unsigned(tipc_net_id);
+ rep_tlv_buf = tipc_cfg_reply_unsigned(tipc_net_id);
break;
default:
rep_tlv_buf = NULL;
/* Generate reply for request (if can't, return request) */
- rep_buf = cfg_do_cmd(orig->node,
- ntohs(req_hdr->tcm_type),
- msg + sizeof(*req_hdr),
- size - sizeof(*req_hdr),
- BUF_HEADROOM + MAX_H_SIZE + sizeof(*rep_hdr));
+ rep_buf = tipc_cfg_do_cmd(orig->node,
+ ntohs(req_hdr->tcm_type),
+ msg + sizeof(*req_hdr),
+ size - sizeof(*req_hdr),
+ BUF_HEADROOM + MAX_H_SIZE + sizeof(*rep_hdr));
if (rep_buf) {
skb_push(rep_buf, sizeof(*rep_hdr));
rep_hdr = (struct tipc_cfg_msg_hdr *)rep_buf->data;
tipc_send_buf2port(port_ref, orig, rep_buf, rep_buf->len);
}
-int cfg_init(void)
+int tipc_cfg_init(void)
{
struct tipc_name_seq seq;
int res;
seq.type = TIPC_CFG_SRV;
seq.lower = seq.upper = tipc_own_addr;
- res = nametbl_publish_rsv(mng.port_ref, TIPC_ZONE_SCOPE, &seq);
+ res = tipc_nametbl_publish_rsv(mng.port_ref, TIPC_ZONE_SCOPE, &seq);
if (res)
goto failed;
return res;
}
-void cfg_stop(void)
+void tipc_cfg_stop(void)
{
if (mng.user_ref) {
tipc_detach(mng.user_ref);
/* ---------------------------------------------------------------------- */
-#include <linux/tipc.h>
-#include <linux/tipc_config.h>
+#include "core.h"
#include "link.h"
-struct sk_buff *cfg_reply_alloc(int payload_size);
-int cfg_append_tlv(struct sk_buff *buf, int tlv_type,
- void *tlv_data, int tlv_data_size);
-struct sk_buff *cfg_reply_unsigned_type(u16 tlv_type, u32 value);
-struct sk_buff *cfg_reply_string_type(u16 tlv_type, char *string);
+struct sk_buff *tipc_cfg_reply_alloc(int payload_size);
+int tipc_cfg_append_tlv(struct sk_buff *buf, int tlv_type,
+ void *tlv_data, int tlv_data_size);
+struct sk_buff *tipc_cfg_reply_unsigned_type(u16 tlv_type, u32 value);
+struct sk_buff *tipc_cfg_reply_string_type(u16 tlv_type, char *string);
-static inline struct sk_buff *cfg_reply_none(void)
+static inline struct sk_buff *tipc_cfg_reply_none(void)
{
- return cfg_reply_alloc(0);
+ return tipc_cfg_reply_alloc(0);
}
-static inline struct sk_buff *cfg_reply_unsigned(u32 value)
+static inline struct sk_buff *tipc_cfg_reply_unsigned(u32 value)
{
- return cfg_reply_unsigned_type(TIPC_TLV_UNSIGNED, value);
+ return tipc_cfg_reply_unsigned_type(TIPC_TLV_UNSIGNED, value);
}
-static inline struct sk_buff *cfg_reply_error_string(char *string)
+static inline struct sk_buff *tipc_cfg_reply_error_string(char *string)
{
- return cfg_reply_string_type(TIPC_TLV_ERROR_STRING, string);
+ return tipc_cfg_reply_string_type(TIPC_TLV_ERROR_STRING, string);
}
-static inline struct sk_buff *cfg_reply_ultra_string(char *string)
+static inline struct sk_buff *tipc_cfg_reply_ultra_string(char *string)
{
- return cfg_reply_string_type(TIPC_TLV_ULTRA_STRING, string);
+ return tipc_cfg_reply_string_type(TIPC_TLV_ULTRA_STRING, string);
}
-struct sk_buff *cfg_do_cmd(u32 orig_node, u16 cmd,
- const void *req_tlv_area, int req_tlv_space,
- int headroom);
+struct sk_buff *tipc_cfg_do_cmd(u32 orig_node, u16 cmd,
+ const void *req_tlv_area, int req_tlv_space,
+ int headroom);
-void cfg_link_event(u32 addr, char *name, int up);
-int cfg_init(void);
-void cfg_stop(void);
+void tipc_cfg_link_event(u32 addr, char *name, int up);
+int tipc_cfg_init(void);
+void tipc_cfg_stop(void);
#endif
#include <linux/init.h>
#include <linux/module.h>
#include <linux/kernel.h>
-#include <linux/version.h>
#include <linux/random.h>
#include "core.h"
#include "subscr.h"
#include "config.h"
-int eth_media_start(void);
-void eth_media_stop(void);
-int handler_start(void);
-void handler_stop(void);
-int socket_init(void);
-void socket_stop(void);
-int netlink_start(void);
-void netlink_stop(void);
+int tipc_eth_media_start(void);
+void tipc_eth_media_stop(void);
+int tipc_handler_start(void);
+void tipc_handler_stop(void);
+int tipc_socket_init(void);
+void tipc_socket_stop(void);
+int tipc_netlink_start(void);
+void tipc_netlink_stop(void);
#define MOD_NAME "tipc_start: "
}
/**
- * stop_net - shut down TIPC networking sub-systems
+ * tipc_core_stop_net - shut down TIPC networking sub-systems
*/
-void stop_net(void)
+void tipc_core_stop_net(void)
{
- eth_media_stop();
- tipc_stop_net();
+ tipc_eth_media_stop();
+ tipc_net_stop();
}
/**
* start_net - start TIPC networking sub-systems
*/
-int start_net(void)
+int tipc_core_start_net(void)
{
int res;
- if ((res = tipc_start_net()) ||
- (res = eth_media_start())) {
- stop_net();
+ if ((res = tipc_net_start()) ||
+ (res = tipc_eth_media_start())) {
+ tipc_core_stop_net();
}
return res;
}
/**
- * stop_core - switch TIPC from SINGLE NODE to NOT RUNNING mode
+ * tipc_core_stop - switch TIPC from SINGLE NODE to NOT RUNNING mode
*/
-void stop_core(void)
+void tipc_core_stop(void)
{
if (tipc_mode != TIPC_NODE_MODE)
return;
tipc_mode = TIPC_NOT_RUNNING;
- netlink_stop();
- handler_stop();
- cfg_stop();
- subscr_stop();
- reg_stop();
- nametbl_stop();
- ref_table_stop();
- socket_stop();
+ tipc_netlink_stop();
+ tipc_handler_stop();
+ tipc_cfg_stop();
+ tipc_subscr_stop();
+ tipc_reg_stop();
+ tipc_nametbl_stop();
+ tipc_ref_table_stop();
+ tipc_socket_stop();
}
/**
- * start_core - switch TIPC from NOT RUNNING to SINGLE NODE mode
+ * tipc_core_start - switch TIPC from NOT RUNNING to SINGLE NODE mode
*/
-int start_core(void)
+int tipc_core_start(void)
{
int res;
get_random_bytes(&tipc_random, sizeof(tipc_random));
tipc_mode = TIPC_NODE_MODE;
- if ((res = handler_start()) ||
- (res = ref_table_init(tipc_max_ports + tipc_max_subscriptions,
- tipc_random)) ||
- (res = reg_start()) ||
- (res = nametbl_init()) ||
- (res = k_signal((Handler)subscr_start, 0)) ||
- (res = k_signal((Handler)cfg_init, 0)) ||
- (res = netlink_start()) ||
- (res = socket_init())) {
- stop_core();
+ if ((res = tipc_handler_start()) ||
+ (res = tipc_ref_table_init(tipc_max_ports + tipc_max_subscriptions,
+ tipc_random)) ||
+ (res = tipc_reg_start()) ||
+ (res = tipc_nametbl_init()) ||
+ (res = tipc_k_signal((Handler)tipc_subscr_start, 0)) ||
+ (res = tipc_k_signal((Handler)tipc_cfg_init, 0)) ||
+ (res = tipc_netlink_start()) ||
+ (res = tipc_socket_init())) {
+ tipc_core_stop();
}
return res;
}
{
int res;
- log_reinit(CONFIG_TIPC_LOG);
+ tipc_log_reinit(CONFIG_TIPC_LOG);
info("Activated (compiled " __DATE__ " " __TIME__ ")\n");
tipc_own_addr = 0;
tipc_max_slaves = delimit(CONFIG_TIPC_SLAVE_NODES, 0, 2047);
tipc_net_id = 4711;
- if ((res = start_core()))
+ if ((res = tipc_core_start()))
err("Unable to start in single node mode\n");
else
info("Started in single node mode\n");
static void __exit tipc_exit(void)
{
- stop_net();
- stop_core();
+ tipc_core_stop_net();
+ tipc_core_stop();
info("Deactivated\n");
- log_stop();
+ tipc_log_stop();
}
module_init(tipc_init);
#ifndef _TIPC_CORE_H
#define _TIPC_CORE_H
+#include <linux/tipc.h>
+#include <linux/tipc_config.h>
+#include <net/tipc/tipc_msg.h>
+#include <net/tipc/tipc_port.h>
+#include <net/tipc/tipc_bearer.h>
#include <net/tipc/tipc.h>
#include <linux/types.h>
#include <linux/kernel.h>
#define assert(i) BUG_ON(!(i))
struct tipc_msg;
-extern struct print_buf *CONS, *LOG;
-extern struct print_buf *TEE(struct print_buf *, struct print_buf *);
-void msg_print(struct print_buf*,struct tipc_msg *,const char*);
+extern struct print_buf *TIPC_CONS, *TIPC_LOG;
+extern struct print_buf *TIPC_TEE(struct print_buf *, struct print_buf *);
+void tipc_msg_print(struct print_buf*,struct tipc_msg *,const char*);
void tipc_printf(struct print_buf *, const char *fmt, ...);
void tipc_dump(struct print_buf*,const char *fmt, ...);
#define info(fmt, arg...) tipc_printf(TIPC_OUTPUT, KERN_NOTICE "TIPC: " fmt, ## arg)
#define dbg(fmt, arg...) do {if (DBG_OUTPUT) tipc_printf(DBG_OUTPUT, fmt, ## arg);} while(0)
-#define msg_dbg(msg, txt) do {if (DBG_OUTPUT) msg_print(DBG_OUTPUT, msg, txt);} while(0)
+#define msg_dbg(msg, txt) do {if (DBG_OUTPUT) tipc_msg_print(DBG_OUTPUT, msg, txt);} while(0)
#define dump(fmt, arg...) do {if (DBG_OUTPUT) tipc_dump(DBG_OUTPUT, fmt, ##arg);} while(0)
* here, or on a per .c file basis, by redefining these symbols. The following
* print buffer options are available:
*
- * NULL : Output to null print buffer (i.e. print nowhere)
- * CONS : Output to system console
- * LOG : Output to TIPC log buffer
- * &buf : Output to user-defined buffer (struct print_buf *)
- * TEE(&buf_a,&buf_b) : Output to two print buffers (eg. TEE(CONS,LOG) )
+ * NULL : Output to null print buffer (i.e. print nowhere)
+ * TIPC_CONS : Output to system console
+ * TIPC_LOG : Output to TIPC log buffer
+ * &buf : Output to user-defined buffer (struct print_buf *)
+ * TIPC_TEE(&buf_a,&buf_b) : Output to two print buffers (eg. TIPC_TEE(TIPC_CONS,TIPC_LOG) )
*/
#ifndef TIPC_OUTPUT
-#define TIPC_OUTPUT TEE(CONS,LOG)
+#define TIPC_OUTPUT TIPC_TEE(TIPC_CONS,TIPC_LOG)
#endif
#ifndef DBG_OUTPUT
* Routines available to privileged subsystems
*/
-extern int start_core(void);
-extern void stop_core(void);
-extern int start_net(void);
-extern void stop_net(void);
+extern int tipc_core_start(void);
+extern void tipc_core_stop(void);
+extern int tipc_core_start_net(void);
+extern void tipc_core_stop_net(void);
static inline int delimit(int val, int min, int max)
{
typedef void (*Handler) (unsigned long);
-u32 k_signal(Handler routine, unsigned long argument);
+u32 tipc_k_signal(Handler routine, unsigned long argument);
/**
* k_init_timer - initialize a timer
static spinlock_t print_lock = SPIN_LOCK_UNLOCKED;
static struct print_buf cons_buf = { NULL, 0, NULL, NULL };
-struct print_buf *CONS = &cons_buf;
+struct print_buf *TIPC_CONS = &cons_buf;
static struct print_buf log_buf = { NULL, 0, NULL, NULL };
-struct print_buf *LOG = &log_buf;
+struct print_buf *TIPC_LOG = &log_buf;
#define FORMAT(PTR,LEN,FMT) \
* simultaneous use of the print buffer(s) being manipulated.
* 2) tipc_printf() uses 'print_lock' to prevent simultaneous use of
* 'print_string' and to protect its print buffer(s).
- * 3) TEE() uses 'print_lock' to protect its print buffer(s).
- * 4) Routines of the form log_XXX() uses 'print_lock' to protect LOG.
+ * 3) TIPC_TEE() uses 'print_lock' to protect its print buffer(s).
+ * 4) Routines of the form log_XXX() uses 'print_lock' to protect TIPC_LOG.
*/
/**
- * printbuf_init - initialize print buffer to empty
+ * tipc_printbuf_init - initialize print buffer to empty
*/
-void printbuf_init(struct print_buf *pb, char *raw, u32 sz)
+void tipc_printbuf_init(struct print_buf *pb, char *raw, u32 sz)
{
if (!pb || !raw || (sz < (MAX_STRING + 1)))
return;
}
/**
- * printbuf_reset - reinitialize print buffer to empty state
+ * tipc_printbuf_reset - reinitialize print buffer to empty state
*/
-void printbuf_reset(struct print_buf *pb)
+void tipc_printbuf_reset(struct print_buf *pb)
{
if (pb && pb->buf)
- printbuf_init(pb, pb->buf, pb->size);
+ tipc_printbuf_init(pb, pb->buf, pb->size);
}
/**
- * printbuf_empty - test if print buffer is in empty state
+ * tipc_printbuf_empty - test if print buffer is in empty state
*/
-int printbuf_empty(struct print_buf *pb)
+int tipc_printbuf_empty(struct print_buf *pb)
{
return (!pb || !pb->buf || (pb->crs == pb->buf));
}
/**
- * printbuf_validate - check for print buffer overflow
+ * tipc_printbuf_validate - check for print buffer overflow
*
* Verifies that a print buffer has captured all data written to it.
* If data has been lost, linearize buffer and prepend an error message
* Returns length of print buffer data string (including trailing NULL)
*/
-int printbuf_validate(struct print_buf *pb)
+int tipc_printbuf_validate(struct print_buf *pb)
{
char *err = " *** PRINT BUFFER WRAPPED AROUND ***\n";
char *cp_buf;
if (pb->buf[pb->size - 1] == '\0') {
cp_buf = kmalloc(pb->size, GFP_ATOMIC);
if (cp_buf != NULL){
- printbuf_init(&cb, cp_buf, pb->size);
- printbuf_move(&cb, pb);
- printbuf_move(pb, &cb);
+ tipc_printbuf_init(&cb, cp_buf, pb->size);
+ tipc_printbuf_move(&cb, pb);
+ tipc_printbuf_move(pb, &cb);
kfree(cp_buf);
memcpy(pb->buf, err, strlen(err));
} else {
- printbuf_reset(pb);
+ tipc_printbuf_reset(pb);
tipc_printf(pb, err);
}
}
}
/**
- * printbuf_move - move print buffer contents to another print buffer
+ * tipc_printbuf_move - move print buffer contents to another print buffer
*
* Current contents of destination print buffer (if any) are discarded.
* Source print buffer becomes empty if a successful move occurs.
*/
-void printbuf_move(struct print_buf *pb_to, struct print_buf *pb_from)
+void tipc_printbuf_move(struct print_buf *pb_to, struct print_buf *pb_from)
{
int len;
return;
if (!pb_from || !pb_from->buf) {
- printbuf_reset(pb_to);
+ tipc_printbuf_reset(pb_to);
return;
}
if (pb_to->size < pb_from->size) {
- printbuf_reset(pb_to);
+ tipc_printbuf_reset(pb_to);
tipc_printf(pb_to, "*** PRINT BUFFER OVERFLOW ***");
return;
}
strcpy(pb_to->crs, pb_from->buf);
pb_to->crs += len;
- printbuf_reset(pb_from);
+ tipc_printbuf_reset(pb_from);
}
/**
strcpy(print_string, "*** STRING TOO LONG ***");
while (pb) {
- if (pb == CONS)
+ if (pb == TIPC_CONS)
printk(print_string);
else if (pb->buf) {
chars_left = pb->buf + pb->size - pb->crs - 1;
}
/**
- * TEE - perform next output operation on both print buffers
+ * TIPC_TEE - perform next output operation on both print buffers
*/
-struct print_buf *TEE(struct print_buf *b0, struct print_buf *b1)
+struct print_buf *TIPC_TEE(struct print_buf *b0, struct print_buf *b1)
{
struct print_buf *pb = b0;
int len;
spin_lock_bh(&print_lock);
- FORMAT(CONS->buf, len, fmt);
- printk(CONS->buf);
+ FORMAT(TIPC_CONS->buf, len, fmt);
+ printk(TIPC_CONS->buf);
for (; pb; pb = pb->next) {
- if (pb == CONS)
+ if (pb == TIPC_CONS)
continue;
printk("\n---- Start of dump,%s log ----\n\n",
- (pb == LOG) ? "global" : "local");
+ (pb == TIPC_LOG) ? "global" : "local");
printbuf_dump(pb);
- printbuf_reset(pb);
+ tipc_printbuf_reset(pb);
printk("\n-------- End of dump --------\n");
}
spin_unlock_bh(&print_lock);
}
/**
- * log_stop - free up TIPC log print buffer
+ * tipc_log_stop - free up TIPC log print buffer
*/
-void log_stop(void)
+void tipc_log_stop(void)
{
spin_lock_bh(&print_lock);
- if (LOG->buf) {
- kfree(LOG->buf);
- LOG->buf = NULL;
+ if (TIPC_LOG->buf) {
+ kfree(TIPC_LOG->buf);
+ TIPC_LOG->buf = NULL;
}
spin_unlock_bh(&print_lock);
}
/**
- * log_reinit - set TIPC log print buffer to specified size
+ * tipc_log_reinit - set TIPC log print buffer to specified size
*/
-void log_reinit(int log_size)
+void tipc_log_reinit(int log_size)
{
- log_stop();
+ tipc_log_stop();
if (log_size) {
if (log_size <= MAX_STRING)
log_size = MAX_STRING + 1;
spin_lock_bh(&print_lock);
- printbuf_init(LOG, kmalloc(log_size, GFP_ATOMIC), log_size);
+ tipc_printbuf_init(TIPC_LOG, kmalloc(log_size, GFP_ATOMIC), log_size);
spin_unlock_bh(&print_lock);
}
}
/**
- * log_resize - reconfigure size of TIPC log buffer
+ * tipc_log_resize - reconfigure size of TIPC log buffer
*/
-struct sk_buff *log_resize(const void *req_tlv_area, int req_tlv_space)
+struct sk_buff *tipc_log_resize(const void *req_tlv_area, int req_tlv_space)
{
u32 value;
if (!TLV_CHECK(req_tlv_area, req_tlv_space, TIPC_TLV_UNSIGNED))
- return cfg_reply_error_string(TIPC_CFG_TLV_ERROR);
+ return tipc_cfg_reply_error_string(TIPC_CFG_TLV_ERROR);
value = *(u32 *)TLV_DATA(req_tlv_area);
value = ntohl(value);
if (value != delimit(value, 0, 32768))
- return cfg_reply_error_string(TIPC_CFG_INVALID_VALUE
- " (log size must be 0-32768)");
- log_reinit(value);
- return cfg_reply_none();
+ return tipc_cfg_reply_error_string(TIPC_CFG_INVALID_VALUE
+ " (log size must be 0-32768)");
+ tipc_log_reinit(value);
+ return tipc_cfg_reply_none();
}
/**
- * log_dump - capture TIPC log buffer contents in configuration message
+ * tipc_log_dump - capture TIPC log buffer contents in configuration message
*/
-struct sk_buff *log_dump(void)
+struct sk_buff *tipc_log_dump(void)
{
struct sk_buff *reply;
spin_lock_bh(&print_lock);
- if (!LOG->buf)
- reply = cfg_reply_ultra_string("log not activated\n");
- else if (printbuf_empty(LOG))
- reply = cfg_reply_ultra_string("log is empty\n");
+ if (!TIPC_LOG->buf)
+ reply = tipc_cfg_reply_ultra_string("log not activated\n");
+ else if (tipc_printbuf_empty(TIPC_LOG))
+ reply = tipc_cfg_reply_ultra_string("log is empty\n");
else {
struct tlv_desc *rep_tlv;
struct print_buf pb;
int str_len;
- str_len = min(LOG->size, 32768u);
- reply = cfg_reply_alloc(TLV_SPACE(str_len));
+ str_len = min(TIPC_LOG->size, 32768u);
+ reply = tipc_cfg_reply_alloc(TLV_SPACE(str_len));
if (reply) {
rep_tlv = (struct tlv_desc *)reply->data;
- printbuf_init(&pb, TLV_DATA(rep_tlv), str_len);
- printbuf_move(&pb, LOG);
+ tipc_printbuf_init(&pb, TLV_DATA(rep_tlv), str_len);
+ tipc_printbuf_move(&pb, TIPC_LOG);
str_len = strlen(TLV_DATA(rep_tlv)) + 1;
skb_put(reply, TLV_SPACE(str_len));
TLV_SET(rep_tlv, TIPC_TLV_ULTRA_STRING, NULL, str_len);
struct print_buf *next;
};
-void printbuf_init(struct print_buf *pb, char *buf, u32 sz);
-void printbuf_reset(struct print_buf *pb);
-int printbuf_empty(struct print_buf *pb);
-int printbuf_validate(struct print_buf *pb);
-void printbuf_move(struct print_buf *pb_to, struct print_buf *pb_from);
+void tipc_printbuf_init(struct print_buf *pb, char *buf, u32 sz);
+void tipc_printbuf_reset(struct print_buf *pb);
+int tipc_printbuf_empty(struct print_buf *pb);
+int tipc_printbuf_validate(struct print_buf *pb);
+void tipc_printbuf_move(struct print_buf *pb_to, struct print_buf *pb_from);
-void log_reinit(int log_size);
-void log_stop(void);
+void tipc_log_reinit(int log_size);
+void tipc_log_stop(void);
-struct sk_buff *log_resize(const void *req_tlv_area, int req_tlv_space);
-struct sk_buff *log_dump(void);
+struct sk_buff *tipc_log_resize(const void *req_tlv_area, int req_tlv_space);
+struct sk_buff *tipc_log_dump(void);
#endif
* disc_lost_link(): A link has lost contact
*/
-void disc_link_event(u32 addr, char *name, int up)
+void tipc_disc_link_event(u32 addr, char *name, int up)
{
if (in_own_cluster(addr))
return;
}
/**
- * disc_init_msg - initialize a link setup message
+ * tipc_disc_init_msg - initialize a link setup message
* @type: message type (request or response)
* @req_links: number of links associated with message
* @dest_domain: network domain of node(s) which should respond to message
* @b_ptr: ptr to bearer issuing message
*/
-struct sk_buff *disc_init_msg(u32 type,
- u32 req_links,
- u32 dest_domain,
- struct bearer *b_ptr)
+struct sk_buff *tipc_disc_init_msg(u32 type,
+ u32 req_links,
+ u32 dest_domain,
+ struct bearer *b_ptr)
{
struct sk_buff *buf = buf_acquire(DSC_H_SIZE);
struct tipc_msg *msg;
}
/**
- * disc_recv_msg - handle incoming link setup message (request or response)
+ * tipc_disc_recv_msg - handle incoming link setup message (request or response)
* @buf: buffer containing message
*/
-void disc_recv_msg(struct sk_buff *buf)
+void tipc_disc_recv_msg(struct sk_buff *buf)
{
struct bearer *b_ptr = (struct bearer *)TIPC_SKB_CB(buf)->handle;
struct link *link;
if (net_id != tipc_net_id)
return;
- if (!addr_domain_valid(dest))
+ if (!tipc_addr_domain_valid(dest))
return;
- if (!addr_node_valid(orig))
+ if (!tipc_addr_node_valid(orig))
return;
if (orig == tipc_own_addr)
return;
/* Always accept link here */
struct sk_buff *rbuf;
struct tipc_media_addr *addr;
- struct node *n_ptr = node_find(orig);
+ struct node *n_ptr = tipc_node_find(orig);
int link_up;
dbg(" in own cluster\n");
if (n_ptr == NULL) {
- n_ptr = node_create(orig);
+ n_ptr = tipc_node_create(orig);
}
if (n_ptr == NULL) {
warn("Memory squeeze; Failed to create node\n");
link = n_ptr->links[b_ptr->identity];
if (!link) {
dbg("creating link\n");
- link = link_create(b_ptr, orig, &media_addr);
+ link = tipc_link_create(b_ptr, orig, &media_addr);
if (!link) {
spin_unlock_bh(&n_ptr->lock);
return;
warn("New bearer address for %s\n",
addr_string_fill(addr_string, orig));
memcpy(addr, &media_addr, sizeof(*addr));
- link_reset(link);
+ tipc_link_reset(link);
}
- link_up = link_is_up(link);
+ link_up = tipc_link_is_up(link);
spin_unlock_bh(&n_ptr->lock);
if ((type == DSC_RESP_MSG) || link_up)
return;
- rbuf = disc_init_msg(DSC_RESP_MSG, 1, orig, b_ptr);
+ rbuf = tipc_disc_init_msg(DSC_RESP_MSG, 1, orig, b_ptr);
if (rbuf != NULL) {
msg_dbg(buf_msg(rbuf),"SEND:");
b_ptr->media->send_msg(rbuf, &b_ptr->publ, &media_addr);
}
/**
- * disc_stop_link_req - stop sending periodic link setup requests
+ * tipc_disc_stop_link_req - stop sending periodic link setup requests
* @req: ptr to link request structure
*/
-void disc_stop_link_req(struct link_req *req)
+void tipc_disc_stop_link_req(struct link_req *req)
{
if (!req)
return;
}
/**
- * disc_update_link_req - update frequency of periodic link setup requests
+ * tipc_disc_update_link_req - update frequency of periodic link setup requests
* @req: ptr to link request structure
*/
-void disc_update_link_req(struct link_req *req)
+void tipc_disc_update_link_req(struct link_req *req)
{
if (!req)
return;
}
/**
- * disc_init_link_req - start sending periodic link setup requests
+ * tipc_disc_init_link_req - start sending periodic link setup requests
* @b_ptr: ptr to bearer issuing requests
* @dest: destination address for request messages
* @dest_domain: network domain of node(s) which should respond to message
* Returns pointer to link request structure, or NULL if unable to create.
*/
-struct link_req *disc_init_link_req(struct bearer *b_ptr,
- const struct tipc_media_addr *dest,
- u32 dest_domain,
- u32 req_links)
+struct link_req *tipc_disc_init_link_req(struct bearer *b_ptr,
+ const struct tipc_media_addr *dest,
+ u32 dest_domain,
+ u32 req_links)
{
struct link_req *req;
if (!req)
return NULL;
- req->buf = disc_init_msg(DSC_REQ_MSG, req_links, dest_domain, b_ptr);
+ req->buf = tipc_disc_init_msg(DSC_REQ_MSG, req_links, dest_domain, b_ptr);
if (!req->buf) {
kfree(req);
return NULL;
#ifndef _TIPC_DISCOVER_H
#define _TIPC_DISCOVER_H
-#include <linux/tipc.h>
+#include "core.h"
struct link_req;
-struct link_req *disc_init_link_req(struct bearer *b_ptr,
- const struct tipc_media_addr *dest,
- u32 dest_domain,
- u32 req_links);
-void disc_update_link_req(struct link_req *req);
-void disc_stop_link_req(struct link_req *req);
+struct link_req *tipc_disc_init_link_req(struct bearer *b_ptr,
+ const struct tipc_media_addr *dest,
+ u32 dest_domain,
+ u32 req_links);
+void tipc_disc_update_link_req(struct link_req *req);
+void tipc_disc_stop_link_req(struct link_req *req);
-void disc_recv_msg(struct sk_buff *buf);
+void tipc_disc_recv_msg(struct sk_buff *buf);
-void disc_link_event(u32 addr, char *name, int up);
+void tipc_disc_link_event(u32 addr, char *name, int up);
#if 0
int disc_create_link(const struct tipc_link_create *argv);
#endif
#include <net/tipc/tipc_bearer.h>
#include <net/tipc/tipc_msg.h>
#include <linux/netdevice.h>
-#include <linux/version.h>
#define MAX_ETH_BEARERS 2
-#define TIPC_PROTOCOL 0x88ca
-#define ETH_LINK_PRIORITY 10
+#define ETH_LINK_PRIORITY TIPC_DEF_LINK_PRI
#define ETH_LINK_TOLERANCE TIPC_DEF_LINK_TOL
-
+#define ETH_LINK_WINDOW TIPC_DEF_LINK_WIN
/**
* struct eth_bearer - Ethernet bearer data structure
clone->nh.raw = clone->data;
dev = ((struct eth_bearer *)(tb_ptr->usr_handle))->dev;
clone->dev = dev;
- dev->hard_header(clone, dev, TIPC_PROTOCOL,
+ dev->hard_header(clone, dev, ETH_P_TIPC,
&dest->dev_addr.eth_addr,
dev->dev_addr, clone->len);
dev_queue_xmit(clone);
return -EDQUOT;
if (!eb_ptr->dev) {
eb_ptr->dev = dev;
- eb_ptr->tipc_packet_type.type = __constant_htons(TIPC_PROTOCOL);
+ eb_ptr->tipc_packet_type.type = __constant_htons(ETH_P_TIPC);
eb_ptr->tipc_packet_type.dev = dev;
eb_ptr->tipc_packet_type.func = recv_msg;
eb_ptr->tipc_packet_type.af_packet_priv = eb_ptr;
}
/**
- * eth_media_start - activate Ethernet bearer support
+ * tipc_eth_media_start - activate Ethernet bearer support
*
* Register Ethernet media type with TIPC bearer code. Also register
* with OS for notifications about device state changes.
*/
-int eth_media_start(void)
+int tipc_eth_media_start(void)
{
struct tipc_media_addr bcast_addr;
int res;
res = tipc_register_media(TIPC_MEDIA_TYPE_ETH, "eth",
enable_bearer, disable_bearer, send_msg,
eth_addr2str, &bcast_addr, ETH_LINK_PRIORITY,
- ETH_LINK_TOLERANCE, TIPC_DEF_LINK_WIN);
+ ETH_LINK_TOLERANCE, ETH_LINK_WINDOW);
if (res)
return res;
}
/**
- * eth_media_stop - deactivate Ethernet bearer support
+ * tipc_eth_media_stop - deactivate Ethernet bearer support
*/
-void eth_media_stop(void)
+void tipc_eth_media_stop(void)
{
int i;
static DECLARE_TASKLET_DISABLED(tipc_tasklet, process_signal_queue, 0);
-unsigned int k_signal(Handler routine, unsigned long argument)
+unsigned int tipc_k_signal(Handler routine, unsigned long argument)
{
struct queue_item *item;
spin_unlock_bh(&qitem_lock);
}
-int handler_start(void)
+int tipc_handler_start(void)
{
tipc_queue_item_cache =
kmem_cache_create("tipc_queue_items", sizeof(struct queue_item),
return 0;
}
-void handler_stop(void)
+void tipc_handler_stop(void)
{
struct list_head *l, *n;
struct queue_item *item;
#define LINK_LOG_BUF_SIZE 0
#define dbg_link(fmt, arg...) do {if (LINK_LOG_BUF_SIZE) tipc_printf(&l_ptr->print_buf, fmt, ## arg); } while(0)
-#define dbg_link_msg(msg, txt) do {if (LINK_LOG_BUF_SIZE) msg_print(&l_ptr->print_buf, msg, txt); } while(0)
+#define dbg_link_msg(msg, txt) do {if (LINK_LOG_BUF_SIZE) tipc_msg_print(&l_ptr->print_buf, msg, txt); } while(0)
#define dbg_link_state(txt) do {if (LINK_LOG_BUF_SIZE) link_print(l_ptr, &l_ptr->print_buf, txt); } while(0)
#define dbg_link_dump() do { \
if (LINK_LOG_BUF_SIZE) { \
tipc_printf(LOG, "\n\nDumping link <%s>:\n", l_ptr->name); \
- printbuf_move(LOG, &l_ptr->print_buf); \
+ tipc_printbuf_move(LOG, &l_ptr->print_buf); \
} \
} while (0)
* Simple non-inlined link routines (i.e. referenced outside this file)
*/
-int link_is_up(struct link *l_ptr)
+int tipc_link_is_up(struct link *l_ptr)
{
if (!l_ptr)
return 0;
return (link_working_working(l_ptr) || link_working_unknown(l_ptr));
}
-int link_is_active(struct link *l_ptr)
+int tipc_link_is_active(struct link *l_ptr)
{
return ((l_ptr->owner->active_links[0] == l_ptr) ||
(l_ptr->owner->active_links[1] == l_ptr));
* link_timeout - handle expiration of link timer
* @l_ptr: pointer to link
*
- * This routine must not grab "net_lock" to avoid a potential deadlock conflict
- * with link_delete(). (There is no risk that the node will be deleted by
- * another thread because link_delete() always cancels the link timer before
- * node_delete() is called.)
+ * This routine must not grab "tipc_net_lock" to avoid a potential deadlock conflict
+ * with tipc_link_delete(). (There is no risk that the node will be deleted by
+ * another thread because tipc_link_delete() always cancels the link timer before
+ * tipc_node_delete() is called.)
*/
static void link_timeout(struct link *l_ptr)
{
- node_lock(l_ptr->owner);
+ tipc_node_lock(l_ptr->owner);
/* update counters used in statistical profiling of send traffic */
link_state_event(l_ptr, TIMEOUT_EVT);
if (l_ptr->next_out)
- link_push_queue(l_ptr);
+ tipc_link_push_queue(l_ptr);
- node_unlock(l_ptr->owner);
+ tipc_node_unlock(l_ptr->owner);
}
static inline void link_set_timer(struct link *l_ptr, u32 time)
}
/**
- * link_create - create a new link
+ * tipc_link_create - create a new link
* @b_ptr: pointer to associated bearer
* @peer: network address of node at other end of link
* @media_addr: media address to use when sending messages over link
* Returns pointer to link.
*/
-struct link *link_create(struct bearer *b_ptr, const u32 peer,
- const struct tipc_media_addr *media_addr)
+struct link *tipc_link_create(struct bearer *b_ptr, const u32 peer,
+ const struct tipc_media_addr *media_addr)
{
struct link *l_ptr;
struct tipc_msg *msg;
strcpy((char *)msg_data(msg), if_name);
l_ptr->priority = b_ptr->priority;
- link_set_queue_limits(l_ptr, b_ptr->media->window);
+ tipc_link_set_queue_limits(l_ptr, b_ptr->media->window);
link_init_max_pkt(l_ptr);
link_reset_statistics(l_ptr);
- l_ptr->owner = node_attach_link(l_ptr);
+ l_ptr->owner = tipc_node_attach_link(l_ptr);
if (!l_ptr->owner) {
kfree(l_ptr);
return NULL;
warn("Memory squeeze; Failed to create link\n");
return NULL;
}
- printbuf_init(&l_ptr->print_buf, pb, LINK_LOG_BUF_SIZE);
+ tipc_printbuf_init(&l_ptr->print_buf, pb, LINK_LOG_BUF_SIZE);
}
- k_signal((Handler)link_start, (unsigned long)l_ptr);
+ tipc_k_signal((Handler)tipc_link_start, (unsigned long)l_ptr);
- dbg("link_create(): tolerance = %u,cont intv = %u, abort_limit = %u\n",
+ dbg("tipc_link_create(): tolerance = %u,cont intv = %u, abort_limit = %u\n",
l_ptr->tolerance, l_ptr->continuity_interval, l_ptr->abort_limit);
return l_ptr;
}
/**
- * link_delete - delete a link
+ * tipc_link_delete - delete a link
* @l_ptr: pointer to link
*
- * Note: 'net_lock' is write_locked, bearer is locked.
+ * Note: 'tipc_net_lock' is write_locked, bearer is locked.
* This routine must not grab the node lock until after link timer cancellation
* to avoid a potential deadlock situation.
*/
-void link_delete(struct link *l_ptr)
+void tipc_link_delete(struct link *l_ptr)
{
if (!l_ptr) {
err("Attempt to delete non-existent link\n");
return;
}
- dbg("link_delete()\n");
+ dbg("tipc_link_delete()\n");
k_cancel_timer(&l_ptr->timer);
- node_lock(l_ptr->owner);
- link_reset(l_ptr);
- node_detach_link(l_ptr->owner, l_ptr);
- link_stop(l_ptr);
+ tipc_node_lock(l_ptr->owner);
+ tipc_link_reset(l_ptr);
+ tipc_node_detach_link(l_ptr->owner, l_ptr);
+ tipc_link_stop(l_ptr);
list_del_init(&l_ptr->link_list);
if (LINK_LOG_BUF_SIZE)
kfree(l_ptr->print_buf.buf);
- node_unlock(l_ptr->owner);
+ tipc_node_unlock(l_ptr->owner);
k_term_timer(&l_ptr->timer);
kfree(l_ptr);
}
-void link_start(struct link *l_ptr)
+void tipc_link_start(struct link *l_ptr)
{
- dbg("link_start %x\n", l_ptr);
+ dbg("tipc_link_start %x\n", l_ptr);
link_state_event(l_ptr, STARTING_EVT);
}
{
struct port *p_ptr;
- spin_lock_bh(&port_list_lock);
- p_ptr = port_lock(origport);
+ spin_lock_bh(&tipc_port_list_lock);
+ p_ptr = tipc_port_lock(origport);
if (p_ptr) {
if (!p_ptr->wakeup)
goto exit;
list_add_tail(&p_ptr->wait_list, &l_ptr->waiting_ports);
l_ptr->stats.link_congs++;
exit:
- port_unlock(p_ptr);
+ tipc_port_unlock(p_ptr);
}
- spin_unlock_bh(&port_list_lock);
+ spin_unlock_bh(&tipc_port_list_lock);
return -ELINKCONG;
}
-void link_wakeup_ports(struct link *l_ptr, int all)
+void tipc_link_wakeup_ports(struct link *l_ptr, int all)
{
struct port *p_ptr;
struct port *temp_p_ptr;
win = 100000;
if (win <= 0)
return;
- if (!spin_trylock_bh(&port_list_lock))
+ if (!spin_trylock_bh(&tipc_port_list_lock))
return;
if (link_congested(l_ptr))
goto exit;
}
exit:
- spin_unlock_bh(&port_list_lock);
+ spin_unlock_bh(&tipc_port_list_lock);
}
/**
}
/**
- * link_reset_fragments - purge link's inbound message fragments queue
+ * tipc_link_reset_fragments - purge link's inbound message fragments queue
* @l_ptr: pointer to link
*/
-void link_reset_fragments(struct link *l_ptr)
+void tipc_link_reset_fragments(struct link *l_ptr)
{
struct sk_buff *buf = l_ptr->defragm_buf;
struct sk_buff *next;
}
/**
- * link_stop - purge all inbound and outbound messages associated with link
+ * tipc_link_stop - purge all inbound and outbound messages associated with link
* @l_ptr: pointer to link
*/
-void link_stop(struct link *l_ptr)
+void tipc_link_stop(struct link *l_ptr)
{
struct sk_buff *buf;
struct sk_buff *next;
buf = next;
}
- link_reset_fragments(l_ptr);
+ tipc_link_reset_fragments(l_ptr);
buf_discard(l_ptr->proto_msg_queue);
l_ptr->proto_msg_queue = NULL;
ev->up = up;
ev->fcn = fcn;
memcpy(ev->name, l_ptr->name, TIPC_MAX_LINK_NAME);
- k_signal((Handler)link_recv_event, (unsigned long)ev);
+ tipc_k_signal((Handler)link_recv_event, (unsigned long)ev);
}
#else
#endif
-void link_reset(struct link *l_ptr)
+void tipc_link_reset(struct link *l_ptr)
{
struct sk_buff *buf;
u32 prev_state = l_ptr->state;
if ((prev_state == RESET_UNKNOWN) || (prev_state == RESET_RESET))
return;
- node_link_down(l_ptr->owner, l_ptr);
- bearer_remove_dest(l_ptr->b_ptr, l_ptr->addr);
+ tipc_node_link_down(l_ptr->owner, l_ptr);
+ tipc_bearer_remove_dest(l_ptr->b_ptr, l_ptr->addr);
#if 0
- tipc_printf(CONS, "\nReset link <%s>\n", l_ptr->name);
+ tipc_printf(TIPC_CONS, "\nReset link <%s>\n", l_ptr->name);
dbg_link_dump();
#endif
- if (node_has_active_links(l_ptr->owner) &&
+ if (tipc_node_has_active_links(l_ptr->owner) &&
l_ptr->owner->permit_changeover) {
l_ptr->reset_checkpoint = checkpoint;
l_ptr->exp_msg_count = START_CHANGEOVER;
buf = next;
}
if (!list_empty(&l_ptr->waiting_ports))
- link_wakeup_ports(l_ptr, 1);
+ tipc_link_wakeup_ports(l_ptr, 1);
l_ptr->retransm_queue_head = 0;
l_ptr->retransm_queue_size = 0;
l_ptr->stale_count = 0;
link_reset_statistics(l_ptr);
- link_send_event(cfg_link_event, l_ptr, 0);
+ link_send_event(tipc_cfg_link_event, l_ptr, 0);
if (!in_own_cluster(l_ptr->addr))
- link_send_event(disc_link_event, l_ptr, 0);
+ link_send_event(tipc_disc_link_event, l_ptr, 0);
}
static void link_activate(struct link *l_ptr)
{
l_ptr->next_in_no = 1;
- node_link_up(l_ptr->owner, l_ptr);
- bearer_add_dest(l_ptr->b_ptr, l_ptr->addr);
- link_send_event(cfg_link_event, l_ptr, 1);
+ tipc_node_link_up(l_ptr->owner, l_ptr);
+ tipc_bearer_add_dest(l_ptr->b_ptr, l_ptr->addr);
+ link_send_event(tipc_cfg_link_event, l_ptr, 1);
if (!in_own_cluster(l_ptr->addr))
- link_send_event(disc_link_event, l_ptr, 1);
+ link_send_event(tipc_disc_link_event, l_ptr, 1);
}
/**
dbg_link("TIM ");
if (l_ptr->next_in_no != l_ptr->checkpoint) {
l_ptr->checkpoint = l_ptr->next_in_no;
- if (bclink_acks_missing(l_ptr->owner)) {
- link_send_proto_msg(l_ptr, STATE_MSG,
- 0, 0, 0, 0, 0);
+ if (tipc_bclink_acks_missing(l_ptr->owner)) {
+ tipc_link_send_proto_msg(l_ptr, STATE_MSG,
+ 0, 0, 0, 0, 0);
l_ptr->fsm_msg_cnt++;
} else if (l_ptr->max_pkt < l_ptr->max_pkt_target) {
- link_send_proto_msg(l_ptr, STATE_MSG,
- 1, 0, 0, 0, 0);
+ tipc_link_send_proto_msg(l_ptr, STATE_MSG,
+ 1, 0, 0, 0, 0);
l_ptr->fsm_msg_cnt++;
}
link_set_timer(l_ptr, cont_intv);
dbg_link(" -> WU\n");
l_ptr->state = WORKING_UNKNOWN;
l_ptr->fsm_msg_cnt = 0;
- link_send_proto_msg(l_ptr, STATE_MSG, 1, 0, 0, 0, 0);
+ tipc_link_send_proto_msg(l_ptr, STATE_MSG, 1, 0, 0, 0, 0);
l_ptr->fsm_msg_cnt++;
link_set_timer(l_ptr, cont_intv / 4);
break;
case RESET_MSG:
dbg_link("RES -> RR\n");
- link_reset(l_ptr);
+ tipc_link_reset(l_ptr);
l_ptr->state = RESET_RESET;
l_ptr->fsm_msg_cnt = 0;
- link_send_proto_msg(l_ptr, ACTIVATE_MSG, 0, 0, 0, 0, 0);
+ tipc_link_send_proto_msg(l_ptr, ACTIVATE_MSG, 0, 0, 0, 0, 0);
l_ptr->fsm_msg_cnt++;
link_set_timer(l_ptr, cont_intv);
break;
break;
case RESET_MSG:
dbg_link("RES -> RR\n");
- link_reset(l_ptr);
+ tipc_link_reset(l_ptr);
l_ptr->state = RESET_RESET;
l_ptr->fsm_msg_cnt = 0;
- link_send_proto_msg(l_ptr, ACTIVATE_MSG, 0, 0, 0, 0, 0);
+ tipc_link_send_proto_msg(l_ptr, ACTIVATE_MSG, 0, 0, 0, 0, 0);
l_ptr->fsm_msg_cnt++;
link_set_timer(l_ptr, cont_intv);
break;
l_ptr->state = WORKING_WORKING;
l_ptr->fsm_msg_cnt = 0;
l_ptr->checkpoint = l_ptr->next_in_no;
- if (bclink_acks_missing(l_ptr->owner)) {
- link_send_proto_msg(l_ptr, STATE_MSG,
- 0, 0, 0, 0, 0);
+ if (tipc_bclink_acks_missing(l_ptr->owner)) {
+ tipc_link_send_proto_msg(l_ptr, STATE_MSG,
+ 0, 0, 0, 0, 0);
l_ptr->fsm_msg_cnt++;
}
link_set_timer(l_ptr, cont_intv);
dbg_link("Probing %u/%u,timer = %u ms)\n",
l_ptr->fsm_msg_cnt, l_ptr->abort_limit,
cont_intv / 4);
- link_send_proto_msg(l_ptr, STATE_MSG,
- 1, 0, 0, 0, 0);
+ tipc_link_send_proto_msg(l_ptr, STATE_MSG,
+ 1, 0, 0, 0, 0);
l_ptr->fsm_msg_cnt++;
link_set_timer(l_ptr, cont_intv / 4);
} else { /* Link has failed */
dbg_link("-> RU (%u probes unanswered)\n",
l_ptr->fsm_msg_cnt);
- link_reset(l_ptr);
+ tipc_link_reset(l_ptr);
l_ptr->state = RESET_UNKNOWN;
l_ptr->fsm_msg_cnt = 0;
- link_send_proto_msg(l_ptr, RESET_MSG,
- 0, 0, 0, 0, 0);
+ tipc_link_send_proto_msg(l_ptr, RESET_MSG,
+ 0, 0, 0, 0, 0);
l_ptr->fsm_msg_cnt++;
link_set_timer(l_ptr, cont_intv);
}
l_ptr->state = WORKING_WORKING;
l_ptr->fsm_msg_cnt = 0;
link_activate(l_ptr);
- link_send_proto_msg(l_ptr, STATE_MSG, 1, 0, 0, 0, 0);
+ tipc_link_send_proto_msg(l_ptr, STATE_MSG, 1, 0, 0, 0, 0);
l_ptr->fsm_msg_cnt++;
link_set_timer(l_ptr, cont_intv);
break;
dbg_link(" -> RR\n");
l_ptr->state = RESET_RESET;
l_ptr->fsm_msg_cnt = 0;
- link_send_proto_msg(l_ptr, ACTIVATE_MSG, 1, 0, 0, 0, 0);
+ tipc_link_send_proto_msg(l_ptr, ACTIVATE_MSG, 1, 0, 0, 0, 0);
l_ptr->fsm_msg_cnt++;
link_set_timer(l_ptr, cont_intv);
break;
/* fall through */
case TIMEOUT_EVT:
dbg_link("TIM \n");
- link_send_proto_msg(l_ptr, RESET_MSG, 0, 0, 0, 0, 0);
+ tipc_link_send_proto_msg(l_ptr, RESET_MSG, 0, 0, 0, 0, 0);
l_ptr->fsm_msg_cnt++;
link_set_timer(l_ptr, cont_intv);
break;
l_ptr->state = WORKING_WORKING;
l_ptr->fsm_msg_cnt = 0;
link_activate(l_ptr);
- link_send_proto_msg(l_ptr, STATE_MSG, 1, 0, 0, 0, 0);
+ tipc_link_send_proto_msg(l_ptr, STATE_MSG, 1, 0, 0, 0, 0);
l_ptr->fsm_msg_cnt++;
link_set_timer(l_ptr, cont_intv);
break;
break;
case TIMEOUT_EVT:
dbg_link("TIM\n");
- link_send_proto_msg(l_ptr, ACTIVATE_MSG, 0, 0, 0, 0, 0);
+ tipc_link_send_proto_msg(l_ptr, ACTIVATE_MSG, 0, 0, 0, 0, 0);
l_ptr->fsm_msg_cnt++;
link_set_timer(l_ptr, cont_intv);
dbg_link("fsm_msg_cnt %u\n", l_ptr->fsm_msg_cnt);
}
/*
- * link_send_buf() is the 'full path' for messages, called from
+ * tipc_link_send_buf() is the 'full path' for messages, called from
* inside TIPC when the 'fast path' in tipc_send_buf
* has failed, and from link_send()
*/
-int link_send_buf(struct link *l_ptr, struct sk_buff *buf)
+int tipc_link_send_buf(struct link *l_ptr, struct sk_buff *buf)
{
struct tipc_msg *msg = buf_msg(buf);
u32 size = msg_size(msg);
buf_discard(buf);
if (imp > CONN_MANAGER) {
warn("Resetting <%s>, send queue full", l_ptr->name);
- link_reset(l_ptr);
+ tipc_link_reset(l_ptr);
}
return dsz;
}
/* Fragmentation needed ? */
if (size > max_packet)
- return link_send_long_buf(l_ptr, buf);
+ return tipc_link_send_long_buf(l_ptr, buf);
/* Packet can be queued or sent: */
if (queue_size > l_ptr->stats.max_queue_sz)
l_ptr->stats.max_queue_sz = queue_size;
- if (likely(!bearer_congested(l_ptr->b_ptr, l_ptr) &&
+ if (likely(!tipc_bearer_congested(l_ptr->b_ptr, l_ptr) &&
!link_congested(l_ptr))) {
link_add_to_outqueue(l_ptr, buf, msg);
- if (likely(bearer_send(l_ptr->b_ptr, buf, &l_ptr->media_addr))) {
+ if (likely(tipc_bearer_send(l_ptr->b_ptr, buf, &l_ptr->media_addr))) {
l_ptr->unacked_window = 0;
} else {
- bearer_schedule(l_ptr->b_ptr, l_ptr);
+ tipc_bearer_schedule(l_ptr->b_ptr, l_ptr);
l_ptr->stats.bearer_congs++;
l_ptr->next_out = buf;
}
if (l_ptr->next_out &&
link_bundle_buf(l_ptr, l_ptr->last_out, buf)) {
- bearer_resolve_congestion(l_ptr->b_ptr, l_ptr);
+ tipc_bearer_resolve_congestion(l_ptr->b_ptr, l_ptr);
return dsz;
}
if (!l_ptr->next_out)
l_ptr->next_out = buf;
link_add_to_outqueue(l_ptr, buf, msg);
- bearer_resolve_congestion(l_ptr->b_ptr, l_ptr);
+ tipc_bearer_resolve_congestion(l_ptr->b_ptr, l_ptr);
return dsz;
}
/*
- * link_send(): same as link_send_buf(), but the link to use has
+ * tipc_link_send(): same as tipc_link_send_buf(), but the link to use has
* not been selected yet, and the the owner node is not locked
* Called by TIPC internal users, e.g. the name distributor
*/
-int link_send(struct sk_buff *buf, u32 dest, u32 selector)
+int tipc_link_send(struct sk_buff *buf, u32 dest, u32 selector)
{
struct link *l_ptr;
struct node *n_ptr;
int res = -ELINKCONG;
- read_lock_bh(&net_lock);
- n_ptr = node_select(dest, selector);
+ read_lock_bh(&tipc_net_lock);
+ n_ptr = tipc_node_select(dest, selector);
if (n_ptr) {
- node_lock(n_ptr);
+ tipc_node_lock(n_ptr);
l_ptr = n_ptr->active_links[selector & 1];
- dbg("link_send: found link %x for dest %x\n", l_ptr, dest);
+ dbg("tipc_link_send: found link %x for dest %x\n", l_ptr, dest);
if (l_ptr) {
- res = link_send_buf(l_ptr, buf);
+ res = tipc_link_send_buf(l_ptr, buf);
}
- node_unlock(n_ptr);
+ tipc_node_unlock(n_ptr);
} else {
dbg("Attempt to send msg to unknown node:\n");
msg_dbg(buf_msg(buf),">>>");
buf_discard(buf);
}
- read_unlock_bh(&net_lock);
+ read_unlock_bh(&tipc_net_lock);
return res;
}
if (likely(msg_size(msg) <= link_max_pkt(l_ptr))) {
if (likely(list_empty(&l_ptr->b_ptr->cong_links))) {
link_add_to_outqueue(l_ptr, buf, msg);
- if (likely(bearer_send(l_ptr->b_ptr, buf,
- &l_ptr->media_addr))) {
+ if (likely(tipc_bearer_send(l_ptr->b_ptr, buf,
+ &l_ptr->media_addr))) {
l_ptr->unacked_window = 0;
msg_dbg(msg,"SENT_FAST:");
return res;
}
dbg("failed sent fast...\n");
- bearer_schedule(l_ptr->b_ptr, l_ptr);
+ tipc_bearer_schedule(l_ptr->b_ptr, l_ptr);
l_ptr->stats.bearer_congs++;
l_ptr->next_out = buf;
return res;
else
*used_max_pkt = link_max_pkt(l_ptr);
}
- return link_send_buf(l_ptr, buf); /* All other cases */
+ return tipc_link_send_buf(l_ptr, buf); /* All other cases */
}
/*
u32 dummy;
if (destnode == tipc_own_addr)
- return port_recv_msg(buf);
+ return tipc_port_recv_msg(buf);
- read_lock_bh(&net_lock);
- n_ptr = node_select(destnode, selector);
+ read_lock_bh(&tipc_net_lock);
+ n_ptr = tipc_node_select(destnode, selector);
if (likely(n_ptr)) {
- node_lock(n_ptr);
+ tipc_node_lock(n_ptr);
l_ptr = n_ptr->active_links[selector];
dbg("send_fast: buf %x selected %x, destnode = %x\n",
buf, l_ptr, destnode);
if (likely(l_ptr)) {
res = link_send_buf_fast(l_ptr, buf, &dummy);
- node_unlock(n_ptr);
- read_unlock_bh(&net_lock);
+ tipc_node_unlock(n_ptr);
+ read_unlock_bh(&tipc_net_lock);
return res;
}
- node_unlock(n_ptr);
+ tipc_node_unlock(n_ptr);
}
- read_unlock_bh(&net_lock);
+ read_unlock_bh(&tipc_net_lock);
res = msg_data_sz(buf_msg(buf));
tipc_reject_msg(buf, TIPC_ERR_NO_NODE);
return res;
/*
- * link_send_sections_fast: Entry for messages where the
+ * tipc_link_send_sections_fast: Entry for messages where the
* destination processor is known and the header is complete,
* except for total message length.
* Returns user data length or errno.
*/
-int link_send_sections_fast(struct port *sender,
- struct iovec const *msg_sect,
- const u32 num_sect,
- u32 destaddr)
+int tipc_link_send_sections_fast(struct port *sender,
+ struct iovec const *msg_sect,
+ const u32 num_sect,
+ u32 destaddr)
{
struct tipc_msg *hdr = &sender->publ.phdr;
struct link *l_ptr;
res = msg_build(hdr, msg_sect, num_sect, sender->max_pkt,
!sender->user_port, &buf);
- read_lock_bh(&net_lock);
- node = node_select(destaddr, selector);
+ read_lock_bh(&tipc_net_lock);
+ node = tipc_node_select(destaddr, selector);
if (likely(node)) {
- node_lock(node);
+ tipc_node_lock(node);
l_ptr = node->active_links[selector];
if (likely(l_ptr)) {
if (likely(buf)) {
if (unlikely(res < 0))
buf_discard(buf);
exit:
- node_unlock(node);
- read_unlock_bh(&net_lock);
+ tipc_node_unlock(node);
+ read_unlock_bh(&tipc_net_lock);
return res;
}
*/
sender->max_pkt = link_max_pkt(l_ptr);
- node_unlock(node);
- read_unlock_bh(&net_lock);
+ tipc_node_unlock(node);
+ read_unlock_bh(&tipc_net_lock);
if ((msg_hdr_sz(hdr) + res) <= sender->max_pkt)
return link_send_sections_long(sender, msg_sect,
num_sect, destaddr);
}
- node_unlock(node);
+ tipc_node_unlock(node);
}
- read_unlock_bh(&net_lock);
+ read_unlock_bh(&tipc_net_lock);
/* Couldn't find a link to the destination node */
if (buf)
return tipc_reject_msg(buf, TIPC_ERR_NO_NODE);
if (res >= 0)
- return port_reject_sections(sender, hdr, msg_sect, num_sect,
- TIPC_ERR_NO_NODE);
+ return tipc_port_reject_sections(sender, hdr, msg_sect, num_sect,
+ TIPC_ERR_NO_NODE);
return res;
}
* Now we have a buffer chain. Select a link and check
* that packet size is still OK
*/
- node = node_select(destaddr, sender->publ.ref & 1);
+ node = tipc_node_select(destaddr, sender->publ.ref & 1);
if (likely(node)) {
- node_lock(node);
+ tipc_node_lock(node);
l_ptr = node->active_links[sender->publ.ref & 1];
if (!l_ptr) {
- node_unlock(node);
+ tipc_node_unlock(node);
goto reject;
}
if (link_max_pkt(l_ptr) < max_pkt) {
sender->max_pkt = link_max_pkt(l_ptr);
- node_unlock(node);
+ tipc_node_unlock(node);
for (; buf_chain; buf_chain = buf) {
buf = buf_chain->next;
buf_discard(buf_chain);
buf = buf_chain->next;
buf_discard(buf_chain);
}
- return port_reject_sections(sender, hdr, msg_sect, num_sect,
- TIPC_ERR_NO_NODE);
+ return tipc_port_reject_sections(sender, hdr, msg_sect, num_sect,
+ TIPC_ERR_NO_NODE);
}
/* Append whole chain to send queue: */
/* Send it, if possible: */
- link_push_queue(l_ptr);
- node_unlock(node);
+ tipc_link_push_queue(l_ptr);
+ tipc_node_unlock(node);
return dsz;
}
/*
- * link_push_packet: Push one unsent packet to the media
+ * tipc_link_push_packet: Push one unsent packet to the media
*/
-u32 link_push_packet(struct link *l_ptr)
+u32 tipc_link_push_packet(struct link *l_ptr)
{
struct sk_buff *buf = l_ptr->first_out;
u32 r_q_size = l_ptr->retransm_queue_size;
if (r_q_size && buf && !skb_cloned(buf)) {
msg_set_ack(buf_msg(buf), mod(l_ptr->next_in_no - 1));
msg_set_bcast_ack(buf_msg(buf), l_ptr->owner->bclink.last_in);
- if (bearer_send(l_ptr->b_ptr, buf, &l_ptr->media_addr)) {
+ if (tipc_bearer_send(l_ptr->b_ptr, buf, &l_ptr->media_addr)) {
msg_dbg(buf_msg(buf), ">DEF-RETR>");
l_ptr->retransm_queue_head = mod(++r_q_head);
l_ptr->retransm_queue_size = --r_q_size;
if (buf) {
msg_set_ack(buf_msg(buf), mod(l_ptr->next_in_no - 1));
msg_set_bcast_ack(buf_msg(buf),l_ptr->owner->bclink.last_in);
- if (bearer_send(l_ptr->b_ptr, buf, &l_ptr->media_addr)) {
+ if (tipc_bearer_send(l_ptr->b_ptr, buf, &l_ptr->media_addr)) {
msg_dbg(buf_msg(buf), ">DEF-PROT>");
l_ptr->unacked_window = 0;
buf_discard(buf);
if (mod(next - first) < l_ptr->queue_limit[0]) {
msg_set_ack(msg, mod(l_ptr->next_in_no - 1));
msg_set_bcast_ack(msg, l_ptr->owner->bclink.last_in);
- if (bearer_send(l_ptr->b_ptr, buf, &l_ptr->media_addr)) {
+ if (tipc_bearer_send(l_ptr->b_ptr, buf, &l_ptr->media_addr)) {
if (msg_user(msg) == MSG_BUNDLER)
msg_set_type(msg, CLOSED_MSG);
msg_dbg(msg, ">PUSH-DATA>");
* push_queue(): push out the unsent messages of a link where
* congestion has abated. Node is locked
*/
-void link_push_queue(struct link *l_ptr)
+void tipc_link_push_queue(struct link *l_ptr)
{
u32 res;
- if (bearer_congested(l_ptr->b_ptr, l_ptr))
+ if (tipc_bearer_congested(l_ptr->b_ptr, l_ptr))
return;
do {
- res = link_push_packet(l_ptr);
+ res = tipc_link_push_packet(l_ptr);
}
while (res == TIPC_OK);
if (res == PUSH_FAILED)
- bearer_schedule(l_ptr->b_ptr, l_ptr);
+ tipc_bearer_schedule(l_ptr->b_ptr, l_ptr);
}
-void link_retransmit(struct link *l_ptr, struct sk_buff *buf,
- u32 retransmits)
+void tipc_link_retransmit(struct link *l_ptr, struct sk_buff *buf,
+ u32 retransmits)
{
struct tipc_msg *msg;
dbg("Retransmitting %u in link %x\n", retransmits, l_ptr);
- if (bearer_congested(l_ptr->b_ptr, l_ptr) && buf && !skb_cloned(buf)) {
+ if (tipc_bearer_congested(l_ptr->b_ptr, l_ptr) && buf && !skb_cloned(buf)) {
msg_dbg(buf_msg(buf), ">NO_RETR->BCONG>");
dbg_print_link(l_ptr, " ");
l_ptr->retransm_queue_head = msg_seqno(buf_msg(buf));
msg = buf_msg(buf);
msg_set_ack(msg, mod(l_ptr->next_in_no - 1));
msg_set_bcast_ack(msg, l_ptr->owner->bclink.last_in);
- if (bearer_send(l_ptr->b_ptr, buf, &l_ptr->media_addr)) {
+ if (tipc_bearer_send(l_ptr->b_ptr, buf, &l_ptr->media_addr)) {
/* Catch if retransmissions fail repeatedly: */
if (l_ptr->last_retransmitted == msg_seqno(msg)) {
if (++l_ptr->stale_count > 100) {
- msg_print(CONS, buf_msg(buf), ">RETR>");
+ tipc_msg_print(TIPC_CONS, buf_msg(buf), ">RETR>");
info("...Retransmitted %u times\n",
l_ptr->stale_count);
- link_print(l_ptr, CONS, "Resetting Link\n");;
- link_reset(l_ptr);
+ link_print(l_ptr, TIPC_CONS, "Resetting Link\n");;
+ tipc_link_reset(l_ptr);
break;
}
} else {
retransmits--;
l_ptr->stats.retransmitted++;
} else {
- bearer_schedule(l_ptr->b_ptr, l_ptr);
+ tipc_bearer_schedule(l_ptr->b_ptr, l_ptr);
l_ptr->stats.bearer_congs++;
l_ptr->retransm_queue_head = msg_seqno(buf_msg(buf));
l_ptr->retransm_queue_size = retransmits;
struct tipc_msg *msg = buf_msg(buf);
if (msg_user(msg) == LINK_CONFIG)
- disc_recv_msg(buf);
+ tipc_disc_recv_msg(buf);
else
- bclink_recv_pkt(buf);
+ tipc_bclink_recv_pkt(buf);
}
/**
void tipc_recv_msg(struct sk_buff *head, struct tipc_bearer *tb_ptr)
{
- read_lock_bh(&net_lock);
+ read_lock_bh(&tipc_net_lock);
while (head) {
struct bearer *b_ptr;
struct node *n_ptr;
link_recv_non_seq(buf);
continue;
}
- n_ptr = node_find(msg_prevnode(msg));
+ n_ptr = tipc_node_find(msg_prevnode(msg));
if (unlikely(!n_ptr))
goto cont;
- node_lock(n_ptr);
+ tipc_node_lock(n_ptr);
l_ptr = n_ptr->links[b_ptr->identity];
if (unlikely(!l_ptr)) {
- node_unlock(n_ptr);
+ tipc_node_unlock(n_ptr);
goto cont;
}
/*
* Release acked messages
*/
if (less(n_ptr->bclink.acked, msg_bcast_ack(msg))) {
- if (node_is_up(n_ptr) && n_ptr->bclink.supported)
- bclink_acknowledge(n_ptr, msg_bcast_ack(msg));
+ if (tipc_node_is_up(n_ptr) && n_ptr->bclink.supported)
+ tipc_bclink_acknowledge(n_ptr, msg_bcast_ack(msg));
}
crs = l_ptr->first_out;
l_ptr->out_queue_size -= released;
}
if (unlikely(l_ptr->next_out))
- link_push_queue(l_ptr);
+ tipc_link_push_queue(l_ptr);
if (unlikely(!list_empty(&l_ptr->waiting_ports)))
- link_wakeup_ports(l_ptr, 0);
+ tipc_link_wakeup_ports(l_ptr, 0);
if (unlikely(++l_ptr->unacked_window >= TIPC_MIN_LINK_WIN)) {
l_ptr->stats.sent_acks++;
- link_send_proto_msg(l_ptr, STATE_MSG, 0, 0, 0, 0, 0);
+ tipc_link_send_proto_msg(l_ptr, STATE_MSG, 0, 0, 0, 0, 0);
}
protocol_check:
if (likely(msg_is_dest(msg, tipc_own_addr))) {
deliver:
if (likely(msg_isdata(msg))) {
- node_unlock(n_ptr);
- port_recv_msg(buf);
+ tipc_node_unlock(n_ptr);
+ tipc_port_recv_msg(buf);
continue;
}
switch (msg_user(msg)) {
l_ptr->stats.recv_bundles++;
l_ptr->stats.recv_bundled +=
msg_msgcnt(msg);
- node_unlock(n_ptr);
- link_recv_bundle(buf);
+ tipc_node_unlock(n_ptr);
+ tipc_link_recv_bundle(buf);
continue;
case ROUTE_DISTRIBUTOR:
- node_unlock(n_ptr);
- cluster_recv_routing_table(buf);
+ tipc_node_unlock(n_ptr);
+ tipc_cltr_recv_routing_table(buf);
continue;
case NAME_DISTRIBUTOR:
- node_unlock(n_ptr);
- named_recv(buf);
+ tipc_node_unlock(n_ptr);
+ tipc_named_recv(buf);
continue;
case CONN_MANAGER:
- node_unlock(n_ptr);
- port_recv_proto_msg(buf);
+ tipc_node_unlock(n_ptr);
+ tipc_port_recv_proto_msg(buf);
continue;
case MSG_FRAGMENTER:
l_ptr->stats.recv_fragments++;
- if (link_recv_fragment(
- &l_ptr->defragm_buf,
- &buf, &msg)) {
+ if (tipc_link_recv_fragment(&l_ptr->defragm_buf,
+ &buf, &msg)) {
l_ptr->stats.recv_fragmented++;
goto deliver;
}
break;
case CHANGEOVER_PROTOCOL:
type = msg_type(msg);
- if (link_recv_changeover_msg(
- &l_ptr, &buf)) {
+ if (link_recv_changeover_msg(&l_ptr, &buf)) {
msg = buf_msg(buf);
seq_no = msg_seqno(msg);
TIPC_SKB_CB(buf)->handle
break;
}
}
- node_unlock(n_ptr);
- net_route_msg(buf);
+ tipc_node_unlock(n_ptr);
+ tipc_net_route_msg(buf);
continue;
}
link_handle_out_of_seq_msg(l_ptr, buf);
head = link_insert_deferred_queue(l_ptr, head);
- node_unlock(n_ptr);
+ tipc_node_unlock(n_ptr);
continue;
}
if (msg_user(msg) == LINK_PROTOCOL) {
link_recv_proto_msg(l_ptr, buf);
head = link_insert_deferred_queue(l_ptr, head);
- node_unlock(n_ptr);
+ tipc_node_unlock(n_ptr);
continue;
}
msg_dbg(msg,"NSEQ<REC<");
msg_dbg(msg,"RECV-REINS:");
buf->next = head;
head = buf;
- node_unlock(n_ptr);
+ tipc_node_unlock(n_ptr);
continue;
}
- node_unlock(n_ptr);
+ tipc_node_unlock(n_ptr);
cont:
buf_discard(buf);
}
- read_unlock_bh(&net_lock);
+ read_unlock_bh(&tipc_net_lock);
}
/*
* Returns the increase of the queue length,i.e. 0 or 1
*/
-u32 link_defer_pkt(struct sk_buff **head,
- struct sk_buff **tail,
- struct sk_buff *buf)
+u32 tipc_link_defer_pkt(struct sk_buff **head,
+ struct sk_buff **tail,
+ struct sk_buff *buf)
{
struct sk_buff *prev = 0;
struct sk_buff *crs = *head;
return;
}
- if (link_defer_pkt(&l_ptr->oldest_deferred_in,
- &l_ptr->newest_deferred_in, buf)) {
+ if (tipc_link_defer_pkt(&l_ptr->oldest_deferred_in,
+ &l_ptr->newest_deferred_in, buf)) {
l_ptr->deferred_inqueue_sz++;
l_ptr->stats.deferred_recv++;
if ((l_ptr->deferred_inqueue_sz % 16) == 1)
- link_send_proto_msg(l_ptr, STATE_MSG, 0, 0, 0, 0, 0);
+ tipc_link_send_proto_msg(l_ptr, STATE_MSG, 0, 0, 0, 0, 0);
} else
l_ptr->stats.duplicates++;
}
/*
* Send protocol message to the other endpoint.
*/
-void link_send_proto_msg(struct link *l_ptr, u32 msg_typ, int probe_msg,
- u32 gap, u32 tolerance, u32 priority, u32 ack_mtu)
+void tipc_link_send_proto_msg(struct link *l_ptr, u32 msg_typ, int probe_msg,
+ u32 gap, u32 tolerance, u32 priority, u32 ack_mtu)
{
struct sk_buff *buf = 0;
struct tipc_msg *msg = l_ptr->pmsg;
msg_set_type(msg, msg_typ);
msg_set_net_plane(msg, l_ptr->b_ptr->net_plane);
msg_set_bcast_ack(msg, mod(l_ptr->owner->bclink.last_in));
- msg_set_last_bcast(msg, bclink_get_last_sent());
+ msg_set_last_bcast(msg, tipc_bclink_get_last_sent());
if (msg_typ == STATE_MSG) {
u32 next_sent = mod(l_ptr->next_out_no);
- if (!link_is_up(l_ptr))
+ if (!tipc_link_is_up(l_ptr))
return;
if (l_ptr->next_out)
next_sent = msg_seqno(buf_msg(l_ptr->next_out));
msg_set_max_pkt(msg, l_ptr->max_pkt_target);
}
- if (node_has_redundant_links(l_ptr->owner)) {
+ if (tipc_node_has_redundant_links(l_ptr->owner)) {
msg_set_redundant_link(msg);
} else {
msg_clear_redundant_link(msg);
/* Congestion? */
- if (bearer_congested(l_ptr->b_ptr, l_ptr)) {
+ if (tipc_bearer_congested(l_ptr->b_ptr, l_ptr)) {
if (!l_ptr->proto_msg_queue) {
l_ptr->proto_msg_queue =
buf_acquire(sizeof(l_ptr->proto_msg));
memcpy(buf->data, (unchar *)msg, sizeof(l_ptr->proto_msg));
msg_set_size(buf_msg(buf), msg_size);
- if (bearer_send(l_ptr->b_ptr, buf, &l_ptr->media_addr)) {
+ if (tipc_bearer_send(l_ptr->b_ptr, buf, &l_ptr->media_addr)) {
l_ptr->unacked_window = 0;
buf_discard(buf);
return;
}
/* New congestion */
- bearer_schedule(l_ptr->b_ptr, l_ptr);
+ tipc_bearer_schedule(l_ptr->b_ptr, l_ptr);
l_ptr->proto_msg_queue = buf;
l_ptr->stats.bearer_congs++;
}
l_ptr->peer_bearer_id = msg_bearer_id(msg);
/* Synchronize broadcast sequence numbers */
- if (!node_has_redundant_links(l_ptr->owner)) {
+ if (!tipc_node_has_redundant_links(l_ptr->owner)) {
l_ptr->owner->bclink.last_in = mod(msg_last_bcast(msg));
}
break;
warn("Changing prio <%s>: %u->%u\n",
l_ptr->name, l_ptr->priority, msg_linkprio(msg));
l_ptr->priority = msg_linkprio(msg);
- link_reset(l_ptr); /* Enforce change to take effect */
+ tipc_link_reset(l_ptr); /* Enforce change to take effect */
break;
}
link_state_event(l_ptr, TRAFFIC_MSG_EVT);
/* Protocol message before retransmits, reduce loss risk */
- bclink_check_gap(l_ptr->owner, msg_last_bcast(msg));
+ tipc_bclink_check_gap(l_ptr->owner, msg_last_bcast(msg));
if (rec_gap || (msg_probe(msg))) {
- link_send_proto_msg(l_ptr, STATE_MSG,
- 0, rec_gap, 0, 0, max_pkt_ack);
+ tipc_link_send_proto_msg(l_ptr, STATE_MSG,
+ 0, rec_gap, 0, 0, max_pkt_ack);
}
if (msg_seq_gap(msg)) {
msg_dbg(msg, "With Gap:");
l_ptr->stats.recv_nacks++;
- link_retransmit(l_ptr, l_ptr->first_out,
- msg_seq_gap(msg));
+ tipc_link_retransmit(l_ptr, l_ptr->first_out,
+ msg_seq_gap(msg));
}
break;
default:
/*
- * link_tunnel(): Send one message via a link belonging to
+ * tipc_link_tunnel(): Send one message via a link belonging to
* another bearer. Owner node is locked.
*/
-void link_tunnel(struct link *l_ptr,
- struct tipc_msg *tunnel_hdr,
- struct tipc_msg *msg,
- u32 selector)
+void tipc_link_tunnel(struct link *l_ptr,
+ struct tipc_msg *tunnel_hdr,
+ struct tipc_msg *msg,
+ u32 selector)
{
struct link *tunnel;
struct sk_buff *buf;
u32 length = msg_size(msg);
tunnel = l_ptr->owner->active_links[selector & 1];
- if (!link_is_up(tunnel))
+ if (!tipc_link_is_up(tunnel))
return;
msg_set_size(tunnel_hdr, length + INT_H_SIZE);
buf = buf_acquire(length + INT_H_SIZE);
dbg("%c->%c:", l_ptr->b_ptr->net_plane, tunnel->b_ptr->net_plane);
msg_dbg(buf_msg(buf), ">SEND>");
assert(tunnel);
- link_send_buf(tunnel, buf);
+ tipc_link_send_buf(tunnel, buf);
}
* Owner node is locked.
*/
-void link_changeover(struct link *l_ptr)
+void tipc_link_changeover(struct link *l_ptr)
{
u32 msgcount = l_ptr->out_queue_size;
struct sk_buff *crs = l_ptr->first_out;
struct link *tunnel = l_ptr->owner->active_links[0];
- int split_bundles = node_has_redundant_links(l_ptr->owner);
+ int split_bundles = tipc_node_has_redundant_links(l_ptr->owner);
struct tipc_msg tunnel_hdr;
if (!tunnel)
dbg("%c->%c:", l_ptr->b_ptr->net_plane,
tunnel->b_ptr->net_plane);
msg_dbg(&tunnel_hdr, "EMPTY>SEND>");
- link_send_buf(tunnel, buf);
+ tipc_link_send_buf(tunnel, buf);
} else {
warn("Memory squeeze; link changeover failed\n");
}
while (msgcount--) {
msg_set_seqno(m,msg_seqno(msg));
- link_tunnel(l_ptr, &tunnel_hdr, m,
- msg_link_selector(m));
+ tipc_link_tunnel(l_ptr, &tunnel_hdr, m,
+ msg_link_selector(m));
pos += align(msg_size(m));
m = (struct tipc_msg *)pos;
}
} else {
- link_tunnel(l_ptr, &tunnel_hdr, msg,
- msg_link_selector(msg));
+ tipc_link_tunnel(l_ptr, &tunnel_hdr, msg,
+ msg_link_selector(msg));
}
crs = crs->next;
}
}
-void link_send_duplicate(struct link *l_ptr, struct link *tunnel)
+void tipc_link_send_duplicate(struct link *l_ptr, struct link *tunnel)
{
struct sk_buff *iter;
struct tipc_msg tunnel_hdr;
dbg("%c->%c:", l_ptr->b_ptr->net_plane,
tunnel->b_ptr->net_plane);
msg_dbg(buf_msg(outbuf), ">SEND>");
- link_send_buf(tunnel, outbuf);
- if (!link_is_up(l_ptr))
+ tipc_link_send_buf(tunnel, outbuf);
+ if (!tipc_link_is_up(l_ptr))
return;
iter = iter->next;
}
/* First original message ?: */
- if (link_is_up(dest_link)) {
+ if (tipc_link_is_up(dest_link)) {
msg_dbg(tunnel_msg, "UP/FIRST/<REC<");
- link_reset(dest_link);
+ tipc_link_reset(dest_link);
dest_link->exp_msg_count = msg_count;
if (!msg_count)
goto exit;
/*
* Bundler functionality:
*/
-void link_recv_bundle(struct sk_buff *buf)
+void tipc_link_recv_bundle(struct sk_buff *buf)
{
u32 msgcount = msg_msgcnt(buf_msg(buf));
u32 pos = INT_H_SIZE;
};
pos += align(msg_size(buf_msg(obuf)));
msg_dbg(buf_msg(obuf), " /");
- net_route_msg(obuf);
+ tipc_net_route_msg(obuf);
}
buf_discard(buf);
}
/*
- * link_send_long_buf: Entry for buffers needing fragmentation.
+ * tipc_link_send_long_buf: Entry for buffers needing fragmentation.
* The buffer is complete, inclusive total message length.
* Returns user data length.
*/
-int link_send_long_buf(struct link *l_ptr, struct sk_buff *buf)
+int tipc_link_send_long_buf(struct link *l_ptr, struct sk_buff *buf)
{
struct tipc_msg *inmsg = buf_msg(buf);
struct tipc_msg fragm_hdr;
/* Send queued messages first, if any: */
l_ptr->stats.sent_fragments++;
- link_send_buf(l_ptr, fragm);
- if (!link_is_up(l_ptr))
+ tipc_link_send_buf(l_ptr, fragm);
+ if (!tipc_link_is_up(l_ptr))
return dsz;
msg_set_fragm_no(&fragm_hdr, ++fragm_no);
rest -= fragm_sz;
}
/*
- * link_recv_fragment(): Called with node lock on. Returns
+ * tipc_link_recv_fragment(): Called with node lock on. Returns
* the reassembled buffer if message is complete.
*/
-int link_recv_fragment(struct sk_buff **pending, struct sk_buff **fb,
- struct tipc_msg **m)
+int tipc_link_recv_fragment(struct sk_buff **pending, struct sk_buff **fb,
+ struct tipc_msg **m)
{
struct sk_buff *prev = 0;
struct sk_buff *fbuf = *fb;
}
-void link_set_queue_limits(struct link *l_ptr, u32 window)
+void tipc_link_set_queue_limits(struct link *l_ptr, u32 window)
{
/* Data messages from this node, inclusive FIRST_FRAGM */
l_ptr->queue_limit[DATA_LOW] = window;
* @name - ptr to link name string
* @node - ptr to area to be filled with ptr to associated node
*
- * Caller must hold 'net_lock' to ensure node and bearer are not deleted;
+ * Caller must hold 'tipc_net_lock' to ensure node and bearer are not deleted;
* this also prevents link deletion.
*
* Returns pointer to link (or 0 if invalid link name).
if (!link_name_validate(name, &link_name_parts))
return 0;
- b_ptr = bearer_find_interface(link_name_parts.if_local);
+ b_ptr = tipc_bearer_find_interface(link_name_parts.if_local);
if (!b_ptr)
return 0;
- *node = node_find(link_name_parts.addr_peer);
+ *node = tipc_node_find(link_name_parts.addr_peer);
if (!*node)
return 0;
return l_ptr;
}
-struct sk_buff *link_cmd_config(const void *req_tlv_area, int req_tlv_space,
- u16 cmd)
+struct sk_buff *tipc_link_cmd_config(const void *req_tlv_area, int req_tlv_space,
+ u16 cmd)
{
struct tipc_link_config *args;
u32 new_value;
int res;
if (!TLV_CHECK(req_tlv_area, req_tlv_space, TIPC_TLV_LINK_CONFIG))
- return cfg_reply_error_string(TIPC_CFG_TLV_ERROR);
+ return tipc_cfg_reply_error_string(TIPC_CFG_TLV_ERROR);
args = (struct tipc_link_config *)TLV_DATA(req_tlv_area);
new_value = ntohl(args->value);
- if (!strcmp(args->name, bc_link_name)) {
+ if (!strcmp(args->name, tipc_bclink_name)) {
if ((cmd == TIPC_CMD_SET_LINK_WINDOW) &&
- (bclink_set_queue_limits(new_value) == 0))
- return cfg_reply_none();
- return cfg_reply_error_string(TIPC_CFG_NOT_SUPPORTED
- " (cannot change setting on broadcast link)");
+ (tipc_bclink_set_queue_limits(new_value) == 0))
+ return tipc_cfg_reply_none();
+ return tipc_cfg_reply_error_string(TIPC_CFG_NOT_SUPPORTED
+ " (cannot change setting on broadcast link)");
}
- read_lock_bh(&net_lock);
+ read_lock_bh(&tipc_net_lock);
l_ptr = link_find_link(args->name, &node);
if (!l_ptr) {
- read_unlock_bh(&net_lock);
- return cfg_reply_error_string("link not found");
+ read_unlock_bh(&tipc_net_lock);
+ return tipc_cfg_reply_error_string("link not found");
}
- node_lock(node);
+ tipc_node_lock(node);
res = -EINVAL;
switch (cmd) {
case TIPC_CMD_SET_LINK_TOL:
if ((new_value >= TIPC_MIN_LINK_TOL) &&
(new_value <= TIPC_MAX_LINK_TOL)) {
link_set_supervision_props(l_ptr, new_value);
- link_send_proto_msg(l_ptr, STATE_MSG,
- 0, 0, new_value, 0, 0);
+ tipc_link_send_proto_msg(l_ptr, STATE_MSG,
+ 0, 0, new_value, 0, 0);
res = TIPC_OK;
}
break;
case TIPC_CMD_SET_LINK_PRI:
- if (new_value < TIPC_NUM_LINK_PRI) {
+ if ((new_value >= TIPC_MIN_LINK_PRI) &&
+ (new_value <= TIPC_MAX_LINK_PRI)) {
l_ptr->priority = new_value;
- link_send_proto_msg(l_ptr, STATE_MSG,
- 0, 0, 0, new_value, 0);
+ tipc_link_send_proto_msg(l_ptr, STATE_MSG,
+ 0, 0, 0, new_value, 0);
res = TIPC_OK;
}
break;
case TIPC_CMD_SET_LINK_WINDOW:
if ((new_value >= TIPC_MIN_LINK_WIN) &&
(new_value <= TIPC_MAX_LINK_WIN)) {
- link_set_queue_limits(l_ptr, new_value);
+ tipc_link_set_queue_limits(l_ptr, new_value);
res = TIPC_OK;
}
break;
}
- node_unlock(node);
+ tipc_node_unlock(node);
- read_unlock_bh(&net_lock);
+ read_unlock_bh(&tipc_net_lock);
if (res)
- return cfg_reply_error_string("cannot change link setting");
+ return tipc_cfg_reply_error_string("cannot change link setting");
- return cfg_reply_none();
+ return tipc_cfg_reply_none();
}
/**
l_ptr->stats.recv_info = l_ptr->next_in_no;
}
-struct sk_buff *link_cmd_reset_stats(const void *req_tlv_area, int req_tlv_space)
+struct sk_buff *tipc_link_cmd_reset_stats(const void *req_tlv_area, int req_tlv_space)
{
char *link_name;
struct link *l_ptr;
struct node *node;
if (!TLV_CHECK(req_tlv_area, req_tlv_space, TIPC_TLV_LINK_NAME))
- return cfg_reply_error_string(TIPC_CFG_TLV_ERROR);
+ return tipc_cfg_reply_error_string(TIPC_CFG_TLV_ERROR);
link_name = (char *)TLV_DATA(req_tlv_area);
- if (!strcmp(link_name, bc_link_name)) {
- if (bclink_reset_stats())
- return cfg_reply_error_string("link not found");
- return cfg_reply_none();
+ if (!strcmp(link_name, tipc_bclink_name)) {
+ if (tipc_bclink_reset_stats())
+ return tipc_cfg_reply_error_string("link not found");
+ return tipc_cfg_reply_none();
}
- read_lock_bh(&net_lock);
+ read_lock_bh(&tipc_net_lock);
l_ptr = link_find_link(link_name, &node);
if (!l_ptr) {
- read_unlock_bh(&net_lock);
- return cfg_reply_error_string("link not found");
+ read_unlock_bh(&tipc_net_lock);
+ return tipc_cfg_reply_error_string("link not found");
}
- node_lock(node);
+ tipc_node_lock(node);
link_reset_statistics(l_ptr);
- node_unlock(node);
- read_unlock_bh(&net_lock);
- return cfg_reply_none();
+ tipc_node_unlock(node);
+ read_unlock_bh(&tipc_net_lock);
+ return tipc_cfg_reply_none();
}
/**
}
/**
- * link_stats - print link statistics
+ * tipc_link_stats - print link statistics
* @name: link name
* @buf: print buffer area
* @buf_size: size of print buffer area
* Returns length of print buffer data string (or 0 if error)
*/
-static int link_stats(const char *name, char *buf, const u32 buf_size)
+static int tipc_link_stats(const char *name, char *buf, const u32 buf_size)
{
struct print_buf pb;
struct link *l_ptr;
char *status;
u32 profile_total = 0;
- if (!strcmp(name, bc_link_name))
- return bclink_stats(buf, buf_size);
+ if (!strcmp(name, tipc_bclink_name))
+ return tipc_bclink_stats(buf, buf_size);
- printbuf_init(&pb, buf, buf_size);
+ tipc_printbuf_init(&pb, buf, buf_size);
- read_lock_bh(&net_lock);
+ read_lock_bh(&tipc_net_lock);
l_ptr = link_find_link(name, &node);
if (!l_ptr) {
- read_unlock_bh(&net_lock);
+ read_unlock_bh(&tipc_net_lock);
return 0;
}
- node_lock(node);
+ tipc_node_lock(node);
- if (link_is_active(l_ptr))
+ if (tipc_link_is_active(l_ptr))
status = "ACTIVE";
- else if (link_is_up(l_ptr))
+ else if (tipc_link_is_up(l_ptr))
status = "STANDBY";
else
status = "DEFUNCT";
? (l_ptr->stats.accu_queue_sz / l_ptr->stats.queue_sz_counts)
: 0);
- node_unlock(node);
- read_unlock_bh(&net_lock);
- return printbuf_validate(&pb);
+ tipc_node_unlock(node);
+ read_unlock_bh(&tipc_net_lock);
+ return tipc_printbuf_validate(&pb);
}
#define MAX_LINK_STATS_INFO 2000
-struct sk_buff *link_cmd_show_stats(const void *req_tlv_area, int req_tlv_space)
+struct sk_buff *tipc_link_cmd_show_stats(const void *req_tlv_area, int req_tlv_space)
{
struct sk_buff *buf;
struct tlv_desc *rep_tlv;
int str_len;
if (!TLV_CHECK(req_tlv_area, req_tlv_space, TIPC_TLV_LINK_NAME))
- return cfg_reply_error_string(TIPC_CFG_TLV_ERROR);
+ return tipc_cfg_reply_error_string(TIPC_CFG_TLV_ERROR);
- buf = cfg_reply_alloc(TLV_SPACE(MAX_LINK_STATS_INFO));
+ buf = tipc_cfg_reply_alloc(TLV_SPACE(MAX_LINK_STATS_INFO));
if (!buf)
return NULL;
rep_tlv = (struct tlv_desc *)buf->data;
- str_len = link_stats((char *)TLV_DATA(req_tlv_area),
- (char *)TLV_DATA(rep_tlv), MAX_LINK_STATS_INFO);
+ str_len = tipc_link_stats((char *)TLV_DATA(req_tlv_area),
+ (char *)TLV_DATA(rep_tlv), MAX_LINK_STATS_INFO);
if (!str_len) {
buf_discard(buf);
- return cfg_reply_error_string("link not found");
+ return tipc_cfg_reply_error_string("link not found");
}
skb_put(buf, TLV_SPACE(str_len));
u32 a;
a = link_name2addr(name, &bearer_id);
- read_lock_bh(&net_lock);
- node = node_find(a);
+ read_lock_bh(&tipc_net_lock);
+ node = tipc_node_find(a);
if (node) {
- node_lock(node);
+ tipc_node_lock(node);
l_ptr = node->links[bearer_id];
if (l_ptr) {
if (op == TIPC_REMOVE_LINK) {
struct bearer *b_ptr = l_ptr->b_ptr;
spin_lock_bh(&b_ptr->publ.lock);
- link_delete(l_ptr);
+ tipc_link_delete(l_ptr);
spin_unlock_bh(&b_ptr->publ.lock);
}
if (op == TIPC_CMD_BLOCK_LINK) {
- link_reset(l_ptr);
+ tipc_link_reset(l_ptr);
l_ptr->blocked = 1;
}
if (op == TIPC_CMD_UNBLOCK_LINK) {
}
res = TIPC_OK;
}
- node_unlock(node);
+ tipc_node_unlock(node);
}
- read_unlock_bh(&net_lock);
+ read_unlock_bh(&tipc_net_lock);
return res;
}
#endif
/**
- * link_get_max_pkt - get maximum packet size to use when sending to destination
+ * tipc_link_get_max_pkt - get maximum packet size to use when sending to destination
* @dest: network address of destination node
* @selector: used to select from set of active links
*
* If no active link can be found, uses default maximum packet size.
*/
-u32 link_get_max_pkt(u32 dest, u32 selector)
+u32 tipc_link_get_max_pkt(u32 dest, u32 selector)
{
struct node *n_ptr;
struct link *l_ptr;
if (dest == tipc_own_addr)
return MAX_MSG_SIZE;
- read_lock_bh(&net_lock);
- n_ptr = node_select(dest, selector);
+ read_lock_bh(&tipc_net_lock);
+ n_ptr = tipc_node_select(dest, selector);
if (n_ptr) {
- node_lock(n_ptr);
+ tipc_node_lock(n_ptr);
l_ptr = n_ptr->active_links[selector & 1];
if (l_ptr)
res = link_max_pkt(l_ptr);
- node_unlock(n_ptr);
+ tipc_node_unlock(n_ptr);
}
- read_unlock_bh(&net_lock);
+ read_unlock_bh(&tipc_net_lock);
return res;
}
struct port;
-struct link *link_create(struct bearer *b_ptr, const u32 peer,
- const struct tipc_media_addr *media_addr);
-void link_delete(struct link *l_ptr);
-void link_changeover(struct link *l_ptr);
-void link_send_duplicate(struct link *l_ptr, struct link *dest);
-void link_reset_fragments(struct link *l_ptr);
-int link_is_up(struct link *l_ptr);
-int link_is_active(struct link *l_ptr);
-void link_start(struct link *l_ptr);
-u32 link_push_packet(struct link *l_ptr);
-void link_stop(struct link *l_ptr);
-struct sk_buff *link_cmd_config(const void *req_tlv_area, int req_tlv_space, u16 cmd);
-struct sk_buff *link_cmd_show_stats(const void *req_tlv_area, int req_tlv_space);
-struct sk_buff *link_cmd_reset_stats(const void *req_tlv_area, int req_tlv_space);
-void link_reset(struct link *l_ptr);
-int link_send(struct sk_buff *buf, u32 dest, u32 selector);
-int link_send_buf(struct link *l_ptr, struct sk_buff *buf);
-u32 link_get_max_pkt(u32 dest,u32 selector);
-int link_send_sections_fast(struct port* sender,
- struct iovec const *msg_sect,
- const u32 num_sect,
- u32 destnode);
-
-int link_send_long_buf(struct link *l_ptr, struct sk_buff *buf);
-void link_tunnel(struct link *l_ptr, struct tipc_msg *tnl_hdr,
- struct tipc_msg *msg, u32 selector);
-void link_recv_bundle(struct sk_buff *buf);
-int link_recv_fragment(struct sk_buff **pending,
- struct sk_buff **fb,
- struct tipc_msg **msg);
-void link_send_proto_msg(struct link *l_ptr, u32 msg_typ, int prob, u32 gap,
- u32 tolerance, u32 priority, u32 acked_mtu);
-void link_push_queue(struct link *l_ptr);
-u32 link_defer_pkt(struct sk_buff **head, struct sk_buff **tail,
+struct link *tipc_link_create(struct bearer *b_ptr, const u32 peer,
+ const struct tipc_media_addr *media_addr);
+void tipc_link_delete(struct link *l_ptr);
+void tipc_link_changeover(struct link *l_ptr);
+void tipc_link_send_duplicate(struct link *l_ptr, struct link *dest);
+void tipc_link_reset_fragments(struct link *l_ptr);
+int tipc_link_is_up(struct link *l_ptr);
+int tipc_link_is_active(struct link *l_ptr);
+void tipc_link_start(struct link *l_ptr);
+u32 tipc_link_push_packet(struct link *l_ptr);
+void tipc_link_stop(struct link *l_ptr);
+struct sk_buff *tipc_link_cmd_config(const void *req_tlv_area, int req_tlv_space, u16 cmd);
+struct sk_buff *tipc_link_cmd_show_stats(const void *req_tlv_area, int req_tlv_space);
+struct sk_buff *tipc_link_cmd_reset_stats(const void *req_tlv_area, int req_tlv_space);
+void tipc_link_reset(struct link *l_ptr);
+int tipc_link_send(struct sk_buff *buf, u32 dest, u32 selector);
+int tipc_link_send_buf(struct link *l_ptr, struct sk_buff *buf);
+u32 tipc_link_get_max_pkt(u32 dest,u32 selector);
+int tipc_link_send_sections_fast(struct port* sender,
+ struct iovec const *msg_sect,
+ const u32 num_sect,
+ u32 destnode);
+int tipc_link_send_long_buf(struct link *l_ptr, struct sk_buff *buf);
+void tipc_link_tunnel(struct link *l_ptr, struct tipc_msg *tnl_hdr,
+ struct tipc_msg *msg, u32 selector);
+void tipc_link_recv_bundle(struct sk_buff *buf);
+int tipc_link_recv_fragment(struct sk_buff **pending,
+ struct sk_buff **fb,
+ struct tipc_msg **msg);
+void tipc_link_send_proto_msg(struct link *l_ptr, u32 msg_typ, int prob, u32 gap,
+ u32 tolerance, u32 priority, u32 acked_mtu);
+void tipc_link_push_queue(struct link *l_ptr);
+u32 tipc_link_defer_pkt(struct sk_buff **head, struct sk_buff **tail,
struct sk_buff *buf);
-void link_wakeup_ports(struct link *l_ptr, int all);
-void link_set_queue_limits(struct link *l_ptr, u32 window);
-void link_retransmit(struct link *l_ptr, struct sk_buff *start, u32 retransmits);
+void tipc_link_wakeup_ports(struct link *l_ptr, int all);
+void tipc_link_set_queue_limits(struct link *l_ptr, u32 window);
+void tipc_link_retransmit(struct link *l_ptr, struct sk_buff *start, u32 retransmits);
/*
* Link sequence number manipulation routines (uses modulo 2**16 arithmetic)
#include "bearer.h"
-void msg_set_media_addr(struct tipc_msg *m, struct tipc_media_addr *a)
-{
- memcpy(&((int *)m)[5], a, sizeof(*a));
-}
-
-void msg_get_media_addr(struct tipc_msg *m, struct tipc_media_addr *a)
-{
- memcpy(a, &((int*)m)[5], sizeof(*a));
-}
-
-
-void msg_print(struct print_buf *buf, struct tipc_msg *msg, const char *str)
+void tipc_msg_print(struct print_buf *buf, struct tipc_msg *msg, const char *str)
{
u32 usr = msg_user(msg);
tipc_printf(buf, str);
tipc_printf(buf, ":REQL(%u):", msg_req_links(msg));
tipc_printf(buf, ":DDOM(%x):", msg_dest_domain(msg));
tipc_printf(buf, ":NETID(%u):", msg_bc_netid(msg));
- media_addr_printf(buf, orig);
+ tipc_media_addr_printf(buf, orig);
}
if (msg_user(msg) == BCAST_PROTOCOL) {
tipc_printf(buf, "BCNACK:AFTER(%u):", msg_bcgap_after(msg));
}
tipc_printf(buf, "\n");
if ((usr == CHANGEOVER_PROTOCOL) && (msg_msgcnt(msg))) {
- msg_print(buf,msg_get_wrapped(msg)," /");
+ tipc_msg_print(buf,msg_get_wrapped(msg)," /");
}
if ((usr == MSG_FRAGMENTER) && (msg_type(msg) == FIRST_FRAGMENT)) {
- msg_print(buf,msg_get_wrapped(msg)," /");
+ tipc_msg_print(buf,msg_get_wrapped(msg)," /");
}
}
#ifndef _TIPC_MSG_H
#define _TIPC_MSG_H
-#include <net/tipc/tipc_msg.h>
+#include "core.h"
#define TIPC_VERSION 2
#define DATA_LOW TIPC_LOW_IMPORTANCE
return -EFAULT;
}
+static inline void msg_set_media_addr(struct tipc_msg *m, struct tipc_media_addr *a)
+{
+ memcpy(&((int *)m)[5], a, sizeof(*a));
+}
-struct tipc_media_addr;
-
-extern void msg_set_media_addr(struct tipc_msg *m,
- struct tipc_media_addr *a);
-
-extern void msg_get_media_addr(struct tipc_msg *m,
- struct tipc_media_addr *a);
-
+static inline void msg_get_media_addr(struct tipc_msg *m, struct tipc_media_addr *a)
+{
+ memcpy(a, &((int*)m)[5], sizeof(*a));
+}
#endif
}
/**
- * named_publish - tell other nodes about a new publication by this node
+ * tipc_named_publish - tell other nodes about a new publication by this node
*/
-void named_publish(struct publication *publ)
+void tipc_named_publish(struct publication *publ)
{
struct sk_buff *buf;
struct distr_item *item;
item = (struct distr_item *)msg_data(buf_msg(buf));
publ_to_item(item, publ);
- dbg("named_withdraw: broadcasting publish msg\n");
- cluster_broadcast(buf);
+ dbg("tipc_named_withdraw: broadcasting publish msg\n");
+ tipc_cltr_broadcast(buf);
}
/**
- * named_withdraw - tell other nodes about a withdrawn publication by this node
+ * tipc_named_withdraw - tell other nodes about a withdrawn publication by this node
*/
-void named_withdraw(struct publication *publ)
+void tipc_named_withdraw(struct publication *publ)
{
struct sk_buff *buf;
struct distr_item *item;
item = (struct distr_item *)msg_data(buf_msg(buf));
publ_to_item(item, publ);
- dbg("named_withdraw: broadcasting withdraw msg\n");
- cluster_broadcast(buf);
+ dbg("tipc_named_withdraw: broadcasting withdraw msg\n");
+ tipc_cltr_broadcast(buf);
}
/**
- * named_node_up - tell specified node about all publications by this node
+ * tipc_named_node_up - tell specified node about all publications by this node
*/
-void named_node_up(unsigned long node)
+void tipc_named_node_up(unsigned long node)
{
struct publication *publ;
struct distr_item *item = 0;
u32 max_item_buf;
assert(in_own_cluster(node));
- read_lock_bh(&nametbl_lock);
+ read_lock_bh(&tipc_nametbl_lock);
max_item_buf = TIPC_MAX_USER_MSG_SIZE / ITEM_SIZE;
max_item_buf *= ITEM_SIZE;
rest = publ_cnt * ITEM_SIZE;
left -= ITEM_SIZE;
if (!left) {
msg_set_link_selector(buf_msg(buf), node);
- dbg("named_node_up: sending publish msg to "
+ dbg("tipc_named_node_up: sending publish msg to "
"<%u.%u.%u>\n", tipc_zone(node),
tipc_cluster(node), tipc_node(node));
- link_send(buf, node, node);
+ tipc_link_send(buf, node, node);
buf = 0;
}
}
exit:
- read_unlock_bh(&nametbl_lock);
+ read_unlock_bh(&tipc_nametbl_lock);
}
/**
static void node_is_down(struct publication *publ)
{
struct publication *p;
- write_lock_bh(&nametbl_lock);
+ write_lock_bh(&tipc_nametbl_lock);
dbg("node_is_down: withdrawing %u, %u, %u\n",
publ->type, publ->lower, publ->upper);
publ->key += 1222345;
- p = nametbl_remove_publ(publ->type, publ->lower,
- publ->node, publ->ref, publ->key);
+ p = tipc_nametbl_remove_publ(publ->type, publ->lower,
+ publ->node, publ->ref, publ->key);
assert(p == publ);
- write_unlock_bh(&nametbl_lock);
+ write_unlock_bh(&tipc_nametbl_lock);
if (publ)
kfree(publ);
}
/**
- * named_recv - process name table update message sent by another node
+ * tipc_named_recv - process name table update message sent by another node
*/
-void named_recv(struct sk_buff *buf)
+void tipc_named_recv(struct sk_buff *buf)
{
struct publication *publ;
struct tipc_msg *msg = buf_msg(buf);
struct distr_item *item = (struct distr_item *)msg_data(msg);
u32 count = msg_data_sz(msg) / ITEM_SIZE;
- write_lock_bh(&nametbl_lock);
+ write_lock_bh(&tipc_nametbl_lock);
while (count--) {
if (msg_type(msg) == PUBLICATION) {
- dbg("named_recv: got publication for %u, %u, %u\n",
+ dbg("tipc_named_recv: got publication for %u, %u, %u\n",
ntohl(item->type), ntohl(item->lower),
ntohl(item->upper));
- publ = nametbl_insert_publ(ntohl(item->type),
- ntohl(item->lower),
- ntohl(item->upper),
- TIPC_CLUSTER_SCOPE,
- msg_orignode(msg),
- ntohl(item->ref),
- ntohl(item->key));
+ publ = tipc_nametbl_insert_publ(ntohl(item->type),
+ ntohl(item->lower),
+ ntohl(item->upper),
+ TIPC_CLUSTER_SCOPE,
+ msg_orignode(msg),
+ ntohl(item->ref),
+ ntohl(item->key));
if (publ) {
- nodesub_subscribe(&publ->subscr,
- msg_orignode(msg),
- publ,
- (net_ev_handler)node_is_down);
+ tipc_nodesub_subscribe(&publ->subscr,
+ msg_orignode(msg),
+ publ,
+ (net_ev_handler)node_is_down);
}
} else if (msg_type(msg) == WITHDRAWAL) {
- dbg("named_recv: got withdrawl for %u, %u, %u\n",
+ dbg("tipc_named_recv: got withdrawl for %u, %u, %u\n",
ntohl(item->type), ntohl(item->lower),
ntohl(item->upper));
- publ = nametbl_remove_publ(ntohl(item->type),
- ntohl(item->lower),
- msg_orignode(msg),
- ntohl(item->ref),
- ntohl(item->key));
+ publ = tipc_nametbl_remove_publ(ntohl(item->type),
+ ntohl(item->lower),
+ msg_orignode(msg),
+ ntohl(item->ref),
+ ntohl(item->key));
if (publ) {
- nodesub_unsubscribe(&publ->subscr);
+ tipc_nodesub_unsubscribe(&publ->subscr);
kfree(publ);
}
} else {
- warn("named_recv: unknown msg\n");
+ warn("tipc_named_recv: unknown msg\n");
}
item++;
}
- write_unlock_bh(&nametbl_lock);
+ write_unlock_bh(&tipc_nametbl_lock);
buf_discard(buf);
}
/**
- * named_reinit - re-initialize local publication list
+ * tipc_named_reinit - re-initialize local publication list
*
* This routine is called whenever TIPC networking is (re)enabled.
* All existing publications by this node that have "cluster" or "zone" scope
* (If the node's address is unchanged, the update loop terminates immediately.)
*/
-void named_reinit(void)
+void tipc_named_reinit(void)
{
struct publication *publ;
- write_lock_bh(&nametbl_lock);
+ write_lock_bh(&tipc_nametbl_lock);
list_for_each_entry(publ, &publ_root, local_list) {
if (publ->node == tipc_own_addr)
break;
publ->node = tipc_own_addr;
}
- write_unlock_bh(&nametbl_lock);
+ write_unlock_bh(&tipc_nametbl_lock);
}
#include "name_table.h"
-void named_publish(struct publication *publ);
-void named_withdraw(struct publication *publ);
-void named_node_up(unsigned long node);
-void named_recv(struct sk_buff *buf);
-void named_reinit(void);
+void tipc_named_publish(struct publication *publ);
+void tipc_named_withdraw(struct publication *publ);
+void tipc_named_node_up(unsigned long node);
+void tipc_named_recv(struct sk_buff *buf);
+void tipc_named_reinit(void);
#endif
u32 local_publ_count;
};
-struct name_table table = { NULL } ;
+static struct name_table table = { NULL } ;
static atomic_t rsv_publ_ok = ATOMIC_INIT(0);
-rwlock_t nametbl_lock = RW_LOCK_UNLOCKED;
+rwlock_t tipc_nametbl_lock = RW_LOCK_UNLOCKED;
static inline int hash(int x)
}
/**
- * subseq_alloc - allocate a specified number of sub-sequence structures
+ * tipc_subseq_alloc - allocate a specified number of sub-sequence structures
*/
-struct sub_seq *subseq_alloc(u32 cnt)
+struct sub_seq *tipc_subseq_alloc(u32 cnt)
{
u32 sz = cnt * sizeof(struct sub_seq);
struct sub_seq *sseq = (struct sub_seq *)kmalloc(sz, GFP_ATOMIC);
}
/**
- * nameseq_create - create a name sequence structure for the specified 'type'
+ * tipc_nameseq_create - create a name sequence structure for the specified 'type'
*
* Allocates a single sub-sequence structure and sets it to all 0's.
*/
-struct name_seq *nameseq_create(u32 type, struct hlist_head *seq_head)
+struct name_seq *tipc_nameseq_create(u32 type, struct hlist_head *seq_head)
{
struct name_seq *nseq =
(struct name_seq *)kmalloc(sizeof(*nseq), GFP_ATOMIC);
- struct sub_seq *sseq = subseq_alloc(1);
+ struct sub_seq *sseq = tipc_subseq_alloc(1);
if (!nseq || !sseq) {
warn("Memory squeeze; failed to create name sequence\n");
nseq->lock = SPIN_LOCK_UNLOCKED;
nseq->type = type;
nseq->sseqs = sseq;
- dbg("nameseq_create() nseq = %x type %u, ssseqs %x, ff: %u\n",
+ dbg("tipc_nameseq_create() nseq = %x type %u, ssseqs %x, ff: %u\n",
nseq, type, nseq->sseqs, nseq->first_free);
nseq->alloc = 1;
INIT_HLIST_NODE(&nseq->ns_list);
}
/**
- * nameseq_insert_publ -
+ * tipc_nameseq_insert_publ -
*/
-struct publication *nameseq_insert_publ(struct name_seq *nseq,
+struct publication *tipc_nameseq_insert_publ(struct name_seq *nseq,
u32 type, u32 lower, u32 upper,
u32 scope, u32 node, u32 port, u32 key)
{
if (nseq->first_free == nseq->alloc) {
struct sub_seq *sseqs = nseq->sseqs;
- nseq->sseqs = subseq_alloc(nseq->alloc * 2);
+ nseq->sseqs = tipc_subseq_alloc(nseq->alloc * 2);
if (nseq->sseqs != NULL) {
memcpy(nseq->sseqs, sseqs,
nseq->alloc * sizeof (struct sub_seq));
*/
list_for_each_entry_safe(s, st, &nseq->subscriptions, nameseq_list) {
dbg("calling report_overlap()\n");
- subscr_report_overlap(s,
- publ->lower,
- publ->upper,
- TIPC_PUBLISHED,
- publ->ref,
- publ->node,
- created_subseq);
+ tipc_subscr_report_overlap(s,
+ publ->lower,
+ publ->upper,
+ TIPC_PUBLISHED,
+ publ->ref,
+ publ->node,
+ created_subseq);
}
return publ;
}
/**
- * nameseq_remove_publ -
+ * tipc_nameseq_remove_publ -
*/
-struct publication *nameseq_remove_publ(struct name_seq *nseq, u32 inst,
- u32 node, u32 ref, u32 key)
+struct publication *tipc_nameseq_remove_publ(struct name_seq *nseq, u32 inst,
+ u32 node, u32 ref, u32 key)
{
struct publication *publ;
struct publication *prev;
* Any subscriptions waiting ?
*/
list_for_each_entry_safe(s, st, &nseq->subscriptions, nameseq_list) {
- subscr_report_overlap(s,
- publ->lower,
- publ->upper,
- TIPC_WITHDRAWN,
- publ->ref,
- publ->node,
- removed_subseq);
+ tipc_subscr_report_overlap(s,
+ publ->lower,
+ publ->upper,
+ TIPC_WITHDRAWN,
+ publ->ref,
+ publ->node,
+ removed_subseq);
}
return publ;
}
/**
- * nameseq_subscribe: attach a subscription, and issue
+ * tipc_nameseq_subscribe: attach a subscription, and issue
* the prescribed number of events if there is any sub-
* sequence overlapping with the requested sequence
*/
-void nameseq_subscribe(struct name_seq *nseq, struct subscription *s)
+void tipc_nameseq_subscribe(struct name_seq *nseq, struct subscription *s)
{
struct sub_seq *sseq = nseq->sseqs;
while (sseq != &nseq->sseqs[nseq->first_free]) {
struct publication *zl = sseq->zone_list;
- if (zl && subscr_overlap(s,sseq->lower,sseq->upper)) {
+ if (zl && tipc_subscr_overlap(s,sseq->lower,sseq->upper)) {
struct publication *crs = zl;
int must_report = 1;
do {
- subscr_report_overlap(s,
- sseq->lower,
- sseq->upper,
- TIPC_PUBLISHED,
- crs->ref,
- crs->node,
- must_report);
+ tipc_subscr_report_overlap(s,
+ sseq->lower,
+ sseq->upper,
+ TIPC_PUBLISHED,
+ crs->ref,
+ crs->node,
+ must_report);
must_report = 0;
crs = crs->zone_list_next;
} while (crs != zl);
return 0;
};
-struct publication *nametbl_insert_publ(u32 type, u32 lower, u32 upper,
- u32 scope, u32 node, u32 port, u32 key)
+struct publication *tipc_nametbl_insert_publ(u32 type, u32 lower, u32 upper,
+ u32 scope, u32 node, u32 port, u32 key)
{
struct name_seq *seq = nametbl_find_seq(type);
dbg("Publishing <%u,%u,%u> from %x\n", type, lower, upper, node);
if (!seq) {
- seq = nameseq_create(type, &table.types[hash(type)]);
- dbg("nametbl_insert_publ: created %x\n", seq);
+ seq = tipc_nameseq_create(type, &table.types[hash(type)]);
+ dbg("tipc_nametbl_insert_publ: created %x\n", seq);
}
if (!seq)
return 0;
assert(seq->type == type);
- return nameseq_insert_publ(seq, type, lower, upper,
- scope, node, port, key);
+ return tipc_nameseq_insert_publ(seq, type, lower, upper,
+ scope, node, port, key);
}
-struct publication *nametbl_remove_publ(u32 type, u32 lower,
- u32 node, u32 ref, u32 key)
+struct publication *tipc_nametbl_remove_publ(u32 type, u32 lower,
+ u32 node, u32 ref, u32 key)
{
struct publication *publ;
struct name_seq *seq = nametbl_find_seq(type);
return 0;
dbg("Withdrawing <%u,%u> from %x\n", type, lower, node);
- publ = nameseq_remove_publ(seq, lower, node, ref, key);
+ publ = tipc_nameseq_remove_publ(seq, lower, node, ref, key);
if (!seq->first_free && list_empty(&seq->subscriptions)) {
hlist_del_init(&seq->ns_list);
}
/*
- * nametbl_translate(): Translate tipc_name -> tipc_portid.
+ * tipc_nametbl_translate(): Translate tipc_name -> tipc_portid.
* Very time-critical.
*
* Note: on entry 'destnode' is the search domain used during translation;
* on exit it passes back the node address of the matching port (if any)
*/
-u32 nametbl_translate(u32 type, u32 instance, u32 *destnode)
+u32 tipc_nametbl_translate(u32 type, u32 instance, u32 *destnode)
{
struct sub_seq *sseq;
struct publication *publ = 0;
if (!in_scope(*destnode, tipc_own_addr))
return 0;
- read_lock_bh(&nametbl_lock);
+ read_lock_bh(&tipc_nametbl_lock);
seq = nametbl_find_seq(type);
if (unlikely(!seq))
goto not_found;
ref = publ->ref;
*destnode = publ->node;
spin_unlock_bh(&seq->lock);
- read_unlock_bh(&nametbl_lock);
+ read_unlock_bh(&tipc_nametbl_lock);
return ref;
}
publ = sseq->cluster_list;
spin_unlock_bh(&seq->lock);
not_found:
*destnode = 0;
- read_unlock_bh(&nametbl_lock);
+ read_unlock_bh(&tipc_nametbl_lock);
return 0;
}
/**
- * nametbl_mc_translate - find multicast destinations
+ * tipc_nametbl_mc_translate - find multicast destinations
*
* Creates list of all local ports that overlap the given multicast address;
* also determines if any off-node ports overlap.
* Returns non-zero if any off-node ports overlap
*/
-int nametbl_mc_translate(u32 type, u32 lower, u32 upper, u32 limit,
- struct port_list *dports)
+int tipc_nametbl_mc_translate(u32 type, u32 lower, u32 upper, u32 limit,
+ struct port_list *dports)
{
struct name_seq *seq;
struct sub_seq *sseq;
struct sub_seq *sseq_stop;
int res = 0;
- read_lock_bh(&nametbl_lock);
+ read_lock_bh(&tipc_nametbl_lock);
seq = nametbl_find_seq(type);
if (!seq)
goto exit;
if (publ && (publ->scope <= limit))
do {
if (publ->node == tipc_own_addr)
- port_list_add(dports, publ->ref);
+ tipc_port_list_add(dports, publ->ref);
else
res = 1;
publ = publ->cluster_list_next;
spin_unlock_bh(&seq->lock);
exit:
- read_unlock_bh(&nametbl_lock);
+ read_unlock_bh(&tipc_nametbl_lock);
return res;
}
/**
- * nametbl_publish_rsv - publish port name using a reserved name type
+ * tipc_nametbl_publish_rsv - publish port name using a reserved name type
*/
-int nametbl_publish_rsv(u32 ref, unsigned int scope,
+int tipc_nametbl_publish_rsv(u32 ref, unsigned int scope,
struct tipc_name_seq const *seq)
{
int res;
}
/**
- * nametbl_publish - add name publication to network name tables
+ * tipc_nametbl_publish - add name publication to network name tables
*/
-struct publication *nametbl_publish(u32 type, u32 lower, u32 upper,
+struct publication *tipc_nametbl_publish(u32 type, u32 lower, u32 upper,
u32 scope, u32 port_ref, u32 key)
{
struct publication *publ;
return 0;
}
- write_lock_bh(&nametbl_lock);
+ write_lock_bh(&tipc_nametbl_lock);
table.local_publ_count++;
- publ = nametbl_insert_publ(type, lower, upper, scope,
+ publ = tipc_nametbl_insert_publ(type, lower, upper, scope,
tipc_own_addr, port_ref, key);
if (publ && (scope != TIPC_NODE_SCOPE)) {
- named_publish(publ);
+ tipc_named_publish(publ);
}
- write_unlock_bh(&nametbl_lock);
+ write_unlock_bh(&tipc_nametbl_lock);
return publ;
}
/**
- * nametbl_withdraw - withdraw name publication from network name tables
+ * tipc_nametbl_withdraw - withdraw name publication from network name tables
*/
-int nametbl_withdraw(u32 type, u32 lower, u32 ref, u32 key)
+int tipc_nametbl_withdraw(u32 type, u32 lower, u32 ref, u32 key)
{
struct publication *publ;
- dbg("nametbl_withdraw:<%d,%d,%d>\n", type, lower, key);
- write_lock_bh(&nametbl_lock);
- publ = nametbl_remove_publ(type, lower, tipc_own_addr, ref, key);
+ dbg("tipc_nametbl_withdraw:<%d,%d,%d>\n", type, lower, key);
+ write_lock_bh(&tipc_nametbl_lock);
+ publ = tipc_nametbl_remove_publ(type, lower, tipc_own_addr, ref, key);
if (publ) {
table.local_publ_count--;
if (publ->scope != TIPC_NODE_SCOPE)
- named_withdraw(publ);
- write_unlock_bh(&nametbl_lock);
+ tipc_named_withdraw(publ);
+ write_unlock_bh(&tipc_nametbl_lock);
list_del_init(&publ->pport_list);
kfree(publ);
return 1;
}
- write_unlock_bh(&nametbl_lock);
+ write_unlock_bh(&tipc_nametbl_lock);
return 0;
}
/**
- * nametbl_subscribe - add a subscription object to the name table
+ * tipc_nametbl_subscribe - add a subscription object to the name table
*/
void
-nametbl_subscribe(struct subscription *s)
+tipc_nametbl_subscribe(struct subscription *s)
{
u32 type = s->seq.type;
struct name_seq *seq;
- write_lock_bh(&nametbl_lock);
+ write_lock_bh(&tipc_nametbl_lock);
seq = nametbl_find_seq(type);
if (!seq) {
- seq = nameseq_create(type, &table.types[hash(type)]);
+ seq = tipc_nameseq_create(type, &table.types[hash(type)]);
}
if (seq){
spin_lock_bh(&seq->lock);
- dbg("nametbl_subscribe:found %x for <%u,%u,%u>\n",
+ dbg("tipc_nametbl_subscribe:found %x for <%u,%u,%u>\n",
seq, type, s->seq.lower, s->seq.upper);
assert(seq->type == type);
- nameseq_subscribe(seq, s);
+ tipc_nameseq_subscribe(seq, s);
spin_unlock_bh(&seq->lock);
}
- write_unlock_bh(&nametbl_lock);
+ write_unlock_bh(&tipc_nametbl_lock);
}
/**
- * nametbl_unsubscribe - remove a subscription object from name table
+ * tipc_nametbl_unsubscribe - remove a subscription object from name table
*/
void
-nametbl_unsubscribe(struct subscription *s)
+tipc_nametbl_unsubscribe(struct subscription *s)
{
struct name_seq *seq;
- write_lock_bh(&nametbl_lock);
+ write_lock_bh(&tipc_nametbl_lock);
seq = nametbl_find_seq(s->seq.type);
if (seq != NULL){
spin_lock_bh(&seq->lock);
kfree(seq);
}
}
- write_unlock_bh(&nametbl_lock);
+ write_unlock_bh(&tipc_nametbl_lock);
}
}
}
-void nametbl_print(struct print_buf *buf, const char *str)
+void tipc_nametbl_print(struct print_buf *buf, const char *str)
{
tipc_printf(buf, str);
- read_lock_bh(&nametbl_lock);
+ read_lock_bh(&tipc_nametbl_lock);
nametbl_list(buf, 0, 0, 0, 0);
- read_unlock_bh(&nametbl_lock);
+ read_unlock_bh(&tipc_nametbl_lock);
}
#define MAX_NAME_TBL_QUERY 32768
-struct sk_buff *nametbl_get(const void *req_tlv_area, int req_tlv_space)
+struct sk_buff *tipc_nametbl_get(const void *req_tlv_area, int req_tlv_space)
{
struct sk_buff *buf;
struct tipc_name_table_query *argv;
int str_len;
if (!TLV_CHECK(req_tlv_area, req_tlv_space, TIPC_TLV_NAME_TBL_QUERY))
- return cfg_reply_error_string(TIPC_CFG_TLV_ERROR);
+ return tipc_cfg_reply_error_string(TIPC_CFG_TLV_ERROR);
- buf = cfg_reply_alloc(TLV_SPACE(MAX_NAME_TBL_QUERY));
+ buf = tipc_cfg_reply_alloc(TLV_SPACE(MAX_NAME_TBL_QUERY));
if (!buf)
return NULL;
rep_tlv = (struct tlv_desc *)buf->data;
- printbuf_init(&b, TLV_DATA(rep_tlv), MAX_NAME_TBL_QUERY);
+ tipc_printbuf_init(&b, TLV_DATA(rep_tlv), MAX_NAME_TBL_QUERY);
argv = (struct tipc_name_table_query *)TLV_DATA(req_tlv_area);
- read_lock_bh(&nametbl_lock);
+ read_lock_bh(&tipc_nametbl_lock);
nametbl_list(&b, ntohl(argv->depth), ntohl(argv->type),
ntohl(argv->lowbound), ntohl(argv->upbound));
- read_unlock_bh(&nametbl_lock);
- str_len = printbuf_validate(&b);
+ read_unlock_bh(&tipc_nametbl_lock);
+ str_len = tipc_printbuf_validate(&b);
skb_put(buf, TLV_SPACE(str_len));
TLV_SET(rep_tlv, TIPC_TLV_ULTRA_STRING, NULL, str_len);
return buf;
}
-void nametbl_dump(void)
+void tipc_nametbl_dump(void)
{
- nametbl_list(CONS, 0, 0, 0, 0);
+ nametbl_list(TIPC_CONS, 0, 0, 0, 0);
}
-int nametbl_init(void)
+int tipc_nametbl_init(void)
{
int array_size = sizeof(struct hlist_head) * tipc_nametbl_size;
if (!table.types)
return -ENOMEM;
- write_lock_bh(&nametbl_lock);
+ write_lock_bh(&tipc_nametbl_lock);
memset(table.types, 0, array_size);
table.local_publ_count = 0;
- write_unlock_bh(&nametbl_lock);
+ write_unlock_bh(&tipc_nametbl_lock);
return 0;
}
-void nametbl_stop(void)
+void tipc_nametbl_stop(void)
{
struct hlist_head *seq_head;
struct hlist_node *seq_node;
if (!table.types)
return;
- write_lock_bh(&nametbl_lock);
+ write_lock_bh(&tipc_nametbl_lock);
for (i = 0; i < tipc_nametbl_size; i++) {
seq_head = &table.types[i];
hlist_for_each_entry_safe(seq, seq_node, tmp, seq_head, ns_list) {
}
kfree(table.types);
table.types = NULL;
- write_unlock_bh(&nametbl_lock);
+ write_unlock_bh(&tipc_nametbl_lock);
}
};
-extern rwlock_t nametbl_lock;
+extern rwlock_t tipc_nametbl_lock;
-struct sk_buff *nametbl_get(const void *req_tlv_area, int req_tlv_space);
-u32 nametbl_translate(u32 type, u32 instance, u32 *node);
-int nametbl_mc_translate(u32 type, u32 lower, u32 upper, u32 limit,
+struct sk_buff *tipc_nametbl_get(const void *req_tlv_area, int req_tlv_space);
+u32 tipc_nametbl_translate(u32 type, u32 instance, u32 *node);
+int tipc_nametbl_mc_translate(u32 type, u32 lower, u32 upper, u32 limit,
struct port_list *dports);
-int nametbl_publish_rsv(u32 ref, unsigned int scope,
+int tipc_nametbl_publish_rsv(u32 ref, unsigned int scope,
struct tipc_name_seq const *seq);
-struct publication *nametbl_publish(u32 type, u32 lower, u32 upper,
+struct publication *tipc_nametbl_publish(u32 type, u32 lower, u32 upper,
u32 scope, u32 port_ref, u32 key);
-int nametbl_withdraw(u32 type, u32 lower, u32 ref, u32 key);
-struct publication *nametbl_insert_publ(u32 type, u32 lower, u32 upper,
+int tipc_nametbl_withdraw(u32 type, u32 lower, u32 ref, u32 key);
+struct publication *tipc_nametbl_insert_publ(u32 type, u32 lower, u32 upper,
u32 scope, u32 node, u32 ref, u32 key);
-struct publication *nametbl_remove_publ(u32 type, u32 lower,
+struct publication *tipc_nametbl_remove_publ(u32 type, u32 lower,
u32 node, u32 ref, u32 key);
-void nametbl_subscribe(struct subscription *s);
-void nametbl_unsubscribe(struct subscription *s);
-int nametbl_init(void);
-void nametbl_stop(void);
+void tipc_nametbl_subscribe(struct subscription *s);
+void tipc_nametbl_unsubscribe(struct subscription *s);
+int tipc_nametbl_init(void);
+void tipc_nametbl_stop(void);
#endif
* 1: The routing hierarchy.
* Comprises the structures 'zone', 'cluster', 'node', 'link'
* and 'bearer'. The whole hierarchy is protected by a big
- * read/write lock, net_lock, to enssure that nothing is added
+ * read/write lock, tipc_net_lock, to enssure that nothing is added
* or removed while code is accessing any of these structures.
* This layer must not be called from the two others while they
* hold any of their own locks.
* Neither must it itself do any upcalls to the other two before
- * it has released net_lock and other protective locks.
+ * it has released tipc_net_lock and other protective locks.
*
- * Within the net_lock domain there are two sub-domains;'node' and
+ * Within the tipc_net_lock domain there are two sub-domains;'node' and
* 'bearer', where local write operations are permitted,
* provided that those are protected by individual spin_locks
- * per instance. Code holding net_lock(read) and a node spin_lock
+ * per instance. Code holding tipc_net_lock(read) and a node spin_lock
* is permitted to poke around in both the node itself and its
* subordinate links. I.e, it can update link counters and queues,
* change link state, send protocol messages, and alter the
* "active_links" array in the node; but it can _not_ remove a link
* or a node from the overall structure.
* Correspondingly, individual bearers may change status within a
- * net_lock(read), protected by an individual spin_lock ber bearer
- * instance, but it needs net_lock(write) to remove/add any bearers.
+ * tipc_net_lock(read), protected by an individual spin_lock ber bearer
+ * instance, but it needs tipc_net_lock(write) to remove/add any bearers.
*
*
* 2: The transport level of the protocol.
* (Nobody is using read-only access to this, so it can just as
* well be changed to a spin_lock)
* - A spin lock to protect the registry of kernel/driver users (reg.c)
- * - A global spin_lock (port_lock), which only task is to ensure
+ * - A global spin_lock (tipc_port_lock), which only task is to ensure
* consistency where more than one port is involved in an operation,
* i.e., whe a port is part of a linked list of ports.
* There are two such lists; 'port_list', which is used for management,
* and 'wait_list', which is used to queue ports during congestion.
*
* 3: The name table (name_table.c, name_distr.c, subscription.c)
- * - There is one big read/write-lock (nametbl_lock) protecting the
+ * - There is one big read/write-lock (tipc_nametbl_lock) protecting the
* overall name table structure. Nothing must be added/removed to
* this structure without holding write access to it.
* - There is one local spin_lock per sub_sequence, which can be seen
- * as a sub-domain to the nametbl_lock domain. It is used only
+ * as a sub-domain to the tipc_nametbl_lock domain. It is used only
* for translation operations, and is needed because a translation
* steps the root of the 'publication' linked list between each lookup.
- * This is always used within the scope of a nametbl_lock(read).
+ * This is always used within the scope of a tipc_nametbl_lock(read).
* - A local spin_lock protecting the queue of subscriber events.
*/
-rwlock_t net_lock = RW_LOCK_UNLOCKED;
-struct network net = { 0 };
+rwlock_t tipc_net_lock = RW_LOCK_UNLOCKED;
+struct network tipc_net = { 0 };
-struct node *net_select_remote_node(u32 addr, u32 ref)
+struct node *tipc_net_select_remote_node(u32 addr, u32 ref)
{
- return zone_select_remote_node(net.zones[tipc_zone(addr)], addr, ref);
+ return tipc_zone_select_remote_node(tipc_net.zones[tipc_zone(addr)], addr, ref);
}
-u32 net_select_router(u32 addr, u32 ref)
+u32 tipc_net_select_router(u32 addr, u32 ref)
{
- return zone_select_router(net.zones[tipc_zone(addr)], addr, ref);
+ return tipc_zone_select_router(tipc_net.zones[tipc_zone(addr)], addr, ref);
}
-u32 net_next_node(u32 a)
+u32 tipc_net_next_node(u32 a)
{
- if (net.zones[tipc_zone(a)])
- return zone_next_node(a);
+ if (tipc_net.zones[tipc_zone(a)])
+ return tipc_zone_next_node(a);
return 0;
}
-void net_remove_as_router(u32 router)
+void tipc_net_remove_as_router(u32 router)
{
u32 z_num;
for (z_num = 1; z_num <= tipc_max_zones; z_num++) {
- if (!net.zones[z_num])
+ if (!tipc_net.zones[z_num])
continue;
- zone_remove_as_router(net.zones[z_num], router);
+ tipc_zone_remove_as_router(tipc_net.zones[z_num], router);
}
}
-void net_send_external_routes(u32 dest)
+void tipc_net_send_external_routes(u32 dest)
{
u32 z_num;
for (z_num = 1; z_num <= tipc_max_zones; z_num++) {
- if (net.zones[z_num])
- zone_send_external_routes(net.zones[z_num], dest);
+ if (tipc_net.zones[z_num])
+ tipc_zone_send_external_routes(tipc_net.zones[z_num], dest);
}
}
-int net_init(void)
+static int net_init(void)
{
u32 sz = sizeof(struct _zone *) * (tipc_max_zones + 1);
- memset(&net, 0, sizeof(net));
- net.zones = (struct _zone **)kmalloc(sz, GFP_ATOMIC);
- if (!net.zones) {
+ memset(&tipc_net, 0, sizeof(tipc_net));
+ tipc_net.zones = (struct _zone **)kmalloc(sz, GFP_ATOMIC);
+ if (!tipc_net.zones) {
return -ENOMEM;
}
- memset(net.zones, 0, sz);
+ memset(tipc_net.zones, 0, sz);
return TIPC_OK;
}
-void net_stop(void)
+static void net_stop(void)
{
u32 z_num;
- if (!net.zones)
+ if (!tipc_net.zones)
return;
for (z_num = 1; z_num <= tipc_max_zones; z_num++) {
- zone_delete(net.zones[z_num]);
+ tipc_zone_delete(tipc_net.zones[z_num]);
}
- kfree(net.zones);
- net.zones = 0;
+ kfree(tipc_net.zones);
+ tipc_net.zones = 0;
}
static void net_route_named_msg(struct sk_buff *buf)
u32 dport;
if (!msg_named(msg)) {
- msg_dbg(msg, "net->drop_nam:");
+ msg_dbg(msg, "tipc_net->drop_nam:");
buf_discard(buf);
return;
}
dnode = addr_domain(msg_lookup_scope(msg));
- dport = nametbl_translate(msg_nametype(msg), msg_nameinst(msg), &dnode);
- dbg("net->lookup<%u,%u>-><%u,%x>\n",
+ dport = tipc_nametbl_translate(msg_nametype(msg), msg_nameinst(msg), &dnode);
+ dbg("tipc_net->lookup<%u,%u>-><%u,%x>\n",
msg_nametype(msg), msg_nameinst(msg), dport, dnode);
if (dport) {
msg_set_destnode(msg, dnode);
msg_set_destport(msg, dport);
- net_route_msg(buf);
+ tipc_net_route_msg(buf);
return;
}
- msg_dbg(msg, "net->rej:NO NAME: ");
+ msg_dbg(msg, "tipc_net->rej:NO NAME: ");
tipc_reject_msg(buf, TIPC_ERR_NO_NAME);
}
-void net_route_msg(struct sk_buff *buf)
+void tipc_net_route_msg(struct sk_buff *buf)
{
struct tipc_msg *msg;
u32 dnode;
return;
}
- msg_dbg(msg, "net->rout: ");
+ msg_dbg(msg, "tipc_net->rout: ");
/* Handle message for this node */
dnode = msg_short(msg) ? tipc_own_addr : msg_destnode(msg);
if (in_scope(dnode, tipc_own_addr)) {
if (msg_isdata(msg)) {
if (msg_mcast(msg))
- port_recv_mcast(buf, NULL);
+ tipc_port_recv_mcast(buf, NULL);
else if (msg_destport(msg))
- port_recv_msg(buf);
+ tipc_port_recv_msg(buf);
else
net_route_named_msg(buf);
return;
}
switch (msg_user(msg)) {
case ROUTE_DISTRIBUTOR:
- cluster_recv_routing_table(buf);
+ tipc_cltr_recv_routing_table(buf);
break;
case NAME_DISTRIBUTOR:
- named_recv(buf);
+ tipc_named_recv(buf);
break;
case CONN_MANAGER:
- port_recv_proto_msg(buf);
+ tipc_port_recv_proto_msg(buf);
break;
default:
msg_dbg(msg,"DROP/NET/<REC<");
/* Handle message for another node */
msg_dbg(msg, "NET>SEND>: ");
- link_send(buf, dnode, msg_link_selector(msg));
+ tipc_link_send(buf, dnode, msg_link_selector(msg));
}
-int tipc_start_net(void)
+int tipc_net_start(void)
{
char addr_string[16];
int res;
return -ENOPROTOOPT;
tipc_mode = TIPC_NET_MODE;
- named_reinit();
- port_reinit();
+ tipc_named_reinit();
+ tipc_port_reinit();
- if ((res = bearer_init()) ||
+ if ((res = tipc_bearer_init()) ||
(res = net_init()) ||
- (res = cluster_init()) ||
- (res = bclink_init())) {
+ (res = tipc_cltr_init()) ||
+ (res = tipc_bclink_init())) {
return res;
}
- subscr_stop();
- cfg_stop();
- k_signal((Handler)subscr_start, 0);
- k_signal((Handler)cfg_init, 0);
+ tipc_subscr_stop();
+ tipc_cfg_stop();
+ tipc_k_signal((Handler)tipc_subscr_start, 0);
+ tipc_k_signal((Handler)tipc_cfg_init, 0);
info("Started in network mode\n");
info("Own node address %s, network identity %u\n",
addr_string_fill(addr_string, tipc_own_addr), tipc_net_id);
return TIPC_OK;
}
-void tipc_stop_net(void)
+void tipc_net_stop(void)
{
if (tipc_mode != TIPC_NET_MODE)
return;
- write_lock_bh(&net_lock);
- bearer_stop();
+ write_lock_bh(&tipc_net_lock);
+ tipc_bearer_stop();
tipc_mode = TIPC_NODE_MODE;
- bclink_stop();
+ tipc_bclink_stop();
net_stop();
- write_unlock_bh(&net_lock);
+ write_unlock_bh(&tipc_net_lock);
info("Left network mode \n");
}
};
-extern struct network net;
-extern rwlock_t net_lock;
+extern struct network tipc_net;
+extern rwlock_t tipc_net_lock;
-int net_init(void);
-void net_stop(void);
-void net_remove_as_router(u32 router);
-void net_send_external_routes(u32 dest);
-void net_route_msg(struct sk_buff *buf);
-struct node *net_select_remote_node(u32 addr, u32 ref);
-u32 net_select_router(u32 addr, u32 ref);
+void tipc_net_remove_as_router(u32 router);
+void tipc_net_send_external_routes(u32 dest);
+void tipc_net_route_msg(struct sk_buff *buf);
+struct node *tipc_net_select_remote_node(u32 addr, u32 ref);
+u32 tipc_net_select_router(u32 addr, u32 ref);
-int tipc_start_net(void);
-void tipc_stop_net(void);
+int tipc_net_start(void);
+void tipc_net_stop(void);
#endif
int hdr_space = NLMSG_SPACE(GENL_HDRLEN + TIPC_GENL_HDRLEN);
if ((req_userhdr->cmd & 0xC000) && (!capable(CAP_NET_ADMIN)))
- rep_buf = cfg_reply_error_string(TIPC_CFG_NOT_NET_ADMIN);
+ rep_buf = tipc_cfg_reply_error_string(TIPC_CFG_NOT_NET_ADMIN);
else
- rep_buf = cfg_do_cmd(req_userhdr->dest,
- req_userhdr->cmd,
- NLMSG_DATA(req_nlh) + GENL_HDRLEN + TIPC_GENL_HDRLEN,
- NLMSG_PAYLOAD(req_nlh, GENL_HDRLEN + TIPC_GENL_HDRLEN),
- hdr_space);
+ rep_buf = tipc_cfg_do_cmd(req_userhdr->dest,
+ req_userhdr->cmd,
+ NLMSG_DATA(req_nlh) + GENL_HDRLEN + TIPC_GENL_HDRLEN,
+ NLMSG_PAYLOAD(req_nlh, GENL_HDRLEN + TIPC_GENL_HDRLEN),
+ hdr_space);
if (rep_buf) {
skb_push(rep_buf, hdr_space);
static int family_registered = 0;
-int netlink_start(void)
+int tipc_netlink_start(void)
{
return -EFAULT;
}
-void netlink_stop(void)
+void tipc_netlink_stop(void)
{
if (family_registered) {
genl_unregister_family(&family);
#include "port.h"
#include "bearer.h"
#include "name_distr.h"
-#include "net.h"
void node_print(struct print_buf *buf, struct node *n_ptr, char *str);
static void node_lost_contact(struct node *n_ptr);
static void node_established_contact(struct node *n_ptr);
-struct node *nodes = NULL; /* sorted list of nodes within cluster */
+struct node *tipc_nodes = NULL; /* sorted list of nodes within cluster */
u32 tipc_own_tag = 0;
-struct node *node_create(u32 addr)
+struct node *tipc_node_create(u32 addr)
{
struct cluster *c_ptr;
struct node *n_ptr;
n_ptr->lock = SPIN_LOCK_UNLOCKED;
INIT_LIST_HEAD(&n_ptr->nsub);
- c_ptr = cluster_find(addr);
+ c_ptr = tipc_cltr_find(addr);
if (c_ptr == NULL)
- c_ptr = cluster_create(addr);
+ c_ptr = tipc_cltr_create(addr);
if (c_ptr != NULL) {
n_ptr->owner = c_ptr;
- cluster_attach_node(c_ptr, n_ptr);
+ tipc_cltr_attach_node(c_ptr, n_ptr);
n_ptr->last_router = -1;
/* Insert node into ordered list */
- for (curr_node = &nodes; *curr_node;
+ for (curr_node = &tipc_nodes; *curr_node;
curr_node = &(*curr_node)->next) {
if (addr < (*curr_node)->addr) {
n_ptr->next = *curr_node;
return n_ptr;
}
-void node_delete(struct node *n_ptr)
+void tipc_node_delete(struct node *n_ptr)
{
if (!n_ptr)
return;
#if 0
- /* Not needed because links are already deleted via bearer_stop() */
+ /* Not needed because links are already deleted via tipc_bearer_stop() */
u32 l_num;
/**
- * node_link_up - handle addition of link
+ * tipc_node_link_up - handle addition of link
*
* Link becomes active (alone or shared) or standby, depending on its priority.
*/
-void node_link_up(struct node *n_ptr, struct link *l_ptr)
+void tipc_node_link_up(struct node *n_ptr, struct link *l_ptr)
{
struct link **active = &n_ptr->active_links[0];
info("Link is standby\n");
return;
}
- link_send_duplicate(active[0], l_ptr);
+ tipc_link_send_duplicate(active[0], l_ptr);
if (l_ptr->priority == active[0]->priority) {
active[0] = l_ptr;
return;
for (i = 0; i < MAX_BEARERS; i++) {
struct link *l_ptr = n_ptr->links[i];
- if (!l_ptr || !link_is_up(l_ptr) ||
+ if (!l_ptr || !tipc_link_is_up(l_ptr) ||
(l_ptr->priority < highest_prio))
continue;
}
/**
- * node_link_down - handle loss of link
+ * tipc_node_link_down - handle loss of link
*/
-void node_link_down(struct node *n_ptr, struct link *l_ptr)
+void tipc_node_link_down(struct node *n_ptr, struct link *l_ptr)
{
struct link **active;
- if (!link_is_active(l_ptr)) {
+ if (!tipc_link_is_active(l_ptr)) {
info("Lost standby link <%s> on network plane %c\n",
l_ptr->name, l_ptr->b_ptr->net_plane);
return;
active[1] = active[0];
if (active[0] == l_ptr)
node_select_active_links(n_ptr);
- if (node_is_up(n_ptr))
- link_changeover(l_ptr);
+ if (tipc_node_is_up(n_ptr))
+ tipc_link_changeover(l_ptr);
else
node_lost_contact(n_ptr);
}
-int node_has_active_links(struct node *n_ptr)
+int tipc_node_has_active_links(struct node *n_ptr)
{
return (n_ptr &&
((n_ptr->active_links[0]) || (n_ptr->active_links[1])));
}
-int node_has_redundant_links(struct node *n_ptr)
+int tipc_node_has_redundant_links(struct node *n_ptr)
{
- return (node_has_active_links(n_ptr) &&
+ return (tipc_node_has_active_links(n_ptr) &&
(n_ptr->active_links[0] != n_ptr->active_links[1]));
}
-int node_has_active_routes(struct node *n_ptr)
+int tipc_node_has_active_routes(struct node *n_ptr)
{
return (n_ptr && (n_ptr->last_router >= 0));
}
-int node_is_up(struct node *n_ptr)
+int tipc_node_is_up(struct node *n_ptr)
{
- return (node_has_active_links(n_ptr) || node_has_active_routes(n_ptr));
+ return (tipc_node_has_active_links(n_ptr) || tipc_node_has_active_routes(n_ptr));
}
-struct node *node_attach_link(struct link *l_ptr)
+struct node *tipc_node_attach_link(struct link *l_ptr)
{
- struct node *n_ptr = node_find(l_ptr->addr);
+ struct node *n_ptr = tipc_node_find(l_ptr->addr);
if (!n_ptr)
- n_ptr = node_create(l_ptr->addr);
+ n_ptr = tipc_node_create(l_ptr->addr);
if (n_ptr) {
u32 bearer_id = l_ptr->b_ptr->identity;
char addr_string[16];
if (!n_ptr->links[bearer_id]) {
n_ptr->links[bearer_id] = l_ptr;
- net.zones[tipc_zone(l_ptr->addr)]->links++;
+ tipc_net.zones[tipc_zone(l_ptr->addr)]->links++;
n_ptr->link_cnt++;
return n_ptr;
}
return 0;
}
-void node_detach_link(struct node *n_ptr, struct link *l_ptr)
+void tipc_node_detach_link(struct node *n_ptr, struct link *l_ptr)
{
n_ptr->links[l_ptr->b_ptr->identity] = 0;
- net.zones[tipc_zone(l_ptr->addr)]->links--;
+ tipc_net.zones[tipc_zone(l_ptr->addr)]->links--;
n_ptr->link_cnt--;
}
struct cluster *c_ptr;
dbg("node_established_contact:-> %x\n", n_ptr->addr);
- if (!node_has_active_routes(n_ptr)) {
- k_signal((Handler)named_node_up, n_ptr->addr);
+ if (!tipc_node_has_active_routes(n_ptr)) {
+ tipc_k_signal((Handler)tipc_named_node_up, n_ptr->addr);
}
/* Syncronize broadcast acks */
- n_ptr->bclink.acked = bclink_get_last_sent();
+ n_ptr->bclink.acked = tipc_bclink_get_last_sent();
if (is_slave(tipc_own_addr))
return;
if (!in_own_cluster(n_ptr->addr)) {
/* Usage case 1 (see above) */
- c_ptr = cluster_find(tipc_own_addr);
+ c_ptr = tipc_cltr_find(tipc_own_addr);
if (!c_ptr)
- c_ptr = cluster_create(tipc_own_addr);
+ c_ptr = tipc_cltr_create(tipc_own_addr);
if (c_ptr)
- cluster_bcast_new_route(c_ptr, n_ptr->addr, 1,
- tipc_max_nodes);
+ tipc_cltr_bcast_new_route(c_ptr, n_ptr->addr, 1,
+ tipc_max_nodes);
return;
}
c_ptr = n_ptr->owner;
if (is_slave(n_ptr->addr)) {
/* Usage case 2 (see above) */
- cluster_bcast_new_route(c_ptr, n_ptr->addr, 1, tipc_max_nodes);
- cluster_send_local_routes(c_ptr, n_ptr->addr);
+ tipc_cltr_bcast_new_route(c_ptr, n_ptr->addr, 1, tipc_max_nodes);
+ tipc_cltr_send_local_routes(c_ptr, n_ptr->addr);
return;
}
if (n_ptr->bclink.supported) {
- nmap_add(&cluster_bcast_nodes, n_ptr->addr);
+ tipc_nmap_add(&tipc_cltr_bcast_nodes, n_ptr->addr);
if (n_ptr->addr < tipc_own_addr)
tipc_own_tag++;
}
/* Case 3 (see above) */
- net_send_external_routes(n_ptr->addr);
- cluster_send_slave_routes(c_ptr, n_ptr->addr);
- cluster_bcast_new_route(c_ptr, n_ptr->addr, LOWEST_SLAVE,
- highest_allowed_slave);
+ tipc_net_send_external_routes(n_ptr->addr);
+ tipc_cltr_send_slave_routes(c_ptr, n_ptr->addr);
+ tipc_cltr_bcast_new_route(c_ptr, n_ptr->addr, LOWEST_SLAVE,
+ tipc_highest_allowed_slave);
}
static void node_lost_contact(struct node *n_ptr)
n_ptr->bclink.defragm = NULL;
}
if (in_own_cluster(n_ptr->addr) && n_ptr->bclink.supported) {
- bclink_acknowledge(n_ptr, mod(n_ptr->bclink.acked + 10000));
+ tipc_bclink_acknowledge(n_ptr, mod(n_ptr->bclink.acked + 10000));
}
/* Update routing tables */
if (is_slave(tipc_own_addr)) {
- net_remove_as_router(n_ptr->addr);
+ tipc_net_remove_as_router(n_ptr->addr);
} else {
if (!in_own_cluster(n_ptr->addr)) {
/* Case 4 (see above) */
- c_ptr = cluster_find(tipc_own_addr);
- cluster_bcast_lost_route(c_ptr, n_ptr->addr, 1,
- tipc_max_nodes);
+ c_ptr = tipc_cltr_find(tipc_own_addr);
+ tipc_cltr_bcast_lost_route(c_ptr, n_ptr->addr, 1,
+ tipc_max_nodes);
} else {
/* Case 5 (see above) */
- c_ptr = cluster_find(n_ptr->addr);
+ c_ptr = tipc_cltr_find(n_ptr->addr);
if (is_slave(n_ptr->addr)) {
- cluster_bcast_lost_route(c_ptr, n_ptr->addr, 1,
- tipc_max_nodes);
+ tipc_cltr_bcast_lost_route(c_ptr, n_ptr->addr, 1,
+ tipc_max_nodes);
} else {
if (n_ptr->bclink.supported) {
- nmap_remove(&cluster_bcast_nodes,
- n_ptr->addr);
+ tipc_nmap_remove(&tipc_cltr_bcast_nodes,
+ n_ptr->addr);
if (n_ptr->addr < tipc_own_addr)
tipc_own_tag--;
}
- net_remove_as_router(n_ptr->addr);
- cluster_bcast_lost_route(c_ptr, n_ptr->addr,
- LOWEST_SLAVE,
- highest_allowed_slave);
+ tipc_net_remove_as_router(n_ptr->addr);
+ tipc_cltr_bcast_lost_route(c_ptr, n_ptr->addr,
+ LOWEST_SLAVE,
+ tipc_highest_allowed_slave);
}
}
}
- if (node_has_active_routes(n_ptr))
+ if (tipc_node_has_active_routes(n_ptr))
return;
info("Lost contact with %s\n",
continue;
l_ptr->reset_checkpoint = l_ptr->next_in_no;
l_ptr->exp_msg_count = 0;
- link_reset_fragments(l_ptr);
+ tipc_link_reset_fragments(l_ptr);
}
/* Notify subscribers */
list_for_each_entry_safe(ns, tns, &n_ptr->nsub, nodesub_list) {
ns->node = 0;
list_del_init(&ns->nodesub_list);
- k_signal((Handler)ns->handle_node_down,
- (unsigned long)ns->usr_handle);
+ tipc_k_signal((Handler)ns->handle_node_down,
+ (unsigned long)ns->usr_handle);
}
}
/**
- * node_select_next_hop - find the next-hop node for a message
+ * tipc_node_select_next_hop - find the next-hop node for a message
*
* Called by when cluster local lookup has failed.
*/
-struct node *node_select_next_hop(u32 addr, u32 selector)
+struct node *tipc_node_select_next_hop(u32 addr, u32 selector)
{
struct node *n_ptr;
u32 router_addr;
- if (!addr_domain_valid(addr))
+ if (!tipc_addr_domain_valid(addr))
return 0;
/* Look for direct link to destination processsor */
- n_ptr = node_find(addr);
- if (n_ptr && node_has_active_links(n_ptr))
+ n_ptr = tipc_node_find(addr);
+ if (n_ptr && tipc_node_has_active_links(n_ptr))
return n_ptr;
/* Cluster local system nodes *must* have direct links */
return 0;
/* Look for cluster local router with direct link to node */
- router_addr = node_select_router(n_ptr, selector);
+ router_addr = tipc_node_select_router(n_ptr, selector);
if (router_addr)
- return node_select(router_addr, selector);
+ return tipc_node_select(router_addr, selector);
/* Slave nodes can only be accessed within own cluster via a
known router with direct link -- if no router was found,give up */
/* Inter zone/cluster -- find any direct link to remote cluster */
addr = tipc_addr(tipc_zone(addr), tipc_cluster(addr), 0);
- n_ptr = net_select_remote_node(addr, selector);
- if (n_ptr && node_has_active_links(n_ptr))
+ n_ptr = tipc_net_select_remote_node(addr, selector);
+ if (n_ptr && tipc_node_has_active_links(n_ptr))
return n_ptr;
/* Last resort -- look for any router to anywhere in remote zone */
- router_addr = net_select_router(addr, selector);
+ router_addr = tipc_net_select_router(addr, selector);
if (router_addr)
- return node_select(router_addr, selector);
+ return tipc_node_select(router_addr, selector);
return 0;
}
/**
- * node_select_router - select router to reach specified node
+ * tipc_node_select_router - select router to reach specified node
*
* Uses a deterministic and fair algorithm for selecting router node.
*/
-u32 node_select_router(struct node *n_ptr, u32 ref)
+u32 tipc_node_select_router(struct node *n_ptr, u32 ref)
{
u32 ulim;
u32 mask;
return tipc_addr(own_zone(), own_cluster(), r);
}
-void node_add_router(struct node *n_ptr, u32 router)
+void tipc_node_add_router(struct node *n_ptr, u32 router)
{
u32 r_num = tipc_node(router);
!n_ptr->routers[n_ptr->last_router]);
}
-void node_remove_router(struct node *n_ptr, u32 router)
+void tipc_node_remove_router(struct node *n_ptr, u32 router)
{
u32 r_num = tipc_node(router);
while ((--n_ptr->last_router >= 0) &&
!n_ptr->routers[n_ptr->last_router]);
- if (!node_is_up(n_ptr))
+ if (!tipc_node_is_up(n_ptr))
node_lost_contact(n_ptr);
}
struct node *n_ptr;
u32 cnt = 0;
- for (n_ptr = nodes; n_ptr; n_ptr = n_ptr->next) {
+ for (n_ptr = tipc_nodes; n_ptr; n_ptr = n_ptr->next) {
if (!in_scope(domain, n_ptr->addr))
continue;
- if (node_is_up(n_ptr))
+ if (tipc_node_is_up(n_ptr))
cnt++;
}
return cnt;
}
-struct sk_buff *node_get_nodes(const void *req_tlv_area, int req_tlv_space)
+struct sk_buff *tipc_node_get_nodes(const void *req_tlv_area, int req_tlv_space)
{
u32 domain;
struct sk_buff *buf;
struct tipc_node_info node_info;
if (!TLV_CHECK(req_tlv_area, req_tlv_space, TIPC_TLV_NET_ADDR))
- return cfg_reply_error_string(TIPC_CFG_TLV_ERROR);
+ return tipc_cfg_reply_error_string(TIPC_CFG_TLV_ERROR);
domain = *(u32 *)TLV_DATA(req_tlv_area);
domain = ntohl(domain);
- if (!addr_domain_valid(domain))
- return cfg_reply_error_string(TIPC_CFG_INVALID_VALUE
- " (network address)");
+ if (!tipc_addr_domain_valid(domain))
+ return tipc_cfg_reply_error_string(TIPC_CFG_INVALID_VALUE
+ " (network address)");
- if (!nodes)
- return cfg_reply_none();
+ if (!tipc_nodes)
+ return tipc_cfg_reply_none();
/* For now, get space for all other nodes
(will need to modify this when slave nodes are supported */
- buf = cfg_reply_alloc(TLV_SPACE(sizeof(node_info)) *
- (tipc_max_nodes - 1));
+ buf = tipc_cfg_reply_alloc(TLV_SPACE(sizeof(node_info)) *
+ (tipc_max_nodes - 1));
if (!buf)
return NULL;
/* Add TLVs for all nodes in scope */
- for (n_ptr = nodes; n_ptr; n_ptr = n_ptr->next) {
+ for (n_ptr = tipc_nodes; n_ptr; n_ptr = n_ptr->next) {
if (!in_scope(domain, n_ptr->addr))
continue;
node_info.addr = htonl(n_ptr->addr);
- node_info.up = htonl(node_is_up(n_ptr));
- cfg_append_tlv(buf, TIPC_TLV_NODE_INFO,
- &node_info, sizeof(node_info));
+ node_info.up = htonl(tipc_node_is_up(n_ptr));
+ tipc_cfg_append_tlv(buf, TIPC_TLV_NODE_INFO,
+ &node_info, sizeof(node_info));
}
return buf;
}
-struct sk_buff *node_get_links(const void *req_tlv_area, int req_tlv_space)
+struct sk_buff *tipc_node_get_links(const void *req_tlv_area, int req_tlv_space)
{
u32 domain;
struct sk_buff *buf;
struct tipc_link_info link_info;
if (!TLV_CHECK(req_tlv_area, req_tlv_space, TIPC_TLV_NET_ADDR))
- return cfg_reply_error_string(TIPC_CFG_TLV_ERROR);
+ return tipc_cfg_reply_error_string(TIPC_CFG_TLV_ERROR);
domain = *(u32 *)TLV_DATA(req_tlv_area);
domain = ntohl(domain);
- if (!addr_domain_valid(domain))
- return cfg_reply_error_string(TIPC_CFG_INVALID_VALUE
- " (network address)");
+ if (!tipc_addr_domain_valid(domain))
+ return tipc_cfg_reply_error_string(TIPC_CFG_INVALID_VALUE
+ " (network address)");
- if (!nodes)
- return cfg_reply_none();
+ if (!tipc_nodes)
+ return tipc_cfg_reply_none();
/* For now, get space for 2 links to all other nodes + bcast link
(will need to modify this when slave nodes are supported */
- buf = cfg_reply_alloc(TLV_SPACE(sizeof(link_info)) *
- (2 * (tipc_max_nodes - 1) + 1));
+ buf = tipc_cfg_reply_alloc(TLV_SPACE(sizeof(link_info)) *
+ (2 * (tipc_max_nodes - 1) + 1));
if (!buf)
return NULL;
link_info.dest = tipc_own_addr & 0xfffff00;
link_info.dest = htonl(link_info.dest);
link_info.up = htonl(1);
- sprintf(link_info.str, bc_link_name);
- cfg_append_tlv(buf, TIPC_TLV_LINK_INFO, &link_info, sizeof(link_info));
+ sprintf(link_info.str, tipc_bclink_name);
+ tipc_cfg_append_tlv(buf, TIPC_TLV_LINK_INFO, &link_info, sizeof(link_info));
/* Add TLVs for any other links in scope */
- for (n_ptr = nodes; n_ptr; n_ptr = n_ptr->next) {
+ for (n_ptr = tipc_nodes; n_ptr; n_ptr = n_ptr->next) {
u32 i;
if (!in_scope(domain, n_ptr->addr))
if (!n_ptr->links[i])
continue;
link_info.dest = htonl(n_ptr->addr);
- link_info.up = htonl(link_is_up(n_ptr->links[i]));
+ link_info.up = htonl(tipc_link_is_up(n_ptr->links[i]));
strcpy(link_info.str, n_ptr->links[i]->name);
- cfg_append_tlv(buf, TIPC_TLV_LINK_INFO,
- &link_info, sizeof(link_info));
+ tipc_cfg_append_tlv(buf, TIPC_TLV_LINK_INFO,
+ &link_info, sizeof(link_info));
}
}
} bclink;
};
-extern struct node *nodes;
+extern struct node *tipc_nodes;
extern u32 tipc_own_tag;
-struct node *node_create(u32 addr);
-void node_delete(struct node *n_ptr);
-struct node *node_attach_link(struct link *l_ptr);
-void node_detach_link(struct node *n_ptr, struct link *l_ptr);
-void node_link_down(struct node *n_ptr, struct link *l_ptr);
-void node_link_up(struct node *n_ptr, struct link *l_ptr);
-int node_has_active_links(struct node *n_ptr);
-int node_has_redundant_links(struct node *n_ptr);
-u32 node_select_router(struct node *n_ptr, u32 ref);
-struct node *node_select_next_hop(u32 addr, u32 selector);
-int node_is_up(struct node *n_ptr);
-void node_add_router(struct node *n_ptr, u32 router);
-void node_remove_router(struct node *n_ptr, u32 router);
-struct sk_buff *node_get_links(const void *req_tlv_area, int req_tlv_space);
-struct sk_buff *node_get_nodes(const void *req_tlv_area, int req_tlv_space);
+struct node *tipc_node_create(u32 addr);
+void tipc_node_delete(struct node *n_ptr);
+struct node *tipc_node_attach_link(struct link *l_ptr);
+void tipc_node_detach_link(struct node *n_ptr, struct link *l_ptr);
+void tipc_node_link_down(struct node *n_ptr, struct link *l_ptr);
+void tipc_node_link_up(struct node *n_ptr, struct link *l_ptr);
+int tipc_node_has_active_links(struct node *n_ptr);
+int tipc_node_has_redundant_links(struct node *n_ptr);
+u32 tipc_node_select_router(struct node *n_ptr, u32 ref);
+struct node *tipc_node_select_next_hop(u32 addr, u32 selector);
+int tipc_node_is_up(struct node *n_ptr);
+void tipc_node_add_router(struct node *n_ptr, u32 router);
+void tipc_node_remove_router(struct node *n_ptr, u32 router);
+struct sk_buff *tipc_node_get_links(const void *req_tlv_area, int req_tlv_space);
+struct sk_buff *tipc_node_get_nodes(const void *req_tlv_area, int req_tlv_space);
-static inline struct node *node_find(u32 addr)
+static inline struct node *tipc_node_find(u32 addr)
{
if (likely(in_own_cluster(addr)))
- return local_nodes[tipc_node(addr)];
- else if (addr_domain_valid(addr)) {
- struct cluster *c_ptr = cluster_find(addr);
+ return tipc_local_nodes[tipc_node(addr)];
+ else if (tipc_addr_domain_valid(addr)) {
+ struct cluster *c_ptr = tipc_cltr_find(addr);
if (c_ptr)
return c_ptr->nodes[tipc_node(addr)];
return 0;
}
-static inline struct node *node_select(u32 addr, u32 selector)
+static inline struct node *tipc_node_select(u32 addr, u32 selector)
{
if (likely(in_own_cluster(addr)))
- return local_nodes[tipc_node(addr)];
- return node_select_next_hop(addr, selector);
+ return tipc_local_nodes[tipc_node(addr)];
+ return tipc_node_select_next_hop(addr, selector);
}
-static inline void node_lock(struct node *n_ptr)
+static inline void tipc_node_lock(struct node *n_ptr)
{
spin_lock_bh(&n_ptr->lock);
}
-static inline void node_unlock(struct node *n_ptr)
+static inline void tipc_node_unlock(struct node *n_ptr)
{
spin_unlock_bh(&n_ptr->lock);
}
#include "addr.h"
/**
- * nodesub_subscribe - create "node down" subscription for specified node
+ * tipc_nodesub_subscribe - create "node down" subscription for specified node
*/
-void nodesub_subscribe(struct node_subscr *node_sub, u32 addr,
+void tipc_nodesub_subscribe(struct node_subscr *node_sub, u32 addr,
void *usr_handle, net_ev_handler handle_down)
{
node_sub->node = 0;
if (addr == tipc_own_addr)
return;
- if (!addr_node_valid(addr)) {
+ if (!tipc_addr_node_valid(addr)) {
warn("node_subscr with illegal %x\n", addr);
return;
}
node_sub->handle_node_down = handle_down;
node_sub->usr_handle = usr_handle;
- node_sub->node = node_find(addr);
+ node_sub->node = tipc_node_find(addr);
assert(node_sub->node);
- node_lock(node_sub->node);
+ tipc_node_lock(node_sub->node);
list_add_tail(&node_sub->nodesub_list, &node_sub->node->nsub);
- node_unlock(node_sub->node);
+ tipc_node_unlock(node_sub->node);
}
/**
- * nodesub_unsubscribe - cancel "node down" subscription (if any)
+ * tipc_nodesub_unsubscribe - cancel "node down" subscription (if any)
*/
-void nodesub_unsubscribe(struct node_subscr *node_sub)
+void tipc_nodesub_unsubscribe(struct node_subscr *node_sub)
{
if (!node_sub->node)
return;
- node_lock(node_sub->node);
+ tipc_node_lock(node_sub->node);
list_del_init(&node_sub->nodesub_list);
- node_unlock(node_sub->node);
+ tipc_node_unlock(node_sub->node);
}
struct list_head nodesub_list;
};
-void nodesub_subscribe(struct node_subscr *node_sub, u32 addr,
- void *usr_handle, net_ev_handler handle_down);
-void nodesub_unsubscribe(struct node_subscr *node_sub);
+void tipc_nodesub_subscribe(struct node_subscr *node_sub, u32 addr,
+ void *usr_handle, net_ev_handler handle_down);
+void tipc_nodesub_unsubscribe(struct node_subscr *node_sub);
#endif
static struct sk_buff *msg_queue_head = 0;
static struct sk_buff *msg_queue_tail = 0;
-spinlock_t port_list_lock = SPIN_LOCK_UNLOCKED;
+spinlock_t tipc_port_list_lock = SPIN_LOCK_UNLOCKED;
static spinlock_t queue_lock = SPIN_LOCK_UNLOCKED;
-LIST_HEAD(ports);
+static LIST_HEAD(ports);
static void port_handle_node_down(unsigned long ref);
static struct sk_buff* port_build_self_abort_msg(struct port *,u32 err);
static struct sk_buff* port_build_peer_abort_msg(struct port *,u32 err);
struct sk_buff *buf;
struct sk_buff *ibuf = NULL;
struct port_list dports = {0, NULL, };
- struct port *oport = port_deref(ref);
+ struct port *oport = tipc_port_deref(ref);
int ext_targets;
int res;
/* Figure out where to send multicast message */
- ext_targets = nametbl_mc_translate(seq->type, seq->lower, seq->upper,
- TIPC_NODE_SCOPE, &dports);
+ ext_targets = tipc_nametbl_mc_translate(seq->type, seq->lower, seq->upper,
+ TIPC_NODE_SCOPE, &dports);
/* Send message to destinations (duplicate it only if necessary) */
if (dports.count != 0) {
ibuf = skb_copy(buf, GFP_ATOMIC);
if (ibuf == NULL) {
- port_list_free(&dports);
+ tipc_port_list_free(&dports);
buf_discard(buf);
return -ENOMEM;
}
}
- res = bclink_send_msg(buf);
+ res = tipc_bclink_send_msg(buf);
if ((res < 0) && (dports.count != 0)) {
buf_discard(ibuf);
}
if (res >= 0) {
if (ibuf)
- port_recv_mcast(ibuf, &dports);
+ tipc_port_recv_mcast(ibuf, &dports);
} else {
- port_list_free(&dports);
+ tipc_port_list_free(&dports);
}
return res;
}
/**
- * port_recv_mcast - deliver multicast message to all destination ports
+ * tipc_port_recv_mcast - deliver multicast message to all destination ports
*
* If there is no port list, perform a lookup to create one
*/
-void port_recv_mcast(struct sk_buff *buf, struct port_list *dp)
+void tipc_port_recv_mcast(struct sk_buff *buf, struct port_list *dp)
{
struct tipc_msg* msg;
struct port_list dports = {0, NULL, };
/* Create destination port list, if one wasn't supplied */
if (dp == NULL) {
- nametbl_mc_translate(msg_nametype(msg),
+ tipc_nametbl_mc_translate(msg_nametype(msg),
msg_namelower(msg),
msg_nameupper(msg),
TIPC_CLUSTER_SCOPE,
if (dp->count != 0) {
if (dp->count == 1) {
msg_set_destport(msg, dp->ports[0]);
- port_recv_msg(buf);
- port_list_free(dp);
+ tipc_port_recv_msg(buf);
+ tipc_port_list_free(dp);
return;
}
for (; cnt < dp->count; cnt++) {
item = item->next;
}
msg_set_destport(buf_msg(b),item->ports[index]);
- port_recv_msg(b);
+ tipc_port_recv_msg(b);
}
}
exit:
buf_discard(buf);
- port_list_free(dp);
+ tipc_port_list_free(dp);
}
/**
return 0;
}
memset(p_ptr, 0, sizeof(*p_ptr));
- ref = ref_acquire(p_ptr, &p_ptr->publ.lock);
+ ref = tipc_ref_acquire(p_ptr, &p_ptr->publ.lock);
if (!ref) {
warn("Reference Table Exhausted\n");
kfree(p_ptr);
return 0;
}
- port_lock(ref);
+ tipc_port_lock(ref);
p_ptr->publ.ref = ref;
msg = &p_ptr->publ.phdr;
msg_init(msg, DATA_LOW, TIPC_NAMED_MSG, TIPC_OK, LONG_H_SIZE, 0);
p_ptr->wakeup = wakeup;
p_ptr->user_port = 0;
k_init_timer(&p_ptr->timer, (Handler)port_timeout, ref);
- spin_lock_bh(&port_list_lock);
+ spin_lock_bh(&tipc_port_list_lock);
INIT_LIST_HEAD(&p_ptr->publications);
INIT_LIST_HEAD(&p_ptr->port_list);
list_add_tail(&p_ptr->port_list, &ports);
- spin_unlock_bh(&port_list_lock);
- port_unlock(p_ptr);
+ spin_unlock_bh(&tipc_port_list_lock);
+ tipc_port_unlock(p_ptr);
return ref;
}
struct sk_buff *buf = 0;
tipc_withdraw(ref, 0, 0);
- p_ptr = port_lock(ref);
+ p_ptr = tipc_port_lock(ref);
if (!p_ptr)
return -EINVAL;
- ref_discard(ref);
- port_unlock(p_ptr);
+ tipc_ref_discard(ref);
+ tipc_port_unlock(p_ptr);
k_cancel_timer(&p_ptr->timer);
if (p_ptr->publ.connected) {
buf = port_build_peer_abort_msg(p_ptr, TIPC_ERR_NO_PORT);
- nodesub_unsubscribe(&p_ptr->subscription);
+ tipc_nodesub_unsubscribe(&p_ptr->subscription);
}
if (p_ptr->user_port) {
- reg_remove_port(p_ptr->user_port);
+ tipc_reg_remove_port(p_ptr->user_port);
kfree(p_ptr->user_port);
}
- spin_lock_bh(&port_list_lock);
+ spin_lock_bh(&tipc_port_list_lock);
list_del(&p_ptr->port_list);
list_del(&p_ptr->wait_list);
- spin_unlock_bh(&port_list_lock);
+ spin_unlock_bh(&tipc_port_list_lock);
k_term_timer(&p_ptr->timer);
kfree(p_ptr);
dbg("Deleted port %u\n", ref);
- net_route_msg(buf);
+ tipc_net_route_msg(buf);
return TIPC_OK;
}
struct tipc_port *tipc_get_port(const u32 ref)
{
- return (struct tipc_port *)ref_deref(ref);
+ return (struct tipc_port *)tipc_ref_deref(ref);
}
/**
struct port *p_ptr;
void * handle;
- p_ptr = port_lock(ref);
+ p_ptr = tipc_port_lock(ref);
if (!p_ptr)
return 0;
handle = p_ptr->publ.usr_handle;
- port_unlock(p_ptr);
+ tipc_port_unlock(p_ptr);
return handle;
}
{
struct port *p_ptr;
- p_ptr = port_lock(ref);
+ p_ptr = tipc_port_lock(ref);
if (!p_ptr)
return -EINVAL;
*isunreliable = port_unreliable(p_ptr);
{
struct port *p_ptr;
- p_ptr = port_lock(ref);
+ p_ptr = tipc_port_lock(ref);
if (!p_ptr)
return -EINVAL;
msg_set_src_droppable(&p_ptr->publ.phdr, (isunreliable != 0));
- port_unlock(p_ptr);
+ tipc_port_unlock(p_ptr);
return TIPC_OK;
}
{
struct port *p_ptr;
- p_ptr = port_lock(ref);
+ p_ptr = tipc_port_lock(ref);
if (!p_ptr)
return -EINVAL;
*isunrejectable = port_unreturnable(p_ptr);
{
struct port *p_ptr;
- p_ptr = port_lock(ref);
+ p_ptr = tipc_port_lock(ref);
if (!p_ptr)
return -EINVAL;
msg_set_dest_droppable(&p_ptr->publ.phdr, (isunrejectable != 0));
- port_unlock(p_ptr);
+ tipc_port_unlock(p_ptr);
return TIPC_OK;
}
/* send self-abort message when rejecting on a connected port */
if (msg_connected(msg)) {
struct sk_buff *abuf = 0;
- struct port *p_ptr = port_lock(msg_destport(msg));
+ struct port *p_ptr = tipc_port_lock(msg_destport(msg));
if (p_ptr) {
if (p_ptr->publ.connected)
abuf = port_build_self_abort_msg(p_ptr, err);
- port_unlock(p_ptr);
+ tipc_port_unlock(p_ptr);
}
- net_route_msg(abuf);
+ tipc_net_route_msg(abuf);
}
/* send rejected message */
buf_discard(buf);
- net_route_msg(rbuf);
+ tipc_net_route_msg(rbuf);
return data_sz;
}
-int port_reject_sections(struct port *p_ptr, struct tipc_msg *hdr,
- struct iovec const *msg_sect, u32 num_sect,
- int err)
+int tipc_port_reject_sections(struct port *p_ptr, struct tipc_msg *hdr,
+ struct iovec const *msg_sect, u32 num_sect,
+ int err)
{
struct sk_buff *buf;
int res;
static void port_timeout(unsigned long ref)
{
- struct port *p_ptr = port_lock(ref);
+ struct port *p_ptr = tipc_port_lock(ref);
struct sk_buff *buf = 0;
if (!p_ptr || !p_ptr->publ.connected)
p_ptr->probing_state = PROBING;
k_start_timer(&p_ptr->timer, p_ptr->probing_interval);
}
- port_unlock(p_ptr);
- net_route_msg(buf);
+ tipc_port_unlock(p_ptr);
+ tipc_net_route_msg(buf);
}
static void port_handle_node_down(unsigned long ref)
{
- struct port *p_ptr = port_lock(ref);
+ struct port *p_ptr = tipc_port_lock(ref);
struct sk_buff* buf = 0;
if (!p_ptr)
return;
buf = port_build_self_abort_msg(p_ptr, TIPC_ERR_NO_NODE);
- port_unlock(p_ptr);
- net_route_msg(buf);
+ tipc_port_unlock(p_ptr);
+ tipc_net_route_msg(buf);
}
0);
}
-void port_recv_proto_msg(struct sk_buff *buf)
+void tipc_port_recv_proto_msg(struct sk_buff *buf)
{
struct tipc_msg *msg = buf_msg(buf);
- struct port *p_ptr = port_lock(msg_destport(msg));
+ struct port *p_ptr = tipc_port_lock(msg_destport(msg));
u32 err = TIPC_OK;
struct sk_buff *r_buf = 0;
struct sk_buff *abort_buf = 0;
}
}
if (msg_type(msg) == CONN_ACK) {
- int wakeup = port_congested(p_ptr) &&
+ int wakeup = tipc_port_congested(p_ptr) &&
p_ptr->publ.congested &&
p_ptr->wakeup;
p_ptr->acked += msg_msgcnt(msg);
- if (port_congested(p_ptr))
+ if (tipc_port_congested(p_ptr))
goto exit;
p_ptr->publ.congested = 0;
if (!wakeup)
port_incr_out_seqno(p_ptr);
exit:
if (p_ptr)
- port_unlock(p_ptr);
- net_route_msg(r_buf);
- net_route_msg(abort_buf);
+ tipc_port_unlock(p_ptr);
+ tipc_net_route_msg(r_buf);
+ tipc_net_route_msg(abort_buf);
buf_discard(buf);
}
#define MAX_PORT_QUERY 32768
-struct sk_buff *port_get_ports(void)
+struct sk_buff *tipc_port_get_ports(void)
{
struct sk_buff *buf;
struct tlv_desc *rep_tlv;
struct port *p_ptr;
int str_len;
- buf = cfg_reply_alloc(TLV_SPACE(MAX_PORT_QUERY));
+ buf = tipc_cfg_reply_alloc(TLV_SPACE(MAX_PORT_QUERY));
if (!buf)
return NULL;
rep_tlv = (struct tlv_desc *)buf->data;
- printbuf_init(&pb, TLV_DATA(rep_tlv), MAX_PORT_QUERY);
- spin_lock_bh(&port_list_lock);
+ tipc_printbuf_init(&pb, TLV_DATA(rep_tlv), MAX_PORT_QUERY);
+ spin_lock_bh(&tipc_port_list_lock);
list_for_each_entry(p_ptr, &ports, port_list) {
spin_lock_bh(p_ptr->publ.lock);
port_print(p_ptr, &pb, 0);
spin_unlock_bh(p_ptr->publ.lock);
}
- spin_unlock_bh(&port_list_lock);
- str_len = printbuf_validate(&pb);
+ spin_unlock_bh(&tipc_port_list_lock);
+ str_len = tipc_printbuf_validate(&pb);
skb_put(buf, TLV_SPACE(str_len));
TLV_SET(rep_tlv, TIPC_TLV_ULTRA_STRING, NULL, str_len);
ref = *(u32 *)TLV_DATA(req_tlv_area);
ref = ntohl(ref);
- p_ptr = port_lock(ref);
+ p_ptr = tipc_port_lock(ref);
if (!p_ptr)
return cfg_reply_error_string("port not found");
- buf = cfg_reply_alloc(TLV_SPACE(MAX_PORT_STATS));
+ buf = tipc_cfg_reply_alloc(TLV_SPACE(MAX_PORT_STATS));
if (!buf) {
- port_unlock(p_ptr);
+ tipc_port_unlock(p_ptr);
return NULL;
}
rep_tlv = (struct tlv_desc *)buf->data;
- printbuf_init(&pb, TLV_DATA(rep_tlv), MAX_PORT_STATS);
+ tipc_printbuf_init(&pb, TLV_DATA(rep_tlv), MAX_PORT_STATS);
port_print(p_ptr, &pb, 1);
/* NEED TO FILL IN ADDITIONAL PORT STATISTICS HERE */
- port_unlock(p_ptr);
- str_len = printbuf_validate(&pb);
+ tipc_port_unlock(p_ptr);
+ str_len = tipc_printbuf_validate(&pb);
skb_put(buf, TLV_SPACE(str_len));
TLV_SET(rep_tlv, TIPC_TLV_ULTRA_STRING, NULL, str_len);
#endif
-void port_reinit(void)
+void tipc_port_reinit(void)
{
struct port *p_ptr;
struct tipc_msg *msg;
- spin_lock_bh(&port_list_lock);
+ spin_lock_bh(&tipc_port_list_lock);
list_for_each_entry(p_ptr, &ports, port_list) {
msg = &p_ptr->publ.phdr;
if (msg_orignode(msg) == tipc_own_addr)
break;
msg_set_orignode(msg, tipc_own_addr);
}
- spin_unlock_bh(&port_list_lock);
+ spin_unlock_bh(&tipc_port_list_lock);
}
struct tipc_msg *msg = buf_msg(buf);
u32 dref = msg_destport(msg);
- p_ptr = port_lock(dref);
+ p_ptr = tipc_port_lock(dref);
if (!p_ptr) {
/* Port deleted while msg in queue */
tipc_reject_msg(buf, TIPC_ERR_NO_PORT);
msg_queue_tail = buf;
} else {
msg_queue_tail = msg_queue_head = buf;
- k_signal((Handler)port_dispatcher_sigh, 0);
+ tipc_k_signal((Handler)port_dispatcher_sigh, 0);
}
spin_unlock_bh(&queue_lock);
return TIPC_OK;
tipc_continue_event cb = 0;
void *uh = 0;
- p_ptr = port_lock(ref);
+ p_ptr = tipc_port_lock(ref);
if (p_ptr) {
up_ptr = p_ptr->user_port;
if (up_ptr) {
cb = up_ptr->continue_event_cb;
uh = up_ptr->usr_handle;
}
- port_unlock(p_ptr);
+ tipc_port_unlock(p_ptr);
}
if (cb)
cb(uh, ref);
static void port_wakeup(struct tipc_port *p_ptr)
{
- k_signal((Handler)port_wakeup_sh, p_ptr->ref);
+ tipc_k_signal((Handler)port_wakeup_sh, p_ptr->ref);
}
void tipc_acknowledge(u32 ref, u32 ack)
struct port *p_ptr;
struct sk_buff *buf = 0;
- p_ptr = port_lock(ref);
+ p_ptr = tipc_port_lock(ref);
if (!p_ptr)
return;
if (p_ptr->publ.connected) {
port_out_seqno(p_ptr),
ack);
}
- port_unlock(p_ptr);
- net_route_msg(buf);
+ tipc_port_unlock(p_ptr);
+ tipc_net_route_msg(buf);
}
/*
return -ENOMEM;
}
ref = tipc_createport_raw(0, port_dispatcher, port_wakeup, importance);
- p_ptr = port_lock(ref);
+ p_ptr = tipc_port_lock(ref);
if (!p_ptr) {
kfree(up_ptr);
return -ENOMEM;
up_ptr->conn_msg_cb = conn_msg_cb;
up_ptr->continue_event_cb = continue_event_cb;
INIT_LIST_HEAD(&up_ptr->uport_list);
- reg_add_port(up_ptr);
+ tipc_reg_add_port(up_ptr);
*portref = p_ptr->publ.ref;
dbg(" tipc_createport: %x with ref %u\n", p_ptr, p_ptr->publ.ref);
- port_unlock(p_ptr);
+ tipc_port_unlock(p_ptr);
return TIPC_OK;
}
{
struct port *p_ptr;
- p_ptr = port_lock(ref);
+ p_ptr = tipc_port_lock(ref);
if (!p_ptr)
return -EINVAL;
*importance = (unsigned int)msg_importance(&p_ptr->publ.phdr);
if (imp > TIPC_CRITICAL_IMPORTANCE)
return -EINVAL;
- p_ptr = port_lock(ref);
+ p_ptr = tipc_port_lock(ref);
if (!p_ptr)
return -EINVAL;
msg_set_importance(&p_ptr->publ.phdr, (u32)imp);
u32 key;
int res = -EINVAL;
- p_ptr = port_lock(ref);
+ p_ptr = tipc_port_lock(ref);
dbg("tipc_publ %u, p_ptr = %x, conn = %x, scope = %x, "
"lower = %u, upper = %u\n",
ref, p_ptr, p_ptr->publ.connected, scope, seq->lower, seq->upper);
res = -EADDRINUSE;
goto exit;
}
- publ = nametbl_publish(seq->type, seq->lower, seq->upper,
- scope, p_ptr->publ.ref, key);
+ publ = tipc_nametbl_publish(seq->type, seq->lower, seq->upper,
+ scope, p_ptr->publ.ref, key);
if (publ) {
list_add(&publ->pport_list, &p_ptr->publications);
p_ptr->pub_count++;
res = TIPC_OK;
}
exit:
- port_unlock(p_ptr);
+ tipc_port_unlock(p_ptr);
return res;
}
struct publication *tpubl;
int res = -EINVAL;
- p_ptr = port_lock(ref);
+ p_ptr = tipc_port_lock(ref);
if (!p_ptr)
return -EINVAL;
if (!p_ptr->publ.published)
if (!seq) {
list_for_each_entry_safe(publ, tpubl,
&p_ptr->publications, pport_list) {
- nametbl_withdraw(publ->type, publ->lower,
- publ->ref, publ->key);
+ tipc_nametbl_withdraw(publ->type, publ->lower,
+ publ->ref, publ->key);
}
res = TIPC_OK;
} else {
continue;
if (publ->upper != seq->upper)
break;
- nametbl_withdraw(publ->type, publ->lower,
- publ->ref, publ->key);
+ tipc_nametbl_withdraw(publ->type, publ->lower,
+ publ->ref, publ->key);
res = TIPC_OK;
break;
}
if (list_empty(&p_ptr->publications))
p_ptr->publ.published = 0;
exit:
- port_unlock(p_ptr);
+ tipc_port_unlock(p_ptr);
return res;
}
struct tipc_msg *msg;
int res = -EINVAL;
- p_ptr = port_lock(ref);
+ p_ptr = tipc_port_lock(ref);
if (!p_ptr)
return -EINVAL;
if (p_ptr->publ.published || p_ptr->publ.connected)
p_ptr->publ.connected = 1;
k_start_timer(&p_ptr->timer, p_ptr->probing_interval);
- nodesub_subscribe(&p_ptr->subscription,peer->node,
+ tipc_nodesub_subscribe(&p_ptr->subscription,peer->node,
(void *)(unsigned long)ref,
(net_ev_handler)port_handle_node_down);
res = TIPC_OK;
exit:
- port_unlock(p_ptr);
- p_ptr->max_pkt = link_get_max_pkt(peer->node, ref);
+ tipc_port_unlock(p_ptr);
+ p_ptr->max_pkt = tipc_link_get_max_pkt(peer->node, ref);
return res;
}
struct port *p_ptr;
int res = -ENOTCONN;
- p_ptr = port_lock(ref);
+ p_ptr = tipc_port_lock(ref);
if (!p_ptr)
return -EINVAL;
if (p_ptr->publ.connected) {
p_ptr->publ.connected = 0;
/* let timer expire on it's own to avoid deadlock! */
- nodesub_unsubscribe(&p_ptr->subscription);
+ tipc_nodesub_unsubscribe(&p_ptr->subscription);
res = TIPC_OK;
}
- port_unlock(p_ptr);
+ tipc_port_unlock(p_ptr);
return res;
}
struct port *p_ptr;
struct sk_buff *buf = 0;
- p_ptr = port_lock(ref);
+ p_ptr = tipc_port_lock(ref);
if (!p_ptr)
return -EINVAL;
port_out_seqno(p_ptr),
0);
}
- port_unlock(p_ptr);
- net_route_msg(buf);
+ tipc_port_unlock(p_ptr);
+ tipc_net_route_msg(buf);
return tipc_disconnect(ref);
}
{
struct port *p_ptr;
- p_ptr = port_lock(ref);
+ p_ptr = tipc_port_lock(ref);
if (!p_ptr)
return -EINVAL;
*isconnected = p_ptr->publ.connected;
- port_unlock(p_ptr);
+ tipc_port_unlock(p_ptr);
return TIPC_OK;
}
struct port *p_ptr;
int res;
- p_ptr = port_lock(ref);
+ p_ptr = tipc_port_lock(ref);
if (!p_ptr)
return -EINVAL;
if (p_ptr->publ.connected) {
res = TIPC_OK;
} else
res = -ENOTCONN;
- port_unlock(p_ptr);
+ tipc_port_unlock(p_ptr);
return res;
}
int tipc_ref_valid(u32 ref)
{
/* Works irrespective of type */
- return !!ref_deref(ref);
+ return !!tipc_ref_deref(ref);
}
/*
- * port_recv_sections(): Concatenate and deliver sectioned
+ * tipc_port_recv_sections(): Concatenate and deliver sectioned
* message for this node.
*/
-int port_recv_sections(struct port *sender, unsigned int num_sect,
+int tipc_port_recv_sections(struct port *sender, unsigned int num_sect,
struct iovec const *msg_sect)
{
struct sk_buff *buf;
res = msg_build(&sender->publ.phdr, msg_sect, num_sect,
MAX_MSG_SIZE, !sender->user_port, &buf);
if (likely(buf))
- port_recv_msg(buf);
+ tipc_port_recv_msg(buf);
return res;
}
u32 destnode;
int res;
- p_ptr = port_deref(ref);
+ p_ptr = tipc_port_deref(ref);
if (!p_ptr || !p_ptr->publ.connected)
return -EINVAL;
p_ptr->publ.congested = 1;
- if (!port_congested(p_ptr)) {
+ if (!tipc_port_congested(p_ptr)) {
destnode = port_peernode(p_ptr);
if (likely(destnode != tipc_own_addr))
- res = link_send_sections_fast(p_ptr, msg_sect, num_sect,
- destnode);
+ res = tipc_link_send_sections_fast(p_ptr, msg_sect, num_sect,
+ destnode);
else
- res = port_recv_sections(p_ptr, num_sect, msg_sect);
+ res = tipc_port_recv_sections(p_ptr, num_sect, msg_sect);
if (likely(res != -ELINKCONG)) {
port_incr_out_seqno(p_ptr);
u32 sz;
u32 res;
- p_ptr = port_deref(ref);
+ p_ptr = tipc_port_deref(ref);
if (!p_ptr || !p_ptr->publ.connected)
return -EINVAL;
memcpy(buf->data, (unchar *)msg, hsz);
destnode = msg_destnode(msg);
p_ptr->publ.congested = 1;
- if (!port_congested(p_ptr)) {
+ if (!tipc_port_congested(p_ptr)) {
if (likely(destnode != tipc_own_addr))
res = tipc_send_buf_fast(buf, destnode);
else {
- port_recv_msg(buf);
+ tipc_port_recv_msg(buf);
res = sz;
}
if (likely(res != -ELINKCONG)) {
u32 destport = 0;
int res;
- p_ptr = port_deref(ref);
+ p_ptr = tipc_port_deref(ref);
if (!p_ptr || p_ptr->publ.connected)
return -EINVAL;
msg_set_lookup_scope(msg, addr_scope(domain));
if (importance <= TIPC_CRITICAL_IMPORTANCE)
msg_set_importance(msg,importance);
- destport = nametbl_translate(name->type, name->instance, &destnode);
+ destport = tipc_nametbl_translate(name->type, name->instance, &destnode);
msg_set_destnode(msg, destnode);
msg_set_destport(msg, destport);
if (likely(destport || destnode)) {
p_ptr->sent++;
if (likely(destnode == tipc_own_addr))
- return port_recv_sections(p_ptr, num_sect, msg_sect);
- res = link_send_sections_fast(p_ptr, msg_sect, num_sect,
- destnode);
+ return tipc_port_recv_sections(p_ptr, num_sect, msg_sect);
+ res = tipc_link_send_sections_fast(p_ptr, msg_sect, num_sect,
+ destnode);
if (likely(res != -ELINKCONG))
return res;
if (port_unreliable(p_ptr)) {
}
return -ELINKCONG;
}
- return port_reject_sections(p_ptr, msg, msg_sect, num_sect,
- TIPC_ERR_NO_NAME);
+ return tipc_port_reject_sections(p_ptr, msg, msg_sect, num_sect,
+ TIPC_ERR_NO_NAME);
}
/**
u32 destport = 0;
int res;
- p_ptr = (struct port *)ref_deref(ref);
+ p_ptr = (struct port *)tipc_ref_deref(ref);
if (!p_ptr || p_ptr->publ.connected)
return -EINVAL;
msg_set_lookup_scope(msg, addr_scope(domain));
msg_set_hdr_sz(msg, LONG_H_SIZE);
msg_set_size(msg, LONG_H_SIZE + dsz);
- destport = nametbl_translate(name->type, name->instance, &destnode);
+ destport = tipc_nametbl_translate(name->type, name->instance, &destnode);
msg_set_destnode(msg, destnode);
msg_set_destport(msg, destport);
msg_dbg(msg, "forw2name ==> ");
if (likely(destport || destnode)) {
p_ptr->sent++;
if (destnode == tipc_own_addr)
- return port_recv_msg(buf);
+ return tipc_port_recv_msg(buf);
res = tipc_send_buf_fast(buf, destnode);
if (likely(res != -ELINKCONG))
return res;
struct tipc_msg *msg;
int res;
- p_ptr = port_deref(ref);
+ p_ptr = tipc_port_deref(ref);
if (!p_ptr || p_ptr->publ.connected)
return -EINVAL;
msg_set_importance(msg, importance);
p_ptr->sent++;
if (dest->node == tipc_own_addr)
- return port_recv_sections(p_ptr, num_sect, msg_sect);
- res = link_send_sections_fast(p_ptr, msg_sect, num_sect, dest->node);
+ return tipc_port_recv_sections(p_ptr, num_sect, msg_sect);
+ res = tipc_link_send_sections_fast(p_ptr, msg_sect, num_sect, dest->node);
if (likely(res != -ELINKCONG))
return res;
if (port_unreliable(p_ptr)) {
struct tipc_msg *msg;
int res;
- p_ptr = (struct port *)ref_deref(ref);
+ p_ptr = (struct port *)tipc_ref_deref(ref);
if (!p_ptr || p_ptr->publ.connected)
return -EINVAL;
msg_dbg(msg, "buf2port: ");
p_ptr->sent++;
if (dest->node == tipc_own_addr)
- return port_recv_msg(buf);
+ return tipc_port_recv_msg(buf);
res = tipc_send_buf_fast(buf, dest->node);
if (likely(res != -ELINKCONG))
return res;
#ifndef _TIPC_PORT_H
#define _TIPC_PORT_H
-#include <net/tipc/tipc_port.h>
+#include "core.h"
#include "ref.h"
#include "net.h"
#include "msg.h"
struct node_subscr subscription;
};
-extern spinlock_t port_list_lock;
+extern spinlock_t tipc_port_list_lock;
struct port_list;
-int port_recv_sections(struct port *p_ptr, u32 num_sect,
- struct iovec const *msg_sect);
-int port_reject_sections(struct port *p_ptr, struct tipc_msg *hdr,
- struct iovec const *msg_sect, u32 num_sect,
- int err);
-struct sk_buff *port_get_ports(void);
+int tipc_port_recv_sections(struct port *p_ptr, u32 num_sect,
+ struct iovec const *msg_sect);
+int tipc_port_reject_sections(struct port *p_ptr, struct tipc_msg *hdr,
+ struct iovec const *msg_sect, u32 num_sect,
+ int err);
+struct sk_buff *tipc_port_get_ports(void);
struct sk_buff *port_show_stats(const void *req_tlv_area, int req_tlv_space);
-void port_recv_proto_msg(struct sk_buff *buf);
-void port_recv_mcast(struct sk_buff *buf, struct port_list *dp);
-void port_reinit(void);
+void tipc_port_recv_proto_msg(struct sk_buff *buf);
+void tipc_port_recv_mcast(struct sk_buff *buf, struct port_list *dp);
+void tipc_port_reinit(void);
/**
- * port_lock - lock port instance referred to and return its pointer
+ * tipc_port_lock - lock port instance referred to and return its pointer
*/
-static inline struct port *port_lock(u32 ref)
+static inline struct port *tipc_port_lock(u32 ref)
{
- return (struct port *)ref_lock(ref);
+ return (struct port *)tipc_ref_lock(ref);
}
/**
- * port_unlock - unlock a port instance
+ * tipc_port_unlock - unlock a port instance
*
- * Can use pointer instead of ref_unlock() since port is already locked.
+ * Can use pointer instead of tipc_ref_unlock() since port is already locked.
*/
-static inline void port_unlock(struct port *p_ptr)
+static inline void tipc_port_unlock(struct port *p_ptr)
{
spin_unlock_bh(p_ptr->publ.lock);
}
-static inline struct port* port_deref(u32 ref)
+static inline struct port* tipc_port_deref(u32 ref)
{
- return (struct port *)ref_deref(ref);
+ return (struct port *)tipc_ref_deref(ref);
}
-static inline u32 peer_port(struct port *p_ptr)
+static inline u32 tipc_peer_port(struct port *p_ptr)
{
return msg_destport(&p_ptr->publ.phdr);
}
-static inline u32 peer_node(struct port *p_ptr)
+static inline u32 tipc_peer_node(struct port *p_ptr)
{
return msg_destnode(&p_ptr->publ.phdr);
}
-static inline int port_congested(struct port *p_ptr)
+static inline int tipc_port_congested(struct port *p_ptr)
{
return((p_ptr->sent - p_ptr->acked) >= (TIPC_FLOW_CONTROL_WIN * 2));
}
/**
- * port_recv_msg - receive message from lower layer and deliver to port user
+ * tipc_port_recv_msg - receive message from lower layer and deliver to port user
*/
-static inline int port_recv_msg(struct sk_buff *buf)
+static inline int tipc_port_recv_msg(struct sk_buff *buf)
{
struct port *p_ptr;
struct tipc_msg *msg = buf_msg(buf);
/* forward unresolved named message */
if (unlikely(!destport)) {
- net_route_msg(buf);
+ tipc_net_route_msg(buf);
return dsz;
}
/* validate destination & pass to port, otherwise reject message */
- p_ptr = port_lock(destport);
+ p_ptr = tipc_port_lock(destport);
if (likely(p_ptr)) {
if (likely(p_ptr->publ.connected)) {
- if ((unlikely(msg_origport(msg) != peer_port(p_ptr))) ||
- (unlikely(msg_orignode(msg) != peer_node(p_ptr))) ||
+ if ((unlikely(msg_origport(msg) != tipc_peer_port(p_ptr))) ||
+ (unlikely(msg_orignode(msg) != tipc_peer_node(p_ptr))) ||
(unlikely(!msg_connected(msg)))) {
err = TIPC_ERR_NO_PORT;
- port_unlock(p_ptr);
+ tipc_port_unlock(p_ptr);
goto reject;
}
}
err = p_ptr->dispatcher(&p_ptr->publ, buf);
- port_unlock(p_ptr);
+ tipc_port_unlock(p_ptr);
if (likely(!err))
return dsz;
} else {
* because entry 0's reference field has the form XXXX|1--1.
*/
-struct ref_table ref_table = { 0 };
+struct ref_table tipc_ref_table = { 0 };
-rwlock_t reftbl_lock = RW_LOCK_UNLOCKED;
+static rwlock_t ref_table_lock = RW_LOCK_UNLOCKED;
/**
- * ref_table_init - create reference table for objects
+ * tipc_ref_table_init - create reference table for objects
*/
-int ref_table_init(u32 requested_size, u32 start)
+int tipc_ref_table_init(u32 requested_size, u32 start)
{
struct reference *table;
u32 sz = 1 << 4;
if (table == NULL)
return -ENOMEM;
- write_lock_bh(&reftbl_lock);
+ write_lock_bh(&ref_table_lock);
index_mask = sz - 1;
for (i = sz - 1; i >= 0; i--) {
table[i].object = 0;
table[i].lock = SPIN_LOCK_UNLOCKED;
table[i].data.next_plus_upper = (start & ~index_mask) + i - 1;
}
- ref_table.entries = table;
- ref_table.index_mask = index_mask;
- ref_table.first_free = sz - 1;
- ref_table.last_free = 1;
- write_unlock_bh(&reftbl_lock);
+ tipc_ref_table.entries = table;
+ tipc_ref_table.index_mask = index_mask;
+ tipc_ref_table.first_free = sz - 1;
+ tipc_ref_table.last_free = 1;
+ write_unlock_bh(&ref_table_lock);
return TIPC_OK;
}
/**
- * ref_table_stop - destroy reference table for objects
+ * tipc_ref_table_stop - destroy reference table for objects
*/
-void ref_table_stop(void)
+void tipc_ref_table_stop(void)
{
- if (!ref_table.entries)
+ if (!tipc_ref_table.entries)
return;
- vfree(ref_table.entries);
- ref_table.entries = 0;
+ vfree(tipc_ref_table.entries);
+ tipc_ref_table.entries = 0;
}
/**
- * ref_acquire - create reference to an object
+ * tipc_ref_acquire - create reference to an object
*
* Return a unique reference value which can be translated back to the pointer
* 'object' at a later time. Also, pass back a pointer to the lock protecting
* the object, but without locking it.
*/
-u32 ref_acquire(void *object, spinlock_t **lock)
+u32 tipc_ref_acquire(void *object, spinlock_t **lock)
{
struct reference *entry;
u32 index;
u32 next_plus_upper;
u32 reference = 0;
- assert(ref_table.entries && object);
+ assert(tipc_ref_table.entries && object);
- write_lock_bh(&reftbl_lock);
- if (ref_table.first_free) {
- index = ref_table.first_free;
- entry = &(ref_table.entries[index]);
- index_mask = ref_table.index_mask;
+ write_lock_bh(&ref_table_lock);
+ if (tipc_ref_table.first_free) {
+ index = tipc_ref_table.first_free;
+ entry = &(tipc_ref_table.entries[index]);
+ index_mask = tipc_ref_table.index_mask;
/* take lock in case a previous user of entry still holds it */
spin_lock_bh(&entry->lock);
next_plus_upper = entry->data.next_plus_upper;
- ref_table.first_free = next_plus_upper & index_mask;
+ tipc_ref_table.first_free = next_plus_upper & index_mask;
reference = (next_plus_upper & ~index_mask) + index;
entry->data.reference = reference;
entry->object = object;
*lock = &entry->lock;
spin_unlock_bh(&entry->lock);
}
- write_unlock_bh(&reftbl_lock);
+ write_unlock_bh(&ref_table_lock);
return reference;
}
/**
- * ref_discard - invalidate references to an object
+ * tipc_ref_discard - invalidate references to an object
*
* Disallow future references to an object and free up the entry for re-use.
* Note: The entry's spin_lock may still be busy after discard
*/
-void ref_discard(u32 ref)
+void tipc_ref_discard(u32 ref)
{
struct reference *entry;
u32 index;
u32 index_mask;
- assert(ref_table.entries);
+ assert(tipc_ref_table.entries);
assert(ref != 0);
- write_lock_bh(&reftbl_lock);
- index_mask = ref_table.index_mask;
+ write_lock_bh(&ref_table_lock);
+ index_mask = tipc_ref_table.index_mask;
index = ref & index_mask;
- entry = &(ref_table.entries[index]);
+ entry = &(tipc_ref_table.entries[index]);
assert(entry->object != 0);
assert(entry->data.reference == ref);
/* mark entry as unused */
entry->object = 0;
- if (ref_table.first_free == 0)
- ref_table.first_free = index;
+ if (tipc_ref_table.first_free == 0)
+ tipc_ref_table.first_free = index;
else
/* next_plus_upper is always XXXX|0--0 for last free entry */
- ref_table.entries[ref_table.last_free].data.next_plus_upper
+ tipc_ref_table.entries[tipc_ref_table.last_free].data.next_plus_upper
|= index;
- ref_table.last_free = index;
+ tipc_ref_table.last_free = index;
/* increment upper bits of entry to invalidate subsequent references */
entry->data.next_plus_upper = (ref & ~index_mask) + (index_mask + 1);
- write_unlock_bh(&reftbl_lock);
+ write_unlock_bh(&ref_table_lock);
}
};
/**
- * struct ref_table - table of TIPC object reference entries
+ * struct tipc_ref_table - table of TIPC object reference entries
* @entries: pointer to array of reference entries
* @index_mask: bitmask for array index portion of reference values
* @first_free: array index of first unused object reference entry
u32 last_free;
};
-extern struct ref_table ref_table;
+extern struct ref_table tipc_ref_table;
-int ref_table_init(u32 requested_size, u32 start);
-void ref_table_stop(void);
+int tipc_ref_table_init(u32 requested_size, u32 start);
+void tipc_ref_table_stop(void);
-u32 ref_acquire(void *object, spinlock_t **lock);
-void ref_discard(u32 ref);
+u32 tipc_ref_acquire(void *object, spinlock_t **lock);
+void tipc_ref_discard(u32 ref);
/**
- * ref_lock - lock referenced object and return pointer to it
+ * tipc_ref_lock - lock referenced object and return pointer to it
*/
-static inline void *ref_lock(u32 ref)
+static inline void *tipc_ref_lock(u32 ref)
{
- if (likely(ref_table.entries)) {
+ if (likely(tipc_ref_table.entries)) {
struct reference *r =
- &ref_table.entries[ref & ref_table.index_mask];
+ &tipc_ref_table.entries[ref & tipc_ref_table.index_mask];
spin_lock_bh(&r->lock);
if (likely(r->data.reference == ref))
}
/**
- * ref_unlock - unlock referenced object
+ * tipc_ref_unlock - unlock referenced object
*/
-static inline void ref_unlock(u32 ref)
+static inline void tipc_ref_unlock(u32 ref)
{
- if (likely(ref_table.entries)) {
+ if (likely(tipc_ref_table.entries)) {
struct reference *r =
- &ref_table.entries[ref & ref_table.index_mask];
+ &tipc_ref_table.entries[ref & tipc_ref_table.index_mask];
if (likely(r->data.reference == ref))
spin_unlock_bh(&r->lock);
else
- err("ref_unlock() invoked using obsolete reference\n");
+ err("tipc_ref_unlock() invoked using obsolete reference\n");
}
}
/**
- * ref_deref - return pointer referenced object (without locking it)
+ * tipc_ref_deref - return pointer referenced object (without locking it)
*/
-static inline void *ref_deref(u32 ref)
+static inline void *tipc_ref_deref(u32 ref)
{
- if (likely(ref_table.entries)) {
+ if (likely(tipc_ref_table.entries)) {
struct reference *r =
- &ref_table.entries[ref & ref_table.index_mask];
+ &tipc_ref_table.entries[ref & tipc_ref_table.index_mask];
if (likely(r->data.reference == ref))
return r->object;
#include <linux/mm.h>
#include <linux/slab.h>
#include <linux/poll.h>
-#include <linux/version.h>
#include <linux/fcntl.h>
-#include <linux/version.h>
#include <asm/semaphore.h>
#include <asm/string.h>
#include <asm/atomic.h>
if (unlikely(msg_errcode(msg) && (sock->state == SS_CONNECTED))) {
sock->state = SS_DISCONNECTING;
/* Note: Use signal since port lock is already taken! */
- k_signal((Handler)async_disconnect, tport->ref);
+ tipc_k_signal((Handler)async_disconnect, tport->ref);
}
/* Enqueue message (finally!) */
};
/**
- * socket_init - initialize TIPC socket interface
+ * tipc_socket_init - initialize TIPC socket interface
*
* Returns 0 on success, errno otherwise
*/
-int socket_init(void)
+int tipc_socket_init(void)
{
int res;
}
/**
- * sock_stop - stop TIPC socket interface
+ * tipc_socket_stop - stop TIPC socket interface
*/
-void socket_stop(void)
+void tipc_socket_stop(void)
{
if (!sockets_enabled)
return;
}
/**
- * subscr_overlap - test for subscription overlap with the given values
+ * tipc_subscr_overlap - test for subscription overlap with the given values
*
* Returns 1 if there is overlap, otherwise 0.
*/
-int subscr_overlap(struct subscription *sub,
- u32 found_lower,
- u32 found_upper)
+int tipc_subscr_overlap(struct subscription *sub,
+ u32 found_lower,
+ u32 found_upper)
{
if (found_lower < sub->seq.lower)
}
/**
- * subscr_report_overlap - issue event if there is subscription overlap
+ * tipc_subscr_report_overlap - issue event if there is subscription overlap
*
* Protected by nameseq.lock in name_table.c
*/
-void subscr_report_overlap(struct subscription *sub,
- u32 found_lower,
- u32 found_upper,
- u32 event,
- u32 port_ref,
- u32 node,
- int must)
+void tipc_subscr_report_overlap(struct subscription *sub,
+ u32 found_lower,
+ u32 found_upper,
+ u32 event,
+ u32 port_ref,
+ u32 node,
+ int must)
{
dbg("Rep overlap %u:%u,%u<->%u,%u\n", sub->seq.type, sub->seq.lower,
sub->seq.upper, found_lower, found_upper);
- if (!subscr_overlap(sub, found_lower, found_upper))
+ if (!tipc_subscr_overlap(sub, found_lower, found_upper))
return;
if (!must && (sub->filter != TIPC_SUB_PORTS))
return;
/* Validate subscriber reference (in case subscriber is terminating) */
subscriber_ref = sub->owner->ref;
- subscriber = (struct subscriber *)ref_lock(subscriber_ref);
+ subscriber = (struct subscriber *)tipc_ref_lock(subscriber_ref);
if (subscriber == NULL)
return;
/* Unlink subscription from name table */
- nametbl_unsubscribe(sub);
+ tipc_nametbl_unsubscribe(sub);
/* Notify subscriber of timeout, then unlink subscription */
/* Now destroy subscription */
- ref_unlock(subscriber_ref);
+ tipc_ref_unlock(subscriber_ref);
k_term_timer(&sub->timer);
kfree(sub);
atomic_dec(&topsrv.subscription_count);
/* Invalidate subscriber reference */
- ref_discard(subscriber->ref);
+ tipc_ref_discard(subscriber->ref);
spin_unlock_bh(subscriber->lock);
/* Destroy any existing subscriptions for subscriber */
k_cancel_timer(&sub->timer);
k_term_timer(&sub->timer);
}
- nametbl_unsubscribe(sub);
+ tipc_nametbl_unsubscribe(sub);
list_del(&sub->subscription_list);
dbg("Term: Removed sub %u,%u,%u from subscriber %x list\n",
sub->seq.type, sub->seq.lower, sub->seq.upper, subscriber);
k_start_timer(&sub->timer, sub->timeout);
}
sub->owner = subscriber;
- nametbl_subscribe(sub);
+ tipc_nametbl_subscribe(sub);
}
/**
struct subscriber *subscriber;
spinlock_t *subscriber_lock;
- subscriber = ref_lock((u32)(unsigned long)usr_handle);
+ subscriber = tipc_ref_lock((u32)(unsigned long)usr_handle);
if (subscriber == NULL)
return;
struct subscriber *subscriber;
spinlock_t *subscriber_lock;
- subscriber = ref_lock((u32)(unsigned long)usr_handle);
+ subscriber = tipc_ref_lock((u32)(unsigned long)usr_handle);
if (subscriber == NULL)
return;
memset(subscriber, 0, sizeof(struct subscriber));
INIT_LIST_HEAD(&subscriber->subscription_list);
INIT_LIST_HEAD(&subscriber->subscriber_list);
- subscriber->ref = ref_acquire(subscriber, &subscriber->lock);
+ subscriber->ref = tipc_ref_acquire(subscriber, &subscriber->lock);
if (subscriber->ref == 0) {
warn("Failed to acquire subscriber reference\n");
kfree(subscriber);
&subscriber->port_ref);
if (subscriber->port_ref == 0) {
warn("Memory squeeze; failed to create subscription port\n");
- ref_discard(subscriber->ref);
+ tipc_ref_discard(subscriber->ref);
kfree(subscriber);
return;
}
/* Add subscriber to topology server's subscriber list */
- ref_lock(subscriber->ref);
+ tipc_ref_lock(subscriber->ref);
spin_lock_bh(&topsrv.lock);
list_add(&subscriber->subscriber_list, &topsrv.subscriber_list);
spin_unlock_bh(&topsrv.lock);
spin_unlock_bh(subscriber_lock);
}
-int subscr_start(void)
+int tipc_subscr_start(void)
{
struct tipc_name_seq seq = {TIPC_TOP_SRV, TIPC_TOP_SRV, TIPC_TOP_SRV};
int res = -1;
if (res)
goto failed;
- res = nametbl_publish_rsv(topsrv.setup_port, TIPC_NODE_SCOPE, &seq);
+ res = tipc_nametbl_publish_rsv(topsrv.setup_port, TIPC_NODE_SCOPE, &seq);
if (res)
goto failed;
return res;
}
-void subscr_stop(void)
+void tipc_subscr_stop(void)
{
struct subscriber *subscriber;
struct subscriber *subscriber_temp;
list_for_each_entry_safe(subscriber, subscriber_temp,
&topsrv.subscriber_list,
subscriber_list) {
- ref_lock(subscriber->ref);
+ tipc_ref_lock(subscriber->ref);
subscriber_lock = subscriber->lock;
subscr_terminate(subscriber);
spin_unlock_bh(subscriber_lock);
{
u32 domain = 0;
- return(nametbl_translate(name->type, name->instance,&domain) != 0);
+ return(tipc_nametbl_translate(name->type, name->instance,&domain) != 0);
}
struct subscriber *owner;
};
-int subscr_overlap(struct subscription * sub,
- u32 found_lower,
- u32 found_upper);
+int tipc_subscr_overlap(struct subscription * sub,
+ u32 found_lower,
+ u32 found_upper);
-void subscr_report_overlap(struct subscription * sub,
- u32 found_lower,
- u32 found_upper,
- u32 event,
- u32 port_ref,
- u32 node,
- int must_report);
+void tipc_subscr_report_overlap(struct subscription * sub,
+ u32 found_lower,
+ u32 found_upper,
+ u32 event,
+ u32 port_ref,
+ u32 node,
+ int must_report);
-int subscr_start(void);
+int tipc_subscr_start(void);
-void subscr_stop(void);
+void tipc_subscr_stop(void);
#endif
}
/**
- * reg_start - activate TIPC user registry
+ * tipc_reg_start - activate TIPC user registry
*/
-int reg_start(void)
+int tipc_reg_start(void)
{
u32 u;
int res;
for (u = 1; u <= MAX_USERID; u++) {
if (users[u].callback)
- k_signal((Handler)reg_callback,
- (unsigned long)&users[u]);
+ tipc_k_signal((Handler)reg_callback,
+ (unsigned long)&users[u]);
}
return TIPC_OK;
}
/**
- * reg_stop - shut down & delete TIPC user registry
+ * tipc_reg_stop - shut down & delete TIPC user registry
*/
-void reg_stop(void)
+void tipc_reg_stop(void)
{
int id;
atomic_inc(&tipc_user_count);
if (cb && (tipc_mode != TIPC_NOT_RUNNING))
- k_signal((Handler)reg_callback, (unsigned long)user_ptr);
+ tipc_k_signal((Handler)reg_callback, (unsigned long)user_ptr);
return TIPC_OK;
}
}
/**
- * reg_add_port - register a user's driver port
+ * tipc_reg_add_port - register a user's driver port
*/
-int reg_add_port(struct user_port *up_ptr)
+int tipc_reg_add_port(struct user_port *up_ptr)
{
struct tipc_user *user_ptr;
}
/**
- * reg_remove_port - deregister a user's driver port
+ * tipc_reg_remove_port - deregister a user's driver port
*/
-int reg_remove_port(struct user_port *up_ptr)
+int tipc_reg_remove_port(struct user_port *up_ptr)
{
if (up_ptr->user_ref == 0)
return TIPC_OK;
#include "port.h"
-int reg_start(void);
-void reg_stop(void);
+int tipc_reg_start(void);
+void tipc_reg_stop(void);
-int reg_add_port(struct user_port *up_ptr);
-int reg_remove_port(struct user_port *up_ptr);
+int tipc_reg_add_port(struct user_port *up_ptr);
+int tipc_reg_remove_port(struct user_port *up_ptr);
#endif
#include "cluster.h"
#include "node.h"
-struct _zone *zone_create(u32 addr)
+struct _zone *tipc_zone_create(u32 addr)
{
struct _zone *z_ptr = 0;
u32 z_num;
- if (!addr_domain_valid(addr))
+ if (!tipc_addr_domain_valid(addr))
return 0;
z_ptr = (struct _zone *)kmalloc(sizeof(*z_ptr), GFP_ATOMIC);
memset(z_ptr, 0, sizeof(*z_ptr));
z_num = tipc_zone(addr);
z_ptr->addr = tipc_addr(z_num, 0, 0);
- net.zones[z_num] = z_ptr;
+ tipc_net.zones[z_num] = z_ptr;
}
return z_ptr;
}
-void zone_delete(struct _zone *z_ptr)
+void tipc_zone_delete(struct _zone *z_ptr)
{
u32 c_num;
if (!z_ptr)
return;
for (c_num = 1; c_num <= tipc_max_clusters; c_num++) {
- cluster_delete(z_ptr->clusters[c_num]);
+ tipc_cltr_delete(z_ptr->clusters[c_num]);
}
kfree(z_ptr);
}
-void zone_attach_cluster(struct _zone *z_ptr, struct cluster *c_ptr)
+void tipc_zone_attach_cluster(struct _zone *z_ptr, struct cluster *c_ptr)
{
u32 c_num = tipc_cluster(c_ptr->addr);
z_ptr->clusters[c_num] = c_ptr;
}
-void zone_remove_as_router(struct _zone *z_ptr, u32 router)
+void tipc_zone_remove_as_router(struct _zone *z_ptr, u32 router)
{
u32 c_num;
for (c_num = 1; c_num <= tipc_max_clusters; c_num++) {
if (z_ptr->clusters[c_num]) {
- cluster_remove_as_router(z_ptr->clusters[c_num],
- router);
+ tipc_cltr_remove_as_router(z_ptr->clusters[c_num],
+ router);
}
}
}
-void zone_send_external_routes(struct _zone *z_ptr, u32 dest)
+void tipc_zone_send_external_routes(struct _zone *z_ptr, u32 dest)
{
u32 c_num;
if (z_ptr->clusters[c_num]) {
if (in_own_cluster(z_ptr->addr))
continue;
- cluster_send_ext_routes(z_ptr->clusters[c_num], dest);
+ tipc_cltr_send_ext_routes(z_ptr->clusters[c_num], dest);
}
}
}
-struct node *zone_select_remote_node(struct _zone *z_ptr, u32 addr, u32 ref)
+struct node *tipc_zone_select_remote_node(struct _zone *z_ptr, u32 addr, u32 ref)
{
struct cluster *c_ptr;
struct node *n_ptr;
c_ptr = z_ptr->clusters[tipc_cluster(addr)];
if (!c_ptr)
return 0;
- n_ptr = cluster_select_node(c_ptr, ref);
+ n_ptr = tipc_cltr_select_node(c_ptr, ref);
if (n_ptr)
return n_ptr;
c_ptr = z_ptr->clusters[c_num];
if (!c_ptr)
return 0;
- n_ptr = cluster_select_node(c_ptr, ref);
+ n_ptr = tipc_cltr_select_node(c_ptr, ref);
if (n_ptr)
return n_ptr;
}
return 0;
}
-u32 zone_select_router(struct _zone *z_ptr, u32 addr, u32 ref)
+u32 tipc_zone_select_router(struct _zone *z_ptr, u32 addr, u32 ref)
{
struct cluster *c_ptr;
u32 c_num;
if (!z_ptr)
return 0;
c_ptr = z_ptr->clusters[tipc_cluster(addr)];
- router = c_ptr ? cluster_select_router(c_ptr, ref) : 0;
+ router = c_ptr ? tipc_cltr_select_router(c_ptr, ref) : 0;
if (router)
return router;
/* Links to any other clusters within the zone? */
for (c_num = 1; c_num <= tipc_max_clusters; c_num++) {
c_ptr = z_ptr->clusters[c_num];
- router = c_ptr ? cluster_select_router(c_ptr, ref) : 0;
+ router = c_ptr ? tipc_cltr_select_router(c_ptr, ref) : 0;
if (router)
return router;
}
}
-u32 zone_next_node(u32 addr)
+u32 tipc_zone_next_node(u32 addr)
{
- struct cluster *c_ptr = cluster_find(addr);
+ struct cluster *c_ptr = tipc_cltr_find(addr);
if (c_ptr)
- return cluster_next_node(c_ptr, addr);
+ return tipc_cltr_next_node(c_ptr, addr);
return 0;
}
u32 links;
};
-struct node *zone_select_remote_node(struct _zone *z_ptr, u32 addr, u32 ref);
-u32 zone_select_router(struct _zone *z_ptr, u32 addr, u32 ref);
-void zone_remove_as_router(struct _zone *z_ptr, u32 router);
-void zone_send_external_routes(struct _zone *z_ptr, u32 dest);
-struct _zone *zone_create(u32 addr);
-void zone_delete(struct _zone *z_ptr);
-void zone_attach_cluster(struct _zone *z_ptr, struct cluster *c_ptr);
-u32 zone_next_node(u32 addr);
+struct node *tipc_zone_select_remote_node(struct _zone *z_ptr, u32 addr, u32 ref);
+u32 tipc_zone_select_router(struct _zone *z_ptr, u32 addr, u32 ref);
+void tipc_zone_remove_as_router(struct _zone *z_ptr, u32 router);
+void tipc_zone_send_external_routes(struct _zone *z_ptr, u32 dest);
+struct _zone *tipc_zone_create(u32 addr);
+void tipc_zone_delete(struct _zone *z_ptr);
+void tipc_zone_attach_cluster(struct _zone *z_ptr, struct cluster *c_ptr);
+u32 tipc_zone_next_node(u32 addr);
-static inline struct _zone *zone_find(u32 addr)
+static inline struct _zone *tipc_zone_find(u32 addr)
{
- return net.zones[tipc_zone(addr)];
+ return tipc_net.zones[tipc_zone(addr)];
}
#endif
*/
static int seclvl_settime(struct timespec *tv, struct timezone *tz)
{
- struct timespec now;
- if (seclvl > 1) {
+ if (tv && seclvl > 1) {
+ struct timespec now;
now = current_kernel_time();
if (tv->tv_sec < now.tv_sec ||
(tv->tv_sec == now.tv_sec && tv->tv_nsec < now.tv_nsec)) {
};
static struct pci_device_id trident_pci_tbl[] = {
- {PCI_VENDOR_ID_TRIDENT, PCI_DEVICE_ID_TRIDENT_4DWAVE_DX,
- PCI_ANY_ID, PCI_ANY_ID, 0, 0, TRIDENT_4D_DX},
- {PCI_VENDOR_ID_TRIDENT, PCI_DEVICE_ID_TRIDENT_4DWAVE_NX,
- PCI_ANY_ID, PCI_ANY_ID, 0, 0, TRIDENT_4D_NX},
- {PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_7018,
- PCI_ANY_ID, PCI_ANY_ID, 0, 0, SIS_7018},
- {PCI_VENDOR_ID_ALI, PCI_DEVICE_ID_ALI_5451,
- PCI_ANY_ID, PCI_ANY_ID, 0, 0, ALI_5451},
- {PCI_VENDOR_ID_INTERG, PCI_DEVICE_ID_INTERG_5050,
- PCI_ANY_ID, PCI_ANY_ID, 0, 0, CYBER5050},
+ {PCI_DEVICE(PCI_VENDOR_ID_TRIDENT, PCI_DEVICE_ID_TRIDENT_4DWAVE_DX),
+ PCI_CLASS_MULTIMEDIA_AUDIO << 8, 0xffff00, TRIDENT_4D_DX},
+ {PCI_DEVICE(PCI_VENDOR_ID_TRIDENT, PCI_DEVICE_ID_TRIDENT_4DWAVE_NX),
+ 0, 0, TRIDENT_4D_NX},
+ {PCI_DEVICE(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_7018), 0, 0, SIS_7018},
+ {PCI_DEVICE(PCI_VENDOR_ID_ALI, PCI_DEVICE_ID_ALI_5451), 0, 0, ALI_5451},
+ {PCI_DEVICE(PCI_VENDOR_ID_INTERG, PCI_DEVICE_ID_INTERG_5050),
+ 0, 0, CYBER5050},
{0,}
};
};
#endif
+struct snd_cs4231;
struct cs4231_dma_control {
void (*prepare)(struct cs4231_dma_control *dma_cont, int dir);
void (*enable)(struct cs4231_dma_control *dma_cont, int on);
int (*request)(struct cs4231_dma_control *dma_cont, dma_addr_t bus_addr, size_t len);
unsigned int (*address)(struct cs4231_dma_control *dma_cont);
void (*reset)(struct snd_cs4231 *chip);
- void (*preallocate)(struct snd_cs4231 *chip, struct snd_snd_pcm *pcm);
+ void (*preallocate)(struct snd_cs4231 *chip, struct snd_pcm *pcm);
#ifdef EBUS_SUPPORT
struct ebus_dma_info ebus_info;
#endif