omap_cfg_reg(PWL);
 
        /* Enable PWL unit */
-       omap_writeb(0x01, OMAP16XX_PWL_CLK_ENABLE);
+       omap_writeb(0x01, OMAP_PWL_CLK_ENABLE);
 
        /* Set PWL level */
-       omap_writeb(0xFF, OMAP16XX_PWL_ENABLE);
+       omap_writeb(0xFF, OMAP_PWL_ENABLE);
 
        /* configure GPIO2 as output */
        omap_set_gpio_direction(2, 0);
 static void osk_panel_disable(struct lcd_panel *panel)
 {
        /* Set PWL level to zero */
-       omap_writeb(0x00, OMAP16XX_PWL_ENABLE);
+       omap_writeb(0x00, OMAP_PWL_ENABLE);
 
        /* Disable PWL unit */
-       omap_writeb(0x00, OMAP16XX_PWL_CLK_ENABLE);
+       omap_writeb(0x00, OMAP_PWL_CLK_ENABLE);
 
        /* set GPIO2 low */
        omap_set_gpio_dataout(2, 0);
 
 #define OMAP_LPG2_LCR                  (OMAP_LPG2_BASE + 0x00)
 #define OMAP_LPG2_PMR                  (OMAP_LPG2_BASE + 0x04)
 
+/*
+ * ----------------------------------------------------------------------------
+ * Pulse-Width Light
+ * ----------------------------------------------------------------------------
+ */
+#define OMAP_PWL_BASE                  0xfffb5800
+#define OMAP_PWL_ENABLE                        (OMAP_PWL_BASE + 0x00)
+#define OMAP_PWL_CLK_ENABLE            (OMAP_PWL_BASE + 0x04)
+
 /*
  * ---------------------------------------------------------------------------
  * Processor specific defines
 
 #define UART3_OSC_12M_SEL       (OMAP_UART3_BASE + 0x4C)
 #define UART3_MVR               (OMAP_UART3_BASE + 0x50)
 
-/*
- * ----------------------------------------------------------------------------
- * Pulse-Width Light
- * ----------------------------------------------------------------------------
- */
-#define OMAP16XX_PWL_BASE      (0xfffb5800)
-#define OMAP16XX_PWL_ENABLE    (OMAP16XX_PWL_BASE + 0x00)
-#define OMAP16XX_PWL_CLK_ENABLE        (OMAP16XX_PWL_BASE + 0x04)
-
 /*
  * ---------------------------------------------------------------------------
  * Watchdog timer