MAC addresses passed by the firmware when no information other
than indices is available to associate an address with a device.
- phy-connection-type : a string naming the controller/PHY interface type,
- i.e., "mii" (default), "rmii", "gmii", "rgmii", "rgmii-id", "tbi",
- or "rtbi".
+ i.e., "mii" (default), "rmii", "gmii", "rgmii", "rgmii-id" (Internal
+ Delay), "rgmii-txid" (delay on TX only), "rgmii-rxid" (delay on RX only),
+ "tbi", or "rtbi".
Example:
ucc@2000 {
reg = <700 100>;
device_type = "ipic";
};
-
+
par_io@1400 {
reg = <1400 100>;
device_type = "par_io";
3 5 1 0 2 0 /* MDC */
0 d 2 0 1 0 /* RX_CLK (CLK9) */
3 18 2 0 1 0 /* TX_CLK (CLK10) */
- 1 1 1 0 1 0 /* TxD1 */
1 0 1 0 1 0 /* TxD0 */
1 1 1 0 1 0 /* TxD1 */
1 2 1 0 1 0 /* TxD2 */
reg = <e0100000 480>;
brg-frequency = <0>;
bus-frequency = <BCD3D80>;
-
+
muram@10000 {
device_type = "muram";
ranges = <0 00010000 00004000>;
-
+
data-only@0 {
reg = <0 4000>;
};
compatible = "ucc_geth";
model = "UCC";
device-id = <4>;
- reg = <3000 200>;
+ reg = <3200 200>;
interrupts = <23>;
interrupt-parent = < &qeic >;
/*
clock-frequency = <1fca055>;
interrupt-parent = <&mpic>;
interrupts = <1b 2>;
- interrupt-map-mask = <fb00 0 0 0>;
+ interrupt-map-mask = <ff00 0 0 1>;
interrupt-map = <
// IDSEL 0x1c USB
- e000 0 0 0 &i8259 c 2
- e100 0 0 0 &i8259 9 2
- e200 0 0 0 &i8259 a 2
- e300 0 0 0 &i8259 b 2
+ e000 0 0 1 &i8259 c 2
+ e100 0 0 1 &i8259 9 2
+ e200 0 0 1 &i8259 a 2
+ e300 0 0 1 &i8259 b 2
// IDSEL 0x1d Audio
- e800 0 0 0 &i8259 6 2
+ e800 0 0 1 &i8259 6 2
// IDSEL 0x1e Legacy
- f000 0 0 0 &i8259 7 2
- f100 0 0 0 &i8259 7 2
+ f000 0 0 1 &i8259 7 2
+ f100 0 0 1 &i8259 7 2
// IDSEL 0x1f IDE/SATA
- f800 0 0 0 &i8259 e 2
- f900 0 0 0 &i8259 5 2
+ f800 0 0 1 &i8259 e 2
+ f900 0 0 1 &i8259 5 2
>;
pcie@0 {
clock-frequency = <1fca055>;
interrupt-parent = <&mpic>;
interrupts = <18 2>;
- interrupt-map-mask = <fb00 0 0 0>;
+ interrupt-map-mask = <ff00 0 0 7>;
interrupt-map = <
- /* IDSEL 0x11 - PCI slot 1 */
+ /* IDSEL 0x11 func 0 - PCI slot 1 */
8800 0 0 1 &mpic 2 1
8800 0 0 2 &mpic 3 1
8800 0 0 3 &mpic 4 1
8800 0 0 4 &mpic 1 1
- /* IDSEL 0x12 - PCI slot 2 */
+ /* IDSEL 0x11 func 1 - PCI slot 1 */
+ 8900 0 0 1 &mpic 2 1
+ 8900 0 0 2 &mpic 3 1
+ 8900 0 0 3 &mpic 4 1
+ 8900 0 0 4 &mpic 1 1
+
+ /* IDSEL 0x11 func 2 - PCI slot 1 */
+ 8a00 0 0 1 &mpic 2 1
+ 8a00 0 0 2 &mpic 3 1
+ 8a00 0 0 3 &mpic 4 1
+ 8a00 0 0 4 &mpic 1 1
+
+ /* IDSEL 0x11 func 3 - PCI slot 1 */
+ 8b00 0 0 1 &mpic 2 1
+ 8b00 0 0 2 &mpic 3 1
+ 8b00 0 0 3 &mpic 4 1
+ 8b00 0 0 4 &mpic 1 1
+
+ /* IDSEL 0x11 func 4 - PCI slot 1 */
+ 8c00 0 0 1 &mpic 2 1
+ 8c00 0 0 2 &mpic 3 1
+ 8c00 0 0 3 &mpic 4 1
+ 8c00 0 0 4 &mpic 1 1
+
+ /* IDSEL 0x11 func 5 - PCI slot 1 */
+ 8d00 0 0 1 &mpic 2 1
+ 8d00 0 0 2 &mpic 3 1
+ 8d00 0 0 3 &mpic 4 1
+ 8d00 0 0 4 &mpic 1 1
+
+ /* IDSEL 0x11 func 6 - PCI slot 1 */
+ 8e00 0 0 1 &mpic 2 1
+ 8e00 0 0 2 &mpic 3 1
+ 8e00 0 0 3 &mpic 4 1
+ 8e00 0 0 4 &mpic 1 1
+
+ /* IDSEL 0x11 func 7 - PCI slot 1 */
+ 8f00 0 0 1 &mpic 2 1
+ 8f00 0 0 2 &mpic 3 1
+ 8f00 0 0 3 &mpic 4 1
+ 8f00 0 0 4 &mpic 1 1
+
+ /* IDSEL 0x12 func 0 - PCI slot 2 */
9000 0 0 1 &mpic 3 1
9000 0 0 2 &mpic 4 1
9000 0 0 3 &mpic 1 1
9000 0 0 4 &mpic 2 1
+ /* IDSEL 0x12 func 1 - PCI slot 2 */
+ 9100 0 0 1 &mpic 3 1
+ 9100 0 0 2 &mpic 4 1
+ 9100 0 0 3 &mpic 1 1
+ 9100 0 0 4 &mpic 2 1
+
+ /* IDSEL 0x12 func 2 - PCI slot 2 */
+ 9200 0 0 1 &mpic 3 1
+ 9200 0 0 2 &mpic 4 1
+ 9200 0 0 3 &mpic 1 1
+ 9200 0 0 4 &mpic 2 1
+
+ /* IDSEL 0x12 func 3 - PCI slot 2 */
+ 9300 0 0 1 &mpic 3 1
+ 9300 0 0 2 &mpic 4 1
+ 9300 0 0 3 &mpic 1 1
+ 9300 0 0 4 &mpic 2 1
+
+ /* IDSEL 0x12 func 4 - PCI slot 2 */
+ 9400 0 0 1 &mpic 3 1
+ 9400 0 0 2 &mpic 4 1
+ 9400 0 0 3 &mpic 1 1
+ 9400 0 0 4 &mpic 2 1
+
+ /* IDSEL 0x12 func 5 - PCI slot 2 */
+ 9500 0 0 1 &mpic 3 1
+ 9500 0 0 2 &mpic 4 1
+ 9500 0 0 3 &mpic 1 1
+ 9500 0 0 4 &mpic 2 1
+
+ /* IDSEL 0x12 func 6 - PCI slot 2 */
+ 9600 0 0 1 &mpic 3 1
+ 9600 0 0 2 &mpic 4 1
+ 9600 0 0 3 &mpic 1 1
+ 9600 0 0 4 &mpic 2 1
+
+ /* IDSEL 0x12 func 7 - PCI slot 2 */
+ 9700 0 0 1 &mpic 3 1
+ 9700 0 0 2 &mpic 4 1
+ 9700 0 0 3 &mpic 1 1
+ 9700 0 0 4 &mpic 2 1
+
// IDSEL 0x1c USB
- e000 0 0 0 &i8259 c 2
- e100 0 0 0 &i8259 9 2
- e200 0 0 0 &i8259 a 2
- e300 0 0 0 &i8259 b 2
+ e000 0 0 1 &i8259 c 2
+ e100 0 0 1 &i8259 9 2
+ e200 0 0 1 &i8259 a 2
+ e300 0 0 1 &i8259 b 2
// IDSEL 0x1d Audio
- e800 0 0 0 &i8259 6 2
+ e800 0 0 1 &i8259 6 2
// IDSEL 0x1e Legacy
- f000 0 0 0 &i8259 7 2
- f100 0 0 0 &i8259 7 2
+ f000 0 0 1 &i8259 7 2
+ f100 0 0 1 &i8259 7 2
// IDSEL 0x1f IDE/SATA
- f800 0 0 0 &i8259 e 2
- f900 0 0 0 &i8259 5 2
+ f800 0 0 1 &i8259 e 2
+ f900 0 0 1 &i8259 5 2
>;
clock-frequency = <1fca055>;
interrupt-parent = <&mpic>;
interrupts = <18 2>;
- interrupt-map-mask = <fb00 0 0 0>;
+ interrupt-map-mask = <ff00 0 0 7>;
interrupt-map = <
- /* IDSEL 0x11 */
- 8800 0 0 1 &i8259 9 2
- 8800 0 0 2 &i8259 a 2
- 8800 0 0 3 &i8259 b 2
- 8800 0 0 4 &i8259 c 2
-
- /* IDSEL 0x12 */
- 9000 0 0 1 &i8259 a 2
- 9000 0 0 2 &i8259 b 2
- 9000 0 0 3 &i8259 c 2
- 9000 0 0 4 &i8259 9 2
+ /* IDSEL 0x11 func 0 - PCI slot 1 */
+ 8800 0 0 1 &mpic 2 1
+ 8800 0 0 2 &mpic 3 1
+ 8800 0 0 3 &mpic 4 1
+ 8800 0 0 4 &mpic 1 1
+
+ /* IDSEL 0x11 func 1 - PCI slot 1 */
+ 8900 0 0 1 &mpic 2 1
+ 8900 0 0 2 &mpic 3 1
+ 8900 0 0 3 &mpic 4 1
+ 8900 0 0 4 &mpic 1 1
+
+ /* IDSEL 0x11 func 2 - PCI slot 1 */
+ 8a00 0 0 1 &mpic 2 1
+ 8a00 0 0 2 &mpic 3 1
+ 8a00 0 0 3 &mpic 4 1
+ 8a00 0 0 4 &mpic 1 1
+
+ /* IDSEL 0x11 func 3 - PCI slot 1 */
+ 8b00 0 0 1 &mpic 2 1
+ 8b00 0 0 2 &mpic 3 1
+ 8b00 0 0 3 &mpic 4 1
+ 8b00 0 0 4 &mpic 1 1
+
+ /* IDSEL 0x11 func 4 - PCI slot 1 */
+ 8c00 0 0 1 &mpic 2 1
+ 8c00 0 0 2 &mpic 3 1
+ 8c00 0 0 3 &mpic 4 1
+ 8c00 0 0 4 &mpic 1 1
+
+ /* IDSEL 0x11 func 5 - PCI slot 1 */
+ 8d00 0 0 1 &mpic 2 1
+ 8d00 0 0 2 &mpic 3 1
+ 8d00 0 0 3 &mpic 4 1
+ 8d00 0 0 4 &mpic 1 1
+
+ /* IDSEL 0x11 func 6 - PCI slot 1 */
+ 8e00 0 0 1 &mpic 2 1
+ 8e00 0 0 2 &mpic 3 1
+ 8e00 0 0 3 &mpic 4 1
+ 8e00 0 0 4 &mpic 1 1
+
+ /* IDSEL 0x11 func 7 - PCI slot 1 */
+ 8f00 0 0 1 &mpic 2 1
+ 8f00 0 0 2 &mpic 3 1
+ 8f00 0 0 3 &mpic 4 1
+ 8f00 0 0 4 &mpic 1 1
+
+ /* IDSEL 0x12 func 0 - PCI slot 2 */
+ 9000 0 0 1 &mpic 3 1
+ 9000 0 0 2 &mpic 4 1
+ 9000 0 0 3 &mpic 1 1
+ 9000 0 0 4 &mpic 2 1
+
+ /* IDSEL 0x12 func 1 - PCI slot 2 */
+ 9100 0 0 1 &mpic 3 1
+ 9100 0 0 2 &mpic 4 1
+ 9100 0 0 3 &mpic 1 1
+ 9100 0 0 4 &mpic 2 1
+
+ /* IDSEL 0x12 func 2 - PCI slot 2 */
+ 9200 0 0 1 &mpic 3 1
+ 9200 0 0 2 &mpic 4 1
+ 9200 0 0 3 &mpic 1 1
+ 9200 0 0 4 &mpic 2 1
+
+ /* IDSEL 0x12 func 3 - PCI slot 2 */
+ 9300 0 0 1 &mpic 3 1
+ 9300 0 0 2 &mpic 4 1
+ 9300 0 0 3 &mpic 1 1
+ 9300 0 0 4 &mpic 2 1
+
+ /* IDSEL 0x12 func 4 - PCI slot 2 */
+ 9400 0 0 1 &mpic 3 1
+ 9400 0 0 2 &mpic 4 1
+ 9400 0 0 3 &mpic 1 1
+ 9400 0 0 4 &mpic 2 1
+
+ /* IDSEL 0x12 func 5 - PCI slot 2 */
+ 9500 0 0 1 &mpic 3 1
+ 9500 0 0 2 &mpic 4 1
+ 9500 0 0 3 &mpic 1 1
+ 9500 0 0 4 &mpic 2 1
+
+ /* IDSEL 0x12 func 6 - PCI slot 2 */
+ 9600 0 0 1 &mpic 3 1
+ 9600 0 0 2 &mpic 4 1
+ 9600 0 0 3 &mpic 1 1
+ 9600 0 0 4 &mpic 2 1
+
+ /* IDSEL 0x12 func 7 - PCI slot 2 */
+ 9700 0 0 1 &mpic 3 1
+ 9700 0 0 2 &mpic 4 1
+ 9700 0 0 3 &mpic 1 1
+ 9700 0 0 4 &mpic 2 1
// IDSEL 0x1c USB
- e000 0 0 0 &i8259 c 2
- e100 0 0 0 &i8259 9 2
- e200 0 0 0 &i8259 a 2
- e300 0 0 0 &i8259 b 2
+ e000 0 0 1 &i8259 c 2
+ e100 0 0 1 &i8259 9 2
+ e200 0 0 1 &i8259 a 2
+ e300 0 0 1 &i8259 b 2
// IDSEL 0x1d Audio
- e800 0 0 0 &i8259 6 2
+ e800 0 0 1 &i8259 6 2
// IDSEL 0x1e Legacy
- f000 0 0 0 &i8259 7 2
- f100 0 0 0 &i8259 7 2
+ f000 0 0 1 &i8259 7 2
+ f100 0 0 1 &i8259 7 2
// IDSEL 0x1f IDE/SATA
- f800 0 0 0 &i8259 e 2
- f900 0 0 0 &i8259 5 2
+ f800 0 0 1 &i8259 e 2
+ f900 0 0 1 &i8259 5 2
>;
pcie@0 {
if ((np = of_find_compatible_node(NULL, "network", "ucc_geth"))
!= NULL){
- /* Reset the Ethernet PHY */
- bcsr_regs[9] &= ~0x20;
+ /* Reset the Ethernet PHYs */
+#define BCSR8_FETH_RST 0x50
+ bcsr_regs[8] &= ~BCSR8_FETH_RST;
udelay(1000);
- bcsr_regs[9] |= 0x20;
+ bcsr_regs[8] |= BCSR8_FETH_RST;
iounmap(bcsr_regs);
of_node_put(np);
}
if ((np = of_find_compatible_node(NULL, "network", "ucc_geth"))
!= NULL){
+ uint svid;
+
/* Reset the Ethernet PHY */
- bcsr_regs[9] &= ~0x20;
+#define BCSR9_GETHRST 0x20
+ clrbits8(&bcsr_regs[9], BCSR9_GETHRST);
udelay(1000);
- bcsr_regs[9] |= 0x20;
+ setbits8(&bcsr_regs[9], BCSR9_GETHRST);
+
+ /* handle mpc8360ea rev.2.1 erratum 2: RGMII Timing */
+ svid = mfspr(SPRN_SVR);
+ if (svid == 0x80480021) {
+ void __iomem *immap;
+
+ immap = ioremap(get_immrbase() + 0x14a8, 8);
+
+ /*
+ * IMMR + 0x14A8[4:5] = 11 (clk delay for UCC 2)
+ * IMMR + 0x14A8[18:19] = 11 (clk delay for UCC 1)
+ */
+ setbits32(immap, 0x0c003000);
+
+ /*
+ * IMMR + 0x14AC[20:27] = 10101010
+ * (data delay for both UCC's)
+ */
+ clrsetbits_be32(immap + 4, 0xff0, 0xaa0);
+
+ iounmap(immap);
+ }
+
iounmap(bcsr_regs);
of_node_put(np);
}
-
#endif /* CONFIG_QUICC_ENGINE */
}
out_be32(immap + MPC83XX_SCCR_OFFS, temp);
/* Configure pin mux for ULPI. There is no pin mux for UTMI */
- if (!strcmp(prop, "ulpi")) {
+ if (prop && !strcmp(prop, "ulpi")) {
temp = in_be32(immap + MPC83XX_SICRL_OFFS);
temp &= ~MPC831X_SICRL_USB_MASK;
temp |= MPC831X_SICRL_USB_ULPI;
usb_regs = ioremap(res.start, res.end - res.start + 1);
/* Using on-chip PHY */
- if (!strcmp(prop, "utmi_wide") ||
- !strcmp(prop, "utmi")) {
+ if (prop && (!strcmp(prop, "utmi_wide") ||
+ !strcmp(prop, "utmi"))) {
/* Set UTMI_PHY_EN, REFSEL to 48MHZ */
out_be32(usb_regs + FSL_USB2_CONTROL_OFFS,
CONTROL_UTMI_PHY_EN | CONTROL_REFSEL_48MHZ);
/* Using external UPLI PHY */
- } else if (!strcmp(prop, "ulpi")) {
+ } else if (prop && !strcmp(prop, "ulpi")) {
/* Set PHY_CLK_SEL to ULPI */
temp = CONTROL_PHY_CLK_SEL_ULPI;
#ifdef CONFIG_USB_OTG
projects / linux-2.6-omap-h63xx.git / commitdiff