]> www.pilppa.org Git - linux-2.6-omap-h63xx.git/commitdiff
[MTD] [NAND] S3C2410 correctly set nFCE over resume
authorBen Dooks <ben-linux@fluff.org>
Mon, 19 Nov 2007 23:28:07 +0000 (23:28 +0000)
committerDavid Woodhouse <dwmw2@infradead.org>
Wed, 28 Nov 2007 11:57:45 +0000 (11:57 +0000)
Ensure the nFCE line is de-asserted over suspend and
then re-initialised when the system resumes. This is
to ensure that the NAND is kept in lowest power mode
over suspend (power settings are only specified for
nFCE inactive) as well as fixing the Simtec Osiris
which relies on nFCE being inactive.

Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
drivers/mtd/nand/s3c2410.c

index 66f76e9618ddd9005edcb60faf2b66ea2ec539b2..512acfc89012ca962915e870f0a0957c0e1f41ec 100644 (file)
@@ -120,6 +120,8 @@ struct s3c2410_nand_info {
        int                             sel_bit;
        int                             mtd_count;
 
+       unsigned long                   save_nfconf;
+
        enum s3c_cpu_type               cpu_type;
 };
 
@@ -810,6 +812,16 @@ static int s3c24xx_nand_suspend(struct platform_device *dev, pm_message_t pm)
        struct s3c2410_nand_info *info = platform_get_drvdata(dev);
 
        if (info) {
+               info->save_nfconf = readl(info->regs + S3C2410_NFCONF);
+
+               /* For the moment, we must ensure nFCE is high during
+                * the time we are suspended. This really should be
+                * handled by suspending the MTDs we are using, but
+                * that is currently not the case. */
+
+               writel(info->save_nfconf | info->sel_bit,
+                      info->regs + S3C2410_NFCONF);
+
                if (!allow_clk_stop(info))
                        clk_disable(info->clk);
        }
@@ -820,11 +832,19 @@ static int s3c24xx_nand_suspend(struct platform_device *dev, pm_message_t pm)
 static int s3c24xx_nand_resume(struct platform_device *dev)
 {
        struct s3c2410_nand_info *info = platform_get_drvdata(dev);
+       unsigned long nfconf;
 
        if (info) {
                clk_enable(info->clk);
                s3c2410_nand_inithw(info, dev);
 
+               /* Restore the state of the nFCE line. */
+
+               nfconf = readl(info->regs + S3C2410_NFCONF);
+               nfconf &= ~info->sel_bit;
+               nfconf |= info->save_nfconf & info->sel_bit;
+               writel(nfconf, info->regs + S3C2410_NFCONF);
+
                if (allow_clk_stop(info))
                        clk_disable(info->clk);
        }