DPLL3 dpll_data was missing idlest_* fields - add them.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
.recal_st_bit = OMAP3430_CORE_DPLL_ST_SHIFT,
.autoidle_reg = _OMAP34XX_CM_REGADDR(PLL_MOD, CM_AUTOIDLE),
.autoidle_mask = OMAP3430_AUTO_CORE_DPLL_MASK,
.recal_st_bit = OMAP3430_CORE_DPLL_ST_SHIFT,
.autoidle_reg = _OMAP34XX_CM_REGADDR(PLL_MOD, CM_AUTOIDLE),
.autoidle_mask = OMAP3430_AUTO_CORE_DPLL_MASK,
+ .idlest_reg = _OMAP34XX_CM_REGADDR(PLL_MOD, CM_IDLEST),
+ .idlest_mask = OMAP3430_ST_CORE_CLK_MASK,
.max_multiplier = OMAP3_MAX_DPLL_MULT,
.max_divider = OMAP3_MAX_DPLL_DIV,
.rate_tolerance = DEFAULT_DPLL_RATE_TOLERANCE
.max_multiplier = OMAP3_MAX_DPLL_MULT,
.max_divider = OMAP3_MAX_DPLL_DIV,
.rate_tolerance = DEFAULT_DPLL_RATE_TOLERANCE