Removed sparse warnings from tg3 driver. The new logic seems fine (I
don't immediately see where we are running over values for any of the
variables that need to be saved).
This patch compiles fine and I'm currently using a tg3 with the patched
driver to post this patch as a basic proof of concept.
Signed-off-by: Andy Gospodarek <andy@greyhouse.net>
Signed-off-by: David S. Miller <davem@davemloft.net>
pci_write_config_dword(tp->pdev, TG3PCI_X_CAPS, val);
if (tp->tg3_flags2 & TG3_FLG2_5780_CLASS) {
pci_write_config_dword(tp->pdev, TG3PCI_X_CAPS, val);
if (tp->tg3_flags2 & TG3_FLG2_5780_CLASS) {
/* Chip reset on 5780 will reset MSI enable bit,
* so need to restore it.
/* Chip reset on 5780 will reset MSI enable bit,
* so need to restore it.
tw32(GRC_MODE, tp->grc_mode);
if (tp->pci_chip_rev_id == CHIPREV_ID_5705_A0) {
tw32(GRC_MODE, tp->grc_mode);
if (tp->pci_chip_rev_id == CHIPREV_ID_5705_A0) {
tw32(0xc4, val | (1 << 15));
}
tw32(0xc4, val | (1 << 15));
}
if ((tp->tg3_flags2 & TG3_FLG2_PCI_EXPRESS) &&
tp->pci_chip_rev_id != CHIPREV_ID_5750_A0) {
if ((tp->tg3_flags2 & TG3_FLG2_PCI_EXPRESS) &&
tp->pci_chip_rev_id != CHIPREV_ID_5750_A0) {
- u32 val = tr32(0x7c00);
tw32(0x7c00, val | (1 << 25));
}
tw32(0x7c00, val | (1 << 25));
}
buf = data;
if (b_offset || odd_len) {
buf = kmalloc(len, GFP_KERNEL);
buf = data;
if (b_offset || odd_len) {
buf = kmalloc(len, GFP_KERNEL);
return -ENOMEM;
if (b_offset)
memcpy(buf, &start, 4);
return -ENOMEM;
if (b_offset)
memcpy(buf, &start, 4);
static int tg3_test_nvram(struct tg3 *tp)
{
u32 *buf, csum, magic;
static int tg3_test_nvram(struct tg3 *tp)
{
u32 *buf, csum, magic;
- int i, j, err = 0, size;
+ int i, j, k, err = 0, size;
if (tg3_nvram_read_swab(tp, 0, &magic) != 0)
return -EIO;
if (tg3_nvram_read_swab(tp, 0, &magic) != 0)
return -EIO;
u8 data[NVRAM_SELFBOOT_DATA_SIZE];
u8 parity[NVRAM_SELFBOOT_DATA_SIZE];
u8 *buf8 = (u8 *) buf;
u8 data[NVRAM_SELFBOOT_DATA_SIZE];
u8 parity[NVRAM_SELFBOOT_DATA_SIZE];
u8 *buf8 = (u8 *) buf;
/* Separate the parity bits and the data bytes. */
for (i = 0, j = 0, k = 0; i < NVRAM_SELFBOOT_HW_SIZE; i++) {
/* Separate the parity bits and the data bytes. */
for (i = 0, j = 0, k = 0; i < NVRAM_SELFBOOT_HW_SIZE; i++) {
*/
if (GET_CHIP_REV(tp->pci_chip_rev_id) == CHIPREV_5700_BX) {
u32 pm_reg;
*/
if (GET_CHIP_REV(tp->pci_chip_rev_id) == CHIPREV_5700_BX) {
u32 pm_reg;
tp->tg3_flags |= TG3_FLAG_PCIX_TARGET_HWBUG;
tp->tg3_flags |= TG3_FLAG_PCIX_TARGET_HWBUG;
INIT_WORK(&tp->reset_task, tg3_reset_task);
tp->regs = ioremap_nocache(tg3reg_base, tg3reg_len);
INIT_WORK(&tp->reset_task, tg3_reset_task);
tp->regs = ioremap_nocache(tg3reg_base, tg3reg_len);
printk(KERN_ERR PFX "Cannot map device registers, "
"aborting.\n");
err = -ENOMEM;
printk(KERN_ERR PFX "Cannot map device registers, "
"aborting.\n");
err = -ENOMEM;