Thanks to Sidney Matias <sidney.matias@gmail.com> for getting GPIO
values and testing on this device.
Cc: Sidney Matias <sidney.matias@gmail.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
71 -> Omicom SS4 DVB-S/S2 PCI [A044:2011]
72 -> TBS 8920 DVB-S/S2 [8920:8888]
73 -> TeVii S420 DVB-S [d420:9022]
71 -> Omicom SS4 DVB-S/S2 PCI [A044:2011]
72 -> TBS 8920 DVB-S/S2 [8920:8888]
73 -> TeVii S420 DVB-S [d420:9022]
+ 74 -> Prolink Pixelview Global Extreme [1554:4976]
+ [CX88_BOARD_PROLINK_PV_GLOBAL_XTREME] = {
+ .name = "Prolink Pixelview Global Extreme",
+ .tuner_type = TUNER_XC2028,
+ .tuner_addr = 0x61,
+ .input = { {
+ .type = CX88_VMUX_TELEVISION,
+ .vmux = 0,
+ .gpio0 = 0x04fb,
+ .gpio1 = 0x04080,
+ .gpio2 = 0x0cf7,
+ }, {
+ .type = CX88_VMUX_COMPOSITE1,
+ .vmux = 1,
+ .gpio0 = 0x04fb,
+ .gpio1 = 0x04080,
+ .gpio2 = 0x0cfb,
+ }, {
+ .type = CX88_VMUX_SVIDEO,
+ .vmux = 2,
+ .gpio0 = 0x04fb,
+ .gpio1 = 0x04080,
+ .gpio2 = 0x0cfb,
+ } },
+ .radio = {
+ .type = CX88_RADIO,
+ .gpio0 = 0x04ff,
+ .gpio1 = 0x04080,
+ .gpio2 = 0x0cf7,
+ },
+ },
/* Both radio, analog and ATSC work with this board.
However, for analog to work, s5h1409 gate should be open,
otherwise, tuner-xc3028 won't be detected.
/* Both radio, analog and ATSC work with this board.
However, for analog to work, s5h1409 gate should be open,
otherwise, tuner-xc3028 won't be detected.
.subvendor = 0x1554,
.subdevice = 0x4935,
.card = CX88_BOARD_PROLINK_PV_8000GT,
.subvendor = 0x1554,
.subdevice = 0x4935,
.card = CX88_BOARD_PROLINK_PV_8000GT,
+ }, {
+ .subvendor = 0x1554,
+ .subdevice = 0x4976,
+ .card = CX88_BOARD_PROLINK_PV_GLOBAL_XTREME,
}, {
.subvendor = 0x17de,
.subdevice = 0x08c1,
}, {
.subvendor = 0x17de,
.subdevice = 0x08c1,
return cx88_xc3028_geniatech_tuner_callback(core,
command, arg);
case CX88_BOARD_PROLINK_PV_8000GT:
return cx88_xc3028_geniatech_tuner_callback(core,
command, arg);
case CX88_BOARD_PROLINK_PV_8000GT:
+ case CX88_BOARD_PROLINK_PV_GLOBAL_XTREME:
return cx88_pv_8000gt_callback(core, command, arg);
case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PRO:
case CX88_BOARD_DVICO_FUSIONHDTV_5_PCI_NANO:
return cx88_pv_8000gt_callback(core, command, arg);
case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PRO:
case CX88_BOARD_DVICO_FUSIONHDTV_5_PCI_NANO:
+ case CX88_BOARD_PROLINK_PV_GLOBAL_XTREME:
case CX88_BOARD_PROLINK_PV_8000GT:
cx_write(MO_GP2_IO, 0xcf7);
mdelay(50);
case CX88_BOARD_PROLINK_PV_8000GT:
cx_write(MO_GP2_IO, 0xcf7);
mdelay(50);
case CX88_BOARD_DVICO_FUSIONHDTV_5_PCI_NANO:
ctl->demod = XC3028_FE_OREN538;
break;
case CX88_BOARD_DVICO_FUSIONHDTV_5_PCI_NANO:
ctl->demod = XC3028_FE_OREN538;
break;
+ case CX88_BOARD_PROLINK_PV_GLOBAL_XTREME:
case CX88_BOARD_PROLINK_PV_8000GT:
/*
case CX88_BOARD_PROLINK_PV_8000GT:
/*
- * This board uses non-MTS firmware
+ * Those boards uses non-MTS firmware
ir->polling = 1; /* ms */
break;
case CX88_BOARD_PROLINK_PV_8000GT:
ir->polling = 1; /* ms */
break;
case CX88_BOARD_PROLINK_PV_8000GT:
+ case CX88_BOARD_PROLINK_PV_GLOBAL_XTREME:
ir_codes = ir_codes_pixelview_new;
ir->gpio_addr = MO_GP1_IO;
ir->mask_keycode = 0x3f;
ir_codes = ir_codes_pixelview_new;
ir->gpio_addr = MO_GP1_IO;
ir->mask_keycode = 0x3f;
#define CX88_BOARD_OMICOM_SS4_PCI 71
#define CX88_BOARD_TBS_8920 72
#define CX88_BOARD_TEVII_S420 73
#define CX88_BOARD_OMICOM_SS4_PCI 71
#define CX88_BOARD_TBS_8920 72
#define CX88_BOARD_TEVII_S420 73
+#define CX88_BOARD_PROLINK_PV_GLOBAL_XTREME 74
enum cx88_itype {
CX88_VMUX_COMPOSITE1 = 1,
enum cx88_itype {
CX88_VMUX_COMPOSITE1 = 1,