-#define SET_VCC_VPP(VCC, VPP, SLOT)\
- ((((VCC)<<2) | ((VPP)<<0)) << ((SLOT)*8))
-
-
-/* PCI PB1000 specific defines */
-/* The reason these defines are here instead of au1000.h is because
- * the Au1000 does not have a PCI bus controller so the PCI implementation
- * on the some of the older Pb1000 boards was very board specific.
- */
-#define PCI_CONFIG_BASE 0xBA020000 /* the only external slot */
-
-#define SDRAM_DEVID 0xBA010000
-#define SDRAM_CMD 0xBA010004
-#define SDRAM_CLASS 0xBA010008
-#define SDRAM_MISC 0xBA01000C
-#define SDRAM_MBAR 0xBA010010
-
-#define PCI_IO_DATA_PORT 0xBA800000
-
-#define PCI_IO_ADDR 0xBE00001C
-#define PCI_INT_ACK 0xBBC00000
-#define PCI_IO_READ 0xBBC00020
-#define PCI_IO_WRITE 0xBBC00030
-
-#define PCI_BRIDGE_CONFIG 0xBE000018
-
-#define PCI_IO_START 0x10000000
-#define PCI_IO_END 0x1000ffff
-#define PCI_MEM_START 0x18000000
-#define PCI_MEM_END 0x18ffffff
-
-#define PCI_FIRST_DEVFN 0
-#define PCI_LAST_DEVFN 1
-
-static inline u8 au_pci_io_readb(u32 addr)
-{
- writel(addr, PCI_IO_ADDR);
- writel((readl(PCI_BRIDGE_CONFIG) & 0xffffcfff) | (1<<12), PCI_BRIDGE_CONFIG);
- return (readl(PCI_IO_DATA_PORT) & 0xff);
-}
-
-static inline u16 au_pci_io_readw(u32 addr)
-{
- writel(addr, PCI_IO_ADDR);
- writel((readl(PCI_BRIDGE_CONFIG) & 0xffffcfff) | (1<<13), PCI_BRIDGE_CONFIG);
- return (readl(PCI_IO_DATA_PORT) & 0xffff);
-}
-
-static inline u32 au_pci_io_readl(u32 addr)
-{
- writel(addr, PCI_IO_ADDR);
- writel((readl(PCI_BRIDGE_CONFIG) & 0xffffcfff), PCI_BRIDGE_CONFIG);
- return readl(PCI_IO_DATA_PORT);
-}
-
-static inline void au_pci_io_writeb(u8 val, u32 addr)
-{
- writel(addr, PCI_IO_ADDR);
- writel((readl(PCI_BRIDGE_CONFIG) & 0xffffcfff) | (1<<12), PCI_BRIDGE_CONFIG);
- writel(val, PCI_IO_DATA_PORT);
-}
-
-static inline void au_pci_io_writew(u16 val, u32 addr)
-{
- writel(addr, PCI_IO_ADDR);
- writel((readl(PCI_BRIDGE_CONFIG) & 0xffffcfff) | (1<<13), PCI_BRIDGE_CONFIG);
- writel(val, PCI_IO_DATA_PORT);
-}
-
-static inline void au_pci_io_writel(u32 val, u32 addr)
-{
- writel(addr, PCI_IO_ADDR);
- writel(readl(PCI_BRIDGE_CONFIG) & 0xffffcfff, PCI_BRIDGE_CONFIG);
- writel(val, PCI_IO_DATA_PORT);
-}
-
-static inline void set_sdram_extbyte(void)
-{
- writel(readl(PCI_BRIDGE_CONFIG) & 0xffffff00, PCI_BRIDGE_CONFIG);
-}
-
-static inline void set_slot_extbyte(void)
-{
- writel((readl(PCI_BRIDGE_CONFIG) & 0xffffbf00) | 0x18, PCI_BRIDGE_CONFIG);
-}