Add VPLL2 to the set of twl4030-family regulators exposed for
use by various drivers. It's commonly used to power the digital
video outputs (e.g. LCD or DVI displays) on OMAP3 systems.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Liam Girdwood <lrg@slimlogic.co.uk>
/* maybe add LDOs that are omitted on cost-reduced parts */
if (twl_has_regulator() && !(features & TPS_SUBSET)) {
/* maybe add LDOs that are omitted on cost-reduced parts */
if (twl_has_regulator() && !(features & TPS_SUBSET)) {
child = add_regulator(TWL4030_REG_VPLL2, pdata->vpll2);
if (IS_ERR(child))
return PTR_ERR(child);
child = add_regulator(TWL4030_REG_VPLL2, pdata->vpll2);
if (IS_ERR(child))
return PTR_ERR(child);
child = add_regulator(TWL4030_REG_VMMC2, pdata->vmmc2);
if (IS_ERR(child))
child = add_regulator(TWL4030_REG_VMMC2, pdata->vmmc2);
if (IS_ERR(child))
TWL_ADJUSTABLE_LDO(VMMC2, 0x2b, 6),
/*
TWL_ADJUSTABLE_LDO(VPLL1, 0x2f, 7),
TWL_ADJUSTABLE_LDO(VMMC2, 0x2b, 6),
/*
TWL_ADJUSTABLE_LDO(VPLL1, 0x2f, 7),
- TWL_ADJUSTABLE_LDO(VPLL2, 0x33, 8),
+ TWL_ADJUSTABLE_LDO(VPLL2, 0x33, 8),
TWL_ADJUSTABLE_LDO(VSIM, 0x37, 9),
TWL_ADJUSTABLE_LDO(VDAC, 0x3b, 10),
/*
TWL_ADJUSTABLE_LDO(VSIM, 0x37, 9),
TWL_ADJUSTABLE_LDO(VDAC, 0x3b, 10),
/*