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da6320b)
- Codec doesn't support to configure bit clock and frame sync polarities
- Codec doesn't support DSP_A format but DSP_B with inverted bit clock
polarity
- Match also other formats with their signal polarities
Signed-off-by: Jarkko Nikula <jarkko.nikula@nokia.com>
Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Takashi Iwai <tiwai@suse.de>
- /* interface format */
- switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
- case SND_SOC_DAIFMT_I2S:
+ /*
+ * match both interface format and signal polarities since they
+ * are fixed
+ */
+ switch (fmt & (SND_SOC_DAIFMT_FORMAT_MASK |
+ SND_SOC_DAIFMT_INV_MASK)) {
+ case (SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF):
- case SND_SOC_DAIFMT_DSP_A:
+ case (SND_SOC_DAIFMT_DSP_B | SND_SOC_DAIFMT_IB_NF):
iface_breg |= (0x01 << 6);
break;
iface_breg |= (0x01 << 6);
break;
- case SND_SOC_DAIFMT_RIGHT_J:
+ case (SND_SOC_DAIFMT_RIGHT_J | SND_SOC_DAIFMT_NB_NF):
iface_breg |= (0x02 << 6);
break;
iface_breg |= (0x02 << 6);
break;
- case SND_SOC_DAIFMT_LEFT_J:
+ case (SND_SOC_DAIFMT_LEFT_J | SND_SOC_DAIFMT_NB_NF):
iface_breg |= (0x03 << 6);
break;
default:
iface_breg |= (0x03 << 6);
break;
default: