]> www.pilppa.org Git - linux-2.6-omap-h63xx.git/blobdiff - sound/pci/hda/hda_intel.c
ALSA: hda - Align BDL position adjustment parameter
[linux-2.6-omap-h63xx.git] / sound / pci / hda / hda_intel.c
index ddae3c479a8883195805a899bc5a16e41e37a620..ef9f072b47fcc65749729d22fa8e1390c1f8a8de 100644 (file)
@@ -55,7 +55,7 @@ static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;
 static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;
 static char *model[SNDRV_CARDS];
 static int position_fix[SNDRV_CARDS];
-static int bdl_pos_adj[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS-1)] = 1};
+static int bdl_pos_adj[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS-1)] = -1};
 static int probe_mask[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS-1)] = -1};
 static int single_cmd;
 static int enable_msi;
@@ -374,6 +374,7 @@ struct azx {
        unsigned int single_cmd :1;
        unsigned int polling_mode :1;
        unsigned int msi :1;
+       unsigned int irq_pending_warned :1;
 
        /* for debugging */
        unsigned int last_cmd;  /* last issued command (to sync) */
@@ -439,11 +440,6 @@ static char *driver_short_names[] __devinitdata = {
 /* for pcm support */
 #define get_azx_dev(substream) (substream->runtime->private_data)
 
-/* Get the upper 32bit of the given dma_addr_t
- * Compiler should optimize and eliminate the code if dma_addr_t is 32bit
- */
-#define upper_32bit(addr) (sizeof(addr) > 4 ? (u32)((addr) >> 32) : (u32)0)
-
 static int azx_acquire_irq(struct azx *chip, int do_disconnect);
 
 /*
@@ -474,7 +470,7 @@ static void azx_init_cmd_io(struct azx *chip)
        chip->corb.addr = chip->rb.addr;
        chip->corb.buf = (u32 *)chip->rb.area;
        azx_writel(chip, CORBLBASE, (u32)chip->corb.addr);
-       azx_writel(chip, CORBUBASE, upper_32bit(chip->corb.addr));
+       azx_writel(chip, CORBUBASE, upper_32_bits(chip->corb.addr));
 
        /* set the corb size to 256 entries (ULI requires explicitly) */
        azx_writeb(chip, CORBSIZE, 0x02);
@@ -489,7 +485,7 @@ static void azx_init_cmd_io(struct azx *chip)
        chip->rirb.addr = chip->rb.addr + 2048;
        chip->rirb.buf = (u32 *)(chip->rb.area + 2048);
        azx_writel(chip, RIRBLBASE, (u32)chip->rirb.addr);
-       azx_writel(chip, RIRBUBASE, upper_32bit(chip->rirb.addr));
+       azx_writel(chip, RIRBUBASE, upper_32_bits(chip->rirb.addr));
 
        /* set the rirb size to 256 entries (ULI requires explicitly) */
        azx_writeb(chip, RIRBSIZE, 0x02);
@@ -860,7 +856,7 @@ static void azx_init_chip(struct azx *chip)
 
        /* program the position buffer */
        azx_writel(chip, DPLBASE, (u32)chip->posbuf.addr);
-       azx_writel(chip, DPUBASE, upper_32bit(chip->posbuf.addr));
+       azx_writel(chip, DPUBASE, upper_32_bits(chip->posbuf.addr));
 
        chip->initialized = 1;
 }
@@ -1005,7 +1001,7 @@ static int setup_bdle(struct snd_pcm_substream *substream,
                addr = snd_pcm_sgbuf_get_addr(sgbuf, ofs);
                /* program the address field of the BDL entry */
                bdl[0] = cpu_to_le32((u32)addr);
-               bdl[1] = cpu_to_le32(upper_32bit(addr));
+               bdl[1] = cpu_to_le32(upper_32_bits(addr));
                /* program the size field of the BDL entry */
                chunk = PAGE_SIZE - (ofs % PAGE_SIZE);
                if (size < chunk)
@@ -1051,9 +1047,13 @@ static int azx_setup_periods(struct azx *chip,
        pos_adj = bdl_pos_adj[chip->dev_index];
        if (pos_adj > 0) {
                struct snd_pcm_runtime *runtime = substream->runtime;
+               int pos_align = pos_adj;
                pos_adj = (pos_adj * runtime->rate + 47999) / 48000;
                if (!pos_adj)
-                       pos_adj = 1;
+                       pos_adj = pos_align;
+               else
+                       pos_adj = ((pos_adj + pos_align - 1) / pos_align) *
+                               pos_align;
                pos_adj = frames_to_bytes(runtime, pos_adj);
                if (pos_adj >= period_bytes) {
                        snd_printk(KERN_WARNING "Too big adjustment %d\n",
@@ -1137,7 +1137,7 @@ static int azx_setup_controller(struct azx *chip, struct azx_dev *azx_dev)
        /* lower BDL address */
        azx_sd_writel(azx_dev, SD_BDLPL, (u32)azx_dev->bdl.addr);
        /* upper BDL address */
-       azx_sd_writel(azx_dev, SD_BDLPU, upper_32bit(azx_dev->bdl.addr));
+       azx_sd_writel(azx_dev, SD_BDLPU, upper_32_bits(azx_dev->bdl.addr));
 
        /* enable the position buffer */
        if (chip->position_fix == POS_FIX_POSBUF ||
@@ -1562,6 +1562,14 @@ static void azx_irq_pending_work(struct work_struct *work)
        struct azx *chip = container_of(work, struct azx, irq_pending_work);
        int i, pending;
 
+       if (!chip->irq_pending_warned) {
+               printk(KERN_WARNING
+                      "hda-intel: IRQ timing workaround is activated "
+                      "for card #%d. Suggest a bigger bdl_pos_adj.\n",
+                      chip->card->number);
+               chip->irq_pending_warned = 1;
+       }
+
        for (;;) {
                pending = 0;
                spin_lock_irq(&chip->reg_lock);
@@ -2013,6 +2021,17 @@ static int __devinit azx_create(struct snd_card *card, struct pci_dev *pci,
 
        chip->single_cmd = single_cmd;
 
+       if (bdl_pos_adj[dev] < 0) {
+               switch (chip->driver_type) {
+               case AZX_DRIVER_ICH:
+                       bdl_pos_adj[dev] = 1;
+                       break;
+               default:
+                       bdl_pos_adj[dev] = 32;
+                       break;
+               }
+       }
+
 #if BITS_PER_LONG != 64
        /* Fix up base address on ULI M5461 */
        if (chip->driver_type == AZX_DRIVER_ULI) {