]> www.pilppa.org Git - linux-2.6-omap-h63xx.git/blobdiff - sound/pci/hda/hda_intel.c
ALSA: hda - check page continuity
[linux-2.6-omap-h63xx.git] / sound / pci / hda / hda_intel.c
index a73d6ca0a90655104c48b7ea50b4089815de5b70..4f80248837e57e0faff8654a3bc9b5be3027da2d 100644 (file)
@@ -278,6 +278,9 @@ enum {
 /* Defines for Nvidia HDA support */
 #define NVIDIA_HDA_TRANSREG_ADDR      0x4e
 #define NVIDIA_HDA_ENABLE_COHBITS     0x0f
+#define NVIDIA_HDA_ISTRM_COH          0x4d
+#define NVIDIA_HDA_OSTRM_COH          0x4c
+#define NVIDIA_HDA_ENABLE_COHBIT      0x01
 
 /* Defines for Intel SCH HDA snoop control */
 #define INTEL_SCH_HDA_DEVC      0x78
@@ -900,6 +903,12 @@ static void azx_init_pci(struct azx *chip)
                update_pci_byte(chip->pci,
                                NVIDIA_HDA_TRANSREG_ADDR,
                                0x0f, NVIDIA_HDA_ENABLE_COHBITS);
+               update_pci_byte(chip->pci,
+                               NVIDIA_HDA_ISTRM_COH,
+                               0x01, NVIDIA_HDA_ENABLE_COHBIT);
+               update_pci_byte(chip->pci,
+                               NVIDIA_HDA_OSTRM_COH,
+                               0x01, NVIDIA_HDA_ENABLE_COHBIT);
                break;
        case AZX_DRIVER_SCH:
                pci_read_config_word(chip->pci, INTEL_SCH_HDA_DEVC, &snoop);
@@ -989,7 +998,6 @@ static int setup_bdle(struct snd_pcm_substream *substream,
                      struct azx_dev *azx_dev, u32 **bdlp,
                      int ofs, int size, int with_ioc)
 {
-       struct snd_sg_buf *sgbuf = snd_pcm_substream_sgbuf(substream);
        u32 *bdl = *bdlp;
 
        while (size > 0) {
@@ -999,14 +1007,12 @@ static int setup_bdle(struct snd_pcm_substream *substream,
                if (azx_dev->frags >= AZX_MAX_BDL_ENTRIES)
                        return -EINVAL;
 
-               addr = snd_pcm_sgbuf_get_addr(sgbuf, ofs);
+               addr = snd_pcm_sgbuf_get_addr(substream, ofs);
                /* program the address field of the BDL entry */
                bdl[0] = cpu_to_le32((u32)addr);
                bdl[1] = cpu_to_le32(upper_32_bits(addr));
                /* program the size field of the BDL entry */
-               chunk = PAGE_SIZE - (ofs % PAGE_SIZE);
-               if (size < chunk)
-                       chunk = size;
+               chunk = snd_pcm_sgbuf_get_chunk_size(substream, ofs, size);
                bdl[2] = cpu_to_le32(chunk);
                /* program the IOC to enable interrupt
                 * only when the whole fragment is processed
@@ -1550,6 +1556,8 @@ static int azx_position_ok(struct azx *chip, struct azx_dev *azx_dev)
                        chip->position_fix = POS_FIX_POSBUF;
        }
 
+       if (!bdl_pos_adj[chip->dev_index])
+               return 1; /* no delayed ack */
        if (pos % azx_dev->period_bytes > azx_dev->period_bytes / 2)
                return 0; /* NG - it's below the period boundary */
        return 1; /* OK, it's fine */
@@ -1637,7 +1645,8 @@ static int __devinit create_codec_pcm(struct azx *chip, struct hda_codec *codec,
        if (!cpcm->stream[0].substreams && !cpcm->stream[1].substreams)
                return 0;
 
-       snd_assert(cpcm->name, return -EINVAL);
+       if (snd_BUG_ON(!cpcm->name))
+               return -EINVAL;
 
        err = snd_pcm_new(chip->card, cpcm->name, cpcm->device,
                          cpcm->stream[0].substreams,
@@ -1661,7 +1670,7 @@ static int __devinit create_codec_pcm(struct azx *chip, struct hda_codec *codec,
                snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &azx_pcm_ops);
        snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV_SG,
                                              snd_dma_pci_data(chip->pci),
-                                             1024 * 64, 1024 * 1024);
+                                             1024 * 64, 32 * 1024 * 1024);
        chip->pcm[cpcm->device] = pcm;
        return 0;
 }