Merge branch 'x86/header-guards' into x86-v28-for-linus-phase1

[linux-2.6-omap-h63xx.git] / include / asm-x86 / mach-summit / mach_apic.h

diff --git a/include/asm-x86/mach-summit/mach_apic.h b/include/asm-x86/mach-summit/mach_apic.h
index 1f76c2e7023226656aeb48539c4985a25af339c9..7a66758d701d858fc6373c505d2076a698dc41b6 100644 (file)
--- a/include/asm-x86/mach-summit/mach_apic.h
+++ b/include/asm-x86/mach-summit/mach_apic.h
@@ -1,5 +1,5 @@
-#ifndef __ASM_MACH_APIC_H
-#define __ASM_MACH_APIC_H
+#ifndef ASM_X86__MACH_SUMMIT__MACH_APIC_H
+#define ASM_X86__MACH_SUMMIT__MACH_APIC_H
 
 #include <asm/smp.h>
 
@@ -63,10 +63,10 @@ static inline void init_apic_ldr(void)
         * BIOS puts 5 CPUs in one APIC cluster, we're hosed. */
        BUG_ON(count >= XAPIC_DEST_CPUS_SHIFT);
        id = my_cluster | (1UL << count);
-       apic_write_around(APIC_DFR, APIC_DFR_VALUE);
+       apic_write(APIC_DFR, APIC_DFR_VALUE);
        val = apic_read(APIC_LDR) & ~APIC_LDR_MASK;
        val |= SET_APIC_LOGICAL_ID(id);
-       apic_write_around(APIC_LDR, val);
+       apic_write(APIC_LDR, val);
 }
 
 static inline int multi_timer_check(int apic, int irq)
@@ -122,7 +122,7 @@ static inline physid_mask_t ioapic_phys_id_map(physid_mask_t phys_id_map)
 
 static inline physid_mask_t apicid_to_cpu_present(int apicid)
 {
-       return physid_mask_of_physid(0);
+       return physid_mask_of_physid(apicid);
 }
 
 static inline void setup_portio_remap(void)
@@ -182,4 +182,4 @@ static inline u32 phys_pkg_id(u32 cpuid_apic, int index_msb)
        return hard_smp_processor_id() >> index_msb;
 }
 
-#endif /* __ASM_MACH_APIC_H */
+#endif /* ASM_X86__MACH_SUMMIT__MACH_APIC_H */