Merge branch 'x86/cpu' into x86/core

[linux-2.6-omap-h63xx.git] / include / asm-x86 / atomic_64.h

diff --git a/include/asm-x86/atomic_64.h b/include/asm-x86/atomic_64.h
index 3e0cd7d3833569bab88b4e7414201aafa0d0dab2..2cb218c4a356ce332b2e887b88e8d146e602fe84 100644 (file)
--- a/include/asm-x86/atomic_64.h
+++ b/include/asm-x86/atomic_64.h
@@ -1,5 +1,5 @@
-#ifndef __ARCH_X86_64_ATOMIC__
-#define __ARCH_X86_64_ATOMIC__
+#ifndef ASM_X86__ATOMIC_64_H
+#define ASM_X86__ATOMIC_64_H
 
 #include <asm/alternative.h>
 #include <asm/cmpxchg.h>
@@ -11,12 +11,6 @@
  * resource counting etc..
  */
 
-#ifdef CONFIG_SMP
-#define LOCK "lock ; "
-#else
-#define LOCK ""
-#endif
-
 /*
  * Make sure gcc doesn't try to be clever and move things around
  * on us. We need to use _exactly_ the address the user gave us,
@@ -234,7 +228,7 @@ static inline void atomic64_add(long i, atomic64_t *v)
 {
        asm volatile(LOCK_PREFIX "addq %1,%0"
                     : "=m" (v->counter)
-                    : "ir" (i), "m" (v->counter));
+                    : "er" (i), "m" (v->counter));
 }
 
 /**
@@ -248,7 +242,7 @@ static inline void atomic64_sub(long i, atomic64_t *v)
 {
        asm volatile(LOCK_PREFIX "subq %1,%0"
                     : "=m" (v->counter)
-                    : "ir" (i), "m" (v->counter));
+                    : "er" (i), "m" (v->counter));
 }
 
 /**
@@ -266,7 +260,7 @@ static inline int atomic64_sub_and_test(long i, atomic64_t *v)
 
        asm volatile(LOCK_PREFIX "subq %2,%0; sete %1"
                     : "=m" (v->counter), "=qm" (c)
-                    : "ir" (i), "m" (v->counter) : "memory");
+                    : "er" (i), "m" (v->counter) : "memory");
        return c;
 }
 
@@ -347,7 +341,7 @@ static inline int atomic64_add_negative(long i, atomic64_t *v)
 
        asm volatile(LOCK_PREFIX "addq %2,%0; sets %1"
                     : "=m" (v->counter), "=qm" (c)
-                    : "ir" (i), "m" (v->counter) : "memory");
+                    : "er" (i), "m" (v->counter) : "memory");
        return c;
 }
 
@@ -431,6 +425,32 @@ static inline int atomic64_add_unless(atomic64_t *v, long a, long u)
        return c != (u);
 }
 
+/**
+ * atomic_inc_short - increment of a short integer
+ * @v: pointer to type int
+ *
+ * Atomically adds 1 to @v
+ * Returns the new value of @u
+ */
+static inline short int atomic_inc_short(short int *v)
+{
+       asm(LOCK_PREFIX "addw $1, %0" : "+m" (*v));
+       return *v;
+}
+
+/**
+ * atomic_or_long - OR of two long integers
+ * @v1: pointer to type unsigned long
+ * @v2: pointer to type unsigned long
+ *
+ * Atomically ORs @v1 and @v2
+ * Returns the result of the OR
+ */
+static inline void atomic_or_long(unsigned long *v1, unsigned long v2)
+{
+       asm(LOCK_PREFIX "orq %1, %0" : "+m" (*v1) : "r" (v2));
+}
+
 #define atomic64_inc_not_zero(v) atomic64_add_unless((v), 1, 0)
 
 /* These are x86-specific, used by some header files */
@@ -450,4 +470,4 @@ static inline int atomic64_add_unless(atomic64_t *v, long a, long u)
 #define smp_mb__after_atomic_inc()     barrier()
 
 #include <asm-generic/atomic.h>
-#endif
+#endif /* ASM_X86__ATOMIC_64_H */