[POWERPC] Fix rmb to order cacheable vs. noncacheable

[linux-2.6-omap-h63xx.git] / include / asm-powerpc / system.h

diff --git a/include/asm-powerpc/system.h b/include/asm-powerpc/system.h
index 2b6559a6d113d6e883887ff6766be4989ed54dcb..5235f875b932ad247dd5b9eff1e1d76105a995aa 100644 (file)
--- a/include/asm-powerpc/system.h
+++ b/include/asm-powerpc/system.h
@@ -34,7 +34,7 @@
  * SMP since it is only used to order updates to system memory.
  */
 #define mb()   __asm__ __volatile__ ("sync" : : : "memory")
-#define rmb()  __asm__ __volatile__ (__stringify(LWSYNC) : : : "memory")
+#define rmb()  __asm__ __volatile__ ("sync" : : : "memory")
 #define wmb()  __asm__ __volatile__ ("sync" : : : "memory")
 #define read_barrier_depends()  do { } while(0)