MIPS: TXx9: Raise priority of interrupts for errors, timers, SIO

[linux-2.6-omap-h63xx.git] / include / asm-mips / txx9 / tx4927.h

diff --git a/include/asm-mips/txx9/tx4927.h b/include/asm-mips/txx9/tx4927.h
index 195f6515db9aeabe50eab868640f655f4e8abd3d..7d813f1cb98d17ea8b19fa0e52ed7e2bda937a70 100644 (file)
--- a/include/asm-mips/txx9/tx4927.h
+++ b/include/asm-mips/txx9/tx4927.h
@@ -50,12 +50,23 @@
 #define TX4927_SIO_REG(ch)     (TX4927_REG_BASE + 0xf300 + (ch) * 0x100)
 #define TX4927_PIO_REG         (TX4927_REG_BASE + 0xf500)
 
+#define TX4927_IR_ECCERR       0
+#define TX4927_IR_WTOERR       1
+#define TX4927_NUM_IR_INT      6
 #define TX4927_IR_INT(n)       (2 + (n))
+#define TX4927_NUM_IR_SIO      2
 #define TX4927_IR_SIO(n)       (8 + (n))
+#define TX4927_NUM_IR_DMA      4
+#define TX4927_IR_DMA(n)       (10 + (n))
+#define TX4927_IR_PIO          14
+#define TX4927_IR_PDMAC                15
 #define TX4927_IR_PCIC         16
 #define TX4927_NUM_IR_TMR      3
 #define TX4927_IR_TMR(n)       (17 + (n))
 #define TX4927_IR_PCIERR       22
+#define TX4927_IR_PCIPME       23
+#define TX4927_IR_ACLC         24
+#define TX4927_IR_ACLCPME      25
 #define TX4927_NUM_IR  32
 
 #define TX4927_IRC_INT 2       /* IP[2] in Status register */
@@ -196,6 +207,8 @@ struct tx4927_ccfg_reg {
 #define TX4927_EBUSC_BA(ch)    ((TX4927_EBUSC_CR(ch) >> 48) << 20)
 #define TX4927_EBUSC_SIZE(ch)  \
        (0x00100000 << ((unsigned long)(TX4927_EBUSC_CR(ch) >> 8) & 0xf))
+#define TX4927_EBUSC_WIDTH(ch) \
+       (64 >> ((__u32)(TX4927_EBUSC_CR(ch) >> 20) & 0x3))
 
 /* utilities */
 static inline void txx9_clear64(__u64 __iomem *adr, __u64 bits)
@@ -251,5 +264,6 @@ int tx4927_report_pciclk(void);
 int tx4927_pciclk66_setup(void);
 void tx4927_setup_pcierr_irq(void);
 void tx4927_irq_init(void);
+void tx4927_mtd_init(int ch);
 
 #endif /* __ASM_TXX9_TX4927_H */