/*
- * File: drivers/video/omap/omap2/dispc.c
- *
* OMAP2 display controller support
*
* Copyright (C) 2005 Nokia Corporation
#include <linux/dma-mapping.h>
#include <linux/vmalloc.h>
#include <linux/clk.h>
-
-#include <asm/io.h>
+#include <linux/io.h>
#include <asm/arch/sram.h>
#include <asm/arch/omapfb.h>
DISPC_VID2_BASE + DISPC_VID_FIFO_THRESHOLD };
const u32 fsz_reg[] = { DISPC_GFX_FIFO_SIZE_STATUS,
DISPC_VID1_BASE + DISPC_VID_FIFO_SIZE_STATUS,
- DISPC_VID2_BASE + DISPC_VID_FIFO_SIZE_STATUS };
+ DISPC_VID2_BASE + DISPC_VID_FIFO_SIZE_STATUS };
int low, high;
u32 l;
const u32 ri_reg[] = { DISPC_GFX_ROW_INC,
DISPC_VID1_BASE + DISPC_VID_ROW_INC,
DISPC_VID2_BASE + DISPC_VID_ROW_INC };
- const u32 vs_reg[]= { 0, DISPC_VID1_BASE + DISPC_VID_SIZE,
+ const u32 vs_reg[] = { 0, DISPC_VID1_BASE + DISPC_VID_SIZE,
DISPC_VID2_BASE + DISPC_VID_SIZE };
int chout_shift, burst_shift;
u32 l;
#ifdef VERBOSE
- dev_dbg(dispc.fbdev->dev, "plane %d channel %d paddr %#08x scr_width %d "
- "pos_x %d pos_y %d width %d height %d color_mode %d\n",
+ dev_dbg(dispc.fbdev->dev, "plane %d channel %d paddr %#08x scr_width %d"
+ " pos_x %d pos_y %d width %d height %d color_mode %d\n",
plane, channel_out, paddr, screen_width, pos_x, pos_y,
width, height, color_mode);
#endif
int out_width, int out_height)
{
const u32 at_reg[] = { 0, DISPC_VID1_BASE + DISPC_VID_ATTRIBUTES,
- DISPC_VID2_BASE + DISPC_VID_ATTRIBUTES };
+ DISPC_VID2_BASE + DISPC_VID_ATTRIBUTES };
const u32 vs_reg[] = { 0, DISPC_VID1_BASE + DISPC_VID_SIZE,
- DISPC_VID2_BASE + DISPC_VID_SIZE };
+ DISPC_VID2_BASE + DISPC_VID_SIZE };
const u32 fir_reg[] = { 0, DISPC_VID1_BASE + DISPC_VID_FIR,
- DISPC_VID2_BASE + DISPC_VID_FIR };
+ DISPC_VID2_BASE + DISPC_VID_FIR };
u32 l;
int fir_hinc;
enable_lcd_clocks(1);
if (orig_width < out_width) {
- /* Upsampling.
+ /*
+ * Upsampling.
* Currently you can only scale both dimensions in one way.
*/
if (orig_height > out_height ||
} ctbl_bt601_5 = {
298, 409, 0, 298, -208, -100, 298, 0, 517, 0,
};
-#if 0
- const struct color_conv_coef ctbl_bt601_5_full = {
- 256, 351, 0, 256, -179, -86, 256, 0, 443, 1,
- }, ctbl_bt709 = {
- 298, 459, 0, 298, -137, -55, 298, 0, 541, 0,
- }, ctbl_bt709_f = {
- 256, 394, 0, 256, -118, -47, 256, 0, 465, 1, },
-#endif
const struct color_conv_coef *ct;
#define CVAL(x, y) (((x & 2047) << 16) | (y & 2047))
static int get_dss_clocks(void)
{
- if (IS_ERR((dispc.dss_ick = clk_get(dispc.fbdev->dev, "dss_ick")))) {
- dev_err(dispc.fbdev->dev, "can't get dss_ick");
+ char *dss_ick = "dss_ick";
+ char *dss1_fck = cpu_is_omap34xx() ? "dss1_alwon_fck" : "dss1_fck";
+ char *tv_fck = cpu_is_omap34xx() ? "dss_tv_fck" : "dss_54m_fck";
+
+ if (IS_ERR((dispc.dss_ick = clk_get(dispc.fbdev->dev, dss_ick)))) {
+ dev_err(dispc.fbdev->dev, "can't get %s", dss_ick);
return PTR_ERR(dispc.dss_ick);
}
- if (IS_ERR((dispc.dss1_fck = clk_get(dispc.fbdev->dev, "dss1_fck")))) {
- dev_err(dispc.fbdev->dev, "can't get dss1_fck");
+ if (IS_ERR((dispc.dss1_fck = clk_get(dispc.fbdev->dev, dss1_fck)))) {
+ dev_err(dispc.fbdev->dev, "can't get %s", dss1_fck);
clk_put(dispc.dss_ick);
return PTR_ERR(dispc.dss1_fck);
}
if (IS_ERR((dispc.dss_54m_fck =
- clk_get(dispc.fbdev->dev, "dss_54m_fck")))) {
- dev_err(dispc.fbdev->dev, "can't get dss_54m_fck");
+ clk_get(dispc.fbdev->dev, tv_fck)))) {
+ dev_err(dispc.fbdev->dev, "can't get %s", tv_fck);
clk_put(dispc.dss_ick);
clk_put(dispc.dss1_fck);
return PTR_ERR(dispc.dss_54m_fck);