ARM: OMAP3: add display contoller (dispc) support for 3430

[linux-2.6-omap-h63xx.git] / drivers / video / omap / dispc.c

diff --git a/drivers/video/omap/dispc.c b/drivers/video/omap/dispc.c
index 5eeaddb3075c2bf3d072f5896376e34d1918692c..5c643f09fba2f8bd87b632b6ffa305dfc613a8ac 100644 (file)
--- a/drivers/video/omap/dispc.c
+++ b/drivers/video/omap/dispc.c
@@ -1,6 +1,4 @@
 /*
- * File: drivers/video/omap/omap2/dispc.c
- *
  * OMAP2 display controller support
  *
  * Copyright (C) 2005 Nokia Corporation
@@ -24,8 +22,7 @@
 #include <linux/dma-mapping.h>
 #include <linux/vmalloc.h>
 #include <linux/clk.h>
-
-#include <asm/io.h>
+#include <linux/io.h>
 
 #include <asm/arch/sram.h>
 #include <asm/arch/omapfb.h>
@@ -281,7 +278,7 @@ static void setup_plane_fifo(int plane, int ext_mode)
                                DISPC_VID2_BASE + DISPC_VID_FIFO_THRESHOLD };
        const u32 fsz_reg[] = { DISPC_GFX_FIFO_SIZE_STATUS,
                                DISPC_VID1_BASE + DISPC_VID_FIFO_SIZE_STATUS,
-                               DISPC_VID2_BASE + DISPC_VID_FIFO_SIZE_STATUS };
+                               DISPC_VID2_BASE + DISPC_VID_FIFO_SIZE_STATUS };
        int low, high;
        u32 l;
 
@@ -335,7 +332,7 @@ static inline int _setup_plane(int plane, int channel_out,
        const u32 ri_reg[] = { DISPC_GFX_ROW_INC,
                                DISPC_VID1_BASE + DISPC_VID_ROW_INC,
                                DISPC_VID2_BASE + DISPC_VID_ROW_INC };
-       const u32 vs_reg[]= { 0, DISPC_VID1_BASE + DISPC_VID_SIZE,
+       const u32 vs_reg[] = { 0, DISPC_VID1_BASE + DISPC_VID_SIZE,
                                DISPC_VID2_BASE + DISPC_VID_SIZE };
 
        int chout_shift, burst_shift;
@@ -347,8 +344,8 @@ static inline int _setup_plane(int plane, int channel_out,
        u32 l;
 
 #ifdef VERBOSE
-       dev_dbg(dispc.fbdev->dev, "plane %d channel %d paddr %#08x scr_width %d "
-                   "pos_x %d pos_y %d width %d height %d color_mode %d\n",
+       dev_dbg(dispc.fbdev->dev, "plane %d channel %d paddr %#08x scr_width %d"
+                   " pos_x %d pos_y %d width %d height %d color_mode %d\n",
                    plane, channel_out, paddr, screen_width, pos_x, pos_y,
                    width, height, color_mode);
 #endif
@@ -508,11 +505,11 @@ static int omap_dispc_set_scale(int plane,
                                int out_width, int out_height)
 {
        const u32 at_reg[]  = { 0, DISPC_VID1_BASE + DISPC_VID_ATTRIBUTES,
-                                  DISPC_VID2_BASE + DISPC_VID_ATTRIBUTES };
+                               DISPC_VID2_BASE + DISPC_VID_ATTRIBUTES };
        const u32 vs_reg[]  = { 0, DISPC_VID1_BASE + DISPC_VID_SIZE,
-                                  DISPC_VID2_BASE + DISPC_VID_SIZE };
+                               DISPC_VID2_BASE + DISPC_VID_SIZE };
        const u32 fir_reg[] = { 0, DISPC_VID1_BASE + DISPC_VID_FIR,
-                                  DISPC_VID2_BASE + DISPC_VID_FIR };
+                               DISPC_VID2_BASE + DISPC_VID_FIR };
 
        u32 l;
        int fir_hinc;
@@ -527,7 +524,8 @@ static int omap_dispc_set_scale(int plane,
 
        enable_lcd_clocks(1);
        if (orig_width < out_width) {
-               /* Upsampling.
+               /*
+                * Upsampling.
                 * Currently you can only scale both dimensions in one way.
                 */
                if (orig_height > out_height ||
@@ -714,14 +712,6 @@ static void setup_color_conv_coef(void)
        }  ctbl_bt601_5 = {
                    298,  409,    0,  298, -208, -100,  298,    0,  517, 0,
        };
-#if 0
-       const struct color_conv_coef ctbl_bt601_5_full = {
-                   256,  351,    0,  256, -179,  -86,  256,    0,  443, 1,
-       }, ctbl_bt709 = {
-                   298,  459,    0,  298, -137,  -55,  298,    0,  541, 0,
-       }, ctbl_bt709_f = {
-                   256,  394,    0,  256, -118,  -47,  256,    0,  465, 1,     },
-#endif
        const struct color_conv_coef *ct;
 #define CVAL(x, y)     (((x & 2047) << 16) | (y & 2047))
 
@@ -889,20 +879,24 @@ static irqreturn_t omap_dispc_irq_handler(int irq, void *dev)
 
 static int get_dss_clocks(void)
 {
-       if (IS_ERR((dispc.dss_ick = clk_get(dispc.fbdev->dev, "dss_ick")))) {
-               dev_err(dispc.fbdev->dev, "can't get dss_ick");
+       char *dss_ick = "dss_ick";
+       char *dss1_fck = cpu_is_omap34xx() ? "dss1_alwon_fck" : "dss1_fck";
+       char *tv_fck = cpu_is_omap34xx() ? "dss_tv_fck" : "dss_54m_fck";
+
+       if (IS_ERR((dispc.dss_ick = clk_get(dispc.fbdev->dev, dss_ick)))) {
+               dev_err(dispc.fbdev->dev, "can't get %s", dss_ick);
                return PTR_ERR(dispc.dss_ick);
        }
 
-       if (IS_ERR((dispc.dss1_fck = clk_get(dispc.fbdev->dev, "dss1_fck")))) {
-               dev_err(dispc.fbdev->dev, "can't get dss1_fck");
+       if (IS_ERR((dispc.dss1_fck = clk_get(dispc.fbdev->dev, dss1_fck)))) {
+               dev_err(dispc.fbdev->dev, "can't get %s", dss1_fck);
                clk_put(dispc.dss_ick);
                return PTR_ERR(dispc.dss1_fck);
        }
 
        if (IS_ERR((dispc.dss_54m_fck =
-                               clk_get(dispc.fbdev->dev, "dss_54m_fck")))) {
-               dev_err(dispc.fbdev->dev, "can't get dss_54m_fck");
+                               clk_get(dispc.fbdev->dev, tv_fck)))) {
+               dev_err(dispc.fbdev->dev, "can't get %s", tv_fck);
                clk_put(dispc.dss_ick);
                clk_put(dispc.dss1_fck);
                return PTR_ERR(dispc.dss_54m_fck);