#undef USB_TRACE
/* bulk DMA seems to be behaving for both IN and OUT */
+#ifdef CONFIG_MACH_OMAP_H6300
+#undef USE_DMA
+//#define USE_DMA
+#else
#define USE_DMA
+#endif
/* ISO too */
#define USE_ISO
|| machine_is_omap_h4()
#endif
|| machine_is_sx1()
+ || machine_is_omap_h6300()
);
}
tmp = omap_readl(OTG_REV);
if (cpu_is_omap24xx()) {
+ /*
+ * REVISIT: Not clear how this works on OMAP2. trans
+ * is ANDed to produce bits 7 and 8, which might make
+ * sense for USB_TRANSCEIVER_CTRL on OMAP1,
+ * but with CONTROL_DEVCONF, these bits have something to
+ * do with the frame adjustment counter and McBSP2.
+ */
ctrl_name = "control_devconf";
trans = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0);
} else {
cleanup0:
if (xceiv)
- put_device(xceiv->dev);
+ otg_put_transceiver(xceiv);
if (cpu_is_omap16xx() || cpu_is_omap24xx()) {
clk_disable(hhc_clk);
pullup_disable(udc);
if (udc->transceiver) {
- put_device(udc->transceiver->dev);
+ otg_put_transceiver(udc->transceiver);
udc->transceiver = NULL;
}
omap_writew(0, UDC_SYSCON1);