Remove pointless casts from void pointers

[linux-2.6-omap-h63xx.git] / drivers / spi / spi_bfin5xx.c

diff --git a/drivers/spi/spi_bfin5xx.c b/drivers/spi/spi_bfin5xx.c
index a85bcb306590136c38941b84e4b4630731a63700..61cc5e0c2cbb1a26068ad84ce05c946bdc562404 100644 (file)
--- a/drivers/spi/spi_bfin5xx.c
+++ b/drivers/spi/spi_bfin5xx.c
@@ -54,7 +54,7 @@
 
 #define DRV_NAME       "bfin-spi"
 #define DRV_AUTHOR     "Bryan Wu, Luke Yang"
-#define DRV_DESC       "Blackfin BF5xx on-chip SPI Contoller Driver"
+#define DRV_DESC       "Blackfin BF5xx on-chip SPI Controller Driver"
 #define DRV_VERSION    "1.0"
 
 MODULE_AUTHOR(DRV_AUTHOR);
@@ -78,7 +78,10 @@ struct driver_data {
        struct spi_master *master;
 
        /* Regs base of SPI controller */
-       u32 regs_base;
+       void __iomem *regs_base;
+
+       /* Pin request list */
+       u16 *pin_req;
 
        /* BFIN hookup */
        struct bfin5xx_spi_master *master_info;
@@ -186,7 +189,7 @@ static int flush(struct driver_data *drv_data)
 
        /* wait for stop and clear stat */
        while (!(read_STAT(drv_data) & BIT_STAT_SPIF) && limit--)
-               continue;
+               cpu_relax();
 
        write_STAT(drv_data, BIT_STAT_CLR);
 
@@ -231,10 +234,8 @@ static int restore_state(struct driver_data *drv_data)
        dev_dbg(&drv_data->pdev->dev, "restoring spi ctl state\n");
 
        /* Load the registers */
-       write_BAUD(drv_data, chip->baud);
-       chip->ctl_reg &= (~BIT_CTL_TIMOD);
-       chip->ctl_reg |= (chip->width << 8);
        write_CTRL(drv_data, chip->ctl_reg);
+       write_BAUD(drv_data, chip->baud);
 
        bfin_spi_enable(drv_data);
        cs_active(drv_data, chip);
@@ -262,7 +263,7 @@ static void null_writer(struct driver_data *drv_data)
        while (drv_data->tx < drv_data->tx_end) {
                write_TDBR(drv_data, 0);
                while ((read_STAT(drv_data) & BIT_STAT_TXS))
-                       continue;
+                       cpu_relax();
                drv_data->tx += n_bytes;
        }
 }
@@ -274,7 +275,7 @@ static void null_reader(struct driver_data *drv_data)
 
        while (drv_data->rx < drv_data->rx_end) {
                while (!(read_STAT(drv_data) & BIT_STAT_RXS))
-                       continue;
+                       cpu_relax();
                dummy_read(drv_data);
                drv_data->rx += n_bytes;
        }
@@ -287,12 +288,12 @@ static void u8_writer(struct driver_data *drv_data)
 
        /* poll for SPI completion before start */
        while (!(read_STAT(drv_data) & BIT_STAT_SPIF))
-               continue;
+               cpu_relax();
 
        while (drv_data->tx < drv_data->tx_end) {
                write_TDBR(drv_data, (*(u8 *) (drv_data->tx)));
                while (read_STAT(drv_data) & BIT_STAT_TXS)
-                       continue;
+                       cpu_relax();
                ++drv_data->tx;
        }
 }
@@ -303,14 +304,14 @@ static void u8_cs_chg_writer(struct driver_data *drv_data)
 
        /* poll for SPI completion before start */
        while (!(read_STAT(drv_data) & BIT_STAT_SPIF))
-               continue;
+               cpu_relax();
 
        while (drv_data->tx < drv_data->tx_end) {
                cs_active(drv_data, chip);
 
                write_TDBR(drv_data, (*(u8 *) (drv_data->tx)));
                while (read_STAT(drv_data) & BIT_STAT_TXS)
-                       continue;
+                       cpu_relax();
 
                cs_deactive(drv_data, chip);
 
@@ -325,7 +326,7 @@ static void u8_reader(struct driver_data *drv_data)
 
        /* poll for SPI completion before start */
        while (!(read_STAT(drv_data) & BIT_STAT_SPIF))
-               continue;
+               cpu_relax();
 
        /* clear TDBR buffer before read(else it will be shifted out) */
        write_TDBR(drv_data, 0xFFFF);
@@ -334,13 +335,13 @@ static void u8_reader(struct driver_data *drv_data)
 
        while (drv_data->rx < drv_data->rx_end - 1) {
                while (!(read_STAT(drv_data) & BIT_STAT_RXS))
-                       continue;
+                       cpu_relax();
                *(u8 *) (drv_data->rx) = read_RDBR(drv_data);
                ++drv_data->rx;
        }
 
        while (!(read_STAT(drv_data) & BIT_STAT_RXS))
-               continue;
+               cpu_relax();
        *(u8 *) (drv_data->rx) = read_SHAW(drv_data);
        ++drv_data->rx;
 }
@@ -351,7 +352,7 @@ static void u8_cs_chg_reader(struct driver_data *drv_data)
 
        /* poll for SPI completion before start */
        while (!(read_STAT(drv_data) & BIT_STAT_SPIF))
-               continue;
+               cpu_relax();
 
        /* clear TDBR buffer before read(else it will be shifted out) */
        write_TDBR(drv_data, 0xFFFF);
@@ -363,7 +364,7 @@ static void u8_cs_chg_reader(struct driver_data *drv_data)
                cs_deactive(drv_data, chip);
 
                while (!(read_STAT(drv_data) & BIT_STAT_RXS))
-                       continue;
+                       cpu_relax();
                cs_active(drv_data, chip);
                *(u8 *) (drv_data->rx) = read_RDBR(drv_data);
                ++drv_data->rx;
@@ -371,7 +372,7 @@ static void u8_cs_chg_reader(struct driver_data *drv_data)
        cs_deactive(drv_data, chip);
 
        while (!(read_STAT(drv_data) & BIT_STAT_RXS))
-               continue;
+               cpu_relax();
        *(u8 *) (drv_data->rx) = read_SHAW(drv_data);
        ++drv_data->rx;
 }
@@ -380,15 +381,15 @@ static void u8_duplex(struct driver_data *drv_data)
 {
        /* poll for SPI completion before start */
        while (!(read_STAT(drv_data) & BIT_STAT_SPIF))
-               continue;
+               cpu_relax();
 
        /* in duplex mode, clk is triggered by writing of TDBR */
        while (drv_data->rx < drv_data->rx_end) {
                write_TDBR(drv_data, (*(u8 *) (drv_data->tx)));
                while (read_STAT(drv_data) & BIT_STAT_TXS)
-                       continue;
+                       cpu_relax();
                while (!(read_STAT(drv_data) & BIT_STAT_RXS))
-                       continue;
+                       cpu_relax();
                *(u8 *) (drv_data->rx) = read_RDBR(drv_data);
                ++drv_data->rx;
                ++drv_data->tx;
@@ -401,16 +402,16 @@ static void u8_cs_chg_duplex(struct driver_data *drv_data)
 
        /* poll for SPI completion before start */
        while (!(read_STAT(drv_data) & BIT_STAT_SPIF))
-               continue;
+               cpu_relax();
 
        while (drv_data->rx < drv_data->rx_end) {
                cs_active(drv_data, chip);
 
                write_TDBR(drv_data, (*(u8 *) (drv_data->tx)));
                while (read_STAT(drv_data) & BIT_STAT_TXS)
-                       continue;
+                       cpu_relax();
                while (!(read_STAT(drv_data) & BIT_STAT_RXS))
-                       continue;
+                       cpu_relax();
                *(u8 *) (drv_data->rx) = read_RDBR(drv_data);
 
                cs_deactive(drv_data, chip);
@@ -427,12 +428,12 @@ static void u16_writer(struct driver_data *drv_data)
 
        /* poll for SPI completion before start */
        while (!(read_STAT(drv_data) & BIT_STAT_SPIF))
-               continue;
+               cpu_relax();
 
        while (drv_data->tx < drv_data->tx_end) {
                write_TDBR(drv_data, (*(u16 *) (drv_data->tx)));
                while ((read_STAT(drv_data) & BIT_STAT_TXS))
-                       continue;
+                       cpu_relax();
                drv_data->tx += 2;
        }
 }
@@ -443,14 +444,14 @@ static void u16_cs_chg_writer(struct driver_data *drv_data)
 
        /* poll for SPI completion before start */
        while (!(read_STAT(drv_data) & BIT_STAT_SPIF))
-               continue;
+               cpu_relax();
 
        while (drv_data->tx < drv_data->tx_end) {
                cs_active(drv_data, chip);
 
                write_TDBR(drv_data, (*(u16 *) (drv_data->tx)));
                while ((read_STAT(drv_data) & BIT_STAT_TXS))
-                       continue;
+                       cpu_relax();
 
                cs_deactive(drv_data, chip);
 
@@ -465,7 +466,7 @@ static void u16_reader(struct driver_data *drv_data)
 
        /* poll for SPI completion before start */
        while (!(read_STAT(drv_data) & BIT_STAT_SPIF))
-               continue;
+               cpu_relax();
 
        /* clear TDBR buffer before read(else it will be shifted out) */
        write_TDBR(drv_data, 0xFFFF);
@@ -474,13 +475,13 @@ static void u16_reader(struct driver_data *drv_data)
 
        while (drv_data->rx < (drv_data->rx_end - 2)) {
                while (!(read_STAT(drv_data) & BIT_STAT_RXS))
-                       continue;
+                       cpu_relax();
                *(u16 *) (drv_data->rx) = read_RDBR(drv_data);
                drv_data->rx += 2;
        }
 
        while (!(read_STAT(drv_data) & BIT_STAT_RXS))
-               continue;
+               cpu_relax();
        *(u16 *) (drv_data->rx) = read_SHAW(drv_data);
        drv_data->rx += 2;
 }
@@ -491,7 +492,7 @@ static void u16_cs_chg_reader(struct driver_data *drv_data)
 
        /* poll for SPI completion before start */
        while (!(read_STAT(drv_data) & BIT_STAT_SPIF))
-               continue;
+               cpu_relax();
 
        /* clear TDBR buffer before read(else it will be shifted out) */
        write_TDBR(drv_data, 0xFFFF);
@@ -503,7 +504,7 @@ static void u16_cs_chg_reader(struct driver_data *drv_data)
                cs_deactive(drv_data, chip);
 
                while (!(read_STAT(drv_data) & BIT_STAT_RXS))
-                       continue;
+                       cpu_relax();
                cs_active(drv_data, chip);
                *(u16 *) (drv_data->rx) = read_RDBR(drv_data);
                drv_data->rx += 2;
@@ -511,7 +512,7 @@ static void u16_cs_chg_reader(struct driver_data *drv_data)
        cs_deactive(drv_data, chip);
 
        while (!(read_STAT(drv_data) & BIT_STAT_RXS))
-               continue;
+               cpu_relax();
        *(u16 *) (drv_data->rx) = read_SHAW(drv_data);
        drv_data->rx += 2;
 }
@@ -520,15 +521,15 @@ static void u16_duplex(struct driver_data *drv_data)
 {
        /* poll for SPI completion before start */
        while (!(read_STAT(drv_data) & BIT_STAT_SPIF))
-               continue;
+               cpu_relax();
 
        /* in duplex mode, clk is triggered by writing of TDBR */
        while (drv_data->tx < drv_data->tx_end) {
                write_TDBR(drv_data, (*(u16 *) (drv_data->tx)));
                while (read_STAT(drv_data) & BIT_STAT_TXS)
-                       continue;
+                       cpu_relax();
                while (!(read_STAT(drv_data) & BIT_STAT_RXS))
-                       continue;
+                       cpu_relax();
                *(u16 *) (drv_data->rx) = read_RDBR(drv_data);
                drv_data->rx += 2;
                drv_data->tx += 2;
@@ -541,16 +542,16 @@ static void u16_cs_chg_duplex(struct driver_data *drv_data)
 
        /* poll for SPI completion before start */
        while (!(read_STAT(drv_data) & BIT_STAT_SPIF))
-               continue;
+               cpu_relax();
 
        while (drv_data->tx < drv_data->tx_end) {
                cs_active(drv_data, chip);
 
                write_TDBR(drv_data, (*(u16 *) (drv_data->tx)));
                while (read_STAT(drv_data) & BIT_STAT_TXS)
-                       continue;
+                       cpu_relax();
                while (!(read_STAT(drv_data) & BIT_STAT_RXS))
-                       continue;
+                       cpu_relax();
                *(u16 *) (drv_data->rx) = read_RDBR(drv_data);
 
                cs_deactive(drv_data, chip);
@@ -615,7 +616,7 @@ static void giveback(struct driver_data *drv_data)
 
 static irqreturn_t dma_irq_handler(int irq, void *dev_id)
 {
-       struct driver_data *drv_data = (struct driver_data *)dev_id;
+       struct driver_data *drv_data = dev_id;
        struct chip_data *chip = drv_data->cur_chip;
        struct spi_message *msg = drv_data->cur_msg;
 
@@ -624,7 +625,7 @@ static irqreturn_t dma_irq_handler(int irq, void *dev_id)
 
        /* Wait for DMA to complete */
        while (get_dma_curr_irqstat(drv_data->dma_channel) & DMA_RUN)
-               continue;
+               cpu_relax();
 
        /*
         * wait for the last transaction shifted out.  HRM states:
@@ -635,11 +636,11 @@ static irqreturn_t dma_irq_handler(int irq, void *dev_id)
        if (drv_data->tx != NULL) {
                while ((read_STAT(drv_data) & TXS) ||
                       (read_STAT(drv_data) & TXS))
-                       continue;
+                       cpu_relax();
        }
 
        while (!(read_STAT(drv_data) & SPIF))
-               continue;
+               cpu_relax();
 
        msg->actual_length += drv_data->len_in_bytes;
 
@@ -676,6 +677,7 @@ static void pump_transfers(unsigned long data)
        message = drv_data->cur_msg;
        transfer = drv_data->cur_transfer;
        chip = drv_data->cur_chip;
+
        /*
         * if msg is error or done, report it back using complete() callback
         */
@@ -733,15 +735,48 @@ static void pump_transfers(unsigned long data)
        drv_data->len_in_bytes = transfer->len;
        drv_data->cs_change = transfer->cs_change;
 
-       width = chip->width;
+       /* Bits per word setup */
+       switch (transfer->bits_per_word) {
+       case 8:
+               drv_data->n_bytes = 1;
+               width = CFG_SPI_WORDSIZE8;
+               drv_data->read = chip->cs_change_per_word ?
+                       u8_cs_chg_reader : u8_reader;
+               drv_data->write = chip->cs_change_per_word ?
+                       u8_cs_chg_writer : u8_writer;
+               drv_data->duplex = chip->cs_change_per_word ?
+                       u8_cs_chg_duplex : u8_duplex;
+               break;
+
+       case 16:
+               drv_data->n_bytes = 2;
+               width = CFG_SPI_WORDSIZE16;
+               drv_data->read = chip->cs_change_per_word ?
+                       u16_cs_chg_reader : u16_reader;
+               drv_data->write = chip->cs_change_per_word ?
+                       u16_cs_chg_writer : u16_writer;
+               drv_data->duplex = chip->cs_change_per_word ?
+                       u16_cs_chg_duplex : u16_duplex;
+               break;
+
+       default:
+               /* No change, the same as default setting */
+               drv_data->n_bytes = chip->n_bytes;
+               width = chip->width;
+               drv_data->write = drv_data->tx ? chip->write : null_writer;
+               drv_data->read = drv_data->rx ? chip->read : null_reader;
+               drv_data->duplex = chip->duplex ? chip->duplex : null_writer;
+               break;
+       }
+       cr = (read_CTRL(drv_data) & (~BIT_CTL_TIMOD));
+       cr |= (width << 8);
+       write_CTRL(drv_data, cr);
+
        if (width == CFG_SPI_WORDSIZE16) {
                drv_data->len = (transfer->len) >> 1;
        } else {
                drv_data->len = transfer->len;
        }
-       drv_data->write = drv_data->tx ? chip->write : null_writer;
-       drv_data->read = drv_data->rx ? chip->read : null_reader;
-       drv_data->duplex = chip->duplex ? chip->duplex : null_writer;
        dev_dbg(&drv_data->pdev->dev, "transfer: ",
                "drv_data->write is %p, chip->write is %p, null_wr is %p\n",
                drv_data->write, chip->write, null_writer);
@@ -750,6 +785,12 @@ static void pump_transfers(unsigned long data)
        message->state = RUNNING_STATE;
        dma_config = 0;
 
+       /* Speed setup (surely valid because already checked) */
+       if (transfer->speed_hz)
+               write_BAUD(drv_data, hz_to_spi_baud(transfer->speed_hz));
+       else
+               write_BAUD(drv_data, chip->baud);
+
        write_STAT(drv_data, BIT_STAT_CLR);
        cr = (read_CTRL(drv_data) & (~BIT_CTL_TIMOD));
        cs_active(drv_data, chip);
@@ -783,7 +824,7 @@ static void pump_transfers(unsigned long data)
 
                /* poll for SPI completion before start */
                while (!(read_STAT(drv_data) & BIT_STAT_SPIF))
-                       continue;
+                       cpu_relax();
 
                /* dirty hack for autobuffer DMA mode */
                if (drv_data->tx_dma == 0xFFFF) {
@@ -1255,25 +1296,6 @@ static inline int destroy_queue(struct driver_data *drv_data)
        return 0;
 }
 
-static int setup_pin_mux(int action, int bus_num)
-{
-
-       u16 pin_req[3][4] = {
-               {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
-               {P_SPI1_SCK, P_SPI1_MISO, P_SPI1_MOSI, 0},
-               {P_SPI2_SCK, P_SPI2_MISO, P_SPI2_MOSI, 0},
-       };
-
-       if (action) {
-               if (peripheral_request_list(pin_req[bus_num], DRV_NAME))
-                       return -EFAULT;
-       } else {
-               peripheral_free_list(pin_req[bus_num]);
-       }
-
-       return 0;
-}
-
 static int __init bfin5xx_spi_probe(struct platform_device *pdev)
 {
        struct device *dev = &pdev->dev;
@@ -1296,6 +1318,7 @@ static int __init bfin5xx_spi_probe(struct platform_device *pdev)
        drv_data->master = master;
        drv_data->master_info = platform_info;
        drv_data->pdev = pdev;
+       drv_data->pin_req = platform_info->pin_req;
 
        master->bus_num = pdev->id;
        master->num_chipselect = platform_info->num_chipselect;
@@ -1311,9 +1334,8 @@ static int __init bfin5xx_spi_probe(struct platform_device *pdev)
                goto out_error_get_res;
        }
 
-       drv_data->regs_base = (u32) ioremap(res->start,
-                                       (res->end - res->start + 1));
-       if (!drv_data->regs_base) {
+       drv_data->regs_base = ioremap(res->start, (res->end - res->start + 1));
+       if (drv_data->regs_base == NULL) {
                dev_err(dev, "Cannot map IO\n");
                status = -ENXIO;
                goto out_error_ioremap;
@@ -1347,12 +1369,13 @@ static int __init bfin5xx_spi_probe(struct platform_device *pdev)
                goto out_error_queue_alloc;
        }
 
-       if (setup_pin_mux(1, master->bus_num)) {
+       status = peripheral_request_list(drv_data->pin_req, DRV_NAME);
+       if (status != 0) {
                dev_err(&pdev->dev, ": Requesting Peripherals failed\n");
                goto out_error;
        }
 
-       dev_info(dev, "%s, Version %s, regs_base@0x%08x, dma channel@%d\n",
+       dev_info(dev, "%s, Version %s, regs_base@%p, dma channel@%d\n",
                DRV_DESC, DRV_VERSION, drv_data->regs_base,
                drv_data->dma_channel);
        return status;
@@ -1395,7 +1418,7 @@ static int __devexit bfin5xx_spi_remove(struct platform_device *pdev)
        /* Disconnect from the SPI framework */
        spi_unregister_master(drv_data->master);
 
-       setup_pin_mux(0, drv_data->master->bus_num);
+       peripheral_free_list(drv_data->pin_req);
 
        /* Prevent double remove */
        platform_set_drvdata(pdev, NULL);