#define ASD_MAX_PHYS 8
#define ASD_PCBA_SN_SIZE 12
-/* Those are to be further named properly, the "RAZORx" part, and
- * subsequently included in include/linux/pci_ids.h.
- */
-#define PCI_DEVICE_ID_ADAPTEC2_RAZOR10 0x410
-#define PCI_DEVICE_ID_ADAPTEC2_RAZOR12 0x412
-#define PCI_DEVICE_ID_ADAPTEC2_RAZOR1E 0x41E
-#define PCI_DEVICE_ID_ADAPTEC2_RAZOR30 0x430
-#define PCI_DEVICE_ID_ADAPTEC2_RAZOR32 0x432
-#define PCI_DEVICE_ID_ADAPTEC2_RAZOR3E 0x43E
-#define PCI_DEVICE_ID_ADAPTEC2_RAZOR3F 0x43F
-
struct asd_ha_addrspace {
void __iomem *addr;
unsigned long start; /* pci resource start */
u8 manuf;
u8 dev_id;
u8 sec_prot;
+ u8 method;
u32 dir_offs;
};
/* internally generated command */
struct timer_list timer;
- struct completion completion;
+ struct completion *completion;
u8 tag_valid:1;
__be16 tag; /* error recovery only */
struct asd_ascb **escb_arr; /* array of pointers to escbs */
};
+/* This is an internal port structure. These are used to get accurate
+ * phy_mask for updating DDB 0.
+ */
+struct asd_port {
+ u8 sas_addr[SAS_ADDR_SIZE];
+ u8 attached_sas_addr[SAS_ADDR_SIZE];
+ u32 phy_mask;
+ int num_phys;
+};
+
/* This is the Host Adapter structure. It describes the hardware
* SAS adapter.
*/
struct hw_profile hw_prof;
struct asd_phy phys[ASD_MAX_PHYS];
+ spinlock_t asd_ports_lock;
+ struct asd_port asd_ports[ASD_MAX_PHYS];
struct asd_sas_port ports[ASD_MAX_PHYS];
struct dma_pool *scb_pool;
struct asd_seq_data seq; /* sequencer related */
+ u32 bios_status;
+ const struct firmware *bios_image;
};
/* ---------- Common macros ---------- */
ascb->timer.function = NULL;
init_timer(&ascb->timer);
ascb->tc_index = -1;
- init_completion(&ascb->completion);
}
/* Must be called with the tc_index_lock held!