!is_ctrl_busy(ctrl), timeout);
if (!rc && is_ctrl_busy(ctrl)) {
retval = -EIO;
- err("Command not completed in 1000 msec\n");
+ ctrl_err(ctrl, "Command not completed in 1000 msec\n");
} else if (rc < 0) {
retval = -EINTR;
- info("Command was interrupted by a signal\n");
+ ctrl_info(ctrl, "Command was interrupted by a signal\n");
}
return retval;
if (!shpc_poll_ctrl_busy(ctrl)) {
/* After 1 sec and and the controller is still busy */
- err("%s : Controller is still busy after 1 sec.\n",
- __FUNCTION__);
+ ctrl_err(ctrl, "Controller is still busy after 1 sec\n");
retval = -EBUSY;
goto out;
}
++t_slot;
temp_word = (t_slot << 8) | (cmd & 0xFF);
- dbg("%s: t_slot %x cmd %x\n", __FUNCTION__, t_slot, cmd);
+ ctrl_dbg(ctrl, "%s: t_slot %x cmd %x\n", __func__, t_slot, cmd);
/* To make sure the Controller Busy bit is 0 before we send out the
* command.
cmd_status = hpc_check_cmd_status(slot->ctrl);
if (cmd_status) {
- err("%s: Failed to issued command 0x%x (error code = %d)\n",
- __FUNCTION__, cmd, cmd_status);
+ ctrl_err(ctrl,
+ "Failed to issued command 0x%x (error code = %d)\n",
+ cmd, cmd_status);
retval = -EIO;
}
out:
break;
case 1:
retval = SWITCH_OPEN;
- err("%s: Switch opened!\n", __FUNCTION__);
+ ctrl_err(ctrl, "Switch opened!\n");
break;
case 2:
retval = INVALID_CMD;
- err("%s: Invalid HPC command!\n", __FUNCTION__);
+ ctrl_err(ctrl, "Invalid HPC command!\n");
break;
case 4:
retval = INVALID_SPEED_MODE;
- err("%s: Invalid bus speed/mode!\n", __FUNCTION__);
+ ctrl_err(ctrl, "Invalid bus speed/mode!\n");
break;
default:
retval = cmd_status;
return -ENODEV;
}
- dbg("%s: slot_reg = %x, pcix_cap = %x, m66_cap = %x\n",
- __FUNCTION__, slot_reg, pcix_cap, m66_cap);
+ ctrl_dbg(ctrl, "%s: slot_reg = %x, pcix_cap = %x, m66_cap = %x\n",
+ __func__, slot_reg, pcix_cap, m66_cap);
switch (pcix_cap) {
case 0x0:
break;
}
- dbg("Adapter speed = %d\n", *value);
+ ctrl_dbg(ctrl, "Adapter speed = %d\n", *value);
return retval;
}
retval = -1;
}
- dbg("Mode 1 ECC cap = %d\n", *mode);
+ ctrl_dbg(ctrl, "Mode 1 ECC cap = %d\n", *mode);
return retval;
}
cleanup_slots(ctrl);
/*
- * Mask SERR and System Interrut generation
+ * Mask SERR and System Interrupt generation
*/
serr_int = shpc_readl(ctrl, SERR_INTR_ENABLE);
serr_int |= (GLOBAL_INTR_MASK | GLOBAL_SERR_MASK |
retval = shpc_write_cmd(slot, slot->hp_slot, SET_SLOT_PWR);
if (retval)
- err("%s: Write command failed!\n", __FUNCTION__);
+ ctrl_err(slot->ctrl, "%s: Write command failed!\n", __func__);
return retval;
}
retval = shpc_write_cmd(slot, slot->hp_slot,
SET_SLOT_ENABLE | SET_PWR_BLINK | SET_ATTN_OFF);
if (retval)
- err("%s: Write command failed!\n", __FUNCTION__);
+ ctrl_err(slot->ctrl, "%s: Write command failed!\n", __func__);
return retval;
}
retval = shpc_write_cmd(slot, slot->hp_slot,
SET_SLOT_DISABLE | SET_PWR_OFF | SET_ATTN_ON);
if (retval)
- err("%s: Write command failed!\n", __FUNCTION__);
+ ctrl_err(slot->ctrl, "%s: Write command failed!\n", __func__);
return retval;
}
retval = shpc_write_cmd(slot, 0, cmd);
if (retval)
- err("%s: Write command failed!\n", __FUNCTION__);
+ ctrl_err(ctrl, "%s: Write command failed!\n", __func__);
return retval;
}
if (!intr_loc)
return IRQ_NONE;
- dbg("%s: intr_loc = %x\n",__FUNCTION__, intr_loc);
+ ctrl_dbg(ctrl, "%s: intr_loc = %x\n", __func__, intr_loc);
if(!shpchp_poll_mode) {
/*
shpc_writel(ctrl, SERR_INTR_ENABLE, serr_int);
intr_loc2 = shpc_readl(ctrl, INTR_LOC);
- dbg("%s: intr_loc2 = %x\n",__FUNCTION__, intr_loc2);
+ ctrl_dbg(ctrl, "%s: intr_loc2 = %x\n", __func__, intr_loc2);
}
if (intr_loc & CMD_INTR_PENDING) {
continue;
slot_reg = shpc_readl(ctrl, SLOT_REG(hp_slot));
- dbg("%s: Slot %x with intr, slot register = %x\n",
- __FUNCTION__, hp_slot, slot_reg);
+ ctrl_dbg(ctrl, "Slot %x with intr, slot register = %x\n",
+ hp_slot, slot_reg);
if (slot_reg & MRL_CHANGE_DETECTED)
shpchp_handle_switch_change(hp_slot, ctrl);
}
*value = bus_speed;
- dbg("Max bus speed = %d\n", bus_speed);
+ ctrl_dbg(ctrl, "Max bus speed = %d\n", bus_speed);
return retval;
}
break;
}
- dbg("Current bus speed = %d\n", bus_speed);
+ ctrl_dbg(ctrl, "Current bus speed = %d\n", bus_speed);
return retval;
}
u8 i;
ctrl->pci_dev = pdev; /* pci_dev of the P2P bridge */
+ ctrl_dbg(ctrl, "Hotplug Controller:\n");
if ((pdev->vendor == PCI_VENDOR_ID_AMD) || (pdev->device ==
PCI_DEVICE_ID_AMD_GOLAM_7450)) {
} else {
ctrl->cap_offset = pci_find_capability(pdev, PCI_CAP_ID_SHPC);
if (!ctrl->cap_offset) {
- err("%s : cap_offset == 0\n", __FUNCTION__);
+ ctrl_err(ctrl, "Cannot find PCI capability\n");
goto abort;
}
- dbg("%s: cap_offset = %x\n", __FUNCTION__, ctrl->cap_offset);
+ ctrl_dbg(ctrl, " cap_offset = %x\n", ctrl->cap_offset);
rc = shpc_indirect_read(ctrl, 0, &shpc_base_offset);
if (rc) {
- err("%s: cannot read base_offset\n", __FUNCTION__);
+ ctrl_err(ctrl, "Cannot read base_offset\n");
goto abort;
}
rc = shpc_indirect_read(ctrl, 3, &tempdword);
if (rc) {
- err("%s: cannot read slot config\n", __FUNCTION__);
+ ctrl_err(ctrl, "Cannot read slot config\n");
goto abort;
}
num_slots = tempdword & SLOT_NUM;
- dbg("%s: num_slots (indirect) %x\n", __FUNCTION__, num_slots);
+ ctrl_dbg(ctrl, " num_slots (indirect) %x\n", num_slots);
for (i = 0; i < 9 + num_slots; i++) {
rc = shpc_indirect_read(ctrl, i, &tempdword);
if (rc) {
- err("%s: cannot read creg (index = %d)\n",
- __FUNCTION__, i);
+ ctrl_err(ctrl,
+ "Cannot read creg (index = %d)\n", i);
goto abort;
}
- dbg("%s: offset %d: value %x\n", __FUNCTION__,i,
- tempdword);
+ ctrl_dbg(ctrl, " offset %d: value %x\n", i, tempdword);
}
ctrl->mmio_base =
ctrl->mmio_size = 0x24 + 0x4 * num_slots;
}
- info("HPC vendor_id %x device_id %x ss_vid %x ss_did %x\n", pdev->vendor, pdev->device, pdev->subsystem_vendor,
- pdev->subsystem_device);
+ ctrl_info(ctrl, "HPC vendor_id %x device_id %x ss_vid %x ss_did %x\n",
+ pdev->vendor, pdev->device, pdev->subsystem_vendor,
+ pdev->subsystem_device);
rc = pci_enable_device(pdev);
if (rc) {
- err("%s: pci_enable_device failed\n", __FUNCTION__);
+ ctrl_err(ctrl, "pci_enable_device failed\n");
goto abort;
}
if (!request_mem_region(ctrl->mmio_base, ctrl->mmio_size, MY_NAME)) {
- err("%s: cannot reserve MMIO region\n", __FUNCTION__);
+ ctrl_err(ctrl, "Cannot reserve MMIO region\n");
rc = -1;
goto abort;
}
ctrl->creg = ioremap(ctrl->mmio_base, ctrl->mmio_size);
if (!ctrl->creg) {
- err("%s: cannot remap MMIO region %lx @ %lx\n", __FUNCTION__,
- ctrl->mmio_size, ctrl->mmio_base);
+ ctrl_err(ctrl, "Cannot remap MMIO region %lx @ %lx\n",
+ ctrl->mmio_size, ctrl->mmio_base);
release_mem_region(ctrl->mmio_base, ctrl->mmio_size);
rc = -1;
goto abort;
}
- dbg("%s: ctrl->creg %p\n", __FUNCTION__, ctrl->creg);
+ ctrl_dbg(ctrl, "ctrl->creg %p\n", ctrl->creg);
mutex_init(&ctrl->crit_sect);
mutex_init(&ctrl->cmd_lock);
/* Mask Global Interrupt Mask & Command Complete Interrupt Mask */
tempdword = shpc_readl(ctrl, SERR_INTR_ENABLE);
- dbg("%s: SERR_INTR_ENABLE = %x\n", __FUNCTION__, tempdword);
+ ctrl_dbg(ctrl, "SERR_INTR_ENABLE = %x\n", tempdword);
tempdword |= (GLOBAL_INTR_MASK | GLOBAL_SERR_MASK |
COMMAND_INTR_MASK | ARBITER_SERR_MASK);
tempdword &= ~SERR_INTR_RSVDZ_MASK;
shpc_writel(ctrl, SERR_INTR_ENABLE, tempdword);
tempdword = shpc_readl(ctrl, SERR_INTR_ENABLE);
- dbg("%s: SERR_INTR_ENABLE = %x\n", __FUNCTION__, tempdword);
+ ctrl_dbg(ctrl, "SERR_INTR_ENABLE = %x\n", tempdword);
/* Mask the MRL sensor SERR Mask of individual slot in
* Slot SERR-INT Mask & clear all the existing event if any
*/
for (hp_slot = 0; hp_slot < ctrl->num_slots; hp_slot++) {
slot_reg = shpc_readl(ctrl, SLOT_REG(hp_slot));
- dbg("%s: Default Logical Slot Register %d value %x\n", __FUNCTION__,
- hp_slot, slot_reg);
+ ctrl_dbg(ctrl, "Default Logical Slot Register %d value %x\n",
+ hp_slot, slot_reg);
slot_reg |= (PRSNT_CHANGE_INTR_MASK | ISO_PFAULT_INTR_MASK |
BUTTON_PRESS_INTR_MASK | MRL_CHANGE_INTR_MASK |
CON_PFAULT_INTR_MASK | MRL_CHANGE_SERR_MASK |
/* Installs the interrupt handler */
rc = pci_enable_msi(pdev);
if (rc) {
- info("Can't get msi for the hotplug controller\n");
- info("Use INTx for the hotplug controller\n");
+ ctrl_info(ctrl,
+ "Can't get msi for the hotplug controller\n");
+ ctrl_info(ctrl,
+ "Use INTx for the hotplug controller\n");
}
rc = request_irq(ctrl->pci_dev->irq, shpc_isr, IRQF_SHARED,
MY_NAME, (void *)ctrl);
- dbg("%s: request_irq %d for hpc%d (returns %d)\n",
- __FUNCTION__, ctrl->pci_dev->irq,
+ ctrl_dbg(ctrl, "request_irq %d for hpc%d (returns %d)\n",
+ ctrl->pci_dev->irq,
atomic_read(&shpchp_num_controllers), rc);
if (rc) {
- err("Can't get irq %d for the hotplug controller\n",
- ctrl->pci_dev->irq);
+ ctrl_err(ctrl, "Can't get irq %d for the hotplug "
+ "controller\n", ctrl->pci_dev->irq);
goto abort_iounmap;
}
}
- dbg("%s: HPC at b:d:f:irq=0x%x:%x:%x:%x\n", __FUNCTION__,
- pdev->bus->number, PCI_SLOT(pdev->devfn),
- PCI_FUNC(pdev->devfn), pdev->irq);
- get_hp_hw_control_from_firmware(pdev);
+ ctrl_dbg(ctrl, "HPC at %s irq=%x\n", pci_name(pdev), pdev->irq);
/*
* If this is the first controller to be initialized,
*/
for (hp_slot = 0; hp_slot < ctrl->num_slots; hp_slot++) {
slot_reg = shpc_readl(ctrl, SLOT_REG(hp_slot));
- dbg("%s: Default Logical Slot Register %d value %x\n", __FUNCTION__,
- hp_slot, slot_reg);
+ ctrl_dbg(ctrl, "Default Logical Slot Register %d value %x\n",
+ hp_slot, slot_reg);
slot_reg &= ~(PRSNT_CHANGE_INTR_MASK | ISO_PFAULT_INTR_MASK |
BUTTON_PRESS_INTR_MASK | MRL_CHANGE_INTR_MASK |
CON_PFAULT_INTR_MASK | SLOT_REG_RSVDZ_MASK);
SERR_INTR_RSVDZ_MASK);
shpc_writel(ctrl, SERR_INTR_ENABLE, tempdword);
tempdword = shpc_readl(ctrl, SERR_INTR_ENABLE);
- dbg("%s: SERR_INTR_ENABLE = %x\n", __FUNCTION__, tempdword);
+ ctrl_dbg(ctrl, "SERR_INTR_ENABLE = %x\n", tempdword);
}
return 0;