r8169: multicast register update (sync with Realtek's 8.004.00 8168 driver)

[linux-2.6-omap-h63xx.git] / drivers / net / r8169.c

diff --git a/drivers/net/r8169.c b/drivers/net/r8169.c
index b94fa7ef1955ccc8036a46370102e366fb4b153c..9086e819d742f29a37a0b0dc348b3e16fe049d95 100644 (file)
--- a/drivers/net/r8169.c
+++ b/drivers/net/r8169.c
@@ -171,6 +171,8 @@ static struct pci_device_id rtl8169_pci_tbl[] = {
        { PCI_DEVICE(0x16ec,                    0x0116), 0, 0, RTL_CFG_0 },
        { PCI_VENDOR_ID_LINKSYS,                0x1032,
                PCI_ANY_ID, 0x0024, 0, 0, RTL_CFG_0 },
+       { 0x0001,                               0x8168,
+               PCI_ANY_ID, 0x2410, 0, 0, RTL_CFG_2 },
        {0,},
 };
 
@@ -468,7 +470,7 @@ static void mdio_write(void __iomem *ioaddr, int reg_addr, int value)
 {
        int i;
 
-       RTL_W32(PHYAR, 0x80000000 | (reg_addr & 0xFF) << 16 | value);
+       RTL_W32(PHYAR, 0x80000000 | (reg_addr & 0x1f) << 16 | (value & 0xffff));
 
        for (i = 20; i > 0; i--) {
                /*
@@ -485,7 +487,7 @@ static int mdio_read(void __iomem *ioaddr, int reg_addr)
 {
        int i, value = -1;
 
-       RTL_W32(PHYAR, 0x0 | (reg_addr & 0xFF) << 16);
+       RTL_W32(PHYAR, 0x0 | (reg_addr & 0x1f) << 16);
 
        for (i = 20; i > 0; i--) {
                /*
@@ -493,7 +495,7 @@ static int mdio_read(void __iomem *ioaddr, int reg_addr)
                 * the specified MII register.
                 */
                if (RTL_R32(PHYAR) & 0x80000000) {
-                       value = (int) (RTL_R32(PHYAR) & 0xFFFF);
+                       value = RTL_R32(PHYAR) & 0xffff;
                        break;
                }
                udelay(25);
@@ -1245,16 +1247,6 @@ static void rtl8169sb_hw_phy_config(void __iomem *ioaddr)
 
        rtl_phy_write(ioaddr, phy_reg_init, ARRAY_SIZE(phy_reg_init));
 }
-static void rtl8168b_hw_phy_config(void __iomem *ioaddr)
-{
-       struct phy_reg phy_reg_init[] = {
-               { 0x1f, 0x0000 },
-               { 0x10, 0xf41b },
-               { 0x1f, 0x0000 }
-       };
-
-       rtl_phy_write(ioaddr, phy_reg_init, ARRAY_SIZE(phy_reg_init));
-}
 
 static void rtl8168cp_hw_phy_config(void __iomem *ioaddr)
 {
@@ -1324,11 +1316,6 @@ static void rtl_hw_phy_config(struct net_device *dev)
        case RTL_GIGA_MAC_VER_04:
                rtl8169sb_hw_phy_config(ioaddr);
                break;
-       case RTL_GIGA_MAC_VER_11:
-       case RTL_GIGA_MAC_VER_12:
-       case RTL_GIGA_MAC_VER_17:
-               rtl8168b_hw_phy_config(ioaddr);
-               break;
        case RTL_GIGA_MAC_VER_18:
                rtl8168cp_hw_phy_config(ioaddr);
                break;
@@ -1630,6 +1617,7 @@ rtl8169_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
        SET_NETDEV_DEV(dev, &pdev->dev);
        tp = netdev_priv(dev);
        tp->dev = dev;
+       tp->pci_dev = pdev;
        tp->msg_enable = netif_msg_init(debug.msg_enable, R8169_MSG_DEFAULT);
 
        /* enable device (incl. PCI PM wakeup and hotplug setup) */
@@ -1718,18 +1706,18 @@ rtl8169_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
 
        rtl8169_print_mac_version(tp);
 
-       for (i = ARRAY_SIZE(rtl_chip_info) - 1; i >= 0; i--) {
+       for (i = 0; i < ARRAY_SIZE(rtl_chip_info); i++) {
                if (tp->mac_version == rtl_chip_info[i].mac_version)
                        break;
        }
-       if (i < 0) {
+       if (i == ARRAY_SIZE(rtl_chip_info)) {
                /* Unknown chip: assume array element #0, original RTL-8169 */
                if (netif_msg_probe(tp)) {
                        dev_printk(KERN_DEBUG, &pdev->dev,
                                "unknown chip version, assuming %s\n",
                                rtl_chip_info[0].name);
                }
-               i++;
+               i = 0;
        }
        tp->chipset = i;
 
@@ -1739,7 +1727,8 @@ rtl8169_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
        tp->features |= rtl_try_msi(pdev, ioaddr, cfg);
        RTL_W8(Cfg9346, Cfg9346_Lock);
 
-       if (RTL_R8(PHYstatus) & TBI_Enable) {
+       if ((tp->mac_version <= RTL_GIGA_MAC_VER_06) &&
+           (RTL_R8(PHYstatus) & TBI_Enable)) {
                tp->set_speed = rtl8169_set_speed_tbi;
                tp->get_settings = rtl8169_gset_tbi;
                tp->phy_reset_enable = rtl8169_tbi_reset_enable;
@@ -1789,7 +1778,6 @@ rtl8169_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
 #endif
 
        tp->intr_mask = 0xffff;
-       tp->pci_dev = pdev;
        tp->mmio_addr = ioaddr;
        tp->align = cfg->align;
        tp->hw_start = cfg->hw_start;
@@ -2014,7 +2002,7 @@ static void rtl8169_set_magic_reg(void __iomem *ioaddr, unsigned mac_version)
        u32 clk;
 
        clk = RTL_R8(Config2) & PCI_Clock_66MHz;
-       for (i = 0; i < ARRAY_SIZE(cfg2_info); i++) {
+       for (i = 0; i < ARRAY_SIZE(cfg2_info); i++, p++) {
                if ((p->mac_version == mac_version) && (p->clk == clk)) {
                        RTL_W32(0x7c, p->val);
                        break;
@@ -2223,7 +2211,7 @@ out:
 
 static inline void rtl8169_make_unusable_by_asic(struct RxDesc *desc)
 {
-       desc->addr = 0x0badbadbadbadbadull;
+       desc->addr = cpu_to_le64(0x0badbadbadbadbadull);
        desc->opts1 &= ~cpu_to_le32(DescOwn | RsvdMask);
 }
 
@@ -2410,6 +2398,8 @@ static void rtl8169_wait_for_quiescence(struct net_device *dev)
        rtl8169_irq_mask_and_ack(ioaddr);
 
 #ifdef CONFIG_R8169_NAPI
+       tp->intr_mask = 0xffff;
+       RTL_W16(IntrMask, tp->intr_event);
        napi_enable(&tp->napi);
 #endif
 }
@@ -2847,7 +2837,7 @@ static int rtl8169_rx_interrupt(struct net_device *dev,
                }
 
                /* Work around for AMD plateform. */
-               if ((desc->opts2 & 0xfffe000) &&
+               if ((desc->opts2 & cpu_to_le32(0xfffe000)) &&
                    (tp->mac_version == RTL_GIGA_MAC_VER_05)) {
                        desc->opts2 = 0;
                        cur_rx++;
@@ -3108,8 +3098,10 @@ static void rtl_set_rx_mode(struct net_device *dev)
            (tp->mac_version == RTL_GIGA_MAC_VER_15) ||
            (tp->mac_version == RTL_GIGA_MAC_VER_16) ||
            (tp->mac_version == RTL_GIGA_MAC_VER_17)) {
-               mc_filter[0] = 0xffffffff;
-               mc_filter[1] = 0xffffffff;
+               u32 data = mc_filter[0];
+
+               mc_filter[0] = swab32(mc_filter[1]);
+               mc_filter[1] = swab32(data);
        }
 
        RTL_W32(MAR0 + 0, mc_filter[0]);