]> www.pilppa.org Git - linux-2.6-omap-h63xx.git/blobdiff - drivers/net/bnx2.c
Merge branch 'master' of /home/davem/src/GIT/linux-2.6/
[linux-2.6-omap-h63xx.git] / drivers / net / bnx2.c
index d4a3dac21dcfb83fdc7e6c2835705ac66433ec3c..8466d351a70375b7e733d4498862086302cca349 100644 (file)
@@ -1,6 +1,6 @@
 /* bnx2.c: Broadcom NX2 network driver.
  *
- * Copyright (c) 2004-2008 Broadcom Corporation
+ * Copyright (c) 2004-2009 Broadcom Corporation
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
@@ -57,8 +57,8 @@
 
 #define DRV_MODULE_NAME                "bnx2"
 #define PFX DRV_MODULE_NAME    ": "
-#define DRV_MODULE_VERSION     "1.9.0"
-#define DRV_MODULE_RELDATE     "Dec 16, 2008"
+#define DRV_MODULE_VERSION     "1.9.2"
+#define DRV_MODULE_RELDATE     "Feb 11, 2009"
 
 #define RUN_AT(x) (jiffies + (x))
 
@@ -1497,6 +1497,8 @@ static int bnx2_fw_sync(struct bnx2 *, u32, int, int);
 
 static int
 bnx2_setup_remote_phy(struct bnx2 *bp, u8 port)
+__releases(&bp->phy_lock)
+__acquires(&bp->phy_lock)
 {
        u32 speed_arg = 0, pause_adv;
 
@@ -1554,6 +1556,8 @@ bnx2_setup_remote_phy(struct bnx2 *bp, u8 port)
 
 static int
 bnx2_setup_serdes_phy(struct bnx2 *bp, u8 port)
+__releases(&bp->phy_lock)
+__acquires(&bp->phy_lock)
 {
        u32 adv, bmcr;
        u32 new_adv = 0;
@@ -1866,6 +1870,8 @@ bnx2_set_remote_link(struct bnx2 *bp)
 
 static int
 bnx2_setup_copper_phy(struct bnx2 *bp)
+__releases(&bp->phy_lock)
+__acquires(&bp->phy_lock)
 {
        u32 bmcr;
        u32 new_bmcr;
@@ -1963,6 +1969,8 @@ bnx2_setup_copper_phy(struct bnx2 *bp)
 
 static int
 bnx2_setup_phy(struct bnx2 *bp, u8 port)
+__releases(&bp->phy_lock)
+__acquires(&bp->phy_lock)
 {
        if (bp->loopback == MAC_LOOPBACK)
                return 0;
@@ -2176,6 +2184,8 @@ bnx2_init_copper_phy(struct bnx2 *bp, int reset_phy)
 
 static int
 bnx2_init_phy(struct bnx2 *bp, int reset_phy)
+__releases(&bp->phy_lock)
+__acquires(&bp->phy_lock)
 {
        u32 val;
        int rc = 0;
@@ -2910,18 +2920,8 @@ bnx2_rx_int(struct bnx2 *bp, struct bnx2_napi *bnapi, int budget)
 
                rx_hdr = (struct l2_fhdr *) skb->data;
                len = rx_hdr->l2_fhdr_pkt_len;
+               status = rx_hdr->l2_fhdr_status;
 
-               if ((status = rx_hdr->l2_fhdr_status) &
-                       (L2_FHDR_ERRORS_BAD_CRC |
-                       L2_FHDR_ERRORS_PHY_DECODE |
-                       L2_FHDR_ERRORS_ALIGNMENT |
-                       L2_FHDR_ERRORS_TOO_SHORT |
-                       L2_FHDR_ERRORS_GIANT_FRAME)) {
-
-                       bnx2_reuse_rx_skb(bp, rxr, skb, sw_ring_cons,
-                                         sw_ring_prod);
-                       goto next_rx;
-               }
                hdr_len = 0;
                if (status & L2_FHDR_STATUS_SPLIT) {
                        hdr_len = rx_hdr->l2_fhdr_ip_xsum;
@@ -2931,6 +2931,24 @@ bnx2_rx_int(struct bnx2 *bp, struct bnx2_napi *bnapi, int budget)
                        pg_ring_used = 1;
                }
 
+               if (unlikely(status & (L2_FHDR_ERRORS_BAD_CRC |
+                                      L2_FHDR_ERRORS_PHY_DECODE |
+                                      L2_FHDR_ERRORS_ALIGNMENT |
+                                      L2_FHDR_ERRORS_TOO_SHORT |
+                                      L2_FHDR_ERRORS_GIANT_FRAME))) {
+
+                       bnx2_reuse_rx_skb(bp, rxr, skb, sw_ring_cons,
+                                         sw_ring_prod);
+                       if (pg_ring_used) {
+                               int pages;
+
+                               pages = PAGE_ALIGN(len - hdr_len) >> PAGE_SHIFT;
+
+                               bnx2_reuse_rx_skb_pages(bp, rxr, NULL, pages);
+                       }
+                       goto next_rx;
+               }
+
                len -= 4;
 
                if (len <= bp->rx_copy_thresh) {
@@ -2997,6 +3015,8 @@ bnx2_rx_int(struct bnx2 *bp, struct bnx2_napi *bnapi, int budget)
                                skb->ip_summed = CHECKSUM_UNNECESSARY;
                }
 
+               skb_record_rx_queue(skb, bnapi - &bp->bnx2_napi[0]);
+
 #ifdef BCM_VLAN
                if (hw_vlan)
                        vlan_hwaccel_receive_skb(skb, bp->vlgrp, vtag);
@@ -3053,7 +3073,7 @@ bnx2_msi(int irq, void *dev_instance)
        if (unlikely(atomic_read(&bp->intr_sem) != 0))
                return IRQ_HANDLED;
 
-       netif_rx_schedule(&bnapi->napi);
+       napi_schedule(&bnapi->napi);
 
        return IRQ_HANDLED;
 }
@@ -3070,7 +3090,7 @@ bnx2_msi_1shot(int irq, void *dev_instance)
        if (unlikely(atomic_read(&bp->intr_sem) != 0))
                return IRQ_HANDLED;
 
-       netif_rx_schedule(&bnapi->napi);
+       napi_schedule(&bnapi->napi);
 
        return IRQ_HANDLED;
 }
@@ -3106,9 +3126,9 @@ bnx2_interrupt(int irq, void *dev_instance)
        if (unlikely(atomic_read(&bp->intr_sem) != 0))
                return IRQ_HANDLED;
 
-       if (netif_rx_schedule_prep(&bnapi->napi)) {
+       if (napi_schedule_prep(&bnapi->napi)) {
                bnapi->last_status_idx = sblk->status_idx;
-               __netif_rx_schedule(&bnapi->napi);
+               __napi_schedule(&bnapi->napi);
        }
 
        return IRQ_HANDLED;
@@ -3218,7 +3238,7 @@ static int bnx2_poll_msix(struct napi_struct *napi, int budget)
                rmb();
                if (likely(!bnx2_has_fast_work(bnapi))) {
 
-                       netif_rx_complete(napi);
+                       napi_complete(napi);
                        REG_WR(bp, BNX2_PCICFG_INT_ACK_CMD, bnapi->int_num |
                               BNX2_PCICFG_INT_ACK_CMD_INDEX_VALID |
                               bnapi->last_status_idx);
@@ -3251,7 +3271,7 @@ static int bnx2_poll(struct napi_struct *napi, int budget)
 
                rmb();
                if (likely(!bnx2_has_work(bnapi))) {
-                       netif_rx_complete(napi);
+                       napi_complete(napi);
                        if (likely(bp->flags & BNX2_FLAG_USING_MSI_OR_MSIX)) {
                                REG_WR(bp, BNX2_PCICFG_INT_ACK_CMD,
                                       BNX2_PCICFG_INT_ACK_CMD_INDEX_VALID |