#include <asm/arch/board.h>
+#define DRIVER_NAME "omap2-onenand"
+
#define ONENAND_IO_SIZE SZ_128K
#define ONENAND_BUFRAM_SIZE (1024 * 5)
struct completion irq_done;
struct completion dma_done;
int dma_channel;
+ int freq;
+ int (*setup)(void __iomem *base, int freq);
};
static unsigned short omap2_onenand_readw(void __iomem *addr)
u32 syscfg;
if (state == FL_RESETING) {
- udelay(1);
+ int i;
+
+ for (i = 0; i < 20; i++) {
+ udelay(1);
+ interrupt = omap2_onenand_readw(info->onenand.base + ONENAND_REG_INTERRUPT);
+ if (interrupt & ONENAND_INT_MASTER)
+ break;
+ }
+ ctrl = omap2_onenand_readw(info->onenand.base + ONENAND_REG_CTRL_STATUS);
+ if (ctrl & ONENAND_CTRL_ERROR) {
+ printk(KERN_ERR "onenand_wait: reset error! ctrl 0x%04x intr 0x%04x\n", ctrl, interrupt);
+ return -EIO;
+ }
+ if (!(interrupt & ONENAND_INT_RESET)) {
+ printk(KERN_ERR "onenand_wait: reset timeout! ctrl 0x%04x intr 0x%04x\n", ctrl, interrupt);
+ return -EIO;
+ }
return 0;
}
omap2_onenand_writew(syscfg, info->onenand.base + ONENAND_REG_SYS_CFG1);
INIT_COMPLETION(info->irq_done);
- result = omap_get_gpio_datain(info->gpio_irq);
- if (result == -1) {
- ctrl = omap2_onenand_readw(info->onenand.base + ONENAND_REG_CTRL_STATUS);
- printk(KERN_ERR "onenand_wait: gpio error, state = %d, ctrl = 0x%04x\n", state, ctrl);
- return -EIO;
+ if (info->gpio_irq) {
+ result = omap_get_gpio_datain(info->gpio_irq);
+ if (result == -1) {
+ ctrl = omap2_onenand_readw(info->onenand.base + ONENAND_REG_CTRL_STATUS);
+ printk(KERN_ERR "onenand_wait: gpio error, state = %d, ctrl = 0x%04x\n", state, ctrl);
+ return -EIO;
+ }
+ } else {
+ result = 0;
}
if (result == 0) {
int retry_cnt = 0;
printk(KERN_ERR "onenand_wait: controller error = 0x%04x\n", ctrl);
if (ctrl & ONENAND_CTRL_LOCK)
printk(KERN_ERR "onenand_erase: Device is write protected!!!\n");
- return ctrl;
+ return -EIO;
}
if (ctrl & 0xFE9F)
if (interrupt & ONENAND_INT_READ) {
int ecc = omap2_onenand_readw(info->onenand.base + ONENAND_REG_ECC_STATUS);
if (ecc) {
- printk(KERN_ERR "onenand_wait: ECC error = 0x%04x\n", ecc);
if (ecc & ONENAND_ECC_2BIT_ALL) {
+ printk(KERN_ERR "onenand_wait: ECC error = 0x%04x\n", ecc);
mtd->ecc_stats.failed++;
- return ecc;
+ return -EBADMSG;
} else if (ecc & ONENAND_ECC_1BIT_ALL)
+ printk(KERN_NOTICE "onenand_wait: correctable ECC error = 0x%04x\n", ecc);
mtd->ecc_stats.corrected++;
}
} else if (state == FL_READING) {
return 0;
}
+static struct platform_driver omap2_onenand_driver;
+
+static int __adjust_timing(struct device *dev, void *data)
+{
+ int ret = 0;
+ struct omap2_onenand *info;
+
+ info = dev_get_drvdata(dev);
+
+ BUG_ON(info->setup == NULL);
+
+ /* DMA is not in use so this is all that is needed */
+ ret = info->setup(info->onenand.base, info->freq);
+
+ return ret;
+}
+
+int omap2_onenand_rephase(void)
+{
+ return driver_for_each_device(&omap2_onenand_driver.driver, NULL,
+ NULL, __adjust_timing);
+}
+
static void __devexit omap2_onenand_shutdown(struct platform_device *pdev)
{
struct omap2_onenand *info = dev_get_drvdata(&pdev->dev);
init_completion(&info->dma_done);
info->gpmc_cs = pdata->cs;
info->gpio_irq = pdata->gpio_irq;
+ info->dma_channel = pdata->dma_channel;
+ if (info->dma_channel < 0) {
+ /* if -1, don't use DMA */
+ info->gpio_irq = 0;
+ }
r = gpmc_cs_request(info->gpmc_cs, ONENAND_IO_SIZE, &info->phys_base);
if (r < 0) {
}
if (pdata->onenand_setup != NULL) {
- r = pdata->onenand_setup(info->onenand.base);
+ r = pdata->onenand_setup(info->onenand.base, info->freq);
if (r < 0) {
dev_err(&pdev->dev, "Onenand platform setup failed: %d\n", r);
goto err_iounmap;
}
- }
+ info->setup = pdata->onenand_setup;
+ }
- if ((r = omap_request_gpio(info->gpio_irq)) < 0) {
- dev_err(&pdev->dev, "Failed to request GPIO%d for OneNAND\n",
- info->gpio_irq);
- goto err_iounmap;
+ if (info->gpio_irq) {
+ if ((r = omap_request_gpio(info->gpio_irq)) < 0) {
+ dev_err(&pdev->dev, "Failed to request GPIO%d for OneNAND\n",
+ info->gpio_irq);
+ goto err_iounmap;
}
omap_set_gpio_direction(info->gpio_irq, 1);
if ((r = request_irq(OMAP_GPIO_IRQ(info->gpio_irq),
- omap2_onenand_interrupt, SA_TRIGGER_RISING,
+ omap2_onenand_interrupt, IRQF_TRIGGER_RISING,
pdev->dev.driver->name, info)) < 0)
goto err_release_gpio;
+ }
- r = omap_request_dma(0, pdev->dev.driver->name,
- omap2_onenand_dma_cb, (void *) info,
- &info->dma_channel);
- if (r == 0) {
- omap_set_dma_write_mode(info->dma_channel, OMAP_DMA_WRITE_NON_POSTED);
- omap_set_dma_src_data_pack(info->dma_channel, 1);
- omap_set_dma_src_burst_mode(info->dma_channel, OMAP_DMA_DATA_BURST_8);
- omap_set_dma_dest_data_pack(info->dma_channel, 1);
- omap_set_dma_dest_burst_mode(info->dma_channel, OMAP_DMA_DATA_BURST_8);
- } else {
- dev_info(&pdev->dev,
- "failed to allocate DMA for OneNAND, using PIO instead\n");
- info->dma_channel = -1;
+ if (info->dma_channel >= 0) {
+ r = omap_request_dma(0, pdev->dev.driver->name,
+ omap2_onenand_dma_cb, (void *) info,
+ &info->dma_channel);
+ if (r == 0) {
+ omap_set_dma_write_mode(info->dma_channel, OMAP_DMA_WRITE_NON_POSTED);
+ omap_set_dma_src_data_pack(info->dma_channel, 1);
+ omap_set_dma_src_burst_mode(info->dma_channel, OMAP_DMA_DATA_BURST_8);
+ omap_set_dma_dest_data_pack(info->dma_channel, 1);
+ omap_set_dma_dest_burst_mode(info->dma_channel, OMAP_DMA_DATA_BURST_8);
+ } else {
+ dev_info(&pdev->dev,
+ "failed to allocate DMA for OneNAND, using PIO instead\n");
+ info->dma_channel = -1;
+ }
}
dev_info(&pdev->dev, "initializing on CS%d, phys base 0x%08lx, virtual base %p\n",
info->mtd.name = pdev->dev.bus_id;
info->mtd.priv = &info->onenand;
info->mtd.owner = THIS_MODULE;
- info->onenand.wait = omap2_onenand_wait;
- info->onenand.read_bufferram = omap2_onenand_read_bufferram;
- info->onenand.write_bufferram = omap2_onenand_write_bufferram;
+
+ if (info->dma_channel >= 0) {
+ info->onenand.wait = omap2_onenand_wait;
+ info->onenand.read_bufferram = omap2_onenand_read_bufferram;
+ info->onenand.write_bufferram = omap2_onenand_write_bufferram;
+ }
if ((r = onenand_scan(&info->mtd, 1)) < 0)
goto err_release_dma;
+ switch ((info->onenand.version_id >> 4) & 0xf) {
+ case 0:
+ info->freq = 40;
+ break;
+ case 1:
+ info->freq = 54;
+ break;
+ case 2:
+ info->freq = 66;
+ break;
+ case 3:
+ info->freq = 83;
+ break;
+ }
+
#ifdef CONFIG_MTD_PARTITIONS
if (pdata->parts != NULL)
r = add_mtd_partitions(&info->mtd, pdata->parts, pdata->nr_parts);
err_release_dma:
if (info->dma_channel != -1)
omap_free_dma(info->dma_channel);
- free_irq(OMAP_GPIO_IRQ(info->gpio_irq), info);
+ if (info->gpio_irq)
+ free_irq(OMAP_GPIO_IRQ(info->gpio_irq), info);
err_release_gpio:
- omap_free_gpio(info->gpio_irq);
+ if (info->gpio_irq)
+ omap_free_gpio(info->gpio_irq);
err_iounmap:
iounmap(info->onenand.base);
err_release_mem_region:
omap_free_dma(info->dma_channel);
omap2_onenand_shutdown(pdev);
platform_set_drvdata(pdev, NULL);
- free_irq(OMAP_GPIO_IRQ(info->gpio_irq), info);
- omap_free_gpio(info->gpio_irq);
+ if (info->gpio_irq) {
+ free_irq(OMAP_GPIO_IRQ(info->gpio_irq), info);
+ omap_free_gpio(info->gpio_irq);
+ }
iounmap(info->onenand.base);
release_mem_region(info->phys_base, ONENAND_IO_SIZE);
kfree(info);
.remove = omap2_onenand_remove,
.shutdown = omap2_onenand_shutdown,
.driver = {
- .name = "omap2-onenand",
+ .name = DRIVER_NAME,
.owner = THIS_MODULE,
},
};
-MODULE_ALIAS(DRIVER_NAME);
-
static int __init omap2_onenand_init(void)
{
printk(KERN_INFO "OMAP2 OneNAND driver initializing\n");
module_init(omap2_onenand_init);
module_exit(omap2_onenand_exit);
+MODULE_ALIAS(DRIVER_NAME);
MODULE_LICENSE("GPL");
MODULE_AUTHOR("Jarkko Lavinen <jarkko.lavinen@nokia.com>");
MODULE_DESCRIPTION("Glue layer for OneNAND flash on OMAP2");
projects / linux-2.6-omap-h63xx.git / blobdiff