int h;
ide_hwif_t *hwif;
- /*
- * Look for a hwif with matching io_base specified using
- * parameters to ide_setup().
- */
- for (h = 0; h < MAX_HWIFS; ++h) {
- hwif = &ide_hwifs[h];
- if (hwif->io_ports[IDE_DATA_OFFSET] == io_base) {
- if (hwif->chipset == ide_forced)
- return hwif; /* a perfect match */
- }
- }
/*
* Look for a hwif with matching io_base default value.
* If chipset is "ide_unknown", then claim that hwif slot.
* @d: IDE port info
* @bar: BAR number
*
- * Checks if a BAR is configured and points to MMIO space. If so
- * print an error and return an error code. Otherwise return 0
+ * Checks if a BAR is configured and points to MMIO space. If so,
+ * return an error code. Otherwise return 0
*/
-static int ide_pci_check_iomem(struct pci_dev *dev, const struct ide_port_info *d, int bar)
+static int ide_pci_check_iomem(struct pci_dev *dev, const struct ide_port_info *d,
+ int bar)
{
ulong flags = pci_resource_flags(dev, bar);
if (!flags || pci_resource_len(dev, bar) == 0)
return 0;
- /* I/O space */
- if(flags & PCI_BASE_ADDRESS_IO_MASK)
+ /* I/O space */
+ if (flags & IORESOURCE_IO)
return 0;
/* Bad */
- printk(KERN_ERR "%s: IO baseregs (BIOS) are reported "
- "as MEM, report to "
- "<andre@linux-ide.org>.\n", d->name);
return -EINVAL;
}
unsigned long ctl = 0, base = 0;
ide_hwif_t *hwif;
u8 bootable = (d->host_flags & IDE_HFLAG_BOOTABLE) ? 1 : 0;
- u8 oldnoprobe = 0;
struct hw_regs_s hw;
if ((d->host_flags & IDE_HFLAG_ISA_PORTS) == 0) {
- /* Possibly we should fail if these checks report true */
- ide_pci_check_iomem(dev, d, 2*port);
- ide_pci_check_iomem(dev, d, 2*port+1);
+ if (ide_pci_check_iomem(dev, d, 2 * port) ||
+ ide_pci_check_iomem(dev, d, 2 * port + 1)) {
+ printk(KERN_ERR "%s: I/O baseregs (BIOS) are reported "
+ "as MEM for port %d!\n", d->name, port);
+ return NULL;
+ }
ctl = pci_resource_start(dev, 2*port+1);
base = pci_resource_start(dev, 2*port);
return NULL; /* no room in ide_hwifs[] */
memset(&hw, 0, sizeof(hw));
- hw.irq = hwif->irq ? hwif->irq : irq;
+ hw.irq = irq;
hw.dev = &dev->dev;
hw.chipset = d->chipset ? d->chipset : ide_pci;
ide_std_init_ports(&hw, base, ctl | 2);
- if (hwif->io_ports[IDE_DATA_OFFSET] == base &&
- hwif->io_ports[IDE_CONTROL_OFFSET] == (ctl | 2))
- oldnoprobe = hwif->noprobe;
-
ide_init_port_hw(hwif, &hw);
- hwif->noprobe = oldnoprobe;
-
hwif->dev = &dev->dev;
hwif->cds = d;
return hwif;
}
+#ifdef CONFIG_BLK_DEV_IDEDMA_PCI
/**
* ide_hwif_setup_dma - configure DMA interface
- * @dev: PCI device
- * @d: IDE port info
* @hwif: IDE interface
+ * @d: IDE port info
*
* Set up the DMA base for the interface. Enable the master bits as
* necessary and attempt to bring the device DMA into a ready to use
* state
*/
-static void ide_hwif_setup_dma(struct pci_dev *dev, const struct ide_port_info *d, ide_hwif_t *hwif)
+void ide_hwif_setup_dma(ide_hwif_t *hwif, const struct ide_port_info *d)
{
-#ifdef CONFIG_BLK_DEV_IDEDMA_PCI
+ struct pci_dev *dev = to_pci_dev(hwif->dev);
u16 pcicmd;
pci_read_config_word(dev, PCI_COMMAND, &pcicmd);
"(BIOS)\n", hwif->name, d->name);
}
}
-#endif /* CONFIG_BLK_DEV_IDEDMA_PCI*/
}
+#endif /* CONFIG_BLK_DEV_IDEDMA_PCI */
/**
* ide_setup_pci_controller - set up IDE PCI
void ide_pci_setup_ports(struct pci_dev *dev, const struct ide_port_info *d, int pciirq, u8 *idx)
{
int channels = (d->host_flags & IDE_HFLAG_SINGLE) ? 1 : 2, port;
- ide_hwif_t *hwif, *mate = NULL;
+ ide_hwif_t *hwif;
u8 tmp;
/*
*(idx + port) = hwif->index;
}
-
- for (port = 0; port < channels; ++port) {
- if (*(idx + port) == 0xff)
- continue;
-
- hwif = &ide_hwifs[*(idx + port)];
-
- if (mate) {
- hwif->mate = mate;
- mate->mate = hwif;
- }
-
- hwif->channel = port;
-
- if (d->init_iops)
- d->init_iops(hwif);
-
- if ((d->host_flags & IDE_HFLAG_NO_DMA) == 0)
- ide_hwif_setup_dma(dev, d, hwif);
-
- if ((!hwif->irq && (d->host_flags & IDE_HFLAG_LEGACY_IRQS)) ||
- (d->host_flags & IDE_HFLAG_FORCE_LEGACY_IRQS))
- hwif->irq = port ? 15 : 14;
-
- hwif->host_flags = d->host_flags;
- hwif->pio_mask = d->pio_mask;
-
- if ((d->host_flags & IDE_HFLAG_SERIALIZE) && hwif->mate)
- hwif->mate->serialized = hwif->serialized = 1;
-
- if (d->host_flags & IDE_HFLAG_IO_32BIT) {
- hwif->drives[0].io_32bit = 1;
- hwif->drives[1].io_32bit = 1;
- }
-
- if (d->host_flags & IDE_HFLAG_UNMASK_IRQS) {
- hwif->drives[0].unmask = 1;
- hwif->drives[1].unmask = 1;
- }
-
- hwif->swdma_mask = d->swdma_mask;
- hwif->mwdma_mask = d->mwdma_mask;
- hwif->ultra_mask = d->udma_mask;
-
- if ((d->host_flags && IDE_HFLAG_NO_DMA) == 0 &&
- hwif->dma_base == 0) {
- hwif->swdma_mask = 0;
- hwif->mwdma_mask = 0;
- hwif->ultra_mask = 0;
- }
-
- hwif->drives[0].autotune = 1;
- hwif->drives[1].autotune = 1;
-
- if (d->host_flags & IDE_HFLAG_RQSIZE_256)
- hwif->rqsize = 256;
-
- if (d->init_hwif)
- /* Call chipset-specific routine
- * for each enabled hwif
- */
- d->init_hwif(hwif);
-
- mate = hwif;
- }
}
EXPORT_SYMBOL_GPL(ide_pci_setup_ports);
ret = do_ide_setup_pci_device(dev, d, &idx[0], 1);
if (ret >= 0)
- ide_device_add(idx);
+ ide_device_add(idx, d);
return ret;
}
goto out;
}
- ide_device_add(idx);
+ ide_device_add(idx, d);
out:
return ret;
}
projects / linux-2.6-omap-h63xx.git / blobdiff