]> www.pilppa.org Git - linux-2.6-omap-h63xx.git/blobdiff - drivers/ide/pci/sl82c105.c
ide: make void and rename ide_dma_lostirq() method
[linux-2.6-omap-h63xx.git] / drivers / ide / pci / sl82c105.c
index ee6dd45a9ba708bd6393525e042f656e6a6ecf3e..202ce4965b6004b685cead0346b752bea99f690f 100644 (file)
@@ -82,7 +82,14 @@ static u8 sl82c105_tune_pio(ide_drive_t *drive, u8 pio)
 
        pio = ide_get_best_pio_mode(drive, pio, 5, &p);
 
-       drive->drive_data = drv_ctrl = get_pio_timings(&p);
+       drv_ctrl = get_pio_timings(&p);
+
+       /*
+        * Store the PIO timings so that we can restore them
+        * in case DMA will be turned off...
+        */
+       drive->drive_data &= 0xffff0000;
+       drive->drive_data |= drv_ctrl;
 
        if (!drive->using_dma) {
                /*
@@ -100,59 +107,66 @@ static u8 sl82c105_tune_pio(ide_drive_t *drive, u8 pio)
 }
 
 /*
- * Configure the drive and the chipset for DMA
+ * Configure the drive and chipset for a new transfer speed.
  */
-static int config_for_dma (ide_drive_t *drive)
+static int sl82c105_tune_chipset(ide_drive_t *drive, u8 speed)
 {
-       ide_hwif_t *hwif = HWIF(drive);
-       struct pci_dev *dev = hwif->pci_dev;
-       unsigned int reg;
+       static u16 mwdma_timings[] = {0x0707, 0x0201, 0x0200};
+       u16 drv_ctrl;
+
+       DBG(("sl82c105_tune_chipset(drive:%s, speed:%s)\n",
+            drive->name, ide_xfer_verbose(speed)));
 
-       DBG(("config_for_dma(drive:%s)\n", drive->name));
+       speed = ide_rate_filter(drive, speed);
 
-       reg = (hwif->channel ? 0x4c : 0x44) + (drive->select.b.unit ? 4 : 0);
+       switch (speed) {
+       case XFER_MW_DMA_2:
+       case XFER_MW_DMA_1:
+       case XFER_MW_DMA_0:
+               drv_ctrl = mwdma_timings[speed - XFER_MW_DMA_0];
 
-       if (ide_config_drive_speed(drive, XFER_MW_DMA_2) != 0)
-               return 1;
+               /*
+                * Store the DMA timings so that we can actually program
+                * them when DMA will be turned on...
+                */
+               drive->drive_data &= 0x0000ffff;
+               drive->drive_data |= (unsigned long)drv_ctrl << 16;
+
+               /*
+                * If we are already using DMA, we just reprogram
+                * the drive control register.
+                */
+               if (drive->using_dma) {
+                       struct pci_dev *dev     = HWIF(drive)->pci_dev;
+                       int reg                 = 0x44 + drive->dn * 4;
 
-       pci_write_config_word(dev, reg, 0x0240);
+                       pci_write_config_word(dev, reg, drv_ctrl);
+               }
+               break;
+       case XFER_PIO_5:
+       case XFER_PIO_4:
+       case XFER_PIO_3:
+       case XFER_PIO_2:
+       case XFER_PIO_1:
+       case XFER_PIO_0:
+               (void) sl82c105_tune_pio(drive, speed - XFER_PIO_0);
+               break;
+       default:
+               return -1;
+       }
 
-       return 0;
+       return ide_config_drive_speed(drive, speed);
 }
 
 /*
- * Check to see if the drive and
- * chipset is capable of DMA mode
+ * Check to see if the drive and chipset are capable of DMA mode.
  */
-
-static int sl82c105_check_drive (ide_drive_t *drive)
+static int sl82c105_ide_dma_check(ide_drive_t *drive)
 {
-       ide_hwif_t *hwif        = HWIF(drive);
+       DBG(("sl82c105_ide_dma_check(drive:%s)\n", drive->name));
 
-       DBG(("sl82c105_check_drive(drive:%s)\n", drive->name));
-
-       do {
-               struct hd_driveid *id = drive->id;
-
-               if (!drive->autodma)
-                       break;
-
-               if (!id || !(id->capability & 1))
-                       break;
-
-               /* Consult the list of known "bad" drives */
-               if (__ide_dma_bad_drive(drive))
-                       break;
-
-               if (id->field_valid & 2) {
-                       if ((id->dma_mword & hwif->mwdma_mask) ||
-                           (id->dma_1word & hwif->swdma_mask))
-                               return 0;
-               }
-
-               if (__ide_dma_good_drive(drive) && id->eide_dma_time < 150)
-                       return 0;
-       } while (0);
+       if (ide_tune_dma(drive))
+               return 0;
 
        return -1;
 }
@@ -181,14 +195,14 @@ static inline void sl82c105_reset_host(struct pci_dev *dev)
  * This function is called when the IDE timer expires, the drive
  * indicates that it is READY, and we were waiting for DMA to complete.
  */
-static int sl82c105_ide_dma_lost_irq(ide_drive_t *drive)
+static void sl82c105_dma_lost_irq(ide_drive_t *drive)
 {
-       ide_hwif_t *hwif = HWIF(drive);
-       struct pci_dev *dev = hwif->pci_dev;
-       u32 val, mask = hwif->channel ? CTRL_IDE_IRQB : CTRL_IDE_IRQA;
-       unsigned long dma_base = hwif->dma_base;
+       ide_hwif_t *hwif        = HWIF(drive);
+       struct pci_dev *dev     = hwif->pci_dev;
+       u32 val, mask           = hwif->channel ? CTRL_IDE_IRQB : CTRL_IDE_IRQA;
+       u8 dma_cmd;
 
-       printk("sl82c105: lost IRQ: resetting host\n");
+       printk("sl82c105: lost IRQ, resetting host\n");
 
        /*
         * Check the raw interrupt from the drive.
@@ -201,16 +215,13 @@ static int sl82c105_ide_dma_lost_irq(ide_drive_t *drive)
         * Was DMA enabled?  If so, disable it - we're resetting the
         * host.  The IDE layer will be handling the drive for us.
         */
-       val = inb(dma_base);
-       if (val & 1) {
-               outb(val & ~1, dma_base);
+       dma_cmd = inb(hwif->dma_command);
+       if (dma_cmd & 1) {
+               outb(dma_cmd & ~1, hwif->dma_command);
                printk("sl82c105: DMA was enabled\n");
        }
 
        sl82c105_reset_host(dev);
-
-       /* ide_dmaproc would return 1, so we do as well */
-       return 1;
 }
 
 /*
@@ -221,10 +232,10 @@ static int sl82c105_ide_dma_lost_irq(ide_drive_t *drive)
  * The generic IDE core will have disabled the BMEN bit before this
  * function is called.
  */
-static void sl82c105_ide_dma_start(ide_drive_t *drive)
+static void sl82c105_dma_start(ide_drive_t *drive)
 {
-       ide_hwif_t *hwif = HWIF(drive);
-       struct pci_dev *dev = hwif->pci_dev;
+       ide_hwif_t *hwif        = HWIF(drive);
+       struct pci_dev *dev     = hwif->pci_dev;
 
        sl82c105_reset_host(dev);
        ide_dma_start(drive);
@@ -232,8 +243,8 @@ static void sl82c105_ide_dma_start(ide_drive_t *drive)
 
 static int sl82c105_ide_dma_timeout(ide_drive_t *drive)
 {
-       ide_hwif_t *hwif = HWIF(drive);
-       struct pci_dev *dev = hwif->pci_dev;
+       ide_hwif_t *hwif        = HWIF(drive);
+       struct pci_dev *dev     = hwif->pci_dev;
 
        DBG(("sl82c105_ide_dma_timeout(drive:%s)\n", drive->name));
 
@@ -241,14 +252,20 @@ static int sl82c105_ide_dma_timeout(ide_drive_t *drive)
        return __ide_dma_timeout(drive);
 }
 
-static int sl82c105_ide_dma_on (ide_drive_t *drive)
+static int sl82c105_ide_dma_on(ide_drive_t *drive)
 {
+       struct pci_dev *dev     = HWIF(drive)->pci_dev;
+       int rc, reg             = 0x44 + drive->dn * 4;
+
        DBG(("sl82c105_ide_dma_on(drive:%s)\n", drive->name));
 
-       if (config_for_dma(drive))
-               return 1;
-       printk(KERN_INFO "%s: DMA enabled\n", drive->name);
-       return __ide_dma_on(drive);
+       rc = __ide_dma_on(drive);
+       if (rc == 0) {
+               pci_write_config_word(dev, reg, drive->drive_data >> 16);
+
+               printk(KERN_INFO "%s: DMA enabled\n", drive->name);
+       }
+       return rc;
 }
 
 static void sl82c105_dma_off_quietly(ide_drive_t *drive)
@@ -272,8 +289,8 @@ static void sl82c105_dma_off_quietly(ide_drive_t *drive)
  */
 static void sl82c105_selectproc(ide_drive_t *drive)
 {
-       ide_hwif_t *hwif = HWIF(drive);
-       struct pci_dev *dev = hwif->pci_dev;
+       ide_hwif_t *hwif        = HWIF(drive);
+       struct pci_dev *dev     = hwif->pci_dev;
        u32 val, old, mask;
 
        //DBG(("sl82c105_selectproc(drive:%s)\n", drive->name));
@@ -329,7 +346,7 @@ static unsigned int sl82c105_bridge_revision(struct pci_dev *dev)
        /*
         * The bridge should be part of the same device, but function 0.
         */
-       bridge = pci_find_slot(dev->bus->number,
+       bridge = pci_get_bus_and_slot(dev->bus->number,
                               PCI_DEVFN(PCI_SLOT(dev->devfn), 0));
        if (!bridge)
                return -1;
@@ -339,13 +356,15 @@ static unsigned int sl82c105_bridge_revision(struct pci_dev *dev)
         */
        if (bridge->vendor != PCI_VENDOR_ID_WINBOND ||
            bridge->device != PCI_DEVICE_ID_WINBOND_83C553 ||
-           bridge->class >> 8 != PCI_CLASS_BRIDGE_ISA)
+           bridge->class >> 8 != PCI_CLASS_BRIDGE_ISA) {
+               pci_dev_put(bridge);
                return -1;
-
+       }
        /*
         * We need to find function 0's revision, not function 1
         */
        pci_read_config_byte(bridge, PCI_REVISION_ID, &rev);
+       pci_dev_put(bridge);
 
        return rev;
 }
@@ -373,7 +392,7 @@ static unsigned int __devinit init_chipset_sl82c105(struct pci_dev *dev, const c
 }
 
 /*
- * Initialise the chip
+ * Initialise IDE channel
  */
 static void __devinit init_hwif_sl82c105(ide_hwif_t *hwif)
 {
@@ -382,6 +401,7 @@ static void __devinit init_hwif_sl82c105(ide_hwif_t *hwif)
        DBG(("init_hwif_sl82c105(hwif: ide%d)\n", hwif->index));
 
        hwif->tuneproc          = &sl82c105_tune_drive;
+       hwif->speedproc         = &sl82c105_tune_chipset;
        hwif->selectproc        = &sl82c105_selectproc;
        hwif->resetproc         = &sl82c105_resetproc;
 
@@ -398,11 +418,6 @@ static void __devinit init_hwif_sl82c105(ide_hwif_t *hwif)
         */
        hwif->drives[0].autotune = hwif->drives[1].autotune = 1;
 
-       hwif->atapi_dma = 0;
-       hwif->mwdma_mask = 0;
-       hwif->swdma_mask = 0;
-       hwif->autodma = 0;
-
        if (!hwif->dma_base)
                return;
 
@@ -412,27 +427,27 @@ static void __devinit init_hwif_sl82c105(ide_hwif_t *hwif)
                 * Never ever EVER under any circumstances enable
                 * DMA when the bridge is this old.
                 */
-               printk("    %s: Winbond 553 bridge revision %d, BM-DMA disabled\n",
-                      hwif->name, rev);
-       } else {
-               hwif->atapi_dma = 1;
-               hwif->mwdma_mask = 0x04;
-
-               hwif->ide_dma_check = &sl82c105_check_drive;
-               hwif->ide_dma_on = &sl82c105_ide_dma_on;
-               hwif->dma_off_quietly = &sl82c105_dma_off_quietly;
-               hwif->ide_dma_lostirq = &sl82c105_ide_dma_lost_irq;
-               hwif->dma_start = &sl82c105_ide_dma_start;
-               hwif->ide_dma_timeout = &sl82c105_ide_dma_timeout;
-
-               if (!noautodma)
-                       hwif->autodma = 1;
-               hwif->drives[0].autodma = hwif->autodma;
-               hwif->drives[1].autodma = hwif->autodma;
-
-               if (hwif->mate)
-                       hwif->serialized = hwif->mate->serialized = 1;
+               printk("    %s: Winbond W83C553 bridge revision %d, "
+                      "BM-DMA disabled\n", hwif->name, rev);
+               return;
        }
+
+       hwif->atapi_dma  = 1;
+       hwif->mwdma_mask = 0x07;
+
+       hwif->ide_dma_check             = &sl82c105_ide_dma_check;
+       hwif->ide_dma_on                = &sl82c105_ide_dma_on;
+       hwif->dma_off_quietly           = &sl82c105_dma_off_quietly;
+       hwif->dma_lost_irq              = &sl82c105_dma_lost_irq;
+       hwif->dma_start                 = &sl82c105_dma_start;
+       hwif->ide_dma_timeout           = &sl82c105_ide_dma_timeout;
+
+       if (!noautodma)
+               hwif->autodma = 1;
+       hwif->drives[0].autodma = hwif->drives[1].autodma = hwif->autodma;
+
+       if (hwif->mate)
+               hwif->serialized = hwif->mate->serialized = 1;
 }
 
 static ide_pci_device_t sl82c105_chipset __devinitdata = {