]> www.pilppa.org Git - linux-2.6-omap-h63xx.git/blobdiff - drivers/i2c/busses/i2c-omap.c
[ARM] omap: i2c: remove conditional ick clocks
[linux-2.6-omap-h63xx.git] / drivers / i2c / busses / i2c-omap.c
index b20235415878fa6f02fb13595f7c08b4f3f82ee7..ece0125a1ee520710f1e4ac18cd7b8eea83f0422 100644 (file)
@@ -52,6 +52,8 @@
 #define OMAP_I2C_IE_REG                        0x04
 #define OMAP_I2C_STAT_REG              0x08
 #define OMAP_I2C_IV_REG                        0x0c
+/* For OMAP3 I2C_IV has changed to I2C_WE (wakeup enable) */
+#define OMAP_I2C_WE_REG                        0x0c
 #define OMAP_I2C_SYSS_REG              0x10
 #define OMAP_I2C_BUF_REG               0x14
 #define OMAP_I2C_CNT_REG               0x18
 #define OMAP_I2C_STAT_NACK     (1 << 1)        /* No ack interrupt enable */
 #define OMAP_I2C_STAT_AL       (1 << 0)        /* Arbitration lost int ena */
 
+/* I2C WE wakeup enable register */
+#define OMAP_I2C_WE_XDR_WE     (1 << 14)       /* TX drain wakup */
+#define OMAP_I2C_WE_RDR_WE     (1 << 13)       /* RX drain wakeup */
+#define OMAP_I2C_WE_AAS_WE     (1 << 9)        /* Address as slave wakeup*/
+#define OMAP_I2C_WE_BF_WE      (1 << 8)        /* Bus free wakeup */
+#define OMAP_I2C_WE_STC_WE     (1 << 6)        /* Start condition wakeup */
+#define OMAP_I2C_WE_GC_WE      (1 << 5)        /* General call wakeup */
+#define OMAP_I2C_WE_DRDY_WE    (1 << 3)        /* TX/RX data ready wakeup */
+#define OMAP_I2C_WE_ARDY_WE    (1 << 2)        /* Reg access ready wakeup */
+#define OMAP_I2C_WE_NACK_WE    (1 << 1)        /* No acknowledgment wakeup */
+#define OMAP_I2C_WE_AL_WE      (1 << 0)        /* Arbitration lost wakeup */
+
+#define OMAP_I2C_WE_ALL                (OMAP_I2C_WE_XDR_WE | OMAP_I2C_WE_RDR_WE | \
+                               OMAP_I2C_WE_AAS_WE | OMAP_I2C_WE_BF_WE | \
+                               OMAP_I2C_WE_STC_WE | OMAP_I2C_WE_GC_WE | \
+                               OMAP_I2C_WE_DRDY_WE | OMAP_I2C_WE_ARDY_WE | \
+                               OMAP_I2C_WE_NACK_WE | OMAP_I2C_WE_AL_WE)
+
 /* I2C Buffer Configuration Register (OMAP_I2C_BUF): */
 #define OMAP_I2C_BUF_RDMA_EN   (1 << 15)       /* RX DMA channel enable */
 #define OMAP_I2C_BUF_RXFIF_CLR (1 << 14)       /* RX FIFO Clear */
@@ -173,22 +193,24 @@ static inline u16 omap_i2c_read_reg(struct omap_i2c_dev *i2c_dev, int reg)
 
 static int __init omap_i2c_get_clocks(struct omap_i2c_dev *dev)
 {
-       if (cpu_is_omap16xx() || cpu_class_is_omap2()) {
-               dev->iclk = clk_get(dev->dev, "i2c_ick");
-               if (IS_ERR(dev->iclk)) {
-                       dev->iclk = NULL;
-                       return -ENODEV;
-               }
+       int ret;
+
+       dev->iclk = clk_get(dev->dev, "ick");
+       if (IS_ERR(dev->iclk)) {
+               ret = PTR_ERR(dev->iclk);
+               dev->iclk = NULL;
+               return ret;
        }
 
-       dev->fclk = clk_get(dev->dev, "i2c_fck");
+       dev->fclk = clk_get(dev->dev, "fck");
        if (IS_ERR(dev->fclk)) {
+               ret = PTR_ERR(dev->fclk);
                if (dev->iclk != NULL) {
                        clk_put(dev->iclk);
                        dev->iclk = NULL;
                }
                dev->fclk = NULL;
-               return -ENODEV;
+               return ret;
        }
 
        return 0;
@@ -198,18 +220,15 @@ static void omap_i2c_put_clocks(struct omap_i2c_dev *dev)
 {
        clk_put(dev->fclk);
        dev->fclk = NULL;
-       if (dev->iclk != NULL) {
-               clk_put(dev->iclk);
-               dev->iclk = NULL;
-       }
+       clk_put(dev->iclk);
+       dev->iclk = NULL;
 }
 
 static void omap_i2c_unidle(struct omap_i2c_dev *dev)
 {
        WARN_ON(!dev->idle);
 
-       if (dev->iclk != NULL)
-               clk_enable(dev->iclk);
+       clk_enable(dev->iclk);
        clk_enable(dev->fclk);
        dev->idle = 0;
        if (dev->iestate)
@@ -234,8 +253,7 @@ static void omap_i2c_idle(struct omap_i2c_dev *dev)
        }
        dev->idle = 1;
        clk_disable(dev->fclk);
-       if (dev->iclk != NULL)
-               clk_disable(dev->iclk);
+       clk_disable(dev->iclk);
 }
 
 static int omap_i2c_init(struct omap_i2c_dev *dev)
@@ -279,21 +297,27 @@ static int omap_i2c_init(struct omap_i2c_dev *dev)
                              __ffs(SYSC_CLOCKACTIVITY_MASK));
 
                        omap_i2c_write_reg(dev, OMAP_I2C_SYSC_REG, v);
+                       /*
+                        * Enabling all wakup sources to stop I2C freezing on
+                        * WFI instruction.
+                        * REVISIT: Some wkup sources might not be needed.
+                        */
+                       omap_i2c_write_reg(dev, OMAP_I2C_WE_REG,
+                                                       OMAP_I2C_WE_ALL);
 
                }
        }
        omap_i2c_write_reg(dev, OMAP_I2C_CON_REG, 0);
 
        if (cpu_class_is_omap1()) {
-               struct clk *armxor_ck;
-
-               armxor_ck = clk_get(NULL, "armxor_ck");
-               if (IS_ERR(armxor_ck))
-                       dev_warn(dev->dev, "Could not get armxor_ck\n");
-               else {
-                       fclk_rate = clk_get_rate(armxor_ck);
-                       clk_put(armxor_ck);
-               }
+               /*
+                * The I2C functional clock is the armxor_ck, so there's
+                * no need to get "armxor_ck" separately.  Now, if OMAP2420
+                * always returns 12MHz for the functional clock, we can
+                * do this bit unconditionally.
+                */
+               fclk_rate = clk_get_rate(dev->fclk);
+
                /* TRM for 5912 says the I2C clock must be prescaled to be
                 * between 7 - 12 MHz. The XOR input clock is typically
                 * 12, 13 or 19.2 MHz. So we should have code that produces:
@@ -745,7 +769,7 @@ omap_i2c_probe(struct platform_device *pdev)
        struct omap_i2c_dev     *dev;
        struct i2c_adapter      *adap;
        struct resource         *mem, *irq, *ioarea;
-       void *isr;
+       irq_handler_t isr;
        int r;
        u32 speed = 0;