i915: Map status page cached for chips with GTT-based HWS location.

[linux-2.6-omap-h63xx.git] / drivers / gpu / drm / i915 / i915_drv.h

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index da7c0072ad4c0867129df988459b8ac9c41b8d08..eae4ed3956e0b456f3a58e0aa29c9dbb4ee3d6f1 100644 (file)
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -373,6 +373,9 @@ struct drm_i915_gem_object {
        /** Current tiling mode for the object. */
        uint32_t tiling_mode;
 
+       /** AGP mapping type (AGP_USER_MEMORY or AGP_USER_CACHED_MEMORY */
+       uint32_t agp_type;
+
        /**
         * Flagging of which individual pages are valid in GEM_DOMAIN_CPU when
         * GEM_DOMAIN_CPU is not in the object's read domain.