drm/i915: GEM on PAE has problems - disable it for now.

[linux-2.6-omap-h63xx.git] / drivers / gpu / drm / i915 / i915_drv.h

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 572dcd0e3e0ddf860b77fc754f9ce2c3f35d1205..b3cc4731aa7c07b43d2d9825068f3e8a70ce34bd 100644 (file)
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -47,6 +47,8 @@ enum pipe {
        PIPE_B,
 };
 
+#define I915_NUM_PIPE  2
+
 /* Interface history:
  *
  * 1.1: Original.
@@ -88,13 +90,6 @@ struct mem_block {
        struct drm_file *file_priv; /* NULL: free, -1: heap, other: real files */
 };
 
-typedef struct _drm_i915_vbl_swap {
-       struct list_head head;
-       drm_drawable_t drw_id;
-       unsigned int pipe;
-       unsigned int sequence;
-} drm_i915_vbl_swap_t;
-
 struct opregion_header;
 struct opregion_acpi;
 struct opregion_swsci;
@@ -111,6 +106,8 @@ struct intel_opregion {
 typedef struct drm_i915_private {
        struct drm_device *dev;
 
+       int has_gem;
+
        void __iomem *regs;
        drm_local_map_t *sarea;
 
@@ -139,6 +136,7 @@ typedef struct drm_i915_private {
        int user_irq_refcount;
        /** Cached value of IMR to avoid reads in updating the bitfield */
        u32 irq_mask_reg;
+       u32 pipestat[2];
 
        int tex_lru_log_granularity;
        int allow_batchbuffer;
@@ -146,10 +144,6 @@ typedef struct drm_i915_private {
        unsigned int sr01, adpa, ppcr, dvob, dvoc, lvds;
        int vblank_pipe;
 
-       spinlock_t swaps_lock;
-       drm_i915_vbl_swap_t vbl_swaps;
-       unsigned int swaps_pending;
-
        struct intel_opregion opregion;
 
        /* Register state */
@@ -157,6 +151,8 @@ typedef struct drm_i915_private {
        u32 saveDSPACNTR;
        u32 saveDSPBCNTR;
        u32 saveDSPARB;
+       u32 saveRENDERSTANDBY;
+       u32 saveHWS;
        u32 savePIPEACONF;
        u32 savePIPEBCONF;
        u32 savePIPEASRC;
@@ -241,9 +237,6 @@ typedef struct drm_i915_private {
        u8 saveDACDATA[256*3]; /* 256 3-byte colors */
        u8 saveCR[37];
 
-       /** Work task for vblank-related ring access */
-       struct work_struct vblank_work;
-
        struct {
                struct drm_mm gtt_space;
 
@@ -253,6 +246,10 @@ typedef struct drm_i915_private {
                 * List of objects currently involved in rendering from the
                 * ringbuffer.
                 *
+                * Includes buffers having the contents of their GPU caches
+                * flushed, not necessarily primitives.  last_rendering_seqno
+                * represents when the rendering involved will be completed.
+                *
                 * A reference is held on the buffer while on this list.
                 */
                struct list_head active_list;
@@ -262,6 +259,8 @@ typedef struct drm_i915_private {
                 * still have a write_domain which needs to be flushed before
                 * unbinding.
                 *
+                * last_rendering_seqno is 0 while an object is in this list.
+                *
                 * A reference is held on the buffer while on this list.
                 */
                struct list_head flushing_list;
@@ -270,6 +269,8 @@ typedef struct drm_i915_private {
                 * LRU list of objects which are not in the ringbuffer and
                 * are ready to unbind, but are still in the GTT.
                 *
+                * last_rendering_seqno is 0 while an object is in this list.
+                *
                 * A reference is not held on the buffer while on this list,
                 * as merely being GTT-bound shouldn't prevent its being
                 * freed, and we'll pull it off the list in the free path.
@@ -380,8 +381,8 @@ struct drm_i915_gem_object {
        uint32_t agp_type;
 
        /**
-        * Flagging of which individual pages are valid in GEM_DOMAIN_CPU when
-        * GEM_DOMAIN_CPU is not in the object's read domain.
+        * If present, while GEM_DOMAIN_CPU is in the read domain this array
+        * flags which individual pages are valid.
         */
        uint8_t *page_cpu_valid;
 };
@@ -403,9 +404,6 @@ struct drm_i915_gem_request {
        /** Time at which this request was emitted, in jiffies. */
        unsigned long emitted_jiffies;
 
-       /** Cache domains that were flushed at the start of the request. */
-       uint32_t flush_domains;
-
        struct list_head list;
 };
 
@@ -444,7 +442,6 @@ extern int i915_irq_wait(struct drm_device *dev, void *data,
 void i915_user_irq_get(struct drm_device *dev);
 void i915_user_irq_put(struct drm_device *dev);
 
-extern void i915_vblank_work_handler(struct work_struct *work);
 extern irqreturn_t i915_driver_irq_handler(DRM_IRQ_ARGS);
 extern void i915_driver_irq_preinstall(struct drm_device * dev);
 extern int i915_driver_irq_postinstall(struct drm_device *dev);
@@ -460,6 +457,13 @@ extern int i915_vblank_swap(struct drm_device *dev, void *data,
                            struct drm_file *file_priv);
 extern void i915_enable_irq(drm_i915_private_t *dev_priv, u32 mask);
 
+void
+i915_enable_pipestat(drm_i915_private_t *dev_priv, int pipe, u32 mask);
+
+void
+i915_disable_pipestat(drm_i915_private_t *dev_priv, int pipe, u32 mask);
+
+
 /* i915_mem.c */
 extern int i915_mem_alloc(struct drm_device *dev, void *data,
                          struct drm_file *file_priv);
@@ -622,8 +626,9 @@ static inline void opregion_enable_asle(struct drm_device *dev) { return; }
  * The area from dword 0x20 to 0x3ff is available for driver usage.
  */
 #define READ_HWSP(dev_priv, reg)  (((volatile u32*)(dev_priv->hw_status_page))[reg])
-#define READ_BREADCRUMB(dev_priv) READ_HWSP(dev_priv, 5)
+#define READ_BREADCRUMB(dev_priv) READ_HWSP(dev_priv, I915_BREADCRUMB_INDEX)
 #define I915_GEM_HWS_INDEX             0x20
+#define I915_BREADCRUMB_INDEX          0x21
 
 extern int i915_wait_ring(struct drm_device * dev, int n, const char *caller);