x86: apic interrupts - move assignments to irqinit_32.c, v2

[linux-2.6-omap-h63xx.git] / arch / x86 / mach-default / setup.c

diff --git a/arch/x86/mach-default/setup.c b/arch/x86/mach-default/setup.c
index 3d317836be9ed9e1739e92461d0912dc37c65ffb..b00f5ad10ca11e50f975d6b07add96fb9029af62 100644 (file)
--- a/arch/x86/mach-default/setup.c
+++ b/arch/x86/mach-default/setup.c
@@ -36,15 +36,6 @@ void __init pre_intr_init_hook(void)
        init_ISA_irqs();
 }
 
-/*
- * IRQ2 is cascade interrupt to second interrupt controller
- */
-static struct irqaction irq2 = {
-       .handler = no_action,
-       .mask = CPU_MASK_NONE,
-       .name = "cascade",
-};
-
 /**
  * intr_init_hook - post gate setup interrupt initialisation
  *
@@ -60,12 +51,6 @@ void __init intr_init_hook(void)
                if (x86_quirks->arch_intr_init())
                        return;
        }
-#ifdef CONFIG_X86_LOCAL_APIC
-       apic_intr_init();
-#endif
-
-       if (!acpi_ioapic)
-               setup_irq(2, &irq2);
 }
 
 /**