x86: add smp_mb() before sending INVALIDATE_TLB_VECTOR

[linux-2.6-omap-h63xx.git] / arch / x86 / kernel / tlb_64.c

diff --git a/arch/x86/kernel/tlb_64.c b/arch/x86/kernel/tlb_64.c
index 184a367516d3655cd43fa8e5dfeb17c0e4cac556..8f919ca69494d62541453202b27f4ec13903d2f8 100644 (file)
--- a/arch/x86/kernel/tlb_64.c
+++ b/arch/x86/kernel/tlb_64.c
@@ -15,6 +15,8 @@
 #include <asm/proto.h>
 #include <asm/apicdef.h>
 #include <asm/idle.h>
+#include <asm/uv/uv_hub.h>
+#include <asm/uv/uv_bau.h>
 
 #include <mach_ipi.h>
 /*
@@ -162,6 +164,9 @@ void native_flush_tlb_others(const cpumask_t *cpumaskp, struct mm_struct *mm,
        union smp_flush_state *f;
        cpumask_t cpumask = *cpumaskp;
 
+       if (is_uv_system() && uv_flush_tlb_others(&cpumask, mm, va))
+               return;
+
        /* Caller has disabled preemption */
        sender = smp_processor_id() % NUM_INVALIDATE_TLB_VECTORS;
        f = &per_cpu(flush_state, sender);
@@ -177,6 +182,11 @@ void native_flush_tlb_others(const cpumask_t *cpumaskp, struct mm_struct *mm,
        f->flush_va = va;
        cpus_or(f->flush_cpumask, cpumask, f->flush_cpumask);
 
+       /*
+        * Make the above memory operations globally visible before
+        * sending the IPI.
+        */
+       smp_mb();
        /*
         * We have to send the IPI only to
         * CPUs affected.