]> www.pilppa.org Git - linux-2.6-omap-h63xx.git/blobdiff - arch/x86/kernel/pci-gart_64.c
revert "x86: make GART to respect device's dma_mask about virtual mappings"
[linux-2.6-omap-h63xx.git] / arch / x86 / kernel / pci-gart_64.c
index 3dcb1ad86e389faf8a0bbd7af1918c921b8c4c96..7e08e466b8ad370465fbc3f6e6e99fd78e8d07aa 100644 (file)
@@ -45,6 +45,15 @@ static unsigned long iommu_pages;    /* .. and in pages */
 
 static u32 *iommu_gatt_base;           /* Remapping table */
 
+/*
+ * If this is disabled the IOMMU will use an optimized flushing strategy
+ * of only flushing when an mapping is reused. With it true the GART is
+ * flushed for every mapping. Problem is that doing the lazy flush seems
+ * to trigger bugs with some popular PCI cards, in particular 3ware (but
+ * has been also also seen with Qlogic at least).
+ */
+int iommu_fullflush = 1;
+
 /* Allocation bitmap for the remapping area: */
 static DEFINE_SPINLOCK(iommu_bitmap_lock);
 /* Guarded by iommu_bitmap_lock: */
@@ -74,34 +83,23 @@ static unsigned long next_bit;  /* protected by iommu_bitmap_lock */
 static int need_flush;         /* global flush state. set for each gart wrap */
 
 static unsigned long alloc_iommu(struct device *dev, int size,
-                                unsigned long align_mask, u64 dma_mask)
+                                unsigned long align_mask)
 {
        unsigned long offset, flags;
        unsigned long boundary_size;
        unsigned long base_index;
-       unsigned long limit;
 
        base_index = ALIGN(iommu_bus_base & dma_get_seg_boundary(dev),
                           PAGE_SIZE) >> PAGE_SHIFT;
        boundary_size = ALIGN((unsigned long long)dma_get_seg_boundary(dev) + 1,
                              PAGE_SIZE) >> PAGE_SHIFT;
 
-       limit = iommu_device_max_index(iommu_pages,
-                                      DIV_ROUND_UP(iommu_bus_base, PAGE_SIZE),
-                                      dma_mask >> PAGE_SHIFT);
-
        spin_lock_irqsave(&iommu_bitmap_lock, flags);
-
-       if (limit <= next_bit) {
-               need_flush = 1;
-               next_bit = 0;
-       }
-
-       offset = iommu_area_alloc(iommu_gart_bitmap, limit, next_bit,
+       offset = iommu_area_alloc(iommu_gart_bitmap, iommu_pages, next_bit,
                                  size, base_index, boundary_size, align_mask);
-       if (offset == -1 && next_bit) {
+       if (offset == -1) {
                need_flush = 1;
-               offset = iommu_area_alloc(iommu_gart_bitmap, limit, 0,
+               offset = iommu_area_alloc(iommu_gart_bitmap, iommu_pages, 0,
                                          size, base_index, boundary_size,
                                          align_mask);
        }
@@ -230,14 +228,12 @@ nonforced_iommu(struct device *dev, unsigned long addr, size_t size)
  * Caller needs to check if the iommu is needed and flush.
  */
 static dma_addr_t dma_map_area(struct device *dev, dma_addr_t phys_mem,
-                              size_t size, int dir, unsigned long align_mask,
-                              u64 dma_mask)
+                               size_t size, int dir, unsigned long align_mask)
 {
        unsigned long npages = iommu_num_pages(phys_mem, size);
-       unsigned long iommu_page;
+       unsigned long iommu_page = alloc_iommu(dev, npages, align_mask);
        int i;
 
-       iommu_page = alloc_iommu(dev, npages, align_mask, dma_mask);
        if (iommu_page == -1) {
                if (!nonforced_iommu(dev, phys_mem, size))
                        return phys_mem;
@@ -267,7 +263,7 @@ gart_map_single(struct device *dev, phys_addr_t paddr, size_t size, int dir)
        if (!need_iommu(dev, paddr, size))
                return paddr;
 
-       bus = dma_map_area(dev, paddr, size, dir, 0, dma_get_mask(dev));
+       bus = dma_map_area(dev, paddr, size, dir, 0);
        flush_gart();
 
        return bus;
@@ -318,7 +314,6 @@ static int dma_map_sg_nonforce(struct device *dev, struct scatterlist *sg,
 {
        struct scatterlist *s;
        int i;
-       u64 dma_mask = dma_get_mask(dev);
 
 #ifdef CONFIG_IOMMU_DEBUG
        printk(KERN_DEBUG "dma_map_sg overflow\n");
@@ -328,8 +323,7 @@ static int dma_map_sg_nonforce(struct device *dev, struct scatterlist *sg,
                unsigned long addr = sg_phys(s);
 
                if (nonforced_iommu(dev, addr, s->length)) {
-                       addr = dma_map_area(dev, addr, s->length, dir, 0,
-                                           dma_mask);
+                       addr = dma_map_area(dev, addr, s->length, dir, 0);
                        if (addr == bad_dma_address) {
                                if (i > 0)
                                        gart_unmap_sg(dev, sg, i, dir);
@@ -351,16 +345,14 @@ static int __dma_map_cont(struct device *dev, struct scatterlist *start,
                          int nelems, struct scatterlist *sout,
                          unsigned long pages)
 {
-       unsigned long iommu_start;
-       unsigned long iommu_page;
+       unsigned long iommu_start = alloc_iommu(dev, pages, 0);
+       unsigned long iommu_page = iommu_start;
        struct scatterlist *s;
        int i;
 
-       iommu_start = alloc_iommu(dev, pages, 0, dma_get_mask(dev));
        if (iommu_start == -1)
                return -1;
 
-       iommu_page = iommu_start;
        for_each_sg(start, s, nelems, i) {
                unsigned long pages, addr;
                unsigned long phys_addr = s->dma_address;
@@ -513,7 +505,7 @@ gart_alloc_coherent(struct device *dev, size_t size, dma_addr_t *dma_addr,
        align_mask = (1UL << get_order(size)) - 1;
 
        *dma_addr = dma_map_area(dev, paddr, size, DMA_BIDIRECTIONAL,
-                                align_mask, dma_mask);
+                                align_mask);
        flush_gart();
 
        if (*dma_addr != bad_dma_address)
@@ -892,6 +884,10 @@ void __init gart_parse_options(char *p)
 #endif
        if (isdigit(*p) && get_option(&p, &arg))
                iommu_size = arg;
+       if (!strncmp(p, "fullflush", 8))
+               iommu_fullflush = 1;
+       if (!strncmp(p, "nofullflush", 11))
+               iommu_fullflush = 0;
        if (!strncmp(p, "noagp", 5))
                no_agp = 1;
        if (!strncmp(p, "noaperture", 10))