x86_64: further cleanup of 32-bit compat syscall mechanisms

[linux-2.6-omap-h63xx.git] / arch / x86 / kernel / cpu / amd_64.c

diff --git a/arch/x86/kernel/cpu/amd_64.c b/arch/x86/kernel/cpu/amd_64.c
index 30b7557c964132d570c92dd7e57d75059d12ca2b..d1692b2a41ffac4bf6b9423d38af42741a847b36 100644 (file)
--- a/arch/x86/kernel/cpu/amd_64.c
+++ b/arch/x86/kernel/cpu/amd_64.c
@@ -115,6 +115,8 @@ static void __cpuinit early_init_amd(struct cpuinfo_x86 *c)
        /* c->x86_power is 8000_0007 edx. Bit 8 is constant TSC */
        if (c->x86_power & (1<<8))
                set_cpu_cap(c, X86_FEATURE_CONSTANT_TSC);
+
+       set_cpu_cap(c, X86_FEATURE_SYSCALL32);
 }
 
 static void __cpuinit init_amd(struct cpuinfo_x86 *c)
@@ -131,7 +133,7 @@ static void __cpuinit init_amd(struct cpuinfo_x86 *c)
         * Errata 63 for SH-B3 steppings
         * Errata 122 for all steppings (F+ have it disabled by default)
         */
-       if (c->x86 == 15) {
+       if (c->x86 == 0xf) {
                rdmsrl(MSR_K8_HWCR, value);
                value |= 1 << 6;
                wrmsrl(MSR_K8_HWCR, value);
@@ -143,10 +145,11 @@ static void __cpuinit init_amd(struct cpuinfo_x86 *c)
        clear_cpu_cap(c, 0*32+31);
 
        /* On C+ stepping K8 rep microcode works well for copy/memset */
-       level = cpuid_eax(1);
-       if (c->x86 == 15 && ((level >= 0x0f48 && level < 0x0f50) ||
-                            level >= 0x0f58))
-               set_cpu_cap(c, X86_FEATURE_REP_GOOD);
+       if (c->x86 == 0xf) {
+               level = cpuid_eax(1);
+               if((level >= 0x0f48 && level < 0x0f50) || level >= 0x0f58)
+                       set_cpu_cap(c, X86_FEATURE_REP_GOOD);
+       }
        if (c->x86 == 0x10 || c->x86 == 0x11)
                set_cpu_cap(c, X86_FEATURE_REP_GOOD);
 
@@ -157,7 +160,7 @@ static void __cpuinit init_amd(struct cpuinfo_x86 *c)
        level = get_model_name(c);
        if (!level) {
                switch (c->x86) {
-               case 15:
+               case 0xf:
                        /* Should distinguish Models here, but this is only
                           a fallback anyways. */
                        strcpy(c->x86_model_id, "Hammer");
@@ -176,14 +179,19 @@ static void __cpuinit init_amd(struct cpuinfo_x86 *c)
        else
                num_cache_leaves = 3;
 
-       if (c->x86 == 0xf || c->x86 == 0x10 || c->x86 == 0x11)
+       if (c->x86 >= 0xf && c->x86 <= 0x11)
                set_cpu_cap(c, X86_FEATURE_K8);
 
        /* MFENCE stops RDTSC speculation */
        set_cpu_cap(c, X86_FEATURE_MFENCE_RDTSC);
 
-       if (c->x86 == 0x10)
+       if (c->x86 == 0x10) {
+               /* do this for boot cpu */
+               if (c == &boot_cpu_data)
+                       check_enable_amd_mmconf_dmi();
+
                fam10h_check_enable_mmcfg();
+       }
 
        if (c == &boot_cpu_data && c->x86 >= 0xf && c->x86 <= 0x11) {
                unsigned long long tseg;
@@ -193,10 +201,15 @@ static void __cpuinit init_amd(struct cpuinfo_x86 *c)
                 * Don't do it for gbpages because there seems very little
                 * benefit in doing so.
                 */
-               if (!rdmsrl_safe(MSR_K8_TSEG_ADDR, &tseg) &&
-                   (tseg >> PMD_SHIFT) <
-                       (max_pfn_mapped >> (PMD_SHIFT-PAGE_SHIFT)))
+               if (!rdmsrl_safe(MSR_K8_TSEG_ADDR, &tseg)) {
+                   printk(KERN_DEBUG "tseg: %010llx\n", tseg);
+                   if ((tseg>>PMD_SHIFT) <
+                               (max_low_pfn_mapped>>(PMD_SHIFT-PAGE_SHIFT)) ||
+                       ((tseg>>PMD_SHIFT) <
+                               (max_pfn_mapped>>(PMD_SHIFT-PAGE_SHIFT)) &&
+                        (tseg>>PMD_SHIFT) >= (1ULL<<(32 - PMD_SHIFT))))
                        set_memory_4k((unsigned long)__va(tseg), 1);
+               }
        }
 }