#endif
static struct uart_port scif_port = {
+ .type = PORT_SCIF,
.mapbase = CONFIG_EARLY_SCIF_CONSOLE_PORT,
.membase = (char __iomem *)CONFIG_EARLY_SCIF_CONSOLE_PORT,
};
while (((sci_in(&scif_port, SCFDR) & EPK_FIFO_BITS) >= EPK_FIFO_SIZE))
;
- sci_out(&scif_port, SCxTDR, c);
sci_in(&scif_port, SCxSR);
sci_out(&scif_port, SCxSR, 0xf3 & ~(0x20 | 0x40));
+ sci_out(&scif_port, SCxTDR, c);
while ((sci_in(&scif_port, SCxSR) & 0x40) == 0)
;
} while (!(status & SCxSR_TEND(port)));
sci_out(port, SCSCR, 0); /* TE=0, RE=0 */
+ sci_out(port, SCFCR, SCFCR_RFRST | SCFCR_TFRST);
sci_out(port, SCSMR, 0);
/* Set baud rate */
(32 * baud) - 1);
udelay((1000000+(baud-1)) / baud); /* Wait one bit interval */
- sci_out(port, SCFCR, 12);
- sci_out(port, SCFCR, 8);
-
sci_out(port, SCSPTR, 0);
sci_out(port, SCxSR, 0x60);
sci_out(port, SCLSR, 0);
+
+ sci_out(port, SCFCR, 0);
sci_out(port, SCSCR, 0x30); /* TE=1, RE=1 */
}
#endif /* defined(CONFIG_CPU_SUBTYPE_SH7720) */