powerpc/mm: Fix handling of _PAGE_COHERENT in BAT setup code

[linux-2.6-omap-h63xx.git] / arch / powerpc / mm / ppc_mmu_32.c

diff --git a/arch/powerpc/mm/ppc_mmu_32.c b/arch/powerpc/mm/ppc_mmu_32.c
index 6aa12081377531594bea592b94915da93904be78..fe65c405412c55018f9d71e0f6a437e292a1dcf5 100644 (file)
--- a/arch/powerpc/mm/ppc_mmu_32.c
+++ b/arch/powerpc/mm/ppc_mmu_32.c
@@ -95,16 +95,16 @@ unsigned long __init mmu_mapin_ram(void)
                        break;
        }
 
-       setbat(2, KERNELBASE, 0, bl, _PAGE_RAM);
-       done = (unsigned long)bat_addrs[2].limit - KERNELBASE + 1;
+       setbat(2, PAGE_OFFSET, 0, bl, _PAGE_RAM);
+       done = (unsigned long)bat_addrs[2].limit - PAGE_OFFSET + 1;
        if ((done < tot) && !bat_addrs[3].limit) {
                /* use BAT3 to cover a bit more */
                tot -= done;
                for (bl = 128<<10; bl < max_size; bl <<= 1)
                        if (bl * 2 > tot)
                                break;
-               setbat(3, KERNELBASE+done, done, bl, _PAGE_RAM);
-               done = (unsigned long)bat_addrs[3].limit - KERNELBASE + 1;
+               setbat(3, PAGE_OFFSET+done, done, bl, _PAGE_RAM);
+               done = (unsigned long)bat_addrs[3].limit - PAGE_OFFSET + 1;
        }
 
        return done;
@@ -123,9 +123,9 @@ void __init setbat(int index, unsigned long virt, phys_addr_t phys,
        int wimgxpp;
        struct ppc_bat *bat = BATS[index];
 
-       if (((flags & _PAGE_NO_CACHE) == 0) &&
-           cpu_has_feature(CPU_FTR_NEED_COHERENT))
-               flags |= _PAGE_COHERENT;
+       if ((flags & _PAGE_NO_CACHE) ||
+           (cpu_has_feature(CPU_FTR_NEED_COHERENT) == 0))
+               flags &= ~_PAGE_COHERENT;
 
        bl = (size >> 17) - 1;
        if (PVR_VER(mfspr(SPRN_PVR)) != 1) {
@@ -192,7 +192,7 @@ void __init MMU_init_hw(void)
        extern unsigned int hash_page[];
        extern unsigned int flush_hash_patch_A[], flush_hash_patch_B[];
 
-       if (!cpu_has_feature(CPU_FTR_HPTE_TABLE)) {
+       if (!mmu_has_feature(MMU_FTR_HPTE_TABLE)) {
                /*
                 * Put a blr (procedure return) instruction at the
                 * start of hash_page, since we can still get DSI