]> www.pilppa.org Git - linux-2.6-omap-h63xx.git/blobdiff - arch/powerpc/boot/dts/mpc8377_rdb.dts
powerpc/83xx: Add power management support for MPC837x boards
[linux-2.6-omap-h63xx.git] / arch / powerpc / boot / dts / mpc8377_rdb.dts
index fb1d884348ecef52d9ba2d5cabfa2403a23aa379..32311c8f55d82e9723024d525555d5d0368f4e64 100644 (file)
                        gpio-controller;
                };
 
-               i2c@3000 {
+               sleep-nexus {
                        #address-cells = <1>;
-                       #size-cells = <0>;
-                       cell-index = <0>;
-                       compatible = "fsl-i2c";
-                       reg = <0x3000 0x100>;
-                       interrupts = <14 0x8>;
-                       interrupt-parent = <&ipic>;
-                       dfsrr;
-
-                       dtt@48 {
-                               compatible = "national,lm75";
-                               reg = <0x48>;
-                       };
-
-                       at24@50 {
-                               compatible = "at24,24c256";
-                               reg = <0x50>;
-                       };
+                       #size-cells = <1>;
+                       compatible = "simple-bus";
+                       sleep = <&pmc 0x0c000000>;
+                       ranges;
 
-                       rtc@68 {
-                               compatible = "dallas,ds1339";
-                               reg = <0x68>;
+                       i2c@3000 {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               cell-index = <0>;
+                               compatible = "fsl-i2c";
+                               reg = <0x3000 0x100>;
+                               interrupts = <14 0x8>;
+                               interrupt-parent = <&ipic>;
+                               dfsrr;
+
+                               dtt@48 {
+                                       compatible = "national,lm75";
+                                       reg = <0x48>;
+                               };
+
+                               at24@50 {
+                                       compatible = "at24,24c256";
+                                       reg = <0x50>;
+                               };
+
+                               rtc@68 {
+                                       compatible = "dallas,ds1339";
+                                       reg = <0x68>;
+                               };
+
+                               mcu_pio: mcu@a {
+                                       #gpio-cells = <2>;
+                                       compatible = "fsl,mc9s08qg8-mpc8377erdb",
+                                                    "fsl,mcu-mpc8349emitx";
+                                       reg = <0x0a>;
+                                       gpio-controller;
+                               };
                        };
 
-                       mcu_pio: mcu@a {
-                               #gpio-cells = <2>;
-                               compatible = "fsl,mc9s08qg8-mpc8377erdb",
-                                            "fsl,mcu-mpc8349emitx";
-                               reg = <0x0a>;
-                               gpio-controller;
+                       sdhci@2e000 {
+                               compatible = "fsl,mpc8377-esdhc", "fsl,mpc8379-esdhc";
+                               reg = <0x2e000 0x1000>;
+                               interrupts = <42 0x8>;
+                               interrupt-parent = <&ipic>;
+                               /* Filled in by U-Boot */
+                               clock-frequency = <0>;
                        };
                };
 
                        interrupt-parent = <&ipic>;
                        interrupts = <38 0x8>;
                        phy_type = "ulpi";
+                       sleep = <&pmc 0x00c00000>;
                };
 
                mdio@24520 {
                        interrupt-parent = <&ipic>;
                        tbi-handle = <&tbi0>;
                        phy-handle = <&phy2>;
+                       sleep = <&pmc 0xc0000000>;
+                       fsl,magic-packet;
                };
 
                enet1: ethernet@25000 {
                        interrupt-parent = <&ipic>;
                        fixed-link = <1 1 1000 0 0>;
                        tbi-handle = <&tbi1>;
+                       sleep = <&pmc 0x30000000>;
+                       fsl,magic-packet;
                };
 
                serial0: serial@4500 {
                        fsl,channel-fifo-len = <24>;
                        fsl,exec-units-mask = <0x9fe>;
                        fsl,descriptor-types-mask = <0x3ab0ebf>;
-               };
-
-               sdhci@2e000 {
-                       compatible = "fsl,mpc8377-esdhc", "fsl,mpc8379-esdhc";
-                       reg = <0x2e000 0x1000>;
-                       interrupts = <42 0x8>;
-                       interrupt-parent = <&ipic>;
-                       /* Filled in by U-Boot */
-                       clock-frequency = <0>;
+                       sleep = <&pmc 0x03000000>;
                };
 
                sata@18000 {
                        reg = <0x18000 0x1000>;
                        interrupts = <44 0x8>;
                        interrupt-parent = <&ipic>;
+                       sleep = <&pmc 0x000000c0>;
                };
 
                sata@19000 {
                        reg = <0x19000 0x1000>;
                        interrupts = <45 0x8>;
                        interrupt-parent = <&ipic>;
+                       sleep = <&pmc 0x00000030>;
                };
 
                /* IPIC
                        #interrupt-cells = <2>;
                        reg = <0x700 0x100>;
                };
+
+               pmc: power@b00 {
+                       compatible = "fsl,mpc8377-pmc", "fsl,mpc8349-pmc";
+                       reg = <0xb00 0x100 0xa00 0x100>;
+                       interrupts = <80 0x8>;
+                       interrupt-parent = <&ipic>;
+               };
        };
 
        pci0: pci@e0008500 {
                ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
                          0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
                          0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>;
+               sleep = <&pmc 0x00010000>;
                clock-frequency = <66666666>;
                #interrupt-cells = <1>;
                #size-cells = <2>;
                                 0 0 0 2 &ipic 1 8
                                 0 0 0 3 &ipic 1 8
                                 0 0 0 4 &ipic 1 8>;
+               sleep = <&pmc 0x00300000>;
                clock-frequency = <0>;
 
                pcie@0 {
                                 0 0 0 2 &ipic 2 8
                                 0 0 0 3 &ipic 2 8
                                 0 0 0 4 &ipic 2 8>;
+               sleep = <&pmc 0x000c0000>;
                clock-frequency = <0>;
 
                pcie@0 {