MIPS: TXx9: Cache fixup

[linux-2.6-omap-h63xx.git] / arch / mips / txx9 / rbtx4927 / setup.c

diff --git a/arch/mips/txx9/rbtx4927/setup.c b/arch/mips/txx9/rbtx4927/setup.c
index 5985f330838a5ea19d3cc61f8b502e68a36632d7..0464a39b39accee70a1c9985acc03b9e95acedd5 100644 (file)
--- a/arch/mips/txx9/rbtx4927/setup.c
+++ b/arch/mips/txx9/rbtx4927/setup.c
@@ -186,14 +186,8 @@ static void __init rbtx4937_clock_init(void);
 
 static void __init rbtx4927_mem_setup(void)
 {
-       u32 cp0_config;
        char *argptr;
 
-       /* enable caches -- HCP5 does this, pmon does not */
-       cp0_config = read_c0_config();
-       cp0_config = cp0_config & ~(TX49_CONF_IC | TX49_CONF_DC);
-       write_c0_config(cp0_config);
-
        if (TX4927_REV_PCODE() == 0x4927) {
                rbtx4927_clock_init();
                tx4927_setup();