MIPS: TXx9: Cache fixup

[linux-2.6-omap-h63xx.git] / arch / mips / txx9 / rbtx4927 / setup.c

diff --git a/arch/mips/txx9/rbtx4927/setup.c b/arch/mips/txx9/rbtx4927/setup.c
index 0d39bafea794278968384700b19f7125bd8785cf..0464a39b39accee70a1c9985acc03b9e95acedd5 100644 (file)
--- a/arch/mips/txx9/rbtx4927/setup.c
+++ b/arch/mips/txx9/rbtx4927/setup.c
@@ -48,6 +48,7 @@
 #include <linux/ioport.h>
 #include <linux/platform_device.h>
 #include <linux/delay.h>
+#include <linux/gpio.h>
 #include <asm/io.h>
 #include <asm/reboot.h>
 #include <asm/txx9/generic.h>
@@ -185,14 +186,8 @@ static void __init rbtx4937_clock_init(void);
 
 static void __init rbtx4927_mem_setup(void)
 {
-       u32 cp0_config;
        char *argptr;
 
-       /* enable caches -- HCP5 does this, pmon does not */
-       cp0_config = read_c0_config();
-       cp0_config = cp0_config & ~(TX49_CONF_IC | TX49_CONF_DC);
-       write_c0_config(cp0_config);
-
        if (TX4927_REV_PCODE() == 0x4927) {
                rbtx4927_clock_init();
                tx4927_setup();
@@ -212,6 +207,14 @@ static void __init rbtx4927_mem_setup(void)
        set_io_port_base(KSEG1 + RBTX4927_ISA_IO_OFFSET);
 #endif
 
+       /* TX4927-SIO DTR on (PIO[15]) */
+       gpio_request(15, "sio-dtr");
+       gpio_direction_output(15, 1);
+       gpio_request(0, "led");
+       gpio_direction_output(0, 1);
+       gpio_request(1, "led");
+       gpio_direction_output(1, 1);
+
        tx4927_sio_init(0, 0);
 #ifdef CONFIG_SERIAL_TXX9_CONSOLE
        argptr = prom_getcmdline();