[MIPS] TXx9: Reorganize code

[linux-2.6-omap-h63xx.git] / arch / mips / txx9 / rbtx4927 / irq.c

diff --git a/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c b/arch/mips/txx9/rbtx4927/irq.c
similarity index 98%
rename from arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c
rename to arch/mips/txx9/rbtx4927/irq.c
index c18901a75cc42d82bb3dda6d4ac1f82f51e3623d..936e50e91d957dabcdd1b2e4be0e4fa757dc258e 100644 (file)
--- a/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c
+++ b/arch/mips/txx9/rbtx4927/irq.c
@@ -1,6 +1,4 @@
 /*
- * linux/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c
- *
  * Toshiba RBTX4927 specific interrupt handlers
  *
  * Author: MontaVista Software, Inc.
@@ -116,7 +114,7 @@ JP7 is not bus master -- do NOT use -- only 4 pci bus master's allowed -- SouthB
 #ifdef CONFIG_TOSHIBA_FPCIB0
 #include <asm/i8259.h>
 #endif
-#include <asm/tx4927/toshiba_rbtx4927.h>
+#include <asm/txx9/rbtx4927.h>
 
 #define TOSHIBA_RBTX4927_IRQ_IOC_RAW_BEG   0
 #define TOSHIBA_RBTX4927_IRQ_IOC_RAW_END   7