MIPS: TXx9: Default machine_restart using watchdog reset

[linux-2.6-omap-h63xx.git] / arch / mips / txx9 / generic / setup_tx4938.c

diff --git a/arch/mips/txx9/generic/setup_tx4938.c b/arch/mips/txx9/generic/setup_tx4938.c
index f3040b9ba0593df8596cb46c17264b336a2df42c..4fbc85a8597fafe2db012b05269c77c9e066a8be 100644 (file)
--- a/arch/mips/txx9/generic/setup_tx4938.c
+++ b/arch/mips/txx9/generic/setup_tx4938.c
@@ -14,6 +14,8 @@
 #include <linux/ioport.h>
 #include <linux/delay.h>
 #include <linux/param.h>
+#include <linux/mtd/physmap.h>
+#include <asm/reboot.h>
 #include <asm/txx9irq.h>
 #include <asm/txx9tmr.h>
 #include <asm/txx9pio.h>
@@ -22,6 +24,10 @@
 
 static void __init tx4938_wdr_init(void)
 {
+       /* report watchdog reset status */
+       if (____raw_readq(&tx4938_ccfgptr->ccfg) & TX4938_CCFG_WDRST)
+               pr_warning("Watchdog reset detected at 0x%lx\n",
+                          read_c0_errorepc());
        /* clear WatchDogReset (W1C) */
        tx4938_ccfg_set(TX4938_CCFG_WDRST);
        /* do reset on watchdog */
@@ -33,6 +39,27 @@ void __init tx4938_wdt_init(void)
        txx9_wdt_init(TX4938_TMR_REG(2) & 0xfffffffffULL);
 }
 
+static void tx4938_machine_restart(char *command)
+{
+       local_irq_disable();
+       pr_emerg("Rebooting (with %s watchdog reset)...\n",
+                (____raw_readq(&tx4938_ccfgptr->ccfg) & TX4938_CCFG_WDREXEN) ?
+                "external" : "internal");
+       /* clear watchdog status */
+       tx4938_ccfg_set(TX4938_CCFG_WDRST);     /* W1C */
+       txx9_wdt_now(TX4938_TMR_REG(2) & 0xfffffffffULL);
+       while (!(____raw_readq(&tx4938_ccfgptr->ccfg) & TX4938_CCFG_WDRST))
+               ;
+       mdelay(10);
+       if (____raw_readq(&tx4938_ccfgptr->ccfg) & TX4938_CCFG_WDREXEN) {
+               pr_emerg("Rebooting (with internal watchdog reset)...\n");
+               /* External WDRST failed.  Do internal watchdog reset */
+               tx4938_ccfg_clear(TX4938_CCFG_WDREXEN);
+       }
+       /* fallback */
+       (*_machine_halt)();
+}
+
 static struct resource tx4938_sdram_resource[4];
 static struct resource tx4938_sram_resource;
 
@@ -47,6 +74,7 @@ void __init tx4938_setup(void)
 
        txx9_reg_res_init(TX4938_REV_PCODE(), TX4938_REG_BASE,
                          TX4938_REG_SIZE);
+       set_c0_config(TX49_CONF_CWFON);
 
        /* SDRAMC,EBUSC are configured by PROM */
        for (i = 0; i < 8; i++) {
@@ -227,6 +255,8 @@ void __init tx4938_setup(void)
                                   TX4938_CLKCTR_ETH1CKD);
                }
        }
+
+       _machine_restart = tx4938_machine_restart;
 }
 
 void __init tx4938_time_init(unsigned int tmrnr)
@@ -268,3 +298,16 @@ void __init tx4938_ethaddr_init(unsigned char *addr0, unsigned char *addr1)
        if (addr1 && (pcfg & TX4938_PCFG_ETH1_SEL))
                txx9_ethaddr_init(TXX9_IRQ_BASE + TX4938_IR_ETH1, addr1);
 }
+
+void __init tx4938_mtd_init(int ch)
+{
+       struct physmap_flash_data pdata = {
+               .width = TX4938_EBUSC_WIDTH(ch) / 8,
+       };
+       unsigned long start = txx9_ce_res[ch].start;
+       unsigned long size = txx9_ce_res[ch].end - start + 1;
+
+       if (!(TX4938_EBUSC_CR(ch) & 0x8))
+               return; /* disabled */
+       txx9_physmap_flash_init(ch, start, size, &pdata);
+}