MIPS: TXx9: Raise priority of interrupts for errors, timers, SIO

[linux-2.6-omap-h63xx.git] / arch / mips / txx9 / generic / irq_tx4927.c

diff --git a/arch/mips/txx9/generic/irq_tx4927.c b/arch/mips/txx9/generic/irq_tx4927.c
index cbea1fdde82b877adfe18e1341c2dc98ce375840..ad2870def8f1f7e1697205cfe2094f6a988ab7e8 100644 (file)
--- a/arch/mips/txx9/generic/irq_tx4927.c
+++ b/arch/mips/txx9/generic/irq_tx4927.c
@@ -30,8 +30,19 @@
 
 void __init tx4927_irq_init(void)
 {
+       int i;
+
        mips_cpu_irq_init();
        txx9_irq_init(TX4927_IRC_REG & 0xfffffffffULL);
        set_irq_chained_handler(MIPS_CPU_IRQ_BASE + TX4927_IRC_INT,
                                handle_simple_irq);
+       /* raise priority for errors, timers, SIO */
+       txx9_irq_set_pri(TX4927_IR_ECCERR, 7);
+       txx9_irq_set_pri(TX4927_IR_WTOERR, 7);
+       txx9_irq_set_pri(TX4927_IR_PCIERR, 7);
+       txx9_irq_set_pri(TX4927_IR_PCIPME, 7);
+       for (i = 0; i < TX4927_NUM_IR_TMR; i++)
+               txx9_irq_set_pri(TX4927_IR_TMR(i), 6);
+       for (i = 0; i < TX4927_NUM_IR_SIO; i++)
+               txx9_irq_set_pri(TX4927_IR_SIO(i), 5);
 }