[MIPS] Pb1500 code style cleanup

[linux-2.6-omap-h63xx.git] / arch / mips / au1000 / pb1500 / board_setup.c

diff --git a/arch/mips/au1000/pb1500/board_setup.c b/arch/mips/au1000/pb1500/board_setup.c
index 24c652e8ec4b7f542b264430ed3e6b4ef4b61fab..035771c6e5b88f0faab9d99ca13a133157f2bdcd 100644 (file)
--- a/arch/mips/au1000/pb1500/board_setup.c
+++ b/arch/mips/au1000/pb1500/board_setup.c
@@ -1,7 +1,6 @@
 /*
- * Copyright 2000 MontaVista Software Inc.
- * Author: MontaVista Software, Inc.
- *             ppopov@mvista.com or source@mvista.com
+ * Copyright 2000, 2008 MontaVista Software Inc.
+ * Author: MontaVista Software, Inc. <source@mvista.com>
  *
  *  This program is free software; you can redistribute  it and/or modify it
  *  under  the terms of  the GNU General  Public License as published by the
@@ -32,8 +31,8 @@
 
 void board_reset(void)
 {
-    /* Hit BCSR.SYSTEM_CONTROL[SW_RST] */
-    au_writel(0x00000000, 0xAE00001C);
+       /* Hit BCSR.RST_VDDI[SOFT_RESET] */
+       au_writel(0x00000000, PB1500_RST_VDDI);
 }
 
 void __init board_setup(void)
@@ -42,7 +41,7 @@ void __init board_setup(void)
        u32 sys_freqctrl, sys_clksrc;
 
        sys_clksrc = sys_freqctrl = pin_func = 0;
-       // set AUX clock to 12MHz * 8 = 96 MHz
+       /* Set AUX clock to 12 MHz * 8 = 96 MHz */
        au_writel(8, SYS_AUXPLL);
        au_writel(0, SYS_PINSTATERD);
        udelay(100);
@@ -51,51 +50,48 @@ void __init board_setup(void)
 
        /* GPIO201 is input for PCMCIA card detect */
        /* GPIO203 is input for PCMCIA interrupt request */
-       au_writel(au_readl(GPIO2_DIR) & (u32)(~((1<<1)|(1<<3))), GPIO2_DIR);
+       au_writel(au_readl(GPIO2_DIR) & ~((1 << 1) | (1 << 3)), GPIO2_DIR);
 
-       /* zero and disable FREQ2 */
+       /* Zero and disable FREQ2 */
        sys_freqctrl = au_readl(SYS_FREQCTRL0);
        sys_freqctrl &= ~0xFFF00000;
        au_writel(sys_freqctrl, SYS_FREQCTRL0);
 
        /* zero and disable USBH/USBD clocks */
        sys_clksrc = au_readl(SYS_CLKSRC);
-       sys_clksrc &= ~0x00007FE0;
+       sys_clksrc &= ~(SYS_CS_CUD | SYS_CS_DUD | SYS_CS_MUD_MASK |
+                       SYS_CS_CUH | SYS_CS_DUH | SYS_CS_MUH_MASK);
        au_writel(sys_clksrc, SYS_CLKSRC);
 
        sys_freqctrl = au_readl(SYS_FREQCTRL0);
        sys_freqctrl &= ~0xFFF00000;
 
        sys_clksrc = au_readl(SYS_CLKSRC);
-       sys_clksrc &= ~0x00007FE0;
+       sys_clksrc &= ~(SYS_CS_CUD | SYS_CS_DUD | SYS_CS_MUD_MASK |
+                       SYS_CS_CUH | SYS_CS_DUH | SYS_CS_MUH_MASK);
 
-       // FREQ2 = aux/2 = 48 MHz
-       sys_freqctrl |= ((0<<22) | (1<<21) | (1<<20));
+       /* FREQ2 = aux/2 = 48 MHz */
+       sys_freqctrl |= (0 << SYS_FC_FRDIV2_BIT) | SYS_FC_FE2 | SYS_FC_FS2;
        au_writel(sys_freqctrl, SYS_FREQCTRL0);
 
        /*
         * Route 48MHz FREQ2 into USB Host and/or Device
         */
-#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
-       sys_clksrc |= ((4<<12) | (0<<11) | (0<<10));
-#endif
+       sys_clksrc |= SYS_CS_MUX_FQ2 << SYS_CS_MUH_BIT;
        au_writel(sys_clksrc, SYS_CLKSRC);
 
-
-       pin_func = au_readl(SYS_PINFUNC) & (u32)(~0x8000);
-       // 2nd USB port is USB host
-       pin_func |= 0x8000;
+       pin_func = au_readl(SYS_PINFUNC) & ~SYS_PF_USB;
+       /* 2nd USB port is USB host */
+       pin_func |= SYS_PF_USB;
        au_writel(pin_func, SYS_PINFUNC);
 #endif /* defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) */
 
-
-
 #ifdef CONFIG_PCI
-       // Setup PCI bus controller
+       /* Setup PCI bus controller */
        au_writel(0, Au1500_PCI_CMEM);
        au_writel(0x00003fff, Au1500_CFG_BASE);
 #if defined(__MIPSEB__)
-       au_writel(0xf | (2<<6) | (1<<4), Au1500_PCI_CFG);
+       au_writel(0xf | (2 << 6) | (1 << 4), Au1500_PCI_CFG);
 #else
        au_writel(0xf, Au1500_PCI_CFG);
 #endif
@@ -112,11 +108,11 @@ void __init board_setup(void)
 
        /* Enable the RTC if not already enabled */
        if (!(au_readl(0xac000028) & 0x20)) {
-               printk("enabling clock ...\n");
+               printk(KERN_INFO "enabling clock ...\n");
                au_writel((au_readl(0xac000028) | 0x20), 0xac000028);
        }
        /* Put the clock in BCD mode */
-       if (au_readl(0xac00002C) & 0x4) { /* reg B */
+       if (au_readl(0xac00002c) & 0x4) { /* reg B */
                au_writel(au_readl(0xac00002c) & ~0x4, 0xac00002c);
                au_sync();
        }