[MIPS] Alchemy common code style cleanup

[linux-2.6-omap-h63xx.git] / arch / mips / au1000 / common / pci.c

diff --git a/arch/mips/au1000/common/pci.c b/arch/mips/au1000/common/pci.c
index 9be99a68932aca8c83d7aba6b548a1b161b4a531..7866cf50cf99ce7ca5943a8f5a1a9217375d9ea4 100644 (file)
--- a/arch/mips/au1000/common/pci.c
+++ b/arch/mips/au1000/common/pci.c
@@ -1,10 +1,9 @@
 /*
  * BRIEF MODULE DESCRIPTION
- *     Alchemy/AMD Au1x00 pci support.
+ *     Alchemy/AMD Au1x00 PCI support.
  *
- * Copyright 2001,2002,2003 MontaVista Software Inc.
- * Author: MontaVista Software, Inc.
- *             ppopov@mvista.com or source@mvista.com
+ * Copyright 2001-2003, 2007-2008 MontaVista Software Inc.
+ * Author: MontaVista Software, Inc. <source@mvista.com>
  *
  * Copyright (C) 2004 by Ralf Baechle (ralf@linux-mips.org)
  *
@@ -30,7 +29,7 @@
  *  with this program; if not, write  to the Free Software Foundation, Inc.,
  *  675 Mass Ave, Cambridge, MA 02139, USA.
  */
-#include <linux/types.h>
+
 #include <linux/pci.h>
 #include <linux/kernel.h>
 #include <linux/init.h>
@@ -39,15 +38,15 @@
 
 /* TBD */
 static struct resource pci_io_resource = {
-       .start  = (resource_size_t)PCI_IO_START,
-       .end    = (resource_size_t)PCI_IO_END,
+       .start  = PCI_IO_START,
+       .end    = PCI_IO_END,
        .name   = "PCI IO space",
        .flags  = IORESOURCE_IO
 };
 
 static struct resource pci_mem_resource = {
-       .start  = (resource_size_t)PCI_MEM_START,
-       .end    = (resource_size_t)PCI_MEM_END,
+       .start  = PCI_MEM_START,
+       .end    = PCI_MEM_END,
        .name   = "PCI memory space",
        .flags  = IORESOURCE_MEM
 };
@@ -66,6 +65,8 @@ static unsigned long virt_io_addr;
 
 static int __init au1x_pci_setup(void)
 {
+       extern void au1x_pci_cfg_init(void);
+
 #if defined(CONFIG_SOC_AU1500) || defined(CONFIG_SOC_AU1550)
        virt_io_addr = (unsigned long)ioremap(Au1500_PCI_IO_START,
                        Au1500_PCI_IO_END - Au1500_PCI_IO_START + 1);
@@ -84,9 +85,9 @@ static int __init au1x_pci_setup(void)
                u32 prid = read_c0_prid();
 
                if ((prid & 0xFF000000) == 0x01000000 && prid < 0x01030202) {
-                      au_writel((1 << 16) | au_readl(Au1500_PCI_CFG),
-                                Au1500_PCI_CFG);
-                      printk("Non-coherent PCI accesses enabled\n");
+                       au_writel((1 << 16) | au_readl(Au1500_PCI_CFG),
+                                 Au1500_PCI_CFG);
+                       printk(KERN_INFO "Non-coherent PCI accesses enabled\n");
                }
        }
 #endif
@@ -94,6 +95,8 @@ static int __init au1x_pci_setup(void)
        set_io_port_base(virt_io_addr);
 #endif
 
+       au1x_pci_cfg_init();
+
        register_pci_controller(&au1x_controller);
        return 0;
 }