Pull pnpacpi into acpica branch

[linux-2.6-omap-h63xx.git] / arch / i386 / kernel / mpparse.c

diff --git a/arch/i386/kernel/mpparse.c b/arch/i386/kernel/mpparse.c
index 91a64016956e0d4fdbfc2698e0dd3925def58fe7..0102f3d50e574fd67184fff730f7f11a77be7b49 100644 (file)
--- a/arch/i386/kernel/mpparse.c
+++ b/arch/i386/kernel/mpparse.c
@@ -1080,7 +1080,7 @@ void __init mp_config_acpi_legacy_irqs (void)
 
 #define MAX_GSI_NUM    4096
 
-int mp_register_gsi (u32 gsi, int edge_level, int active_high_low)
+int mp_register_gsi (u32 gsi, int triggering, int polarity)
 {
        int                     ioapic = -1;
        int                     ioapic_pin = 0;
@@ -1129,7 +1129,7 @@ int mp_register_gsi (u32 gsi, int edge_level, int active_high_low)
 
        mp_ioapic_routing[ioapic].pin_programmed[idx] |= (1<<bit);
 
-       if (edge_level) {
+       if (triggering == ACPI_LEVEL_SENSITIVE) {
                /*
                 * For PCI devices assign IRQs in order, avoiding gaps
                 * due to unused I/O APIC pins.
@@ -1151,8 +1151,8 @@ int mp_register_gsi (u32 gsi, int edge_level, int active_high_low)
        }
 
        io_apic_set_pci_routing(ioapic, ioapic_pin, gsi,
-                   edge_level == ACPI_EDGE_SENSITIVE ? 0 : 1,
-                   active_high_low == ACPI_ACTIVE_HIGH ? 0 : 1);
+                   triggering == ACPI_EDGE_SENSITIVE ? 0 : 1,
+                   polarity == ACPI_ACTIVE_HIGH ? 0 : 1);
        return gsi;
 }