Blackfin arch: noMMU CPLB lookup tables can be in L1 SRAM

[linux-2.6-omap-h63xx.git] / arch / blackfin / kernel / cplbinfo.c

diff --git a/arch/blackfin/kernel/cplbinfo.c b/arch/blackfin/kernel/cplbinfo.c
index dc584fe18e5f4fdae121379df421731eee244bf3..723839da14a101c0f21d3053fc4e5d124e3750fd 100644 (file)
--- a/arch/blackfin/kernel/cplbinfo.c
+++ b/arch/blackfin/kernel/cplbinfo.c
@@ -59,12 +59,7 @@ static char *cplb_print_entry(char *buf, cplb_type type, unsigned int cpu)
 
 #else
 
-static int page_size_table[4] = {
-       0x00000400,             /* 1K */
-       0x00001000,             /* 4K */
-       0x00100000,             /* 1M */
-       0x00400000              /* 4M */
-};
+extern int page_size_table[];
 
 static int cplb_find_entry(unsigned long *cplb_addr,
                           unsigned long *cplb_data, unsigned long addr,